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* arm: mvebu: clearfog: reset uSOM onboard 1512 phyPatrick Wildt2017-05-311-0/+4
| | | | | | | | | | | | | Use GPIO19 which is wired to the uSOM phy reset signal in order to reset the uSOM's 1512 Gigabit Ethernet phy. This GPIO is valid on ClearFog rev 2.1 and newer. Taken from SolidRun's specialised u-boot, see https://github.com/SolidRun/u-boot-armada38x/commit/f906e3df172e07ac82cdd87b278d7896949262ea Signed-off-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: Replace board specific with generic memory bank decodingStefan Roese2017-05-311-62/+4
| | | | | | | | | | | | | The dram_init and dram_init_banksize functions were using a board specific implementation for decoding the memory banks from the fdt. This change makes the dram_init* functions use a generic implementation of decoding and populating memory bank and size data. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nathan Rossi <nathan@nathanrossi.com> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: armada-7040-db: Enable 10GB port 0 / SFI (KR)Stefan Roese2017-05-311-2/+6
| | | | | | | | | | | This patch enables the mvpp2 port 0 usage on the Armada 7k DB by setting the correct PHY type (KR / SFI) for the COMPHY driver and enabling the ethernet0 device node in the dts. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* arm64: mvebu_db-88f3720_defconfig: Enable PINCTRL and GPIO supportStefan Roese2017-05-311-0/+5
| | | | | | | | | This patch enable the PINCTRL and GPIO support, including the GPIO command on the Armada 3720 DB. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* pinctrl: mvebu: Enable support for the Armada 37xx pinctrl driverStefan Roese2017-05-317-10/+24
| | | | | | | | | | To enable support for the Armada 37xx pinctrl driver, we need to change the Kconfig symbol for the Armada 7k/8k pinctrl driver and its dependencies to distinguish between both platforms and drivers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* pinctrl: armada-37xx: Add gpio supportGregory CLEMENT2017-05-311-0/+162
| | | | | | | | | | | | | | | GPIO management is pretty simple and is part of the same IP than the pin controller for the Armada 37xx SoCs. This patch adds the GPIO support to the pinctrl-armada-37xx.c file, it also allows sharing common functions between the gpio and the pinctrl drivers. Ported to U-Boot based on the Linux version by Stefan Roese. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* pinctrl: armada-37xx: Add pin controller support for Armada 37xxGregory CLEMENT2017-05-311-0/+469
| | | | | | | | | | | | | | | | | The Armada 37xx SoC come with 2 pin controllers: one on the south bridge (managing 28 pins) and one on the north bridge (managing 36 pins). At the hardware level the controller configure the pins by group and not pin by pin. This constraint is reflected in the design of the driver: only the group related functions are implemented. Ported to U-Boot based on the Linux version by Stefan Roese. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* arm64: mvebu: armada37xx: add pinctrl definitionGregory CLEMENT2017-05-312-0/+39
| | | | | | | | | | | Start to populate the device tree of the Armada 37xx with the pincontrol configuration used on the board providing a dts. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* arm64: mvebu: Add pinctrl nodes for Armada 3700Gregory CLEMENT2017-05-311-0/+42
| | | | | | | | | | | | | | | | | Add the nodes for the two pin controller present in the Armada 37xx SoCs. Initially the node was named gpio1 using the same name that for the register range in the datasheet. However renaming it pinctr_nb (nb for North Bridge) makes more sens. Minor changes for U-Boot because of the slightly different dts version done by Stefan Roese. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Cc: Konstantin Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2017-05-307-15/+52
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| * doc: document u-boot, mmc-env-offset and u-boot, mmc-env-offset-redundPhilipp Tomsich2017-05-291-0/+12
| | | | | | | | | | | | | | | | | | | | Adding documentation on the new config properties: 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * env_mmc: configure environment offsets via device treePhilipp Tomsich2017-05-291-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This introduces the ability to override the environment offets from the device tree by setting the following nodes in '/config': 'u-boot,mmc-env-offset' - overrides CONFIG_ENV_OFFSET 'u-boot,mmc-env-offset-redundant' - overrides CONFIG_ENV_OFFSET_REDUND To keep with the previous logic, the CONFIG_* defines still need to be available and the statically defined values become the defaults, when the corresponding properties are not set in the device-tree. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
| * power: pmic: tps65218: Fix tps65218_voltage_update functionKeerthy2017-05-292-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently while setting the vsel value for dcdc1 and dcdc2 the driver is wrongly masking the entire 8 bits in the process clearing PFM (bit7) field as well. Hence describe an appropriate mask for vsel field and modify only those bits in the vsel mask. Source: http://www.ti.com/lit/ds/symlink/tps65218.pdf Signed-off-by: Keerthy <j-keerthy@ti.com> Fixes: 86db550b38 ("power: Add support for the TPS65218 PMIC") Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: meson: increase max block number per requestHeiner Kallweit2017-05-291-1/+1
| | | | | | | | | | | | | | | | Number of blocks is a 9 bit field where 0 stands for a unlimited number of blocks. Therefore the max number of blocks which can be set is 511. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
| * drivers/power/regulator/max77686.c: Fix comparisons of unsigned expressionsTom Rini2017-05-291-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Inside of max77686_buck_volt2hex/max77686_buck_hex2volt/max77686_ldo_volt2hex we check that the value we calculate is >= 0 however we declare 'hex' as unsigned int making these always true. Mark these as 'int' instead. We also move hex_max to int as they are constants that are 0x3f/0xff. Given that the above functions are marked as returning an int, make the variables we assign their return value to also be int to be able to catch the error condition now. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
| * mmc: Change 'part_config' to be a u8 not char.Tom Rini2017-05-291-1/+1
|/ | | | | | | | | | In some places we check if part_config is set to MMCPART_NOAVAILABLE (0xff). With part_config being a char this is always false. We should be using a u8 to store this value instead, after a quick consultation with the Linux Kernel. Reported by clang-3.8. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-2638-122/+657
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| * armv8: LS2080A: Adjust memory map for secure boot headers for NOR-bootUdit Agarwal2017-05-234-10/+12
| | | | | | | | | | | | | | | | | | This patch adjusts memory map for secure boot headers on LS2080AQDS and LS2080ARDB platforms. Secure boot headers are placed on NOR flash at offset 0x00600000. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb, ls2080aqds: Adjust memory map for NOR-bootSantan Kumar2017-05-236-15/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adjusts memory map for images on LS2080ARDB and LS2080AQDS NOR flash as below Image Flash Offset RCW+PBI 0x00000000 Boot firmware (U-Boot) 0x00100000 Boot firmware Environment 0x00300000 PPA firmware 0x00400000 PHY firmware 0x00980000 DPAA2 MC 0x00A00000 DPAA2 DPL 0x00D00000 DPAA2 DPC 0x00E00000 Kernel.itb 0x01000000 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1046AAlison Wang2017-05-234-20/+20
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1046AQDS and LS1046ARDB, such as FMAN firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: layerscape: Adjust memory mapping for Flash/SD card on LS1043AAlison Wang2017-05-234-19/+19
| | | | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN firmware load address, QE firmware load address, U-Boot start address on serial flash and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1021a: Adjust memory mapping for Flash/SD card on LS1021AQDS/TWRAlison Wang2017-05-232-10/+10
| | | | | | | | | | | | | | | | | | This patch is to adjust the memory mapping for FLash/SD card on LS1021AQDS and LS1021ATWR, such as U-Boot start address on serial Flash, QE firmware load address and environment address. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add LS2081ARDB board supportPriyanka Jain2017-05-2311-4/+246
| | | | | | | | | | | | | | | | | | | | | | | | | | LS2081ARDB board is similar to LS2080ARDB board with few differences It hosts LS2081A SoC Default boot source is QSPI-boot It does not have IFC interface RTC and QSPI flash device are different It provides QIXIS access via I2C Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Add NXP LS2081A, LS2041A SoC supportPriyanka Jain2017-05-237-5/+33
| | | | | | | | | | | | | | | | | | | | | | The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and is built on layerscape architecture. It is 40-pin derivative of LS2084A (non-AIOP personality of LS2088A). So feature-wise it is same as LS2084A. LS2041A is a 4-core personality of LS2081A. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls2080ardb: Add QSPI-boot supportPriyanka Jain2017-05-239-11/+195
| | | | | | | | | | | | | | | | | | | | QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC. LS2088ARDB RevF Board has limitation that QIXIS can not be accessed. CONFIG_FSL_QIXIS is not enabled. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls2080ardb: Update QIXIS codePriyanka Jain2017-05-231-4/+17
| | | | | | | | | | | | | | | | | | Update QIXIS related code to be executed only if CONFIG_FSL_QIXIS flag is enabled. In case QIXIS code is not enabled, use default sysclk value as 100MHz per board documentation. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() pathYogesh Gaur2017-05-231-7/+13
| | | | | | | | | | | | | | | | | | | | | | Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043ardb: Make NET independent of FManYork Sun2017-05-232-6/+9
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1046ardb: Make NET independent of FManYork Sun2017-05-232-7/+10
| | | | | | | | | | | | | | | | This allows using PCIe NIC without enabling DPAA FMan. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mingkai Hu <mingkai.hu@nxp.com> Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
| * armv8: ls1012a: fix the size of flash for multiple boardsSuresh Gupta2017-05-231-1/+1
| | | | | | | | | | | | | | LS1012AFRDM, LS1012ARDB, LS1012AQDS all have S25FS512S flash of 64MB size. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
| * armv8: layperscape: remove CONFIG_SPI_FLASH_BAR from some platformsSuresh Gupta2017-05-233-3/+0
| | | | | | | | | | | | | | | | ls1012ardb, ls1046ardb, ls2080ardb have S25FS512S flash which does not support Bank Address Register commands. Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls2080ardb: Enable SD interface for RevF boardPriyanka Jain2017-05-232-0/+22
| | | | | | | | | | | | | | | | | | | | LS2080ARDB/LS2088ARDB RevF board has smart voltage translator which needs to be programmed to enable high speed SD interface by setting GPIO4_10 output to zero. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: enable PCI command toolHou Zhiqiang2017-05-231-0/+10
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-2610-61/+251
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-2310-61/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2017-05-2326-803/+8307
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| * | ARM: rmobile: Move address of IICDVFS(I2C) to rcar-gen3-base.hNobuhiro Iwamatsu2017-05-222-3/+3
| | | | | | | | | | | | | | | | | | | | | The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3. This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add R8A7796 supportMarek Vasut2017-05-223-2/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add minor ifdeffery and default board config for the Salvator-XS board with R8A7796 M3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Rename the defconfig to match the SoCMarek Vasut2017-05-222-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the salvator-x_defconfig to r8a7795_salvator-x_defconfig in preparation for the r8a7796 support on salvator-x board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Enable SCIF2 clockMarek Vasut2017-05-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | There are two UARTs on the board, so enable the clock for the second one as well. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Count all DRAM in all slotsMarek Vasut2017-05-221-1/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of counting only the DRAM in the first slot, count all the DRAM in all slots and report it accordingly. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add USB supportMarek Vasut2017-05-223-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the EHCI USB. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add DVFS and PMIC supportMarek Vasut2017-05-222-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC, but keep the CPU reboot option as a fallback. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add RAVB ethernet supportMarek Vasut2017-05-223-0/+59
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the AVB ethernet on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Add SD supportMarek Vasut2017-05-223-5/+102
| | | | | | | | | | | | | | | | | | | | | | | | Add support for the SD card slots on the Salvator-X board. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Adjust UART clockMarek Vasut2017-05-223-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The UART uses internal SCIF clock except on R8A7795 H3 WS1.0 . Use the internal clock and ignore the early version of the chip. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Zap redefined DECLARE_GLOBAL_DATA_PTRMarek Vasut2017-05-221-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | The macro is used twice in the salvator-x board file, drop one. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Set default device treeMarek Vasut2017-05-222-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Set default device tree file in the salvator-x_defconfig and use it in the environment. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Move OF_LIBFDT and CMD_FDT to board configMarek Vasut2017-05-222-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Move these two Kconfig symbols to the salvator-x_defconfig. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | ARM: rmobile: salvator-x: Use BIT() macro in board fileMarek Vasut2017-05-221-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Cosmetic change, replace (1 << (n)) with BIT(n) . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit (git 2.34.1) at 2024-10-01 02:27:41 +0000