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* efi_loader: refactor switch to non-secure modeHeinrich Schuchardt2019-02-137-67/+132
| | | | | | | | Refactor the switch from supervisor to hypervisor to a new function called at the beginning of do_bootefi(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_driver: simplify error messageHeinrich Schuchardt2019-02-131-2/+1
| | | | | | | | | Stating the function module is sufficient. We don't need file and line number. Anyway the format code for the line number was incorrect (should be %d). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_selftest: tpl unit test, check return valuesHeinrich Schuchardt2019-02-131-2/+2
| | | | | | | For some API calls checks for the return values are missing. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_selftest: events unit test, check return valuesHeinrich Schuchardt2019-02-131-3/+3
| | | | | | | For some API calls checks for the return values are missing. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_selftest: SNP unit test on sandboxHeinrich Schuchardt2019-02-131-0/+8
| | | | | | | | | | Running the simple network protocol test on the sandbox requires setting the environment variable ethact to a network interface connected to a DHCP server and ethrotate to 'no'. So let's make it an on-request test on the sandbox (selectable by setting environment variable efi_selftest). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: efi_set_variable use const void *Heinrich Schuchardt2019-02-133-3/+4
| | | | | | | | The SetVariable() runtime service does not change the data passed to it. So mark the parameter as constant. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: use const efi_guid_t * for variable servicesHeinrich Schuchardt2019-02-134-20/+22
| | | | | | | | The runtime variable services never change GUIDs. So we should declare the GUID parameters as constant. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: move efi_init_obj_list() to a new efi_setup.cAKASHI Takahiro2019-02-134-77/+89
| | | | | | | | | | | | | | | The function, efi_init_obj_list(), can be shared in different pseudo efi applications, like bootefi/bootmgr as well as my efishell. Moreover, it will be utilized to extend efi initialization, for example, my "removable disk support" patch and "capsule-on-disk support" patch in the future. So with this patch, it will be moved to a new file, efi_setup.c, under lib/efi_loader and exported, making no changes in functionality. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Remove lines deactivated by #if 1 #else Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* doc: README.uefi: fix typosHeinrich Schuchardt2019-02-131-5/+5
| | | | | | | | | %s/specfication/specification/ %s/selftest/self-test/ %s/little endian/little-endian/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_selftest: allow building on ARMv7-MHeinrich Schuchardt2019-02-132-4/+8
| | | | | | | | | ARMv7-M only supports the Thumb instruction set. Our current crt0 code does not support it. With the patch we can build all unit tests of the EFI subsystem that do not require crt0. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: signature of StartImage and ExitHeinrich Schuchardt2019-02-132-8/+8
| | | | | | | | We use u16* for Unicode strings and efi_uintn_t for UINTN. Correct the signature of efi_exit() and efi_start_image(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: avoid unnecessary pointer to long conversionHeinrich Schuchardt2019-02-131-1/+1
| | | | | | | | | | debug() support supports %p to print pointers. The debug message is unique. So there is not need to write a possibly distracting line number. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: fix memory allocation on sandboxHeinrich Schuchardt2019-02-131-0/+6
| | | | | | | | | | | | | | | | | Commit 7b78d6438a2b ("efi_loader: Reserve unaccessible memory") introduced a comparison between RAM top and RAM start that was not known at the time when the patch of commit 49759743bf09 ("efi_loader: eliminate sandbox addresses") was written. The sandbox uses an address space that is only relevant in the sandbox context. We have to map ram_top from the sandbox address space to the physical address space before using it in the EFI subsystem. Fixes: 49759743bf09 ("efi_loader: eliminate sandbox addresses") Fixes: 7b78d6438a2b ("efi_loader: Reserve unaccessible memory") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: CMD_BOOTEFI_HELLO_COMPILE in configsHeinrich Schuchardt2019-02-137-7/+1
| | | | | | | | | | | | | | | | | | | | | | | It should not be necessary to adjust CMD_BOOTEFI_HELLO_COMPILE in config files. arch/arm/lib/crt0_arm_efi.S cannot be compiled in thumbs mode. We can disable CMD_BOOTEFI_HELLO_COMPILE for CONFIG_CPU_V7M. So there is no longer a need to disable it in stm32 configs. helloworld.efi can be built without problems on x86_64. So there is no need to disable it in chromebook_link64_defconfig and qemu-x86_64_defconfig. Same is true for ARM V7A. So do not disable CMD_BOOTEFI_HELLO_COMPILE in kp_imx6q_tpc_defconfig. Some architecture checks are already make for EFI_LOADER. There is no need to repeat them for CMD_BOOTEFI_HELLO_COMPILE Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice.Chotard@st.com Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: use named constant for efi_dp_from_mem()Heinrich Schuchardt2019-02-131-1/+1
| | | | | | | When calling efi_dp_from_mem() use a named constant for the memory type. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* distro: not taint environment variables if possibleAKASHI Takahiro2019-02-131-6/+7
| | | | | | | | | | | | | | | | | The aim of this patch is not to have temporary variables used in distro_bootcmd left as environment variables after run something. See the discussion[1]. Without this patch, saveenv command also saves those variables, too. While they are apparently safe, scsi_need_init can be harmful. Please note that, in most cases, a variable should be converted to hush's local variable, while "devplist" cannot because it is created by "part" command as an environment variable. [1] https://lists.denx.de/pipermail/u-boot/2018-December/350209.html Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: efi_connect_controller() use %pDHeinrich Schuchardt2019-02-131-1/+1
| | | | | | | | EFI_ENTRY in efi_connect_controller() should use %pD to print the remaining device path. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: efi_add_runtime_mmio()Heinrich Schuchardt2019-02-131-1/+2
| | | | | | | | The first parameter of efi_add_runtime_mmio() is a pointer to a pointer. This should be reflected in the documentation. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* distro_bootcmd: add NVME supportHeinrich Schuchardt2019-02-131-0/+27
| | | | | | | | | | | Some boards support NVME drives. We should be able to use them as boot devices. NVME access requires running 'nvme scan'. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* test: tests for u16_strdup() and u16_strcpy()Heinrich Schuchardt2019-02-131-0/+23
| | | | | | | Provide unit tests for u16_strdup() and u16_strcpy(). Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* lib: add u16_strcpy/strdup functionsAkashi, Takahiro2019-02-132-0/+52
| | | | | | | | | Add u16_strcpy() and u16_strdup(). The latter function will be used later in implementing efi HII database protocol. Signed-off-by: Akashi Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: struct efi_configuration_tableHeinrich Schuchardt2019-02-131-1/+1
| | | | | | | | | | | | | Commit 393fccdf6c73 ("efi_loader: efi_guid_t must be 64-bit aligned") has changed the alignment of efi_guid_t. This changed the size of struct efi_configuration_table on 32-bit systems form 20 to 24 bytes. As an array of this type is pointed to by the system table this breaks compatibility with existing versions of GRUB and Linux. Let's get back the original size by using the attribute __packed. Fixes: 393fccdf6c73 ("efi_loader: efi_guid_t must be 64-bit aligned") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* efi_loader: efi_guid_t must be 64-bit alignedHeinrich Schuchardt2019-02-131-1/+1
| | | | | | | | | | | | | | The UEFI Specification Version 2.7 Errata A defines: "EFI_GUID 128-bit buffer containing a unique identifier value. Unless otherwise specified, aligned on a 64-bit boundary." Before this patch efi_guid_t was 8-bit aligned. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* test/py: use default load address for tftpHeinrich Schuchardt2019-02-121-4/+5
| | | | | | | | | | | On x86_64 the size of the file u-boot loaded by the tftp test has grown in size such that when loading the file to 0x200000 it overwrites a memory area reserved for PCI. If no load address is specified for tftp do not use the ram base address (or if zero 0x200000) but the default address. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge git://git.denx.de/u-boot-x86Tom Rini2019-02-126-25/+161
|\ | | | | | | | | | | | | - Edison switch to CONFIG_OF_SEPARATE. - Tangier initial ACPI support for PMIC device. - TSC timer driver update to support native calibration. - Fixes to 64-bit U-Boot proper.
| * x86: tangier: Add initial ACPI support for PMIC deviceAndy Shevchenko2019-02-121-0/+87
| | | | | | | | | | | | | | | | | | | | | | Basin Cove PMIC is connected to I2C0 bus which is hidden from the OS and access is going via SCU device, enumerated via PCI. For now, we add just a minimum support of PMIC device to allow enabling, e.g. USB OTG, in the OS. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: Use the existing GDT in the ROM for 64-bit U-Boot properBin Meng2019-02-121-14/+0
| | | | | | | | | | | | | | | | | | | | It is unnecessary to use a RAM version GDT for 64-bit U-Boot proper. In fact we can just use the ROM version directly, which not only eliminates the risk of being overwritten by application, but also removes the complexity of patching the cpu_call64(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: Don't copy the cpu_call64() function to a hardcoded addressBin Meng2019-02-122-3/+12
| | | | | | | | | | | | | | | | | | | | Before jumping to 64-bit U-Boot proper, SPL copies the cpu_call64() function to a hardcoded address 0x3000000. This can have potential conflicts with application usage. Switch the destination address to be allocated from the heap to avoid such risk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: Change 4-level page table base address to low memoryBin Meng2019-02-121-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the 4-level page table base address for 64-bit U-Boot proper is assigned an address that conflicts with CONFIG_LOADADDR. Change it to an address within the low memory range instead. Fixes crashes seen when 'dhcp' on QEMU x86_64 with "-net nic -net user,tftp=.,bootfile=u-boot". Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: tsc: Add support for native calibration of TSC freqBernhard Messerklinger2019-02-121-0/+55
| | | | | | | | | | | | | | | | | | | | | | Add native tsc calibration function. Calibrate the tsc timer the same way as linux does in arch/x86/kernel/tsc.c. Fixes booting for Apollo Lake processors. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * doc: Fix CONFIG_OF_SEPARATE descriptionAndy Shevchenko2019-02-121-3/+4
| | | | | | | | | | | | | | | | | | | | CONFIG_OF_SEPARATE description is not in align with actual code in Makefile and thus has misleading instructions and explanation. Make it aligned with the actual code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: edison: Switch to CONFIG_OF_SEPARATEAndy Shevchenko2019-02-121-1/+1
|/ | | | | | | | | | | | There is no need for Intel Edison to have CONFIG_OF_EMBED to be enabled. Replace it with CONFIG_OF_SEPARATE. There is no functional change since u-boot.bin always contains DTB either embedded or attached. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Ferry Toth <ftoth@exalondelft.nl>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2019-02-119-6/+198
|\ | | | | | | - DM I2C improvements
| * i2c: mux: Generate longer i2c mux nameMichal Simek2019-02-111-3/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For !DM case busses are listed as ZynqMP> i2c bus Bus 0: zynq_0 Bus 1: zynq_0->PCA9544A@0x75:0 Bus 2: zynq_0->PCA9544A@0x75:1 Bus 3: zynq_0->PCA9544A@0x75:2 Bus 4: zynq_1 Bus 5: zynq_1->PCA9548@0x74:0 Bus 6: zynq_1->PCA9548@0x74:1 Bus 7: zynq_1->PCA9548@0x74:2 Bus 8: zynq_1->PCA9548@0x74:3 Bus 9: zynq_1->PCA9548@0x74:4 Bus 10: zynq_1->PCA9548@0x75:0 Bus 11: zynq_1->PCA9548@0x75:1 Bus 12: zynq_1->PCA9548@0x75:2 Bus 13: zynq_1->PCA9548@0x75:3 Bus 14: zynq_1->PCA9548@0x75:4 Bus 15: zynq_1->PCA9548@0x75:5 Bus 16: zynq_1->PCA9548@0x75:6 Bus 17: zynq_1->PCA9548@0x75:7 where is exactly describing i2c bus topology. By moving to DM case i2c mux buses are using names from DT and because i2c-muxes describing sub busses with the same names like i2c@0, etc it is hard to identify which bus is where. Linux is adding topology information to i2c-mux busses to identify them better. This patch is doing the same and composing bus name with topology information. When patch is applied with topology information on zcu102-revA. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@ff020000->i2c-mux@75->i2c@0 Bus 3: i2c@ff020000->i2c-mux@75->i2c@1 Bus 4: i2c@ff020000->i2c-mux@75->i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@ff030000->i2c-mux@74->i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@ff030000->i2c-mux@74->i2c@1 Bus 7: i2c@ff030000->i2c-mux@74->i2c@2 Bus 8: i2c@ff030000->i2c-mux@74->i2c@3 Bus 9: i2c@ff030000->i2c-mux@74->i2c@4 Bus 10: i2c@ff030000->i2c-mux@75->i2c@0 Bus 11: i2c@ff030000->i2c-mux@75->i2c@1 Bus 12: i2c@ff030000->i2c-mux@75->i2c@2 Bus 13: i2c@ff030000->i2c-mux@75->i2c@3 Bus 14: i2c@ff030000->i2c-mux@75->i2c@4 Bus 15: i2c@ff030000->i2c-mux@75->i2c@5 Bus 16: i2c@ff030000->i2c-mux@75->i2c@6 Bus 17: i2c@ff030000->i2c-mux@75->i2c@7 Behavior before the patch is applied. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@0 Bus 3: i2c@1 Bus 4: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@1 Bus 7: i2c@2 Bus 8: i2c@3 Bus 9: i2c@4 Bus 10: i2c@0 Bus 11: i2c@1 Bus 12: i2c@2 Bus 13: i2c@3 Bus 14: i2c@4 Bus 15: i2c@5 Bus 16: i2c@6 Bus 17: i2c@7 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| * i2c: Fill req_seq in i2c_post_bind()Michal Simek2019-02-111-3/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For i2c controllers which are missing alias in DT there is no req_seq setup. This function is setting up proper ID based on highest found alias ID. On zcu102 this is the behavior when patch is applied. ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 2: i2c@0 Bus 3: i2c@1 Bus 4: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus 5: i2c@0 (active 5) 54: eeprom@54, offset len 1, flags 0 Bus 6: i2c@1 Bus 7: i2c@2 Bus 8: i2c@3 Bus 9: i2c@4 Bus 10: i2c@0 Bus 11: i2c@1 Bus 12: i2c@2 Bus 13: i2c@3 Bus 14: i2c@4 Bus 15: i2c@5 Bus 16: i2c@6 Bus 17: i2c@7 Before this patch applied (controllers have -1 ID) ZynqMP> i2c bus Bus 0: i2c@ff020000 20: gpio@20, offset len 1, flags 0 21: gpio@21, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus -1: i2c@0 Bus -1: i2c@1 Bus -1: i2c@2 Bus 1: i2c@ff030000 (active 1) 74: i2c-mux@74, offset len 1, flags 0 75: i2c-mux@75, offset len 1, flags 0 Bus -1: i2c@0 (active 0) 54: eeprom@54, offset len 1, flags 0 Bus -1: i2c@1 Bus -1: i2c@2 Bus -1: i2c@3 Bus -1: i2c@4 Bus -1: i2c@0 Bus -1: i2c@1 Bus -1: i2c@2 Bus -1: i2c@3 Bus -1: i2c@4 Bus -1: i2c@5 Bus -1: i2c@6 Bus -1: i2c@7 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * i2c: dm: Record maximum id of devices before probing devicesMichal Simek2019-02-111-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | There is a need to find out the first free i2c ID which can be used for i2s buses (including i2c buses connected to i2c mux). Do it early in init and share this variable with other i2c classes for uniq bus identification. add from hs: fix build problem in i2c-uclass.c for omap devices Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * dm: core: Add tests for dev_read_alias_highest_id()Michal Simek2019-02-081-0/+23
| | | | | | | | | | | | | | | | | | It is checking the highest alias ID for eth, gpio, pci, i2c and error code on non existing alias. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Introduce dev_read_alias_highest_id()Michal Simek2019-02-082-0/+24
| | | | | | | | | | | | | | | | | | It is wrapper for calling of_alias_get_highest_id() when live tree is enabled and fdtdec_get_alias_highest_id() if not. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * fdt: Introduce fdtdec_get_alias_highest_id()Michal Simek2019-02-082-0/+46
| | | | | | | | | | | | | | | | | | | | Find out the highest alias ID used for certain subsystem. This call will be used for alocating IDs for i2c buses which are not described in DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add of_alias_get_highest_id()Michal Simek2019-02-082-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The same functionality was added to Linux for i2c bus registration with this commit message: " of: base: add function to get highest id of an alias stem I2C supports adding adapters using either a dynamic or fixed id. The latter is provided by aliases in the DT case. To prevent id collisions of those two types, install this function which gives us the highest fixed id, so we can then let the dynamically created ones come after this highest number. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> " Add it also to U-Boot for DM I2C support. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2019-02-115-4/+14
|\ \ | | | | | | | | | | | | | | | - Fix BUILD_TARGET for ARCH_MVEBU from Baruch - Fix MVEBU PCIe reset issues from Baruch - Increase DDR stability on x530 from Chris
| * | ARM: mvebu: x530: use MV_DDR_FREQ_SARChris Packham2019-02-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MV_DDR_FREQ_SAR lets the DDR frequency be determined by hardware strapping. This also has the side effect of running the DDR clock in synchronous mode with the CPU core clock rather than from an independent PLL. We've seen this improve reliability in operation across a number of boards and temperature ranges. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | Kconfig: fix BUILD_TARGET for ARCH_MVEBUBaruch Siach2019-02-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit dc146ca11187 ("Kconfig: Migrate CONFIG_BUILD_TARGET") made the mvebu default build target depend on CONFIG_SPL_BUILD. Unfortunately, there is no such Kconfig symbol. Use the CONFIG_SPL symbol instead to fix that. Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: cf gt-8k: dts: add PCIe slot reset supportBaruch Siach2019-02-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Describe the mini-PCIe slot gpio reset signal. This enables PCIe devices on Clearfog GT-8K. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | pcie: designware: mvebu: fix reset release polarityBaruch Siach2019-02-111-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dm_gpio_set_value() routine sets signal logical level, with GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1 (asserted), while reset inactive value is 0 (de-asserted). Fix the reset toggle code to set the correct reset logic value. Reported-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: mcbin: dts: fix PCIe reset polarityBaruch Siach2019-02-111-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | The PCIe slot PERST signal is active low. Fix the gpio signal description in the dts. This happened to work because the pcie_dw_mvebu driver sets the reset gpio level to 1 (high) to release the reset. The following commit will fix that. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-02-106-13/+40
|\ \ | | | | | | | | | - SD/MMC fixes and ext4 memory leak fix
| * | fs: ext4: Unmount FS in do_fs_type()Marek Vasut2019-02-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike other generic FS accessors, fs_get_info() does not call fs_close() at the end of it's operation. Thus, using fs_get_info() in do_fs_type() without calling fs_close() causes potential memory leak by creating new filesystem structures on each call of do_fs_type(). The test case to trigger this problem is as follows. It is required to have ext4 filesystem on the first partition of the SDMMC device, since ext4 requires stateful mount and causes memory allocation. => while true ; do mmc rescan ; fstype mmc 1 ; done Eventually, the mounting of ext4 will fail due to malloc failures and the filesystem will not be correctly detected. This patch fixes the problem by adding the missing fs_close(). Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
| * | mmc: Do not poll using CMD13 when changing timingMarek Vasut2019-02-091-8/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy, do not poll for the completion status using CMD13, but rather wait 50mS. Once the card receives the CMD6 and starts executing it, the bus is in undefined state until both the card finishes executing the command and until the controller switches the bus to matching timing configuration. During this time, it is not possible to transport any commands or data across the bus, which includes the CMD13. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: tmio: renesas: Add 1uS delay after DMA completion on older IPsMarek Vasut2019-02-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The internal DMAC asserts DMA transfer end bit too early on older version of the TMIO IPs which use bit 17 for DTRAEND. Add 1uS delay after the completion of DMA transfer and before invalidating the cache to let the DMAC fully complete the transfer. Otherwise, it could happen that the last few bytes of a transferred data are not available. A test case to trigger this behavior is the following command, ran on the U-Boot command line, with Sandisk 16 GiB UHS-I card inserted into SDHI slot 0 and with first partition being of type FAT: => while true ; do mmc rescan ; fstype mmc 0:1 ; done Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>