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* test: dm: Reorder the objects to buildJoe Hershberger2015-04-181-2/+2
| | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: pci: Add driver model tests for PCISimon Glass2015-04-183-0/+77
| | | | | | Add some basic tests to check that things work as expected with sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-189-68/+62
| | | | | | | | | | | | | | | | Move chromebook_link over to driver model for PCI. This involves: - adding a uclass for platform controller hub - removing most of the existing PCI driver - adjusting how CPU init works to use driver model instead - rename the lpc compatible string (it will be removed later) This does not really take advantage of driver model fully, but it does work. Furture work will improve the code structure to remove many of the explicit calls to init the board. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-185-47/+34
| | | | | | Move coreboot-x86 over to driver model for PCI. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-185-0/+75
| | | | | | | Add a simple x86 PCI driver which uses standard functions provided by the architecture. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Enable PCI for sandboxSimon Glass2015-04-183-0/+8
| | | | | | | Enable PCI options so that sandbox can be used for testing this bus with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a emulated PCI device as an exampleSimon Glass2015-04-181-0/+285
| | | | | | | | This device sits on the sandbox PCI bus and provides a case-swapping service for sandbox. It illustrates the use of both PCI I/O and PCI memory accesses. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Add a PCI emulation uclassSimon Glass2015-04-164-0/+177
| | | | | | | | Since sandbox does not have real devices (unless it borrows those from the host) it must use emulations. Provide a uclass which permits PCI operations to be passed through to an emulation device. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Add a simple PCI driverSimon Glass2015-04-163-0/+90
| | | | | | | Add a driver which can access emulations of devices and make them available in sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: pci: Add PCI support for sandboxSimon Glass2015-04-169-7/+284
| | | | | | | | Add the required header information, device tree nodes and I/O accessor functions to support PCI on sandbox. All devices are emulated by drivers which can be added as required for testing or development. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pci: Add a uclass for PCISimon Glass2015-04-1610-14/+1081
| | | | | | | | | | | Add a uclass for PCI controllers and a generic one for PCI devices. Adjust the 'pci' command and the existing PCI support to work with this new uclass. Keep most of the compatibility code in a separate file so that it can be removed one day. TODO: Add more header file comments to the new parts of pci.h Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: pci: Move common PCI functions into their own fileSimon Glass2015-04-164-276/+313
| | | | | | | Driver model will share many functions with the existing PCI implementation. Move these into their own file to avoid duplication and confusion. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Show both allocated and requested seq numbers in 'dm uclass'Simon Glass2015-04-161-2/+2
| | | | | | | | | | Both of these values are useful for understanding what is going on, so show them both. The requested number comes from a device tree alias. The allocated one is set up when the device is activated, and is unique throughout the uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add a uclass pre_probe() method for devicesSimon Glass2015-04-167-6/+35
| | | | | | | | | | | | Some uclasses want to set up a device before it is probed. Add a method for this. An example is with PCI, where a PCI uclass wants to set up its private data for later use. This allows the device's uclass() method to make calls whcih use that data (for example, read PCI memory regions from device tree, set up bus numbers). Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Mark device as active before calling its probe() methodSimon Glass2015-04-161-3/+4
| | | | | | | | | | | | | | | | | | At present the device is not active when the probe() method is called. But some probe() methods want to set up the device and this can involve accessing it through normal methods. For example a PCI bus may wish to set up its PCI parameters using calls to pci_hose_write_config_dword() and similar. At present this does not work because every such call within the probe() method sees that the device is not active and attempts to probe it. Already we mark the device as probed before calling the uclass post_probe() method. This is a subtle change but I believe the new approach is better. Since the scope of the change is only the probe() method and all its callees it should still be within the control of the board author. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add dev_get_uclass_priv() to access uclass private dataSimon Glass2015-04-1627-51/+71
| | | | | | | | Add a convenience function to access the private data that a uclass stores for each of its devices. Convert over most existing uses for consistency and to provide an example for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Tighten up error handling in fdtdec_get_pci_addr()Simon Glass2015-04-162-2/+6
| | | | | | | | | | | | | This function returns -ENOENT when the property is missing (which the caller might forgive) and also when the property is present but incorrectly formatted (which many callers would like to report). Update the error return value to allow these different situations to be distinguished. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Correct map_sysmem() logic in do_mem_mw()Simon Glass2015-04-161-3/+4
| | | | | | | This function does not unmap what it maps. Correct it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Split up arch_cpu_init()Simon Glass2015-04-161-0/+8
| | | | | | | | At present we do more in this function than we should. Split out the post-driver-model part into a separate function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: Add a new CPU init function which can use driver modelSimon Glass2015-04-162-0/+17
| | | | | | | | | | | Since driver model is set up after arch_cpu_init(), that function cannot use drivers. Add a new arch_cpu_init_dm() function which is called immediately after driver model is ready, and can reference devices. This can be used to probe essential devices for the CPU. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-1621-195/+199
| | | | | | | | | | | | These functions currently use a generic name, but they are for x86 only. This may introduce confusion and prevents U-Boot from using these names more widely. In fact it should be possible to remove these at some point and use generic functions, but for now, rename them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* fdt: Export fdtdec_get_number() for general useSimon Glass2015-04-162-1/+12
| | | | | | | This function is missing a prototype but is more widey useful. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* sandbox: Update device tree 'reg' properties for I2C and SPISimon Glass2015-04-161-3/+3
| | | | | | | | We should have a size value for these. Add one in each case. This will be needed for PCI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add support for panther (Asus Chromebox)Simon Glass2015-04-169-0/+178
| | | | | | | | | | | | | | | | | | | | Support running U-Boot as a coreboot payload. Tested peripherals include: - Video (HDMI and DisplayPort) - SATA disk - Gigabit Ethernet - SPI flash USB3 does not work. This may be a problem with the USB3 PCI driver or something in the USB3 stack and has not been investigated So far this is disabled. The SD card slot also does not work. For video, coreboot will need to run the OPROM to set this up. With this board, bare support (running without coreboot) is not available as yet. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Move common Chromebook config into a separate fileSimon Glass2015-04-162-60/+69
| | | | | | | | Since Chromebooks mostly have similar configuration, put it in a common file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: spi: Add support for lynxpointSimon Glass2015-04-161-1/+2
| | | | | | | Add Lynxpoint to the driver so that the Asus Chromebox can be supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* x86: pci: Add PCI IDs for lynxpointSimon Glass2015-04-161-0/+2
| | | | | | | Add some new device IDs used by this haswell-based chipset. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: video: Allow keyboard presence to be controlled by device treeSimon Glass2015-04-162-8/+37
| | | | | | | | At present a VGA console assumes a keyboard unless a CONFIG option is set. This difference can be dealt with by a device tree option, allowing boards that are otherwise the same to use the same configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Support machines with >4GB of RAMSimon Glass2015-04-161-2/+4
| | | | | | | | | | | | | Some systems have more than 4GB of RAM. U-Boot can only place things below 4GB so any memory above that should not be used. Ignore any such memory so that the memory size will not exceed the maximum. This prevents gd->ram_size exceeding 4GB which causes problems for PCI devices which use DMA. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.cKishon Vijay Abraham I2015-04-163-28/+2
| | | | | | | | | | | | | | | | Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY) changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between the two dwc3 controllers present in dra7xx/am43xx and enabled these clocks in enable_basic_clocks() in hw_data.c. However these clocks continued to be enabled in board files/driver files for dwc3 host mode functionality causing compilation break with few configs. Fixed it here by making all the clocks enabled in enable_basic_clocks() and removing it from board files/driver files here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-04-1639-298/+852
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| * sunxi: Complete i2c support for each supported platformPaul Kocialkowski2015-04-156-3/+153
| | | | | | | | | | | | | | | | | | | | | | Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * i2c: mvtwsi: Support for up to 4 different controllersPaul Kocialkowski2015-04-156-34/+104
| | | | | | | | | | | | | | | | | | | | | | | | Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: iNet 3F supportPaul Kocialkowski2015-04-152-0/+25
| | | | | | | | | | | | | | | | | | | | The iNet 3F is an A10 tablet with 1GiB RAM and a 1024x768 screen. Also see: http://linux-sunxi.org/INet_3F Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: iNet 3W supportPaul Kocialkowski2015-04-152-0/+24
| | | | | | | | | | | | | | | | | | | | The iNet 3W is an A10 tablet with 1GiB RAM and a 1024x768 screen. Also see: http://linux-sunxi.org/INet_3W Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Proper iNet board config namingPaul Kocialkowski2015-04-152-2/+2
| | | | | | | | | | | | | | | | | | | | The official name for the iNet manufacturer is iNet with a lowercase i and an uppercase N. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Michal Suchanek <hramrach@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Removed dram files cleanup in MAINTAINERSPaul Kocialkowski2015-04-151-3/+0
| | | | | | | | | | | | | | | | | | A few dram files were still listed as maintained even though they were removed some time ago Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Serial number support, obtained from SID bitsPaul Kocialkowski2015-04-151-11/+22
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: A20-OLinuXino-Lime2 USB0 VBUS detect and enable pinsPaul Kocialkowski2015-04-151-0/+2
| | | | | | | | | | | | | | | | This allows enabling MUSB (on the OTG port). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Cubieboard2 mmc0 card-detect pinPaul Kocialkowski2015-04-151-0/+1
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: A20-OLinuXino-Lime2 mmc0 card-detect pinPaul Kocialkowski2015-04-151-0/+1
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Yones Toptech BD1078 mmc0 and mmc1 card-detect pinsPaul Kocialkowski2015-04-151-0/+2
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Ainol AW1 mmc0 card-detect pinPaul Kocialkowski2015-04-151-0/+1
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Ampe A76 mmc0 card-detect pinPaul Kocialkowski2015-04-151-1/+2
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: TZX-Q8-713B7 mmc0 card-detect pinPaul Kocialkowski2015-04-151-0/+1
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: axp221: Use vbus-available rather then vbus-usable for vbus-detectHans de Goede2015-04-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vbus-usable may not get set if power is provided through both the power barrel connector and external 5v is also present on the otg connector, at least on boards where vbus is also controlled through the axp221-pmic. One way to reproduce this is to bootup an Ippo-q8h board with a usb-host cable plugged into the otg (so that it will get powered), then unplug the usb-host cable and plug in a charger, and then do "reset" on the u-boot console, vbus-usable will then report 0, leading to uboot trying to provide power to the otg port even though external 5v is present, this commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: usbc: Wait for vbus to fall after disabling itHans de Goede2015-04-151-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When u-boot boots the board may be powering vbus, we turn off vbus in sunxi_usbc_request_resources, if we are too quick with reading vusb-detect after this we may see a residual charge and assume we've an external vusb connected even though we do not. So when we see an external vusb wait a bit and try again. Without this when dealing with a pmic controller vbus and doing "reset" on the u-boot console the musb host will only init once every other boot, because the other boot it thinks an external vbus is present, this commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: usbc: Initialize vusb value on request_resourcesHans de Goede2015-04-151-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | On boards which use the pmic to enable/disable vbus on the otg port, the vbus value is not reset to 0 on reset, as reset only resets the SoC and not the pmic, so explicitly set vbus to 0 on init (request_resources) by moving the gpio_direction_output call into request_resources. For consistency also move the gpio_direction_input call for vbus-detect into request_resources. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * power: axp209: Registers definitions in headerPaul Kocialkowski2015-04-152-38/+38
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp152: Registers definitions in headerPaul Kocialkowski2015-04-152-11/+12
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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