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* efi_loader: correct includes in efi_variable.cHeinrich Schuchardt2019-10-301-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'make tests' on an 32bit ARM system leads to In file included from ../lib/efi_loader/efi_variable.c:9: ../include/malloc.h:364:7: error: conflicting types for ‘memset’ void* memset(void*, int, size_t); ^~~~~~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../lib/efi_loader/efi_variable.c:8: ../include/linux/string.h:103:15: note: previous declaration of ‘memset’ was here extern void * memset(void *,int,__kernel_size_t); ^~~~~~ In file included from ../lib/efi_loader/efi_variable.c:9: ../include/malloc.h:365:7: error: conflicting types for ‘memcpy’ void* memcpy(void*, const void*, size_t); ^~~~~~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../lib/efi_loader/efi_variable.c:8: ../include/linux/string.h:106:15: note: previous declaration of ‘memcpy’ was here extern void * memcpy(void *,const void *,__kernel_size_t); ^~~~~~ Use common.h as first include as recommended by the U-Boot coding style guide. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* cmd: env: extend "env [set|print] -e" to manage UEFI variablesAKASHI Takahiro2019-10-302-44/+252
| | | | | | | | | | | | | | | | | | | With this patch, when setting UEFI variable with "env set -e" command, we will be able to - specify vendor guid with "-guid guid", - specify variable attributes, BOOTSERVICE_ACCESS, RUNTIME_ACCESS, respectively with "-bs" and "-rt", - append a value instead of overwriting with "-a", - use memory as variable's value instead of explicit values given at the command line with "-i address,size" If guid is not explicitly given, default value will be used. Meanwhile, "env print -e," will be modified so that it will NOT dump a variable's value if '-n' is specified. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* blk: set log2blksz in blk_create_device()Heinrich Schuchardt2019-10-301-0/+1
| | | | | | | | | | | The ext4 file system requires log2blksz to be set. So when setting the block size on the block descriptor we should fill this field too. This fixes a problem with EFI block devices providing ext4 partitions, cf. https://lists.denx.de/pipermail/u-boot/2019-October/387702.html. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsTom Rini2019-10-2575-545/+2327
|\ | | | | | | | | | | | | | | | | - bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs - bmips: various small fixes - mtmips: add new drivers for clock, reset-controller and pinctrl - mtmips: add support for high speed UART - mtmips: update/enhance drivers for SPI and ethernet - mtmips: add support for MMC
| * configs: mtmips: remove configs which are selected in Kconfig or uselessWeijie Gao2019-10-254-28/+0
| | | | | | | | | | | | | | Some configs are selected in Kconfig and is no longer needed in the defconfig files. Some configs (power domain, ram) are never used. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * mips: mtmips: select essential drivers in KconfigWeijie Gao2019-10-252-0/+8
| | | | | | | | | | | | | | Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the system, they should be always selected. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * mips: mtmips: change baudrate table for all boardsWeijie Gao2019-10-252-2/+2
| | | | | | | | | | | | | | This patch changes baudrate table for all boards preparing for using mtk highspeed uart driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add default pinctrl to eth nodes for all boardsWeijie Gao2019-10-252-0/+4
| | | | | | | | | | | | | | | | | | | | | | This patch adds default eth pinctrl for all boards. There are two pinctrl nodes used for two scenarios: ephy_iot_mode - for IOT boards which have only one port (PHY0) ephy_router_mode - For routers which have more than one ports Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add default pinctrl for gardena-smart-gateway-mt7688Weijie Gao2019-10-251-0/+3
| | | | | | | | | | | | | | This adds default pinctrl (dual SPI chip select) for gardena smart gateway Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add mmc related nodes for mt7628an.dtsiWeijie Gao2019-10-251-0/+22
| | | | | | | | | | | | This patch adds mmc related nodes for mt7628an.dtsi Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * mmc: mtk-sd: add a dts property cd-active-high for builtin-cd modeWeijie Gao2019-10-251-1/+5
| | | | | | | | | | | | | | This patch adds a dts property cd-active-high for builtin-cd mode to make it configurable instead of using hardcoded active-low. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * mmc: mtk-sd: add support for MediaTek MT7620/MT7628 SoCsWeijie Gao2019-10-252-4/+21
| | | | | | | | | | | | This patch adds mmc support for MediaTek MT7620/MT7628 SoCs. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: enable eth port0 led and link poll functions for all boardsWeijie Gao2019-10-253-1/+27
| | | | | | | | | | | | | | This patch adds default p0led status and phy0 link polling for all boards. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: add support to isolate LAN/WAN portsWeijie Gao2019-10-251-0/+32
| | | | | | | | | | | | | | This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to prevent LAN devices from getting IP address from WAN. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: free rx descriptor on receiving failureWeijie Gao2019-10-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When received a packet with an invalid length recorded in rx descriptor, we should free this rx descriptor to allow us to continue to receive following packets. Without doing so, u-boot will stuck in a dead loop trying to process this invalid rx descriptor. This patch adds a call to mt7628_eth_free_pkt() after received an invalid packet length. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: make phy link up detection optional via DTWeijie Gao2019-10-252-29/+31
| | | | | | | | | | | | | | | | | | | | | | | | The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port). Although in IOT mode only port0 is usable, the phy0 is still connected to the switch, not the ethernet gmac directly. This patch rewrites it and makes it optional. It can be turned on by adding mediatek,poll-link-phy = <?> explicitly into the eth node. By default the driver is switch mode with all 5 phy ports working without link detection. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * net: mt7628-eth: remove hardcoded gpio settings and regmap-based phy resetWeijie Gao2019-10-251-37/+8
| | | | | | | | | | | | | | | | | | This patch removes hardcoded gpio settings as they have been replaced by pinctrl in dts, and also replaces regmap-based phy reset with a more generic reset controller. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 partWeijie Gao2019-10-252-68/+158
| | | | | | | | | | | | | | | | This patch adds slew rate calibration for mt76x8-usb-phy, removes code which belongs to mt7620, and gets rid of using syscon and regmap by using clock driver and reset controller. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: update reset controller node for mt7628Weijie Gao2019-10-251-12/+24
| | | | | | | | | | | | This patch updates reset controller node for mt7628 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * reset: add reset controller driver for MediaTek MIPS platformWeijie Gao2019-10-254-0/+126
| | | | | | | | | | | | | | This patch adds reset controller driver for MediaTek MIPS platform and header file for mt7628. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add default pinctrl for uart nodesWeijie Gao2019-10-251-0/+9
| | | | | | | | | | | | This patch adds default pinctrl for uart nodes Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add pinctrl node for mt7628Weijie Gao2019-10-251-0/+150
| | | | | | | | | | | | This patch adds pinctrl node with default pin state for mt7628an.dtsi. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * pinctrl: add support for MediaTek MT7628Weijie Gao2019-10-257-0/+747
| | | | | | | | | | | | | | This patch adds pinctrl support for mt7628, with a file for common pinmux functions and a file for mt7628 which has additional support for pinconf. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: restore default register value after each xferWeijie Gao2019-10-251-13/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently this driver uses a different way to implement the spi xfer, by modifying some fields of two registers, which is incompatible with the MTK's original SDK linux driver. This will cause the flash data being damaged by the SDK driver. This patch lets the mt7621_spi_set_cs() restore the original register fields after cs deactivated. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: remove data cache and rewrite its xfer functionWeijie Gao2019-10-251-106/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mt7621 spi controller supports continuous generic half-duplex spi transaction. There is no need to cache xfer data at all. To achieve this goal, the OPADDR register must be used as the first data to be sent. And follows the eight generic DIDO registers. But one thing different between OPADDR and DIDO registers is OPADDR has a reversed byte order. With this patch, any amount of data can be read/written in a single xfer function call. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * spi: mt7621-spi: use clock frequency from clk driverWeijie Gao2019-10-251-7/+13
| | | | | | | | | | | | | | This patch lets the spi driver to use clock provided by the clk driver since the new clk-mt7628 driver provides accurate sys clock frequency. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: add clock node for mt7628Weijie Gao2019-10-251-4/+17
| | | | | | | | | | | | | | This patch adds clkctrl node for mt7628 and adds clocks property for some node. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * clk: add clock driver for MediaTek MT76x8 platformWeijie Gao2019-10-254-0/+199
| | | | | | | | | | | | | | | | This patch adds a clock driver for MediaTek MT7628/7688 SoC. It provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: enable high-speed UART support for mt7628Weijie Gao2019-10-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which support baudrate up to 921600. The high-speed UART is compatible with ns16550 when baudrate <= 115200. Add compatible string to dtsi file so u-boot can use it when serial_mtk driver is built in. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * dts: mtmips: move uart property clock-frequency into mt7628an.dtsiWeijie Gao2019-10-253-2/+6
| | | | | | | | | | | | | | | | The UART of MT7628 has fixed 40MHz input clock so there is no need to put clock-frequency in every dts files. Just put it into the common dtsi file. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * serial: serial_mtk: add non-DM version for SPLWeijie Gao2019-10-252-17/+187
| | | | | | | | | | | | | | | | This patch adds non-DM version for mtk hsuart driver and makes it compatible with ns16550a driver in configuration. This is needed in SPL with CONFIG_SPL_DM disabled for reducing size. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * serial: serial_mtk: enable FIFO and disable flow controlWeijie Gao2019-10-251-0/+21
| | | | | | | | | | | | | | This patch adds codes to enable FIFO and disable flow control taken from ns16550 driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * drivers: nand: brcmnand: fix nand_chip ecc layout structureWilliam Zhang2019-10-251-156/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current brcmnand driver is based on 4.18 linux kernel which uses mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from old kernel which does not use this new API and expect nand_chip.ecc.layout structure to be set. This cause nand_scan_tail function running into a bug check if the device has a different oob size than the default ones. This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7 that supports the ecc layout struture and replaces the mtd_set_ooblayout method Signed-off-by: William Zhang <william.zhang@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
| * mips: bmips: switch to board defines for dtbÁlvaro Fernández Rojas2019-10-251-2/+2
| | | | | | | | | | | | Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: correct name charactersÁlvaro Fernández Rojas2019-10-257-7/+7
| | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: configs: switch to size definitionsÁlvaro Fernández Rojas2019-10-2522-45/+58
| | | | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mips: bmips: remove unneeded definitionsÁlvaro Fernández Rojas2019-10-251-4/+0
| | | | | | | | | | | | | | These are no longer needed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * bmips: enable vr-3032u nand supportÁlvaro Fernández Rojas2019-10-253-0/+23
| | | | | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: bcm63268: add support for brcmnandÁlvaro Fernández Rojas2019-10-251-0/+18
| | | | | | | | | | | | | | BCM63268 uses 4.0 HW nand controller, which is currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: bcm6362: add support for brcmnandÁlvaro Fernández Rojas2019-10-251-0/+18
| | | | | | | | | | | | | | BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: bcm6328: add support for brcmnandÁlvaro Fernández Rojas2019-10-251-0/+16
| | | | | | | | | | | | | | BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * bmips: bcm6368: add support for brcmnandÁlvaro Fernández Rojas2019-10-251-0/+18
| | | | | | | | | | | | | | BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by brcmnand driver. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
| * nand: brcm: add BCM6368 supportÁlvaro Fernández Rojas2019-10-253-0/+124
| | | | | | | | | | | | | | This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: add compile time definition of L2 cache sizeRamon Fried2019-10-252-2/+10
| | | | | | | | | | | | | | | | | | | | If configuration is set to skip low level init, automatic probe of L2 cache size is not performed and the size is set to 0. Flushing or invalidating the L2 cache will fail in this case. Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0. Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
* | Merge branch '2019-10-24-ti-imports'Tom Rini2019-10-2544-28/+39198
|\ \ | | | | | | | | | | | | - Enable DFU on dra7xx boards - Further Keystone 3 platform improvements
| * | arm: dts: k3-am65: Add R5F ranges in interconnect nodesSuman Anna2019-10-251-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the address spaces for the R5F cores in MCU domain to the ranges property of the cbass_mcu interconnect node so that the addresses within the R5F nodes can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | armv7R: K3: j721e: Add support for triggering ddr init from SPLLokesh Vutla2019-10-252-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | arm: dts: k3-j721e: Add ddr nodeLokesh Vutla2019-10-253-0/+4409
| | | | | | | | | | | | | | | | | | | | | | | | Use the 3733MTs DDR configuration that is auto generated from DDR_Regconfig tool. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Kevin Scholz <k-scholz@ti.com>
| * | ram: k3-j721e: Add support for J721E DDR controllerKevin Scholz2019-10-2521-0/+32102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper logic to integrate these blocks in the device. The DDR subsystem is used to provide an interface to external SDRAM devices which can be utilized for storing program or data. Introduce support for the DDR controller and DDR phy within the DDR subsystem. Signed-off-by: Kevin Scholz <k-scholz@ti.com Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | dt-bindings: memory-controller: Introduce J721E DDRSS bindingsLokesh Vutla2019-10-251-0/+2241
| | | | | | | | | | | | | | | | | | Add DT binding documentation for DDR sub system present on J721E device. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
generated by cgit (git 2.34.1) at 2025-01-26 20:57:29 +0000