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* gpio: stm32f7: Add gpio bank holes managementPatrice Chotard2018-12-073-14/+92
| | | | | | | | | | | | In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the gpio bank or a combination of these 3 configurations. For that, gpio bindings offer the gpio-ranges DT property which described the gpio bank mapping. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* pinctrl: stm32: Move gpio_dev list filling outside probe()Patrice Chotard2018-12-071-25/+38
| | | | | | | Move gpio_dev list filling outside probe() to speed-up U-boot boot sequence execution. This list is populated only when needed. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* serial: bcm6858: remove driver and switch to bcm6345Álvaro Fernández Rojas2018-12-075-310/+3
| | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* arm: implement {in, out}_{16, 32} and {clr, set, clrset}bits_{16, 32}Álvaro Fernández Rojas2018-12-071-0/+13
| | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* serial: bcm6345: switch to raw I/O functionsÁlvaro Fernández Rojas2018-12-071-50/+49
| | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
* arm: am335x-pdu001: Enable CONFIG_BLK and CONFIG_DM_MMCFelix Brack2018-12-072-0/+13
| | | | | | | | | | | | | | This patch enables CONFIG_BLK as well as CONFIG_DM_MMC for the PDU001 board. It depends on Patrice Chotard's patch 'power: regulator: denied disable on always-on regulator' which prevents power cycling the vmmc supply. Without this patch the board will not boot as vmmc is unfortunately used by other board components, not just eMMC and micro SD card. Furthermore my patch 'dts: am335x-pdu001: Fix polarity of card detection input' is required to boot from external micro SD card. Without this patch no SD card will be detected and hence booting will fail. Signed-off-by: Felix Brack <fb@ltec.ch> Reviewed-by: Tom Rini <trini@konsulko.com>
* dts: am335x-pdu001: Fix polarity of card detection inputFelix Brack2018-12-071-1/+1
| | | | | | | | | When a micro SD card is inserted in the PDU001 card cage, the card detection switch is opened and the corresponding GPIO input is driven by a pull-up. Hence change the active level of the card detection input from low to high. Signed-off-by: Felix Brack <fb@ltec.ch>
* test: dma: add dma-uclass testGrygorii Strashko2018-12-077-0/+425
| | | | | | | | | | Add a sandbox DMA driver implementation (provider) and corresponding DM test. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
* dma: add channels supportÁlvaro Fernández Rojas2018-12-074-7/+532
| | | | | | | | | | | | | | | | | | | | | | | | This adds channels support for dma controllers that have multiple channels which can transfer data to/from different devices (enet, usb...). DMA channle API: dma_get_by_index() dma_get_by_name() dma_request() dma_free() dma_enable() dma_disable() dma_prepare_rcv_buf() dma_receive() dma_send() Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> [grygorii.strashko@ti.com: drop unused dma_get_by_index_platdata(), add metadata to send/receive ops, add dma_prepare_rcv_buf(), minor clean up] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dma: move dma_ops to dma-uclass.hÁlvaro Fernández Rojas2018-12-074-24/+41
| | | | | | | | | | | Move dma_ops to a separate header file, following other uclass implementations. While doing so, this patch also improves dma_ops documentation. Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
* configs: am335x_hs_evm_uart: Add YMODEM SPL support for UART bootAndrew F. Davis2018-12-071-1/+0
| | | | | | | | UART booting requires YMODEM support. Add this here. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: at91: lds: add test for SPL binary size and bss sizeEugen.Hristev@microchip.com2018-12-071-0/+10
| | | | | | | | | | Add test for the SPL binary size and the bss section size. This will throw an error at build time if the SPL sections do not fit in the designated RAM area, thus avoiding oversizing the SPL. Based on original work by Wenyou Yang. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* pinctrl: stm32: make pinctrl use hwspinlockBenjamin Gaignard2018-12-062-4/+27
| | | | | | | | | | | | Protect configuration registers with a hardware spinlock. If a hwspinlock is defined in the device-tree node used it to be sure that none of the others processors on the SoC could change the configuration at the same time. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* hwspinlock: add stm32 hardware spinlock supportBenjamin Gaignard2018-12-066-0/+116
| | | | | | | | Implement hardware spinlock support for STM32MP1. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* clk: stm32: add hardware spinlock clockBenjamin Gaignard2018-12-061-0/+3
| | | | | | | | Add hardware spinlock in the list of the clocks. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* dm: Add Hardware Spinlock classBenjamin Gaignard2018-12-0613-0/+414
| | | | | | | | | | This is uclass for Hardware Spinlocks. It implements two mandatory operations: lock and unlock and one optional relax operation. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* board: ti: ks2_evm: Over ride spl_get_load_buffer functionKeerthy2018-12-061-0/+5
| | | | | | | | | | | | | | | | Currently k2 spi boot is broken as the image header is getting copied to an invalid memory location CONFIG_SYS_TEXT_BASE - sizeof (struct image_size) which maps to 0xc000000 - 0x40 = 0xbffffc0 being a reserved location. We cannot change the CONFIG_SYS_TEXT_BASE address as the single stage boots like UART boot will need the address to be 0xc000000 hence override the spl_get_load_buffer to have image_header address as CONFIG_SYS_TEXT_BASE aka 0xc000000 Signed-off-by: Keerthy <j-keerthy@ti.com>
* clk: Allow clock defaults to be set during re-reloc state for SPL onlyPhilipp Tomsich2018-12-061-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | In commit e5e06b65ad65 ("clk: Allow clock defaults to be set also during re-reloc state") the earlier guard against setting clock defaults in pre-reloc state was removed. While it is easy to filter 'assigned-clocks' properties for SPL using CONFIG_OF_SPL_REMOVE_PROPS, no such mechanism exists for the pre-reloc stage of the full U-Boot. With the default defconfig for the RK3399-Q7 (which filter the 'assigned-clocks' property for the DTS used by SPL anyway), this caused a pause during startup of the full U-Boot stage that lasted for almost 10s (due to the CPU not having been clocked up yet). This reintroduces the guard from commit f4fcba5c5baa ("clk: Allow clock defaults to be set also during re-reloc state") and extends it to only apply outside of a TPL/SPL build: i.e. clk_set_defaults will now run in pre-reloc state for SPL, but only after reloc for the full U-Boot. References: commit f4fcba5c5baa ("clk: implement clk_set_defaults()") References: commit e5e06b65ad65 ("clk: Allow clock defaults to be set also during re-reloc state") Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* fs: fix FAT name extractionPatrick Wildt2018-12-061-0/+3
| | | | | | | | The long name apparently can be accumulated using multiple 13-byte slots. Unfortunately we never checked how many we can actually fit in the buffer we are reading to. Signed-off-by: Patrick Wildt <patrick@blueri.se>
* fs: check FAT cluster sizePatrick Wildt2018-12-061-0/+11
| | | | | | | | | | | | | | The cluster size specifies how many sectors make up a cluster. A cluster size of zero makes no sense, as it would mean that the cluster is made up of no sectors. This will later lead into a division by zero in sect_to_clust(), so better take care of that early. The MAX_CLUSTSIZE define can reduced using a define to make some room in low-memory system. Unfortunately if the code reads a filesystem with a bigger cluster size it will overflow the buffer. Signed-off-by: Patrick Wildt <patrick@blueri.se>
* configs: stm32f746-disco: Fix stm32f746-disco bootPatrice Chotard2018-12-061-1/+1
| | | | | | | | | | Since commit 8f651ca60ba1 ("pinctrl: stm32: Add get_pins_count() ops") stm32f746-disco can't boot. This is due to new memory allocation into STM32 pinctrl driver, increase SYS_MALLOC_F_LEN from 0xC00 to 0xE00. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* main: Drop more #ifdefsSimon Glass2018-12-061-12/+10
| | | | | | Now that many things are converted to Kconfig we can drop most of the Signed-off-by: Simon Glass <sjg@chromium.org>
* w1: fix occasional enumeration failureMartin Fuzzey2018-12-061-4/+0
| | | | | | | | | | | | | | Sometimes enumeration fails (about 1 in 50 times on my custom board). The underlying reason is probably electrical but Linux does not have the problem. Comparing the Linux / u-boot implementations shows that Linux retries the error case whereas u-boot aborts early. Removing the early abort in u-boot fixes the problem. Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
* rockchip: rk3399: Add MAINTAINERS entryTom Rini2018-12-061-0/+5
| | | | | | | Add an entry for the Ficus EE board to the existing rock960 MAINTAINERS file. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'for-master-20181206' of git://git.denx.de/u-boot-rockchipTom Rini2018-12-0616-7/+2627
|\ | | | | | | | | | | - Changes the declaration of regs_phy in dwc2-otg to uintptr_t to ensure it can be cast to void* for use with writel(). - Add the Rock960 and Ficus boards.
| * rockchip: rk3399: Add Ficus EE board supportManivannan Sadhasivam2018-12-063-0/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add board support for Ficus EE board from Vamrs. This board utilizes common Rock960 family support. Following peripherals are tested and known to work: * Gigabit Ethernet * USB 2.0 * MMC Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> [Reworked based on common Rock960 family support] Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: rk3399: Add Rock960 CE board supportManivannan Sadhasivam2018-12-064-0/+1651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add board support for Rock960 CE board from Vamrs. This board utilizes common Rock960 family support. Following peripherals are tested and known to work: * USB 2.0 * MMC This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which is being used on the board. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: rk3399: Add common Rock960 family from VamrsManivannan Sadhasivam2018-12-068-0/+776
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs. It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition) 96Boards. Below are some of the key differences between both Rock960 and Ficus boards: 1. Different host enable GPIO for USB 2. Different power and reset GPIO for PCI-E 3. No Ethernet port on Rock960 The common board support will be utilized by both boards. The device tree has been organized in such a way that only the properties which differ between both boards are placed in the board specific dts and the reset of the nodes are placed in common dtsi file. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> [Added instructions for SD card boot] Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Peter Robinson <pbrobinson@gmail.com>
| * arm: dts: rockchip: add some common pin-settings to rk3399Randy Li2018-12-061-6/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Those pins would be used by many boards. Commit grabbed from Linux: commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f Author: Randy Li <ayaka@soulik.info> Date: Thu Jun 21 21:32:10 2018 +0800 arm64: dts: rockchip: add some common pin-settings to rk3399 Those pins would be used by many boards. Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * usb: dwc2-otg: make regs_phy (in platdata) a uintptr_tPhilipp Tomsich2018-12-061-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | The regs_phy field of the platform data structure for dwc2-otg is today declared an unsigned int, but will eventually be cast into a void* for a writel operation. This triggers errors on modern GCC versions. E.g. we get the following error with GCC 6.3: drivers/usb/phy/rockchip_usb2_phy.c: In function 'property_enable': arch/arm/include/asm/io.h:49:29: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v)) ^ arch/arm/include/asm/io.h:117:48: note: in expansion of macro '__arch_putl' #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; }) ^~~~~~~~~~~ drivers/usb/phy/rockchip_usb2_phy.c:61:2: note: in expansion of macro 'writel' writel(val, pdata->regs_phy + reg->offset); ^~~~~~ This commit changes regs_phy to be a uintptr_t to ensure that it is large enough to hold any valid pointer (and fix the associated warning). Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge tag 'dm-pull-5dec18' of git://git.denx.de/u-boot-dmTom Rini2018-12-0543-79/+935
|\ | | | | | | | | | | | | Minor sandbox enhancements / fixes tpm improvements to clear up v1/v2 support buildman toolchain fixes New serial options to set/get config
| * x86: acpi: Generate SPCR tableAndy Shevchenko2018-12-052-0/+120
| | | | | | | | | | | | | | | | | | | | Microsoft specifies a SPCR (Serial Port Console Redirection Table) [1]. Let's provide it in U-Boot. [1]: https://docs.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * x86: acpi: Add SPCR table descriptionAndy Shevchenko2018-12-051-0/+49
| | | | | | | | | | | | | | | | | | | | Add SPCR table description as it provided in Linux kernel. Port subtype for ACPI_DBG2_SERIAL_PORT is used as an interface type in SPCR. Thus, provide a set of definitions to be utilized later. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * serial: ns16550: Provide ->getinfo() implementationAndy Shevchenko2018-12-051-1/+21
| | | | | | | | | | | | | | | | New callback will supply necessary information, for example, to ACPI SPCR table. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * serial: ns16550: Read reg-io-width from device treeAndy Shevchenko2018-12-052-0/+3
| | | | | | | | | | | | | | Cache the value of the reg-io-width property for the future use. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * serial: ns16550: Group reg_* members of ns16550_platdataAndy Shevchenko2018-12-051-1/+1
| | | | | | | | | | | | | | | | | | Group reg_* members of struct ns16550_platdata together for better maintenance. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Introduce ->getinfo() callbackAndy Shevchenko2018-12-055-0/+90
| | | | | | | | | | | | | | | | | | | | New callback will give a necessary information to fill up ACPI SPCR table, for example. Maybe used later for other purposes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Change ADR_SPACE_SYSTEM_IO to SERIAL_ADDRESS_SPACE_IO to fix build error: Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: serial: Add ->getconfig() callbackAndy Shevchenko2018-12-055-3/+60
| | | | | | | | | | | | | | | | | | In some cases it would be good to know the settings, such as parity, of current serial console. One example might be an ACPI SPCR table to generate using these parameters. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * power: regulator: denied disable on always-on regulatorPatrick Delaunay2018-12-051-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't disable regulator which are tagged as "regulator-always-on" in DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jack Mitchell <jack@embed.me.uk> Tested-by: Jack Mitchell <jack@embed.me.uk> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Richard Röjfors <richard@puffinpack.se> Tested-by: Richard Röjfors <richard@puffinpack.se> Reviewed-by: Felix Brack <fb@ltec.ch> Tested-by: Felix Brack <fb@ltec.ch>
| * dm: core: add functions to get/remap I/O addresses by nameÁlvaro Fernández Rojas2018-12-056-2/+160
| | | | | | | | | | | | | | | | | | | | This functions allow us to get and remap I/O addresses by name, which is useful when there are multiple reg addresses indexed by reg-names property. This is needed in bmips dma/eth patch series, but can also be used on many other drivers. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * binman: Add myself as maintainerSimon Glass2018-12-051-0/+5
| | | | | | | | | | | | Add an entry for my maintainership of this tool. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: (re)sort uclass ids alphabeticallyPhilipp Tomsich2018-12-051-4/+4
| | | | | | | | | | | | | | | | | | The comment in uclass-id.h states that "U-Boot uclasses start here - in alphabetical order" but the subsequent list is not sorted alphabetically. This reestablishes order. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * dm: rtc: Fix function name in commentPhilipp Tomsich2018-12-051-1/+1
| | | | | | | | | | | | | | The documentation comment for dm_rtc_set was referring to dm_rtc_put instead. Fix it. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * buildman/toolchain.py: handle inconsistent tarball namesTrevor Woerner2018-12-051-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, for some releases the kernel.org toolchain tarball names adhere to the following pattern: <hostarch>-gcc-<ver>-nolib-<targetarch>-<type>.tar.xz e.g.: x86_64-gcc-8.1.0-nolibc-aarch64-linux.tar.xz while others use the following pattern: <hostarch>-gcc-<ver>-nolib_<targetarch>-<type>.tar.xz e.g.: x86_64-gcc-7.3.0-nolibc_aarch64-linux.tar.xz Notice that the first pattern has dashes throughout, while the second has dashes throughout except just before the target architecture which has an underscore. The "dash throughout" versions from kernel.org are: 8.1.0, 6.4.0, 5.5.0, 4.9.4, 4.8.5, 4.6.1 while the "dash and underscore" versions from kernel.org are: 7.3.0, 4.9.0, 4.8.0, 4.7.3, 4.6.3, 4.6.2, 4.5.1, 4.2.4 This tweak allows the code to handle both versions. Note that this tweak also causes the architecture parsing to get confused and find the following two bogus architectures, "2.0" and "64", which are explicitly checked for, and removed. Signed-off-by: Trevor Woerner <trevor@toganlabs.com> Reviewed-by: Simon Glass <sjg@chromium.org> Change single quotes to double quotes: Signed-off-by: Simon Glass <sjg@chromium.org>
| * buildman/toolchain.py: fix toolchain directoryTrevor Woerner2018-12-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hexagon toolchain (4.6.1) from kernel.org, for example, was packaged in a way that is different from most toolchains. The first entry when unpacking most toolchain tarballs is: gcc-<version>-nolib/<targetarch>-<system> e.g.: gcc-8.1.0-nolibc/aarch64-linux/ The first entry of the hexagon toolchain, however, is: gcc-4.6.1-nolibc/ This causes the buildman logic in toolchain.py::ScanPath() to not be able to find the "*gcc" executable since it looks in gcc-4.6.1-nolib/{.|bin|usr/bin} instead of gcc-4.6.1/hexagon-linux/{.|bin|usr/bin}. Therefore when buildman tries to download a set of toolchains that includes hexagon, the script fails. This update takes the second line of the tarball unpacking (which works for all the toolchains I've tested from kernel.org) and parses it to take the first two elements, separated by '/'. It makes this logic a bit more robust. Signed-off-by: Trevor Woerner <trevor@toganlabs.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * Add inttypes.hSimon Glass2018-12-051-0/+271
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even if U-Boot does not use this, some libraries do. Add back this header file so that the build does not fall back to using the host version, which may include stdint.h and break the build due to conflicts with uint64_t, etc. This partially reverts commit dee37fc99d94 ("Remove <inttypes.h> includes and PRI* usages in printf() entirely") The only change from the file that was in U-Boot until recently is that it now comes twice as close to passing checkpatch. The remaining warnings pertain to the typedefs, which checkpatch does not like. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Add UINT32_MAX and UINT64_MAXSimon Glass2018-12-051-0/+4
| | | | | | | | | | | | | | | | These constants are defined by stdint.h but not by kernel.h, which is its stand-in in U-Boot. Add the definitions so that libraries which expect stdint.h constants can work. Signed-off-by: Simon Glass <sjg@chromium.org>
| * time: Update mdelay() to delay in one large chunkSimon Glass2018-12-051-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current function delays in one millisecond at a time. This does not work well on sandbox since it results in lots of calls to usleep(1000) in a tight loop. This makes the sleep duration quite variable since each call results in a sleep of *at least* 1000us, but possibly more. Depending on how busy the machine is, the sleep time can change quite a bit. We cannot fix this in general, but we can reduce the effect by doing a single sleep. The multiplication works fine with an unsigned long argument up until a sleep time of about 4m milliseconds. This is over an hour and we can be sure that delays of that length are not useful. Update the mdelay() function to call udelay() only once with the calculated delay value. Signed-off-by: Simon Glass <sjg@chromium.org>
| * video: backlight: Fix log message in enable_sequence()Simon Glass2018-12-051-1/+1
| | | | | | | | | | | | | | This has an extra argument. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de>
| * input: i8042: Use remove() instead of exported functionsSimon Glass2018-12-052-30/+20
| | | | | | | | | | | | | | | | | | | | | | We should not have exported functions in a driver. The i8042_disable() function is used to disable the keyboard. Provide a remove() method instead, which is the standard way of disabling a device. We could potentially add a method to flush input but that does not seem necessary. Signed-off-by: Simon Glass <sjg@chromium.org>
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