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* net: add a generic udp protocolPhilippe Reynes2020-09-307-2/+142
| | | | | | | | | | This commit adds a generic udp protocol framework in the network loop. So protocol based on udp may be implemented without modifying the network loop (for example custom wait magic packet). Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: dwc_eth_qos: Convert to use APIs which support live DTPatrick Delaunay2020-09-301-4/+3
| | | | | | | Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* phy: add support for stingray PAXB PHY controllerSrinath Mannam2020-09-303-0/+185
| | | | | | | | | Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
* net: use log_err() for 'No ethernet found' messageHeinrich Schuchardt2020-09-302-5/+5
| | | | | | | | | | | | | | Write the 'No ethernet found' message via the log drivers. This allows suppressing it during output via the syslog driver. This fixes the problem reported in: [PATCH 0/4] log: Fix the syslog spam when running tests https://lists.denx.de/pipermail/u-boot/2020-September/426343.html Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: tftp: Fix load_block offset calculationLey Foon Tan2020-09-301-1/+2
| | | | | | | | | | | | | When load the last block, the "len" might not be a block size. This cause loading the incorrect last block data. The fix change "len" to tftp_block_size and minus one tftp_block_size for offset calculation. Use same offset calculation formula as in store_block(). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
* net: tftp: Fix store_block offset calculationLey Foon Tan2020-09-301-2/+3
| | | | | | | | | | | | | tftp_cur_block start with 1 for first block, but tftp_cur_block counter is start with zero when block number is rollover. The existing code "tftp_cur_block - 1" will cause the block number become -1 in store_block() when tftp_cur_block is 0 when tftp_cur_block is rollover. The fix pass in tftp_cur_block to store_block() and minus the tftp_block_size when do the offset calculation. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
* net: tftp: Fix tftp_prev_block counter updateLey Foon Tan2020-09-301-0/+1
| | | | | | | | | | | | | Fixes missing update to tftp_prev_block counter before increase tftp_cur_block counter when do the tftpput operation. tftp_prev_block counter is used in update_block_number() function to check whether block number (sequence number) is rollover. This bug cause the tftpput command fail to upload a large file when block number is greater than 16-bit (0xFFFF). Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
* net: smc911x: Automatically Update ethaddr with MACAdam Ford2020-09-301-0/+3
| | | | | | | | | | | The ethernet controller can read the MAC from EEPROM and display it, but if ethaddr is not set, the ethernet is still unavailable. This patch checks will automatically set the MAC address if it has not already been set. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: ftgmac100: Add support for board specific PHY interface addressThirupathaiah Annapureddy2020-09-301-0/+4
| | | | | | | | | | ftgmac100 driver is using hard-coded PHY interface address of zero. Each board can have different PHY interface address (phy_addr). This commit modifies the driver to make use of board specific address by leveraging CONFIG_PHY_ADDR. Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
* net: phy: mscc: sync rx/tx delay settings with Linux on vsc85xxHeiko Stuebner2020-09-301-24/+46
| | | | | | | | | | | | | | | | | | | The Linux kernel does set the clock delays to - 0.2 ns (their default, and lowest, hardware value) if delays should not be enabled - 2.0 ns (which causes the data to be sampled at exactly half way between clock transitions at 1000 Mbps) if delays should be enabled depending on the interface mode See https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/mscc/mscc_main.c#n523 So instead of using arbitrary delay values like now, mimic this behaviour. The behaviour is the same for all of vsc8530/8531/8540/8541 so move that to a shared function while at it. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* net: phy: mscc: make clock-output configurable on vsc85xxHeiko Stuebner2020-09-301-0/+59
| | | | | | | | | | | | The vsc8530/8531/8540/8541 phys have a configurable clock output that can emit 25, 50 and 125 MHz rates, which in turn may be needed for stable network connections. This follows a similar change introduced into the Linux kernel at https://lore.kernel.org/netdev/20200609133140.1421109-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
* Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv ↵Tom Rini2020-09-3033-211/+357
|\ | | | | | | | | | | | | | | | | | | into next - Disable CMD_IRQ for RISC-V. - Update sipeed/maix doc - Obtain reg of SiFive RAM via dev_read_addr_index() instead of regmap API. - Cleans up RISC-V timer drivers and converts them to DM. - Correctly handle IPIs already pending upon prior stage bootloader (on the K210)
| * riscv: Add some comments to start.SSean Anderson2020-09-301-2/+17
| | | | | | | | | | | | | | | | | | | | This adds comments regarding the ordering and purpose of certain instructions as I understand them. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
| * riscv: Ensure gp is NULL or points to valid dataSean Anderson2020-09-302-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ensures constructs like `if (gd & gd->...) { ... }` work when accessing the global data pointer. Without this change, it was possible for a very early trap to cause _exit_trap to directly or indirectly (through printf) to read arbitrary memory. This could cause a second trap, preventing show_regs from being printed. printf (and specifically puts) uses gd to determine what function to print with. These functions in turn use gd to find the serial device, etc. However, before accessing gd, puts first checks to see if it is non-NULL. This indicates an existing (perhaps undocumented) assumption that either gd is NULL or it is completely valid. Before this patch, gd either points to unexpected data (because it retains the value it did from the prior-stage) or points to uninitialized data (because it has not yet been initialized by board_init_f_init_reserve) until the hart has acquired available_harts_lock. This can cause two problems, depending on the value of gd->flags. If GD_FLG_SERIAL_READY is unset, then some garbage data will be printed to stdout, but there will not be a second trap. However, if GD_FLG_SERIAL_READY is set, then puts will try to print with serial_puts, which will likely cause a second trap. After this patch, gd is zero up until either a hart has set it in wait_for_gd_init, or until it is set by arch_init_gd. This prevents its usage before its data is initialized because both handle_trap and puts ensure that gd is nonzero before using it. After gd has been set, it is OK to access it because its data has been cleared (and so flags is valid). XIP cannot use locks because flash is not writable. This leaves it vulnerable to the same class of bugs regarding already-pending IPIs as before this series. Fixing that would require finding another method of synchronization, which is outside the scope of this series. Fixes: 7c6ca03eae ("riscv: additional crash information") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: Consolidate fences into AMOs for available_harts_lockSean Anderson2020-09-301-6/+3
| | | | | | | | | | | | | | | | | | We can reduce the number of instructions needed to use available_harts_lock by using the aq and rl suffixes for AMOs. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: Clear pending IPIs on initializationSean Anderson2020-09-301-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though we no longer call smp_function if an IPI was not sent by U-Boot, we still need to clear any IPIs which were pending from the execution environment. Otherwise, secondary harts will busy-wait in secondary_hart_loop, instead of relaxing. Along with the previous commit ("riscv: Use a valid bit to ignore already-pending IPIs"), this fixes SMP booting on the Kendryte K210. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: Use a valid bit to ignore already-pending IPIsSean Anderson2020-09-302-2/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some IPIs may already be pending when U-Boot is started. This could be a problem if a secondary hart tries to handle an IPI before the boot hart has initialized the IPI device. To be specific, the Kendryte K210 ROM-based bootloader does not clear IPIs before passing control to U-Boot. Without this patch, the secondary hart jumps to address 0x0 as soon as it enters secondary_hart_loop, and then hangs in its trap handler. This commit introduces a valid bit so secondary harts know when and IPI originates from U-Boot, and it is safe to use the IPI API. The valid bit is initialized to 0 by board_init_f_init_reserve. Before this, secondary harts wait in wait_for_gd_init. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
| * riscv: Match memory barriers between send_ipi_many and handle_ipiSean Anderson2020-09-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Without a matching barrier on the write side, the barrier in handle_ipi does nothing. It was entirely possible for the boot hart to write to addr, arg0, and arg1 *after* sending the IPI, because there was no barrier on the sending side. Fixes: 90ae281437 ("riscv: add option to wait for ack from secondary harts in smp functions") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Liang <ycliang@andestech.com>
| * Revert "riscv: Clear pending interrupts before enabling IPIs"Sean Anderson2020-09-301-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clearing MIP.MSIP is not guaranteed to do anything by the spec. In addition, most existing RISC-V hardware does nothing when this bit is set. The following commits "riscv: Use a valid bit to ignore already-pending IPIs" and "riscv: Clear pending IPIs on initialization" should implement the original intent of the reverted commit in a more robust manner. This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: Update SiFive device tree for new CLINT driverSean Anderson2020-09-302-2/+10
| | | | | | | | | | | | | | | | | | We currently do this in a u-boot specific dts, but hopefully we can get these bindings added in Linux in the future. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
| * riscv: Update Kendryte device tree for new CLINT driverSean Anderson2020-09-301-3/+4
| | | | | | | | | | | | | | | | | | The interrupt controller property is removed from the clint binding because the clint is not an interrupt-controller. That is, no other devices have an interrupt which is controlled by the clint. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
| * riscv: clk: Add CLINT clock to kendryte clock driverSean Anderson2020-09-302-0/+5
| | | | | | | | | | | | | | | | Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson <seanga2@gmail.com>
| * riscv: Rework Sifive CLINT as UCLASS_TIMER driverSean Anderson2020-09-302-32/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the clint driver from the riscv-specific interface to be a DM-based UCLASS_TIMER driver. In addition, the SiFive DDR driver previously implicitly depended on the CLINT to select REGMAP. Unlike Andes's PLMT/PLIC (which AFAIK never have anything pass it a dtb), the SiFive CLINT is part of the device tree passed in by qemu. This device tree doesn't have a clocks or clock-frequency property on clint, so we need to fall back on the timebase-frequency property. Perhaps in the future we can get a clock-frequency property added to the qemu dtb. Unlike with the Andes PLMT, the Sifive CLINT is also an IPI controller. RISCV_SYSCON_CLINT is retained for this purpose. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com>
| * riscv: Clean up initialization in Andes PLICSean Anderson2020-09-301-33/+25
| | | | | | | | | | | | | | This merges the PLIC initialization code from two functions into one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
| * riscv: Rework Andes PLMT as a UCLASS_TIMER driverSean Anderson2020-09-304-32/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the PLMT driver from the riscv-specific timer interface to be a DM-based UCLASS_TIMER driver. The clock-frequency/clocks properties are preferred over timebase-frequency for two reasons. First, properties which affect a device should be located near its binding in the device tree. Using timebase-frequency only really makes sense when the cpu itself is the timer device. This is the case when we read the time from a CSR, but not when there is a separate device. Second, it lets the device use the clock subsystem which adds flexibility. If the device is configured for a different clock speed, the timer can adjust itself. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * timer: Add a test for timer_timebase_fallbackSean Anderson2020-09-305-10/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | To test this function, sandbox CPU must set cpu_platdata.timebase_freq on bind. It also needs to expose a method to set the current cpu. I also make some most members of cpu_sandbox_ops static. On the timer side, the device tree property sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * timer: Add helper for drivers using timebase fallbackSean Anderson2020-09-302-0/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | This function is designed to be used when a timer used to be initialized by the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In such a case, the timer may prefer to use the clocks and clock-frequency properties, but should be able to fall back on using the cpu's timebase-frequency. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * riscv: Rework riscv timer driver to only support S-modeSean Anderson2020-09-308-71/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The riscv-timer driver currently serves as a shim for several riscv timer drivers. This is not too desirable because it bypasses the usual timer selection via the driver model. There is no easy way to specify an alternate timing driver, or have the tick rate depend on the cpu's configured frequency. The timer drivers also do not have device structs, and so have to rely on storing parameters in gd_t. Lastly, there is no initialization call, so driver init is done in the same function which reads the time. This can result in confusing error messages. To a user, it looks like the driver failed when trying to read the time, whereas it may have failed while initializing. This patch removes the shim functionality from the riscv-timer driver, and has it instead implement the former rdtime.c timer driver. This is because existing u-boot users who pass in a device tree (e.g. qemu) do not create a timer device for S-mode u-boot. The existing behavior of creating the riscv-timer device in the riscv cpu driver must be kept. The actual reading of the CSRs has been redone in the style of Linux's get_cycles64. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
| * ram: sifive: Remove regmap dependencyBin Meng2020-09-301-9/+3
| | | | | | | | | | | | | | The usage of regmap API in the SiFive RAM driver is not correct. The reg address should be obtained via dev_read_addr_index() API. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * ram: sifive: Check return value on clk_enable()Bin Meng2020-09-301-0/+5
| | | | | | | | | | | | | | The return value should be checked otherwise it's useless to assign the return value to 'ret'. Signed-off-by: Bin Meng <bin.meng@windriver.com>
| * doc/sipeed/maix: describe RESET and BOOT buttonHeinrich Schuchardt2020-09-301-2/+6
| | | | | | | | | | | | | | In the boot flow description add the RESET and BOOT button as well as the function of the DTR and RTS lines of the serial interface. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * doc: correct kflash settings for Maix One DockHeinrich Schuchardt2020-09-301-1/+1
| | | | | | | | | | | | | | | | | | | | The correct kflash parameter value for the Maix One Dock is "dan". See: https://github.com/sipeed/platform-kendryte210/blob/master/boards/sipeed-maix-one-dock.json#L22 Fixes: 137dc153fda9 ("doc: riscv: Update documentation for Sipeed MAIX boards") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * cmd: irq: disable CMD_IRQ for riscv archPragnesh Patel2020-09-301-1/+1
| | | | | | | | | | | | | | | | | | For RISC-V arch, no need for CMD_IRQ so disable the same. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
* | Merge branch '2020-09-29-dev_xxx-print-improvement' into nextTom Rini2020-09-3048-407/+486
|\ \ | |/ |/| | | | | - Improve our dev_xxx(..) wrappers to be generally used and available rather than discarded at link/compile time.
| * dm: Print device name in dev_xxx like LinuxSean Anderson2020-09-301-28/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adorns messages generated by dev_xxx with the device and driver names. It also redirects dev_xxx to log when it is available. The names of these functions very roughly take inspiration from Linux, but there is no deeper correlation. Both struct udevice and struct device are supported when logging, though logging with struct device is no better than using log_xxx. The latter is supported because of the large amount of existing code which logs with struct device. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * dm: Use symbolic constants for log levels in dev_xxxSean Anderson2020-09-301-10/+11
| | | | | | | | | | | | | | | | This substitutes literal log levels with their symbolic constants. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * video: stm32: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-10/+14
| | | | | | | | | | | | | | | | | | There is no member `dev` in dw_mipi_dsi, but there is one in mipi_dsi_host, so use that. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: musb-new: sunxi: Fix not calling dev_err with a deviceSean Anderson2020-09-301-4/+5
| | | | | | | | | | | | | | | | This driver does not use DM, so we need to use a struct device instead of a struct udevice. Not ideal, but it'll have to do for now. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: dwc3: Don't include asm-generic/io.hSean Anderson2020-09-301-1/+0
| | | | | | | | | | | | | | | | This can conflict with asm/io.h on some archs, and it isn't needed to build dwc3-generic.c Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: dwc3: ti: Fix not calling dev_err with a deviceSean Anderson2020-09-301-2/+2
| | | | | | | | | | | | | | This driver does not use DM, so use log_xxx instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: dwc3: Fix not calling dev_xxx with a deviceSean Anderson2020-09-303-18/+21
| | | | | | | | | | | | | | | | This logs with the device from struct dwc3. Some files also need to include dm.h so fields in udevice can be accessed. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: dwc2: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-16/+23
| | | | | | | | | | | | | | | | | | | | | | This adds a dev argument to some functions so dev_xxx always has a device to log with. In one instance we must use use a different log function when we are compiled without DM_USB. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * usb: cdns3: Fix not calling dev_xxx with a deviceSean Anderson2020-09-302-4/+4
| | | | | | | | | | | | | | ep0.c also need to include dm.h so dev_xxx can access udevice fields. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * sysreset: ti: Fix not calling dev_err with a deviceSean Anderson2020-09-301-2/+1
| | | | | | | | | | | | | | The rst variable doesn't exist. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * spi: zynqmp_gqspi: Fix not calling dev_err with a deviceSean Anderson2020-09-301-3/+3
| | | | | | | | | | | | | | | | Use `bus` instead of `dev`. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * spi: sunxi: Fix not calling dev_err with a deviceSean Anderson2020-09-301-3/+3
| | | | | | | | | | | | | | Use `bus` and not `dev`. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * soc: qualcomm: Fix not calling dev_err with a deviceSean Anderson2020-09-301-1/+1
| | | | | | | | | | | | | | | | Remove the indirection. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * remoteproc: k3: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-4/+5
| | | | | | | | | | | | | | Pass a device to functions which log with one. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * remoteproc: k3-r5: Fix not calling dev_xxx with a deviceSean Anderson2020-09-301-10/+14
| | | | | | | | | | | | | | | | Usually we can get a device from the current core, but some dev_dbg calls have been converted to debug, since we are called on a cluster. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
| * remoteproc: Remove unused function rproc_elf_sanity_checkSean Anderson2020-09-302-29/+0
| | | | | | | | | | | | | | | | This function is never used anywhere, and it also tries to log with a nonexistant device. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>