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* Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-04-1020-105/+129
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| * arm: socfpga: Drop space after 'loadaddr=' in extra envMarek Vasut2016-04-106-6/+6
| | | | | | | | | | | | | | | | | | There is an incorrect space after loadaddr= in the extra environment, so drop it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * arm: socfpga: Nuke useless includeMarek Vasut2016-04-103-14/+0
| | | | | | | | | | | | | | | | | | | | The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * arm: socfpga: migration of CONFIG_SPI_FLASH_BARDenis Bakhvalov2016-04-108-2/+7
| | | | | | | | | | | | | | | | | | | | CONFIG_SPI_FLASH_BAR was deleted from socfpga_common.h and placed in socfpga_*_defconfig because it is Kconfig symbol. Signed-off-by: Denis Bakhvalov <dendibakh@gmail.com> Reported-by: Denis Bakhvalov <dendibakh@gmail.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: sockit: Use more relaxed DRAM timingsMarek Vasut2016-04-103-80/+80
| | | | | | | | | | | | | | | | | | | | | | The currently present DRAM timings generated from GHRD 14.0 did not work on SoCkit rev. D because they were too tight. Load the DRAM timings from GHRD 13.0 which are more relaxed and work with SoCkit rev. D. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * arm: socfpga: Handle phy-mode OF property for GMACsMarek Vasut2016-04-101-3/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thus far, the socfpga init code had hard-coded the configuration of the ethernet PHY interface to RGMII in the ethernet registers in sysmgr space, so PHYs connected in another modes did not work. This patch fixes support for configurations where the ethernet PHYs are connected over MII/GMII/RMII interfaces by parsing the phy-mode OF property of the GMACs and configuring the ethernet registers in sysmgr space accordingly. Signed-off-by: Marek Vasut <marex@denx.de> Reported-by: Denis Bakhvalov <denis.bakhvalov@nokia.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-04-1022-224/+570
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| * | dm: usb: Do not reprobe usb hosts on "usb tree" commandHans de Goede2016-04-101-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some usb hosts may have failed to probe on "usb start", i.e. an otg host without an otg-host cable plugged in. "usb tree" would cause the probe method of these hosts to get called again, something which should only happen on "usb reset". This commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | musb: Properly call musb_stop() on probe failureHans de Goede2016-04-101-1/+3
| | | | | | | | | | | | | | | | | | | | | musb_lowlevelinit(): if no device is plugged in / detected call musb_stop() to undo the preceding musb_start() call. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | musb: sunxi: Do not allocate musb struct multiple timesHans de Goede2016-04-101-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The probe function of the musb host driver can be called multiple times. The code assumes that it can save the pointer to the allocated musb struct in the driver model priv_auto_alloc data, but this data gets free-ed on a probe failure or on removal, so we must save the pointer elsewhere. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | usb: bcm_udc_otg: enable clocksSteve Rae2016-04-101-0/+4
| | | | | | | | | | | | | | | | | | Turn on the USB OTG clocks. Signed-off-by: Steve Rae <srae@broadcom.com>
| * | drivers:usb:common:fsl-dt-fixup: fix return value of fdt_usb_get_node_typeSriram Dash2016-04-101-11/+14
| | | | | | | | | | | | | | | | | | | | | Changes the return type of fdt_usb_get_node_type from char* to int Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | drivers:usb:common:fsl-dt-fixup: Add device-tree fixup support for xhci ↵Sriram Dash2016-04-103-18/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | controller Enables usb device-tree fixup code to incorporate xhci controller Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * | drivers:usb:common:fsl-dt-fixup: Remove code duplication for ↵Sriram Dash2016-04-101-43/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdt_usb_get_node_type Call fdt_usb_get_node_type() from fdt_fixup_usb_mode_phy_type() to avoid code duplication. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Acked-by: Marek Vasut <marex@denx.de>
| * | drivers:usb:common:fsl-dt-fixup: Move device-tree fixup framework to common fileSriram Dash2016-04-104-195/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move usb device-tree fixup framework from ehci-fsl.c to common place so that it can be used by other drivers as well (xhci-fsl.c). Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Acked-by: Marek Vasut <marex@denx.de>
| * | usb: kbd: Do not deregister usbkbd twice when using dmHans de Goede2016-04-102-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dm usb_kbd_remove function() will deregister the usb keyboard for us on a "usb reset" / "usb stop" so there is no need to manually call usb_kbd_deregister() in the dm case. This commit removes usb_kbd_deregister() in the dm case fixing the following "usb reset" errors: usb_kbd_remove: warning, ret=-6 device_remove: Device 'usb_kbd' failed to remove, but children are gone Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | usb: ehci-hcd: Fix crash when no ops are provided to ehci_register()Mateusz Kulikowski2016-04-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fixes crash on BananaPi (and possibly others) casued by 3f9f8a5b83f8aec40c9f4ee496046a695e333c45. Crash reason: When no ops were passed to ehci_register(), USB host driver caused NULL pointer dereference. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
| * | board: pic32mzda: enable USB-host, USB-storage support.Purna Chandra Mandal2016-04-104-0/+29
| | | | | | | | | | | | | | | | | | | | | Enable MUSB host and USB storage support for Microchip PIC32MZ[DA] Starter Kit. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | drivers: musb-new: Add USB DRC driver for Microchip PIC32 OTG controller.Purna Chandra Mandal2016-04-104-1/+297
| | | | | | | | | | | | | | | | | | | | | | | | This driver adds support of PIC32 MUSB OTG controller as dual role device. It implements platform specific glue to reuse musb core. Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | drivers: remove writes{b,w,l,q} and reads{b,w,l,q}.Purna Chandra Mandal2016-04-102-15/+0
| | | | | | | | | | | | | | | | | | | | | Definition of writes{bwlq}, reads{bwlq} are now added into arch specific asm/io.h. So removing them from driver to fix re-definition error Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | arm: add missing writes[bwql], reads[bwql].Purna Chandra Mandal2016-04-101-0/+7
| |/ | | | | | | | | | | | | ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h but not the writes[bwql], reads[bwql] needed by some drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-04-0814-29/+57
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| * powerpc: mpc85xx: Enable pre-relocation malloc for MPC85xxmario.six@gdsys.cc2016-04-083-7/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | To enable DM on MPC85xx, we need pre-relocation malloc, which is implemented in this patch. We also make sure that the IVORs are always 4-aligned on e500 to prevent alignment exceptions caused by code changes in start.S. Signed-off-by: Mario Six <mario.six@gdsys.cc> Cc: York Sun <york.sun@nxp.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * powerpc: Replace CONFIG_SYS_INIT_RAM_END with CONFIG_SYS_INIT_RAM_SIZEYork Sun2016-04-0810-21/+21
| | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file. Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mario Six <mario.six@gdsys.cc> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * powerpc: t1040qds: Use generic ethsw commandsCodrin Ciubotariu2016-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | The commands for the VSC9953 l2 switch from T1040 became generic in patch https://patchwork.ozlabs.org/patch/499748/ and the define was renamed. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-04-0643-313/+369
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| * armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-0636-248/+115
| | | | | | | | | | | | | | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * armv8: ls1043a: load Fman ucode from SD/MMC under SD bootQianyu Gong2016-04-061-1/+9
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043a: load Fman ucode from NAND flash under NAND bootQianyu Gong2016-04-061-1/+5
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043aqds: modify CONFIG_SYS_MAX_FLASH_BANKS to 1Wenbin Song2016-04-061-1/+1
| | | | | | | | | | | | | | There is only one flash bank for ls1043aqds. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls102xa: Fix order of CSU indexes in ns_access.hVincent Siles2016-04-061-3/+3
| | | | | | | | | | | | | | | | | | This patch aims to fix the order of CSU slave index for the LS1021a board. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LSCH2 early and final mmu needs matching NS attributeEd Swarthout2016-04-061-4/+8
| | | | | | | | | | | | | | | | | | | | When switching between the early and final mmu tables, the stack will get corrupted if the Non-Secure attribute is different. For ls1043a, this issue is currently masked because flush_dcache_all is called before the switch when CONFIG_SYS_DPAA_FMAN is defined. Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043aqds: make sure fixed-link property is big endianShaohui Xie2016-04-061-6/+6
| | | | | | | | | | | | | | | | | | When setting fixed-link property to DTS, the values should be converted with using cpu_to_fdt32 so that to have correct value on little endian Soc. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers: net: vsc9953: Fix bug when PVID is shown for disabled ports onlyCodrin Ciubotariu2016-04-061-1/+1
| | | | | | | | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers: net: vsc9953: Do not configure disabled portsCodrin Ciubotariu2016-04-061-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | Some SerDes protocols might not enable all l2switch ports. In this case, these ports should not be configured to perform Rx/Tx operations. This also fixes an issue when flooded frames were also switched to disabled ports and frames start to accumulate, consuming memory and eventually causing head-of-line blocking for other frames. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: esdhc: consolidate fsl_esdhc_cfg structurePeng Fan2016-04-061-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can use phys_addr_to for esdhc_base to discard the #ifdef. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: esdhc: support driver modelPeng Fan2016-04-061-40/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Driver Model for fsl esdhc driver. 1. Introduce a new structure struct fsl_esdhc_priv 2. Refactor fsl_esdhc_initialize which is originally used by board code. - Introduce fsl_esdhc_init to be common usage for DM and non-DM - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part. - The original API for board code is still there, but we use 'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it. 3. All the functions are changed to use 'struct fsl_esdhc_priv', except fsl_esdhc_initialize. 4. Since clk driver is not implemented, use mxc_get_clock to geth the clk and fill 'priv->sdhc_clk'. Has been tested on i.MX6UL 14X14 EVK board: " =>dm tree .... simple_bus [ + ] | `-- aips-bus@02100000 mmc [ + ] | |-- usdhc@02190000 mmc [ + ] | |-- usdhc@02194000 .... => mmc list FSL_SDHC: 0 (SD) FSL_SDHC: 1 (SD) " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Hector Palacios <hector.palacios@digi.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Tested-By: Eric Nelson <eric@nelint.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | kirkwood_nand: claim MPP pins on the flyChris Packham2016-04-061-0/+19
| | | | | | | | | | | | | | | | | | | | | | Claim the MPP pins for the NAND flash controller only when it's actually being used. This allows the pins to be shared with the SPI interface which already supports an equivalent on-access MPP reconfiguration. Reviewed-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Stefan Roese <sr@denx.de>
* | spi: kirkwood_spi: Add support for multiple chip-selects on MVEBUStefan Roese2016-04-062-5/+26
|/ | | | | | | | | | | | | Currently only chip-select 0 is supported by the kirkwood SPI driver. The Armada XP / 38x SoCs also use this driver and support multiple chip selects. This patch adds support for multiple CS on MVEBU. The register definitions are restructured a bit with this patch. Grouping them to the corresponding registers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jteki@openedev.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-0427-318/+1962
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| * ARM64: zynqmp: Enable EFI partition supportMichal Simek2016-04-041-0/+1
| | | | | | | | | | | | Enable EFI partition support for ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Add SGMII support for zynqMPSiva Durga Prasad Paladugu2016-04-041-2/+11
| | | | | | | | | | | | | | | | | | PCS auto negotaiation bit should be enabled along with SGMII autonegotation enabled in phy. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: phy: Add SGMII support for TI phySiva Durga Prasad Paladugu2016-04-041-1/+38
| | | | | | | | | | | | | | | | | | Add support of SGMII to TI phy dp838367 Enable the SGMII and PCS settings in phy control, CFG2 and BIST registers Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Return error incase of invalid phy addressSiva Durga Prasad Paladugu2016-04-041-3/+1
| | | | | | | | | | | | | | | | Return error from probe in case of invalid phy address. This fixes the issue of uboot crash if phy is not detected. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Add uEnv.txt supportMichal Simek2016-04-041-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | preboot macro load the uEnv.txt from mmc 0 when bootmode is mmc. uenvcmd is executed after load of uEnv.txt if it is defined in the uEnv.txt env text file. The default importbootenv macro reads the uEnv.txt from mmc. Additional to this, usb_loadbootenv is added to support loading uEnv.txt from usb dev 0. Signed-off-by: Jason Wu <jason.wu.misc@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Enable FLASH_BAR for microzed and zyboMichal Simek2016-04-042-0/+2
| | | | | | | | | | | | Enable FLASH_BAR for these targets to be in sync with all zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * block: Add support for Ceva sataMichal Simek2016-04-044-1/+119
| | | | | | | | | | | | | | Initial Ceva Sata init code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ARM64: zynqmp: Simplify MAINTAINERS file to support more boardsMichal Simek2016-04-041-4/+3
| | | | | | | | | | | | Handle all Xilinx ZynqMP boards with one fragment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Read RAM information from DTMichal Simek2016-04-043-8/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read information about memory from DT. This patch simplify life with synchronization between DT and board files. dram_init() only needs maximum RAM size below 4GB that's why please sort banks in memory node. dram_init_banksize() copies memory setup to bi_dram[]. This will avoid reading information from DT twice. Memory test start/end were changed to DDR location to let memtest still compiled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: Move HUSH enabling from board file to defconfigMichal Simek2016-04-042-1/+1
| | | | | | | | | | | | Simplify board config file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2024-11-20 03:19:36 +0000