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* ARM: kirkwood: Enforce size limit for sheevaplugChris Packham2018-06-051-0/+5
| | | | | | | | | The u-boot binary sits in flash immediately before the environment. Don't allow the binary size to grow into the environment space. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Enable thumb build to reduce build size of u-boot.kwb.Vagrant Cascadian2018-06-051-0/+1
| | | | | | | | | | | Without this, u-boot.kwb overlaps where the u-boot environment is stored, and updating the environment can break u-boot and vice versa. https://bugs.debian.org/897671 https://lists.denx.de/pipermail/u-boot/2018-May/327497.html Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Signed-off-by: Stefan Roese <sr@denx.de>
* ARM: kirkwood: SBx81LIFKW: Enable network hardwareChris Packham2018-06-053-7/+18
| | | | | | | | | | | | | | | The SBx81LIFKW boards connect to the internal chassis management network via a Marvell 88e6097 L2 switch. The chassis connections are direct serdes on ports 8 and 9 with a RGMII interface on port 10 connected to the CPU MAC. For debugging purposes ports 0 and 1 are also taken out to headers on the board. Because the debug interfaces are sometimes connected to with straight ribbon cables we need to run them at 10Mbps. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* ARM: add SBx81LIFKW boardChris Packham2018-06-059-0/+554
| | | | | | | | | | This is a series of line cards for Allied Telesis's SBx8100 chassis switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16 and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ARM: kirkwood: remove automatic I2C config if DM_I2C is enabledChris Packham2018-06-051-1/+1
| | | | | | | | | | | | The mach/config.h file would helpfully define CONFIG_SYS_I2C and CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This conflicts with the way DM_I2C works. As a transitional measure don't automatically define these if CONFIG_DM_I2C is defined. It should be possible to remove this once all kirkwood boards are migrated to DM. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: kirkwood: lsxl: Add SPI driver model supportMichael Walle2018-06-054-1/+10
| | | | | | | | | | | | | | | | | | | | | This patch shows how to enable driver model support for the LS-CHLv2 and LS-XHL boards. There are a couple of open questions: - do I need the u-boot,dm-pre-reloc tags in the device tree? - should mach/config.h define CONFIG_DM_SEQ_ALIAS? - how can we split this patch or are there any other pending patches which does the same and I didn't catch these. This patch is based on the http://git.denx.de/u-boot-marvell.git (master branch) and needs the following patches, which are still pending: https://patchwork.ozlabs.org/patch/909618/ https://patchwork.ozlabs.org/patch/909617/ https://patchwork.ozlabs.org/patch/909973/ Signed-off-by: Michael Walle <michael@walle.cc> Tested-by: Michael Walle <michael@walle.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* enable CONFIG_DISTRO_DEFAULTS for LS-CHLv2 boardMichael Walle2018-06-051-12/+3
| | | | | | | | Synchronize it with the LS-XHL board. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: switch clearfog to use device-tree i2c and gpioJon Nettleton2018-06-054-29/+8
| | | | | | | | | | | | | This switches the clearfog boards to use DM based gpio and i2c drivers. The io expanders are configured via their device-tree entries. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: add DT i2c aliases] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* arm: mvebu: enable sata support for clearfogJon Nettleton2018-06-052-0/+11
| | | | | | | | | | | The a38x sata interfaces run in ahci mode and can be accessed via the scsi command. Signed-off-by: Jon Nettleton <jon@solid-run.com> [baruch: rebase on current upstream] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* mvebu: a38x: Force receiver detected on PCIe lanesRabeeh Khoury2018-06-052-0/+3
| | | | | | | | | | | | | | Some QCA988x based modules presence is not detected by the SERDES lanes, so force this detection which will trigger the LTSSM state machine to negotiate link. An example of such a card is WLE900VX. Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Tested-by: Chris Packham <judge.packham@gmail.com> Tested-by: Mario Six <mario.six@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* Prepare v2018.07-rc1Tom Rini2018-06-041-2/+2
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* configs: Resync with savedefconfigTom Rini2018-06-04364-805/+738
| | | | | | Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
* MAINTAINERS: Take over DB410c maintainershipRamon Fried2018-06-041-1/+1
| | | | Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
* db410c: Added pre-relocation attribute to pinctrlRamon Fried2018-06-041-0/+8
| | | | | | | | u-boot,dm-pre-reloc was missing from pinctrl and it's children node. causing failure to configure pin mux before relocation. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
* scripts: mailmapper: SPDX license identifierHeinrich Schuchardt2018-06-041-1/+1
| | | | | | | | | | | If the SPDX license identifier is in the first line the shell does not recognize which interpreter shall be used to execute the script. Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html for scripts which require the '#!PATH_TO_INTERPRETER' in the first line (...) the SPDX identifier goes into the second line. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Inherit default value for bootdelay from distro_bootcmd on odroid-xu3.Vagrant Cascadian2018-06-041-1/+0
| | | | | | | | | | | | | The default value with distro_bootcmd is 2 seconds, which is reasonably fast, and provides a consistent experience across platforms supporting distro_bootcmd. The current bootdelay value of 0 seconds is a bit challenging to interrupt when desired. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Marek Vasut <marex@denx.de>
* Set time and umask on multi-dtb fit images to ensure reproducibile builds.Vagrant Cascadian2018-06-041-0/+4
| | | | | | | | | | | | | | | When building compressed (lzop, gzip) multi-dtb fit images, the compression tool may embed the time or umask in the image. Work around this by manually setting the time of the source file using SOURCE_DATE_EPOCH and a hard-coded 0600 umask. With gzip, this could be accomplished by using -n/--no-name, but lzop has no current workaround: https://bugs.debian.org/896520 Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
* xilinx: Sync symbols location in defconfigsMichal Simek2018-06-0434-70/+69
| | | | | | | CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's why this sync. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2018-06-0434-580/+1280
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| * board: sun50i: Add Amarula A64-Relic initial supportJagan Teki2018-06-044-0/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Amarula A64-Relic is A64 based IoT device, which support - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 1GB DDR3 RAM - 8GB eMMC - AP6330 Wifi/BLE - MIPI-DSI - CSI: OV5640 sensor - USB OTG - 12V DC power supply Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
| * configs: orangepi-prime: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-prime: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | orangepi-prime has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: orangepi-pc2: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-pc2: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: h5: orangepi-pc2: Order nodes in alphabeticJagan Teki2018-05-281-28/+28
| | | | | | | | | | | | | | Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: bananapi-m2-plus: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * ARM: dts: sun8i-h3: bananapi-m2-plus: Sync usb otg nodes from LinuxJagan Teki2018-05-281-0/+13
| | | | | | | | | | | | | | | | Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0 sync the same from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: a64: bananapi-m64: Sync usb host nodes from LinuxJagan Teki2018-05-281-0/+16
| | | | | | | | | | | | | | Sync bananapi-m64 usb host nodes from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * ARM: dts: sun8i: a83t: Sync usbphy node from LinuxJagan Teki2018-05-281-0/+20
| | | | | | | | | | | | | | Sync sun8i-a83t usbphy node details from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * configs: bananapi-m64: Enable USB OTG peripheral modeJagan Teki2018-05-281-0/+1
| | | | | | | | | | | | | | Enable USB_MUSB_GADGET which operate OTG in peripheral mode Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * arm64: allwinner: a64: bananapi-m64: Sync usb_otg node from LinuxJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Sync bananapi-m64 usb_otg node from Linux. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: h3: Sync OTG and HCI nodes from Linux DTJun Nie2018-05-281-0/+32
| | | | | | | | | | | | | | | | | | Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI or MUSB controller. Signed-off-by: Jun Nie <jun.nie@linaro.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: Drop legacy usb_phy.cJagan Teki2018-05-284-436/+0
| | | | | | | | | | | | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so drop existing legacy handling like arch/arm/mach-sunxi.c and related code areas. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * usb: sunxi: Switch to use generic-phyJagan Teki2018-05-285-39/+133
| | | | | | | | | | | | | | | | | | | | Allwinner USB PHY handling can be done through driver-model generic-phy so add the generic-phy ops to relevant places on host and musb sunxi driver and enable them in respective SOC's. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add a sunxi specific function for setting squelch-detectJagan Teki2018-05-285-11/+42
| | | | | | | | | | | | | | | | | | | | | | | | The sunxi otg phy has a bug where it wrongly detects a high speed squelch when reset on the root port gets de-asserted with a lo-speed device. The workaround for this is to disable squelch detect before de-asserting reset, and re-enabling it after the reset de-assert is done. Add a sunxi specific phy function to allow the sunxi-musb glue to do this. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * board: sunxi: Use generic-phy for board_usb_cable_connectedJagan Teki2018-05-281-1/+32
| | | | | | | | | | | | | | | | Allwinner PHY USB code is now part of generic-phy framework, so use it in board_usb_cable_connected. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * device-tree-bindings: phy: Sync sun4i-usb-phy bindingsJagan Teki2018-05-281-0/+65
| | | | | | | | | | | | | | | | | | | | | | | | Sync sun4i-usb-phy bindings from Linux, since the drivers/phy/allwinner/phy-sun4i-usb.c follow similar. Sync changes from Linux with below commit: "phy: sun4i-usb: add support for R40 USB PHY" (sha1: f3d96f8d23d8e6d0b7642ee946b9b2ac3418fb4d) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A23 USB PHY configJagan Teki2018-05-281-0/+9
| | | | | | | | | | | | | | Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A33 USB PHY configJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A31 PHY configJagan Teki2018-05-281-0/+10
| | | | | | | | | | | | | | Allwinner A31 has 3 USB PHY's and rest similar to A10. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A10/A13/A20 PHY configJagan Teki2018-05-281-0/+28
| | | | | | | | | | | | | | Add PHY configs for Allwinner A10/A13/A20 which are SUN4I. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add A83T USB PHY configJagan Teki2018-05-281-17/+68
| | | | | | | | | | | | | | | | | | Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has 2 USB PHY's and second one is HSIC. So phy control need to configure to handle these HSIC and SIDDQ requirement. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add V3S PHY configJagan Teki2018-05-281-0/+11
| | | | | | | | | | | | | | V3S has 1 USB PHY, rest are similar to A64. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add H3/H5 PHY configJagan Teki2018-05-281-0/+11
| | | | | | | | | | | | | | H3/H5 has 4 USB PHY, rest are similar to A64. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: sun4i-usb: Add id_detect and vbus_detect opsJagan Teki2018-05-282-0/+65
| | | | | | | | | | | | | | | | ID and VBUS detection code require when musb changing between Host and/or Peripheral modes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * phy: Add Allwinner A64 USB PHY driverJagan Teki2018-05-285-0/+422
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB PHY implementation for Allwinner SOC's can be handling in to single driver with different phy configs. This driver handle all Allwinner USB PHY's start from 4I to 50I(except 9I). Currently added A64 compatibility more will add in next coming patches. Current implementation is unable to get pinctrl, clock and reset details from DT since the dm code on these will add it future. Driver named as phy-sun4i-usb.c since the same PHY logic work for all Allwinner SOC's start from 4I to A64 except 9I with different phy configurations. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add support for H3/H5/A64Jagan Teki2018-05-281-1/+2
| | | | | | | | | | | | | | | | | | Like other Allwinner SoC, the H3/H5/A64 is missing the config register from the musb hardware block. Use a known working value for it like other SoC. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * sunxi: clock: Fix OHCI clock gating for H3/H5Chen-Yu Tsai2018-05-281-7/+4
| | | | | | | | | | | | | | | | Clock gating bits on H43/H5 were wrong, fix them. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Use BIT instead of numerical shiftJagan Teki2018-05-281-14/+14
| | | | | | | | | | | | | | Use BIT is possible areas instead of numerical shift. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
| * musb: sunxi: Add OTG device clkgate and reset for H3/H5Jagan Teki2018-05-281-0/+17
| | | | | | | | | | | | | | Add OTG device clkgate and reset for H3/H5 through driver_data. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Acked-by: Jun Nie <jun.nie@linaro.org>
generated by cgit (git 2.34.1) at 2024-11-19 06:44:09 +0000