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| * | | efi_loader: EFI_DEVICE_PATH_UTILITIES_PROTOCOL configurableHeinrich Schuchardt2021-01-203-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the EFI_DEVICE_PATH_UTILITIES_PROTOCOL to be disabled via configuration. On systems that are very tight on U-Boot image size we may want to disable the protocol. As it is required to run the UEFI Shell enable it by default. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: make EFI_DT_FIXUP_PROTOCOL configurableHeinrich Schuchardt2021-01-203-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | Allow EFI_DT_FIXUP_PROTOCOL to be disabled via configuration. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: fixup protocol, avoid forward declarationHeinrich Schuchardt2021-01-201-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid a forward declaration. Add a missing function description. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: make the UEFI boot manager configurableHeinrich Schuchardt2021-01-205-10/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards are very tight on the binary size. Booting via UEFI is possible without using the boot manager. Provide a configuration option to make the boot manager available. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | | efi_loader: move load options to new moduleHeinrich Schuchardt2021-01-193-135/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move all load options related functions to a new module. So that they can be compiled independently. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | | Merge tag 'xilinx-for-v2021.04-v2' of ↵Tom Rini2021-01-205-30/+35
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-v2 env: - Unlock redundant variable configuration for all xilinx: - Enable seps525 by default - Export bootseq via variable - Update board_fdt_blob_setup() mmc: - Xenon macro removal
| * | | | env: Remove all dependencies for SYS_REDUNDAND_ENVIRONMENTMichal Simek2021-01-201-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_REDUNDAND_ENVIRONMENT is changing in env_internal.h how u-boot works with variables. struct environment_s has one byte flags property which also affects ENV_SIZE macro. I have reached the case where CONFIG_ENV_IS_NOWHERE is default setup but custom scripts can be designed in a way that u-boot is asked to import/export variables from/to file which can be in certain format. That's why also for this configuration make sense to enable CONFIG_SYS_REDUNDAND_ENVIRONMENT because it depends on environment file format. The patch is removing dependency on this configuration to support selecting environment file format without any specific dependency where variables are stored. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | | | xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPLMichal Simek2021-01-201-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | xilinx: common: Change macro handling in board_fdt_blob_setup()Michal Simek2021-01-201-16/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | xilinx: zynqmp: Save bootseq number for SD/EMMC boot modesMichal Simek2021-01-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For systems which has both sdhci controllers enable it is worth to export bootseq number for variables. Then the variable can be used in custom scripts to tune logic for OS. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | mmc: xenon_sdhci: Remove duplicated macrosMichal Simek2021-01-201-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to define the same macros in drivers. All macros have been added by commit 17a42abb40dd ("mmc: Define timing macro's"). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | | arm64: zynqmp: Enable seps and related video configsMichal Simek2021-01-201-0/+10
|/ / / / | | | | | | | | | | | | | | | | | | | | | | | | Enable this driver to get build and probe for our platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
* | | | Revert "net: eth-uclass: Change uclass driver name to ethernet"Tom Rini2021-01-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 1231184caacad32c180d7e2338a645f7dfe9571a. While the change is fine in theory, a number of tests need to be updated to match. Signed-off-by: Tom Rini <trini@konsulko.com>
* | | | Merge branch '2021-01-19-networking-improvements'Tom Rini2021-01-1911-95/+154
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | - e1000, ftgmac100: Add support for getting the MAC - General networking improvements - dwc_eth_qos, ks8851 fixes
| * | | net: eth-uclass: Change uclass driver name to ethernetDavid Wu2021-01-191-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_read_alias_seq() used uc_drv->name compared to alias stem string, Ethernet's alias stem uses "ethernet", which does not match the eth-uclass driver name "eth", can not get the correct index of ethernet alias namer. So it seems change uclass driver name to match the alias stem is a more reasonable way. Signed-off-by: David Wu <david.wu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | net: dwc_eth_qos: Pad descriptors to cacheline sizeMarek Vasut2021-01-192-79/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DWMAC4 IP has the possibility to skip up to 7 AXI bus width size words after the descriptor. Use this to pad the descriptors to cacheline size and remove the need for noncached memory altogether. Moreover, this lets Tegra use the generic cache flush / invalidate operations. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
| * | | net: ks8851: Reset internal RXFC count on bad packetMarek Vasut2021-01-191-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A sporadic condition occurs when the "bad packet" error is triggered repeatedly, which results in "bad packet" messages scrolling on the console during transfer. To avoid triggering this, reset the internal RXFC count on the first occurance of the "bad packet", which forces the code to re-read the RX packet count from the MAC, and prevents any additional "bad packet" messages if there are no more packets in the MAC. Also print better debug information if this condition occurs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eugen Hristev <eugen.hristev@microchip.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Tom Rini <trini@konsulko.com>
| * | | net: Use NDRNG device in srand_mac()Matthias Brugger2021-01-191-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When calling srand_mac we use a weak seed dependent on the mac address. If present, use a RNG device instead to incerase entropy. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Torsten Duwe <duwe@suse.de>
| * | | lib: uuid: use RNG device if presentMatthias Brugger2021-01-191-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When calculating a random UUID we use a weak seed. Use a RNG device if present to increase entropy. Signed-off-by: Matthias Brugger <mbrugger@suse.com> Reviewed-by: Torsten Duwe <duwe@suse.de>
| * | | net: ftgmac100: Read and retain MAC addressHongwei Zhang2021-01-191-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | Read and retain MAC address across flash and QEMU support. Signed-off-by: Hongwei Zhang <hongweiz@ami.com>
| * | | net: eth_legacy - fix build CMD_PCAPJorge Ramirez-Ortiz2021-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo which would cause a build error. Fixes: 3eaac6307df ("net: introduce packet capture support") Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
| * | | net: tftp: Fix incorrect tftp_next_ack on no OACKHarm Berntsen2021-01-191-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the tftp server did not send any OACK, the tftp_next_ack variable was not set to the correct value . As the server was transmitting blocks we generated a lot of 'Received unexpected block: $n, expected $n+1' error messages. Depending on the timeout setting the transfer could still complete though. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Ramon Fried <rfried.dev@gmail.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
| * | | net: Do not respond to ICMP_ECHO_REQUEST if we do not have an IP addressDavid Rivshin2021-01-191-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While doing DHCP the interface IP is set to 0.0.0.0. This causes the check in net.c on dst_ip to be effectively skipped, and all IP datagrams are accepted up the IP stack. In the case of an ICMP_ECHO_REQUEST for the matching MAC address (regardless of destination IP), the result is that an ICMP_ECHO_REPLY is sent. The source address of the ICMP_ECHO_REPLY is 0.0.0.0, which is an illegal source address. This can happen in common practice with the following sequence: DHCP (U-Boot or OS) acquires IP address 10.0.0.1 System reboots U-Boot starts DHCP and send DHCP DISCOVER DHCP server decides to OFFER 10.0.0.1 again (perhaps because of existing lease or manual configuration) DHCP server tries to PING 10.0.0.1 to see if anyone is squatting on it DHCP server still has our MAC address in its ARP table for 10.0.0.1 U-Boot receives PING, and responds with an illegal source address This may further result in a the DHCP server seeing the response as confirmation that someone is squatting on 10.0.0.1, and picking a new IP address from the pool to try again Signed-off-by: David Rivshin <drivshin@allworx.com>
| * | | net: e1000: implement eth_write_hwaddr for DM_ETHIan Ray2021-01-191-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement programming MAC address to the hardware also for device model configuration. Fixes: b565b18a294f ("board: ge: bx50v3: Enable DM for PCI and ethernet") Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | net: eth-uclass: avoid running start() twice without stop()Matthias Schiffer2021-01-191-4/+10
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Running the start() handler twice without a stop() inbetween completely breaks communication for some ethernet drivers like fec_mxc. eth_halt() is called before each eth_init(). Due to the switch to eth_is_active() in commit 68acb51f442f ("net: Only call halt on a driver that has been init'ed"), this is not sufficient anymore when netconsole is active: eth_init_state_only()/eth_halt_state_only() manipulate the state check that is performed by eth_is_active() without actually calling into the driver. The issue can be triggered by starting a network operation (e.g. ping or tftp) while netconsole is active. Add an additional "running" flag that reflects the actual state of the driver and use it to ensure that eth_halt() actually stops the device as it is supposed to. Fixes: 68acb51f442f ("net: Only call halt on a driver that has been init'ed") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
* | | Merge branch '2021-01-18-assorted-platform-updates'Tom Rini2021-01-1986-305/+9442
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | - Assorted MediaTek, AST2x00 updates - Assorted driver fixes for various platforms - Keymile platform updates - Add pwm command, mp5416 pmic driver
| * | dts: mt7622: use accurate clock source fot mtk_timerWeijie Gao2021-01-181-7/+1
| | | | | | | | | | | | | | | | | | | | | The input system clock for mt7622 timer is 10MHz and can be retrieved through the clk driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | timer: mtk_timer: initialize the timer before useWeijie Gao2021-01-181-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer being used by this driver may have already been used by first stage bootloader (e.g. ATF/preloader), and it's settings may differ from what this driver is going to use. This may cause issues, such as inaccurate timer frequency due to incorrect clock divider. This patch adds the initialization code to avoid them. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * | pinctrl: mediatek: correct error handlingHeinrich Schuchardt2021-01-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If no GPIO controller is found, the return value should not depend on a random value on the stack. Initialize variable ret. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
| * | mtd: remove drivers/mtd/mw_eeprom.cHeinrich Schuchardt2021-01-182-239/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drivers/mtd/mw_eeprom.c contains code that never worked. mw_eeprom_write() and mw_eeprom_read() have incorrect loop conditions: while (len <= 2) { CONFIG_MW_EEPROM is not set anywhere. So let's simply drop the module. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | drivers: qe: avoid double free()Heinrich Schuchardt2021-01-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Avoid calling free(addr) twice if the device for ucode is not found. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | mmc: fsl_esdhc_spl: remove superfluous free()Heinrich Schuchardt2021-01-181-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Freeing a buffer before calling hang() is superfluous. Removing the call reduces the SPL size. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | doc: board: freescale: advise to use newer atf and firmwareAndrey Zhizhikin2021-01-184-24/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update branch and version information of ATF and DDR firmware files to point to latest releases provided by NXP. This is especially critical for imx8mp evk, as the ATF support for that SoC is only available in latest releases. Align all SoCs from imx8m family to use identical revisions of ATF and DDR firmware. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | dma: bcm6348: incorrect buffer allocationHeinrich Schuchardt2021-01-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling calloc() for 0 members does not make any sense. Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally unreasonable. The current code will lead to a NULL dereference in bcm6348_iudma_enable(). The assignments for ch_priv->busy_desc are obviously swapped. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | cmd: Add a pwm commandPragnesh Patel2021-01-187-0/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the command "pwm" for controlling the pwm channels. This command provides pwm invert/config/enable/disable functionalities via PWM uclass drivers Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | power: pmic: add driver for Monolithic Power mp5416Tim Harvey2021-01-184-0/+155
| | | | | | | | | | | | | | | | | | | | | | | | This adds basic register access and child regulator binding for the Monolithic MP5416 Power Management IC which integrates four DC/DC switching converters and five LDO regulators. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | configs: aspeed: Add defconfig for AST2600 EVBChia-Wei, Wang2021-01-182-0/+75
| | | | | | | | | | | | | | | | | | | | | Add the default configuration for the AST2600 EVB. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | aspeed: Add AST2600 platform supportChia-Wei, Wang2021-01-1814-0/+500
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add low level platform initialization for the AST2600 SoC. The 2-stage booting with U-Boot SPL are leveraged to support different booting mode. However, currently the patch supports only the booting from memory-mapped SPI flash. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | ARM: dts: aspeed: Add AST2600 SoC supportChia-Wei, Wang2021-01-184-0/+2170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 is the 7th generation of Aspeed SoC designated for Interated Remote Management Processor. AST2600 has significant performance improvement by integrating 1.2GHz dual-core ARM Cortex A7 (r0p5) CPU with FPU. Most of the controllers are also improved with more features and better performance than preceding AST24xx/AST25xx. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | reset: aspeed: Add AST2600 reset supportChia-Wei, Wang2021-01-184-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | wdt: aspeed: Add AST2600 watchdog supportChia-Wei, Wang2021-01-184-0/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 has 8 watchdog timers including 8 sets of 32-bit decrement counters, based on 1MHz clock. A 64-bit reset mask is also supported to specify which controllers should be reset by the WDT reset. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | ram: aspeed: Add AST2600 DRAM control supportDylan Hung2021-01-184-2/+1286
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600. The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb), 512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
| * | clk: aspeed: Add AST2600 clock supportRyan Chen2021-01-184-0/+1574
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the clock control driver for the AST2600 SoC. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
| * | board: presidio: Add Parallel NAND supportKate Liu2021-01-184-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set environment for Nand flash (U-boot 2020.04): - add nand flash in the device tree - add new default configuration file for G3 using parallel Nand - set nand parameters in presidio_asic.h Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC supportKate Liu2021-01-185-0/+1698
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Cortina Access parallel Nand support for CAxxxx SOCs Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> CC: Scott Wood <oss@buserror.net> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | km/arm: cleanup defconfig filesHolger Brunck2021-01-186-18/+31
| | | | | | | | | | | | | | | | | | | | | | | | Disable some unneeded config options and adapt the ident string. CC: Stefan Roese <sr@denx.de> Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | km/kirkwood: enable USB support and the host controller driverHolger Brunck2021-01-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Our kirkwood device embeds a USB host controller that is now used on some boards. This enables the support of USB and the corresponding driver. Signed-off-by: Holger Brunck <holger.brunck@hitachi-powergrids.com> CC: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
| * | mmc: Only retrieve cd pin when GPIO is enabledHarm Berntsen2021-01-181-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The driver only needs to retrieve the pin for the ACPI info. The driver itself works without depending on GPIO. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | acpi: Add missing ARM acpi_table headerHarm Berntsen2021-01-181-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pci_mmc.c driver can generate ACPI info and therefore includes asm/acpi_table.h by proxy. This file does not exist for the ARM architecture and thus code compilation failed when using this driver on ARM. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | gpio: do not include <asm/arch/gpio.h> on ARCH_QEMUHarm Berntsen2021-01-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | As no gpio.h is defined for this architecture, to avoid compilation failure, do not include <asm/arch/gpio.h> for QEMU. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com>
generated by cgit (git 2.34.1) at 2025-09-29 16:20:39 +0000