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* arm64: zynqmp: Add psu_init for zcu102-rev1.0Michal Simek2018-01-301-0/+975
| | | | | | Add low level initialization for zcu102-rev1.0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Prepare psu_init reworkMichal Simek2018-01-306-11/+109
| | | | | | | | | Move generic functions to common location psu_spl_init.c. Function declarations are added to private header. These changes are done in connection to the fact that still files from HDF can be copied over and compilation should pass. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLEDMichal Simek2018-01-302-1/+5
| | | | | | | Remove SPL_BUILD dependency from zynqmp.c and move it to header file. Use only one symbol for including psu_init. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Remove unused empty functionsMichal Simek2018-01-301-12/+0
| | | | | | Remove functions which are no longer renerated by PCW. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand: arasan: Select CONFIG_SYS_NAND_SELF_INITEzequiel Garcia2018-01-302-1/+1
| | | | | | | | | | | The Arasan NFC driver requires the self-init mode, so it should select it. Instead of having the config header define the macro, it's cleaner to select the option at the Kconfig level. Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand: arasan_nfc: Use the calculated ecc address for updating ecc registerSiva Durga Prasad Paladugu2018-01-301-2/+5
| | | | | | | | | This patch corrects the ecc address calculation before updating to ecc register. The ecc address has to be calculated based on page, oob and ecc sizes of the device. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand: arasan_nfc: Add support for ondie eccSiva Durga Prasad Paladugu2018-01-301-27/+138
| | | | | | | | | | | | This patch adds support for ondie ecc. As of now this adds support for micron parts which supports ondie ecc. Didn't found any better way to detect ondie ecc support by a device except sorting out with manufacture and device id's. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* nand: arasan_nfc: Move common ecc struct initialization init routineSiva Durga Prasad Paladugu2018-01-301-7/+7
| | | | | | | | Move common part of ecc structure initialization to arasan_nand_init() routine. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Add new target with only emmc enabledSiva Durga Prasad Paladugu2018-01-304-0/+144
| | | | | | | | | | This patch adds new target which is called as mini configuration with only emmc functionality and other required basic features enabled. This will be used to run in system with small footprint and needs emmc support. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Add new target with only nand enabledSiva Durga Prasad Paladugu2018-01-305-0/+222
| | | | | | | | | | This patch adds new target which is called as mini configuration with only nand functionality and other required basic features enabled. This will be used to run in system with small footprint and needs nand support. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Provide a config to not map DDR region in MMU tableSiva Durga Prasad Paladugu2018-01-302-4/+18
| | | | | | | | | | | | | | DDR less systems are possible for configuration like mini qspi and making DDR region as normal memory may cause speculative access which results u-boot hang if DDR is absent. So, this patch fixes the issue by not making DDR memory region entry into MMU table. Future solution is to prepare MMU table per memory node in dts instead of hard code DDR addresses. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Propagate error value from psu_init()Michal Simek2018-01-303-4/+6
| | | | | | | | psu_init() returns int which wasn't declared and checked. The patch is fixing function declarations and code to handle return values properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Remove whitespaces in psu_init() commentMichal Simek2018-01-301-4/+4
| | | | | | Remove additional spaces before comment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Fix pmu register description coding styleMichal Simek2018-01-301-1/+2
| | | | | | | | Drop the space before/after '<' and '>'; and separate the entries to be a bit more readable. Reported-by: Julia Cartwright <julia@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable distro defaults settingMichal Simek2018-01-3013-111/+13
| | | | | | | BOOTCOMMAND is composed with distro_bootcmd but this variable is not present. Enabling distro defaults setting is fixing it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Move bootcommand to defconfigMichal Simek2018-01-3018-2/+32
| | | | | | | It will cleanup generic config and enable option to change it for every board. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable DM_GPIO when neededMichal Simek2018-01-3018-2/+16
| | | | | | | | There are two reasons for doing this change. There is still !DM driver for xilinx soft gpio IP and especially it is saving some space for memory constrained boards like cse (almost ~400B). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable DM_ETH and DM_MMC only if subsystem is enabledMichal Simek2018-01-301-2/+2
| | | | | | | Do not enable DM_ETH/MMC if subsystems are not enabled. This saves memory for memory constrained boards like cse. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable BLK when neededMichal Simek2018-01-305-2/+3
| | | | | | | | There is no reason to enable BLK by default for all boards which is just increasing memory footprint for memory contrained boards like cse. zc770s are also saving some space. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Disable networking for zc770 xm011Michal Simek2018-01-301-6/+4
| | | | | | | Ethernet cable is not connected for xm011 that's why disable all ethernet related configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable debug console for zc770 xm011Michal Simek2018-01-301-0/+5
| | | | | | Wire debug console which is useful for early debugging. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add identification string to Xilinx boardsMichal Simek2018-01-306-0/+6
| | | | | | | It is good to see this string to make sure that u-boot which runs on the board is the same which should run there. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* armv8: zynqmp: Map PCIe High as device memoryAnders Hedlund2018-01-301-6/+6
| | | | | | | | Set the 8GB PCIe High area as device memory. Also extend the DDR High area to cover the full 32GB range. Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: Use strlen only if env_get doesn't return nullSiva Durga Prasad Paladugu2018-01-301-3/+10
| | | | | | | | | | | | | | Add check if boot_targets exists in environment and then generate new_targets env accordingly. Performing strlen on null address causes it to fail with exception if isolation is enabled with DDR address zero as secure. It works with out isolation enabled as zero is valid address but it may lead to junk values in boot_targets. This patch fixes the issue by checking return value of env_get so that it generate boot_targets properly. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: remove unused CONFIG_ZC770_XM01* optionsMasahiro Yamada2018-01-304-4/+0
| | | | | | | These are defined, but not referenced at all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Fix types in ps7_spl_initMichal Simek2018-01-301-2/+2
| | | | | | | | | | The patch is fixing the following Warning: arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] while (ioread(addr) < delay) ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add support for zc770-xm011-x16 configurationMichal Simek2018-01-303-0/+827
| | | | | | | | zc770-xm011 is x8 width configuration. This FMC card has also x16 variant which requires different ps7_init configuration. This patch adds it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add zc770-xm013 spl configurationMichal Simek2018-01-301-0/+767
| | | | | | Simplify ps7_init* initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add zc770-xm012 spl configurationMichal Simek2018-01-301-0/+818
| | | | | | Simplify ps7_init* initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add zc770-xm011 spl configurationMichal Simek2018-01-301-0/+776
| | | | | | Simplify ps7_init* initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Add zc770-xm010 spl configurationMichal Simek2018-01-301-0/+800
| | | | | | Simplify ps7_init* initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* doc: zynq: Describe status of zc770-xm011Michal Simek2018-01-301-2/+1
| | | | | | zc770-xm011 is also added and supported. Reflect this in README. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* doc: Update the zynq u-boot statusEzequiel Garcia2018-01-241-4/+3
| | | | | | | | | NAND and QSPI devices are now supported, so mark them as such. Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynq: Enable SPL_CLK only if SPL is enabledEzequiel Garcia2018-01-241-1/+1
| | | | | | | | | Setup proper dependency in Kconfig for SPL_CLK. If SPL is not enabled, SPL_CLK shouldn't be selected. Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* tools: Update python "help" tests to cope with "more" odditiesTom Rini2018-01-162-2/+8
| | | | | | | | | | | | | | | | In some cases when "more" is told to page a given file it will prepend the output with: :::::::::::::: /PATH/TO/THE/FILE :::::::::::::: And when this happens the output will not match the expected length. Further, if we use a different pager we will instead fail the coverage tests as we will not have 100% coverage. Update the help test to remove the string in question. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-i2cTom Rini2018-01-163-11/+11
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| * i2c: mxc_i2c: Use or operationPeng Fan2018-01-161-3/+3
| | | | | | | | | | | | | | | | The operation should be OR, not BIT OR. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx: mx7ulp: modify lpi2c seq numberPeng Fan2018-01-161-4/+4
| | | | | | | | | | | | | | Modify the lpi2c alias seq number to align with device. Then no need to add 4 to get the device index. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * i2c: lpi2c: do not add 4 for bus seqPeng Fan2018-01-161-4/+4
| | | | | | | | | | | | | | | | | | The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8, 4 is not valid. The seq number could be configured by alias node. The following patch will use i2c4 as the begin for i.MX7ULP. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2018-01-1632-404/+439
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| * test: Set the DTC environment variableSimon Glass2018-01-151-3/+5
| | | | | | | | | | | | | | Set this to our own device-tree compiler since we know it is new enough to run the tests. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dtoc: Allow DTC environment variable to provide path to dtcSimon Glass2018-01-152-1/+6
| | | | | | | | | | | | | | | | | | The system device-tree compiler may not be new enough to run the tests we use in U-Boot (e.g. with binman). Allow use of a DTC environment variable to point to the correct dtc. If not defined, the dtc on the default PATH is used. Signed-off-by: Simon Glass <sjg@chromium.org>
| * armv8: secure firmware: fix incorrect unit address in node nameAndre Przywara2018-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Remove the unit address from the config node name when U-Boot deals with secure firmware FIT images. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * tools: fix incorrect usage of DT node unit addressAndre Przywara2018-01-151-12/+12
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Correct the generated unit names when U-Boot's mkimage creates a FIT image. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * sunxi: arm64: correct usage of DT node address in FIT generationAndre Przywara2018-01-151-8/+8
| | | | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Adjust the FIT build script for 64-bit Allwinner boards to remove the bogus addresses from the node names and avoid the warnings. This avoids a warning with recent versions of the dtc tool. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * fix incorrect usage of DT node unit address in commentsAndre Przywara2018-01-154-27/+27
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the tree where node names were mentioned in comments, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * doc: fix incorrect usage of DT node unit addressAndre Przywara2018-01-154-42/+42
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in various documentation files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * doc: FIT image: fix incorrect examples of DT node unit addressAndre Przywara2018-01-1510-117/+117
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address of a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the FIT image example files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * doc: FIT image: fix incorrect description of DT node unit addressAndre Przywara2018-01-157-196/+196
| | | | | | | | | | | | | | | | | | | | The DT spec demands a unit-address in a node name to match the "reg" property in that node. Newer dtc versions will throw warnings if this is not the case. Fix all occurences in the FIT image documentation files where this was not observed, to not give bad examples to the reader. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
| * binman: Run code coverage testsSimon Glass2018-01-151-0/+7
| | | | | | | | | | | | | | | | | | | | | | Binman has 100% test coverage for the code as it is at present. To encourage it to stay that way, run the code-coverage test as part of the normal U-Boot tests. This is RFC because it requires the Python code coverage tools to be available. Signed-off-by: Simon Glass <sjg@chromium.org>
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