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| * | | arm: dts: ls1012a: add label to pcie nodes in dtsWasim Khan2020-12-101-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | arm: dts: ls1088a: add label to pcie nodes in dtsWasim Khan2020-12-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | arm: dts: ls2080a: add label to pcie nodes in dtsWasim Khan2020-12-101-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | arm: dts: ls1046a: add label to pcie nodes in dtsWasim Khan2020-12-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | arm: dts: lx2160a: add label to pcie nodes in dtsWasim Khan2020-12-101-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add label to pcie nodes in dts so that these nodes are easy to refer. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | pci: ls_pcie_g4: Print pcie controller number starting from 1Wasim Khan2020-12-101-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | Print pcie controller number starting from 1 Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
| * | | pci: layerscape: Update print of pcie controllerWasim Khan2020-12-102-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Print pcie controller number starting from 1 Signed-off-by: Wasim Khan <wasim.khan@nxp.com> [Trimmed subject] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | | configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4Wasim Khan2020-12-105-0/+5
|/ / / | | | | | | | | | | | | | | | | | | | | | LX2160A-Rev1 uses PCIe layerscape Gen4 controller. Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
* | | Merge tag 'u-boot-stm32-20201209' of ↵Tom Rini2020-12-0940-41/+77
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board - Update ARM STI and ARM STM STM32MP Arch maintainers emails - Enable internal pull-ups for SDMMC1 on DHCOM SoM
| * | | ARM: dts: stm32: Add USB OTG ID pin on DH AV96Marek Vasut2020-12-091-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add USB OTG ID pin mux and switch the USB OTG port from peripheral to OTG mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Enable SDMMC3 on DH DRC02Marek Vasut2020-12-091-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DH DRC02 board has an on-board microSD slot, add DT properties to enable the slot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Disable SDMMC1 CKIN feedback clockMarek Vasut2020-12-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter or without one on the SDMMC1 interface. Because the SDMMC1 interface is limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback clock to permit operation of the same U-Boot image on both SoM with and without voltage level shifter. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoMMarek Vasut2020-12-091-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default state of SD bus and clock line is logical HI. SD card IO is open-drain and pulls the bus lines LO. Always enable the SD bus pull ups to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus voltage level shifter, the pull ups are built into the level shifter, however that has no negative impact. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
| * | | .mailmap: map Patrick Delaunay and my email addressPatrice Chotard2020-12-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add our new email address dedicated for upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | treewide: Update email address Patrick Delaunay and Patrice ChotardPatrice Chotard2020-12-0934-34/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emailsPatrice Chotard2020-12-091-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * | | add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definitionManuel Reis2020-12-091-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check whether user has explicitly defined device and partition where environment file will be located before using 'auto' i.e. bootable partition Voids the need to set such partition as bootable to work with the 'dev:auto' tuple Signed-off-by: Manuel Reis <mluis.reis@gmail.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
* | | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imxTom Rini2020-12-08160-2145/+1891
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| * | | configs: migrate CONFIG_IMX_THERMAL to defconfigsTom Rini2020-12-0783-75/+55
| | | | | | | | | | | | | | | | | | | | | | | | Done via moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
| * | | imx8mp_evk: README instruction fixesBaruch Siach2020-12-071-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the full name of firmware self extracting file to make it run. Also, don't use sudo when not needed. Signed-off-by: Baruch Siach <baruch@tkos.co.il>
| * | | doc: board: imx8qm-rom7720-a1.rst: convert readme to reSTOliver Graute2020-12-074-61/+85
| | | | | | | | | | | | | | | | | | | | | | | | Convert README to reStructuredText format. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
| * | | colibri-imx8x: add implementation for board_mem_get_layoutIgor Opaniuk2020-12-061-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add implementation of board_mem_get_layout for overriding the memory layout. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * | | apalis-imx8x: add implementation for board_mem_get_layoutIgor Opaniuk2020-12-061-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add implementation of board_mem_get_layout for overriding the memory layout. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
| * | | apalis-imx8: add implementation for board_mem_get_layoutIgor Opaniuk2020-12-061-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add implementation of board_mem_get_layout for overriding the memory layout. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | imx8: allow overriding memory layoutMarcel Ziswiler2020-12-062-29/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce weak function board_mem_get_layout() which allows overriding the memory layout from board code in runtime, useful for handling different SKU versions. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | doc: board: apalis-imx8x: add documentationIgor Opaniuk2020-12-062-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This documents the u-boot build and deployment procedure. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | board: toradex: add apalis-imx8x 2gb wb it v1.1a module supportIgor Opaniuk2020-12-068-0/+433
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds initial support for the Toradex Apalis iMX8X 2GB WB IT V1.1A System on Module support [1]. Boot log: U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300) CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C DRAM: 2 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial@5a070000 Out: serial@5a070000 Err: serial@5a070000 Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A, Serial# 06617018 Net: eth0: ethernet@5b040000 [PRIME] Hit any key to stop autoboot: 0 Functionality wise the following is known to be working: - eMMC and MMC/SD card - Ethernet (*) - GPIOs - I2C Unfortunately, there is no USB functionality for the i.MX 8QXP as of yet. * With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1) ETH PHY encounters bring up problems after reset, this will be fixed soon on SCU FW side. [1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | ARM: dts: fsl-imx8qxp-apalis: add initial device treeIgor Opaniuk2020-12-063-0/+418
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce initial hierarchy of device trees for Apalis iMX8X System on Module. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | imx8m: fix cache setup for dynamic sdram sizeTim Harvey2020-12-061-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the mem_map structure containing the size of SDRAM is used in various cache functions in cache_v8.c thus we need to update it with the sdram size the board is configured with as well. Without this the cache functions do not get setup properly and can hang in the case where a board reports more SDRAM than defined in PHYS_SDRAM_SIZE. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
| * | | verdin-imx8mm: automatic ram size detectionMarcel Ziswiler2020-12-061-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement board_phys_sdram_size() to automatically detect Verdin iMX8M Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB. Note: This only works if we keep using similar RAM chips! Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | toradex: tdx-cfg-clock: fix i.mx 8m mini interactiveMarcel Ziswiler2020-12-061-17/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now with them first Verdin iMX8M Mini DualLite modules in for bring-up we got clarity how is_cpu_type() actually behaves. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | verdin-imx8mm: spl: enable pca9450 i2c level translatorMax Krummenacher2020-12-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable PCA9450 i2c level translator, as this is used for the on module ADC. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | verdin-imx8mm: implement hardware version detectionMax Krummenacher2020-12-061-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | And select the correct devicetree accordingly by setting the variant environment variable. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | | verdin-imx8mm: spl: switch to pca9450 pmicMax Krummenacher2020-12-062-23/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | V1.1A HW switched the PMIC from BD71837 to PCA9450. - Disable combined DVS in PCA9450_BUCK123_DVS. - Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM. - Configure WDOG_B behaviour. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | ARM: dts: imx8mm-verdin: follow changed pmicMax Krummenacher2020-12-062-79/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A. Adjust the device tree accordingly. Remove the old ADC node as the ADC has been changed and has no longer a separate power rail. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
| * | | power: pmic: add SPL_DM_PMIC_PCA9450 symbol to KconfigIgor Opaniuk2020-12-061-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SPL_DM_PMIC_PCA9450 symbol to Kconfig. Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | pca9450a: fix i2c addressMax Krummenacher2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The I2C address is 0x25, not 0x35. This according to the datasheet and tests with a PCA9450A. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skusMarcel Ziswiler2020-12-062-14/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add new i.MX 8M Mini/Plus SKUs to ConfigBlock handling: 0058: Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT 0059: Verdin iMX8M Mini Quad 2GB IT 0060: Verdin iMX8M Mini DualLite 1GB WB IT 0061: Verdin iMX8M Plus Quad 2GB Rename existing SKU (use correct one): Verdin iMX8M Nano SoloLite 1GB -> Verdin iMX8M Nano Quad 1GB Wi-Fi Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| * | | mmc: fsl_esdhc_imx: optimize the timing settingHaibo Chen2020-12-061-8/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the card clock will be divied by 2 automatically by the host. So need to first config the DDR_EN correctly, then update the card clock. This will make sure the actual card clock is as our expected. IC also suggest config the DDR_EN firstly, then config the clock divider. For HS400/HS400ES mode, need to config the strobe dll, this need to based on the correct target clock rate, so need to do this after clock rate is update. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | imx: imx8qm_rom7720_a1: add missing DTS to the MAINTAINERSOliver Graute2020-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add the dts file to the MAINTAINERS entry Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | board: ge: bx50v3: check b850v3 power management watchdogIan Ray2020-12-062-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set `bootcause' from b850v3 power management watchdog status. Boot cause "REVERT" is no longer used, remove it. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | board: ge: reduce VPD EEPROM partition sizeIan Ray2020-12-062-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Reduce vital product data size to match the latest specification. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | board: ge: bx50v3: reduce magic numbersSebastian Reichel2020-12-061-21/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use VPD product ID instead of confidx, so that we can easily reuse the product ID defines and avoid some magic numbers. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | board: ge: bx50v3: drop unused pinmux definesSebastian Reichel2020-12-061-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove pinmux defines, that are no longer used after converting the code to devicetree. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | board: ge: bx50v3: correct CONFIG_CMD_NFSIan Ray2020-12-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix typo in NFS command configuration check. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | board: ge: common: vpd: fix nameSebastian Reichel2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f692b479f02d changed the VPD partition name from "vpd" to "vpd@0". Fix the VPD reader code to use the new name, so that the VPD code keeps working. Fixes: f692b479f02d ("i2c: eeprom: Use reg property instead of offset and size") Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
| * | | mmc: fsl_esdhc_imx: add wait_dat0() supportHaibo Chen2020-12-061-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add wait_dat0() support, upper layer will use this callback. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | | imx: ahab: fix implicit declaration warningOliver Graute2020-12-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning: arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration] flush_dcache_range(s, e); ^~~~~~~~~~~~~~~~~~ Include cpu_func.h header which declares the flush_dcache_range() function. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | imx: ahab: fix compiler warnings in debugOliver Graute2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’: arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=] debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n", Fix those by using "%lu" specified. Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
| * | | imx: ahab: Fix compiler warnings in printfOliver Graute2020-12-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long long unsigned int}’ [-Wformat=] Fix those by using %llx Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: uboot-imx <uboot-imx@nxp.com>
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