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* x86: dfi: Add option to select different config headers for baseboardsStefan Roese2017-08-086-13/+71
| | | | | | | | | | | | This patch adds the infrastructure to define different config headers with different configurations and default environment for the baseboards that can now be selected via Kconfig. The new configuration for the theadorable-x86-dfi-bt700 is also added. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: acpi: Fix build error with certain configurationBin Meng2017-08-081-0/+1
| | | | | | | | | | | | | | | When CONFIG_EFI_PARTITION is not set, the following build error is seen in arch/x86/lib/acpi_s3.c: error: expected declaration specifiers or '...' before '*' token static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE; This is actually caused by missing asmlinkage declaration, but with CONFIG_EFI_PARTITION on, the declaration comes from part.h which is included from common.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* x86: Remove dead ISA related codesBin Meng2017-08-081-66/+8
| | | | | | | | Neither new design uses ISA bus, nor does any U-Boot codes use these codes. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* common/env_embedded.c: rename PPCENV/PPCTEXT macrosThomas Petazzoni2017-08-042-7/+5
| | | | | | | | | | | | The environment has pretty much nothing to do with just "PPC", so rename the macros to just __UBOOT_ENV_SECTION__ which is more readable. In addition, only a single macro is needed: the environment now goes either to the default section (USE_HOSTCC is defined) or in the .text section. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* common/env_embedded.c: drop support for CONFIG_SYS_USE_PPCENVThomas Petazzoni2017-08-041-10/+3
| | | | | | | | | | | | | | | | | | | CONFIG_SYS_USE_PPCENV is no longer used anywhere. It was used to put the environment in the special .ppcenv section, but the last architecture using this section (SuperH) has been changed to not use it. Therefore, this commit drops support for CONFIG_SYS_USE_PPCENV entirely. We only handle two cases: - We're building the host tool tools/envcrc, in which case the environment is place with no special section attribute (so it depends up in .data) - We're building U-Boot itself, in which case the environnement is placed in the .text section. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
* Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to KconfigAdam Ford2017-08-0428-1/+30
| | | | | | | | | | | This converts the following to Kconfig: CONFIG_SYS_TEXT_BASE The includes, whitelist, etc. were left for now but I don't get any build errors or warnings on the omap3_logic_defconfig or am3517_evm_defconfig builds I tried. Signed-off-by: Adam Ford <aford173@gmail.com>
* stmf32f4: soc: fix buildman compilation errorPatrice Chotard2017-08-041-1/+3
| | | | | | | | | | | | | | | | | | fix the following compilation error reported by buidlman: arm: + stm32f429-discovery +arch/arm/mach-stm32/stm32f4/soc.c: In function 'arch_cpu_init': +arch/arm/mach-stm32/stm32f4/soc.c:30:2: error: 'for' loop initial declarations are only allowed in C99 or C11 mode + for (int i = 0; i < ARRAY_SIZE(stm32_region_config); i++) + ^ +arch/arm/mach-stm32/stm32f4/soc.c:30:2: note: use option -std=c99, -std=gnu99, -std=c11 or -std=gnu11 to compile your code +make[3]: *** [arch/arm/mach-stm32/stm32f4/soc.o] Error 1 +make[2]: *** [arch/arm/mach-stm32/stm32f4] Error 2 +make[1]: *** [arch/arm/mach-stm32] Error 2 +make: *** [sub-make] Error 2 Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Vikas Manocha <vikas.manocha@st.com>
* configs: sama5d4_xplained: Fix input clock for debug UARTWenyou.Yang@microchip.com2017-08-043-3/+3
| | | | | | | Fix the UART input clock for the early debug UART, it should be 100MHz, instead of 88MHz. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
* board: usb_a9263: Update to support DT and DMWenyou.Yang@microchip.com2017-08-044-43/+168
| | | | | | | | | | Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: meesc: Update to support DT and DMWenyou.Yang@microchip.com2017-08-044-39/+45
| | | | | | | | | | Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: pm9261: Update to support DT and DMWenyou.Yang@microchip.com2017-08-044-45/+28
| | | | | | | | | | Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: ethernut5: Update to support DT and DMWenyou.Yang@microchip.com2017-08-045-83/+179
| | | | | | | | | | Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: pm9263: Update to support DT and DMWenyou.Yang@microchip.com2017-08-045-44/+29
| | | | | | | | | Update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9260ek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com2017-08-0416-40/+98
| | | | | | | | | | To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9rlek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com2017-08-046-17/+29
| | | | | | | | | | To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9263ek: Use SPI-flash-based AT45xxx DataFlashWenyou.Yang@microchip.com2017-08-049-20/+45
| | | | | | | | | | To support driver model and device tree, use the SPI-flash-based AT45xxx DataFlash driver, DataFlash is a kind of SPI flash. Instead of ATMEL_DATAFLASH_SPI DataFlash older driver that will be removed in the future. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* board: at91sam9261ek: Update to support DT and DMWenyou.Yang@microchip.com2017-08-0413-116/+483
| | | | | | | | | | | | | Add the dts files to support deivce tree, update the configuration files to support the device tree and driver model. The peripheral clock and pins configuration are handled by the clock and the pinctrl drivers respectively. Enable the early debug UART to debug problems when an ICE or other debug mechanism is not available. Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* gpt: harden set_gpt_info() against non NULL-terminated stringsAlison Chaiken2017-08-041-27/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Strings read from devices may sometimes fail to be NULL-terminated. The functions in lib/string.c are subject to failure in this case. Protect against observed failures in set_gpt_info() by switching to length-checking variants with a length limit of the maximum possible partition table length. At the same time, add a few checks for NULL string pointers. Here is an example as observed in sandbox under GDB: => gpt verify host 0 $partitions Program received signal SIGSEGV, Segmentation fault. 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 267 for (sc = s; *sc != '\0'; ++sc) (gdb) bt #0 0x0000000000477747 in strlen (s=0x0) at lib/string.c:267 #1 0x00000000004140b2 in set_gpt_info (str_part=<optimized out>, str_disk_guid=str_disk_guid@entry=0x7fffffffdbe8, partitions=partitions@entry=0x7fffffffdbd8, parts_count=parts_count@entry=0x7fffffffdbcf "", dev_desc=<optimized out>) at cmd/gpt.c:415 #2 0x00000000004145b9 in gpt_verify (str_part=<optimized out>, blk_dev_desc=0x7fffef09a9d0) at cmd/gpt.c:580 #3 do_gpt (cmdtp=<optimized out>, flag=<optimized out>, argc=<optimized out>, argv=0x7fffef09a8f0) at cmd/gpt.c:783 #4 0x00000000004295b0 in cmd_call (argv=0x7fffef09a8f0, argc=0x5, flag=<optimized out>, cmdtp=0x714e20 <_u_boot_list_2_cmd_2_gpt>) at common/command.c:500 #5 cmd_process (flag=<optimized out>, argc=0x5, argv=0x7fffef09a8f0, repeatable=repeatable@entry=0x726c04 <flag_repeat>, ticks=ticks@entry=0x0) at common/command.c:539 Suggested-by: Lothar Waßmann <LW@karo-electronics.de> Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* GPT: provide commands to selectively rename partitionsAlison Chaiken2017-08-043-5/+260
| | | | | | | | | | | | | | | | | | This patch provides support in u-boot for renaming GPT partitions. The renaming is accomplished via new 'gpt swap' and 'gpt rename' commands. The 'swap' mode returns an error if no matching partition names are found, or if the number of partitions with one name does not equal the number with the second name. The 'rename' variant always succeeds as long as a partition with the provided number exists. Rewriting the partition table has the side-effect that all partitions end up with "msftdata" flag set. The reason is that partition type PARTITION_BASIC_DATA_GUID is hard-coded in the gpt_fill_pte() function. This does not appear to cause any harm. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* GPT: read partition table from device into a data structureAlison Chaiken2017-08-042-0/+132
| | | | | | | | | | | Make the partition table available for modification by reading it from the user-specified device into a linked list. Provide an accessor function for command-line testing. Signed-off-by: Alison Chaiken <alison@peloton-tech.com> [trini: Make this depend on CMD_GPT_RENAME, as it is the user of this code] Signed-off-by: Tom Rini <trini@konsulko.com>
* GPT: add accessor function for disk GUIDAlison Chaiken2017-08-044-1/+74
| | | | | | | | | | | In order to read the GPT, modify the partition name strings, and then write out a new GPT, the disk GUID is needed. While there is an existing accessor for the partition UUIDs, there is none yet for the disk GUID. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* partitions: increase MAX_SEARCH_PARTITIONS and move to part.hAlison Chaiken2017-08-042-1/+1
| | | | | | | | | | | Move MAX_SEARCH_PARTITIONS to part.h so that functions in cmd directory can find it. At the same time, increase the value to 64 since some operating systems use many, and the resources consumed by a larger value are minimal. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* cmd gpt: test in sandboxAlison Chaiken2017-08-041-0/+10
| | | | | | | | | Make minor changes to README.gpt and sandbox_defconfig to support testing of the gpt command's functionality in the sandbox. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* GPT: fix error in partitions string docAlison Chaiken2017-08-041-4/+4
| | | | | | | | | | | | | The existing partitions-list parsing in cmd/gpt.c passes a value from gpt_default() to set_gpt_info() that README.gpt suggests should begin with 'partitions='. Partition-list strings should in fact begin with 'uuid_disk', as otherwise the call from set_gpt_info() to extract_val() to find 'uuid_disk' will fail. Change README.gpt accordingly. Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* disk_partition: introduce macros for description string lengthsAlison Chaiken2017-08-041-2/+5
| | | | | | Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* EFI: replace number with UUID_STR_LEN macroAlison Chaiken2017-08-042-3/+4
| | | | | | Changes since v6: none. Signed-off-by: Alison Chaiken <alison@peloton-tech.com>
* Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblazeTom Rini2017-08-0422-238/+1038
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx changes for v2017.09 Zynq: - Add Z-Turn board support fpga: - Remove intermediate buffer from code Zynqmp: - dts cleanup - change psu_init handling - Add options to get silicon version - Fix time handling - Map OCM/TCM via MMU - Add new clock driver
| * arm64: zynqmp: avoid out of buffer accessHeinrich Schuchardt2017-08-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | strncat(a, b, c) appends a maximum of c characters plus the 0 byte to a. In board_init we first write 4 characters plus 0 byte to version. So only ZYNQMP_VERSION_SIZE - 5 additional characters fit into version. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Make chip_id routine to handle based on el.Siva Durga Prasad Paladugu2017-08-022-27/+51
| | | | | | | | | | | | | | | | | | Modify chip_id() routine such that to handle based on the current el. Also make it available even if FPGA is not enabled in system such it can be used always. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Make chip_id a global routine()Siva Durga Prasad Paladugu2017-08-022-1/+3
| | | | | | | | | | | | | | | | This patch makes chip_id() as a global routine so that it can be used in other places as required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Modify chip_id routine to get either idcode or versionSiva Durga Prasad Paladugu2017-08-022-7/+34
| | | | | | | | | | | | | | | | This patch modifies the chip_id routine to get either idcode or silicon version based on the argument received. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Move dts zcu102 to zcu102-revAMichal Simek2017-08-024-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Not using board revision is causing confusion about which board is supported and tested. Mark dts files exactly with board revision which was tested. When new board revision arives it can be symlink if SW view is the same. Also add -revX suffix to compatible string because user space tools are parsing this string and can change behavior depends of board revision. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm64: zynqmp: Dont write to system timestamp generatorSiva Durga Prasad Paladugu2017-08-022-15/+0
| | | | | | | | | | | | | | | | | | Remove incorrect code of writing to system timestamp counter registers. This register writes does nothing and can be removed. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Do not setup time if already setupMichal Simek2017-08-021-1/+4
| | | | | | | | | | | | | | Newer psu_init_gpl.c/h contain clock setup. Detect if reference clock is active. If yes, skip timer setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Fix SVD mask for getting chip IDMichal Simek2017-08-021-1/+1
| | | | | | | | | | | | | | | | | | | | Mask should start from the first bit - using 0xe is just wrong. 3bits are used that's why 0x7 mask is correct. This patch is fixing silicon ID code detection. Previous behavior was that bit0 was completely ignored. Issue was found on 2eg chip detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Add Kconfig option for adding psu_init to binaryMichal Simek2017-08-023-2/+11
| | | | | | | | | | | | | | There is a need to include psu_init also in mini u-boot configuration that's why handle psu_init via Kconfig property. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Call psu_init from board_early_init_fMichal Simek2017-08-022-1/+6
| | | | | | | | | | | | | | For some mini platforms there could be a need to include psu_init. That's why move it to board file instead of spl only file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Remove ifdef around zynqmp mmio read and write rotuinesSiva Durga Prasad Paladugu2017-08-021-27/+36
| | | | | | | | | | | | | | | | | | This patch removes ifdef around mmio read and write rotuines and make them a single routine by checking the current el. This patch helps to remove ifdef around invoke_smc as well. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Define a way to intialize TCMSiva Durga Prasad Paladugu2017-08-022-0/+22
| | | | | | | | | | | | | | | | | | TCM on ZynqMP needs to be intialized in a sequence and this patch provides a global routine to perform this as per requirement. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMUSiva Durga Prasad Paladugu2017-08-022-0/+14
| | | | | | | | | | | | | | | | This patch provides an option to include OCM and TCM memory into MMU table with corresponding memory attributes. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * fpga: xilinx: Avoid using local intermediate bufferSiva Durga Prasad Paladugu2017-08-021-16/+10
| | | | | | | | | | | | | | | | | | Dont use local temporary buffer for printing out the info instead use directly from memroy. This fixes the issue of stack corruprion due to local buffer overflow. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * clk: zynqmp: Remove unused macros/variablesMichal Simek2017-08-021-4/+0
| | | | | | | | | | | | | | | | These macros and one variable is not used anywhere that's why they should be removed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * clk: zynqmp: Dont panic incase of mmio write/read failuresSiva Durga Prasad Paladugu2017-08-021-19/+44
| | | | | | | | | | | | | | | | | | | | Dont panic incase of mmio write/read failures instead return error and let the peripheral driver take care of clock get and set failures. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * clk: zynqmp: Add support for CCF driverSiva Durga Prasad Paladugu2017-08-021-147/+526
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for CCF, this CCF reads the ref clocks from dt and checks all the required clock control registers for its source , divisors and calculates the clock from them. This supports clock and set functions. Panic when read/write fails. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * common: board_f: Make reserve_mmu a weak functionSiva Durga Prasad Paladugu2017-08-022-1/+2
| | | | | | | | | | | | | | | | | | Make reserve_mmu a weak so that it provides an option to customize this routine as per platform need Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * zynq: Add Z-Turn boardAlexander Graf2017-08-023-0/+221
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Z-Turn board is a low cost development board based on the Xilinx Zynq SoC. While it's powerful and quite versatile, it so far lacked upstream support. This patch adds basic support for the Z-Turn. It does however for now miss enablement for MIO51 reset which means that USB and ethernet don't work. For that either FSBL or SPL need to be adjusted. The SPL part will follow later. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Enable distro bootAlexander Graf2017-08-021-4/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | Distro boot allows devices to boot using standardized boot methods by default. This can be very handy for distributions that want to run on different platforms. This patch moves the zynq platform to use its old, zynq specific boot method first and then fall back to distro boot. That way supporting Linux distributions like openSUSE is much easier. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq: Add EFI runtime sections to linker scriptAlexander Graf2017-08-021-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using EFI_LOADER, we add a few special sections for runtime code and data which get relocated on demand when executing a target OS. These runtime structures need to get annotated properly in the linker script. While we do that properly in the generic one, we missed out on the zynq specific linker script. This patch adds the EFI runtime section annotations into the zynq linker script so that the efi loader code actually works on that platform. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm: zynq: Label whole PL part as fpga_full regionMichal Simek2017-08-021-0/+8
| | | | | | | | | | | | | | This will simplify dt overlay structure for the whole PL. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Moritz Fischer <moritz.fischer@ettus.com>
* | PowerPC: mpc85xx: Update ft_verify_fdtTom Rini2017-08-031-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | With the changes to fdt_get_base_address() we need to modify the logic in ft_verify_fdt() for how we check the validity of the CCSR address. Tested-on: qemu-ppce500 -M mpc8544ds Fixes: 336a44877af8 ("fdt: Correct fdt_get_base_address()") Cc: York Sun <york.sun@nxp.com> Cc: Wolfgang Denk <wd@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
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