summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'mips-pull-2020-06-29' of ↵Tom Rini2020-06-3035-77/+292
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips into next - net: pcnet: cleanup and add DM support - Makefile: add rule to build an endian-swapped U-Boot image used by MIPS Malta EL variants - CI: add Qemu tests for MIPS Malta
| * .azure-pipelines.yml: add Qemu tests for MIPS Malta boardDaniel Schwierzeck2020-06-291-0/+16
| | | | | | | | | | | | | | Add Qemu tests for the MIPS Malta machine as a replacement for the deprecated generic MIPS machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * .travis.yml: add Qemu tests for MIPS Malta boardDaniel Schwierzeck2020-06-291-0/+28
| | | | | | | | | | | | | | Add Qemu tests for the MIPS Malta machine as a replacement for the deprecated generic MIPS machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * .gitlab-ci.yml: add Qemu tests for MIPS Malta boardDaniel Schwierzeck2020-06-291-0/+32
| | | | | | | | | | | | | | Add Qemu tests for the MIPS Malta machine as a replacement for the deprecated generic MIPS machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * mips: malta: build u-boot-swap.binDaniel Schwierzeck2020-06-292-0/+2
| | | | | | | | | | | | | | | | The Qemu Malta machine expects the firmware in Big-Endian byte order. Therefore the Little-Endian variants of the Malta board needs to be byte swapped. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * Makefile: add rule to generate u-boot-swap.binDaniel Schwierzeck2020-06-291-0/+6
| | | | | | | | | | | | | | | | | | This rule generates an u-boot binary file where the byte endianness is swapped. This will be used by the MIPS Malta Little-Endian variants to be able to boot with Qemu. The Qemu Malta Machine expects the firmware in Big-Endian order. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * tools: add script for byte endianness swappingDaniel Schwierzeck2020-06-291-0/+55
| | | | | | | | | | | | | | This can be used to swap the byte endianness of a binary file from Little-Endian to Big-Endian or vice-versa. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * net: pcnet: Add Kconfig entriesMarek Vasut2020-06-296-1/+10
| | | | | | | | | | | | | | | | | | Add Kconfig entries for the pcnet driver and convert MIPS malta to use those. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Add DM supportMarek Vasut2020-06-291-1/+126
| | | | | | | | | | | | | | | | | | With all the changes in place, add support for DM into the pcnet driver. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Split common and non-DM functionsMarek Vasut2020-06-291-55/+94
| | | | | | | | | | | | | | | | | | | | | | Pull the common parts of functions out so they can be reused by both DM and non-DM code paths. The recv() function had to be reworked to fit into this scheme and this means it now only receives one packet at a time instead of spinning in an endless loop. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Wrap name and enetaddr into private dataMarek Vasut2020-06-291-15/+19
| | | | | | | | | | | | | | | | | | | | Instead of using the non-DM-only name and enetaddr in struct eth_device, add pointers into the private data which can either point to that non-DM name or a DM one later on. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Wrap iobase into private dataMarek Vasut2020-06-291-57/+46
| | | | | | | | | | | | | | | | | | Instead of using the non-DM-only iobase in struct eth_device, add one into the private data to make DM and non-DM operation possible. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Pass private data through dev->privMarek Vasut2020-06-291-10/+10
| | | | | | | | | | | | | | | | | | | | Get rid of the global point to private data, and rather pass it thought dev->priv. Also remove the unnecessary check for lp being non-NULL, since it is always NULL at this point. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Wrap devbusfn into private dataMarek Vasut2020-06-291-10/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using eth_device priv for this PCI devbusfn, free it so it could be used for driver private data, and wrap devbusfn into those driver private data. Note that using the name dev for the variable is a trick left for later, when DM support is in place, so dm_pci_virt_to_mem() can be used with minimal ifdeffery. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Drop useless forward declarationsMarek Vasut2020-06-291-6/+0
| | | | | | | | | | | | | | | | Remove those as they are not needed anymore. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Move initialize function at the endMarek Vasut2020-06-291-91/+89
| | | | | | | | | | | | | | | | | | Move the function at the end of the driver, so we could drop various forward declarations later. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Move private data allocation to initializeMarek Vasut2020-06-291-13/+14
| | | | | | | | | | | | | | | | | | | | | | The private data allocation does not have to be done every time the NIC is initialized at run time, move the allocation to initialize function, which means it will be done only once when the driver starts. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Replace memset+malloc with callocMarek Vasut2020-06-291-2/+1
| | | | | | | | | | | | | | | | | | This combination of functions can be replaced with calloc(), make it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Simplify private data allocationMarek Vasut2020-06-291-21/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code is horribly complex. Both the RX and TX buffer descriptors are 16 bytes in size, the init block is 32 bytes in size, so simplify the code such that the entire private data of the driver are allocated cache aligned and the RX and TX buffer descriptors are part of the private data. This removes multiple malloc calls and cache flushes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Use PCI_DEVICE() to define PCI device compat listMarek Vasut2020-06-291-1/+1
| | | | | | | | | | | | | | | | | | Use this macro to fully fill the PCI device ID table. This is mandatory for the DM PCI support, which checks all the fields. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Drop PCNET_HAS_PROMMarek Vasut2020-06-292-6/+0
| | | | | | | | | | | | | | | | | | All of one PCNET users has this option set, make this default and drop this config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * net: pcnet: Drop typedef struct pcnet_priv_tMarek Vasut2020-06-291-5/+5
| | | | | | | | | | | | | | | | Use struct pcnet_priv all over the place instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * Merge tag 'rockchip-fix' of ↵Tom Rini2020-06-291-1/+1
| |\ | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix "Synchronous Abort" when using rk3399 4K HDMI
| | * video: rockchip: fix HDMI 4K resolutionAnatolij Gustschin2020-06-291-1/+1
| |/ | | | | | | | | | | | | | | | | | | 3480 is not valid XRES, use 3840 as default. Fixes: 05c65a82c3c1 ("video: rockchip: Support 4K resolution for rk3399, HDMI") Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
| * Merge tag 'fixes-for-v2020.07' of ↵Tom Rini2020-06-287-38/+51
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix logo on mx6ul_14x14_evk with DM_VIDEO enabled - fix banner string overwriting the logo on small displays - fix splash warning when building for ARM64 - fix STM32 DSI driver to probe only on supported hardware - fix memory corruption with DSI panel drivers
| | * video: orisetech_otm8009a: fill characteristics of DSI data linkYannick Fertre2020-06-281-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| | * video: raydium_rm68200: fill characteristics of DSI data linkYannick Fertre2020-06-281-15/+5
| | | | | | | | | | | | | | | | | | | | | | | | Fill characteristics of DSI data link to platform data instead of mipi device to avoid memory corruption. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| | * video: stm32: stm32_dsi: copy DSI fieldsYannick Fertre2020-06-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Copy the DSI data link characteristics from panel platform data to mipi DSI device. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| | * video: mipi update panel platform dataYannick Fertre2020-06-281-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | Add new fields "lanes, format & mode_flags" to structure mipi_dsi_panel_plat. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| | * video: check hardware version of DSIYannick Fertre2020-06-281-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Check the hardware version of DSI. Versions 1.30 & 1.31 are only supported. Signed-off-by: Yannick Fertre <yannick.fertre@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
| | * splash: Fix build warning on 64 bits CPUYe Li2020-06-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Get below warning on ARM64 platform, because the bmp_load_addr is defined to u32. common/splash.c: In function ‘splash_video_logo_load’: common/splash.c:74:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 74 | memcpy((void *)bmp_load_addr, bmp_logo_bitmap, Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
| | * video: vidconsole: avoid multiple lines overwrite logoYe Li2020-06-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the bug that multiple lines wraps to overwrite logo bmp display. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
| | * video: bmp: support 8bits BMP drawing on 24/32 bpp framebufferYe Li2020-06-281-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update video bmp code so that we can display 8 bits logo on 24 or 32 bpp framebuffer. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # bpi-m1+, bpi-m64
| * | Merge tag 'u-boot-rockchip-20200628' of ↵Tom Rini2020-06-284-4/+24
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - rk3188 cpu init and APLL fix; - rk3399: Add BOOTENV_SF command; - rk3288 correct vop0 vop1 setting;
| | * | rockchip: correctly set vop0 or vop1Patrick Wildt2020-06-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EDP_LCDC_SEL bit has to be set correctly to select vop0 or vop1, but so far we have set it in both conditions, which is not correct. Can someone verify this is the correct way round? vop1 -> set, vop0 -> clear? Signed-off-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| | * | rockchip: clk: rk3188: change APLL to safe 600MHzAlexander Kochetkov2020-06-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver") changed ARM clock from 600MHz to 1600MHz. It made boot unstable due to the fact that PMIC at the start generates insufficient voltage for operation. See also: commit f4f57c58b589 ("rockchip: rk3188: Setup the armclk in spl"). Fixes commit 84a6a27ae3ff ("rockchip: rk3188: init CPU freq in clock driver"). Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| | * | rockchip: rk3188: Fix back to BROM bootAlexander Kochetkov2020-06-271-2/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the setting for noc remap out of SPL code. Changing noc remap inside SPL results in breaking back to BROM boot. Fixes commit c14fe2a8e192 ("rockchip: rk3188: Move SoC one time setting into arch_cpu_init()"). Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| | * | rk3399: Add BOOTENV_SF commandJagan Teki2020-06-271-0/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing BOOTENV_SF command in rk3399 config. Fix it. Fixes: f263b860acf8 ("rk3399: Enable SF distro bootcmd") Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reported-by: Suniel Mahesh <sunil@amarulasolutions.com> Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
| * | Merge branch 'for-tom' of https://github.com/lftan/u-bootTom Rini2020-06-261-1/+1
| |\ \ | | |/ | |/| | | | - arm: socfpga: misc_s10: Fix EMAC register address calculation
| | * arm: socfpga: misc_s10: Fix EMAC register address calculationLey Foon Tan2020-06-261-1/+1
| |/ | | | | | | | | | | | | | | | | Fix EMAC register address calculation, address need to multiply with sizeof(u32) or 4. This fixes write to invalid address. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * Merge tag 'efi-2020-07-rc6' of ↵Tom Rini2020-06-252-8/+9
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-07-rc6 Corrections for variable definitions are provided: * Correct size of secure boot related UEFI variables. * Do not use int for storing an enum. * Replace fdt_addr by fdt_size where needed.
| | * efi_loader: size of secure boot variablesHeinrich Schuchardt2020-06-241-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The variables SetupMode, AuditMode, DeployedMode are explicitly defined as UINT8 in the UEFI specification. The type of SecureBoot is UINT8 in EDK2. Use variable name secure_boot instead of sec_boot for the value of the UEFI variable SecureBoot. Avoid abbreviations in function descriptions. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| | * efi_loader: type of efi_secure_modeHeinrich Schuchardt2020-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | Variable efi_secure_mode is meant to hold a value of enum efi_secure_mode. So it should not be defined as int but as enum efi_secure_mode. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| | * cmd: bootefi: Fix fdt_size variable type in efi_carve_out_dt_rsv()Bin Meng2020-06-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Variable fdt_size should be of type 'fdt_size_t', not 'fdt_addr_t'. Fixes 0d7c2913fdf7: ("cmd: bootefi: Honor the address & size cells properties correctly") Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * | ARM: dts: imx6q-tbs2910: Fix Ethernet regressionFabio Estevam2020-06-251-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit: commit 6333cbb3817ed551cd7d4e92f7359c73ccc567fc Author: Michael Walle <michael@walle.cc> Date: Thu May 7 00:11:58 2020 +0200 phy: atheros: ar8035: remove static clock config We can configure the clock output in the device tree. Disable the hardcoded one in here. This is highly board-specific and should have never been enabled in the PHY driver. If bisecting shows that this commit breaks your board it probably depends on the clock output of your Atheros AR8035 PHY. Please have a look at doc/device-tree-bindings/net/phy/atheros.txt. You need to set "clk-out-frequency = <125000000>" because that value was the hardcoded value until this commit. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com> , the clock output setting for the AR803x driver is removed from being hardcoded in the PHY driver and should be passed via device tree instead. Update the device tree with the "qca,clk-out-frequency" property so that Ethernet can work again. Reported-by: Soeren Moch <smoch@web.de> Signed-off-by: Fabio Estevam <festevam@gmail.com> Tested-by: Soeren Moch <smoch@web.de>
| * | Merge tag 'mmc-2020-6-24' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini2020-06-245-19/+44
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Fix fsl_esdhc_imx tunning mask - Disable CMD CRC for normal tuning for fsl_esdhc_imx - Retry CM1 until emmc ready - Fix sdhci HISPD handling - Cache-aligned extcsd reading
| | * | mmc: sdhci: Fix HISPD bit handlingJagan Teki2020-06-241-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SDHCI HISPD bits need to be configured based on desired mmc timings mode and some HISPD quirks. So, handle the HISPD bit based on the mmc computed selected mode(timing parameter) rather than fixed mmc card clock frequency. Linux handle the HISPD similar like this in below commit but no SDHCI_QUIRK_BROKEN_HISPD_MODE, commit <501639bf2173> ("mmc: sdhci: fix SDHCI_QUIRK_NO_HISPD_BIT handling") This eventually fixed the mmc write issue observed in rk3399 sdhci controller. Bug log for refernece, => gpt write mmc 0 $partitions Writing GPT: mmc write failed ** Can't write to device 0 ** ** Can't write to device 0 ** error! Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Peng Fan <peng.fan@nxp.com> Peng Fan: added back "ctrl &= ~SDHCI_CTRL_HISPD;" per Jaehoon's suggestion Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> # roc-rk3399-pc Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
| | * | mmc: retry CMD1 in mmc_send_op_cond() until the eMMC is readyHaibo Chen2020-06-241-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to eMMC specification v5.1 section 6.4.3, we should issue CMD1 repeatedly in the idle state until the eMMC is ready even if mmc_send_op_cond() send CMD1 with argument = 0. Otherwise some eMMC devices seems to enter the inactive mode after mmc_complete_op_cond() issued CMD0 when the eMMC device is busy. Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| | * | mmc: fsl_esdhc_imx: disable the CMD CRC check for standard tuningHaibo Chen2020-06-242-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current code, we add 1ms dealy after each tuning command for standard tuning method. Adding this 1ms dealy is because USDHC default check the CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning IC logic do not wait for the tuning data sending out by the card, trigger the buffer read ready interrupt immediately, and step to next cycle. So when next time the new tuning command send out by USDHC, card may still not send out the tuning data of the upper command，then some eMMC cards may stuck, can't response to any command, block the whole tuning procedure. If do not check the CMD CRC for tuning, then do not has this issue. USDHC will wait for the tuning data of each tuning command and check them. If the tuning data pass the check, it also means the CMD line also okay for tuning. So this patch disable the CMD CRC check for tuning, save some time for the whole tuning procedure. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
| | * | mmc: fsl_esdhc_imx: fix the mask for tuning start pointHaibo Chen2020-06-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is TUNING_START_TAP, bit[7] of this register is to disable the command CRC check for standard tuning. So fix it here. Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX") Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
generated by cgit (git 2.34.1) at 2024-11-07 08:32:05 +0000