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* board: ge: bx50v3: remove redundant targetsIan Ray2018-05-176-113/+5
| | | | | | | | | This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3. The boards are identified automatically at runtime. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: configure video arguments using VPDIan Ray2018-05-172-4/+4
| | | | | | | | Configure video arguments at run-time instead of at compile-time. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: use VPD instead of compile-time checksIan Ray2018-05-171-7/+8
| | | | | | | | | | | | B{46}50v3s have an internal LCD that needs to be configured, in comparison with B850v3 which has only external displays. Use VPD instead of `CONFIG_TARGET_GE_B{4,6,8}50V3' compile-time checks to correct initialize video based on the monitor type. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: detect the monitor type by reading VPD earlierNandor Han2018-05-171-7/+29
| | | | | | | | | | | Move the VPD reading earlier in order to establish the monitor type as soon as possible. The configuration of the specific environment variables needs to be done later after the environment is configured. Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: fix display support for b{46}50v3Ian Ray2018-05-171-0/+2
| | | | | | | | | Enable Video PLL to fix non-working display support for Bx50v3 internal displays. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: unify two switch statementsNandor Han2018-05-171-10/+3
| | | | | | | | Simplify process_vpd() by unifying the switch statements handling product specific configurations. Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: rename detect_baseboard functionIan Ray2018-05-171-2/+2
| | | | | | | | | The detect_baseboard() function actually determines whether there is an internal LCD panel or not. Rename for clarity. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Nandor Han <nandor.han@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* board: ge: bx50v3: add winbond SPI NOR supportIan Ray2018-05-173-0/+3
| | | | | | | Add winbond SPI NOR support, which is being used by newer hardware. Signed-off-by: Ian Ray <ian.ray@ge.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
* ARM: re-enable MVGBE for edminiv2Chris Packham2018-05-161-0/+2
| | | | | | | This was unintentionally disabled when moving MVGBE to Kconfig. Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE") Signed-off-by: Chris Packham <judge.packham@gmail.com>
* usb: composite convert __set_bit to generic_set_bitBryan O'Donoghue2018-05-151-1/+1
| | | | | | | | | | | | | | | | | | Compiling the f_mass_storage driver for an x86 target results in a compilation error as set_bit and clear_bit are provided by bitops.h To address that situation we discussed on the list moving to genetic_set_bit() instead. Doing a quick grep for similar situations in drivers/usb shows that the composite device is using __set_bit(). This patch switches over to generic_set_bit to maintain consistency between the two gadget drivers. Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de>
* usb: f_mass_storage: Fix set_bit and clear_bit usageBryan O'Donoghue2018-05-151-22/+3
| | | | | | | | | | | | | | | | | | | | | Compiling the f_mass_storage driver for an x86 target results in a compilation error as set_bit and clear_bit are provided by bitops.h Looking at the provenance of the current u-boot code and the git change history in the kernel, it looks like we have a local copy of set_bit and clear_bit as a hold-over from porting the Linux driver into u-boot. These days __set_bit and __clear_bit are optionally provided by an arch and can be used as inputs to generic_bit_set and generic_bit_clear. This patch switches over to generic_set_bit and generic_clear_bit to accommodate. Tested on i.MX WaRP7 and Intel Edison Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Lukasz Majewski <lukma@denx.de> Cc: Marek Vasut <marex@denx.de>
* nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | nds2 bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in nds32 bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
* nds32: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Macpaul Lin <macpaul@andestech.com>
* nios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | nios2 bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in nios2 bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
* nios2: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Thomas Chou <thomas@wytron.com.tw>
* riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | | riscv bitops.h provides a __clear_bit() but does not define PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the architecturally provided __clear_bit(). This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in riscv bitops.h will be called whenever generic_clear_bit() is called - as opposed to the default cross-platform generic_clear_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
* riscv: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | | riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Rick Chen <rick@andestech.com> Cc: Greentime Hu <green.hu@gmail.com>
* x86: Define PLATFORM__SET_BIT for generic_set_bit()Bryan O'Donoghue2018-05-151-0/+2
| | | | | | | | | | | | | | x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT as a result generic_set_bit() is used instead of the architecturally provided __set_bit(). This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86 bitops.h will be called whenever generic_set_bit() is called - as opposed to the default cross-platform generic_set_bit(). Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com>
* ARM: mvebu: a38x: Add missing SPDX license identfierChris Packham2018-05-151-1/+3
| | | | | | | | mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code. When imported into u-boot we need to add the appropriate SPDX tag and re-format it slightly. Signed-off-by: Chris Packham <judge.packham@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2018-05-158-4/+212
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| * dts: sunxi: add PWM node for sun50iVasily Khoruzhick2018-05-151-0/+9
| | | | | | | | | | | | Add PWM definition to sun50i-a64.dtsi Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
| * pwm: sunxi: add support for PWM found on Allwinner A64Vasily Khoruzhick2018-05-155-0/+199
| | | | | | | | | | | | | | This commit adds basic support for PWM found on Allwinner A64. It can be used for pwm_backlight driver (e.g. for Pinebook) Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
| * video: dw_hdmi: fix HSYNC and VSYNC polarity settingsVasily Khoruzhick2018-05-151-2/+2
| | | | | | | | | | | | | | | | | | Currently dw_hdmi configures HSYNC polarity using VSYNC setting from EDID and vice versa. Fix it, since it breaks displays where HSYNC and VSYNC polarity differs Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
| * sunxi: video: HDMI: use correct bits for HSYNC and VSYNC polarity.Vasily Khoruzhick2018-05-151-2/+2
| | | | | | | | | | | | | | HSYNC is bit 8, and VSYNC is bit 9. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
* | mmc: sdhci: Check that ops are definedRamon Fried2018-05-141-2/+2
| | | | | | | | | | | | | | The check is necessary to avoid NULL pointer dereference. Signed-off-by: Ramon Fried <ramon.fried@gmail.com> Reviewed-by: Michal Simek <michal.simek@xilinx.com>
* | net: add Kconfig for MVGBEChris Packham2018-05-1437-3/+74
| | | | | | | | | | | | | | Add Kconfig for MVGBE and update boards to select this. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | net: mvgbe: remove CONFIG_DOVEChris Packham2018-05-142-9/+0
| | | | | | | | | | | | | | | | Nothing defines CONFIG_DOVE so remove the code that uses it. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: bootp: Fix compile error processing ntpserver optionChris Packham2018-05-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the following configuration is set # CONFIG_CMD_DHCP is not set CONFIG_CMD_BOOTP=y CONFIG_BOOTP_NTPSERVER=y The following compile error is observed error: used struct type value where scalar is required if (net_ntp_server) ^~~~~~~~~~~~~~ Resolve this by checking net_ntp_server.s_addr instead. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: Add Kconfig option for BOOTP_NTPSERVERChris Packham2018-05-144-2/+5
| | | | | | | | | | | | | | | | Add a Kconfig option for BOOTP_NTPSERVER to enable the DHCP/BOOTP option to configure the sntp server address. Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | treewide: Move CONFIG_PHY_MARVELL to KconfigMario Six2018-05-14210-19/+192
|/ | | | | | | | | | | The CONFIG_PHY_MARVELL has already been migrated to Kconfig (some boards already had it in their Kconfig), but had not been moved for older boards. Move it to the defconfigs for all boards. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini2018-05-142-0/+12
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| * rockchip: clk: rk3288: handle clk_enable requests for GMACJonathan Gray2018-05-141-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since b0ba1e7e9d9b9441a18048ec67a3b3100c096975 (rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC) Ethernet no longer probes on RK3288. Add no-ops for GMAC clocks observed to be requested which match the clk_enable cases in RK3368 and RK3399. Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Cc: Wadim Egorov <w.egorov@phytec.de> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
| * rockchip: set SYS_NS16550_MEM32 for all SoCsJonathan Gray2018-05-141-0/+2
|/ | | | | | | | | | | | | | | | Add back part of patch send out as 'rockchip: enable SYS_NS16550 for all SoCs by default' that seems to have gotten lost when it got merged to set SYS_NS16550_MEM32. Allows serial output to work on tinker-rk3288 again after c3c0331db1fb7b1f4ff41e144fc04353b37c785c. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jonathan Gray <jsg@jsg.id.au> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* Merge git://git.denx.de/u-boot-marvellTom Rini2018-05-1489-6283/+9734
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| * phy: marvell: a3700: Fix compatible string for ehciMarek Behún2018-05-141-1/+1
| | | | | | | | | | | | | | | | The DTS file for armada-37xx uses the string "marvell,armada3700-ehci", but the code searched for "marvell,armada-3700-ehci". Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: use non-zero size for ddr scrubbingChris Packham2018-05-143-1/+5
| | | | | | | | | | | | | | | | Make ddr3_calc_mem_cs_size() global scope and use it in ddr3_new_tip_ecc_scrub to correctly initialize all of DDR memory. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: restore support for setting timingChris Packham2018-05-149-11/+29
| | | | | | | | | | | | | | | | | | | | This restores support for configuring the timing mode based on the ddr_topology. This was originally implemented in commit 90bcc3d38d2b ("driver/ddr: Add support for setting timing in hws_topology_map") but was removed as part of the upstream sync. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: sync ddr training code with upstreamChris Packham2018-05-1456-5139/+7944
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git. The upstream code is incorporated omitting the ddr4 and apn806 and folding the nested a38x directory up one level. After that a semi-automated step is used to drop unused features with unifdef find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \ xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \ -UCONFIG_APN806 -UCONFIG_MC_STATIC \ -UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \ -UCONFIG_64BIT INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE. Some now empty files are removed and the ternary license is replaced with a SPDX GPL-2.0+ identifier. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: remove some unused codeChris Packham2018-05-147-794/+0
| | | | | | | | | | | | | | | | | | No in-tree code defines SUPPORT_STATIC_DUNIT_CONFIG or STATIC_ALGO_SUPPORT. Remove ddr3_a38x_mc_static.h and use unifdef to remove unused sections in the rest of the ddr/marvell/a38x code. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: move sys_env_device_rev_getChris Packham2018-05-143-27/+24
| | | | | | | | | | | | | | | | | | | | Move sys_env_device_rev_get() from the ddr training code to sys_env_lib.c (which currently resides with the serdes code). This brings sys_env_device_rev_get() into line with sys_env_device_id_get() and sys_env_model_get(). Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESSChris Packham2018-05-142-2/+1
| | | | | | | | | | | | | | | | | | | | | | PEX_CFG_DIRECT_ACCESS was defined in ddr3_hws_hw_training_def.h despite only being used in the serdes code. Move this definition to ctrl_pex.h where all the other PEX defines are. Also remove the duplicate definition of PEX_DEVICE_AND_VENDOR_ID which is already defined in ctrl_pex.h. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * arm64: mvebu: Add basic support for the Turris Mox boardMarek Behún2018-05-149-1/+463
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds basic support for the Turris Mox board from CZ.NIC, which is currently being crowdfunded on Indiegogo. Turris Mox is as modular router based on the Armada 3720 SOC (same as EspressoBin). The basic module can be extended by different modules. The device tree binary for the kernel can be dependent on which modules are connected, and in what order. Because of this, the board specific code creates in U-Boot a variable called module_topology, which carries this information. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
| * watchdog: Add support for Armada 37xx CPU watchdogMarek Behún2018-05-144-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the CPU watchdog found on Marvell Armada 37xx SoCs. There are 4 counters which can be set as CPU watchdog counters. This driver uses the second counter (ID 1, counting from 0) (Marvell's Linux also uses second counter by default). In the future it could be adapted to use other counters, with definition in the device tree. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
| * net: mvneta: Fix fault when wrong device treeMarek Behún2018-05-141-0/+4
| | | | | | | | | | | | | | | | | | | | The driver does not check id phy_connect failed (for example on wrong property name in device tree). In such a case a fault occurs and the CPU is restarted. Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * phy: marvell: core: Cosmetic fixesMarek Behún2018-05-142-53/+52
| | | | | | | | | | | | | | | | | | Move the reg_set* functions into comphy.h as static inline functions. Change return type of get_*_string to const char *. Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * clk: armada-37xx: Support soc_clk_dumpMarek Behún2018-05-142-1/+37
| | | | | | | | | | | | | | | | Add support for the clk dump command on Armada 37xx. Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * spi: mvebu_a3700_spi: Use Armada 37xx clk driver for SPI clock frequencyMarek Behún2018-05-145-26/+37
| | | | | | | | | | | | | | | | | | | | | | | | Since now we have driver for clocks on Armada 37xx, use it to determine SQF clock frequency for the SPI driver. Also change the default config files for Armada 37xx devices so that the clock driver is enabled by default, otherwise the SPI driver cannot be enabled. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
| * driver: clk: Add support for clocks on Armada 37xxMarek Behún2018-05-147-0/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The drivers are based on Linux driver by Gregory Clement. The TBG clocks support only the .get_rate method. - since setting rate is not supported, the driver computes the rates when probing and so subsequent calls to the .get_rate method do not read the corresponding registers again The peripheral clocks support methods .get_rate, .enable and .disable. - the .set_parent method theoretically could be supported on some clocks (the parent would have to be one of the TBG clocks) - the .set_rate method would have to try all the divider values to find the best approximation of a given rate, and it doesn't seem like this should be needed in U-Boot, therefore not implemented Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * phy: marvell: a3700: Save/restore selector reg in SGMII initMarek Behún2018-05-142-2/+8
| | | | | | | | | | | | | | | | | | | | | | In SGMII initialization PIN_PIPE_SEL has to be zero when resetting the PHY. Since comphy_mux already set the selector register to correct values, we have to store it's value before setting it to 0 and restore it after SGMII init. Signed-off-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * phy: marvell: a3700: Use comphy_mux on Armada 37xx.Marek Behún2018-05-142-2/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lane 0 supports SGMII1 and USB3. Lane 1 supports SGMII0 and PEX0. Lane 2 supports SATA0 and USB3. This is needed for Armada 37xx. This introduces new device tree bindings. AFAIK there is currently no driver for Armada 37xx comphy in Linux. When such a driver will be pushed into Linux, this will need to be rewritten accordingly. Signed-off-by: Marek Behun <marek.behun@nic.cz> Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit (git 2.34.1) at 2024-10-02 19:26:59 +0000