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* Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'Albert ARIBAUD2014-07-2817-7/+3026
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| * arm: rmobile: Add support Alt boardNobuhiro Iwamatsu2014-07-246-0/+1305
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The alt board has R8A7794, 1GB DDR3-SDRAM, USB, Ethernet, QSPI, MMC, SDHI and more. This commit supports the following functions: - DDR3-SDRAM - SCIF - I2C - Ethernet - QSPI Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * arm: rmobile: Add support R8A7794Nobuhiro Iwamatsu2014-07-248-2/+1712
| | | | | | | | | | | | | | | | Renesas R8A7794 is CPU with Cortex-A15. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * serial: sh: Add support R8A7794Nobuhiro Iwamatsu2014-07-241-1/+2
| | | | | | | | | | | | This adds the preset value to register for R8A7794. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * net: sh-eth: Add support R8A7794Nobuhiro Iwamatsu2014-07-242-4/+7
| | | | | | | | | | | | | | R8A7794 has the same sh-ether IP core as other SH/rmobile. This patch adds support of R8A7794. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-2838-264/+1010
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| * | sunxi: use setbits_le32 to enable the DMA clockIan Campbell2014-07-181-2/+1
| | | | | | | | | | | | | | | Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: add gpio driverIan Campbell2014-07-184-0/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables CONFIG_CMD_GPIO for the Allwinner (sunxi) platform as well as providing the common gpio API (gpio_request/free, direction in/out, get/set etc). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Ma Haijun <mahaijuns@gmail.com> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: Henrik Nordström <henrik@henriknordstrom.net> Cc: Tom Cubie <Mr.hipboi@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: add Cubieboard2 supportIan Campbell2014-07-183-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | This is a sun7i (A20) based followup to the sun4i (A10) Cubieboard. It has GMAC using MII mode. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: use random parts of SID to set ethaddrJonathan Liu2014-07-182-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to the USB NIC found on OMAP5uEVM, PandaBoard and BeagleBoard-XM boards, the sunxi SoCs have a NIC onboard without an embedded MAC address. Just like the omap used on these boards, the sunxi SoCs do have a unique chip id, in the form of the 128 bit SID register: http://linux-sunxi.org/SID_Register_Guide So mimick the BeagleBoard-XM board code (commit 548a64d8) and use the chip id to generate a unique fixed MAC address. We check for the SID not being all 0, since some early A20 batches shipped without having there SID programmed. Note we use specific parts of the 128 bits, since some parts indicate the SoC family / revision, and thus are fixed. The algorithm for this was taken from the linux-sunxi.org kernels. Signed-off-by: Jonathan Liu <net147@gmail.com> [hdegoede@redhat.com: Expanded the commit message with some more info] Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Fix reset hang on sun5iHans de Goede2014-07-181-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | Do the same as the Linux kernel does, this fixes the SoC hanging on reset about 50% of the time. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add axp152 pmic supportHans de Goede2014-07-185-1/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the x-powers axp152 pmic which is found on most A10s boards and enable it for the r7-tv-dongle board. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add axp209 pmic supportHenrik Nordstrom2014-07-189-3/+215
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the x-powers axp209 pmic which is found on most A10, A13 and A20 boards. And enable AXP209 support for the Cubietruck and Cubieboard boards. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add i2c supportHans de Goede2014-07-187-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the i2c controller found on all Allwinner sunxi SoCs, this is the same controller as found on the Marvell orion5x and kirkwood SoC families, with a slightly different register layout, so this patch uses the existing mvtwsi code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Acked-By: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Heiko Schocher <hs@denx.de> [ ijc -- updated u-boot-spl-fel.lds ]
| * | mvtwsi: convert to CONFIG_SYS_I2C frameworkHans de Goede2014-07-164-41/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Note this has only been tested on Allwinner sunxi devices (support for which gets introduced by a later patch). The kirkwood changes have been compile tested using the wireless_space board config, the orion5x changes have been compile tested using the edminiv2 board config. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Heiko Schocher <hs@denx.de>
| * | sunxi: Avoid unused variable warning.Ian Campbell2014-07-081-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Mark rc as __maybe_unused since it is infact unused on systems with neither EMAC nor GMAC. Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Acked-by: Tom Rini <trini@ti.com>
| * | sunxi: Add Ian Campbell and Hans de Goede as cubietruck board-maintainersHans de Goede2014-07-061-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add support for using MII phy-s with the GMAC nicChen-Yu Tsai2014-07-061-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many A20 boards (ie Cubieboard2, A20-OLinuXino_MICRO) use an 100 Mbit MII phy together with the GMAC nic found in the A20 SoC, add support for this (this will get used when we add these boards in a later patch). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add emac glue, enable emac on the cubieboardHans de Goede2014-07-063-1/+14
| | | | | | | | | | | | | | | Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | net: Rename and cleanup sunxi (Allwinner) emac driverStefan Roese2014-07-063-74/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There have been 3 versions of the sunxi_emac support patch during its development. Somehow version 2 ended up in upstream u-boot where as the u-boot-sunxi git repo got version 3. This bumps the version in upstream u-boot to version 3 of the patch: - Initialize MII clock earlier so mii access to allow independent use - Name change from WEMAC to EMAC to match mainline kernel & chip manual - Cosmetic code cleanup Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add sun5i supportHans de Goede2014-07-0610-0/+135
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based boards. The only differences compared to the already supported sun4i and sun7i families are all in the DRAM controller initialization: -Different hcpr values -Different MBUS settings -Some other small initialization changes Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Add sun4i supportHans de Goede2014-07-067-3/+143
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Allwinner A10 SoC also known as the Allwinner sun4i family, and add the Cubieboard board which uses the A10 SoC. Compared to sun7 only the DRAM controller is a bit different: -Controller reset bits are inverted, but only for Rev. A -Different hpcr values -No MBUS on sun4i -Various other initialization changes Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Implement reset_cpuHans de Goede2014-07-062-0/+12
| | | | | | | | | | | | | | | | | | | | | There is no way to reset the cpu, so use the watchdog for this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Remove mmc DMA supportHans de Goede2014-07-062-135/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: Fix u-boot-spl.lds to refer to .vectorsHans de Goede2014-07-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adjust the u-boot-spl.lds linker script to match the changes made in the 41623c91b09a0c865fab41acdaff30f060f29ad6 "arm: move exception handling out of start.S files" commit. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sunxi: mksunxiboot: Fix loading of files with a size which is not a multiple ↵Hans de Goede2014-07-061-6/+4
| |/ | | | | | | | | | | | | | | | | | | | | | | | | of 4 We should not be aligning the amount of bytes which we try to read from the disk, this leads to trying to read more bytes then there are which fails. file_size is already aligned to BLOCK_SIZE before being stored in img.header.length, so there is no need for load_size at all. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'Albert ARIBAUD2014-07-263-2/+7
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| * | zynq: disable -Wstrict-prototypes option for ps7_init.cMasahiro Yamada2014-07-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The files ps7_init.c and ps7_init.h are supposed to be generated by hw projects such as Vivado, PlanAhead and then to be copied into board/xilinx/zynq directory. But some prototypes in them cause annoying warning messages: CC spl/board/xilinx/zynq/ps7_init.o In file included from board/xilinx/zynq/ps7_init.c:50:0: board/xilinx/zynq/ps7_init.h:137:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.h:138:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.h:139:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.h:145:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.c:12602:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.c:12723:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.c:12742:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.c:12761:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] board/xilinx/zynq/ps7_init.c:12854:6: warning: function declaration isn't a prototype [-Wstrict-prototypes] The prototypes should be int ps7_init(void); int ps7_post_config(void); int ps7_debug(void); rather than int ps7_init(); int ps7_post_config(); int ps7_debug(); We do not want to be bothered because of automatically generated files. But we cannot touch the external projects for now. What we can do is to disable -Wstrict-prototypes for ps7_init.c Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Michal Simek <michal.simek@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Show ECC status on the same line as DRAM sizeMichal Simek2014-07-231-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this patch is DRAM size one line below DRAM: which is not nice Origin: I2C: ready DRAM: Memory: ECC disabled 1 GiB MMC: zynq_sdhci: 0 Fixed by this patch: I2C: ready DRAM: ECC disabled 1 GiB MMC: zynq_sdhci: 0 Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | ARM: zynq: Enable generic board for Xilinx ZynqMichal Simek2014-07-231-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable CONFIG_SYS_GENERIC_BOARD for all Zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [on ZC706 board]
* | | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2014-07-253-160/+4
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| * | | sh: unify sh2/sh3/sh4 linker scriptsMasahiro Yamada2014-07-243-160/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linker scripts of sh2/sh3/sh4 are almost the same. The difference among them is essentially only one line. They can be consolidated into a single file, arch/sh/cpu/u-boot.lds by re-writing the diffrent line as follows: KEEP(*/start.o (.text)) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | | buildman: Avoid retrying a build if it definitely failedSimon Glass2014-07-231-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After a build fails buildman will reconfigure and try again, if it did not reconfigure before the build. However it doesn't actually keep track of whether it did reconfigure on the previous attempt. Fix that logic to avoid a pointless rebuild. This speeds things up quite a bit for failing builds. Previously they would always be built twice. Change-Id: Ib37f21320baa7c60bed98f4042c0b7ed7c0dc85e Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | buildman: Add -F flag to retry failed buildsSimon Glass2014-07-233-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generally a build failure with a particular commit cannot be fixed except by changing that commit. Changing the commit will automatically cause buildman to retry when you run it again: buildman sees that the commit hash is different and that it has no previous build result for the new commit hash. However sometimes the build failure is due to a toolchain issue or some other environment problem. In that case, retrying failed builds may yield a different result. Add a flag to retry failed builds. This differs from the force rebuild flag (-f) in that it will not rebuild commits which are already marked as succeeded. Series-to: u-boot Change-Id: Iac4306df499d65ff0888b1c60f06fc162a6faad8
* | | | dm: Give the demo uclass a nameSimon Glass2014-07-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Uclasses should be named, so add a name for the demo uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Add dm_scan_other() to locate board-specific devicesSimon Glass2014-07-232-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards will have devices which are not in the device tree and do not have platform data. They may be programnatically created, for example. Add a hook which boards can use to bind those devices early in boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Improve errors and warnings in lists_bind_fdt()Simon Glass2014-07-231-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a debug message for when a device tree node has no driver. Also reword the warning when a device fails to bind, which was misleading. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Add child_pre_probe() and child_post_remove() methodsSimon Glass2014-07-235-2/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices (particularly bus devices) must track their children, knowing when a new child is added so that it can be set up for communication on the bus. Add a child_pre_probe() method to provide this feature, and a corresponding child_post_remove() method. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Introduce per-child data for devicesSimon Glass2014-07-235-8/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some device types can have child devices and want to store information about them. For example a USB flash stick attached to a USB host controller would likely use this space. The controller can hold information about the USB state of each of its children. The data is stored attached to the child device in the 'parent_priv' member. It can be auto-allocated by dm when the child is probed. To do this, add a per_child_auto_alloc_size value to the parent driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Add functions to access a device's childrenSimon Glass2014-07-234-1/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices can have childen that can be addressed by a simple index, the sequence number or a device tree offset. Add functions to access a child in each of these ways. The index is typically used as a fallback when the sequence number is not available. For example we may use a serial UART with sequence number 0 as the console, but if no UART has sequence number 0, then we can fall back to just using the first UART (index 0). The device tree offset function is useful for buses, where they want to locate one of their children. The device tree can be scanned to find the offset of each child, and that offset can then find the device. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Provide a function to scan child FDT nodesSimon Glass2014-07-239-42/+166
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present only root nodes in the device tree are scanned for devices. But some devices can have children. For example a SPI bus may have several children for each of its chip selects. Add a function which scans subnodes and binds devices for each one. This can be used for the root node scan also, so change it. A device can call this function in its bind() or probe() methods to bind its children. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Tidy up some header file commentsSimon Glass2014-07-235-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | Fix up the style of a few comments and add/clarify a few others. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | fdt: Add a function to get the node offset of an aliasSimon Glass2014-07-232-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | This simple function returns the node offset of a named alias. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Avoid accessing uclasses before they are readySimon Glass2014-07-233-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | Don't allow access to uclasses before they have been initialised. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Allow a device to be found by its FDT offsetSimon Glass2014-07-234-1/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each device that was bound from a device tree has an node that caused it to be bound. Add functions that find and return a device based on a device tree offset. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Display the sequence number for each deviceSimon Glass2014-07-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add this information to 'dm tree' and 'dm uclass' commands. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Introduce device sequence numberingSimon Glass2014-07-238-8/+347
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot it is pretty common to number devices from 0 and access them on the command line using this numbering. While it may come to pass that we will move away from this numbering, the possibility seems remote at present. Given that devices within a uclass will have an implied numbering, it makes sense to build this into driver model as a core feature. The cost is fairly small in terms of code and data space. With each uclass having numbered devices we can ask for SPI port 0 or serial port 1 and receive a single device. Devices typically request a sequence number using aliases in the device tree. These are resolved when the device is probed, to deal with conflicts. Sequence numbers need not be sequential and holes are permitted. At present there is no support for sequence numbers using static platform data. It could easily be added to 'struct driver_info' if needed, but it seems better to add features as we find a use for them, and the use of -1 to mean 'no sequence' makes the default value somewhat painful. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Avoid activating devices in 'dm uclass' commandSimon Glass2014-07-231-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command currently activates devices as it lists them. This is not desirable since it changes the system state. Fix it and avoid printing a newline if there are no devices in a uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | dm: Move device display into its own functionSimon Glass2014-07-231-8/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The device display for 'dm tree' and 'dm uclass' is mostly the same, so move it into a common function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | | fdt: Add a function to get the alias sequence of a nodeSimon Glass2014-07-232-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aliases are used to provide U-Boot's numbering of devices, such as: aliases { spi0 = "/spi@12330000"; } spi@12330000 { ... } This tells us that the SPI controller at 12330000 is considered to be the first SPI controller (SPI 0). So we have a numbering for the SPI node. Add a function that returns the numbering for a node assume that it exists in the list of aliases. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2024-07-01 22:08:52 +0000