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* | cmd: pmic: update help descriptionKlaus Goger2018-01-191-1/+1
| | | | | | | | | | | | | | | | Change help description to match the style of the other U-Boot commands and get rid of the leading whitespace. Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Reviewed-by: Lukasz Majewski <lukma@denx.de>
* | fs/fat: remove distractive message in file_fat_read_at()Heinrich Schuchardt2018-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | The message "reading %s\n" may be interesting when debugging but otherwise it is superfluous. Only output the message when debugging. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | fs: remove distractive message in fs_read()Heinrich Schuchardt2018-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The message "** %s shorter than offset + len **\n" may be interesting when debugging but it does not indicate an error. So we should not write it if we are not in debug mode. Fixes: 7a3e70cfd88c fs/fs.c: read up to EOF when len would read past EOF Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | DA850evm: Remove dead codeAdam Ford2018-01-191-6/+0
| | | | | | | | | | | | | | There is an #ifdef and #endif with nothing in between. This patch simply removes this dead/useless code. Signed-off-by: Adam Ford <aford173@gmail.com>
* | ARM: dts: omap3-beagle{-xm}: Enable DM and devicetree for BeagleBoardDerald D. Woods2018-01-193-92/+69
| | | | | | | | | | This commit updates the configuration files needed to support OF_CONTROL on the OMAP3 BeagleBoard(s).
* | ARM: dts: omap3-beagle{-xm}: Add support for BeagleBoardDerald D. Woods2018-01-197-0/+953
| | | | | | | | | | | | | | | | This commit adds OMAP3 BeagleBoard devicetree files from Linux v4.15-rc5. This includes standard OMAP34XX board revisions as well as the 'xM' which is OMAP36XX. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
* | env: ti: Select dtb name for dra76x and am574Lokesh Vutla2018-01-191-1/+3
| | | | | | | | | | | | Select dtb name for am574x-idk and dra76x evm with acd package. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: dts: am574x-idk: Add initial supportLokesh Vutla2018-01-199-94/+130
| | | | | | | | | | | | Add initial dts support for am574x-idk Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am57xx: Enable CMD_DDR3Lokesh Vutla2018-01-191-0/+1
| | | | | | | | | | | | Enable CMD_DDR3 on all am57xx based platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am574x-idk: Update pinmux using latest PMTLokesh Vutla2018-01-192-1/+305
| | | | | | | | | | | | | | | | Update the board pinmux for AM574x-IDK board using latest PMT[1] and the board files named am574x_idk_v1p3b_sr2p0 that were auto generated on 13th October, 2017 by "Ahmad Rashed <a-rashed@ti.com>". Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am574x-idk: Add ddr data supportLokesh Vutla2018-01-191-3/+44
| | | | | | | | | | | | | | | | | | | | | | | | AM574x-idk has the following DDR parts attached: EMIF1: MT41K256M16HA (1GB with ECC) EMIF2: MT41K256M16HA (1GB without ECC) Enabling 2GB DDR without interleaving between EMIFs. And enabling ECC on EMIF1. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
* | board: ti: am574x-idk: Add hw data supportLokesh Vutla2018-01-192-3/+7
| | | | | | | | | | | | Update prcm, voltages and pinmux support for am574x-idk. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: am574x-idk: Add epprom supportLokesh Vutla2018-01-191-0/+5
| | | | | | | | | | | | | | am574x-idk is a board based on TI's am574 processor Add eeprom support. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: dra762: Add support for device package identificationLokesh Vutla2018-01-198-6/+91
| | | | | | | | | | | | | | | | | | | | | | | | DRA762 comes in two packages: - ABZ: Pin compatible package with DRA742 with DDR@1333MHz - ACD: High performance(OPP_PLUS) package with new IPs Both the above packages uses the same IDCODE hence needs to differentiate using package information in DIE_ID_2. Add support for the same. Also update clock, ddr, emif information. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | cmd: ti: Generalize cmd_ddr3 commandLokesh Vutla2018-01-193-30/+123
| | | | | | | | | | | | | | | | | | Keystone and DRA7 based TI platforms uses same EMIF memory controller. cmd_ddr3 command is customized for keystone platforms, make it generic so that it can be re used for DRA7 platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | arm: keystone: Move cmd_ddr3 to a common placeLokesh Vutla2018-01-197-4/+29
| | | | | | | | | | | | | | | | | | Move cmd_ddr3 to cmd/ti in order to make it build for non-keystone TI platforms. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Rename to ddr3.c not cmd_ddr3.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: emif-common: Add suppport for enabling ECCLokesh Vutla2018-01-192-1/+119
| | | | | | | | | | | | | | | | | | For data integrity, the EMIF1 supports ECC on the data written or read from the SDRAM. Add support for enabling ECC support in EMIF1. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
* | arm: emif-common: Add ecc specific emif registersLokesh Vutla2018-01-192-4/+19
| | | | | | | | | | | | | | | | This is a slight difference in emif_ddr_phy_status register offsets for DRA7xx EMIF and older versions. And ecc registers are available only in DRA7xx EMIC. Add support for this difference and ecc registers. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | drivers: dma: ti-edma3: add support for memory fillTero Kristo2018-01-192-7/+50
| | | | | | | | | | | | | | Add support for simple memory fill operation. With large data sizes it is much faster to use EDMA for memory fill rather than CPU. Signed-off-by: Tero Kristo <t-kristo@ti.com>
* | dt-bindings: leds: adopt Linux PCA9532 binding constantsFelix Brack2018-01-191-0/+18
| | | | | | | | | | | | | | | | | | I'm working on a v2 patch to add support for a board named pdu001. Its Linux DTS file uses the include file added by this patch. To keep Linux and U-Boot DTS files in sync U-Boot requires a copy of this file, although there is no driver for NXP's PCA9532 i2c LED driver chip (yet). Signed-off-by: Felix Brack <fb@ltec.ch>
* | board: ti: k2g: Make ddr3* declarations as staticLokesh Vutla2018-01-191-5/+5
| | | | | | | | | | | | | | | | All ddr3_emif declarations are not used outside ddr3_k2g.c file. So make all of them as static. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | board: ti: dra76: mux wakeup2 as gpio1_2Tomi Valkeinen2018-01-191-1/+1
| | | | | | | | | | | | | | gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux the pin as gpio and PIN_INPUT. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
* | arm: am33xx: Avoid writing into reserved DPLL dividerLokesh Vutla2018-01-191-6/+6
| | | | | | | | | | | | | | | | | | DPLL DRR doesn't have an M4 divider. But the clock driver is trying to configure M4 divider as 4(writing into a reserved register). Fixing it by making M4 divider as -1. Reported-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | tools: omapimage: Fix mismatch of image size in headerLokesh Vutla2018-01-191-1/+1
| | | | | | | | | | | | | | | | | | | | The size field in GP header that is expected by ROM is size of the image + size of the header. But omapimage tool is updating size as image size + 2 * header size. Remove this extra header size bytes. Reported-by: Denys Dmytriyenko <denys@ti.com> Debugged-by: Madan Srinivas <madans@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s supportRex Chang2018-01-197-13/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added support for K2G EVM with FlipChip SoC of which ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also backward compatible with old revision EVM and EVM with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s. The new SoC supports 2 different speeds at 1GHz and 600MHz. Modyfied the CPU Name to show which SoC is used in the EVM. Modified the DDR3 configuration to reflect New SoC supports 2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT. Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz, and set the u-boot env variable board_name accordingly. Modified findfdt script in u-boot environment variable to include new k2g board type. Signed-off-by: Rex Chang <rchang@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | configs: k2g_evm: Allocate more space for u-bootLokesh Vutla2018-01-191-1/+1
| | | | | | | | | | | | | | Now that we have multi dtb enabled in u-boot allocate 128K space for u-boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVMVignesh R2018-01-192-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance to use if any at all is done through CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is handled in U-boot. Handle this additional pinmuxing requirement in U-boot to ensure that MCAN is used by default via the DCAN1 pins. Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> [fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN] Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
* | mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bitKishon Vijay Abraham I2018-01-192-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | omap_hsmmc driver uses "|" in a couple of places for disabling a bit. While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a _mask_ argument to take care of resetting a bit), it's incorrectly used for resetting flags in "omap_hsmmc_send_cmd". Fix it here by using "&= ~()" to reset a bit. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: omap_hsmmc: Enable Auto command (CMD12) enableKishon Vijay Abraham I2018-01-191-1/+5
| | | | | | | | | | | | | | | | | | | | Instead of sending STOP TRANSMISSION command from MMC core, enable the auto command feature so that the Host Controller issues CMD12 automatically when last block transfer is completed. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mmc: omap_hsmmc: Add support for DMA (ADMA2)Kishon Vijay Abraham I2018-01-192-4/+213
| | | | | | | | | | | | | | | | | | | | | | The omap hsmmc host controller can have the ADMA2 feature. It brings better read and write throughput. On most SOC, the capability is read from the hl_hwinfo register. On OMAP3, DMA support is compiled out. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | omap: Update the base address of the MMC controllersJean-Jacques Hiblot2018-01-185-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | Align the base address defined in header files with the base address used in the DTS. This will facilitate the introduction of the DMA support. Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at the top. This region will be used to determine if the controller supports DMA transfers Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"Jean-Jacques Hiblot2018-01-182-31/+7
|/ | | | | | | | | This reverts commit 46831c1a4cda75d92f7ad18d4e2b1eb196c62b2f. This reserved area at the beginning of struct hsmm, will be used later to support ADMA Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2018-01-1730-114/+439
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| * armv8: ls1088ardb: Add environment variable address location for QSPI-NORAshish Kumar2018-01-173-2/+6
| | | | | | | | | | Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * env: sf: Add support for env init for QSPI-NORAshish Kumar2018-01-171-0/+21
| | | | | | | | | | | | | | ENV variables can now be used before relocation. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1088: Add USB and PCI configs in SD-BOOT defconfigAshish Kumar2018-01-172-0/+24
| | | | | | | | | | Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls1012a: Add sata distro boot supportYuantian Tang2018-01-173-19/+11
| | | | | | | | | | | | | | | | Sata is equipped on ls1012a and can be a boot source. Add sata boot support as an option if available. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm64: ls1046a: Add sata distro boot supportYuantian Tang2018-01-173-22/+13
| | | | | | | | | | | | | | | | Sata is equipped on ls1046a and can be a boot source. Add sata boot support as an option if available. Signed-off-by: Tang Yuantian <andy.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * freescale: Ensure common commands are not included in SPL binaryTom Rini2018-01-172-7/+9
| | | | | | | | | | | | | | | | | | | | | | Both the "qixis_reset" and esbc_validate" commands can only be used in full U-Boot so do not build them in SPL. As part of this rework the qixis code to declare things as static and make use of __weak for function aliases. Cc; York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls1021atwr: Rework local commands to not be included in SPLTom Rini2018-01-151-46/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move some of the code for the "lane_bank" and "cpld" code local commands so that they are not built for SPL as they can only be used in full U-Boot. This means we can mark a few functions as static as well now. Cc: Alison Wang <alison.wang@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Tested-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * powerpc: P1010RDB: Rework local command to not be included in SPLTom Rini2018-01-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so it is not included in SPL. Cc: Qiang Zhao <qiang.zhao@nxp.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
| * board/ls2081ard: Correct code to get QMAP value in checkboardPriyanka Jain2018-01-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | QMAP value contains information about QSPI chip-selects. These bits are used to display information of boot device in checkboard() function. QMAP value is stored in most significant 3-bits of 8-bit register brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using below logic: (brdcfg[0] >> 5) & 0x7 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board/ls2081ardb: Update board related printsPriyanka Jain2018-01-151-1/+1
| | | | | | | | | | | | | | | | | | Remove Board Arch print as its value is always constant '1' and does not contain any important information to display during boot. Add print to display Board FPGA version. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITESumit Garg2018-01-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | As part of chain of trust with confidentiality along with distro boot, linux kernel image needs to be stored in encrypted form on ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of Secure boot on ARM based platforms. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1088a: configure PMU's PCTBENR to enable WDTZhang Ying-224552018-01-151-2/+2
| | | | | | | | | | | | | | | | | | The SP805-WDT module on LS1088A requires configuration of PMU's PCTBENR register to enable watchdog counter decrement and reset signal generation. The watchdog clock needs to be enabled first. Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * serial: lpuart: Proper device identificationSriram Dash2018-01-151-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | Identify and distinguish between platform device type of MX7ULP and LS1021A. This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP support"). Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: ls1012a: LS1012A-2G5RDB board supportBhaskar Upadhaya2018-01-1510-2/+293
| | | | | | | | | | | | | | | | LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/kconfig: Align boards of same family at one placeBhaskar Upadhaya2018-01-151-2/+3
| | | | | | | | | | | | | | Align boards belonging to LS1012A, LS2080A SoC at one place. Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | tools: Update python "help" tests to cope with "more" odditiesTom Rini2018-01-162-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases when "more" is told to page a given file it will prepend the output with: :::::::::::::: /PATH/TO/THE/FILE :::::::::::::: And when this happens the output will not match the expected length. Further, if we use a different pager we will instead fail the coverage tests as we will not have 100% coverage. Update the help test to remove the string in question. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-i2cTom Rini2018-01-163-11/+11
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