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| * dm: sata: Separate the non-command code into its own fileSimon Glass2016-05-173-118/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the SATA command code includes both the command-processing code and the core SATA functions and data structures. Separate the latter into its own file, adding functions as needed to avoid the command code accessing data structures directly. With this commit: - All CONFIG option are referenced from the non-command code - The concept of a 'current SATA device' is confined to the command code This will make it easier to convert this code to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: ide: Separate the non-command code into its own fileSimon Glass2016-05-173-1276/+1228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the IDE command code includes both the command-processing code and the core IDE functions and data structures. Separate the latter into its own file, adding functions as needed to avoid the command code accessing data structures directly. With this commit: - Most CONFIG option are referenced from the non-command code - The concept of a 'current IDE device' is confined to the command code This will make it easier to convert this code to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: scsi: Separate the non-command code into its own fileSimon Glass2016-05-174-603/+600
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the SCSI command code includes both the command-processing code and the core SCSI functions and data structures. Separate the latter into its own file, adding functions as needed to avoid the command code accessing data structures directly. This functions use the new legacy block functions. With this commit: - There is no CONFIG option referenced from the command code - The concept of a 'current SCSI device' is confined to the command code This will make it easier to convert this code to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Add an implementation of the 'devnum' functionsSimon Glass2016-05-171-0/+280
| | | | | | | | | | | | | | | | | | | | Now that the MMC code accesses devices by number, we can implement this same interface for driver model, allowing MMC to support using driver model for block devices. Add the required functions to the uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Add a legacy block interface for MMCSimon Glass2016-05-171-3/+27
| | | | | | | | | | | | Add a legacy block interface for MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: usb: Add a legacy block interface for USB storageSimon Glass2016-05-171-0/+7
| | | | | | | | | | | | Add a legacy block interface for USB storage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sandbox: Add a legacy host block interfaceSimon Glass2016-05-171-0/+7
| | | | | | | | | | | | Add a legacy block interface for sandbox host. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: systemace: Add a legacy block interfaceSimon Glass2016-05-172-0/+15
| | | | | | | | | | | | Add a legacy block interface for systemace. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: blk: Add a legacy block interfaceSimon Glass2016-05-173-0/+460
| | | | | | | | | | | | | | | | | | | | There is quite a bit of duplicated common code related to block devices in the IDE and SCSI implementations. Create some helper functions that can be used to reduce the duplication. These rely on a linker list of interface-type drivers Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: scsi: Rename CONFIG_CMD_SCSI to CONFIG_SCSISimon Glass2016-05-1733-40/+40
| | | | | | | | | | | | | | | | This option currently enables both the command and the SCSI functionality. Rename the existing option to CONFIG_SCSI since most of the code relates to the feature. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sata: Fix code style problems in cmd/sata.cSimon Glass2016-05-171-5/+7
| | | | | | | | | | | | | | This file has a few coding style problems. Fix these to make future updates easier. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: ide: Remove the forward declarationsSimon Glass2016-05-171-714/+682
| | | | | | | | | | | | | | Reorder the code to avoid needing forward declarations. Fix up code style as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: ide: Correct various code style problemsSimon Glass2016-05-171-28/+29
| | | | | | | | | | | | Adjust common/ide.c so that it passes most checkpatch.pl checks. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: scsi: Fix up code styleSimon Glass2016-05-171-233/+226
| | | | | | | | | | | | Update the code style of this file so that it passes checkpatch.pl. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: scsi: Remove the forward declarationsSimon Glass2016-05-171-332/+310
| | | | | | | | | | | | Reorder the code to avoid needing forward declarations. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: Add dummy SATA functionsSimon Glass2016-05-172-1/+34
| | | | | | | | | | | | | | Add some functions needed by the SATA code. This allows it to be compiled for sandbox, thus increasing build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: Add dummy SCSI functionsSimon Glass2016-05-172-1/+30
| | | | | | | | | | | | | | Add some functions needed by the SCSI code. This allows it to be compiled for sandbox, thus increasing build coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
| * sandbox: Add string and 16-bit I/O functionsSimon Glass2016-05-171-0/+15
| | | | | | | | | | | | | | | | | | | | Add outsw() and insw() functions for sandbox, as these are needed by the IDE code. The functions will not do anything useful if called, but allow the code to be compiled. Also add out16() and in16(), required by systemace. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Allow iotrace byte access to use an address of any sizeSimon Glass2016-05-171-2/+3
| | | | | | | | | | | | | | | | If an address is used with readb() and writeb() which is smaller than the expected size (e.g. 32-bit value on a machine with 64-bit addresses), a warning results. Fix this by adding a cast. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: Rename disk uclass to ahciSimon Glass2016-05-179-12/+14
| | | | | | | | | | | | | | | | This started as 'ahci' and was renamed to 'disk' during code review. But it seems that this is too generic. Now that we have a 'blk' uclass, we can use that as the generic piece, and revert to ahci for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * pci: Drop CONFIG_SYS_SCSI_SCAN_BUS_REVERSESimon Glass2016-05-173-8/+0
| | | | | | | | | | | | | | This option is not used by any board. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * dm: sandbox: Add a board for sandbox without CONFIG_BLKSimon Glass2016-05-172-0/+175
| | | | | | | | | | | | | | | | While the driver-model block device support is in progress, it is useful to build sandbox both with and without CONFIG_BLK. Add a separate board for the latter. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Revert "dm: sandbox: Drop the pre-DM host implementation"Simon Glass2016-05-171-0/+90
| | | | | | | | | | | | | | | | | | | | Bring this support back so that sandbox can be compiled with CONFIG_BLK. This allows sandbox to have greater build coverage during the block-device transition. This can be removed again later. This reverts commit 33cf727b1634dbd9cd68a6ebc444a88f053822d7. Signed-off-by: Simon Glass <sjg@chromium.org>
| * gpio: exynos(s5p): remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | | | | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Exynos/S5P gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
| * gpio: rk: remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the Rockchip gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
| * gpio: pic32: remove gpio_xlate routineEric Nelson2016-05-171-10/+0
| | | | | | | | | | | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the pic32 gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * gpio: omap: remove gpio_xlate routineEric Nelson2016-05-171-11/+0
| | | | | | | | | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the omap gpio driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
| * gpio: intel_broadwell: remove gpio_xlate routineEric Nelson2016-05-171-10/+0
| | | | | | | | | | | | | | | | With the addition of GPIO_ACTIVE_LOW parsing in gpio-uclass, the intel_broadwell driver doesn't need a custom xlate routine. Signed-off-by: Eric Nelson <eric@nelint.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: gpio: add a default gpio xlate routineEric Nelson2016-05-172-12/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many drivers use a common form of offset + flags for device tree nodes. e.g.: <&gpio1 2 GPIO_ACTIVE_LOW> This patch adds a common implementation of this type of parsing and calls it when a gpio driver doesn't supply its' own xlate routine. This will allow removal of the driver-specific versions in a handful of drivers and simplify the addition of new drivers. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * drivers: usb: common: add common code for usb drivers to useMugunthan V N2016-05-173-0/+50
| | | | | | | | | | | | | | Add common usb code which usb drivers makes use of it. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: gpio: introduce 74x164 driverPeng Fan2016-05-173-0/+202
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce driver to support "fairchild,74hc595" devices. 1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference. 2. Following the naming used in Linux driver with gen_7x164 as the prefix. 3. Enable CONFIG_DM_74X164 to use this driver. 4. Follow Documentation/devicetree/bindings/gpio/gpio-74x164.txt to add device nodes 5. Tested on i.MX6 UltraLite with 74LV595 using gpio command and oscillograph. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Chin Liang See <clsee@altera.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: spi: introduce dm apiPeng Fan2016-05-172-7/+73
| | | | | | | | | | | | | | | | | | | | | | Introduce dm_spi_claim_bus, dm_spi_release_bus and dm_spi_xfer Convert spi_claim_bus, spi_release_bus and spi_xfer to use the new API. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: spi: soft_spi: switch to use linux compatible stringPeng Fan2016-05-172-15/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Support compatible string "spi-gpio" which is used by Linux Linux use different bindings, so use UBOOT_COMPAT and LINUX_COMPAT to differentiate them. 2. Introduce SPI_MASTER_NO_RX and SPI_MASTER_NO_TX to handle no rx or no tx case. 3. Tested on i.MX6 UltraLite board with 74LV595 spi-gpio chip. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: spi: soft_spi bug fixPeng Fan2016-05-171-7/+12
| | | | | | | | | | | | | | | | | | | | | | When doing xfer, should use device->parent, but not device When doing bit xfer, should use "!!(tmpdout & 0x80)", but not "(tmpdout & 0x80)" Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jagan Teki <jteki@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * fdt: fix dev_get_addr_name node offsetStephen Warren2016-05-171-2/+2
| | | | | | | | | | | | | | | | Use the device's own DT offset, not the device's parent's. Fixes: 43c4d44e3330 ("fdt: implement dev_get_addr_name()") Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * video: tegra: refuse to bind to disabled dcsStephen Warren2016-05-172-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This prevents the following boot-time message on any board where only the first DC is in use, yet the DC's DT node is enabled: stdio_add_devices: Video device failed (ret=-22) (This happens on at least Harmony, Ventana, and likely any other Tegra20 board with display enabled other than Seaboard). The Tegra DC's DT node represents a display controller. It may itself drive an integrated RGB display output, or be used by some other display controller such as HDMI. For this reason the DC node itself is not enabled/disabled in DT; the DC itself is considered a shared resource, not the final (board-specific) display output. The node should instantiate a display output driver only if the rgb subnode is enabled. Other output drivers are free to use the DC if they are enabled and their DT node references the DC's DT node. Adapt the Tegra display drivers' bind() routine to only bind to the DC's DT node if the RGB subnode is enabled. Now that the display driver does the right thing, remove the workaround for this issue from Seaboard's DT file. Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: allow drivers to refuse to bindStephen Warren2016-05-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | In some cases, drivers may not want to bind to a device. Allow bind() to return -ENODEV in this case, and don't treat this as an error. This can be useful in situations where some information source other than the DT node's main status property indicates whether the device should be enabled, for example other DT properties might indicate this, or the driver might query non-DT sources such as system fuses or a version number register. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * buildman: allow more incremental buildingStephen Warren2016-05-175-11/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One use-case for buildman is to continually run it interactively after each small step in a large refactoring operation. This gives more immediate feedback than making a number of commits and then going back and testing them. For this to work well, buildman needs to be extremely fast. At present, a couple issues prevent it being as fast as it could be: 1) Each time buildman runs "make %_defconfig", it runs "make mrproper" first. This throws away all previous build results, requiring a from-scratch build. Optionally avoiding this would speed up the build, at the cost of potentially causing or missing some build issues. 2) A build tree is created per thread rather than per board. When a thread switches between building different boards, this often causes many files to be rebuilt due to changing config options. Using a separate build tree for each board would avoid this. This does put more strain on the system's disk cache, but it is worth it on my system at least. This commit adds two command-line options to implement the changes described above; -I ("--incremental") turns of "make mrproper" and -P ("--per-board-out-dir") creats a build directory per board rather than per thread. Tested: ./tools/buildman/buildman.py tegra ./tools/buildman/buildman.py -I -P tegra ./tools/buildman/buildman.py -b tegra_dev tegra ./tools/buildman/buildman.py -b tegra_dev -I -P tegra ... each once after deleting the buildman result/work directory, and once "incrementally" after a previous identical invocation. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org> # v1 Tested-by: Simon Glass <sjg@chromium.org> # v1 Acked-by: Simon Glass <sjg@chromium.org>
| * m68k: add DM model serial driverangelo@sysam.it2016-05-172-44/+167
| | | | | | | | | | | | | | | | Boards can now use DM serial driver, or still legacy mcf uart driver version. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
| * m68k: add malloc memory for early mallocangelo@sysam.it2016-05-179-39/+147
| | | | | | | | | | | | | | | | | | To use serial uclass and DM, CONFIG_SYS_MALLOC_F must be used. So CONFIG_SYS_GENERIC_GLOBAL_DATA has been undefined and call to board_init_f_mem() is added for all cpu's. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
| * dm: gpio: pca953x: introduce driver model support for pca953xPeng Fan2016-05-173-0/+375
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a new driver that supports driver model for pca953x. The pca953x chips are used as I2C I/O expanders. This driver is designed to support the following chips: " 4 bits: pca9536, pca9537 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, pca9556, pca9557, pca9574, tca6408, xra1202 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, tca6416 24 bits: tca6424 40 bits: pca9505, pca9698 " But for now this driver only supports max 24 bits and pca953x compatible chips. pca957x compatible chips are not supported now. These can be addressed when we need to add such support for the different chips. This driver has been tested on i.MX6 SoloX Sabreauto board with max7310 i2c expander using gpio command as following: =>gpio status -a Bank gpio@30_: gpio@30_0: input: 1 [ ] => dm tree: i2c [ ] | | `-- i2c@021a8000 gpio [ ] | | |-- gpio@30 gpio [ ] | | `-- gpio@32 Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Wenyou Yang <wenyou.yang@atmel.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Andrea Scian <andrea.scian@dave.eu> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Michal Simek <michal.simek@xilinx.com> #on ZynqMP zcu102
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-05-1721-27/+71
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| * | ARM: mx6: Enable MMC and SATA extfs boot supportMarek Vasut2016-05-173-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable support for booting U-Boot image from ext filesystem when either SD/MMC or SATA support is compiled into the SPL. This will allow easy transition from loading U-Boot image from ad-hoc offset on the card to loading U-Boot image from the filesystem. VFAT support is intently not enabled. The boot order is tweaked so that raw is tested first and if the raw has no signature, FS boot is attempted. To install just the SPL on i.MX6 board, perform the following operation $ dd if=SPL of=/dev/sdX seek=2 bs=512 To install the U-Boot image, copy u-boot.img to the first partition of the SD/MMC/SATA drive. The partition must be formated to extfs. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@konsulko.com>
| * | SPL: Add CONFIG_SPL_ABORT_ON_RAW_IMAGEMarek Vasut2016-05-172-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When defined, SPL will proceed to another boot method if the image it has loaded does not have a signature. This is useful if the subsequent boot methods are much more complex. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Peng Fan <van.freenix@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com>
| * | SPL: Let spl_parse_image_header() return valueMarek Vasut2016-05-1711-17/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow the spl_parse_image_header() to return value. This is convenient for controlling the SPL boot flow if the loaded image is corrupted. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@konsulko.com>
| * | imx: imx-common: print i.MX 7 SoC names consistentlyStefan Agner2016-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to the product website, the full names are i.MX 7Solo and i.MX 7Dual, whereas the short form is i.MX7S and i.MX7D. Be consistent and print the short form for both supported i.MX 7 SoCs. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: imx7d: fix ahb clock mux 1Stefan Agner2016-05-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch>
| * | imx: iomux-v3: fix UART input selectsStefan Agner2016-05-171-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several UART input selects are missing. The fourth input select for UART2_TX_DATA_ALT0 is actually also missing in the documentation. (at least in Rev. B of the i.MX 7Dual Reference Manual). However, when looking at the tables of other input selects, it is very natural that there must be an input select for the UART2_TX_DATA_ALT0 pad. The Colibri iMX7 also uses that pad for UART2 RX (in DTE mode), and it was required to set that particular input select register to get a working UART2.
| * | ARM: mx6: Enable STDIO deregistering on NovenaMarek Vasut2016-05-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Novena supports USB keyboard, which is a pluggable device and can be unplugged. Thus, we need to be able to deregister it's stdio device. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5Eric Nelson2016-05-171-0/+1
| | | | | | | | | | | | | | | | | | | | | This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Peng Fan <van.freenix@gmail.com>
generated by cgit (git 2.34.1) at 2024-11-19 11:45:42 +0000