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* arm64: zynqmp: Fix irps5401 device nodesMichal Simek2020-04-276-29/+28
| | | | | | | | | - Do not use irps54012 as device node which is not correct. - Fix addresses of irps5401/u180 on zcu104 revisions. - Remove clock-cells property. It is PMIC without any clock output. - Define irps5401 nodes in zynqmp-e-a2197 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Move bootmode detection to separate functionMichal Simek2020-04-272-16/+35
| | | | | | | | Create special function for reading bootmode on Versal and ZynqMP. Zynq is using specific function (without mask) already. Future patches will be calling this function from different location too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Move initrd_high setup to common locationMichal Simek2020-04-274-13/+7
| | | | | | | Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add label to GPIO lines for boot mode and PORSaeed Nowshadi2020-04-271-3/+3
| | | | | | | | Add label to GPIO lines controlling boot mode and POR EMIO pins so System Controller can assert those lines on Versal. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* clk: versal: Fix watchdog clock issueT Karthik Reddy2020-04-271-1/+4
| | | | | | | | | Enable mux based clocks to populate LPD_LSBUS clock to xilinx_wwdt driver. Skip reading clock rate for the mux based clocks with parent clock id is zero. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
* xilinx: zynqmp: Fix MIO 18 configuration on zcu104 revCMichal Simek2020-04-271-1/+2
| | | | | | Without this change QSPI is not detected on zcu104 revC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Introduce board_late_init_xilinx()Michal Simek2020-04-277-9/+28
| | | | | | | This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM: zynq: Setup stack size via KconfigMichal Simek2020-04-271-1/+2
| | | | | | | | | | | Stack size has been introduced by commit a69814c815b9 ("arm64: zynqmp: Set initrd_high to as high as possible") and commit 085201c246ee ("arm64: versal: Set initrd_high to as high as possible") to support setting up initrd_high as high as possible. The same change should happen for Zynq because the code is moved to xilinx common location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: Enable MTD and UBIFS for zynq and zynqmpMichal Simek2020-04-272-0/+10
| | | | | | | Both of them have nand controller that's why it is good to enable it because these configurations are also covered by testing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mmc: zynq: parse dt when probingBenedikt Grassl2020-04-273-12/+7
| | | | | | | | | | | | | Currently, the entry "bus-width = <8>" in the ZynqMP's sdhci nodes is not evaluated. This results in the bus width staying at its default value (4 bit in HS200 mode). Fix this by calling mmc_of_parse. This function also checks for the "no-1-8-v" and "max-frequency" entries. Remove the handling of those nodes from this driver. Signed-off-by: Benedikt Grassl <Benedikt.Grassl@rohde-schwarz.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch '2020-04-25-master-imports'Tom Rini2020-04-2565-358/+1712
|\ | | | | | | | | - Assorted minor fixes - Actions S700 SoC and Cubieboard7 support
| * rtc: ds1374: typo WatchdogHeinrich Schuchardt2020-04-241-1/+1
| | | | | | | | | | | | %s/Watchdoc/Watchdog/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * spi: mpc8xxx_spi: fix missing dev_err definitionRasmus Villemoes2020-04-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The build currently fails with drivers/spi/mpc8xxx_spi.c:64:3: warning: implicit declaration of function ‘dev_err’ [-Wimplicit-function-declaration] ... drivers/spi/built-in.o: In function `mpc8xxx_spi_set_speed': drivers/spi/mpc8xxx_spi.c:227: undefined reference to `dev_err' Fixes: 4856cc7a97 (mpc8xxx_spi: implement real ->set_speed) Fixes: 1a7b462dee (mpc8xxx_spi: put max_cs to use) Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
| * spl: fit: do not check argument of free()Heinrich Schuchardt2020-04-241-2/+1
| | | | | | | | | | | | | | The free() function checks if its argument is NULL. It is superfluous to do the same check on the calling side. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * MAINTAINERS: add entry for cubieboard7 configAmit Singh Tomar2020-04-241-0/+1
| | | | | | | | | | | | | | This commit adds entry for cubieboard7 config under Actions Semi OWL family. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * doc: boards: add Cubieboard7 documentationAmit Singh Tomar2020-04-243-0/+125
| | | | | | | | | | | | | | | | This adds build and flash steps for Actions S700 based Cubieboard7 board. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: add Cubieboard7 board supportAmit Singh Tomar2020-04-242-0/+104
| | | | | | | | | | | | | | | | | | | | The Cubieboard is a single board computer containing a Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores). This patch adds respective defconfig alongwith .dts(copied from Linux v5.5-rc6 with hash "b3a987b0264d"). Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * actions: Move defconfig options to KconfigAmit Singh Tomar2020-04-243-3/+2
| | | | | | | | | | | | | | This patch moves some of the config options from bubblegum_96_defconfig to respective Kconfig files. Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: add support Actions Semi S700Amit Singh Tomar2020-04-241-0/+5
| | | | | | | | | | | | | | | | | | This patch adds basic support for Actions Semi based S700 SoC, which is driven by common owl framework. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: dts: actions: s700: add u-boot specific dtsi fileAmit Singh Tomar2020-04-241-0/+18
| | | | | | | | | | | | | | | | | | Devices like uart and clk are needed to be enabled before relocation. this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: actions: add S700 SoC device treeAmit Singh Tomar2020-04-244-0/+402
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d") and required binding for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores. It also provisions dts file to be built based on selected platform(CONFIG_MACH_S900/S700). Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * clk: actions: Add common clock driverAmit Singh Tomar2020-04-247-42/+118
| | | | | | | | | | | | | | | | This patch converts S900 clock driver to something common that can be used for other SoCs, for instance S700(few of clk registers are same). Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: dts: actions: s900: add u-boot specific dtsi fileAmit Singh Tomar2020-04-241-0/+17
| | | | | | | | | | | | | | | | | | Devices like uart and clk are needed to be enabled before relocation. This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: dts: sync dts for Action Semi S900Amit Singh Tomar2020-04-247-103/+499
| | | | | | | | | | | | | | | | | | | | | | | | | | Synchronize device tree bindings with v5.5-rc6 tag with commit id "b3a987b0264d". Also, it removes older clock binding defined for S900 along with undocumented compatible string "actions,s900-serial" from serial driver and adapts clock driver to cater to new bindings. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * serial: actions: add compatible stringAmit Singh Tomar2020-04-241-0/+1
| | | | | | | | | | | | | | | | | | This patch adds "actions,owl-uart" string to the owl uart driver. It is also defined in Linux kernel. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: actions: rename sysmap-s900 to sysmap-owlAmit Singh Tomar2020-04-242-4/+4
| | | | | | | | | | | | | | | | Now that memory maps(for both S700 and S900 SoCs) can be managed using a common file, rename sysmap-s900 to sysmap-owl to reflect the same. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * arm: actions: Add common framework for Actions Owl Semi SoCsAmit Singh Tomar2020-04-2410-52/+22
| | | | | | | | | | | | | | | | | | This commit adds common arch support for Actions Semi Owl series SoCs and removes the Bubblegum96 board files. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
| * coccinelle: adjust NULL check before free()Heinrich Schuchardt2020-04-241-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The free() function checks if its argument is NULL. We should avoid checking for NULL before calling free like in     if (result->tds)         free(result->tds); The list of relevant functions differs between Linux and U-Boot, e.g. we use free(). Adjust the list of relevant functions. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * coccinelle: check for casting malloc outputHeinrich Schuchardt2020-04-241-0/+102
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Casting the (void *) output of memory allocation functions before assignment like in sata->cmd_hdr_tbl_offset = (void *)malloc(length + align); is useless. Adopt the Linux kernel script scripts/coccinelle/api/alloc/alloc_cast.cocci. Now 'make coccicheck' generates warnings like: ./drivers/ata/fsl_sata.c:143:29-33: WARNING: casting value returned by memory allocation function to (void *) is useless. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * kbuild: cherry-pick kbuild changes from LinuxMasahiro Yamada2020-04-246-85/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | b42841b7bb62 kbuild: Get rid of KBUILD_STR 2aedcd098a94 kbuild: suppress annoying "... is up to date." message 9c8fa9bc08f6 kbuild: fix if_change and friends to consider argument order ebf003f0cfb3 kbuild: Consolidate header generation from ASM offset information 2982c953570b kbuild: remove redundant $(wildcard ...) for cmd_files calculation 8a78756eb545 kbuild: create object directories simpler and faster 4d4b5c2e3b6e treewide: remove explicit rules for *offsets.s 01d509a48b46 kbuild: remove unimportant comments from ./Kbuild Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
| * kbuild: add FORCE to dependency of $(obj)/dts/dt-platdata.oMasahiro Yamada2020-04-241-2/+3
| | | | | | | | | | | | | | | | | | if_changed must have FORCE as a prerequisite. Add $(obj)/dts/dt-platdata.o to 'targets' so that the corresponding .cmd file is included. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
| * cache: l2x0: Fix write to incorrect shared-override bitLey Foon Tan2020-04-241-2/+2
| | | | | | | | | | | | | | | | | | The existing code write bit-0 for shared attribute override enable bit. It should be bit-22 based on cache controller specification [1]. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3p2_trm.pdf Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
| * README: remove references on no more used config CONFIG_SYS_RCAR_I2C*Patrick Delaunay2020-04-241-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the references in README on CONFIG_SYS_RCAR_I2C_* not use in U-Boot drivers/i2c/rcar_i2c.c, since commit a4d9aafadb31 ("i2c: rcar_i2c: Remove the driver") and commit a06a0ac36d59 ("i2c: rcar_i2c: Add DM and DT capable I2C driver") Checked by the command: grep -r SYS_RCAR_I2C * And these CONFIG are only defined in arch/arm/mach-rmobile/include/mach/rcar-base.h Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * cosmetic: README: Fix one CONFIG namePatrick Delaunay2020-04-241-1/+1
| | | | | | | | | | | | | | Only replace CONFIF_ by CONFIG_ Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Update mmc_get_mmc_dev() to use const *Simon Glass2020-04-242-2/+2
| | | | | | | | | | | | | | | | This function does not modify the device to change it to use const *, so that callers with a const udevice * can call it without a cast. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * pci: Add a macro to convert BDF from linux to U-BootSimon Glass2020-04-241-0/+3
| | | | | | | | | | | | | | | | | | | | U-Boot's BDF format has its bits in the same position as the device tree PCI definition. Some x86 devices use linux format in their register format and it is useful to be able to convert to U-Boot format. Add a macro for this. Signed-off-by: Simon Glass <sjg@chromium.org>
| * uuid: Use const char * where possibleSimon Glass2020-04-242-6/+10
| | | | | | | | | | | | | | Update the arguments of these functions so they can be called from code which uses constant strings. Signed-off-by: Simon Glass <sjg@chromium.org>
| * lib: Add a function to convert a string to upper caseSimon Glass2020-04-243-15/+83
| | | | | | | | | | | | | | | | Add a helper function for this operation. Update the strtoul() tests to check upper case as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * test: Add the beginnings of some string testsSimon Glass2020-04-244-0/+74
| | | | | | | | | | | | | | There are quite a few string functions in U-Boot with no tests. Make a start by adding a test for strtoul(). Signed-off-by: Simon Glass <sjg@chromium.org>
| * lib: strto: Stop detection when invalid char is usedMichal Simek2020-04-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This issue has been found when mtd partition are specified. Autodetection code should stop when the first invalid char is found. Here is the example of commands: setenv mtdids nand0=memory-controller@e000e000 setenv mtdparts "mtdparts=nand0:4m(boot),4m(env),64m(kernel),96m(rootfs)" mtd list Before: Zynq> mtd list List of MTD devices: * nand0 - type: NAND flash - block size: 0x20000 bytes - min I/O: 0x800 bytes - OOB size: 64 bytes - OOB available: 16 bytes - ECC strength: 1 bits - ECC step size: 2048 bytes - bitflip threshold: 1 bits - 0x000000000000-0x000010000000 : "nand0" - 0x000000000000-0x000000400000 : "boot" - 0x000000400000-0x000000800000 : "env" - 0x000000800000-0x000006c00000 : "kernel" - 0x000006c00000-0x000010000000 : "rootfs" Where it is visible that kernel partition has 100m instead of 64m After: Zynq> mtd list * nand0 - type: NAND flash - block size: 0x20000 bytes - min I/O: 0x800 bytes - OOB size: 64 bytes - OOB available: 16 bytes - ECC strength: 1 bits - ECC step size: 2048 bytes - bitflip threshold: 1 bits - 0x000000000000-0x000010000000 : "nand0" - 0x000000000000-0x000000400000 : "boot" - 0x000000400000-0x000000800000 : "env" - 0x000000800000-0x000004800000 : "kernel" - 0x000004800000-0x00000a800000 : "rootfs" Signed-off-by: Michal Simek <michal.simek@xilinx.com> Fixes: 0486497e2b5f ("lib: Improve _parse_integer_fixup_radix base 16 detection") Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Pali Rohár <pali@kernel.org>
| * mtd: nand: pxa3xx: fix raw read when last_chunk_size == 0Baruch Siach2020-04-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6293b0361d9 ("mtd: nand: pxa3xx: add raw read support") added the local data_len variable in handle_data_pio() to track read size, but forgot to update the condition of drain_fifo() call. That happens to work when the layout last_chunk_size != 0. But when last_chunk_size == 0, drain_fifo() is not called to read the last chunk, which leads to "Wait timeout!!!" error. Fix this. Fixes: 6293b0361d9 ("mtd: nand: pxa3xx: add raw read support") Cc: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
| * common/board_f: Make reserve_mmu genericOvidiu Panait2020-04-243-5/+19
| | | | | | | | | | | | | | | | Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu routines. Also, define a weak nop stub for it. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * arm: asm/cache.c: Introduce arm_reserve_mmuOvidiu Panait2020-04-244-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As a preparation for turning reserve_mmu into an arch-specific variant, introduce arm_reserve_mmu on ARM. It implements the default routine for reserving memory for MMU TLB and needs to be weakly defined in order to allow for machines to override it. Without this decoupling, after introducing arch_reserve_mmu, there would be two weak definitions for it, one in common/board_f.c and one in arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.cOvidiu Panait2020-04-242-28/+28
|/ | | | | | | | Move the ARM-specific reserve_mmu definition from common/board_f.c to arch/arm/lib/cache.c. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'u-boot-stm32-20200424' of ↵Tom Rini2020-04-2410-1661/+638
|\ | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Solve stm32mp15 pinctrl dts issue (patch conflict in branches master and next) - Split device tree for DHCOR Som and AV 96 board - Update PLL4 setting in AV96 board - Enable bootd, iminfo, imxtract on DHCOM
| * ARM: stm32: Enable bootd, iminfo, imxtract on DHCOMMarek Vasut2020-04-241-3/+0
| | | | | | | | | | | | | | | | | | | | Enable these standard U-Boot commands for image manipulation and for starting the default boot command using 'boot' command in U-Boot shell. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 boardMarek Vasut2020-04-247-502/+540
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top of an AV96 reference board. Split the DTs to reflect that and make sure to DHCOR SoM can be reused on other boards easily. It is also highly recommended to configure the board for the DHCOM make stm32mp15_dhcom_basic_defconfig make DEVICE_TREE=stm32mp15xx-dhcor-avenger96 as that permits reusing the board code for the DH components, like accessing and reading out the ethernet MAC from EEPROM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
| * ARM: dts: stm32: Adjust PLL4 settings on AV96Marek Vasut2020-04-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which can not easily divide the clock down to e.g. 50 MHz for high speed SD and eMMC devices, so those devices end up running at 30 MHz as that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz for optimal operation of both SD and eMMC, SPDIF clock are not that much slower and FDCAN is also unaffected. Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32mp1: remove file stm32mp157-pinctrl.dtsiPatrick Delaunay2020-04-243-1154/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the unnecessary file stm32mp157-pinctrl.dtsi and solve all issues introduced by the commit 891483186052b2598 ("Merge branch 'next'") after a conflict on the patch applied in the next branch in commit 1a4f57c895cc ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1") Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04 - commit 4fdbe6487daa ("ARM: dts: stm32: Add alternate pinmux for SDMMC1 direction pins")' - commit 5fdcba64027f ("ARM: dts: stm32: Add alternate pinmux for SDMMC2 pins 4-7")' - commit 955de5111112 ("ARM: dts: stm32: Add alternate pinmux for ethernet RGMII")' Cc: Marek Vasut <marex@denx.de> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* | Revert "sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB"Tom Rini2020-04-242-4/+0
| | | | | | | | | | | | | | | | | | While the change is correct, generally, it was not intended to be pushed just yet. This reverts commit b897306341024695d17296efc1f9d83d06368209. Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit (git 2.34.1) at 2025-01-30 23:44:22 +0000