diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/rk3036_common.h | 7 | ||||
| -rw-r--r-- | include/configs/rk3128_common.h | 7 | ||||
| -rw-r--r-- | include/configs/rk322x_common.h | 7 | ||||
| -rw-r--r-- | include/configs/rk3288_common.h | 9 | ||||
| -rw-r--r-- | include/configs/rk3368_common.h | 3 | ||||
| -rw-r--r-- | include/configs/rk3399_common.h | 1 | ||||
| -rw-r--r-- | include/configs/tinker_rk3288.h | 1 | ||||
| -rw-r--r-- | include/debug_uart.h | 19 | ||||
| -rw-r--r-- | include/dm/uclass-id.h | 1 | ||||
| -rw-r--r-- | include/dt-bindings/clk/sifive-fu540-prci.h | 29 | ||||
| -rw-r--r-- | include/dt-bindings/clock/sifive-fu540-prci.h | 18 | ||||
| -rw-r--r-- | include/linux/clk/analogbits-wrpll-cln28hpc.h | 79 | ||||
| -rw-r--r-- | include/miiphy.h | 20 | ||||
| -rw-r--r-- | include/net.h | 4 | ||||
| -rw-r--r-- | include/phy.h | 80 |
15 files changed, 240 insertions, 45 deletions
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index f5d09d18e5..73be079b20 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -12,9 +12,10 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 +#define COUNTER_FREQUENCY 24000000 +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h index 0c08d7af5b..20d62439fb 100644 --- a/include/configs/rk3128_common.h +++ b/include/configs/rk3128_common.h @@ -14,9 +14,10 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0x200440a0 /* TIMER5 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_ROCKCHIP_STIMER_BASE 0x200440a0 +#define COUNTER_FREQUENCY 24000000 +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index 15bb8d63b8..cc08699944 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -13,9 +13,10 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0x110c00a0 /* TIMER5 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_ROCKCHIP_STIMER_BASE 0x110d0020 +#define COUNTER_FREQUENCY 24000000 +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ_CLOCK 24000000 #define CONFIG_SYS_INIT_SP_ADDR 0x61100000 #define CONFIG_SYS_LOAD_ADDR 0x61800800 diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 7c79ed6138..5472a90633 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -13,9 +13,10 @@ #define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_CBSIZE 1024 -#define CONFIG_SYS_TIMER_RATE (24 * 1000 * 1000) -#define CONFIG_SYS_TIMER_BASE 0xff810020 /* TIMER7 */ -#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 8) +#define CONFIG_ROCKCHIP_STIMER_BASE 0xff810020 +#define COUNTER_FREQUENCY 24000000 +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ_CLOCK 24000000 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM /* Bootrom will load u-boot binary to 0x0 once return from SPL */ @@ -35,6 +36,8 @@ #define SDRAM_BANK_SIZE (2UL << 30) #define SDRAM_MAX_SIZE 0xfe000000 +#define CONFIG_SYS_MONITOR_LEN (600 * 1024) + #ifndef CONFIG_SPL_BUILD /* usb otg */ diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 13630ba386..8a1e3118ae 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -20,7 +20,8 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT -#define COUNTER_FREQUENCY 24000000 +#define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 +#define COUNTER_FREQUENCY 24000000 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index f31f2658bb..8df0180284 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -13,6 +13,7 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define COUNTER_FREQUENCY 24000000 +#define CONFIG_ROCKCHIP_STIMER_BASE 0xff8680a0 #define CONFIG_SYS_NS16550_MEM32 diff --git a/include/configs/tinker_rk3288.h b/include/configs/tinker_rk3288.h index 32057b3dbb..5adae68c91 100644 --- a/include/configs/tinker_rk3288.h +++ b/include/configs/tinker_rk3288.h @@ -18,6 +18,5 @@ func(DHCP, dchp, na) #define CONFIG_SYS_MMC_ENV_DEV 1 -#define CONFIG_SYS_MONITOR_LEN (600 * 1024) #endif diff --git a/include/debug_uart.h b/include/debug_uart.h index 34e8b2fc81..cd70ae1a04 100644 --- a/include/debug_uart.h +++ b/include/debug_uart.h @@ -104,6 +104,13 @@ void printhex4(uint value); */ void printhex8(uint value); +/** + * printdec() - Output a decimalism value + * + * @value: Value to output + */ +void printdec(uint value); + #ifdef CONFIG_DEBUG_UART_ANNOUNCE #define _DEBUG_UART_ANNOUNCE printascii("<debug_uart> "); #else @@ -171,6 +178,18 @@ void printhex8(uint value); printhex(value, 8); \ } \ \ + void printdec(uint value) \ + { \ + if (value > 10) { \ + printdec(value / 10); \ + value %= 10; \ + } else if (value == 10) { \ + _debug_uart_putc('1'); \ + value = 0; \ + } \ + _debug_uart_putc('0' + value); \ + } \ +\ void debug_uart_init(void) \ { \ board_debug_uart_init(); \ diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index f9300a64ce..d4d96106b3 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -59,6 +59,7 @@ enum uclass_id { UCLASS_MAILBOX, /* Mailbox controller */ UCLASS_MASS_STORAGE, /* Mass storage device */ UCLASS_MDIO, /* MDIO bus */ + UCLASS_MDIO_MUX, /* MDIO MUX/switch */ UCLASS_MISC, /* Miscellaneous device */ UCLASS_MMC, /* SD / MMC card or chip */ UCLASS_MOD_EXP, /* RSA Mod Exp device */ diff --git a/include/dt-bindings/clk/sifive-fu540-prci.h b/include/dt-bindings/clk/sifive-fu540-prci.h deleted file mode 100644 index 531523ea62..0000000000 --- a/include/dt-bindings/clk/sifive-fu540-prci.h +++ /dev/null @@ -1,29 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2019 Western Digital Corporation or its affiliates. - * - * Copyright (C) 2018 SiFive, Inc. - * Wesley Terpstra - * Paul Walmsley - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __LINUX_CLK_SIFIVE_FU540_PRCI_H -#define __LINUX_CLK_SIFIVE_FU540_PRCI_H - -/* Clock indexes for use by Device Tree data */ - -#define PRCI_CLK_COREPLL 0 -#define PRCI_CLK_DDRPLL 1 -#define PRCI_CLK_GEMGXLPLL 2 -#define PRCI_CLK_TLCLK 3 - -#endif diff --git a/include/dt-bindings/clock/sifive-fu540-prci.h b/include/dt-bindings/clock/sifive-fu540-prci.h new file mode 100644 index 0000000000..6a0b70a37d --- /dev/null +++ b/include/dt-bindings/clock/sifive-fu540-prci.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018-2019 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + */ + +#ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H +#define __DT_BINDINGS_CLOCK_SIFIVE_FU540_PRCI_H + +/* Clock indexes for use by Device Tree data and the PRCI driver */ + +#define PRCI_CLK_COREPLL 0 +#define PRCI_CLK_DDRPLL 1 +#define PRCI_CLK_GEMGXLPLL 2 +#define PRCI_CLK_TLCLK 3 + +#endif diff --git a/include/linux/clk/analogbits-wrpll-cln28hpc.h b/include/linux/clk/analogbits-wrpll-cln28hpc.h new file mode 100644 index 0000000000..03279097e1 --- /dev/null +++ b/include/linux/clk/analogbits-wrpll-cln28hpc.h @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018-2019 SiFive, Inc. + * Wesley Terpstra + * Paul Walmsley + */ + +#ifndef __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H +#define __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H + +#include <linux/types.h> + +/* DIVQ_VALUES: number of valid DIVQ values */ +#define DIVQ_VALUES 6 + +/* + * Bit definitions for struct wrpll_cfg.flags + * + * WRPLL_FLAGS_BYPASS_FLAG: if set, the PLL is either in bypass, or should be + * programmed to enter bypass + * WRPLL_FLAGS_RESET_FLAG: if set, the PLL is in reset + * WRPLL_FLAGS_INT_FEEDBACK_FLAG: if set, the PLL is configured for internal + * feedback mode + * WRPLL_FLAGS_EXT_FEEDBACK_FLAG: if set, the PLL is configured for external + * feedback mode (not yet supported by this driver) + */ +#define WRPLL_FLAGS_BYPASS_SHIFT 0 +#define WRPLL_FLAGS_BYPASS_MASK BIT(WRPLL_FLAGS_BYPASS_SHIFT) +#define WRPLL_FLAGS_RESET_SHIFT 1 +#define WRPLL_FLAGS_RESET_MASK BIT(WRPLL_FLAGS_RESET_SHIFT) +#define WRPLL_FLAGS_INT_FEEDBACK_SHIFT 2 +#define WRPLL_FLAGS_INT_FEEDBACK_MASK BIT(WRPLL_FLAGS_INT_FEEDBACK_SHIFT) +#define WRPLL_FLAGS_EXT_FEEDBACK_SHIFT 3 +#define WRPLL_FLAGS_EXT_FEEDBACK_MASK BIT(WRPLL_FLAGS_EXT_FEEDBACK_SHIFT) + +/** + * struct wrpll_cfg - WRPLL configuration values + * @divr: reference divider value (6 bits), as presented to the PLL signals + * @divf: feedback divider value (9 bits), as presented to the PLL signals + * @divq: output divider value (3 bits), as presented to the PLL signals + * @flags: PLL configuration flags. See above for more information + * @range: PLL loop filter range. See below for more information + * @output_rate_cache: cached output rates, swept across DIVQ + * @parent_rate: PLL refclk rate for which values are valid + * @max_r: maximum possible R divider value, given @parent_rate + * @init_r: initial R divider value to start the search from + * + * @divr, @divq, @divq, @range represent what the PLL expects to see + * on its input signals. Thus @divr and @divf are the actual divisors + * minus one. @divq is a power-of-two divider; for example, 1 = + * divide-by-2 and 6 = divide-by-64. 0 is an invalid @divq value. + * + * When initially passing a struct wrpll_cfg record, the + * record should be zero-initialized with the exception of the @flags + * field. The only flag bits that need to be set are either + * WRPLL_FLAGS_INT_FEEDBACK or WRPLL_FLAGS_EXT_FEEDBACK. + */ +struct wrpll_cfg { + u8 divr; + u8 divq; + u8 range; + u8 flags; + u16 divf; +/* private: */ + u32 output_rate_cache[DIVQ_VALUES]; + unsigned long parent_rate; + u8 max_r; + u8 init_r; +}; + +int wrpll_configure_for_rate(struct wrpll_cfg *c, u32 target_rate, + unsigned long parent_rate); + +unsigned int wrpll_calc_max_lock_us(const struct wrpll_cfg *c); + +unsigned long wrpll_calc_output_rate(const struct wrpll_cfg *c, + unsigned long parent_rate); + +#endif /* __LINUX_CLK_ANALOGBITS_WRPLL_CLN28HPC_H */ diff --git a/include/miiphy.h b/include/miiphy.h index e6dd441983..9b97d09f18 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -167,4 +167,24 @@ struct phy_device *dm_mdio_phy_connect(struct udevice *dev, int addr, #endif +#ifdef CONFIG_DM_MDIO_MUX + +/* indicates none of the child buses is selected */ +#define MDIO_MUX_SELECT_NONE -1 + +/** + * struct mdio_mux_ops - MDIO MUX operations + * + * @select: Selects a child bus + * @deselect: Clean up selection. Optional, can be NULL + */ +struct mdio_mux_ops { + int (*select)(struct udevice *mux, int cur, int sel); + int (*deselect)(struct udevice *mux, int sel); +}; + +#define mdio_mux_get_ops(dev) ((struct mdio_mux_ops *)(dev)->driver->ops) + +#endif + #endif diff --git a/include/net.h b/include/net.h index 44b32385c4..7684076af6 100644 --- a/include/net.h +++ b/include/net.h @@ -728,7 +728,7 @@ static inline struct in_addr net_read_ip(void *from) } /* return ulong *in network byteorder* */ -static inline u32 net_read_u32(u32 *from) +static inline u32 net_read_u32(void *from) { u32 l; @@ -749,7 +749,7 @@ static inline void net_copy_ip(void *to, void *from) } /* copy ulong */ -static inline void net_copy_u32(u32 *to, u32 *from) +static inline void net_copy_u32(void *to, void *from) { memcpy((void *)to, (void *)from, sizeof(u32)); } diff --git a/include/phy.h b/include/phy.h index d01435d1aa..f4530faeb9 100644 --- a/include/phy.h +++ b/include/phy.h @@ -246,15 +246,71 @@ static inline int is_10g_interface(phy_interface_t interface) #endif +/** + * phy_init() - Initializes the PHY drivers + * + * This function registers all available PHY drivers + * + * @return 0 if OK, -ve on error + */ int phy_init(void); + +/** + * phy_reset() - Resets the specified PHY + * + * Issues a reset of the PHY and waits for it to complete + * + * @phydev: PHY to reset + * @return 0 if OK, -ve on error + */ int phy_reset(struct phy_device *phydev); + +/** + * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus + * + * The function checks the PHY addresses flagged in phy_mask and returns a + * phy_device pointer if it detects a PHY. + * This function should only be called if just one PHY is expected to be present + * in the set of addresses flagged in phy_mask. If multiple PHYs are present, + * it is undefined which of these PHYs is returned. + * + * @bus: MII/MDIO bus to scan + * @phy_mask: bitmap of PYH addresses to scan + * @interface: type of MAC-PHY interface + * @return pointer to phy_device if a PHY is found, or NULL otherwise + */ struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, phy_interface_t interface); + #ifdef CONFIG_DM_ETH + +/** + * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices + * @phydev: PHY device + * @dev: Ethernet device + */ void phy_connect_dev(struct phy_device *phydev, struct udevice *dev); + +/** + * phy_connect() - Creates a PHY device for the Ethernet interface + * + * Creates a PHY device for the PHY at the given address, if one doesn't exist + * already, and associates it with the Ethernet device. + * The function may be called with addr <= 0, in this case addr value is ignored + * and the bus is scanned to detect a PHY. Scanning should only be used if only + * one PHY is expected to be present on the MDIO bus, otherwise it is undefined + * which PHY is returned. + * + * @bus: MII/MDIO bus that hosts the PHY + * @addr: PHY address on MDIO bus + * @dev: Ethernet device to associate to the PHY + * @interface: type of MAC-PHY interface + * @return pointer to phy_device if a PHY is found, or NULL otherwise + */ struct phy_device *phy_connect(struct mii_dev *bus, int addr, struct udevice *dev, phy_interface_t interface); + static inline ofnode phy_get_ofnode(struct phy_device *phydev) { if (ofnode_valid(phydev->node)) @@ -263,10 +319,34 @@ static inline ofnode phy_get_ofnode(struct phy_device *phydev) return dev_ofnode(phydev->dev); } #else + +/** + * phy_connect_dev() - Associates the given pair of PHY and Ethernet devices + * @phydev: PHY device + * @dev: Ethernet device + */ void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev); + +/** + * phy_connect() - Creates a PHY device for the Ethernet interface + * + * Creates a PHY device for the PHY at the given address, if one doesn't exist + * already, and associates it with the Ethernet device. + * The function may be called with addr <= 0, in this case addr value is ignored + * and the bus is scanned to detect a PHY. Scanning should only be used if only + * one PHY is expected to be present on the MDIO bus, otherwise it is undefined + * which PHY is returned. + * + * @bus: MII/MDIO bus that hosts the PHY + * @addr: PHY address on MDIO bus + * @dev: Ethernet device to associate to the PHY + * @interface: type of MAC-PHY interface + * @return pointer to phy_device if a PHY is found, or NULL otherwise + */ struct phy_device *phy_connect(struct mii_dev *bus, int addr, struct eth_device *dev, phy_interface_t interface); + static inline ofnode phy_get_ofnode(struct phy_device *phydev) { return ofnode_null(); |