diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/TQM5200.h | 2 | ||||
| -rw-r--r-- | include/configs/TQM834x.h | 2 | ||||
| -rw-r--r-- | include/configs/o2dnt.h | 25 | ||||
| -rw-r--r-- | include/miiphy.h | 2 |
4 files changed, 27 insertions, 4 deletions
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index e23fd77861..5ad1939481 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -369,7 +369,7 @@ #endif #define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */ -#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ +#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /* diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index c25a7775b8..ba2f4ead2c 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -249,7 +249,7 @@ extern int tqm834x_num_flash_banks; #define CONFIG_MPC83XX_TSEC1_NAME "TSEC0" #define CONFIG_MPC83XX_TSEC2 1 #define CONFIG_MPC83XX_TSEC2_NAME "TSEC1" -#define TSEC1_PHY_ADDR 0 +#define TSEC1_PHY_ADDR 2 #define TSEC2_PHY_ADDR 1 #define TSEC1_PHYIDX 0 #define TSEC2_PHYIDX 0 diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h index 325f654776..981651ab07 100644 --- a/include/configs/o2dnt.h +++ b/include/configs/o2dnt.h @@ -137,8 +137,20 @@ /* * IPB Bus clocking configuration. */ -#undef CFG_IPBSPEED_133 /* define for 133MHz speed */ +#define CFG_IPBSPEED_133 /* define for 133MHz speed */ + +#if defined(CFG_IPBSPEED_133) +/* + * PCI Bus clocking configuration + * + * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if + * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't + * been tested with a IPB Bus Clock of 66 MHz. + */ +#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#endif #endif + /* * I2C configuration */ @@ -263,7 +275,16 @@ #define CFG_BOOTCS_START CFG_FLASH_BASE #define CFG_BOOTCS_SIZE CFG_FLASH_SIZE -#define CFG_BOOTCS_CFG 0x00047801 + +#ifdef CFG_PCISPEED_66 +/* + * For 66 MHz PCI clock additional Wait State is needed for CS0 (flash). + */ +#define CFG_BOOTCS_CFG 0x00057801 /* for pci_clk = 66 MHz */ +#else +#define CFG_BOOTCS_CFG 0x00047801 /* for pci_clk = 33 MHz */ +#endif + #define CFG_CS0_START CFG_FLASH_BASE #define CFG_CS0_SIZE CFG_FLASH_SIZE diff --git a/include/miiphy.h b/include/miiphy.h index 3c6ee77077..71716b04d4 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -53,6 +53,8 @@ int miiphy_duplex(char *devname, unsigned char addr); int miiphy_link(char *devname, unsigned char addr); #endif +void miiphy_init(void); + void miiphy_register(char *devname, int (* read)(char *devname, unsigned char addr, unsigned char reg, unsigned short *value), |