diff options
Diffstat (limited to 'drivers/serial/serial_stm32.c')
| -rw-r--r-- | drivers/serial/serial_stm32.c | 158 |
1 files changed, 130 insertions, 28 deletions
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c index 6717ffaaa5..f26234549c 100644 --- a/drivers/serial/serial_stm32.c +++ b/drivers/serial/serial_stm32.c @@ -7,19 +7,21 @@ #include <common.h> #include <clk.h> #include <dm.h> -#include <asm/io.h> #include <serial.h> +#include <watchdog.h> +#include <asm/io.h> #include <asm/arch/stm32.h> #include "serial_stm32.h" -static int stm32_serial_setbrg(struct udevice *dev, int baudrate) +static void _stm32_serial_setbrg(fdt_addr_t base, + struct stm32_uart_info *uart_info, + u32 clock_rate, + int baudrate) { - struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); - bool stm32f4 = plat->uart_info->stm32f4; - fdt_addr_t base = plat->base; + bool stm32f4 = uart_info->stm32f4; u32 int_div, mantissa, fraction, oversampling; - int_div = DIV_ROUND_CLOSEST(plat->clock_rate, baudrate); + int_div = DIV_ROUND_CLOSEST(clock_rate, baudrate); if (int_div < 16) { oversampling = 8; @@ -33,6 +35,53 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate) fraction = int_div % oversampling; writel(mantissa | fraction, base + BRR_OFFSET(stm32f4)); +} + +static int stm32_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + + _stm32_serial_setbrg(plat->base, plat->uart_info, + plat->clock_rate, baudrate); + + return 0; +} + +static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + bool stm32f4 = plat->uart_info->stm32f4; + u8 uart_enable_bit = plat->uart_info->uart_enable_bit; + u32 cr1 = plat->base + CR1_OFFSET(stm32f4); + u32 config = 0; + + if (stm32f4) + return -EINVAL; /* not supported in driver*/ + + clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); + /* update usart configuration (uart need to be disable) + * PCE: parity check control + * PS : '0' : Even / '1' : Odd + * M[1:0] = '00' : 8 Data bits + * M[1:0] = '01' : 9 Data bits with parity + */ + switch (parity) { + default: + case SERIAL_PAR_NONE: + config = 0; + break; + case SERIAL_PAR_ODD: + config = USART_CR1_PCE | USART_CR1_PS | USART_CR1_M0; + break; + case SERIAL_PAR_EVEN: + config = USART_CR1_PCE | USART_CR1_M0; + break; + } + clrsetbits_le32(cr1, + USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 | + USART_CR1_M0, + config); + setbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit)); return 0; } @@ -44,12 +93,13 @@ static int stm32_serial_getc(struct udevice *dev) fdt_addr_t base = plat->base; u32 isr = readl(base + ISR_OFFSET(stm32f4)); - if ((isr & USART_ISR_FLAG_RXNE) == 0) + if ((isr & USART_ISR_RXNE) == 0) return -EAGAIN; - if (isr & USART_ISR_FLAG_ORE) { + if (isr & (USART_ISR_PE | USART_ISR_ORE)) { if (!stm32f4) - setbits_le32(base + ICR_OFFSET, USART_ICR_OREF); + setbits_le32(base + ICR_OFFSET, + USART_ICR_PCECF | USART_ICR_ORECF); else readl(base + RDR_OFFSET(stm32f4)); return -EIO; @@ -58,13 +108,13 @@ static int stm32_serial_getc(struct udevice *dev) return readl(base + RDR_OFFSET(stm32f4)); } -static int stm32_serial_putc(struct udevice *dev, const char c) +static int _stm32_serial_putc(fdt_addr_t base, + struct stm32_uart_info *uart_info, + const char c) { - struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); - bool stm32f4 = plat->uart_info->stm32f4; - fdt_addr_t base = plat->base; + bool stm32f4 = uart_info->stm32f4; - if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_FLAG_TXE) == 0) + if ((readl(base + ISR_OFFSET(stm32f4)) & USART_ISR_TXE) == 0) return -EAGAIN; writel(c, base + TDR_OFFSET(stm32f4)); @@ -72,6 +122,13 @@ static int stm32_serial_putc(struct udevice *dev, const char c) return 0; } +static int stm32_serial_putc(struct udevice *dev, const char c) +{ + struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); + + return _stm32_serial_putc(plat->base, plat->uart_info, c); +} + static int stm32_serial_pending(struct udevice *dev, bool input) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); @@ -80,24 +137,34 @@ static int stm32_serial_pending(struct udevice *dev, bool input) if (input) return readl(base + ISR_OFFSET(stm32f4)) & - USART_ISR_FLAG_RXNE ? 1 : 0; + USART_ISR_RXNE ? 1 : 0; else return readl(base + ISR_OFFSET(stm32f4)) & - USART_ISR_FLAG_TXE ? 0 : 1; + USART_ISR_TXE ? 0 : 1; +} + +static void _stm32_serial_init(fdt_addr_t base, + struct stm32_uart_info *uart_info) +{ + bool stm32f4 = uart_info->stm32f4; + u8 uart_enable_bit = uart_info->uart_enable_bit; + + /* Disable uart-> enable fifo -> enable uart */ + clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); + if (uart_info->has_fifo) + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); + setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | + BIT(uart_enable_bit)); } static int stm32_serial_probe(struct udevice *dev) { struct stm32x7_serial_platdata *plat = dev_get_platdata(dev); struct clk clk; - fdt_addr_t base = plat->base; int ret; - bool stm32f4; - u8 uart_enable_bit; plat->uart_info = (struct stm32_uart_info *)dev_get_driver_data(dev); - stm32f4 = plat->uart_info->stm32f4; - uart_enable_bit = plat->uart_info->uart_enable_bit; ret = clk_get_by_index(dev, 0, &clk); if (ret < 0) @@ -115,13 +182,7 @@ static int stm32_serial_probe(struct udevice *dev) return plat->clock_rate; }; - /* Disable uart-> enable fifo-> enable uart */ - clrbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | - BIT(uart_enable_bit)); - if (plat->uart_info->has_fifo) - setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_FIFOEN); - setbits_le32(base + CR1_OFFSET(stm32f4), USART_CR1_RE | USART_CR1_TE | - BIT(uart_enable_bit)); + _stm32_serial_init(plat->base, plat->uart_info); return 0; } @@ -149,6 +210,7 @@ static const struct dm_serial_ops stm32_serial_ops = { .pending = stm32_serial_pending, .getc = stm32_serial_getc, .setbrg = stm32_serial_setbrg, + .setparity = stm32_serial_setparity }; U_BOOT_DRIVER(serial_stm32) = { @@ -161,3 +223,43 @@ U_BOOT_DRIVER(serial_stm32) = { .probe = stm32_serial_probe, .flags = DM_FLAG_PRE_RELOC, }; + +#ifdef CONFIG_DEBUG_UART_STM32 +#include <debug_uart.h> +static inline struct stm32_uart_info *_debug_uart_info(void) +{ + struct stm32_uart_info *uart_info; + +#if defined(CONFIG_STM32F4) + uart_info = &stm32f4_info; +#elif defined(CONFIG_STM32F7) + uart_info = &stm32f7_info; +#else + uart_info = &stm32h7_info; +#endif + return uart_info; +} + +static inline void _debug_uart_init(void) +{ + fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + struct stm32_uart_info *uart_info = _debug_uart_info(); + + _stm32_serial_init(base, uart_info); + _stm32_serial_setbrg(base, uart_info, + CONFIG_DEBUG_UART_CLOCK, + CONFIG_BAUDRATE); + printf("DEBUG done\n"); +} + +static inline void _debug_uart_putc(int c) +{ + fdt_addr_t base = CONFIG_DEBUG_UART_BASE; + struct stm32_uart_info *uart_info = _debug_uart_info(); + + while (_stm32_serial_putc(base, uart_info, c) == -EAGAIN) + WATCHDOG_RESET(); +} + +DEBUG_UART_FUNCS +#endif |