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-rw-r--r--configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig1
-rw-r--r--configs/xilinx_zynqmp_p_a2197_00_revA_defconfig1
-rw-r--r--configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig1
3 files changed, 0 insertions, 3 deletions
diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
index 177558db41..280983d187 100644
--- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
+++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
@@ -7,7 +7,6 @@ CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
CONFIG_DEBUG_UART=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
diff --git a/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig b/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig
index ba2cbaba58..f206be8a31 100644
--- a/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig
+++ b/configs/xilinx_zynqmp_p_a2197_00_revA_defconfig
@@ -9,7 +9,6 @@ CONFIG_IDENT_STRING=" Xilinx ZynqMP SC for Versal"
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_ZYNQMP_USB=y
-CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
index 7731407118..62c3730515 100644
--- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
+++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig
@@ -6,7 +6,6 @@ CONFIG_SPL=y
CONFIG_DEBUG_UART_BASE=0xff000000
CONFIG_DEBUG_UART_CLOCK=100000000
CONFIG_ZYNQMP_USB=y
-CONFIG_SPL_ZYNQMP_TWO_SDHCI=y
CONFIG_DEBUG_UART=y
CONFIG_AHCI=y
CONFIG_DISTRO_DEFAULTS=y