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-rw-r--r--board/gw8260/flash.c18
-rw-r--r--board/gw8260/gw8260.c56
2 files changed, 37 insertions, 37 deletions
diff --git a/board/gw8260/flash.c b/board/gw8260/flash.c
index 6cf311f2e0..6035f6976c 100644
--- a/board/gw8260/flash.c
+++ b/board/gw8260/flash.c
@@ -54,7 +54,7 @@
#include <common.h>
#include <mpc8260.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
static ulong flash_get_size (vu_long *addr, flash_info_t *info);
static int write_word (flash_info_t *info, ulong dest, ulong data);
@@ -82,21 +82,21 @@ unsigned long flash_init (void)
int i;
/* Init: no FLASHes known */
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
/* for now, only support the 4 MB Flash SIMM */
- size = flash_get_size((vu_long *)CFG_FLASH0_BASE, &flash_info[0]);
+ size = flash_get_size((vu_long *)CONFIG_SYS_FLASH0_BASE, &flash_info[0]);
/*
* protect monitor and environment sectors
*/
-#if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH0_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_BASE,
- CFG_MONITOR_BASE+monitor_flash_len-1,
+ CONFIG_SYS_MONITOR_BASE,
+ CONFIG_SYS_MONITOR_BASE+monitor_flash_len-1,
&flash_info[0]);
#endif
@@ -110,7 +110,7 @@ unsigned long flash_init (void)
&flash_info[0]);
#endif
- return (CFG_FLASH0_SIZE * 1024 * 1024); /*size*/
+ return (CONFIG_SYS_FLASH0_SIZE * 1024 * 1024); /*size*/
}
/*********************************************************************/
@@ -357,7 +357,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
last = start;
addr = (vu_long*)(info->start[l_sect]);
while ((addr[0] & 0x80808080) != 0x80808080) {
- if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
return 1;
}
@@ -512,7 +512,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
/* data polling for D7 */
start = get_timer (0);
while ((*((vu_long *)dest) & 0x80808080) != (data & 0x80808080)) {
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (1);
}
}
diff --git a/board/gw8260/gw8260.c b/board/gw8260/gw8260.c
index 42c9e0d108..28f5ca99e8 100644
--- a/board/gw8260/gw8260.c
+++ b/board/gw8260/gw8260.c
@@ -226,7 +226,7 @@ int checkboard (void)
}
-#if defined (CFG_DRAM_TEST)
+#if defined (CONFIG_SYS_DRAM_TEST)
/*********************************************************************/
/* NAME: move64() - moves a double word (64-bit) */
/* */
@@ -256,7 +256,7 @@ static void move64 (unsigned long long *src, unsigned long long *dest)
}
-#if defined (CFG_DRAM_TEST_DATA)
+#if defined (CONFIG_SYS_DRAM_TEST_DATA)
unsigned long long pattern[] = {
0xaaaaaaaaaaaaaaaaULL,
@@ -319,7 +319,7 @@ unsigned long long pattern[] = {
/*********************************************************************/
int mem_test_data (void)
{
- unsigned long long *pmem = (unsigned long long *) CFG_SDRAM_BASE;
+ unsigned long long *pmem = (unsigned long long *) CONFIG_SYS_SDRAM_BASE;
unsigned long long temp64 = 0;
int num_patterns = sizeof (pattern) / sizeof (pattern[0]);
int i;
@@ -346,9 +346,9 @@ int mem_test_data (void)
return 0;
}
-#endif /* CFG_DRAM_TEST_DATA */
+#endif /* CONFIG_SYS_DRAM_TEST_DATA */
-#if defined (CFG_DRAM_TEST_ADDRESS)
+#if defined (CONFIG_SYS_DRAM_TEST_ADDRESS)
/*********************************************************************/
/* NAME: mem_test_address() - test address lines */
/* */
@@ -373,8 +373,8 @@ int mem_test_data (void)
int mem_test_address (void)
{
volatile unsigned int *pmem =
- (volatile unsigned int *) CFG_SDRAM_BASE;
- const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024) / 4;
+ (volatile unsigned int *) CONFIG_SYS_SDRAM_BASE;
+ const unsigned int size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 4;
unsigned int i;
/* write address to each location */
@@ -391,9 +391,9 @@ int mem_test_address (void)
}
return 0;
}
-#endif /* CFG_DRAM_TEST_ADDRESS */
+#endif /* CONFIG_SYS_DRAM_TEST_ADDRESS */
-#if defined (CFG_DRAM_TEST_WALK)
+#if defined (CONFIG_SYS_DRAM_TEST_WALK)
/*********************************************************************/
/* NAME: mem_march() - memory march */
/* */
@@ -451,7 +451,7 @@ int mem_march (volatile unsigned long long *base,
}
return 0;
}
-#endif /* CFG_DRAM_TEST_WALK */
+#endif /* CONFIG_SYS_DRAM_TEST_WALK */
/*********************************************************************/
/* NAME: mem_test_walk() - a simple walking ones test */
@@ -483,8 +483,8 @@ int mem_test_walk (void)
{
unsigned long long mask;
volatile unsigned long long *pmem =
- (volatile unsigned long long *) CFG_SDRAM_BASE;
- const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024) / 8;
+ (volatile unsigned long long *) CONFIG_SYS_SDRAM_BASE;
+ const unsigned long size = (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024) / 8;
unsigned int i;
@@ -557,21 +557,21 @@ int testdram (void)
if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {
printf ("Testing RAM ... ");
}
-#ifdef CFG_DRAM_TEST_DATA
+#ifdef CONFIG_SYS_DRAM_TEST_DATA
if (rundata == 1) {
if (mem_test_data () == 1) {
return 1;
}
}
#endif
-#ifdef CFG_DRAM_TEST_ADDRESS
+#ifdef CONFIG_SYS_DRAM_TEST_ADDRESS
if (runaddress == 1) {
if (mem_test_address () == 1) {
return 1;
}
}
#endif
-#ifdef CFG_DRAM_TEST_WALK
+#ifdef CONFIG_SYS_DRAM_TEST_WALK
if (runwalk == 1) {
if (mem_test_walk () == 1) {
return 1;
@@ -584,7 +584,7 @@ int testdram (void)
return 0;
}
-#endif /* CFG_DRAM_TEST */
+#endif /* CONFIG_SYS_DRAM_TEST */
/*********************************************************************/
/* NAME: initdram() - initializes SDRAM controller */
@@ -593,11 +593,11 @@ int testdram (void)
/* Initializes the MPC8260's SDRAM controller. */
/* */
/* INPUTS: */
-/* CFG_IMMR - MPC8260 Internal memory map */
-/* CFG_SDRAM_BASE - Physical start address of SDRAM */
-/* CFG_PSDMR - SDRAM mode register */
-/* CFG_MPTPR - Memory refresh timer prescaler register */
-/* CFG_SDRAM0_SIZE - SDRAM size */
+/* CONFIG_SYS_IMMR - MPC8260 Internal memory map */
+/* CONFIG_SYS_SDRAM_BASE - Physical start address of SDRAM */
+/* CONFIG_SYS_PSDMR - SDRAM mode register */
+/* CONFIG_SYS_MPTPR - Memory refresh timer prescaler register */
+/* CONFIG_SYS_SDRAM0_SIZE - SDRAM size */
/* */
/* RETURNS: */
/* SDRAM size in bytes */
@@ -608,10 +608,10 @@ int testdram (void)
/*********************************************************************/
phys_size_t initdram (int board_type)
{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
volatile memctl8260_t *memctl = &immap->im_memctl;
- volatile uchar c = 0, *ramaddr = (uchar *) (CFG_SDRAM_BASE + 0x8);
- ulong psdmr = CFG_PSDMR;
+ volatile uchar c = 0, *ramaddr = (uchar *) (CONFIG_SYS_SDRAM_BASE + 0x8);
+ ulong psdmr = CONFIG_SYS_PSDMR;
int i;
/*
@@ -631,11 +631,11 @@ phys_size_t initdram (int board_type)
* accessing the SDRAM with a single-byte transaction."
*
* The appropriate BRx/ORx registers have already been set when we
- * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+ * get here. The SDRAM can be accessed at the address CONFIG_SYS_SDRAM_BASE.
*/
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_mptpr = CFG_MPTPR;
+ memctl->memc_psrt = CONFIG_SYS_PSRT;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;
*ramaddr = c;
@@ -651,7 +651,7 @@ phys_size_t initdram (int board_type)
*ramaddr = c;
/* return total ram size */
- return (CFG_SDRAM0_SIZE * 1024 * 1024);
+ return (CONFIG_SYS_SDRAM0_SIZE * 1024 * 1024);
}
/*********************************************************************/
generated by cgit (git 2.34.1) at 2024-11-18 11:23:17 +0000