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-rw-r--r--board/boundary/nitrogen6x/nitrogen6x.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 79ab44904e..f664f6de6b 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -622,7 +622,6 @@ int board_video_skip(void)
static void setup_display(void)
{
struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
- struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
int reg;
@@ -633,10 +632,6 @@ static void setup_display(void)
reg |= MXC_CCM_CCGR3_LDB_DI0_MASK;
writel(reg, &mxc_ccm->CCGR3);
- /* set PFD1_FRAC to 0x13 == 455 MHz (480*18)/0x13 */
- writel(ANATOP_PFD_480_PFD1_FRAC_MASK, &anatop->pfd_480_clr);
- writel(0x13<<ANATOP_PFD_480_PFD1_FRAC_SHIFT, &anatop->pfd_480_set);
-
/* set LDB0, LDB1 clk select to 011/011 */
reg = readl(&mxc_ccm->cs2cdr);
reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK
@@ -666,7 +661,8 @@ static void setup_display(void)
writel(reg, &iomux->gpr[2]);
reg = readl(&iomux->gpr[3]);
- reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK)
+ reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK
+ |IOMUXC_GPR3_HDMI_MUX_CTL_MASK))
| (IOMUXC_GPR3_MUX_SRC_IPU1_DI0
<<IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET);
writel(reg, &iomux->gpr[3]);