diff options
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 | ||||
| -rw-r--r-- | arch/arm/dts/imx6ul-phycore-segin.dts | 7 | ||||
| -rw-r--r-- | arch/arm/dts/imx6ull-phycore-segin.dts | 70 | ||||
| -rw-r--r-- | arch/arm/dts/pcl063-common.dtsi (renamed from arch/arm/dts/imx6ul-pcl063.dtsi) | 33 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mx6/Kconfig | 12 |
5 files changed, 117 insertions, 6 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index f01ff9f17c..24a409d7d1 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -589,6 +589,7 @@ dtb-$(CONFIG_MX6UL) += \ dtb-$(CONFIG_MX6ULL) += \ imx6ull-14x14-evk.dtb \ imx6ull-colibri.dtb \ + imx6ull-phycore-segin.dtb \ imx6ull-dart-6ul.dtb dtb-$(CONFIG_ARCH_MX6) += \ diff --git a/arch/arm/dts/imx6ul-phycore-segin.dts b/arch/arm/dts/imx6ul-phycore-segin.dts index a46012e2b4..7d68bf8430 100644 --- a/arch/arm/dts/imx6ul-phycore-segin.dts +++ b/arch/arm/dts/imx6ul-phycore-segin.dts @@ -16,7 +16,8 @@ /dts-v1/; -#include "imx6ul-pcl063.dtsi" +#include "imx6ul.dtsi" +#include "pcl063-common.dtsi" / { model = "Phytec phyBOARD-i.MX6UL-Segin SBC"; @@ -24,6 +25,10 @@ "fsl,imx6ul"; }; +&gpmi { + status = "okay"; +}; + &i2c1 { i2c_rtc: rtc@68 { compatible = "microcrystal,rv4162"; diff --git a/arch/arm/dts/imx6ull-phycore-segin.dts b/arch/arm/dts/imx6ull-phycore-segin.dts new file mode 100644 index 0000000000..6df3ad2e4a --- /dev/null +++ b/arch/arm/dts/imx6ull-phycore-segin.dts @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com> + */ + +/dts-v1/; + +#include "imx6ull.dtsi" +#include "pcl063-common.dtsi" + +/ { + model = "Phytec phyBOARD-i.MX6ULL-Segin SBC"; + compatible = "phytec,phyboard-imx6ull-segin", "phytec,imx6ull-pcl063", + "fsl,imx6ull"; +}; + +&i2c1 { + i2c_rtc: rtc@68 { + compatible = "microcrystal,rv4162"; + reg = <0x68>; + status = "okay"; + }; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart5>; + uart-has-rtscts; + status = "okay"; +}; + +&usdhc2 { + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb_otg1_id>; + dr_mode = "otg"; + srp-disable; + hnp-disable; + adp-disable; + status = "okay"; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_uart5: uart5grp { + fsl,pins = < + MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1 + MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1 + MX6UL_PAD_GPIO1_IO08__UART5_DCE_RTS 0x1b0b1 + MX6UL_PAD_GPIO1_IO09__UART5_DCE_CTS 0x1b0b1 + >; + }; + + pinctrl_usb_otg1_id: usbotg1idgrp { + fsl,pins = < + MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 + >; + }; + +}; diff --git a/arch/arm/dts/imx6ul-pcl063.dtsi b/arch/arm/dts/pcl063-common.dtsi index 24a6a47983..2b14b2dc5f 100644 --- a/arch/arm/dts/imx6ul-pcl063.dtsi +++ b/arch/arm/dts/pcl063-common.dtsi @@ -7,10 +7,6 @@ * Author: Christian Hemp <c.hemp@phytec.de> */ -/dts-v1/; - -#include "imx6ul.dtsi" - / { model = "Phytec phyCORE-i.MX6 Ultra Lite SOM"; compatible = "phytec,imx6ul-pcl063", "fsl,imx6ul"; @@ -47,7 +43,7 @@ pinctrl-0 = <&pinctrl_gpmi_nand>; nand-on-flash-bbt; fsl,no-blockmark-swap; - status = "okay"; + status = "disabled"; #address-cells = <1>; #size-cells = <1>; @@ -99,6 +95,18 @@ status = "okay"; }; +&usdhc2 { + u-boot,dm-spl; + u-boot,dm-pre-reloc; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <8>; + no-1-8-v; + non-removable; + keep-power-in-suspend; + status = "disabled"; +}; + &iomuxc { pinctrl-names = "default"; @@ -170,4 +178,19 @@ >; }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x170f9 + MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x100f9 + MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x170f9 + MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x170f9 + MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x170f9 + MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 + MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x170f9 + MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x170f9 + MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x170f9 + MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x170f9 + >; + }; }; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index f513c4c06f..baccc0b7a2 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -455,6 +455,18 @@ config TARGET_PCL063 select DM_THERMAL select SUPPORT_SPL +config TARGET_PCL063_ULL + bool "PHYTEC PCL063 (phyCORE-i.MX6ULL)" + select MX6ULL + select DM + select DM_ETH + select DM_GPIO + select DM_I2C + select DM_MMC + select DM_SERIAL + select DM_THERMAL + select SUPPORT_SPL + config TARGET_SECOMX6 bool "secomx6 boards" |