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-rw-r--r--arch/arm/mach-tegra/gpu.c66
1 files changed, 66 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
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+++ b/arch/arm/mach-tegra/gpu.c
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+/*
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Tegra vpr routines */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/tegra.h>
+#include <asm/arch/mc.h>
+
+#include <fdt_support.h>
+
+static bool _configured;
+
+void config_gpu(void)
+{
+ struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE;
+
+ /* Turn VPR off */
+ writel(0, &mc->mc_video_protect_size_mb);
+ writel(TEGRA_MC_VIDEO_PROTECT_REG_WRITE_ACCESS_DISABLED,
+ &mc->mc_video_protect_reg_ctrl);
+ /* read back to ensure the write went through */
+ readl(&mc->mc_video_protect_reg_ctrl);
+
+ debug("configured VPR\n");
+
+ _configured = true;
+}
+
+bool vpr_configured(void)
+{
+ return _configured;
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+
+int gpu_enable_node(void *blob, const char *gpupath)
+{
+ int offset;
+
+ if (vpr_configured()) {
+ offset = fdt_path_offset(blob, gpupath);
+ if (offset > 0) {
+ fdt_status_okay(blob, offset);
+ debug("enabled GPU node %s\n", gpupath);
+ }
+ }
+
+ return 0;
+}
+
+#endif