5338 files changed, 69120 insertions, 18329 deletions

diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 5d9645451d..636500d6ce 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -1,6 +1,7 @@
 variables:
   windows_vm: vs2017-win2016
   ubuntu_vm: ubuntu-18.04
+  macos_vm: macOS-10.15
   ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020
   # Add '-u 0' options for Azure pipelines, otherwise we get "permission
   # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
@@ -44,6 +45,20 @@ jobs:
           # Tell MSYS2 not to ‘cd’ our startup directory to HOME
           CHERE_INVOKING: yes
 
+  - job: tools_only_macOS
+    displayName: 'Ensure host tools build for macOS X'
+    pool:
+      vmImage: $(macos_vm)
+    steps:
+      - script: brew install make
+        displayName: Brew install dependencies
+      - script: |
+          gmake tools-only_config tools-only NO_SDL=1 \
+            HOSTCFLAGS="-I/usr/local/opt/openssl@1.1/include" \
+            HOSTLDFLAGS="-L/usr/local/opt/openssl@1.1/lib" \
+            -j$(sysctl -n hw.logicalcpu)
+        displayName: 'Perform tools-only build'
+
   - job: cppcheck
     displayName: 'Static code analysis with cppcheck'
     pool:
@@ -151,6 +166,19 @@ jobs:
           # seems to hang forever with pre-configured "container" environment
           docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh
 
+  - job: nokia_rx51_test
+    displayName: 'Run tests for Nokia RX-51 (aka N900)'
+    pool:
+      vmImage: $(ubuntu_vm)
+    container:
+      image: $(ci_runner_image)
+      options: $(container_option)
+    steps:
+      - script: |
+          ./tools/buildman/buildman --fetch-arch arm
+          export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH
+          test/nokia_rx51_test.sh
+
   - job: test_py
     displayName: 'test.py'
     pool:
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index beaf9b9042..badfcb4254 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -170,6 +170,14 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites:
       ./tools/patman/patman --test;
       make testconfig
 
+Run tests for Nokia RX-51 (aka N900):
+  tags: [ 'all' ]
+  stage: testsuites
+  script:
+    - ./tools/buildman/buildman --fetch-arch arm;
+      export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH;
+      test/nokia_rx51_test.sh
+
 # Test sandbox with test.py
 sandbox test.py:
   tags: [ 'all' ]
diff --git a/.readthedocs.yml b/.readthedocs.yml
index f3fb5ed51b..44949ea239 100644
--- a/.readthedocs.yml
+++ b/.readthedocs.yml
@@ -7,7 +7,7 @@ version: 2
 
 # Build documentation in the docs/ directory with Sphinx
 sphinx:
-  configuration: docs/conf.py
+  configuration: doc/conf.py
 
 # Optionally build your docs in additional formats such as PDF and ePub
 formats: []
diff --git a/.travis.yml b/.travis.yml
index fbfaaaff25..bb02b6d816 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -50,6 +50,8 @@ addons:
     - mtools
     - openssl
     - sbsigntool
+    - fakeroot
+    - mtd-utils
 
 install:
  # Clone uboot-test-hooks
@@ -492,6 +494,11 @@ matrix:
       script:
         - make tools-only_config envtools -j$(nproc)
 
+    - name: "Run tests for Nokia RX-51 (aka N900)"
+      script:
+        - export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH
+        - test/nokia_rx51_test.sh
+
     # test/py
     - name: "test/py sandbox"
       env:
diff --git a/Kconfig b/Kconfig
index 9a5e600753..0e7ccc0b07 100644
--- a/Kconfig
+++ b/Kconfig
@@ -209,6 +209,20 @@ if EXPERT
 	  When disabling this, please check if malloc calls, maybe
 	  should be replaced by calloc - if one expects zeroed memory.
 
+config SYS_MALLOC_DEFAULT_TO_INIT
+	bool "Default malloc to init while reserving the memory for it"
+	default n
+	help
+	  It may happen that one needs to move the dynamic allocation
+	  from one to another memory range, eg. when moving the malloc
+	  from the limited static to a potentially large dynamic (DDR)
+	  memory.
+
+	  If so then on top of setting the updated memory aside one
+	  needs to bring the malloc init.
+
+	  If such a scenario is sought choose yes.
+
 config TOOLS_DEBUG
 	bool "Enable debug information for tools"
 	help
@@ -254,7 +268,7 @@ config BUILD_TARGET
 	default "u-boot-elf.srec" if RCAR_GEN3
 	default "u-boot.itb" if SPL_LOAD_FIT && (ARCH_ROCKCHIP || \
 				ARCH_SUNXI || RISCV || ARCH_ZYNQMP)
-	default "u-boot.kwb" if KIRKWOOD
+	default "u-boot.kwb" if ARCH_KIRKWOOD
 	default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT
 	default "u-boot-with-spl.imx" if ARCH_MX6 && SPL
 	help
diff --git a/MAINTAINERS b/MAINTAINERS
index dd92af5182..1fd975c72f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -244,9 +244,12 @@ S:	Maintained
 F:	arch/arm/mach-mediatek/
 F:	arch/arm/include/asm/arch-mediatek/
 F:	board/mediatek/
+F:	doc/device-tree-bindings/phy/phy-mtk-*
+F:	doc/device-tree-bindings/usb/mediatek,*
 F:	doc/README.mediatek
 F:	drivers/clk/mediatek/
 F:	drivers/mmc/mtk-sd.c
+F:	drivers/phy/phy-mtk-*
 F:	drivers/pinctrl/mediatek/
 F:	drivers/power/domain/mtk-power-domain.c
 F:	drivers/ram/mediatek/
@@ -272,6 +275,7 @@ M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 S:	Maintained
 F:	arch/arm/include/asm/arch-owl/
 F:	arch/arm/mach-owl/
+F:	doc/board/actions/
 F:	drivers/clk/owl/
 F:	drivers/serial/serial_owl.c
 F:	include/configs/owl-common.h
@@ -587,6 +591,7 @@ M:	Angelo Dureghello <angelo@sysam.it>
 S:	Maintained
 T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-coldfire.git
 F:	arch/m68k/
+F:	doc/arch/m68k.rst
 
 DFU
 M:	Lukasz Majewski <lukma@denx.de>
@@ -597,13 +602,16 @@ F:	cmd/usb_*.c
 F:	common/dfu.c
 F:	common/update.c
 F:	common/usb_storage.c
+F:	doc/api/dfu.rst
 F:	drivers/dfu/
 F:	drivers/usb/gadget/
+F:	include/dfu.h
 
 DRIVER MODEL
 M:	Simon Glass <sjg@chromium.org>
 S:	Maintained
 T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-dm.git
+F:	doc/driver-model/
 F:	drivers/core/
 F:	include/dm/
 F:	test/dm/
@@ -625,12 +633,19 @@ F:	include/asm-generic/pe.h
 F:	lib/charset.c
 F:	lib/efi*/
 F:	test/py/tests/test_efi*
+F:	test/py/tests/test_efi*/
 F:	test/unicode_ut.c
 F:	cmd/bootefi.c
 F:	cmd/efidebug.c
 F:	cmd/nvedit_efi.c
 F:	tools/file2include.c
 
+EFI VARIABLES VIA OP-TEE
+M:	Ilias Apalodimas <ilias.apalodimas@linaro.org>
+S:	Maintained
+F:	lib/efi_loader/efi_variable_tee.c
+F:	include/mm_communication.h
+
 ENVIRONMENT
 M:	Joe Hershberger <joe.hershberger@ni.com>
 R:	Wolfgang Denk <wd@denx.de>
@@ -814,7 +829,7 @@ S:	Maintained
 F:	arch/powerpc/
 
 POWERPC MPC8XX
-M:	Christophe Leroy <christophe.leroy@c-s.fr>
+M:	Christophe Leroy <christophe.leroy@csgroup.eu>
 S:	Maintained
 T:	git https://gitlab.denx.de/u-boot/custodians/u-boot-mpc8xx.git
 F:	arch/powerpc/cpu/mpc8xx/
diff --git a/Makefile b/Makefile
index 6bb9cf55f2..3851dd9fa0 100644
--- a/Makefile
+++ b/Makefile
@@ -3,7 +3,7 @@
 VERSION = 2020
 PATCHLEVEL = 07
 SUBLEVEL =
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc3
 NAME =
 
 # *DOCUMENTATION*
@@ -722,13 +722,6 @@ else
 KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
 endif
 
-# turn jbsr into jsr for m68k
-ifeq ($(ARCH),m68k)
-ifeq ($(findstring 3.4,$(shell $(CC) --version)),3.4)
-KBUILD_AFLAGS += -Wa,-gstabs,-S
-endif
-endif
-
 # Prohibit date/time macros, which would make the build non-deterministic
 KBUILD_CFLAGS   += $(call cc-option,-Werror=date-time)
 
@@ -926,6 +919,9 @@ ALL-$(CONFIG_EFI_STUB) += u-boot-payload.efi
 ifneq ($(BUILD_ROM)$(CONFIG_BUILD_ROM),)
 ALL-$(CONFIG_X86_RESET_VECTOR) += u-boot.rom
 endif
+ifeq ($(CONFIG_SYS_COREBOOT)$(CONFIG_SPL),yy)
+ALL-$(CONFIG_BINMAN) += u-boot-x86-with-spl.bin
+endif
 
 # Build a combined spl + u-boot image for sunxi
 ifeq ($(CONFIG_ARCH_SUNXI)$(CONFIG_SPL),yy)
@@ -933,7 +929,7 @@ ALL-y += u-boot-sunxi-with-spl.bin
 endif
 
 # enable combined SPL/u-boot/dtb rules for tegra
-ifeq ($(CONFIG_TEGRA)$(CONFIG_SPL),yy)
+ifeq ($(CONFIG_ARCH_TEGRA)$(CONFIG_SPL),yy)
 ALL-y += u-boot-tegra.bin u-boot-nodtb-tegra.bin
 ALL-$(CONFIG_OF_SEPARATE) += u-boot-dtb-tegra.bin
 endif
@@ -1626,7 +1622,10 @@ u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
 endif
 endif
 
-ifneq ($(CONFIG_TEGRA),)
+u-boot-x86-with-spl.bin: spl/u-boot-spl.bin u-boot.bin FORCE
+	$(call if_changed,binman)
+
+ifneq ($(CONFIG_ARCH_TEGRA),)
 ifneq ($(CONFIG_BINMAN),)
 # Makes u-boot-dtb-tegra.bin u-boot-tegra.bin u-boot-nodtb-tegra.bin
 %-dtb-tegra.bin %-tegra.bin %-nodtb-tegra.bin: \
@@ -2031,7 +2030,7 @@ CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
 	       boot* u-boot* MLO* SPL System.map fit-dtb.blob* \
 	       u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
 	       lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
-	       idbloader.img flash.bin flash.log
+	       idbloader.img flash.bin flash.log defconfig
 
 # Directories & files removed with 'make mrproper'
 MRPROPER_DIRS  += include/config include/generated spl tpl \
diff --git a/README b/README
index 0834850676..17dc0ee33b 100644
--- a/README
+++ b/README
@@ -896,8 +896,6 @@ The following options need to be configured:
 
 		CONFIG_TULIP
 		Support for Digital 2114x chips.
-		Optional CONFIG_TULIP_SELECT_MEDIA for board specific
-		modem chip initialisation (KS8761/QS6611).
 
 		CONFIG_NATSEMI
 		Support for National dp83815 chips.
@@ -2475,14 +2473,6 @@ Configuration Settings:
 - CONFIG_SYS_BAUDRATE_TABLE:
 		List of legal baudrate settings for this board.
 
-- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
-		Begin and End addresses of the area used by the
-		simple memory test.
-
-- CONFIG_SYS_MEMTEST_SCRATCH:
-		Scratch address used by the alternate memory test
-		You only need to set this if address zero isn't writeable
-
 - CONFIG_SYS_MEM_RESERVE_SECURE
 		Only implemented for ARMv8 for now.
 		If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
@@ -2739,10 +2729,6 @@ Configuration Settings:
 	regular expression. This allows multiple variables to define the same
 	flags without explicitly listing them for each variable.
 
-- CONFIG_ENV_ACCESS_IGNORE_FORCE
-	If defined, don't allow the -f switch to env set override variable
-	access flags.
-
 The following definitions that deal with the placement and management
 of environment data (variable area); in general, we support the
 following configurations:
diff --git a/api/api.c b/api/api.c
index 4fc451a83d..c7f5db776a 100644
--- a/api/api.c
+++ b/api/api.c
@@ -11,6 +11,7 @@
 #include <env.h>
 #include <malloc.h>
 #include <env_internal.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <api_public.h>
 #include <u-boot/crc.h>
diff --git a/api/api_display.c b/api/api_display.c
index 8ae358abb1..4f2cdd7330 100644
--- a/api/api_display.c
+++ b/api/api_display.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <api_public.h>
 #include <lcd.h>
+#include <log.h>
 #include <video_font.h> /* Get font width and height */
 
 /* lcd.h needs BMP_LOGO_HEIGHT to calculate CONSOLE_ROWS */
diff --git a/api/api_storage.c b/api/api_storage.c
index 7ae03ac230..a0dacad1a5 100644
--- a/api/api_storage.c
+++ b/api/api_storage.c
@@ -8,6 +8,7 @@
 #include <config.h>
 #include <common.h>
 #include <api_public.h>
+#include <part.h>
 
 #if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
 #include <usb.h>
diff --git a/arch/Kconfig b/arch/Kconfig
index 91e049b322..a11f872938 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -86,6 +86,7 @@ config RISCV
 config SANDBOX
 	bool "Sandbox"
 	select BOARD_LATE_INIT
+	select BZIP2
 	select DM
 	select DM_GPIO
 	select DM_I2C
@@ -94,6 +95,7 @@ config SANDBOX
 	select DM_SERIAL
 	select DM_SPI
 	select DM_SPI_FLASH
+	select GZIP_COMPRESSED
 	select HAVE_BLOCK_DEVICE
 	select LZO
 	select OF_BOARD_SETUP
diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index 5b77642b8d..33b0593438 100644
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -62,12 +62,12 @@
 			max-speed = <100>;
 		};
 
-		ehci@0x40000 {
+		ehci@40000 {
 			compatible = "generic-ehci";
 			reg = < 0x40000 0x100 >;
 		};
 
-		ohci@0x60000 {
+		ohci@60000 {
 			compatible = "generic-ohci";
 			reg = < 0x60000 0x100 >;
 		};
diff --git a/arch/arc/dts/hsdk-common.dtsi b/arch/arc/dts/hsdk-common.dtsi
index fd4245e164..9aa10e4b25 100644
--- a/arch/arc/dts/hsdk-common.dtsi
+++ b/arch/arc/dts/hsdk-common.dtsi
@@ -84,12 +84,19 @@
 		phy-mode = "gmii";
 	};
 
-	ehci@0xf0040000 {
+	ehci@f0040000 {
 		compatible = "generic-ehci";
 		reg = <0xf0040000 0x100>;
+
+		/*
+		 * OHCI and EHCI have reset line shared so we don't add
+		 * reset property to OHCI node as it is probed later and
+		 * it will reset sucessfuly probed and configured EHCI HW.
+		 */
+		resets = <&cgu_rst HSDK_USB_RESET>;
 	};
 
-	ohci@0xf0060000 {
+	ohci@f0060000 {
 		compatible = "generic-ohci";
 		reg = <0xf0060000 0x100>;
 	};
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 516c14e105..a9f54f61e0 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -109,6 +109,8 @@
 #define ARC_AUX_SUBSYS_BUILD	0xF0
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+
 /* Accessors for auxiliary registers */
 #define read_aux_reg(reg)	__builtin_arc_lr(reg)
 
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index d38c18ef8f..63d6207c04 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -3,9 +3,14 @@
  * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
  */
 
+#include <common.h>
+#include <bootstage.h>
+#include <env.h>
+#include <image.h>
 #include <irq_func.h>
+#include <lmb.h>
+#include <log.h>
 #include <asm/cache.h>
-#include <common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index 8a1d67870a..85651b219c 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -6,6 +6,7 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <linux/kernel.h>
 #include <linux/log2.h>
diff --git a/arch/arc/lib/cpu.c b/arch/arc/lib/cpu.c
index 83246550ec..27b5832a0c 100644
--- a/arch/arc/lib/cpu.c
+++ b/arch/arc/lib/cpu.c
@@ -4,10 +4,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <vsprintf.h>
 #include <asm/arcregs.h>
 #include <asm/cache.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arc/lib/init_helpers.c b/arch/arc/lib/init_helpers.c
index c853f25d34..023eae1907 100644
--- a/arch/arc/lib/init_helpers.c
+++ b/arch/arc/lib/init_helpers.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
  */
 
+#include <init.h>
 #include <asm/cache.h>
 #include <common.h>
 
diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
index 4ffba84eeb..6882ebec6d 100644
--- a/arch/arc/lib/relocate.c
+++ b/arch/arc/lib/relocate.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <elf.h>
+#include <log.h>
 #include <asm-generic/sections.h>
 
 extern ulong __image_copy_start;
diff --git a/arch/arc/lib/reset.c b/arch/arc/lib/reset.c
index 30dd4b5238..fbb56ec83a 100644
--- a/arch/arc/lib/reset.c
+++ b/arch/arc/lib/reset.c
@@ -13,7 +13,7 @@ __weak void reset_cpu(ulong addr)
 	__builtin_arc_brk();
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	printf("Resetting the board...\n");
 
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1bcf345028..21df1c415f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -340,6 +340,34 @@ config SYS_CACHELINE_SIZE
 	default 64 if SYS_CACHE_SHIFT_6
 	default 32 if SYS_CACHE_SHIFT_5
 
+choice
+	prompt "Select the ARM data write cache policy"
+	default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
+					      TARGET_BCMNSP || CPU_PXA || RZA1
+	default SYS_ARM_CACHE_WRITEBACK
+
+config SYS_ARM_CACHE_WRITEBACK
+	bool "Write-back (WB)"
+	help
+	  A write updates the cache only and marks the cache line as dirty.
+	  External memory is updated only when the line is evicted or explicitly
+	  cleaned.
+
+config SYS_ARM_CACHE_WRITETHROUGH
+	bool "Write-through (WT)"
+	help
+	  A write updates both the cache and the external memory system.
+	  This does not mark the cache line as dirty.
+
+config SYS_ARM_CACHE_WRITEALLOC
+	bool "Write allocation (WA)"
+	help
+	  A cache line is allocated on a write miss. This means that executing a
+	  store instruction on the processor might cause a burst read to occur.
+	  There is a linefill to obtain the data for the cache line, before the
+	  write is performed.
+endchoice
+
 config ARCH_CPU_INIT
 	bool "Enable ARCH_CPU_INIT"
 	help
@@ -475,7 +503,7 @@ config TPL_USE_ARCH_MEMSET
 
 config SET_STACK_SIZE
 	bool "Enable an option to set max stack size that can be used"
-	default y if ARCH_VERSAL || ARCH_ZYNQMP
+	default y if ARCH_VERSAL || ARCH_ZYNQMP || ARCH_ZYNQ
 	help
 	  This will enable an option to set max stack size that can be
 	  used by U-Boot.
@@ -484,6 +512,7 @@ config STACK_SIZE
 	hex "Define max stack size that can be used by U-Boot"
 	depends on SET_STACK_SIZE
 	default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
+	default 0x1000000 if ARCH_ZYNQ
 	help
 	  Define Max stack size that can be used by U-Boot so that the
 	  initrd_high will be calculated as base stack pointer minus this
@@ -524,7 +553,7 @@ config ARCH_DAVINCI
 	help
 	  Support for TI's DaVinci platform.
 
-config KIRKWOOD
+config ARCH_KIRKWOOD
 	bool "Marvell Kirkwood"
 	select ARCH_MISC_INIT
 	select BOARD_EARLY_INIT_F
@@ -547,7 +576,7 @@ config TARGET_APF27
 	select CPU_ARM926EJS
 	select SUPPORT_SPL
 
-config ORION5X
+config ARCH_ORION5X
 	bool "Marvell Orion"
 	select CPU_ARM926EJS
 
@@ -880,7 +909,7 @@ config ARCH_OWL
 	select CLK
 	select CLK_OWL
 	select OF_CONTROL
-	select CONFIG_SYS_RELOC_GD_ENV_ADDR
+	select SYS_RELOC_GD_ENV_ADDR
 	imply CMD_DM
 
 config ARCH_QEMU
@@ -1113,7 +1142,7 @@ config ARCH_ZYNQMP
 	imply MP
 	imply DM_USB_GADGET
 
-config TEGRA
+config ARCH_TEGRA
 	bool "NVIDIA Tegra"
 	imply DISTRO_DEFAULTS
 	imply FAT_WRITE
@@ -1133,6 +1162,17 @@ config TARGET_VEXPRESS64_JUNO
 	bool "Support Versatile Express Juno Development Platform"
 	select ARM64
 	select PL01X_SERIAL
+	select DM
+	select OF_CONTROL
+	select OF_BOARD
+	select CLK
+	select DM_SERIAL
+	select ARM_PSCI_FW
+	select PSCI_RESET
+	select DM
+	select BLK
+	select USB
+	select DM_USB
 
 config TARGET_LS2080A_EMU
 	bool "Support ls2080a_emu"
@@ -1542,6 +1582,7 @@ config ARCH_UNIPHIER
 	bool "Socionext UniPhier SoCs"
 	select BOARD_LATE_INIT
 	select DM
+	select DM_ETH
 	select DM_GPIO
 	select DM_I2C
 	select DM_MMC
@@ -1567,7 +1608,7 @@ config ARCH_UNIPHIER
 	  Support for UniPhier SoC family developed by Socionext Inc.
 	  (formerly, System LSI Business Division of Panasonic Corporation)
 
-config STM32
+config ARCH_STM32
 	bool "Support STMicroelectronics STM32 MCU with cortex M"
 	select CPU_V7M
 	select DM
@@ -1737,7 +1778,7 @@ source "arch/arm/mach-keystone/Kconfig"
 
 source "arch/arm/mach-kirkwood/Kconfig"
 
-source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
+source "arch/arm/mach-lpc32xx/Kconfig"
 
 source "arch/arm/mach-mvebu/Kconfig"
 
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index e25bb0e594..94eb50bf72 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_ARCH_TEGRA),yy)
 CONFIG_CPU_V7A=
 CONFIG_CPU_ARM720T=y
 endif
@@ -22,7 +22,7 @@ arch-$(CONFIG_ARM64)		=-march=armv8-a
 
 # On Tegra systems we must build SPL for the armv4 core on the device
 # but otherwise we can use the value in CONFIG_SYS_ARM_ARCH
-ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_ARCH_TEGRA),yy)
 arch-y += -D__LINUX_ARM_ARCH__=4
 else
 arch-y += -D__LINUX_ARM_ARCH__=$(CONFIG_SYS_ARM_ARCH)
@@ -60,30 +60,28 @@ machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
 machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_K3)		+= k3
 machine-$(CONFIG_ARCH_KEYSTONE)		+= keystone
-# TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
-machine-$(CONFIG_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARCH_KIRKWOOD)		+= kirkwood
+machine-$(CONFIG_ARCH_LPC32XX)		+= lpc32xx
 machine-$(CONFIG_ARCH_MEDIATEK)		+= mediatek
 machine-$(CONFIG_ARCH_MESON)		+= meson
 machine-$(CONFIG_ARCH_MVEBU)		+= mvebu
-# TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
-# TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
-machine-$(CONFIG_ORION5X)		+= orion5x
 machine-$(CONFIG_ARCH_OMAP2PLUS)	+= omap2
+machine-$(CONFIG_ARCH_ORION5X)		+= orion5x
 machine-$(CONFIG_ARCH_OWL)		+= owl
+machine-$(CONFIG_ARCH_RMOBILE)		+= rmobile
+machine-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip
 machine-$(CONFIG_ARCH_S5PC1XX)		+= s5pc1xx
-machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
 machine-$(CONFIG_ARCH_SNAPDRAGON)	+= snapdragon
 machine-$(CONFIG_ARCH_SOCFPGA)		+= socfpga
-machine-$(CONFIG_ARCH_RMOBILE)		+= rmobile
-machine-$(CONFIG_ARCH_ROCKCHIP)		+= rockchip
-machine-$(CONFIG_STM32)			+= stm32
+machine-$(CONFIG_ARCH_STM32)		+= stm32
 machine-$(CONFIG_ARCH_STM32MP)		+= stm32mp
-machine-$(CONFIG_TEGRA)			+= tegra
+machine-$(CONFIG_ARCH_SUNXI)		+= sunxi
+machine-$(CONFIG_ARCH_TEGRA)		+= tegra
 machine-$(CONFIG_ARCH_U8500)		+= u8500
 machine-$(CONFIG_ARCH_UNIPHIER)		+= uniphier
+machine-$(CONFIG_ARCH_VERSAL)		+= versal
 machine-$(CONFIG_ARCH_ZYNQ)		+= zynq
 machine-$(CONFIG_ARCH_ZYNQMP)		+= zynqmp
-machine-$(CONFIG_ARCH_VERSAL)		+= versal
 machine-$(CONFIG_ARCH_ZYNQMP_R5)	+= zynqmp-r5
 
 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y))
diff --git a/arch/arm/cpu/arm11/cpu.c b/arch/arm/cpu/arm11/cpu.c
index 177d1f40b9..ffe35111d5 100644
--- a/arch/arm/cpu/arm11/cpu.c
+++ b/arch/arm/cpu/arm11/cpu.c
@@ -18,6 +18,7 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 
 static void cache_flush(void);
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 3f6af6f5a3..a3d4f14796 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
diff --git a/arch/arm/cpu/arm1136/mx31/timer.c b/arch/arm/cpu/arm1136/mx31/timer.c
index 3d07ee6809..a913860491 100644
--- a/arch/arm/cpu/arm1136/mx31/timer.c
+++ b/arch/arm/cpu/arm1136/mx31/timer.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/io.h>
 
diff --git a/arch/arm/cpu/arm1136/mx35/generic.c b/arch/arm/cpu/arm1136/mx35/generic.c
index 45bf49b5ac..e6fff5b220 100644
--- a/arch/arm/cpu/arm1136/mx35/generic.c
+++ b/arch/arm/cpu/arm1136/mx35/generic.c
@@ -8,7 +8,10 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <div64.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
@@ -377,8 +380,8 @@ u32 imx_get_fecclk(void)
 }
 #endif
 
-int do_mx35_showclocks(cmd_tbl_t *cmdtp,
-	int flag, int argc, char * const argv[])
+int do_mx35_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	u32 cpufreq = get_mcu_main_clk();
 	printf("mx35 cpu clock: %dMHz\n", cpufreq / 1000000);
diff --git a/arch/arm/cpu/arm1136/mx35/timer.c b/arch/arm/cpu/arm1136/mx35/timer.c
index c1cdf35fb2..f2541c398d 100644
--- a/arch/arm/cpu/arm1136/mx35/timer.c
+++ b/arch/arm/cpu/arm1136/mx35/timer.c
@@ -7,9 +7,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
+#include <asm/ptrace.h>
 
 /* General purpose timers bitfields */
 #define GPTCR_SWR       (1<<15)	/* Software reset */
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index 8437717a7b..f0fc58dead 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -11,7 +11,7 @@
 
 #include <common.h>
 
-#if defined(CONFIG_TEGRA)
+#if defined(CONFIG_ARCH_TEGRA)
 static ulong timestamp;
 static ulong lastdec;
 
diff --git a/arch/arm/cpu/arm920t/ep93xx/timer.c b/arch/arm/cpu/arm920t/ep93xx/timer.c
index 4829c996be..892bb06db1 100644
--- a/arch/arm/cpu/arm920t/ep93xx/timer.c
+++ b/arch/arm/cpu/arm920t/ep93xx/timer.c
@@ -12,7 +12,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <asm/arch/ep93xx.h>
 #include <asm/io.h>
diff --git a/arch/arm/cpu/arm920t/imx/timer.c b/arch/arm/cpu/arm920t/imx/timer.c
index 21129a7901..e9d5577921 100644
--- a/arch/arm/cpu/arm920t/imx/timer.c
+++ b/arch/arm/cpu/arm920t/imx/timer.c
@@ -18,6 +18,7 @@
 #if defined (CONFIG_IMX)
 
 #include <asm/arch/imx-regs.h>
+#include <linux/delay.h>
 
 int timer_init (void)
 {
@@ -48,7 +49,7 @@ ulong get_timer (ulong base)
 	return get_timer_masked() - base;
 }
 
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
 {
 	ulong endtime = get_timer_masked() + usec;
 	signed long diff;
diff --git a/arch/arm/cpu/arm926ejs/Makefile b/arch/arm/cpu/arm926ejs/Makefile
index b051025bb0..af63d5cc5e 100644
--- a/arch/arm/cpu/arm926ejs/Makefile
+++ b/arch/arm/cpu/arm926ejs/Makefile
@@ -13,7 +13,6 @@ endif
 endif
 
 obj-$(CONFIG_ARMADA100) += armada100/
-obj-$(if $(filter lpc32xx,$(SOC)),y) += lpc32xx/
 obj-$(CONFIG_MX25) += mx25/
 obj-$(CONFIG_MX27) += mx27/
 obj-$(if $(filter mxs,$(SOC)),y) += mxs/
diff --git a/arch/arm/cpu/arm926ejs/armada100/cpu.c b/arch/arm/cpu/arm926ejs/armada100/cpu.c
index 0c81de7e36..96726b3144 100644
--- a/arch/arm/cpu/arm926ejs/armada100/cpu.c
+++ b/arch/arm/cpu/arm926ejs/armada100/cpu.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/armada100.h>
 
diff --git a/arch/arm/cpu/arm926ejs/armada100/dram.c b/arch/arm/cpu/arm926ejs/armada100/dram.c
index f4e1f0db09..da0615faf1 100644
--- a/arch/arm/cpu/arm926ejs/armada100/dram.c
+++ b/arch/arm/cpu/arm926ejs/armada100/dram.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/armada100.h>
 
diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c
index f4962ec45f..0f1e68c835 100644
--- a/arch/arm/cpu/arm926ejs/armada100/timer.c
+++ b/arch/arm/cpu/arm926ejs/armada100/timer.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <time.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/armada100.h>
+#include <linux/delay.h>
 
 /*
  * Timer registers
diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c
index 7b7eaaf31d..acab9bccc0 100644
--- a/arch/arm/cpu/arm926ejs/cache.c
+++ b/arch/arm/cpu/arm926ejs/cache.c
@@ -4,6 +4,7 @@
  * Ilya Yanok, EmCraft Systems
  */
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/types.h>
 #include <common.h>
 
diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 6ab320da7d..93d7a02ed4 100644
--- a/arch/arm/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
@@ -16,6 +16,7 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 
 static void cache_flush(void);
diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c
index 09bda0e339..8f6cd4dc19 100644
--- a/arch/arm/cpu/arm926ejs/mx25/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx25/generic.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <div64.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <vsprintf.h>
 #include <asm/io.h>
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 04698fe563..4b726d5c73 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -20,8 +20,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/ptrace.h>
 
 /* nothing really to do with interrupts, just starts up a counter. */
 /* The 32KHz 32-bit timer overruns in 134217 seconds */
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 9bed0e91be..a003ab816a 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <div64.h>
+#include <net.h>
 #include <netdev.h>
 #include <vsprintf.h>
 #include <asm/io.h>
diff --git a/arch/arm/cpu/arm926ejs/mx27/timer.c b/arch/arm/cpu/arm926ejs/mx27/timer.c
index f51f0df8ec..408e88aa12 100644
--- a/arch/arm/cpu/arm926ejs/mx27/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx27/timer.c
@@ -17,9 +17,12 @@
 
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <asm/ptrace.h>
+#include <linux/delay.h>
 
 /* General purpose timers bitfields */
 #define GPTCR_SWR		(1 << 15)	/* Software reset	*/
diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 43d044d917..4e1cf3a1e3 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 16c080a1e1..12ebc1c802 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -10,8 +10,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
+#include <net.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -185,7 +189,8 @@ int print_cpuinfo(void)
 }
 #endif
 
-int do_mx28_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_mx28_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	printf("CPU:   %3d MHz\n", mxc_get_clock(MXC_ARM_CLK) / 1000000);
 	printf("BUS:   %3d MHz\n", mxc_get_clock(MXC_AHB_CLK) / 1000000);
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 9168b91f27..565392eab5 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <config.h>
+#include <init.h>
+#include <log.h>
 #include <serial.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
index cfd6c4a10f..2cfbd78095 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_lradc_init.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <config.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 542543cc28..a94803ee93 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <config.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index 7c57cab0b1..35ea71a5ba 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <config.h>
 #include <hang.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 
diff --git a/arch/arm/cpu/arm926ejs/mxs/timer.c b/arch/arm/cpu/arm926ejs/mxs/timer.c
index 226401dd6e..5ab4ed0c5a 100644
--- a/arch/arm/cpu/arm926ejs/mxs/timer.c
+++ b/arch/arm/cpu/arm926ejs/mxs/timer.c
@@ -10,10 +10,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 /* Maximum fixed count */
 #if defined(CONFIG_MX23)
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c
index 51c4a730f4..2106541074 100644
--- a/arch/arm/cpu/arm926ejs/spear/cpu.c
+++ b/arch/arm/cpu/arm926ejs/spear/cpu.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_misc.h>
@@ -80,7 +82,7 @@ int print_cpuinfo(void)
 #endif
 
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_ECC_BCH) && defined(CONFIG_NAND_FSMC)
-static int do_switch_ecc(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_switch_ecc(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	if (argc != 2)
diff --git a/arch/arm/cpu/arm926ejs/spear/reset.c b/arch/arm/cpu/arm926ejs/spear/reset.c
index 3b884cd0d3..a316540d52 100644
--- a/arch/arm/cpu/arm926ejs/spear/reset.c
+++ b/arch/arm/cpu/arm926ejs/spear/reset.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_syscntl.h>
+#include <linux/delay.h>
 
 void reset_cpu(ulong ignored)
 {
diff --git a/arch/arm/cpu/arm926ejs/spear/spl.c b/arch/arm/cpu/arm926ejs/spear/spl.c
index a919a455eb..08b98a2d06 100644
--- a/arch/arm/cpu/arm926ejs/spear/spl.c
+++ b/arch/arm/cpu/arm926ejs/spear/spl.c
@@ -7,9 +7,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <version.h>
 #include <asm/io.h>
+#include <asm/ptrace.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_defs.h>
 #include <asm/arch/spr_misc.h>
diff --git a/arch/arm/cpu/arm926ejs/spear/spr_misc.c b/arch/arm/cpu/arm926ejs/spear/spr_misc.c
index d5be646555..998423b652 100644
--- a/arch/arm/cpu/arm926ejs/spear/spr_misc.c
+++ b/arch/arm/cpu/arm926ejs/spear/spr_misc.c
@@ -182,7 +182,8 @@ static int write_mac(uchar *mac)
 }
 #endif
 
-int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_chip_config(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	void (*sram_setfreq) (unsigned int, unsigned int);
 	unsigned int frequency;
diff --git a/arch/arm/cpu/arm926ejs/spear/timer.c b/arch/arm/cpu/arm926ejs/spear/timer.c
index 28c09e9fd6..dd0f15c0ce 100644
--- a/arch/arm/cpu/arm926ejs/spear/timer.c
+++ b/arch/arm/cpu/arm926ejs/spear/timer.c
@@ -5,11 +5,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_gpt.h>
 #include <asm/arch/spr_misc.h>
+#include <asm/ptrace.h>
+#include <linux/delay.h>
 
 #define GPT_RESOLUTION	(CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
 #define READ_TIMER()	(readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index 73d57a2aae..14569e560b 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -19,7 +19,7 @@ config ARMV7_NONSEC
 config ARMV7_BOOT_SEC_DEFAULT
 	bool "Boot in secure mode by default" if EXPERT
 	depends on ARMV7_NONSEC
-	default y if TEGRA
+	default y if ARCH_TEGRA
 	---help---
 	Say Y here to boot in secure mode by default even if non-secure mode
 	is supported. This option is useful to boot kernels which do not
diff --git a/arch/arm/cpu/armv7/arch_timer.c b/arch/arm/cpu/armv7/arch_timer.c
index 2eb571050a..871629c233 100644
--- a/arch/arm/cpu/armv7/arch_timer.c
+++ b/arch/arm/cpu/armv7/arch_timer.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <div64.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.c b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
index 72f8eb7222..d7edefee23 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.c
@@ -10,7 +10,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <bitfield.h>
 #include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-core.h b/arch/arm/cpu/armv7/bcm235xx/clk-core.h
index ac475b6dc3..ace384dea7 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-core.h
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-core.h
@@ -4,6 +4,7 @@
  */
 
 #include <linux/stddef.h>
+#include <linux/stringify.h>
 
 #ifdef CONFIG_CLK_DEBUG
 #undef writel
diff --git a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
index 618af709fa..209ceca9a0 100644
--- a/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm235xx/clk-eth.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sysmap.h>
 #include <asm/kona-common/clk.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.c b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
index 6a36f948f0..26b673a540 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.c
@@ -10,7 +10,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <bitfield.h>
 #include <asm/arch/sysmap.h>
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-core.h b/arch/arm/cpu/armv7/bcm281xx/clk-core.h
index a736ae9e62..f0fbff081d 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-core.h
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-core.h
@@ -4,6 +4,7 @@
  */
 
 #include <linux/stddef.h>
+#include <linux/stringify.h>
 
 #ifdef CONFIG_CLK_DEBUG
 #undef writel
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
index 618af709fa..209ceca9a0 100644
--- a/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-eth.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sysmap.h>
 #include <asm/kona-common/clk.h>
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c
index 99eb7db342..146cf52608 100644
--- a/arch/arm/cpu/armv7/cache_v7.c
+++ b/arch/arm/cpu/armv7/cache_v7.c
@@ -5,6 +5,7 @@
  * Aneesh V <aneesh@ti.com>
  */
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/types.h>
 #include <common.h>
 #include <asm/armv7.h>
diff --git a/arch/arm/cpu/armv7/exception_level.c b/arch/arm/cpu/armv7/exception_level.c
index 6648aed291..f6d25bb682 100644
--- a/arch/arm/cpu/armv7/exception_level.c
+++ b/arch/arm/cpu/armv7/exception_level.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <bootm.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/armv7.h>
 #include <asm/secure.h>
 #include <asm/setjmp.h>
diff --git a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
index a5445338cb..896d2f9569 100644
--- a/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/iproc-common/hwinit-common.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 
 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 void enable_caches(void)
diff --git a/arch/arm/cpu/armv7/iproc-common/timer.c b/arch/arm/cpu/armv7/iproc-common/timer.c
index 668b5e11a6..a4255a44c0 100644
--- a/arch/arm/cpu/armv7/iproc-common/timer.c
+++ b/arch/arm/cpu/armv7/iproc-common/timer.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/iproc-common/timer.h>
 #include <asm/iproc-common/sysmap.h>
+#include <linux/delay.h>
 
 static inline uint64_t timer_global_read(void)
 {
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
index 6bf89e07d8..cfc7c9fbc6 100644
--- a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/sizes.h>
 
 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c
index 664c9c1f4d..91e988217a 100644
--- a/arch/arm/cpu/armv7/ls102xa/cpu.c
+++ b/arch/arm/cpu/armv7/ls102xa/cpu.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
@@ -16,6 +18,7 @@
 #include <fsl_esdhc.h>
 #include <config.h>
 #include <fsl_wdog.h>
+#include <linux/delay.h>
 
 #include "fsl_epu.h"
 
diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c
index 16ab8676fe..56ca7b0164 100644
--- a/arch/arm/cpu/armv7/ls102xa/fdt.c
+++ b/arch/arm/cpu/armv7/ls102xa/fdt.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <net.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index a779d33739..8a95ee86a9 100644
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/arch/fsl_serdes.h>
diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c
index a5f4e31ac7..2a32b30999 100644
--- a/arch/arm/cpu/armv7/ls102xa/timer.c
+++ b/arch/arm/cpu/armv7/ls102xa/timer.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <div64.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/cpu/armv7/mpu_v7r.c b/arch/arm/cpu/armv7/mpu_v7r.c
index 6deecfdc23..57ab640e26 100644
--- a/arch/arm/cpu/armv7/mpu_v7r.c
+++ b/arch/arm/cpu/armv7/mpu_v7r.c
@@ -12,6 +12,7 @@
 #include <asm/armv7.h>
 #include <asm/system.h>
 #include <asm/barriers.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 
 #include <asm/armv7_mpu.h>
diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
index 5f4076d6b7..7790f087a0 100644
--- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c
+++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clk.h>
 
diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c b/arch/arm/cpu/armv7/s5p-common/timer.c
index e54cfb06dc..3064fd25d4 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -8,10 +8,12 @@
 
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/pwm.h>
 #include <asm/arch/clk.h>
+#include <linux/delay.h>
 
 /* Use the old PWM interface for now */
 #undef CONFIG_DM_PWM
diff --git a/arch/arm/cpu/armv7/stv0991/reset.c b/arch/arm/cpu/armv7/stv0991/reset.c
index 008e271dcc..fb67de10f4 100644
--- a/arch/arm/cpu/armv7/stv0991/reset.c
+++ b/arch/arm/cpu/armv7/stv0991/reset.c
@@ -8,6 +8,7 @@
 #include <cpu_func.h>
 #include <asm/io.h>
 #include <asm/arch/stv0991_wdru.h>
+#include <linux/delay.h>
 void reset_cpu(ulong ignored)
 {
 	puts("System is going to reboot ...\n");
diff --git a/arch/arm/cpu/armv7/stv0991/timer.c b/arch/arm/cpu/armv7/stv0991/timer.c
index 695bdd7a5c..919529aa1b 100644
--- a/arch/arm/cpu/armv7/stv0991/timer.c
+++ b/arch/arm/cpu/armv7/stv0991/timer.c
@@ -5,11 +5,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch-stv0991/hardware.h>
 #include <asm/arch-stv0991/stv0991_cgu.h>
 #include <asm/arch-stv0991/stv0991_gpt.h>
+#include <linux/delay.h>
 
 static struct stv0991_cgu_regs *const stv0991_cgu_regs = \
 				(struct stv0991_cgu_regs *) (CGU_BASE_ADDR);
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 2c5d99e9ac..1ac50f558a 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -8,6 +8,7 @@
  */
 #include <config.h>
 #include <common.h>
+#include <asm/cache.h>
 
 #include <asm/arch/cpu.h>
 #include <asm/arch/cpucfg.h>
diff --git a/arch/arm/cpu/armv7/sunxi/timer.c b/arch/arm/cpu/armv7/sunxi/timer.c
index 6bda5fbbb6..65b64b5ac7 100644
--- a/arch/arm/cpu/armv7/sunxi/timer.c
+++ b/arch/arm/cpu/armv7/sunxi/timer.c
@@ -6,9 +6,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/timer.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c
index 6698b821d0..fd2ab37a8f 100644
--- a/arch/arm/cpu/armv7/vf610/generic.c
+++ b/arch/arm/cpu/armv7/vf610/generic.c
@@ -5,7 +5,11 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
@@ -237,8 +241,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
 }
 
 /* Dump some core clocks */
-int do_vf610_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+int do_vf610_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	printf("\n");
 	printf("cpu clock : %8d MHz\n", mxc_get_clock(MXC_ARM_CLK) / 1000000);
diff --git a/arch/arm/cpu/armv7/vf610/timer.c b/arch/arm/cpu/armv7/vf610/timer.c
index f858de953d..fa8f8fae10 100644
--- a/arch/arm/cpu/armv7/vf610/timer.c
+++ b/arch/arm/cpu/armv7/vf610/timer.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <div64.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 
 static struct pit_reg *cur_pit = (struct pit_reg *)PIT_BASE_ADDR;
 
diff --git a/arch/arm/cpu/armv7/virt-dt.c b/arch/arm/cpu/armv7/virt-dt.c
index 204187c1b4..61c82f6469 100644
--- a/arch/arm/cpu/armv7/virt-dt.c
+++ b/arch/arm/cpu/armv7/virt-dt.c
@@ -17,6 +17,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <stdio_dev.h>
 #include <linux/ctype.h>
 #include <linux/types.h>
diff --git a/arch/arm/cpu/armv7/virt-v7.c b/arch/arm/cpu/armv7/virt-v7.c
index 26c93393cd..5ffeca13d9 100644
--- a/arch/arm/cpu/armv7/virt-v7.c
+++ b/arch/arm/cpu/armv7/virt-v7.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <asm/armv7.h>
+#include <asm/cache.h>
 #include <asm/gic.h>
 #include <asm/io.h>
 #include <asm/secure.h>
diff --git a/arch/arm/cpu/armv7m/cache.c b/arch/arm/cpu/armv7m/cache.c
index 7353698557..d1aecf6a85 100644
--- a/arch/arm/cpu/armv7m/cache.c
+++ b/arch/arm/cpu/armv7m/cache.c
@@ -7,8 +7,11 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/armv7m.h>
+#include <asm/cache.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* Cache maintenance operation registers */
 
diff --git a/arch/arm/cpu/armv7m/systick-timer.c b/arch/arm/cpu/armv7m/systick-timer.c
index 5c310d306d..d2672fd40c 100644
--- a/arch/arm/cpu/armv7m/systick-timer.c
+++ b/arch/arm/cpu/armv7m/systick-timer.c
@@ -22,8 +22,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig
index 16c83e8614..3655990772 100644
--- a/arch/arm/cpu/armv8/Kconfig
+++ b/arch/arm/cpu/armv8/Kconfig
@@ -76,6 +76,12 @@ config SPL_ARMV8_SEC_FIRMWARE_SUPPORT
 	help
 	  Say Y here to support this framework in SPL phase.
 
+config SPL_RECOVER_DATA_SECTION
+	bool "save/restore SPL data section"
+	help
+	  Say Y here to save SPL data section for cold boot, and restore
+	  at warm boot in SPL phase.
+
 config SEC_FIRMWARE_ARMV8_PSCI
 	bool "PSCI implementation in secure monitor firmware"
 	depends on ARMV8_SEC_FIRMWARE_SUPPORT || SPL_ARMV8_SEC_FIRMWARE_SUPPORT
diff --git a/arch/arm/cpu/armv8/Makefile b/arch/arm/cpu/armv8/Makefile
index b349b13f49..2e48df0eb9 100644
--- a/arch/arm/cpu/armv8/Makefile
+++ b/arch/arm/cpu/armv8/Makefile
@@ -30,6 +30,10 @@ obj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o
 endif
 obj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o
 
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_RECOVER_DATA_SECTION) += spl_data.o
+endif
+
 obj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/
 obj-$(CONFIG_S32V234) += s32v234/
 obj-$(CONFIG_TARGET_HIKEY) += hisilicon/
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c
index 6a5518f9de..7c31d98a6f 100644
--- a/arch/arm/cpu/armv8/cache_v8.c
+++ b/arch/arm/cpu/armv8/cache_v8.c
@@ -10,6 +10,8 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/armv8/mmu.h>
 
@@ -555,7 +557,7 @@ static u64 set_one_region(u64 start, u64 size, u64 attrs, bool flag, int level)
 void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 				     enum dcache_option option)
 {
-	u64 attrs = PMD_ATTRINDX(option);
+	u64 attrs = PMD_ATTRINDX(option >> 2);
 	u64 real_start = start;
 	u64 real_size = size;
 
diff --git a/arch/arm/cpu/armv8/cpu-dt.c b/arch/arm/cpu/armv8/cpu-dt.c
index 267abb83e8..97d4473a68 100644
--- a/arch/arm/cpu/armv8/cpu-dt.c
+++ b/arch/arm/cpu/armv8/cpu-dt.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm/cache.h>
 #include <asm/psci.h>
 #include <asm/system.h>
 #include <asm/armv8/sec_firmware.h>
diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c
index 35752037bc..ea40c55dd2 100644
--- a/arch/arm/cpu/armv8/cpu.c
+++ b/arch/arm/cpu/armv8/cpu.c
@@ -14,6 +14,7 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/secure.h>
 #include <linux/compiler.h>
diff --git a/arch/arm/cpu/armv8/exception_level.c b/arch/arm/cpu/armv8/exception_level.c
index 9c1f4a8ca8..b11936548f 100644
--- a/arch/arm/cpu/armv8/exception_level.c
+++ b/arch/arm/cpu/armv8/exception_level.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <bootm.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/setjmp.h>
 
 /**
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index b25639183f..2f75b2cdd3 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -46,6 +46,7 @@ config ARCH_LS1028A
 	select SYS_FSL_ERRATUM_A009663 if !TFABOOT
 	select SYS_FSL_ERRATUM_A009942 if !TFABOOT
 	select SYS_FSL_ERRATUM_A050382
+	select RESV_RAM if GIC_V3_ITS
 	imply PANIC_HANG
 
 config ARCH_LS1043A
@@ -152,6 +153,7 @@ config ARCH_LS1088A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply SCSI
 	imply PANIC_HANG
 
@@ -202,6 +204,7 @@ config ARCH_LS2080A
 	select SYS_I2C_MXC_I2C2 if !TFABOOT
 	select SYS_I2C_MXC_I2C3 if !TFABOOT
 	select SYS_I2C_MXC_I2C4 if !TFABOOT
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 
@@ -229,6 +232,7 @@ config ARCH_LX2160A
 	select ARCH_EARLY_INIT_R
 	select BOARD_EARLY_INIT_F
 	select SYS_I2C_MXC
+	select RESV_RAM if GIC_V3_ITS
 	imply DISTRO_DEFAULTS
 	imply PANIC_HANG
 	imply SCSI
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b443894453..3fcedd53ff 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -10,8 +10,12 @@
 #include <fsl_ddr_sdram.h>
 #include <init.h>
 #include <hang.h>
+#include <log.h>
+#include <net.h>
 #include <vsprintf.h>
+#include <asm/cache.h>
 #include <asm/io.h>
+#include <asm/ptrace.h>
 #include <linux/errno.h>
 #include <asm/system.h>
 #include <fm_eth.h>
@@ -1156,8 +1160,10 @@ int arch_early_init_r(void)
 	fsl_rgmii_init();
 #endif
 #ifdef CONFIG_FMAN_ENET
+#ifndef CONFIG_DM_ETH
 	fman_enet_init();
 #endif
+#endif
 #ifdef CONFIG_SYS_DPAA_QBMAN
 	setup_qbman_portals();
 #endif
@@ -1379,7 +1385,7 @@ static int tfa_dram_init_banksize(void)
 	if (i > 0)
 		ret = 0;
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1402,7 +1408,7 @@ static int tfa_dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 	return ret;
 }
@@ -1465,7 +1471,7 @@ int dram_init_banksize(void)
 	}
 #endif	/* CONFIG_SYS_MEM_RESERVE_SECURE */
 
-#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_RESV_RAM) && !defined(CONFIG_SPL_BUILD)
 	/* Assign memory for MC */
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
 	if (gd->bd->bi_dram[2].size >=
@@ -1488,7 +1494,7 @@ int dram_init_banksize(void)
 				board_reserve_ram_top(gd->bd->bi_dram[0].size);
 		}
 	}
-#endif	/* CONFIG_FSL_MC_ENET */
+#endif	/* CONFIG_RESV_RAM */
 
 #ifdef CONFIG_SYS_DP_DDR_BASE_PHY
 #ifdef CONFIG_SYS_DDR_BLOCK3_BASE
@@ -1527,9 +1533,8 @@ int dram_init_banksize(void)
 void efi_add_known_memory(void)
 {
 	int i;
-	phys_addr_t ram_start, start;
+	phys_addr_t ram_start;
 	phys_size_t ram_size;
-	u64 pages;
 
 	/* Add RAM */
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
@@ -1547,11 +1552,8 @@ void efi_add_known_memory(void)
 		    gd->arch.resv_ram < ram_start + ram_size)
 			ram_size = gd->arch.resv_ram - ram_start;
 #endif
-		start = (ram_start + EFI_PAGE_MASK) & ~EFI_PAGE_MASK;
-		pages = (ram_size + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT;
-
-		efi_add_memory_map(start, pages, EFI_CONVENTIONAL_MEMORY,
-				   false);
+		efi_add_memory_map(ram_start, ram_size,
+				   EFI_CONVENTIONAL_MEMORY);
 	}
 }
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 077438765c..9c7546028a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <efi_loader.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <phy.h>
@@ -146,9 +148,8 @@ remove_psci_node:
 	fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
 			*boot_code_size);
 #if CONFIG_IS_ENABLED(EFI_LOADER)
-	efi_add_memory_map((uintptr_t)&secondary_boot_code,
-			   ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
-			   EFI_RESERVED_MEMORY_TYPE, false);
+	efi_add_memory_map((uintptr_t)&secondary_boot_code, *boot_code_size,
+			   EFI_RESERVED_MEMORY_TYPE);
 #endif
 }
 #endif
@@ -471,6 +472,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
 			     CONFIG_SYS_CLK_FREQ, 1);
 
+#ifdef CONFIG_GIC_V3_ITS
+	ls_gic_rd_tables_init(blob);
+#endif
+
 #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
 	ft_pci_setup(blob, bd);
 #endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
index cb64cc2db8..41c89b8904 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_serdes.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
index d143864af1..aa6fd6b28c 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_serdes.c
@@ -5,7 +5,11 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
index 8110412da6..49df8b3790 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
+#include <log.h>
 #include <asm/arch-fsl-layerscape/immap_lsch3.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
 #include <asm/arch-fsl-layerscape/fsl_portals.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index ca07c68863..1ea887b331 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -5,10 +5,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <image.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/arch/mp.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 #include "cpu.h"
 #include <asm/arch-fsl-layerscape/soc.h>
 
@@ -258,7 +261,7 @@ int cpu_status(u32 nr)
 	return 0;
 }
 
-int cpu_release(u32 nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char *const argv[])
 {
 	u64 boot_addr;
 	u64 *table = (u64 *)get_spin_tbl_addr();
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
index d391f93041..1ddb267093 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c
@@ -3,9 +3,11 @@
  * Copyright 2016 NXP Semiconductor, Inc.
  */
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <config.h>
 #include <errno.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/types.h>
 #include <asm/arch/soc.h>
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index d0e10cb007..ad7ea05935 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -6,17 +6,22 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <cpu_func.h>
 #include <env.h>
 #include <fsl_immap.h>
 #include <fsl_ifc.h>
 #include <init.h>
+#include <linux/sizes.h>
+#include <log.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/global_data.h>
 #include <asm/arch-fsl-layerscape/config.h>
 #include <asm/arch-fsl-layerscape/ns_access.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
+#include <asm/gic-v3.h>
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include <fsl_csu.h>
 #endif
@@ -30,9 +35,50 @@
 #include <fsl_immap.h>
 #ifdef CONFIG_TFABOOT
 #include <env_internal.h>
+#endif
+#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
 DECLARE_GLOBAL_DATA_PTR;
 #endif
 
+#ifdef CONFIG_GIC_V3_ITS
+#define PENDTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
+#define PROPTABLE_MAX_SZ	ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
+#define GIC_LPI_SIZE		ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
+				PROPTABLE_MAX_SZ, SZ_1M)
+static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
+{
+	u32 phandle;
+	int err;
+	struct fdt_memory gic_rd_tables;
+
+	gic_rd_tables.start = base;
+	gic_rd_tables.end = base + size - 1;
+	err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
+					 &phandle);
+	if (err < 0)
+		debug("%s: failed to add reserved memory: %d\n", __func__, err);
+
+	return err;
+}
+
+int ls_gic_rd_tables_init(void *blob)
+{
+	u64 gic_lpi_base;
+	int ret;
+
+	gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
+	ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
+	if (ret)
+		return ret;
+
+	ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
+	if (ret)
+		debug("%s: failed to init gic-lpi-tables\n", __func__);
+
+	return ret;
+}
+#endif
+
 bool soc_has_dp_ddr(void)
 {
 	struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
index accad6e8ae..77724336d6 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
@@ -7,7 +7,11 @@
 #include <clock_legacy.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <fsl_ifc.h>
 #include <i2c.h>
diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index cbd35b7f4a..b29bc30fc2 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -8,8 +8,10 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
+#include <asm/cache.h>
 #include <asm/macro.h>
 #include <asm/psci.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 
 /*
diff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c
index 46e63294fe..e23629ab0b 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -5,9 +5,11 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <time.h>
 #include <asm/system.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/cpu/armv8/hisilicon/pinmux.c b/arch/arm/cpu/armv8/hisilicon/pinmux.c
index c549ddb335..5183e00a44 100644
--- a/arch/arm/cpu/armv8/hisilicon/pinmux.c
+++ b/arch/arm/cpu/armv8/hisilicon/pinmux.c
@@ -6,9 +6,11 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
+#include <linux/bitops.h>
 
 struct hi6220_pinmux0_regs *pmx0 =
 	(struct hi6220_pinmux0_regs *)HI6220_PINMUX0_BASE;
diff --git a/arch/arm/cpu/armv8/s32v234/cpu.c b/arch/arm/cpu/armv8/s32v234/cpu.c
index b5a9513ead..8ee3adc805 100644
--- a/arch/arm/cpu/armv8/s32v234/cpu.c
+++ b/arch/arm/cpu/armv8/s32v234/cpu.c
@@ -5,11 +5,14 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 #include <asm/arch/mc_me_regs.h>
+#include <linux/bitops.h>
 #include "cpu.h"
 
 u32 cpu_mask(void)
diff --git a/arch/arm/cpu/armv8/s32v234/generic.c b/arch/arm/cpu/armv8/s32v234/generic.c
index ec4641dcdb..bc07dae318 100644
--- a/arch/arm/cpu/armv8/s32v234/generic.c
+++ b/arch/arm/cpu/armv8/s32v234/generic.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/cpu/armv8/sec_firmware.c b/arch/arm/cpu/armv8/sec_firmware.c
index 95ea57d571..bfc0fac3ef 100644
--- a/arch/arm/cpu/armv8/sec_firmware.c
+++ b/arch/arm/cpu/armv8/sec_firmware.c
@@ -6,6 +6,11 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <errno.h>
+#include <fdt_support.h>
+#include <image.h>
+#include <log.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 #include <linux/kernel.h>
 #include <asm/io.h>
 #include <asm/system.h>
diff --git a/arch/arm/cpu/armv8/spl_data.c b/arch/arm/cpu/armv8/spl_data.c
new file mode 100644
index 0000000000..8fd986a67a
--- /dev/null
+++ b/arch/arm/cpu/armv8/spl_data.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <common.h>
+#include <spl.h>
+
+char __data_save_start[0] __section(.__data_save_start);
+char __data_save_end[0] __section(.__data_save_end);
+
+u32 cold_reboot_flag = 1;
+
+void spl_save_restore_data(void)
+{
+	u32 data_size = __data_save_end - __data_save_start;
+
+	if (cold_reboot_flag == 1) {
+		/* Save data section to data_save section */
+		memcpy(__data_save_start, __data_save_start - data_size,
+		       data_size);
+	} else {
+		/* Restore the data_save section to data section */
+		memcpy(__data_save_start - data_size, __data_save_start,
+		       data_size);
+	}
+
+	cold_reboot_flag++;
+}
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds b/arch/arm/cpu/armv8/u-boot-spl.lds
index ccbf359bd1..0e67ab09d7 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -38,6 +38,14 @@ SECTIONS
 		*(.data*)
 	} >.sram
 
+#ifdef CONFIG_SPL_RECOVER_DATA_SECTION
+	.data_save : {
+		*(.__data_save_start)
+		. = SIZEOF(.data);
+		*(.__data_save_end)
+	} >.sram
+#endif
+
 	.u_boot_list : {
 		. = ALIGN(8);
 		KEEP(*(SORT(.u_boot_list*)));
diff --git a/arch/arm/cpu/pxa/cache.c b/arch/arm/cpu/pxa/cache.c
index d4dfe7f6d8..a2ec5e28c7 100644
--- a/arch/arm/cpu/pxa/cache.c
+++ b/arch/arm/cpu/pxa/cache.c
@@ -4,6 +4,7 @@
  */
 
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/types.h>
 #include <common.h>
 
diff --git a/arch/arm/cpu/pxa/cpuinfo.c b/arch/arm/cpu/pxa/cpuinfo.c
index 5379e13e2b..0d9542f998 100644
--- a/arch/arm/cpu/pxa/cpuinfo.c
+++ b/arch/arm/cpu/pxa/cpuinfo.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <linux/compiler.h>
diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index 002ff7988b..ea91d8aaec 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -11,8 +11,10 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <irq_func.h>
 #include <asm/arch/pxa-regs.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 #include <command.h>
diff --git a/arch/arm/cpu/pxa/timer.c b/arch/arm/cpu/pxa/timer.c
index 169fed808b..8e9d610441 100644
--- a/arch/arm/cpu/pxa/timer.c
+++ b/arch/arm/cpu/pxa/timer.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 
 int timer_init(void)
diff --git a/arch/arm/cpu/pxa/usb.c b/arch/arm/cpu/pxa/usb.c
index 80a5977415..13e010d91e 100644
--- a/arch/arm/cpu/pxa/usb.c
+++ b/arch/arm/cpu/pxa/usb.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c
index 8e20c96bcd..a5cdaf5a66 100644
--- a/arch/arm/cpu/sa1100/timer.c
+++ b/arch/arm/cpu/sa1100/timer.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <SA-1100.h>
 #include <time.h>
+#include <linux/delay.h>
 
 static ulong get_timer_masked (void)
 {
@@ -23,7 +24,7 @@ ulong get_timer (ulong base)
 	return get_timer_masked ();
 }
 
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
 {
 	ulong tmo;
 	ulong endtime;
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index af7d804b66..c6af87cf5e 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -34,7 +34,7 @@ dtb-$(CONFIG_ARCH_DAVINCI) += \
 	da850-lcdk.dtb \
 	da850-lego-ev3.dtb
 
-dtb-$(CONFIG_KIRKWOOD) += \
+dtb-$(CONFIG_ARCH_KIRKWOOD) += \
 	kirkwood-atl-sbx81lifkw.dtb \
 	kirkwood-atl-sbx81lifxcat.dtb \
 	kirkwood-blackarmor-nas220.dtb \
@@ -106,6 +106,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
 
 dtb-$(CONFIG_ROCKCHIP_RK3328) += \
 	rk3328-evb.dtb \
+	rk3328-roc-cc.dtb \
 	rk3328-rock64.dtb
 
 dtb-$(CONFIG_ROCKCHIP_RK3368) += \
@@ -125,12 +126,15 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
 	rk3399-leez-p710.dtb \
 	rk3399-nanopc-t4.dtb \
 	rk3399-nanopi-m4.dtb \
+	rk3399-nanopi-m4-2gb.dtb \
 	rk3399-nanopi-neo4.dtb \
 	rk3399-orangepi.dtb \
+	rk3399-pinebook-pro.dtb \
 	rk3399-puma-ddr1333.dtb \
 	rk3399-puma-ddr1600.dtb \
 	rk3399-puma-ddr1866.dtb \
 	rk3399-roc-pc.dtb \
+	rk3399-roc-pc-mezzanine.dtb \
 	rk3399-rock-pi-4.dtb \
 	rk3399-rock960.dtb \
 	rk3399-rockpro64.dtb
@@ -159,7 +163,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
 	meson-g12b-a311d-khadas-vim3.dtb \
 	meson-sm1-khadas-vim3l.dtb \
 	meson-sm1-sei610.dtb
-dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
+dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
 	tegra20-medcom-wide.dtb \
 	tegra20-paz00.dtb \
 	tegra20-plutux.dtb \
@@ -371,15 +375,27 @@ dtb-$(CONFIG_ARCH_LS1021A) += ls1021a-qds-duart.dtb \
 	ls1021a-twr-duart.dtb ls1021a-twr-lpuart.dtb \
 	ls1021a-iot-duart.dtb ls1021a-tsn.dtb
 dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
+	fsl-ls2080a-qds-42-x.dtb \
 	fsl-ls2080a-rdb.dtb \
 	fsl-ls2081a-rdb.dtb \
 	fsl-ls2088a-rdb-qspi.dtb \
 	fsl-ls1088a-rdb.dtb \
 	fsl-ls1088a-qds.dtb \
+	fsl-ls1088a-qds-21-x.dtb \
+	fsl-ls1088a-qds-29-x.dtb \
 	fsl-ls1028a-rdb.dtb \
-	fsl-ls1028a-qds.dtb \
+	fsl-ls1028a-qds-duart.dtb \
+	fsl-ls1028a-qds-lpuart.dtb \
 	fsl-lx2160a-rdb.dtb \
-	fsl-lx2160a-qds.dtb
+	fsl-lx2160a-qds.dtb \
+	fsl-lx2160a-qds-3-x-x.dtb \
+	fsl-lx2160a-qds-3-11-x.dtb \
+	fsl-lx2160a-qds-7-x-x.dtb \
+	fsl-lx2160a-qds-7-11-x.dtb \
+	fsl-lx2160a-qds-19-x-x.dtb \
+	fsl-lx2160a-qds-19-11-x.dtb \
+	fsl-lx2160a-qds-20-x-x.dtb \
+	fsl-lx2160a-qds-20-11-x.dtb
 dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
 	fsl-ls1043a-qds-lpuart.dtb \
 	fsl-ls1043a-rdb.dtb \
@@ -732,7 +748,10 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
 	imx8mm-verdin.dtb \
 	imx8mn-ddr4-evk.dtb \
 	imx8mq-evk.dtb \
-	imx8mp-evk.dtb
+	imx8mm-beacon-kit.dtb \
+	imx8mq-phanbell.dtb \
+	imx8mp-evk.dtb \
+	imx8mq-pico-pi.dtb
 
 dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
 	imxrt1020-evk.dtb
@@ -748,17 +767,21 @@ dtb-$(CONFIG_RCAR_GEN2) += \
 	r8a7794-silk-u-boot.dtb
 
 dtb-$(CONFIG_RCAR_GEN3) += \
-	r8a7795-h3ulcb-u-boot.dtb \
-	r8a7795-salvator-x-u-boot.dtb \
-	r8a7796-m3ulcb-u-boot.dtb \
-	r8a7796-salvator-x-u-boot.dtb \
-	r8a77965-m3nulcb-u-boot.dtb \
+	r8a77950-ulcb-u-boot.dtb \
+	r8a77950-salvator-x-u-boot.dtb \
+	r8a77960-ulcb-u-boot.dtb \
+	r8a77960-salvator-x-u-boot.dtb \
+	r8a77965-ulcb-u-boot.dtb \
 	r8a77965-salvator-x-u-boot.dtb \
 	r8a77970-eagle-u-boot.dtb \
 	r8a77980-condor-u-boot.dtb \
 	r8a77990-ebisu-u-boot.dtb \
 	r8a77995-draak-u-boot.dtb
 
+ifdef CONFIG_RCAR_GEN3
+DTC_FLAGS += -R 4 -p 0x1000
+endif
+
 dtb-$(CONFIG_RZA1) += \
 	r7s72100-gr-peach-u-boot.dtb
 
diff --git a/arch/arm/dts/armada-3720-uDPU.dts b/arch/arm/dts/armada-3720-uDPU.dts
index 683dac2a7c..7f4b8222f4 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -109,11 +109,11 @@
 &comphy {
 	phy0 {
 		phy-type = <PHY_TYPE_SGMII1>;
-		phy-speed = <PHY_SPEED_1_25G>;
+		phy-speed = <PHY_SPEED_3_125G>;
 	};
         phy1 {
                 phy-type = <PHY_TYPE_SGMII0>;
-                phy-speed = <PHY_SPEED_1_25G>;
+                phy-speed = <PHY_SPEED_3_125G>;
         };
 
         phy2 {
@@ -125,22 +125,16 @@
 &eth0 {
 	pinctrl-0 = <&pcie_pins>;
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "sgmii-2500";
+	managed = "in-band-status";
 	phy = <&ethphy0>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &eth1 {
 	status = "okay";
-	phy-mode = "sgmii";
+	phy-mode = "sgmii-2500";
+	managed = "in-band-status";
 	phy = <&ethphy1>;
-	fixed-link {
-		speed = <1000>;
-		full-duplex;
-	};
 };
 
 &i2c0 {
diff --git a/arch/arm/dts/armada-xp-crs305-1g-4s.dts b/arch/arm/dts/armada-xp-crs305-1g-4s.dts
index 1116f5c96c..010b83b542 100644
--- a/arch/arm/dts/armada-xp-crs305-1g-4s.dts
+++ b/arch/arm/dts/armada-xp-crs305-1g-4s.dts
@@ -1,110 +1,17 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Device Tree file for CRS305-1G-4S board
+ * Device Tree file for MikroTik CRS305-1G-4S+ board
  *
- * Copyright (C) 2016 Allied Telesis Labs
- *
- * Based on armada-xp-db.dts
- *
- * Note: this Device Tree assumes that the bootloader has remapped the
- * internal registers to 0xf1000000 (instead of the default
- * 0xd0000000). The 0xf1000000 is the default used by the recent,
- * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
- * boards were delivered with an older version of the bootloader that
- * left internal registers mapped at 0xd0000000. If you are in this
- * situation, you should either update your bootloader (preferred
- * solution) or the below Device Tree should be adjusted.
+ * Copyright (C) 2020 Sartura Ltd.
+ * Author: Luka Kovacic <luka.kovacic@sartura.hr>
  */
 
-/dts-v1/;
-#include "armada-xp-98dx3236.dtsi"
-#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
+#include "armada-xp-crs305-1g-4s.dtsi"
 
 / {
-	model = "CRS305-1G-4S";
-	compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
-
-	chosen {
-		stdout-path = "serial0:115200n8";
-		bootargs = "console=ttyS0,115200 earlyprintk";
-	};
-
-	aliases {
-		spi0 = &spi0;
-	};
-
-	memory {
-		device_type = "memory";
-		reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
-	};
-};
-
-&L2 {
-	arm,parity-enable;
-	marvell,ecc-enable;
-};
-
-&devbus_bootcs {
-	status = "okay";
-
-	/* Device Bus parameters are required */
-
-	/* Read parameters */
-	devbus,bus-width    = <16>;
-	devbus,turn-off-ps  = <60000>;
-	devbus,badr-skew-ps = <0>;
-	devbus,acc-first-ps = <124000>;
-	devbus,acc-next-ps  = <248000>;
-	devbus,rd-setup-ps  = <0>;
-	devbus,rd-hold-ps   = <0>;
-
-	/* Write parameters */
-	devbus,sync-enable = <0>;
-	devbus,wr-high-ps  = <60000>;
-	devbus,wr-low-ps   = <60000>;
-	devbus,ale-wr-ps   = <60000>;
-};
-
-&uart0 {
-	status = "okay";
-};
-
-&uart1 {
-	status = "okay";
-};
-
-&i2c0 {
-	clock-frequency = <100000>;
-	status = "okay";
-};
-
-&usb0 {
-	status = "okay";
+	model = "MikroTik CRS305-1G-4S+";
 };
 
 &spi0 {
 	status = "okay";
-
-	spi-flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "spi-flash", "jedec,spi-nor";
-		reg = <0>; /* Chip select 0 */
-		spi-max-frequency = <108000000>;
-		m25p,fast-read;
-
-		partition@u-boot {
-			reg = <0x00000000 0x00100000>;
-			label = "u-boot";
-		};
-		partition@u-boot-env {
-			reg = <0x00100000 0x00040000>;
-			label = "u-boot-env";
-		};
-		partition@unused {
-			reg = <0x00140000 0x00ec0000>;
-			label = "unused";
-		};
-
-	};
 };
diff --git a/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi b/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
new file mode 100644
index 0000000000..c8839eac94
--- /dev/null
+++ b/arch/arm/dts/armada-xp-crs305-1g-4s.dtsi
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for CRS305-1G-4S board
+ *
+ * Copyright (C) 2016 Allied Telesis Labs
+ * Copyright (C) 2020 Sartura Ltd.
+ *
+ * Based on armada-xp-db.dts
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
+ */
+
+/dts-v1/;
+#include "armada-xp-98dx3236.dtsi"
+#include "armada-xp-crs305-1g-4s-u-boot.dtsi"
+
+/ {
+	model = "CRS305-1G-4S+";
+	compatible = "marvell,armadaxp-98dx3236", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "console=ttyS0,115200 earlyprintk";
+	};
+
+	aliases {
+		spi0 = &spi0;
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
+	};
+};
+
+&L2 {
+	arm,parity-enable;
+	marvell,ecc-enable;
+};
+
+&devbus_bootcs {
+	status = "okay";
+
+	/* Device Bus parameters are required */
+
+	/* Read parameters */
+	devbus,bus-width    = <16>;
+	devbus,turn-off-ps  = <60000>;
+	devbus,badr-skew-ps = <0>;
+	devbus,acc-first-ps = <124000>;
+	devbus,acc-next-ps  = <248000>;
+	devbus,rd-setup-ps  = <0>;
+	devbus,rd-hold-ps   = <0>;
+
+	/* Write parameters */
+	devbus,sync-enable = <0>;
+	devbus,wr-high-ps  = <60000>;
+	devbus,wr-low-ps   = <60000>;
+	devbus,ale-wr-ps   = <60000>;
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <100000>;
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	spi-flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "spi-flash", "jedec,spi-nor";
+		reg = <0>; /* Chip select 0 */
+		spi-max-frequency = <108000000>;
+		m25p,fast-read;
+
+		partition@u-boot {
+			reg = <0x00000000 0x00080000>;
+			label = "u-boot";
+		};
+		partition@u-boot-env {
+			reg = <0x00080000 0x00010000>;
+			label = "u-boot-env";
+		};
+		partition@firmware {
+			reg = <0x00090000 0x00f70000>;
+			label = "firmware";
+		};
+
+	};
+};
diff --git a/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi b/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
new file mode 100644
index 0000000000..22fae16c9d
--- /dev/null
+++ b/arch/arm/dts/armada-xp-synology-ds414-u-boot.dtsi
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+&spi0 {
+	u-boot,dm-pre-reloc;
+
+	spi-flash@0 {
+		u-boot,dm-pre-reloc;
+	};
+};
diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi
index 36548dad62..68d03627f4 100644
--- a/arch/arm/dts/bcm283x-u-boot.dtsi
+++ b/arch/arm/dts/bcm283x-u-boot.dtsi
@@ -19,3 +19,11 @@
 &gpio {
 	u-boot,dm-pre-reloc;
 };
+
+&uart0_gpio14 {
+	u-boot,dm-pre-reloc;
+};
+
+&uart1_gpio14 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/cros-ec-keyboard.dtsi b/arch/arm/dts/cros-ec-keyboard.dtsi
index 9c7fb0acae..4a0c1037fb 100644
--- a/arch/arm/dts/cros-ec-keyboard.dtsi
+++ b/arch/arm/dts/cros-ec-keyboard.dtsi
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * Keyboard dts fragment for devices that use cros-ec-keyboard
  *
  * Copyright (c) 2014 Google, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
 */
 
 #include <dt-bindings/input/input.h>
@@ -22,6 +19,7 @@
 			MATRIX_KEY(0x00, 0x02, KEY_F1)
 			MATRIX_KEY(0x00, 0x03, KEY_B)
 			MATRIX_KEY(0x00, 0x04, KEY_F10)
+			MATRIX_KEY(0x00, 0x05, KEY_RO)
 			MATRIX_KEY(0x00, 0x06, KEY_N)
 			MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
 			MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
@@ -34,6 +32,7 @@
 			MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
 			MATRIX_KEY(0x01, 0x09, KEY_F9)
 			MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
+			MATRIX_KEY(0x01, 0x0c, KEY_HENKAN)
 
 			MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
 			MATRIX_KEY(0x02, 0x01, KEY_TAB)
@@ -45,6 +44,7 @@
 			MATRIX_KEY(0x02, 0x07, KEY_102ND)
 			MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
 			MATRIX_KEY(0x02, 0x09, KEY_F8)
+			MATRIX_KEY(0x02, 0x0a, KEY_YEN)
 
 			MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
 			MATRIX_KEY(0x03, 0x02, KEY_F2)
@@ -52,7 +52,9 @@
 			MATRIX_KEY(0x03, 0x04, KEY_F5)
 			MATRIX_KEY(0x03, 0x06, KEY_6)
 			MATRIX_KEY(0x03, 0x08, KEY_MINUS)
+			MATRIX_KEY(0x03, 0x09, KEY_F13)
 			MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
+			MATRIX_KEY(0x03, 0x0c, KEY_MUHENKAN)
 
 			MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
 			MATRIX_KEY(0x04, 0x01, KEY_A)
diff --git a/arch/arm/dts/cros-ec-sbs.dtsi b/arch/arm/dts/cros-ec-sbs.dtsi
index dfe5ea6ca2..71f5c5ecce 100644
--- a/arch/arm/dts/cros-ec-sbs.dtsi
+++ b/arch/arm/dts/cros-ec-sbs.dtsi
@@ -1,8 +1,45 @@
-// SPDX-License-Identifier: GPL-2.0
 /*
  * Smart battery dts fragment for devices that use cros-ec-sbs
  *
  * Copyright (c) 2015 Google, Inc
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This file is free software; you can redistribute it and/or
+ *     modify it under the terms of the GNU General Public License as
+ *     published by the Free Software Foundation; either version 2 of the
+ *     License, or (at your option) any later version.
+ *
+ *     This file is distributed in the hope that it will be useful,
+ *     but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *     GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ *     obtaining a copy of this software and associated documentation
+ *     files (the "Software"), to deal in the Software without
+ *     restriction, including without limitation the rights to use,
+ *     copy, modify, merge, publish, distribute, sublicense, and/or
+ *     sell copies of the Software, and to permit persons to whom the
+ *     Software is furnished to do so, subject to the following
+ *     conditions:
+ *
+ *     The above copyright notice and this permission notice shall be
+ *     included in all copies or substantial portions of the Software.
+ *
+ *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
 &i2c_tunnel {
diff --git a/arch/arm/dts/fsl-imx8dx.dtsi b/arch/arm/dts/fsl-imx8dx.dtsi
index ae1d1f460b..7d95cf0b7d 100644
--- a/arch/arm/dts/fsl-imx8dx.dtsi
+++ b/arch/arm/dts/fsl-imx8dx.dtsi
@@ -131,7 +131,7 @@
 
 		pd_lsio: PD_LSIO {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -180,7 +180,7 @@
 
 		pd_conn: PD_CONN {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -214,7 +214,7 @@
 
 		pd_dma: PD_DMA {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/arch/arm/dts/fsl-imx8qm.dtsi b/arch/arm/dts/fsl-imx8qm.dtsi
index 6808f68f9d..2e887add79 100644
--- a/arch/arm/dts/fsl-imx8qm.dtsi
+++ b/arch/arm/dts/fsl-imx8qm.dtsi
@@ -88,7 +88,7 @@
 
 		pd_lsio: PD_LSIO {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -137,7 +137,7 @@
 
 		pd_conn: PD_CONN {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -173,7 +173,7 @@
 
 		pd_dma: PD_DMA {
 			compatible = "nxp,imx8-pd";
-			reg = <SC_R_LAST>;
+			reg = <SC_R_NONE>;
 			#power-domain-cells = <0>;
 			#address-cells = <1>;
 			#size-cells = <0>;
diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
index fecef88e08..6402cf5aca 100644
--- a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
+++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts
@@ -21,14 +21,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1012a-frdm.dtsi b/arch/arm/dts/fsl-ls1012a-frdm.dtsi
index a357793bfa..88aa24a6d2 100644
--- a/arch/arm/dts/fsl-ls1012a-frdm.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-frdm.dtsi
@@ -15,14 +15,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1012a-qds.dtsi b/arch/arm/dts/fsl-ls1012a-qds.dtsi
index a330597b6c..910d2a5c77 100644
--- a/arch/arm/dts/fsl-ls1012a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-qds.dtsi
@@ -43,14 +43,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1012a-rdb.dtsi b/arch/arm/dts/fsl-ls1012a-rdb.dtsi
index 55155fd321..3757051b78 100644
--- a/arch/arm/dts/fsl-ls1012a-rdb.dtsi
+++ b/arch/arm/dts/fsl-ls1012a-rdb.dtsi
@@ -19,14 +19,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 1125e5753b..2d70c82a72 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -107,14 +107,12 @@
 		};
 
 		qspi: quadspi@1550000 {
-			compatible = "fsl,vf610-qspi";
+			compatible = "fsl,ls1021a-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x0 0x1550000 0x0 0x10000>,
 				<0x0 0x40000000 0x0 0x4000000>;
 			reg-names = "QuadSPI", "QuadSPI-memory";
-			num-cs = <1>;
-			big-endian;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/fsl-ls1028a-qds-duart.dts b/arch/arm/dts/fsl-ls1028a-qds-duart.dts
new file mode 100644
index 0000000000..83264e0f54
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1028a-qds-duart.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree file for Freescale Layerscape-1028AQDS family SoC.
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+#include "fsl-ls1028a-qds.dtsi"
+
+/ {
+	chosen {
+		stdout-path = &serial0;
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts
new file mode 100644
index 0000000000..063857b2f2
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1028a-qds-lpuart.dts
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree file for Freescale Layerscape-1028AQDS family SoC.
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+#include "fsl-ls1028a-qds.dtsi"
+
+/ {
+	chosen {
+		stdout-path = &lpuart0;
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dtsi
index 029a8e386b..4f56f40bd3 100644
--- a/arch/arm/dts/fsl-ls1028a-qds.dts
+++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi
@@ -151,6 +151,10 @@
 	status = "okay";
 };
 
+&lpuart0 {
+	status = "okay";
+};
+
 &sata {
 	status = "okay";
 };
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 5365bfb1a8..9911690e5c 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -240,6 +240,66 @@
 		status = "disabled";
 	};
 
+	lpuart0: serial@2260000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x2260000 0x0 0x1000>;
+		interrupts = <0 232 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
+	lpuart1: serial@2270000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x2270000 0x0 0x1000>;
+		interrupts = <0 233 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
+	lpuart2: serial@2280000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x2280000 0x0 0x1000>;
+		interrupts = <0 234 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
+	lpuart3: serial@2290000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x2290000 0x0 0x1000>;
+		interrupts = <0 235 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
+	lpuart4: serial@22a0000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x22a0000 0x0 0x1000>;
+		interrupts = <0 236 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
+	lpuart5: serial@22b0000 {
+		compatible = "fsl,ls1021a-lpuart";
+		reg = <0x0 0x22b0000 0x0 0x1000>;
+		interrupts = <0 237 0x4>;
+		clocks = <&sysclk>;
+		clock-names = "ipg";
+		little-endian;
+		status = "disabled";
+	};
+
 	usb1: usb3@3100000 {
 		compatible = "fsl,layerscape-dwc3";
 		reg = <0x0 0x3100000 0x0 0x10000>;
diff --git a/arch/arm/dts/fsl-ls1043-post.dtsi b/arch/arm/dts/fsl-ls1043-post.dtsi
new file mode 100644
index 0000000000..e4eab9e5c6
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1043-post.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 device tree nodes for ls1043
+ *
+ * Copyright 2015-2016 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+&soc {
+
+/* include used FMan blocks */
+#include "qoriq-fman3-0.dtsi"
+#include "qoriq-fman3-0-1g-0.dtsi"
+#include "qoriq-fman3-0-1g-1.dtsi"
+#include "qoriq-fman3-0-1g-2.dtsi"
+#include "qoriq-fman3-0-1g-3.dtsi"
+#include "qoriq-fman3-0-1g-4.dtsi"
+#include "qoriq-fman3-0-1g-5.dtsi"
+#include "qoriq-fman3-0-10g-0.dtsi"
+
+};
+
+&fman0 {
+	fsl,erratum-a050385;
+
+	/* these aliases provide the FMan ports mapping */
+	enet0: ethernet@e0000 {
+	};
+
+	enet1: ethernet@e2000 {
+	};
+
+	enet2: ethernet@e4000 {
+	};
+
+	enet3: ethernet@e6000 {
+	};
+
+	enet4: ethernet@e8000 {
+	};
+
+	enet5: ethernet@ea000 {
+	};
+
+	enet6: ethernet@f0000 {
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1043a-qds.dtsi b/arch/arm/dts/fsl-ls1043a-qds.dtsi
index 70e1a6a53f..884bdad196 100644
--- a/arch/arm/dts/fsl-ls1043a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1043a-qds.dtsi
@@ -53,14 +53,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fl128s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1043a-rdb.dts b/arch/arm/dts/fsl-ls1043a-rdb.dts
index 721b158169..6e4ea5b40c 100644
--- a/arch/arm/dts/fsl-ls1043a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1043a-rdb.dts
@@ -3,6 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
  *
  * Copyright (C) 2015, Freescale Semiconductor
+ * Copyright 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
@@ -98,3 +99,83 @@
 &duart1 {
 	status = "okay";
 };
+
+#include "fsl-ls1043-post.dtsi"
+
+&fman0 {
+	ethernet@e0000 {
+		phy-handle = <&qsgmii_phy1>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet@e2000 {
+		phy-handle = <&qsgmii_phy2>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet@e4000 {
+		phy-handle = <&rgmii_phy1>;
+		phy-connection-type = "rgmii-txid";
+		status = "okay";
+	};
+
+	ethernet@e6000 {
+		phy-handle = <&rgmii_phy2>;
+		phy-connection-type = "rgmii-txid";
+		status = "okay";
+	};
+
+	ethernet@e8000 {
+		phy-handle = <&qsgmii_phy3>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet@ea000 {
+		phy-handle = <&qsgmii_phy4>;
+		phy-connection-type = "qsgmii";
+		status = "okay";
+	};
+
+	ethernet@f0000 { /* 10GEC1 */
+		phy-handle = <&aqr105_phy>;
+		phy-connection-type = "xgmii";
+		status = "okay";
+	};
+
+	mdio@fc000 {
+		rgmii_phy1: ethernet-phy@1 {
+			reg = <0x1>;
+		};
+
+		rgmii_phy2: ethernet-phy@2 {
+			reg = <0x2>;
+		};
+
+		qsgmii_phy1: ethernet-phy@4 {
+			reg = <0x4>;
+		};
+
+		qsgmii_phy2: ethernet-phy@5 {
+			reg = <0x5>;
+		};
+
+		qsgmii_phy3: ethernet-phy@6 {
+			reg = <0x6>;
+		};
+
+		qsgmii_phy4: ethernet-phy@7 {
+			reg = <0x7>;
+		};
+	};
+
+	mdio@fd000 {
+		aqr105_phy: ethernet-phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c45";
+			interrupts = <0 132 4>;
+			reg = <0x1>;
+		};
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index b159c3ca73..f7db44c0fa 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -31,7 +31,7 @@
 		interrupts = <1 9 0xf08>;
 	};
 
-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -210,14 +210,12 @@
 			status = "disabled";
 		};
 		qspi: quadspi@1550000 {
-			compatible = "fsl,vf610-qspi";
+			compatible = "fsl,ls1021a-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x0 0x1550000 0x0 0x10000>,
-				<0x0 0x40000000 0x0 0x4000000>;
+				<0x0 0x40000000 0x0 0x1000000>;
 			reg-names = "QuadSPI", "QuadSPI-memory";
-			num-cs = <2>;
-			big-endian;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/fsl-ls1046-post.dtsi b/arch/arm/dts/fsl-ls1046-post.dtsi
new file mode 100644
index 0000000000..2dac6a05f7
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1046-post.dtsi
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 device tree nodes for ls1046
+ *
+ * Copyright 2015-2016 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+&soc {
+
+/* include used FMan blocks */
+#include "qoriq-fman3-0.dtsi"
+#include "qoriq-fman3-0-1g-0.dtsi"
+#include "qoriq-fman3-0-1g-1.dtsi"
+#include "qoriq-fman3-0-1g-2.dtsi"
+#include "qoriq-fman3-0-1g-3.dtsi"
+#include "qoriq-fman3-0-1g-4.dtsi"
+#include "qoriq-fman3-0-1g-5.dtsi"
+#include "qoriq-fman3-0-10g-0.dtsi"
+#include "qoriq-fman3-0-10g-1.dtsi"
+};
+
+&fman0 {
+	/* these aliases provide the FMan ports mapping */
+	enet0: ethernet@e0000 {
+	};
+
+	enet1: ethernet@e2000 {
+	};
+
+	enet2: ethernet@e4000 {
+	};
+
+	enet3: ethernet@e6000 {
+	};
+
+	enet4: ethernet@e8000 {
+	};
+
+	enet5: ethernet@ea000 {
+	};
+
+	enet6: ethernet@f0000 {
+	};
+
+	enet7: ethernet@f2000 {
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1046a-frwy.dts b/arch/arm/dts/fsl-ls1046a-frwy.dts
index d39159322a..cda05411d8 100644
--- a/arch/arm/dts/fsl-ls1046a-frwy.dts
+++ b/arch/arm/dts/fsl-ls1046a-frwy.dts
@@ -19,13 +19,12 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: mt25qu512abb8esf@0 {
+	mt25qu512a0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "spi-flash";
+		compatible = "jedec,spi-nor";
 		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
diff --git a/arch/arm/dts/fsl-ls1046a-qds.dtsi b/arch/arm/dts/fsl-ls1046a-qds.dtsi
index 76dc397328..fec5c8ddb2 100644
--- a/arch/arm/dts/fsl-ls1046a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1046a-qds.dtsi
@@ -53,14 +53,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fl128s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/fsl-ls1046a-rdb.dts b/arch/arm/dts/fsl-ls1046a-rdb.dts
index 83e34ab02a..464129291c 100644
--- a/arch/arm/dts/fsl-ls1046a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1046a-rdb.dts
@@ -3,6 +3,7 @@
  * Device Tree Include file for Freescale Layerscape-1046A family SoC.
  *
  * Copyright 2016, Freescale Semiconductor
+ * Copyright 2020 NXP
  *
  * Mingkai Hu <Mingkai.hu@freescale.com>
  */
@@ -20,10 +21,9 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fs512s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
 		reg = <0>;
 	};
 
-	qflash1: s25fs512s@1 {
+	s25fs512s1: flash@1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
@@ -51,3 +51,69 @@
 &i2c3 {
 	status = "okay";
 };
+
+#include "fsl-ls1046-post.dtsi"
+
+&fman0 {
+	ethernet@e4000 {
+		phy-handle = <&rgmii_phy1>;
+		phy-connection-type = "rgmii-id";
+		status = "okay";
+	};
+
+	ethernet@e6000 {
+		phy-handle = <&rgmii_phy2>;
+		phy-connection-type = "rgmii-id";
+		status = "okay";
+	};
+
+	ethernet@e8000 {
+		phy-handle = <&sgmii_phy1>;
+		phy-connection-type = "sgmii";
+		status = "okay";
+	};
+
+	ethernet@ea000 {
+		phy-handle = <&sgmii_phy2>;
+		phy-connection-type = "sgmii";
+		status = "okay";
+	};
+
+	ethernet@f0000 { /* 10GEC1 */
+		phy-handle = <&aqr106_phy>;
+		phy-connection-type = "xgmii";
+		status = "okay";
+	};
+
+	ethernet@f2000 { /* 10GEC2 */
+		fixed-link = <0 1 1000 0 0>;
+		phy-connection-type = "xgmii";
+		status = "okay";
+	};
+
+	mdio@fc000 {
+		rgmii_phy1: ethernet-phy@1 {
+			reg = <0x1>;
+		};
+
+		rgmii_phy2: ethernet-phy@2 {
+			reg = <0x2>;
+		};
+
+		sgmii_phy1: ethernet-phy@3 {
+			reg = <0x3>;
+		};
+
+		sgmii_phy2: ethernet-phy@4 {
+			reg = <0x4>;
+		};
+	};
+
+	mdio@fd000 {
+		aqr106_phy: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c45";
+			interrupts = <0 131 4>;
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index fdf93fd268..8673a5db2a 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -31,7 +31,7 @@
 		interrupts = <1 9 0xf08>;
 	};
 
-	soc {
+	soc: soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -211,14 +211,12 @@
 		};
 
 		qspi: quadspi@1550000 {
-			compatible = "fsl,vf610-qspi";
+			compatible = "fsl,ls1021a-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x0 0x1550000 0x0 0x10000>,
 				<0x0 0x40000000 0x0 0x10000000>;
 			reg-names = "QuadSPI", "QuadSPI-memory";
-			num-cs = <4>;
-			big-endian;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/fsl-ls1088a-qds-21-x.dts b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
new file mode 100644
index 0000000000..a877964511
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-21-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 21.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-21.dtsi"
+
+/ {
+	model = "NXP Layerscape 1088a QDS Board (DTS 21-x)";
+	compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-29-x.dts b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
new file mode 100644
index 0000000000..29c4ec59fe
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-29-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES protocol 29.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls1088a-qds-sd1-29.dtsi"
+
+/ {
+	model = "NXP Layerscape 1088a QDS Board (DTS 29-x)";
+	compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
new file mode 100644
index 0000000000..e0a6c04835
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-21.dtsi
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 21 (0x15)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+&dpmac1 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&rgmii_phy2>;
+	phy-connection-type = "rgmii-id";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
new file mode 100644
index 0000000000..65e95300ab
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds-sd1-29.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS1088AQDS device tree source for SERDES block #1 - protocol 29 (0x1d)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls1088a-qds.dtsi"
+
+&dpmac1 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dts b/arch/arm/dts/fsl-ls1088a-qds.dts
index f07d0c6f27..8e64e713aa 100644
--- a/arch/arm/dts/fsl-ls1088a-qds.dts
+++ b/arch/arm/dts/fsl-ls1088a-qds.dts
@@ -1,133 +1,15 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * NXP ls1088a QDS board device tree source
+ * NXP ls1088a QDS default board device tree source
  *
- * Copyright 2017 NXP
+ * Copyright 2020 NXP
  */
 
 /dts-v1/;
 
-#include "fsl-ls1088a.dtsi"
+#include "fsl-ls1088a-qds.dtsi"
 
 / {
 	model = "NXP Layerscape 1088a QDS Board";
 	compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
-	aliases {
-		spi0 = &qspi;
-		spi1 = &dspi;
-	};
-};
-
-&i2c0 {
-	status = "okay";
-	u-boot,dm-pre-reloc;
-
-	i2c-mux@77 {
-		compatible = "nxp,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x3>;
-
-			rtc@51 {
-				compatible = "pcf2127-rtc";
-				reg = <0x51>;
-			};
-		};
-	};
-};
-
-&ifc {
-	#address-cells = <2>;
-	#size-cells = <1>;
-	/* NOR, NAND Flashes and FPGA on board */
-	ranges = <0 0 0x5 0x80000000 0x08000000
-			2 0 0x5 0x30000000 0x00010000
-			3 0 0x5 0x20000000 0x00010000>;
-	status = "okay";
-
-	nor@0,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "cfi-flash";
-		reg = <0x0 0x0 0x8000000>;
-		bank-width = <2>;
-		device-width = <1>;
-	};
-
-	nand@2,0 {
-		compatible = "fsl,ifc-nand";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		reg = <0x1 0x0 0x10000>;
-	};
-
-	fpga: board-control@3,0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "simple-bus", "fsl,ls1088aqds-fpga",
-				"fsl,fpga-qixis";
-		reg = <0x2 0x0 0x0000100>;
-		bank-width = <1>;
-		device-width = <1>;
-		ranges = <0 2 0 0x100>;
-	};
-};
-
-&dspi {
-	bus-num = <0>;
-	status = "okay";
-
-	dflash0: n25q128a {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <1000000>; /* input clock */
-	};
-
-	dflash1: sst25wf040b {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <3500000>;
-		reg = <1>;
-	};
-
-	dflash2: en25s64 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <3500000>;
-		reg = <2>;
-	};
-};
-
-&qspi {
-	bus-num = <0>;
-	status = "okay";
-
-	qflash0: s25fs512s@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <50000000>;
-		reg = <0>;
-	};
-
-	qflash1: s25fs512s@1 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <50000000>;
-		reg = <1>;
-	 };
-};
-
-&sata {
-	status = "okay";
 };
diff --git a/arch/arm/dts/fsl-ls1088a-qds.dtsi b/arch/arm/dts/fsl-ls1088a-qds.dtsi
new file mode 100644
index 0000000000..a7d0edcf0a
--- /dev/null
+++ b/arch/arm/dts/fsl-ls1088a-qds.dtsi
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP ls1088a QDS common board device tree source
+ *
+ * Copyright 2017-2020 NXP
+ */
+
+#include "fsl-ls1088a.dtsi"
+
+/ {
+	aliases {
+		spi0 = &qspi;
+		spi1 = &dspi;
+	};
+};
+
+&emdio1 {
+	status = "okay";
+};
+
+&emdio2 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+
+	fpga@66 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "simple-mfd";
+		reg = <0x66>;
+
+		mux-mdio@54 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "mdio-mux-i2creg";
+			reg = <0x54>;
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x54 0xe0>; // reg 0x54, bits 7:5
+			mdio-parent-bus = <&emdio1>;
+
+			mdio@00 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x00>;
+
+				rgmii_phy1: ethernet-phy@1 {
+					reg = <0x1>;
+				};
+			};
+			mdio@20 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x20>;
+
+				rgmii_phy2: ethernet-phy@2 {
+					reg = <0x2>;
+				};
+			};
+
+			emdio1_slot1: mdio@40 { /* I/O Slot #1 */
+				reg = <0x40>;
+				device-name = "emdio1_slot1";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot3: mdio@60 { /* I/O Slot #3 */
+				reg = <0x60>;
+				device-name = "emdio1_slot3";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+	};
+
+	i2c-mux@77 {
+		compatible = "nxp,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3>;
+
+			rtc@51 {
+				compatible = "pcf2127-rtc";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	/* NOR, NAND Flashes and FPGA on board */
+	ranges = <0 0 0x5 0x80000000 0x08000000
+			2 0 0x5 0x30000000 0x00010000
+			3 0 0x5 0x20000000 0x00010000>;
+	status = "okay";
+
+	nor@0,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "cfi-flash";
+		reg = <0x0 0x0 0x8000000>;
+		bank-width = <2>;
+		device-width = <1>;
+	};
+
+	nand@2,0 {
+		compatible = "fsl,ifc-nand";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		reg = <0x1 0x0 0x10000>;
+	};
+
+	fpga: board-control@3,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus", "fsl,ls1088aqds-fpga",
+				"fsl,fpga-qixis";
+		reg = <0x2 0x0 0x0000100>;
+		bank-width = <1>;
+		device-width = <1>;
+		ranges = <0 2 0 0x100>;
+	};
+};
+
+&dspi {
+	bus-num = <0>;
+	status = "okay";
+
+	dflash0: n25q128a {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <1000000>; /* input clock */
+	};
+
+	dflash1: sst25wf040b {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <3500000>;
+		reg = <1>;
+	};
+
+	dflash2: en25s64 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <3500000>;
+		reg = <2>;
+	};
+};
+
+&qspi {
+	status = "okay";
+
+	s25fs512s0: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+		reg = <0>;
+	};
+
+	s25fs512s1: flash@1 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+		reg = <1>;
+	 };
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1088a-rdb.dts b/arch/arm/dts/fsl-ls1088a-rdb.dts
index 0fe351973d..de92bf22e2 100644
--- a/arch/arm/dts/fsl-ls1088a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1088a-rdb.dts
@@ -17,6 +17,108 @@
 	};
 };
 
+&dpmac1 {
+	status = "okay";
+	phy-connection-type = "xgmii";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-handle = <&mdio2_phy1>;
+	phy-connection-type = "xgmii";
+};
+
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&mdio1_phy5>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&mdio1_phy6>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&mdio1_phy7>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-handle = <&mdio1_phy8>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac7 {
+	status = "okay";
+	phy-handle = <&mdio1_phy1>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac8 {
+	status = "okay";
+	phy-handle = <&mdio1_phy2>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac9 {
+	status = "okay";
+	phy-handle = <&mdio1_phy3>;
+	phy-connection-type = "qsgmii";
+};
+
+&dpmac10 {
+	status = "okay";
+	phy-handle = <&mdio1_phy4>;
+	phy-connection-type = "qsgmii";
+};
+
+&emdio1 {
+	status = "okay";
+
+	/* Freescale F104 PHY1 */
+	mdio1_phy1: emdio1_phy@1 {
+		reg = <0x1c>;
+		};
+	mdio1_phy2: emdio1_phy@2 {
+		reg = <0x1d>;
+		};
+	mdio1_phy3: emdio1_phy@3 {
+		reg = <0x1e>;
+		};
+	mdio1_phy4: emdio1_phy@4 {
+		reg = <0x1f>;
+	};
+
+	/* F104 PHY2 */
+	mdio1_phy5: emdio1_phy@5 {
+		reg = <0x0c>;
+	};
+	mdio1_phy6: emdio1_phy@6 {
+		reg = <0x0d>;
+	};
+	mdio1_phy7: emdio1_phy@7 {
+		reg = <0x0e>;
+	};
+	mdio1_phy8: emdio1_phy@8 {
+		reg = <0x0f>;
+	};
+};
+
+&emdio2 {
+	status = "okay";
+
+	/* Aquantia AQR105 10G PHY */
+	mdio2_phy1: emdio2_phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		interrupts = <0 2 0x4>;
+		reg = <0x0>;
+	};
+};
+
 &i2c0 {
 	status = "okay";
 	u-boot,dm-pre-reloc;
@@ -41,10 +143,9 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fs512s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
@@ -52,7 +153,7 @@
 		reg = <0>;
 	};
 
-	qflash1: s25fs512s@1 {
+	s25fs512s1: flash@1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index abc8b21a11..bf303c6ad3 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -82,12 +82,6 @@
 		interrupts = <0 32 0x1>; /* edge triggered */
 	};
 
-	fsl_mc: fsl-mc@80c000000 {
-		compatible = "fsl,qoriq-mc";
-		reg = <0x00000008 0x0c000000 0 0x40>,	 /* MC portal base */
-		      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
-	};
-
 	dspi: dspi@2100000 {
 		compatible = "fsl,vf610-dspi";
 		#address-cells = <1>;
@@ -98,7 +92,7 @@
 	};
 
 	qspi: quadspi@1550000 {
-		compatible = "fsl,vf610-qspi";
+		compatible = "fsl,ls1088a-qspi";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x0 0x20c0000 0x0 0x10000>,
@@ -197,4 +191,100 @@
 		method = "smc";
 	};
 
+	fsl_mc: fsl-mc@80c000000 {
+		compatible = "fsl,qoriq-mc", "simple-mfd";
+		reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
+		      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
+		#address-cells = <3>;
+		#size-cells = <1>;
+
+		/*
+		 * Region type 0x0 - MC portals
+		 * Region type 0x1 - QBMAN portals
+		 */
+		ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
+			  0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
+
+		dpmacs {
+			compatible = "simple-mfd";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dpmac1: dpmac@1 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x1>;
+				status = "disabled";
+			};
+
+			dpmac2: dpmac@2 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x2>;
+				status = "disabled";
+			};
+
+			dpmac3: dpmac@3 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x3>;
+				status = "disabled";
+			};
+
+			dpmac4: dpmac@4 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x4>;
+				status = "disabled";
+			};
+
+			dpmac5: dpmac@5 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x5>;
+				status = "disabled";
+			};
+
+			dpmac6: dpmac@6 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x6>;
+				status = "disabled";
+			};
+
+			dpmac7: dpmac@7 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x7>;
+				status = "disabled";
+			};
+
+			dpmac8: dpmac@8 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x8>;
+				status = "disabled";
+			};
+
+			dpmac9: dpmac@9 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x9>;
+				status = "disabled";
+			};
+
+			dpmac10: dpmac@a {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xa>;
+				status = "disabled";
+			};
+		};
+	};
+
+	emdio1: mdio@8B96000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8B96000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	emdio2: mdio@8B97000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8B97000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
 };
diff --git a/arch/arm/dts/fsl-ls2080a-qds-42-x.dts b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
new file mode 100644
index 0000000000..bd46c395d4
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-42-x.dts
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080AQDS device tree source for SERDES protocol 42.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-ls2080a-qds-sd1-42.dtsi"
+
+/ {
+	model = "NXP Layerscape LS2080AQDS Board (DTS 42-x)";
+	compatible = "fsl,ls2080a-qds", "fsl,ls2080a";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
new file mode 100644
index 0000000000..ccbb5de1ea
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds-sd1-42.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LS2080aQDS device tree source for SERDES block #1 - protocol 42 (0x2a)
+ *
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls2080a-qds.dtsi"
+
+&dpmac1 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac3 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac7 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
+
+&dpmac8 {
+	status = "okay";
+	phy-connection-type = "xfi";
+};
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dts b/arch/arm/dts/fsl-ls2080a-qds.dts
index 13461b5c45..a1196f9292 100644
--- a/arch/arm/dts/fsl-ls2080a-qds.dts
+++ b/arch/arm/dts/fsl-ls2080a-qds.dts
@@ -1,13 +1,13 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * Freescale ls2080a QDS board device tree source
+ * Freescale ls2080a QDS defaul board device tree source
  *
  * Copyright 2013-2015 Freescale Semiconductor, Inc.
  */
 
 /dts-v1/;
 
-#include "fsl-ls2080a.dtsi"
+#include "fsl-ls2080a-qds.dtsi"
 
 / {
 	model = "Freescale Layerscape 2080a QDS Board";
@@ -18,72 +18,3 @@
 		spi1 = &dspi;
 	};
 };
-
-&i2c0 {
-	status = "okay";
-	pca9547@77 {
-		compatible = "nxp,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		i2c@0 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x00>;
-			rtc@68 {
-				compatible = "dallas,ds3232";
-				reg = <0x68>;
-			};
-		};
-	};
-};
-
-&dspi {
-	bus-num = <0>;
-	status = "okay";
-
-	dflash0: n25q128a {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <3000000>;
-		spi-cpol;
-		spi-cpha;
-		reg = <0>;
-	};
-	dflash1: sst25wf040b {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <3000000>;
-		spi-cpol;
-		spi-cpha;
-		reg = <1>;
-	};
-	dflash2: en25s64 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <3000000>;
-		spi-cpol;
-		spi-cpha;
-		reg = <2>;
-	};
-};
-
-&qspi {
-	bus-num = <0>;
-	status = "okay";
-
-	qflash0: s25fs256s@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
-		reg = <0>;
-	};
-};
-
-&sata {
-	status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls2080a-qds.dtsi b/arch/arm/dts/fsl-ls2080a-qds.dtsi
new file mode 100644
index 0000000000..cb7851f2cc
--- /dev/null
+++ b/arch/arm/dts/fsl-ls2080a-qds.dtsi
@@ -0,0 +1,77 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * Freescale ls2080a QDS common device tree source
+ *
+ * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
+ */
+
+#include "fsl-ls2080a.dtsi"
+
+&i2c0 {
+	status = "okay";
+	pca9547@77 {
+		compatible = "nxp,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x00>;
+			rtc@68 {
+				compatible = "dallas,ds3232";
+				reg = <0x68>;
+			};
+		};
+	};
+};
+
+&dspi {
+	bus-num = <0>;
+	status = "okay";
+
+	dflash0: n25q128a {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <3000000>;
+		spi-cpol;
+		spi-cpha;
+		reg = <0>;
+	};
+	dflash1: sst25wf040b {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <3000000>;
+		spi-cpol;
+		spi-cpha;
+		reg = <1>;
+	};
+	dflash2: en25s64 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <3000000>;
+		spi-cpol;
+		spi-cpha;
+		reg = <2>;
+	};
+};
+
+&qspi {
+	status = "okay";
+
+	s25fs256s0: flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <50000000>;
+		reg = <0>;
+	};
+};
+
+&sata {
+	status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 99ed33af95..90a0a3f8fb 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -50,12 +50,6 @@
 		interrupts = <0 32 0x1>; /* edge triggered */
 	};
 
-	fsl_mc: fsl-mc@80c000000 {
-		compatible = "fsl,qoriq-mc";
-		reg = <0x00000008 0x0c000000 0 0x40>,	 /* MC portal base */
-		      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
-	};
-
 	i2c0: i2c@2000000 {
 		status = "disabled";
 		compatible = "fsl,vf610-i2c";
@@ -102,13 +96,13 @@
 	};
 
 	qspi: quadspi@1550000 {
-		compatible = "fsl,vf610-qspi";
+		compatible = "fsl,ls2080a-qspi";
 		#address-cells = <1>;
 		#size-cells = <0>;
 		reg = <0x0 0x20c0000 0x0 0x10000>,
 			<0x0 0x20000000 0x0 0x10000000>;
 		reg-names = "QuadSPI", "QuadSPI-memory";
-		num-cs = <4>;
+		status = "disabled";
 	};
 
 	esdhc: esdhc@0 {
@@ -200,4 +194,88 @@
 			status = "disabled";
 	};
 
+	fsl_mc: fsl-mc@80c000000 {
+		compatible = "fsl,qoriq-mc", "simple-mfd";
+		reg = <0x00000008 0x0c000000 0 0x40>,    /* MC portal base */
+		      <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
+		#address-cells = <3>;
+		#size-cells = <1>;
+
+		/*
+		 * Region type 0x0 - MC portals
+		 * Region type 0x1 - QBMAN portals
+		 */
+		ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
+			0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
+
+		dpmacs {
+			compatible = "simple-mfd";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dpmac1: dpmac@1 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x1>;
+				status = "disabled";
+			};
+
+			dpmac2: dpmac@2 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x2>;
+				status = "disabled";
+			};
+
+			dpmac3: dpmac@3 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x3>;
+				status = "disabled";
+			};
+
+			dpmac4: dpmac@4 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x4>;
+				status = "disabled";
+			};
+
+			dpmac5: dpmac@5 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x5>;
+				status = "disabled";
+			};
+
+			dpmac6: dpmac@6 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x6>;
+				status = "disabled";
+			};
+
+			dpmac7: dpmac@7 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x7>;
+				status = "disabled";
+			};
+
+			dpmac8: dpmac@8 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x8>;
+				status = "disabled";
+			};
+		};
+	};
+
+	emdio1: mdio@8B96000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8B96000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	emdio2: mdio@8B97000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8B97000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
 };
diff --git a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
index 72b2177b70..179ed19bf2 100644
--- a/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
+++ b/arch/arm/dts/fsl-ls2088a-rdb-qspi.dts
@@ -21,6 +21,94 @@
 	};
 };
 
+&dpmac1 {
+	status = "okay";
+	phy-handle = <&mdio1_phy1>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-handle = <&mdio1_phy2>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&mdio1_phy3>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&mdio1_phy4>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&mdio2_phy1>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-handle = <&mdio2_phy2>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac7 {
+	status = "okay";
+	phy-handle = <&mdio2_phy3>;
+	phy-connection-type = "xfi";
+};
+
+&dpmac8 {
+	status = "okay";
+	phy-handle = <&mdio2_phy4>;
+	phy-connection-type = "xfi";
+};
+
+&emdio1 {
+	status = "okay";
+
+	/* CS4340 PHYs */
+	mdio1_phy1: emdio1_phy@1 {
+		reg = <0x10>;
+	};
+	mdio1_phy2: emdio1_phy@2 {
+		reg = <0x11>;
+	};
+	mdio1_phy3: emdio1_phy@3 {
+		reg = <0x12>;
+	};
+	mdio1_phy4: emdio1_phy@4 {
+		reg = <0x13>;
+	};
+};
+
+&emdio2 {
+	status = "okay";
+
+	/* AQR405 PHYs */
+	mdio2_phy1: emdio2_phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+	mdio2_phy2: emdio2_phy@2 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1>;
+	};
+	mdio2_phy3: emdio2_phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x2>;
+	};
+	mdio2_phy4: emdio2_phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x3>;
+	};
+};
+
 &dspi {
 	bus-num = <0>;
 	status = "okay";
@@ -37,10 +125,9 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: s25fs512s@0 {
+	s25fs512s0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
@@ -48,7 +135,7 @@
 		reg = <0>;
 	};
 
-	qflash1: s25fs512s@1 {
+	s25fs512s1: flash@1 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/fsl-lx2160a-qds-19-11-x.dts b/arch/arm/dts/fsl-lx2160a-qds-19-11-x.dts
new file mode 100644
index 0000000000..585759162f
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-19-11-x.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 19.11.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-19.dtsi"
+
+#include "fsl-lx2160a-qds-sd2-11.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 19.11.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-19-x-x.dts b/arch/arm/dts/fsl-lx2160a-qds-19-x-x.dts
new file mode 100644
index 0000000000..ebe11396a6
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-19-x-x.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 19.x.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-19.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 19.x.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-20-11-x.dts b/arch/arm/dts/fsl-lx2160a-qds-20-11-x.dts
new file mode 100644
index 0000000000..d9f0918967
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-20-11-x.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 20.11.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-20.dtsi"
+
+#include "fsl-lx2160a-qds-sd2-11.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 20.11.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-20-x-x.dts b/arch/arm/dts/fsl-lx2160a-qds-20-x-x.dts
new file mode 100644
index 0000000000..735d440d37
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-20-x-x.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 20.x.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-20.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 20.x.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-3-11-x.dts b/arch/arm/dts/fsl-lx2160a-qds-3-11-x.dts
new file mode 100644
index 0000000000..3b21c87b93
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-3-11-x.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 3.11.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-3.dtsi"
+
+#include "fsl-lx2160a-qds-sd2-11.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 3.11.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-3-x-x.dts b/arch/arm/dts/fsl-lx2160a-qds-3-x-x.dts
new file mode 100644
index 0000000000..ede40563f7
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-3-x-x.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 3.x.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-3.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 3.x.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-7-11-x.dts b/arch/arm/dts/fsl-lx2160a-qds-7-11-x.dts
new file mode 100644
index 0000000000..8100af4727
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-7-11-x.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 7.11.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-7.dtsi"
+
+#include "fsl-lx2160a-qds-sd2-11.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 7.11.x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-7-x-x.dts b/arch/arm/dts/fsl-lx2160a-qds-7-x-x.dts
new file mode 100644
index 0000000000..15dee3587f
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-7-x-x.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for SERDES protocol 7.x.x
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+/dts-v1/;
+
+#include "fsl-lx2160a-qds-sd1-7.dtsi"
+
+/ {
+	model = "NXP Layerscape LX2160AQDS Board (DTS 7-x-x)";
+	compatible = "fsl,lx2160aqds", "fsl,lx2160a";
+
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-sd1-19.dtsi b/arch/arm/dts/fsl-lx2160a-qds-sd1-19.dtsi
new file mode 100644
index 0000000000..a31ff8a1bd
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-sd1-19.dtsi
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 19
+ *
+ * Some assumptions are made:
+ *    * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4)
+ *    * mezzanine card M13 is connected to IO SLOT6 (25g-aui for DPMAC 5,6)
+ *    * mezzanine card M7 is connected to IO SLOT2 (xlaui4 for DPMAC 2)
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+#include "fsl-lx2160a-qds.dtsi"
+
+&dpmac2 {
+	status = "okay";
+	phy-handle = <&cortina_phy0>;
+	phy-connection-type = "xlaui4";
+};
+
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&aquantia_phy1>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&aquantia_phy2>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&inphi_phy0>;
+	phy-connection-type = "25g-aui";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-handle = <&inphi_phy1>;
+	phy-connection-type = "25g-aui";
+};
+
+&emdio1_slot1 {
+	aquantia_phy1: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+
+	aquantia_phy2: ethernet-phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1>;
+	};
+};
+
+&emdio1_slot2 {
+	cortina_phy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+};
+
+&emdio1_slot6 {
+	inphi_phy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-id0210.7440";
+		reg = <0x0>;
+	};
+
+	inphi_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-id0210.7440";
+		reg = <0x1>;
+	};
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-sd1-20.dtsi b/arch/arm/dts/fsl-lx2160a-qds-sd1-20.dtsi
new file mode 100644
index 0000000000..42e149691d
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-sd1-20.dtsi
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 20
+ *
+ * Some assumptions are made:
+ *    * 2 mezzanine cards M13 are connected to IO SLOT1 and IO SLOT2
+ *        (xlaui4 for DPMAC 1,2)
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+#include "fsl-lx2160a-qds.dtsi"
+
+&dpmac1 {
+	status = "okay";
+	phy-handle = <&cortina_phy1_0>;
+	phy-connection-type = "xlaui4";
+};
+
+&dpmac2 {
+	status = "okay";
+	phy-handle = <&cortina_phy2_0>;
+	phy-connection-type = "xlaui4";
+};
+
+&emdio1_slot1 {
+	cortina_phy1_0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+};
+
+&emdio1_slot2 {
+	cortina_phy2_0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-sd1-3.dtsi b/arch/arm/dts/fsl-lx2160a-qds-sd1-3.dtsi
new file mode 100644
index 0000000000..256d784aca
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-sd1-3.dtsi
@@ -0,0 +1,55 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 3
+ *
+ * Some assumptions are made:
+ *    * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4,5,6)
+ *
+ * Copyright 2020 NXP
+ *
+ */
+
+#include "fsl-lx2160a-qds.dtsi"
+
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&aquantia_phy1>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&aquantia_phy2>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&aquantia_phy3>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-handle = <&aquantia_phy4>;
+	phy-connection-type = "usxgmii";
+};
+
+&emdio1_slot1 {
+	aquantia_phy1: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+	aquantia_phy2: ethernet-phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1>;
+	};
+	aquantia_phy3: ethernet-phy@6 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x2>;
+	};
+	aquantia_phy4: ethernet-phy@7 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x3>;
+	};
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-sd1-7.dtsi b/arch/arm/dts/fsl-lx2160a-qds-sd1-7.dtsi
new file mode 100644
index 0000000000..5fcf846c10
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-sd1-7.dtsi
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 7
+ *
+ * Some assumptions are made:
+ *    * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4,5,6)
+ *    * mezzanine card M1/M4 is connected to IO SLOT2 (sgmii for DPMAC 7,8,9,10)
+ *
+ * Copyright 2020 NXP
+ *
+ */
+#include "fsl-lx2160a-qds.dtsi"
+
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&aquantia_phy1>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&aquantia_phy2>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac5 {
+	status = "okay";
+	phy-handle = <&aquantia_phy3>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac6 {
+	status = "okay";
+	phy-handle = <&aquantia_phy4>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac7 {
+	status = "okay";
+	phy-handle = <&sgmii_phy1>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac8 {
+	status = "okay";
+	phy-handle = <&sgmii_phy2>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac9 {
+	status = "okay";
+	phy-handle = <&sgmii_phy3>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac10 {
+	status = "okay";
+	phy-handle = <&sgmii_phy4>;
+	phy-connection-type = "sgmii";
+};
+
+&emdio1_slot1 {
+	aquantia_phy1: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x0>;
+	};
+
+	aquantia_phy2: ethernet-phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x1>;
+	};
+
+	aquantia_phy3: ethernet-phy@6 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x2>;
+	};
+
+	aquantia_phy4: ethernet-phy@7 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0x3>;
+	};
+};
+
+&emdio1_slot2 {
+	sgmii_phy1: ethernet-phy@1c {
+		reg = <0x1c>;
+	};
+
+	sgmii_phy2: ethernet-phy@1d {
+		reg = <0x1d>;
+	};
+
+	sgmii_phy3: ethernet-phy@1e {
+		reg = <0x1e>;
+	};
+
+	sgmii_phy4: ethernet-phy@1f {
+		reg = <0x1f>;
+	};
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds-sd2-11.dtsi b/arch/arm/dts/fsl-lx2160a-qds-sd2-11.dtsi
new file mode 100644
index 0000000000..cf09f98aa6
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds-sd2-11.dtsi
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS device tree source for the SERDES block #2 - protocol 11
+ *
+ * Some assumptions are made:
+ *    * 2 mezzanine cards M1/M4 are connected to IO SLOT 7 and IO SLOT 8
+ *       (sgmii for DPMAC 12, 13, 14, 16, 17, 18)
+ *
+ * Copyright 2020 NXP
+ *
+ */
+#include "fsl-lx2160a-qds.dtsi"
+
+&dpmac12 {
+	status = "okay";
+	phy-handle = <&sgmii_phy7_2>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac17 {
+	status = "okay";
+	phy-handle = <&sgmii_phy7_3>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac18 {
+	status = "okay";
+	phy-handle = <&sgmii_phy7_4>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac16 {
+	status = "okay";
+	phy-handle = <&sgmii_phy8_2>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac13 {
+	status = "okay";
+	phy-handle = <&sgmii_phy8_3>;
+	phy-connection-type = "sgmii";
+};
+
+&dpmac14 {
+	status = "okay";
+	phy-handle = <&sgmii_phy8_4>;
+	phy-connection-type = "sgmii";
+};
+
+&emdio1_slot7 {
+	sgmii_phy7_2: ethernet-phy@1d {
+		reg = <0x1d>;
+	};
+
+	sgmii_phy7_3: ethernet-phy@1e {
+		reg = <0x1e>;
+	};
+
+	sgmii_phy7_4: ethernet-phy@1f {
+		reg = <0x1f>;
+	};
+};
+
+&emdio1_slot8 {
+	sgmii_phy8_2: ethernet-phy@1d {
+		reg = <0x1d>;
+	};
+
+	sgmii_phy8_3: ethernet-phy@1e {
+		reg = <0x1e>;
+	};
+
+	sgmii_phy8_4: ethernet-phy@1f {
+		reg = <0x1f>;
+	};
+};
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dts b/arch/arm/dts/fsl-lx2160a-qds.dts
index 592fd5977e..e0f5d5e2d3 100644
--- a/arch/arm/dts/fsl-lx2160a-qds.dts
+++ b/arch/arm/dts/fsl-lx2160a-qds.dts
@@ -1,14 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0+ OR X11
 /*
- * NXP LX2160AQDS device tree source
+ * NXP LX2160AQDS default device tree source
  *
- * Copyright 2018-2019 NXP
+ * Copyright 2020 NXP
  *
  */
 
 /dts-v1/;
 
-#include "fsl-lx2160a.dtsi"
+#include "fsl-lx2160a-qds.dtsi"
 
 / {
 	model = "NXP Layerscape LX2160AQDS Board";
@@ -17,64 +17,3 @@
 		spi0 = &fspi;
 	};
 };
-
-&esdhc0 {
-	status = "okay";
-};
-
-&esdhc1 {
-	status = "okay";
-};
-
-&i2c0 {
-	status = "okay";
-	u-boot,dm-pre-reloc;
-
-	i2c-mux@77 {
-		compatible = "nxp,pca9547";
-		reg = <0x77>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		i2c@3 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0x3>;
-
-			rtc@51 {
-				compatible = "pcf2127-rtc";
-				reg = <0x51>;
-			};
-		};
-	};
-};
-
-&fspi {
-	status = "okay";
-
-	mt35xu512aba0: flash@0 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		compatible = "jedec,spi-nor";
-		spi-max-frequency = <50000000>;
-		reg = <0>;
-		spi-rx-bus-width = <8>;
-		spi-tx-bus-width = <1>;
-	};
-};
-
-&sata0 {
-	status = "okay";
-};
-
-&sata1 {
-	status = "okay";
-};
-
-&sata2 {
-	status = "okay";
-};
-
-&sata3 {
-	status = "okay";
-};
diff --git a/arch/arm/dts/fsl-lx2160a-qds.dtsi b/arch/arm/dts/fsl-lx2160a-qds.dtsi
new file mode 100644
index 0000000000..129cf82a8f
--- /dev/null
+++ b/arch/arm/dts/fsl-lx2160a-qds.dtsi
@@ -0,0 +1,169 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * NXP LX2160AQDS common device tree source
+ *
+ * Copyright 2018-2019 NXP
+ *
+ */
+
+#include "fsl-lx2160a.dtsi"
+
+&dpmac17 {
+	status = "okay";
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+	status = "okay";
+	phy-handle = <&rgmii_phy2>;
+	phy-connection-type = "rgmii-id";
+};
+
+&emdio1 {
+	status = "okay";
+};
+
+&emdio2 {
+	status = "okay";
+};
+
+&esdhc0 {
+	status = "okay";
+};
+
+&esdhc1 {
+	status = "okay";
+};
+
+&i2c0 {
+	status = "okay";
+	u-boot,dm-pre-reloc;
+
+	fpga@66 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "simple-mfd";
+		reg = <0x66>;
+
+		mux-mdio@54 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "mdio-mux-i2creg";
+			reg = <0x54>;
+			#mux-control-cells = <1>;
+			mux-reg-masks = <0x54 0xf8>; // reg 0x54, bits 7:3
+			mdio-parent-bus = <&emdio1>;
+
+			mdio@00 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x00>;
+
+				rgmii_phy1: ethernet-phy@1 {
+					reg = <0x1>;
+				};
+			};
+			mdio@08 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+				reg = <0x40>;
+
+				rgmii_phy2: ethernet-phy@2 {
+					reg = <0x2>;
+				};
+			};
+
+			emdio1_slot1: mdio@c0 { /* I/O Slot #1 */
+				reg = <0xC0>;
+				device-name = "emdio1_slot1";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot2: mdio@c8 { /* I/O Slot #2 */
+				reg = <0xC8>;
+				device-name = "emdio1_slot2";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot3: mdio@d0 { /* I/O Slot #3 */
+				reg = <0xD0>;
+				device-name = "emdio1_slot3";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot4: mdio@d8 { /* I/O Slot #4 */
+				reg = <0xD8>;
+				device-name = "emdio1_slot4";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot5: mdio@e0 { /* I/O Slot #5 */
+				reg = <0xE0>;
+				device-name = "emdio1_slot5";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot6: mdio@e8 { /* I/O Slot #6 */
+				reg = <0xE8>;
+				device-name = "emdio1_slot6";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot7: mdio@f0 { /* I/O Slot #7 */
+				reg = <0xF0>;
+				device-name = "emdio1_slot7";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+
+			emdio1_slot8: mdio@f8 { /* I/O Slot #8 */
+				reg = <0xF8>;
+				device-name = "emdio1_slot8";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
+	};
+
+	i2c-mux@77 {
+		compatible = "nxp,pca9547";
+		reg = <0x77>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		i2c@3 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x3>;
+
+			rtc@51 {
+				compatible = "pcf2127-rtc";
+				reg = <0x51>;
+			};
+		};
+	};
+};
+
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
+&sata3 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/fsl-lx2160a-rdb.dts b/arch/arm/dts/fsl-lx2160a-rdb.dts
index 87617ca51f..d787778de8 100644
--- a/arch/arm/dts/fsl-lx2160a-rdb.dts
+++ b/arch/arm/dts/fsl-lx2160a-rdb.dts
@@ -21,6 +21,58 @@
 	};
 };
 
+&dpmac3 {
+	status = "okay";
+	phy-handle = <&aquantia_phy1>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac4 {
+	status = "okay";
+	phy-handle = <&aquantia_phy2>;
+	phy-connection-type = "usxgmii";
+};
+
+&dpmac17 {
+	status = "okay";
+	phy-handle = <&rgmii_phy1>;
+	phy-connection-type = "rgmii-id";
+};
+
+&dpmac18 {
+	status = "okay";
+	phy-handle = <&rgmii_phy2>;
+	phy-connection-type = "rgmii-id";
+};
+
+&emdio1 {
+	status = "okay";
+	rgmii_phy1: ethernet-phy@1 {
+		/* AR8035 PHY - "compatible" property not strictly needed */
+		compatible = "ethernet-phy-id004d.d072";
+		reg = <0x1>;
+		/* Poll mode - no "interrupts" property defined */
+	};
+	rgmii_phy2: ethernet-phy@2 {
+		/* AR8035 PHY - "compatible" property not strictly needed */
+		compatible = "ethernet-phy-id004d.d072";
+		reg = <0x2>;
+		/* Poll mode - no "interrupts" property defined */
+	};
+	aquantia_phy1: ethernet-phy@4 {
+		/* AQR107 PHY - "compatible" property not strictly needed */
+		compatible = "ethernet-phy-ieee802.3-c45";
+		interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x4>;
+	};
+	aquantia_phy2: ethernet-phy@5 {
+		/* AQR107 PHY - "compatible" property not strictly needed */
+		compatible = "ethernet-phy-ieee802.3-c45";
+		interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+		reg = <0x5>;
+	};
+};
+
 &esdhc0 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 42ce4379ec..1789da8638 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -2,7 +2,7 @@
 /*
  * NXP lx2160a SOC common device tree source
  *
- * Copyright 2018 NXP
+ * Copyright 2018-2020 NXP
  *
  */
 
@@ -363,4 +363,159 @@
 		bus-range = <0x0 0xff>;
 		ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>;
 	};
+
+	fsl_mc: fsl-mc@80c000000 {
+		compatible = "fsl,qoriq-mc", "simple-mfd";
+		reg = <0x00000008 0x0c000000 0 0x40>,
+		      <0x00000000 0x08340000 0 0x40000>;
+		#address-cells = <3>;
+		#size-cells = <1>;
+
+		/*
+		 * Region type 0x0 - MC portals
+		 * Region type 0x1 - QBMAN portals
+		 */
+		ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
+			  0x1 0x0 0x0 0x8 0x18000000 0x8000000>;
+
+		dpmacs {
+			compatible = "simple-mfd";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			dpmac1: dpmac@1 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x1>;
+				status = "disabled";
+			};
+
+			dpmac2: dpmac@2 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x2>;
+				status = "disabled";
+			};
+
+			dpmac3: dpmac@3 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x3>;
+				status = "disabled";
+			};
+
+			dpmac4: dpmac@4 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x4>;
+				status = "disabled";
+			};
+
+			dpmac5: dpmac@5 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x5>;
+				status = "disabled";
+			};
+
+			dpmac6: dpmac@6 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x6>;
+				status = "disabled";
+			};
+
+			dpmac7: dpmac@7 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x7>;
+				status = "disabled";
+			};
+
+			dpmac8: dpmac@8 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x8>;
+				status = "disabled";
+			};
+
+			dpmac9: dpmac@9 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x9>;
+				status = "disabled";
+			};
+
+			dpmac10: dpmac@a {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xa>;
+				status = "disabled";
+			};
+
+			dpmac11: dpmac@b {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xb>;
+				status = "disabled";
+			};
+
+			dpmac12: dpmac@c {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xc>;
+				status = "disabled";
+			};
+
+			dpmac13: dpmac@d {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xd>;
+				status = "disabled";
+			};
+
+			dpmac14: dpmac@e {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xe>;
+				status = "disabled";
+			};
+
+			dpmac15: dpmac@f {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0xf>;
+				status = "disabled";
+			};
+
+			dpmac16: dpmac@10 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x10>;
+				status = "disabled";
+			};
+
+			dpmac17: dpmac@11 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x11>;
+				status = "disabled";
+			};
+
+			dpmac18: dpmac@12 {
+				compatible = "fsl,qoriq-mc-dpmac";
+				reg = <0x12>;
+				status = "disabled";
+			};
+		};
+	};
+
+	/* WRIOP0: 0x8b8_0000, E-MDIO1: 0x1_6000 */
+	emdio1: mdio@8b96000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8b96000 0x0 0x1000>;
+		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+
+	/* WRIOP0: 0x8b8_0000, E-MDIO2: 0x1_7000 */
+	emdio2: mdio@8b97000 {
+		compatible = "fsl,ls-mdio";
+		reg = <0x0 0x8b97000 0x0 0x1000>;
+		interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "disabled";
+	};
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
 };
diff --git a/arch/arm/dts/imx8mm-beacon-baseboard.dtsi b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi
new file mode 100644
index 0000000000..baa5f997d0
--- /dev/null
+++ b/arch/arm/dts/imx8mm-beacon-baseboard.dtsi
@@ -0,0 +1,285 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+/ {
+	leds {
+		compatible = "gpio-leds";
+
+		led0 {
+			label = "gen_led0";
+			gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
+			default-state = "none";
+		};
+
+		led1 {
+			label = "gen_led1";
+			gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
+			default-state = "none";
+		};
+
+		led2 {
+			label = "gen_led2";
+			gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
+			default-state = "none";
+		};
+
+		led3 {
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_led3>;
+			label = "heartbeat";
+			gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+
+	reg_audio: regulator-audio {
+		compatible = "regulator-fixed";
+		regulator-name = "3v3_aud";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	reg_usdhc2_vmmc: regulator-usdhc2 {
+		compatible = "regulator-fixed";
+		regulator-name = "VSD_3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+
+	sound {
+		compatible = "fsl,imx-audio-wm8962";
+		model = "wm8962-audio";
+		audio-cpu = <&sai3>;
+		audio-codec = <&wm8962>;
+		audio-routing =
+			"Headphone Jack", "HPOUTL",
+			"Headphone Jack", "HPOUTR",
+			"Ext Spk", "SPKOUTL",
+			"Ext Spk", "SPKOUTR",
+			"AMIC", "MICBIAS",
+			"IN3R", "AMIC";
+	};
+};
+
+&ecspi2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_espi2>;
+	cs-gpios = <&gpio5 9 0>;
+	status = "okay";
+
+	eeprom@0 {
+		compatible = "microchip,at25160bn", "atmel,at25";
+		reg = <0>;
+		spi-max-frequency = <5000000>;
+		spi-cpha;
+		spi-cpol;
+		pagesize = <32>;
+		size = <2048>;
+		address-width = <16>;
+	};
+};
+
+&i2c2 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c4>;
+	status = "okay";
+
+	wm8962: audio-codec@1a {
+		compatible = "wlf,wm8962";
+		reg = <0x1a>;
+		clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
+		clock-names = "xclk";
+		DCVDD-supply = <&reg_audio>;
+		DBVDD-supply = <&reg_audio>;
+		AVDD-supply = <&reg_audio>;
+		CPVDD-supply = <&reg_audio>;
+		MICVDD-supply = <&reg_audio>;
+		PLLVDD-supply = <&reg_audio>;
+		SPKVDD1-supply = <&reg_audio>;
+		SPKVDD2-supply = <&reg_audio>;
+		gpio-cfg = <
+			0x0000 /* 0:Default */
+			0x0000 /* 1:Default */
+			0x0000 /* 2:FN_DMICCLK */
+			0x0000 /* 3:Default */
+			0x0000 /* 4:FN_DMICCDAT */
+			0x0000 /* 5:Default */
+		>;
+	};
+
+	pca6416_0: gpio@20 {
+		compatible = "nxp,pcal6416";
+		reg = <0x20>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pcal6414>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+	};
+
+	pca6416_1: gpio@21 {
+		compatible = "nxp,pcal6416";
+		reg = <0x21>;
+		gpio-controller;
+		#gpio-cells = <2>;
+		interrupt-parent = <&gpio4>;
+		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+&sai3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_sai3>;
+	assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
+	assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
+	assigned-clock-rates = <24576000>;
+	fsl,sai-mclk-direction-output;
+	status = "okay";
+};
+
+&snvs_pwrkey {
+	status = "okay";
+};
+
+&uart2 { /* console */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
+	status = "okay";
+};
+
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART3>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+	bus-width = <4>;
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_espi2: espi2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x82
+			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x82
+			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x82
+			MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9		0x41
+		>;
+	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
+			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c3
+		>;
+	};
+
+	pinctrl_i2c4: i2c4grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
+			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA		0x400001c3
+		>;
+	};
+
+	pinctrl_led3: led3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28	0x41
+		>;
+	};
+
+	pinctrl_pcal6414: pcal6414-gpio {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27		0x19
+		>;
+	};
+
+	pinctrl_sai3: sai3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC     0xd6
+			MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK      0xd6
+			MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK        0xd6
+			MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0     0xd6
+			MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0	0xd6
+		>;
+	};
+
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140
+			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX	0x140
+		>;
+	};
+
+	pinctrl_uart3: uart3grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX	0x40
+			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX	0x40
+		>;
+	};
+
+	pinctrl_usdhc2_gpio: usdhc2grpgpio {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B	0x41
+			MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
+		>;
+	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK	0x190
+			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d0
+			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d0
+			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d0
+			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d0
+			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d0
+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK	0x194
+			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d4
+			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d4
+			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d4
+			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d4
+			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d4
+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+		fsl,pins = <
+			MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK	0x196
+			MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD	0x1d6
+			MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0	0x1d6
+			MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1	0x1d6
+			MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2	0x1d6
+			MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3	0x1d6
+			MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT	0x1d0
+		>;
+	};
+};
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
new file mode 100644
index 0000000000..fc1aebb2fe
--- /dev/null
+++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		u-boot,dm-spl;
+	};
+};
+
+&{/soc@0} {
+	u-boot,dm-pre-reloc;
+	u-boot,dm-spl;
+};
+
+&aips1 {
+	u-boot,dm-spl;
+	u-boot,dm-pre-reloc;
+};
+
+&aips2 {
+	u-boot,dm-spl;
+};
+
+&aips3 {
+	u-boot,dm-spl;
+};
+
+&clk {
+	u-boot,dm-spl;
+	u-boot,dm-pre-reloc;
+	/delete-property/ assigned-clocks;
+	/delete-property/ assigned-clock-parents;
+	/delete-property/ assigned-clock-rates;
+};
+
+&fec1 {
+	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+};
+
+&gpio1 {
+	u-boot,dm-spl;
+};
+
+&gpio2 {
+	u-boot,dm-spl;
+};
+
+&gpio3 {
+	u-boot,dm-spl;
+};
+
+&gpio4 {
+	u-boot,dm-spl;
+};
+
+&gpio5 {
+	u-boot,dm-spl;
+};
+
+&iomuxc {
+	u-boot,dm-spl;
+};
+
+&osc_24m {
+	u-boot,dm-spl;
+	u-boot,dm-pre-reloc;
+};
+
+&pca6416_0 {
+	compatible = "ti,tca6416";
+};
+
+&pca6416_1 {
+	compatible = "ti,tca6416";
+};
+
+&pinctrl_i2c1 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_pmic {
+	u-boot,dm-spl;
+};
+
+&pinctrl_uart2 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2_gpio {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc2 {
+	u-boot,dm-spl;
+};
+
+&pinctrl_usdhc3 {
+	u-boot,dm-spl;
+};
+
+&uart2 {
+	u-boot,dm-spl;
+};
+
+&usdhc2 {
+	u-boot,dm-spl;
+};
+
+&usdhc3 {
+	u-boot,dm-spl;
+};
+
+&i2c1 {
+	u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
+	u-boot,dm-spl;
+};
+
+&{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
+	u-boot,dm-spl;
+};
+
+&wdog1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-beacon-kit.dts b/arch/arm/dts/imx8mm-beacon-kit.dts
new file mode 100644
index 0000000000..74a7b0cc10
--- /dev/null
+++ b/arch/arm/dts/imx8mm-beacon-kit.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+/dts-v1/;
+
+#include "imx8mm.dtsi"
+#include "imx8mm-beacon-som.dtsi"
+#include "imx8mm-beacon-baseboard.dtsi"
+
+/ {
+	model = "Beacon EmbeddedWorks i.MX8M Mini Development Kit";
+	compatible = "beacon,imx8mm-beacon-kit", "fsl,imx8mm";
+
+	chosen {
+		stdout-path = &uart2;
+	};
+};
diff --git a/arch/arm/dts/imx8mm-beacon-som.dtsi b/arch/arm/dts/imx8mm-beacon-som.dtsi
new file mode 100644
index 0000000000..801bd02eae
--- /dev/null
+++ b/arch/arm/dts/imx8mm-beacon-som.dtsi
@@ -0,0 +1,390 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+/ {
+	usdhc1_pwrseq: usdhc1_pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_usdhc1_gpio>;
+		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
+		clocks = <&osc_32k>;
+		clock-names = "ext_clock";
+		post-power-on-delay-ms = <80>;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x0 0x40000000 0 0x80000000>;
+	};
+};
+
+&A53_0 {
+	cpu-supply = <&buck2_reg>;
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	fsl,magic-packet;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+		};
+	};
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pmic@4b {
+		compatible = "rohm,bd71847";
+		reg = <0x4b>;
+		pinctrl-0 = <&pinctrl_pmic>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 GPIO_ACTIVE_LOW>;
+		rohm,reset-snvs-powered;
+
+		regulators {
+			buck1_reg: BUCK1 {
+				regulator-name = "buck1";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <1250>;
+			};
+
+			buck2_reg: BUCK2 {
+				regulator-name = "buck2";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <1250>;
+				rohm,dvs-run-voltage = <1000000>;
+				rohm,dvs-idle-voltage = <900000>;
+			};
+
+			buck3_reg: BUCK3 {
+				// BUCK5 in datasheet
+				regulator-name = "buck3";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck4_reg: BUCK4 {
+				// BUCK6 in datasheet
+				regulator-name = "buck4";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck5_reg: BUCK5 {
+				// BUCK7 in datasheet
+				regulator-name = "buck5";
+				regulator-min-microvolt = <1605000>;
+				regulator-max-microvolt = <1995000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck6_reg: BUCK6 {
+				// BUCK8 in datasheet
+				regulator-name = "buck6";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1_reg: LDO1 {
+				regulator-name = "ldo1";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2_reg: LDO2 {
+				regulator-name = "ldo2";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3_reg: LDO3 {
+				regulator-name = "ldo3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4_reg: LDO4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo6_reg: LDO6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&i2c3 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "microchip, at24c64d", "atmel,24c64";
+		pagesize = <32>;
+		read-only;	/* Manufacturing EEPROM programmed at factory */
+		reg = <0x50>;
+	};
+
+	rtc@51 {
+		compatible = "nxp,pcf85263";
+		reg = <0x51>;
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	assigned-clocks = <&clk IMX8MM_CLK_UART1>;
+	assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		shutdown-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
+		host-wakeup-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
+		device-wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
+		clocks = <&osc_32k>;
+		clock-names = "extclk";
+	};
+};
+
+&usdhc1 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	bus-width = <4>;
+	non-removable;
+	cap-power-off-card;
+	pm-ignore-notify;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&usdhc1_pwrseq>;
+	status = "okay";
+
+	brcmf: bcrmf@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_wlan>;
+		interrupt-parent = <&gpio2>;
+		interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "host-wake";
+	};
+};
+
+&usdhc3 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
+&iomuxc {
+		pinctrl_fec1: fec1grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_ENET_MDC_ENET1_MDC		0x3
+				MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO	0x3
+				MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3	0x1f
+				MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2	0x1f
+				MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1	0x1f
+				MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0	0x1f
+				MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3	0x91
+				MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2	0x91
+				MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1	0x91
+				MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0	0x91
+				MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC	0x1f
+				MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC	0x91
+				MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
+				MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
+				MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22	0x19
+			>;
+		};
+
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL		0x400001c3
+				MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA		0x400001c3
+			>;
+		};
+
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
+				MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA		0x400001c3
+			>;
+		};
+
+		pinctrl_pmic: pmicirq {
+			fsl,pins = <
+				MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x41
+			>;
+		};
+
+		pinctrl_uart1: uart1grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX	0x140
+				MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX	0x140
+				MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B	0x140
+				MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B	0x140
+				MX8MM_IOMUXC_SD1_DATA4_GPIO2_IO6	0x19
+				MX8MM_IOMUXC_SD1_DATA5_GPIO2_IO7	0x19
+				MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8	0x19
+				MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K	0x141
+			>;
+		};
+
+		pinctrl_usdhc1_gpio: usdhc1grpgpio {
+			fsl,pins = <
+				MX8MM_IOMUXC_SD1_RESET_B_GPIO2_IO10	0x41
+			>;
+		};
+
+		pinctrl_usdhc1: usdhc1grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190
+				MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD		0x1d0
+				MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0	0x1d0
+				MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1	0x1d0
+				MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2	0x1d0
+				MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3	0x1d0
+			>;
+		};
+
+		pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+			fsl,pins = <
+				MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x194
+				MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD		0x1d4
+				MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0	0x1d4
+				MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1	0x1d4
+				MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2	0x1d4
+				MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3	0x1d4
+			>;
+		};
+
+		pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+			fsl,pins = <
+				MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x196
+				MX8MM_IOMUXC_SD1_CMD_USDHC1_CMD		0x1d6
+				MX8MM_IOMUXC_SD1_DATA0_USDHC1_DATA0	0x1d6
+				MX8MM_IOMUXC_SD1_DATA1_USDHC1_DATA1	0x1d6
+				MX8MM_IOMUXC_SD1_DATA2_USDHC1_DATA2	0x1d6
+				MX8MM_IOMUXC_SD1_DATA3_USDHC1_DATA3	0x1d6
+			>;
+		};
+
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x190
+				MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d0
+				MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d0
+				MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d0
+				MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d0
+				MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d0
+				MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d0
+				MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d0
+				MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d0
+				MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d0
+				MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x190
+			>;
+		};
+
+		pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
+			fsl,pins = <
+				MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x194
+				MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d4
+				MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d4
+				MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d4
+				MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d4
+				MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d4
+				MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d4
+				MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d4
+				MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d4
+				MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d4
+				MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x194
+			>;
+		};
+
+		pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
+			fsl,pins = <
+				MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK		0x196
+				MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD		0x1d6
+				MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0		0x1d6
+				MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1		0x1d6
+				MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2		0x1d6
+				MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3		0x1d6
+				MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4		0x1d6
+				MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5		0x1d6
+				MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6		0x1d6
+				MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7		0x1d6
+				MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE		0x196
+			>;
+		};
+
+		pinctrl_wdog: wdoggrp {
+			fsl,pins = <
+				MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B		0xc6
+			>;
+		};
+
+		pinctrl_wlan: wlangrp {
+			fsl,pins = <
+				MX8MM_IOMUXC_SD1_DATA7_GPIO2_IO9		0x111
+			>;
+		};
+};
diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
index 3502602fbb..b5c12105a9 100644
--- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi
@@ -3,6 +3,14 @@
  * Copyright 2019 NXP
  */
 
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		u-boot,dm-spl;
+	};
+};
+
 &{/soc@0} {
 	u-boot,dm-pre-reloc;
 	u-boot,dm-spl;
@@ -117,3 +125,7 @@
 &fec1 {
 	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
 };
+
+&wdog1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
index e60b9faee4..fe6bb9bf03 100644
--- a/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-verdin-u-boot.dtsi
@@ -3,6 +3,14 @@
  * Copyright 2020 Toradex
  */
 
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		u-boot,dm-spl;
+	};
+};
+
 &aips1 {
 	u-boot,dm-spl;
 	u-boot,dm-pre-reloc;
@@ -105,3 +113,7 @@
 &usdhc3 {
 	u-boot,dm-spl;
 };
+
+&wdog1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mm.dtsi b/arch/arm/dts/imx8mm.dtsi
index 8aafad2449..1e5e11592f 100644
--- a/arch/arm/dts/imx8mm.dtsi
+++ b/arch/arm/dts/imx8mm.dtsi
@@ -12,7 +12,6 @@
 #include "imx8mm-pinfunc.h"
 
 / {
-	compatible = "fsl,imx8mm";
 	interrupt-parent = <&gic>;
 	#address-cells = <2>;
 	#size-cells = <2>;
@@ -141,11 +140,6 @@
 		};
 	};
 
-	memory@40000000 {
-		device_type = "memory";
-		reg = <0x0 0x40000000 0 0x80000000>;
-	};
-
 	osc_32k: clock-osc-32k {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -233,7 +227,7 @@
 		ranges = <0x0 0x0 0x0 0x3e000000>;
 
 		aips1: bus@30000000 {
-			compatible = "fsl,aips-bus", "simple-bus";
+			compatible = "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x30000000 0x30000000 0x400000>;
@@ -394,7 +388,7 @@
 			};
 
 			sdma2: dma-controller@302c0000 {
-				compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
+				compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
 				reg = <0x302c0000 0x10000>;
 				interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>,
@@ -405,7 +399,7 @@
 			};
 
 			sdma3: dma-controller@302b0000 {
-				compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
+				compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
 				reg = <0x302b0000 0x10000>;
 				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>,
@@ -439,7 +433,7 @@
 			};
 
 			anatop: anatop@30360000 {
-				compatible = "fsl,imx8mm-anatop", "syscon", "simple-bus";
+				compatible = "fsl,imx8mm-anatop", "syscon";
 				reg = <0x30360000 0x10000>;
 			};
 
@@ -479,14 +473,18 @@
 						<&clk IMX8MM_CLK_AUDIO_AHB>,
 						<&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
 						<&clk IMX8MM_SYS_PLL3>,
-						<&clk IMX8MM_VIDEO_PLL1>;
+						<&clk IMX8MM_VIDEO_PLL1>,
+						<&clk IMX8MM_AUDIO_PLL1>,
+						<&clk IMX8MM_AUDIO_PLL2>;
 				assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
 							 <&clk IMX8MM_SYS_PLL1_800M>;
 				assigned-clock-rates = <0>,
 							<400000000>,
 							<400000000>,
 							<750000000>,
-							<594000000>;
+							<594000000>,
+							<393216000>,
+							<361267200>;
 			};
 
 			src: reset-controller@30390000 {
@@ -498,7 +496,7 @@
 		};
 
 		aips2: bus@30400000 {
-			compatible = "fsl,aips-bus", "simple-bus";
+			compatible = "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x30400000 0x30400000 0x400000>;
@@ -557,7 +555,7 @@
 		};
 
 		aips3: bus@30800000 {
-			compatible = "fsl,aips-bus", "simple-bus";
+			compatible = "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x30800000 0x30800000 0x400000>;
@@ -638,6 +636,36 @@
 				status = "disabled";
 			};
 
+			crypto: crypto@30900000 {
+				compatible = "fsl,sec-v4.0";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x30900000 0x40000>;
+				ranges = <0 0x30900000 0x40000>;
+				interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clk IMX8MM_CLK_AHB>,
+					 <&clk IMX8MM_CLK_IPG_ROOT>;
+				clock-names = "aclk", "ipg";
+
+				sec_jr0: jr@1000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x1000 0x1000>;
+					interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr1: jr@2000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x2000 0x1000>;
+					interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+				};
+
+				sec_jr2: jr@3000 {
+					compatible = "fsl,sec-v4.0-job-ring";
+					reg = <0x3000 0x1000>;
+					interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+				};
+			};
+
 			i2c1: i2c@30a20000 {
 				compatible = "fsl,imx8mm-i2c", "fsl,imx21-i2c";
 				#address-cells = <1>;
@@ -698,8 +726,6 @@
 					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,
 					 <&clk IMX8MM_CLK_USDHC1_ROOT>;
 				clock-names = "ipg", "ahb", "per";
-				assigned-clocks = <&clk IMX8MM_CLK_USDHC1>;
-				assigned-clock-rates = <400000000>;
 				fsl,tuning-start-tap = <20>;
 				fsl,tuning-step= <2>;
 				bus-width = <4>;
@@ -728,8 +754,6 @@
 					 <&clk IMX8MM_CLK_NAND_USDHC_BUS>,
 					 <&clk IMX8MM_CLK_USDHC3_ROOT>;
 				clock-names = "ipg", "ahb", "per";
-				assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
-				assigned-clock-rates = <400000000>;
 				fsl,tuning-start-tap = <20>;
 				fsl,tuning-step= <2>;
 				bus-width = <4>;
@@ -737,11 +761,11 @@
 			};
 
 			sdma1: dma-controller@30bd0000 {
-				compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
+				compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>,
-					 <&clk IMX8MM_CLK_SDMA1_ROOT>;
+					 <&clk IMX8MM_CLK_AHB>;
 				clock-names = "ipg", "ahb";
 				#dma-cells = <3>;
 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
@@ -776,7 +800,7 @@
 		};
 
 		aips4: bus@32c00000 {
-			compatible = "fsl,aips-bus", "simple-bus";
+			compatible = "simple-bus";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0x32c00000 0x32c00000 0x400000>;
@@ -859,6 +883,16 @@
 			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
+		ddrc: memory-controller@3d400000 {
+			compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
+			reg = <0x3d400000 0x400000>;
+			clock-names = "core", "pll", "alt", "apb";
+			clocks = <&clk IMX8MM_CLK_DRAM_CORE>,
+				 <&clk IMX8MM_DRAM_PLL>,
+				 <&clk IMX8MM_CLK_DRAM_ALT>,
+				 <&clk IMX8MM_CLK_DRAM_APB>;
+		};
+
 		ddr-pmu@3d800000 {
 			compatible = "fsl,imx8mm-ddr-pmu", "fsl,imx8m-ddr-pmu";
 			reg = <0x3d800000 0x400000>;
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 8d61597e0c..4419679d4c 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -3,6 +3,14 @@
  * Copyright 2019 NXP
  */
 
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		u-boot,dm-spl;
+	};
+};
+
 &{/soc@0} {
 	u-boot,dm-pre-reloc;
 	u-boot,dm-spl;
@@ -90,3 +98,7 @@
 &usdhc3 {
 	u-boot,dm-spl;
 };
+
+&wdog1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
index 4675ada0a0..24a93ac2d6 100644
--- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi
@@ -3,6 +3,14 @@
  * Copyright 2019 NXP
  */
 
+/ {
+	wdt-reboot {
+		compatible = "wdt-reboot";
+		wdt = <&wdog1>;
+		u-boot,dm-spl;
+	};
+};
+
 &{/soc@0} {
 	u-boot,dm-pre-reloc;
 	u-boot,dm-spl;
@@ -119,3 +127,7 @@
 &usdhc3 {
 	u-boot,dm-spl;
 };
+
+&wdog1 {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/imx8mq-phanbell.dts b/arch/arm/dts/imx8mq-phanbell.dts
new file mode 100644
index 0000000000..4892ad5ee1
--- /dev/null
+++ b/arch/arm/dts/imx8mq-phanbell.dts
@@ -0,0 +1,417 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+#include "imx8mq.dtsi"
+
+/ {
+	model = "Google i.MX8MQ Phanbell";
+	compatible = "google,imx8mq-phanbell", "fsl,imx8mq";
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x00000000 0x40000000 0 0x40000000>;
+	};
+
+	pmic_osc: clock-pmic {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "pmic_osc";
+	};
+
+	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
+		compatible = "regulator-fixed";
+		regulator-name = "VSD_3V3";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&A53_0 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_1 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_2 {
+	cpu-supply = <&buck2>;
+};
+
+&A53_3 {
+	cpu-supply = <&buck2>;
+};
+
+&i2c1 {
+	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pmic: pmic@4b {
+		compatible = "rohm,bd71837";
+		reg = <0x4b>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pmic>;
+		#clock-cells = <0>;
+		clocks = <&pmic_osc>;
+		clock-output-names = "pmic_clk";
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 GPIO_ACTIVE_LOW>;
+
+		regulators {
+			buck1: BUCK1 {
+				regulator-name = "buck1";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <1250>;
+				rohm,dvs-run-voltage = <900000>;
+				rohm,dvs-idle-voltage = <900000>;
+				rohm,dvs-suspend-voltage = <800000>;
+			};
+
+			buck2: BUCK2 {
+				regulator-name = "buck2";
+				regulator-min-microvolt = <850000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-boot-on;
+				regulator-always-on;
+				rohm,dvs-run-voltage = <1000000>;
+				rohm,dvs-idle-voltage = <900000>;
+			};
+
+			buck3: BUCK3 {
+				regulator-name = "buck3";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				rohm,dvs-run-voltage = <900000>;
+			};
+
+			buck4: BUCK4 {
+				regulator-name = "buck4";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-always-on;
+				rohm,dvs-run-voltage = <900000>;
+			};
+
+			buck5: BUCK5 {
+				regulator-name = "buck5";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck6: BUCK6 {
+				regulator-name = "buck6";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck7: BUCK7 {
+				regulator-name = "buck7";
+				regulator-min-microvolt = <1605000>;
+				regulator-max-microvolt = <1995000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			buck8: BUCK8 {
+				regulator-name = "buck8";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo1: LDO1 {
+				regulator-name = "ldo1";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2: LDO2 {
+				regulator-name = "ldo2";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3: LDO3 {
+				regulator-name = "ldo3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo4: LDO4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo5: LDO5 {
+				regulator-name = "ldo5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo6: LDO6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo7: LDO7 {
+				regulator-name = "ldo7";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
+	phy-reset-post-delay = <50>;
+	fsl,magic-packet;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		ethphy0: ethernet-phy@0 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <0>;
+		};
+	};
+};
+
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	bus-width = <4>;
+	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+	vmmc-supply = <&reg_usdhc2_vmmc>;
+	status = "okay";
+};
+
+&usb3_phy0 {
+	status = "okay";
+};
+
+&usb_dwc3_0 {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_fec1: fec1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
+			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x23
+			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
+			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
+			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
+			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
+			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
+			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
+			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
+			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
+			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
+			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
+			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
+			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
+			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL			0x4000007f
+			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA			0x4000007f
+		>;
+	};
+
+	pinctrl_pmic: pmicirq {
+		fsl,pins = <
+			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
+			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
+			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x85
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc5
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc5
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc5
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc5
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc5
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc5
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc5
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc5
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc5
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x85
+			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x87
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc7
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc7
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc7
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc7
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc7
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc7
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc7
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc7
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc7
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x87
+			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
+		>;
+	};
+
+	pinctrl_usdhc2_gpio: usdhc2grpgpio {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x41
+			MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19	0x41
+		>;
+	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x85
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc5
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc5
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc5
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc5
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc5
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x87
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc7
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc7
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc7
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc7
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc7
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_wdog: wdoggrp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
+		>;
+	};
+};
diff --git a/arch/arm/dts/imx8mq-pico-pi.dts b/arch/arm/dts/imx8mq-pico-pi.dts
new file mode 100644
index 0000000000..d2af18ad0e
--- /dev/null
+++ b/arch/arm/dts/imx8mq-pico-pi.dts
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Wandboard, Org.
+ * Copyright 2017 NXP
+ *
+ * Author: Richard Hu <hakahu@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "imx8mq.dtsi"
+
+/ {
+	model = "TechNexion PICO-PI-8M";
+	compatible = "technexion,pico-pi-imx8m", "fsl,imx8mq";
+
+	chosen {
+		stdout-path = &uart1;
+	};
+
+	pmic_osc: clock-pmic {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <32768>;
+		clock-output-names = "pmic_osc";
+	};
+
+	reg_usb_otg_vbus: regulator-usb-otg-vbus {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_otg_vbus>;
+		compatible = "regulator-fixed";
+		regulator-name = "usb_otg_vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio3 14 GPIO_ACTIVE_LOW>;
+	};
+
+	reg_eth_phy: eth_phy {
+		compatible = "regulator-fixed";
+		regulator-name = "eth_phy_pwr";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&fec1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethphy0>;
+	phy-supply = <&reg_eth_phy>;
+	phy-reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <100>;
+	phy-reset-post-delay = <100>;
+	fsl,magic-packet;
+	status = "okay";
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		ethphy0: ethernet-phy@1 {
+			compatible = "ethernet-phy-ieee802.3-c22";
+			reg = <1>;
+		};
+	};
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "okay";
+
+	pmic: pmic@4b {
+		reg = <0x4b>;
+		compatible = "rohm,bd71837";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_pmic>;
+		clocks = <&pmic_osc>;
+		clock-names = "osc";
+		clock-output-names = "pmic_clk";
+		interrupt-parent = <&gpio1>;
+		interrupts = <3 GPIO_ACTIVE_LOW>;
+		interrupt-names = "irq";
+
+		regulators {
+			buck1: BUCK1 {
+				regulator-name = "buck1";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-ramp-delay = <1250>;
+				rohm,dvs-run-voltage = <900000>;
+				rohm,dvs-idle-voltage = <850000>;
+				rohm,dvs-suspend-voltage = <800000>;
+			};
+
+			buck2: BUCK2 {
+				regulator-name = "buck2";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				regulator-ramp-delay = <1250>;
+				rohm,dvs-run-voltage = <1000000>;
+				rohm,dvs-idle-voltage = <900000>;
+			};
+
+			buck3: BUCK3 {
+				regulator-name = "buck3";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				rohm,dvs-run-voltage = <1000000>;
+			};
+
+			buck4: BUCK4 {
+				regulator-name = "buck4";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1300000>;
+				regulator-boot-on;
+				rohm,dvs-run-voltage = <1000000>;
+			};
+
+			buck5: BUCK5 {
+				regulator-name = "buck5";
+				regulator-min-microvolt = <700000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-boot-on;
+			};
+
+			buck6: BUCK6 {
+				regulator-name = "buck6";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+			};
+
+			buck7: BUCK7 {
+				regulator-name = "buck7";
+				regulator-min-microvolt = <1605000>;
+				regulator-max-microvolt = <1995000>;
+				regulator-boot-on;
+			};
+
+			buck8: BUCK8 {
+				regulator-name = "buck8";
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1400000>;
+				regulator-boot-on;
+			};
+
+			ldo1: LDO1 {
+				regulator-name = "ldo1";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo2: LDO2 {
+				regulator-name = "ldo2";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <900000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			ldo3: LDO3 {
+				regulator-name = "ldo3";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+			};
+
+			ldo4: LDO4 {
+				regulator-name = "ldo4";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+			};
+
+			ldo5: LDO5 {
+				regulator-name = "ldo5";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+			};
+
+			ldo6: LDO6 {
+				regulator-name = "ldo6";
+				regulator-min-microvolt = <900000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-boot-on;
+			};
+
+			ldo7: LDO7 {
+				regulator-name = "ldo7";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+			};
+		};
+	};
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+};
+
+&uart1 { /* console */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
+	status = "okay";
+};
+
+&usdhc1 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc1>;
+	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+	bus-width = <8>;
+	non-removable;
+	status = "okay";
+};
+
+&usdhc2 {
+	pinctrl-names = "default", "state_100mhz", "state_200mhz";
+	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+	bus-width = <4>;
+	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
+	status = "okay";
+};
+
+&usb3_phy0 {
+	status = "okay";
+};
+
+&usb3_phy1 {
+	status = "okay";
+};
+
+&usb_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&wdog1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_wdog>;
+	fsl,ext-reset-output;
+	status = "okay";
+};
+
+&iomuxc {
+	pinctrl_fec1: fec1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_ENET_MDC_ENET1_MDC			0x3
+			MX8MQ_IOMUXC_ENET_MDIO_ENET1_MDIO		0x23
+			MX8MQ_IOMUXC_ENET_TD3_ENET1_RGMII_TD3		0x1f
+			MX8MQ_IOMUXC_ENET_TD2_ENET1_RGMII_TD2		0x1f
+			MX8MQ_IOMUXC_ENET_TD1_ENET1_RGMII_TD1		0x1f
+			MX8MQ_IOMUXC_ENET_TD0_ENET1_RGMII_TD0		0x1f
+			MX8MQ_IOMUXC_ENET_RD3_ENET1_RGMII_RD3		0x91
+			MX8MQ_IOMUXC_ENET_RD2_ENET1_RGMII_RD2		0x91
+			MX8MQ_IOMUXC_ENET_RD1_ENET1_RGMII_RD1		0x91
+			MX8MQ_IOMUXC_ENET_RD0_ENET1_RGMII_RD0		0x91
+			MX8MQ_IOMUXC_ENET_TXC_ENET1_RGMII_TXC		0x1f
+			MX8MQ_IOMUXC_ENET_RXC_ENET1_RGMII_RXC		0x91
+			MX8MQ_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL	0x91
+			MX8MQ_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL	0x1f
+			MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0		0x19
+			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9		0x19
+		>;
+	};
+
+	pinctrl_i2c1: i2c1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL			0x4000007f
+			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA			0x4000007f
+		>;
+	};
+
+	pinctrl_i2c2: i2c2grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL			0x4000007f
+			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA			0x4000007f
+		>;
+	};
+
+	pinctrl_otg_vbus: otgvbusgrp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14		0x19   /* USB OTG VBUS Enable */
+		>;
+	};
+
+	pinctrl_pmic: pmicirq {
+		fsl,pins = <
+			MX8MQ_IOMUXC_GPIO1_IO03_GPIO1_IO3	0x41
+		>;
+	};
+
+	pinctrl_uart1: uart1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX		0x49
+			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX		0x49
+		>;
+	};
+
+	pinctrl_uart2: uart2grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX		0x49
+			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX		0x49
+			MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B		0x49
+			MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B		0x49
+		>;
+	};
+
+	pinctrl_usdhc1: usdhc1grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
+		>;
+	};
+
+	pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x85
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc5
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc5
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc5
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc5
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc5
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc5
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc5
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc5
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc5
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x85
+		>;
+	};
+
+	pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x87
+			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc7
+			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc7
+			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc7
+			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc7
+			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc7
+			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc7
+			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc7
+			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc7
+			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc7
+			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x87
+		>;
+	};
+
+	pinctrl_usdhc2_gpio: usdhc2grpgpio {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x41
+		>;
+	};
+
+	pinctrl_usdhc2: usdhc2grp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x83
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc3
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc3
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc3
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc3
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc3
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x85
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc5
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc5
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc5
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc5
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc5
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
+		fsl,pins = <
+			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK			0x87
+			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD			0xc7
+			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0		0xc7
+			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1		0xc7
+			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2		0xc7
+			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3		0xc7
+			MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0xc1
+		>;
+	};
+
+	pinctrl_wdog: wdoggrp {
+		fsl,pins = <
+			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
+		>;
+	};
+};
diff --git a/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi b/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi
index d07aaea93f..5638321903 100644
--- a/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-ddr4-1600MTs.dtsi
@@ -1,7 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
- * This file was generated by AM65x_DRA80xM_EMIF_Tool_1.98.xlsm
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ * This file was generated by AM65x_DRA80xM_EMIF_Tool_2.02.xlsm
  * http://www.ti.com/lit/pdf/spracj0
  * Configuration Parameters
  * Memory Type: DDR4
@@ -24,7 +24,7 @@
 #define DDRCTL_INIT4 0x00000020
 #define DDRCTL_INIT5 0x00100000
 #define DDRCTL_INIT6 0x00000480
-#define DDRCTL_INIT7 0x000004E8
+#define DDRCTL_INIT7 0x00000497
 #define DDRCTL_DRAMTMG0 0x0C0A1B0D
 #define DDRCTL_DRAMTMG1 0x00030313
 #define DDRCTL_DRAMTMG2 0x0506050A
@@ -33,10 +33,10 @@
 #define DDRCTL_DRAMTMG5 0x04040302
 #define DDRCTL_DRAMTMG6 0x00000004
 #define DDRCTL_DRAMTMG7 0x00000404
-#define DDRCTL_DRAMTMG8 0x03030A05
+#define DDRCTL_DRAMTMG8 0x03030C05
 #define DDRCTL_DRAMTMG9 0x00020208
 #define DDRCTL_DRAMTMG10 0x001C180A
-#define DDRCTL_DRAMTMG11 0x0E06010E
+#define DDRCTL_DRAMTMG11 0x1106010E
 #define DDRCTL_DRAMTMG12 0x00020008
 #define DDRCTL_DRAMTMG13 0x0B100002
 #define DDRCTL_DRAMTMG14 0x00000000
@@ -84,33 +84,33 @@
 #define DDRPHY_DCR 0x0000040C
 #define DDRPHY_DTPR0 0x041A0B06
 #define DDRPHY_DTPR1 0x28140000
-#define DDRPHY_DTPR2 0x0034E255
-#define DDRPHY_DTPR3 0x01D50800
+#define DDRPHY_DTPR2 0x0034E300
+#define DDRPHY_DTPR3 0x02800800
 #define DDRPHY_DTPR4 0x31180805
 #define DDRPHY_DTPR5 0x00250B06
 #define DDRPHY_DTPR6 0x00000505
 #define DDRPHY_ZQCR 0x008A2A58
 #define DDRPHY_ZQ0PR0 0x000077DD
-#define DDRPHY_ZQ1PR0 0x000077DD
+#define DDRPHY_ZQ1PR0 0x00007799
 #define DDRPHY_MR0 0x00000214
 #define DDRPHY_MR1 0x00000501
 #define DDRPHY_MR2 0x00000000
 #define DDRPHY_MR3 0x00000020
 #define DDRPHY_MR4 0x00000000
 #define DDRPHY_MR5 0x00000480
-#define DDRPHY_MR6 0x000004E8
+#define DDRPHY_MR6 0x00000497
 #define DDRPHY_MR11 0x00000000
 #define DDRPHY_MR12 0x00000000
 #define DDRPHY_MR13 0x00000000
 #define DDRPHY_MR14 0x00000000
 #define DDRPHY_MR22 0x00000000
-#define DDRPHY_VTCR0 0xF3C32028
+#define DDRPHY_VTCR0 0xF3C32017
 #define DDRPHY_DX8SL0PLLCR0 0x021c4000
 #define DDRPHY_DX8SL1PLLCR0 0x021c4000
 #define DDRPHY_DX8SL2PLLCR0 0x021c4000
 #define DDRPHY_DTCR0 0x8000B1C7
 #define DDRPHY_DTCR1 0x00010236
-#define DDRPHY_ACIOCR0 0x30070000
+#define DDRPHY_ACIOCR0 0xF0070000
 #define DDRPHY_ACIOCR3 0x00000001
 #define DDRPHY_ACIOCR5 0x04800000
 #define DDRPHY_IOVCR0 0x0F0C0C0C
@@ -157,6 +157,6 @@
 #define DDRPHY_DX8SL0DXCTL2 0x00141830
 #define DDRPHY_DX8SL1DXCTL2 0x00141830
 #define DDRPHY_DX8SL2DXCTL2 0x00141830
-#define DDRPHY_DX8SL0DQSCTL 0x01264000
-#define DDRPHY_DX8SL1DQSCTL 0x01264000
-#define DDRPHY_DX8SL2DQSCTL 0x01264000
+#define DDRPHY_DX8SL0DQSCTL 0x01264300
+#define DDRPHY_DX8SL1DQSCTL 0x01264300
+#define DDRPHY_DX8SL2DQSCTL 0x01264300
diff --git a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
index 173b492cd9..7832c9ab53 100644
--- a/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-35xx-devkit-u-boot.dtsi
@@ -15,6 +15,16 @@
 		/delete-property/ serial1;
 		/delete-property/ serial2;
 	};
+
+	ethernet@08000000 {
+		compatible = "smsc,lan9221","smsc,lan9115";
+		reg = <0x08000000 0xff>;
+		bank-width = <2>;
+		vddvario-supply = <&vddvario>;
+		vdd33a-supply = <&vdd33a>;
+		reg-io-width = <4>;
+		smsc,save-mac-address;
+	};
 };
 
 &gpio1 {
diff --git a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
index 173b492cd9..7832c9ab53 100644
--- a/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-som-lv-37xx-devkit-u-boot.dtsi
@@ -15,6 +15,16 @@
 		/delete-property/ serial1;
 		/delete-property/ serial2;
 	};
+
+	ethernet@08000000 {
+		compatible = "smsc,lan9221","smsc,lan9115";
+		reg = <0x08000000 0xff>;
+		bank-width = <2>;
+		vddvario-supply = <&vddvario>;
+		vdd33a-supply = <&vdd33a>;
+		reg-io-width = <4>;
+		smsc,save-mac-address;
+	};
 };
 
 &gpio1 {
diff --git a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
index 581247def0..89b20be38c 100644
--- a/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-35xx-devkit-u-boot.dtsi
@@ -15,6 +15,16 @@
 		/delete-property/ serial1;
 		/delete-property/ serial2;
 	};
+
+	ethernet@08000000 {
+		compatible = "smsc,lan9221","smsc,lan9115";
+		reg = <0x08000000 0xff>;
+		bank-width = <2>;
+		vddvario-supply = <&vddvario>;
+		vdd33a-supply = <&vdd33a>;
+		reg-io-width = <4>;
+		smsc,save-mac-address;
+	};
 };
 
 &gpio1 {
diff --git a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
index 9b709c147c..e56666e4bc 100644
--- a/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
+++ b/arch/arm/dts/logicpd-torpedo-37xx-devkit-u-boot.dtsi
@@ -11,6 +11,18 @@
 		/delete-property/ serial1;
 		/delete-property/ serial2;
 	};
+
+	ethernet@08000000 {
+		compatible = "smsc,lan9221","smsc,lan9115";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x08000000 0xff>;
+		bank-width = <2>;
+		vddvario-supply = <&vddvario>;
+		vdd33a-supply = <&vdd33a>;
+		reg-io-width = <4>;
+		smsc,save-mac-address;
+	};
 };
 
 &i2c1 {
diff --git a/arch/arm/dts/ls1021a-twr.dtsi b/arch/arm/dts/ls1021a-twr.dtsi
index 27c96f9540..bf96af7e36 100644
--- a/arch/arm/dts/ls1021a-twr.dtsi
+++ b/arch/arm/dts/ls1021a-twr.dtsi
@@ -24,14 +24,13 @@
 };
 
 &qspi {
-	bus-num = <0>;
 	status = "okay";
 
-	qflash0: n25q128a13@0 {
+	n25q128a130: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
-		spi-max-frequency = <20000000>;
+		spi-max-frequency = <50000000>;
 		reg = <0>;
 	};
 };
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index e419d9c44f..0eeec43ccc 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -169,14 +169,12 @@
 		};
 
 		qspi: quadspi@1550000 {
-			compatible = "fsl,vf610-qspi";
+			compatible = "fsl,ls1021a-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <0x1550000 0x10000>,
-				<0x40000000 0x4000000>;
+				<0x40000000 0x1000000>;
 			reg-names = "QuadSPI", "QuadSPI-memory";
-			num-cs = <2>;
-			big-endian;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
index c35158d7e9..484b40504d 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
@@ -5,3 +5,11 @@
  */
 
 #include "meson-gx-u-boot.dtsi"
+
+&usb0 {
+	status = "disabled";
+};
+
+&usb1 {
+	hnp-srp-disable;
+};
diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi
index c35158d7e9..474a3e1604 100644
--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi
@@ -4,4 +4,8 @@
  * Author: Neil Armstrong <narmstrong@baylibre.com>
  */
 
-#include "meson-gx-u-boot.dtsi"
+#include "meson-gxl-u-boot.dtsi"
+
+&dwc2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi
index c35158d7e9..474a3e1604 100644
--- a/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxl-s905d-libretech-pc-u-boot.dtsi
@@ -4,4 +4,8 @@
  * Author: Neil Armstrong <narmstrong@baylibre.com>
  */
 
-#include "meson-gx-u-boot.dtsi"
+#include "meson-gxl-u-boot.dtsi"
+
+&dwc2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi
index 39270ea71c..474a3e1604 100644
--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi
@@ -5,3 +5,7 @@
  */
 
 #include "meson-gxl-u-boot.dtsi"
+
+&dwc2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi
index bec9e05b09..7aecf2696b 100644
--- a/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxm-khadas-vim2-u-boot.dtsi
@@ -4,7 +4,7 @@
  * Author: Neil Armstrong <narmstrong@baylibre.com>
  */
 
-#include "meson-gx-u-boot.dtsi"
+#include "meson-gxl-u-boot.dtsi"
 
 / {
 	aliases {
@@ -12,6 +12,10 @@
 	};
 };
 
+&dwc2 {
+	status = "okay";
+};
+
 &sd_emmc_c {
 	status = "okay";
 	pinctrl-0 = <&emmc_pins>;
diff --git a/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi b/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi
index c35158d7e9..474a3e1604 100644
--- a/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxm-s912-libretech-pc-u-boot.dtsi
@@ -4,4 +4,8 @@
  * Author: Neil Armstrong <narmstrong@baylibre.com>
  */
 
-#include "meson-gx-u-boot.dtsi"
+#include "meson-gxl-u-boot.dtsi"
+
+&dwc2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi
index 81fd5be378..b5da4fdfc3 100644
--- a/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi
+++ b/arch/arm/dts/meson-khadas-vim3-u-boot.dtsi
@@ -4,6 +4,8 @@
  * Author: Neil Armstrong <narmstrong@baylibre.com>
  */
 
+#include "meson-g12-common-u-boot.dtsi"
+
 / {
 	aliases {
 		spi0 = &spifc;
diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts
index 687fe1c029..bf84f76344 100644
--- a/arch/arm/dts/mt7629-rfb.dts
+++ b/arch/arm/dts/mt7629-rfb.dts
@@ -82,6 +82,14 @@
 	status = "okay";
 };
 
+&xhci {
+	status = "okay";
+};
+
+&u3phy {
+	status = "okay";
+};
+
 &watchdog {
 	pinctrl-names = "default";
 	pinctrl-0 = <&watchdog_pins>;
diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi
index 644d2da4a8..6850e0058d 100644
--- a/arch/arm/dts/mt7629.dtsi
+++ b/arch/arm/dts/mt7629.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/mt7629-power.h>
 #include <dt-bindings/reset/mt7629-reset.h>
+#include <dt-bindings/phy/phy.h>
 #include "skeleton.dtsi"
 
 / {
@@ -222,6 +223,46 @@
 		#size-cells = <0>;
 	};
 
+	ssusbsys: ssusbsys@1a000000 {
+		compatible = "mediatek,mt7629-ssusbsys", "syscon";
+		reg = <0x1a000000 0x1000>;
+		#clock-cells = <1>;
+	};
+
+	xhci: usb@1a0c0000 {
+		compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
+		reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
+		reg-names = "mac", "ippc";
+		power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
+		clocks = <&ssusbsys CLK_SSUSB_SYS_EN>,
+			 <&ssusbsys CLK_SSUSB_REF_EN>,
+			 <&ssusbsys CLK_SSUSB_MCU_EN>,
+			 <&ssusbsys CLK_SSUSB_DMA_EN>;
+		clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+		phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+		status = "disabled";
+	};
+
+	u3phy: usb-phy@1a0c4000 {
+		compatible = "mediatek,mt7629-tphy", "mediatek,generic-tphy-v2";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x1a0c4000 0x1000>;
+		status = "disabled";
+
+		u2port0: usb-phy@0 {
+			reg = <0x0 0x0700>;
+			#phy-cells = <1>;
+			clocks = <&ssusbsys CLK_SSUSB_U2_PHY_EN>;
+			clock-names = "ref";
+		};
+
+		u3port0: usb-phy@700 {
+			reg = <0x0700 0x0700>;
+			#phy-cells = <1>;
+		};
+	};
+
 	ethsys: syscon@1b000000 {
 		compatible = "mediatek,mt7629-ethsys", "syscon";
 		reg = <0x1b000000 0x1000>;
diff --git a/arch/arm/dts/px30-evb-u-boot.dtsi b/arch/arm/dts/px30-evb-u-boot.dtsi
index a2a2c07dcc..61b1433af9 100644
--- a/arch/arm/dts/px30-evb-u-boot.dtsi
+++ b/arch/arm/dts/px30-evb-u-boot.dtsi
@@ -1,84 +1,10 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
  */
 
-/ {
-	aliases {
-		mmc0 = &emmc;
-		mmc1 = &sdmmc;
-	};
+#include "px30-u-boot.dtsi"
 
-	chosen {
-		u-boot,spl-boot-order = &emmc, &sdmmc;
-	};
-};
-
-&dmc {
-	u-boot,dm-pre-reloc;
-};
-
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-};
-
-&uart5 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-};
-
-&sdmmc {
-	u-boot,dm-pre-reloc;
-
-	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
-	u-boot,spl-fifo-mode;
-};
-
-&emmc {
-	u-boot,dm-pre-reloc;
-
-	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
-	u-boot,spl-fifo-mode;
-};
-
-&grf {
-	u-boot,dm-pre-reloc;
-};
-
-&pmugrf {
-	u-boot,dm-pre-reloc;
-};
-
-&xin24m {
-	u-boot,dm-pre-reloc;
-};
-
-&cru {
-	u-boot,dm-pre-reloc;
-};
-
-&pmucru {
-	u-boot,dm-pre-reloc;
-};
-
-&saradc {
-	u-boot,dm-pre-reloc;
+&rng {
 	status = "okay";
 };
-
-&gpio0 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio1 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio2 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
-	u-boot,dm-pre-reloc;
-};
diff --git a/arch/arm/dts/px30-evb.dts b/arch/arm/dts/px30-evb.dts
index d886f17242..4134e2ee13 100644
--- a/arch/arm/dts/px30-evb.dts
+++ b/arch/arm/dts/px30-evb.dts
@@ -8,7 +8,6 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/pinctrl/rockchip.h>
 #include "px30.dtsi"
-#include "px30-evb-u-boot.dtsi"
 
 / {
 	model = "Rockchip PX30 EVB";
diff --git a/arch/arm/dts/px30-firefly-u-boot.dtsi b/arch/arm/dts/px30-firefly-u-boot.dtsi
index bb782b4e2d..aea9f4d6e5 100644
--- a/arch/arm/dts/px30-firefly-u-boot.dtsi
+++ b/arch/arm/dts/px30-firefly-u-boot.dtsi
@@ -1,84 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2020 Rockchip Electronics Co., Ltd
  */
 
-/ {
-	aliases {
-		mmc0 = &emmc;
-		mmc1 = &sdmmc;
-	};
-
-	chosen {
-		u-boot,spl-boot-order = &emmc, &sdmmc;
-	};
-};
-
-&dmc {
-	u-boot,dm-pre-reloc;
-};
-
-&uart2 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-};
-
-&uart5 {
-	clock-frequency = <24000000>;
-	u-boot,dm-pre-reloc;
-};
-
-&sdmmc {
-	u-boot,dm-pre-reloc;
-
-	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
-	u-boot,spl-fifo-mode;
-};
-
-&emmc {
-	u-boot,dm-pre-reloc;
-
-	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
-	u-boot,spl-fifo-mode;
-};
-
-&grf {
-	u-boot,dm-pre-reloc;
-};
-
-&pmugrf {
-	u-boot,dm-pre-reloc;
-};
-
-&xin24m {
-	u-boot,dm-pre-reloc;
-};
-
-&cru {
-	u-boot,dm-pre-reloc;
-};
-
-&pmucru {
-	u-boot,dm-pre-reloc;
-};
-
-&saradc {
-	u-boot,dm-pre-reloc;
-	status = "okay";
-};
-
-&gpio0 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio1 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio2 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
-	u-boot,dm-pre-reloc;
-};
+#include "px30-u-boot.dtsi"
diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi
new file mode 100644
index 0000000000..029c8fbd8d
--- /dev/null
+++ b/arch/arm/dts/px30-u-boot.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+/ {
+	aliases {
+		mmc0 = &emmc;
+		mmc1 = &sdmmc;
+	};
+
+	chosen {
+		u-boot,spl-boot-order = &emmc, &sdmmc;
+	};
+
+	rng: rng@ff0b0000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0x0 0xff0b0000 0x0 0x4000>;
+		status = "disabled";
+	};
+};
+
+&dmc {
+	u-boot,dm-pre-reloc;
+};
+
+&uart2 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&uart5 {
+	clock-frequency = <24000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	u-boot,dm-pre-reloc;
+
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
+};
+
+&emmc {
+	u-boot,dm-pre-reloc;
+
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
+};
+
+&grf {
+	u-boot,dm-pre-reloc;
+};
+
+&pmugrf {
+	u-boot,dm-pre-reloc;
+};
+
+&xin24m {
+	u-boot,dm-pre-reloc;
+};
+
+&cru {
+	u-boot,dm-pre-reloc;
+};
+
+&pmucru {
+	u-boot,dm-pre-reloc;
+};
+
+&saradc {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&gpio0 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio2 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi
new file mode 100644
index 0000000000..8f4776e883
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-10g-0.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 10g port #0 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x10: port@90000 {
+		cell-index = <0x10>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x90000 0x1000>;
+		fsl,fman-10g-port;
+	};
+
+	fman0_tx_0x30: port@b0000 {
+		cell-index = <0x30>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xb0000 0x1000>;
+		fsl,fman-10g-port;
+	};
+
+	ethernet@f0000 {
+		cell-index = <0x8>;
+		compatible = "fsl,fman-memac";
+		reg = <0xf0000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
+		pcsphy-handle = <&pcsphy6>;
+		status = "disabled";
+	};
+
+	mdio@f1000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xf1000 0x1000>;
+
+		pcsphy6: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi
new file mode 100644
index 0000000000..b5eb22f6a9
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-10g-1.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 10g port #1 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x11: port@91000 {
+		cell-index = <0x11>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x91000 0x1000>;
+		fsl,fman-10g-port;
+	};
+
+	fman0_tx_0x31: port@b1000 {
+		cell-index = <0x31>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xb1000 0x1000>;
+		fsl,fman-10g-port;
+	};
+
+	ethernet@f2000 {
+		cell-index = <0x9>;
+		compatible = "fsl,fman-memac";
+		reg = <0xf2000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
+		pcsphy-handle = <&pcsphy7>;
+		status = "disabled";
+	};
+
+	mdio@f3000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xf3000 0x1000>;
+
+		pcsphy7: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi
new file mode 100644
index 0000000000..4264d47709
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-0.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #0 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x08: port@88000 {
+		cell-index = <0x8>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x88000 0x1000>;
+	};
+
+	fman0_tx_0x28: port@a8000 {
+		cell-index = <0x28>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xa8000 0x1000>;
+	};
+
+	ethernet@e0000 {
+		cell-index = <0>;
+		compatible = "fsl,fman-memac";
+		reg = <0xe0000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x08 &fman0_tx_0x28>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy0>;
+		status = "disabled";
+	};
+
+	mdio@e1000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xe1000 0x1000>;
+
+		pcsphy0: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi
new file mode 100644
index 0000000000..d60f8c77ac
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-1.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #1 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x09: port@89000 {
+		cell-index = <0x9>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x89000 0x1000>;
+	};
+
+	fman0_tx_0x29: port@a9000 {
+		cell-index = <0x29>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xa9000 0x1000>;
+	};
+
+	ethernet@e2000 {
+		cell-index = <1>;
+		compatible = "fsl,fman-memac";
+		reg = <0xe2000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy1>;
+		status = "disabled";
+	};
+
+	mdio@e3000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xe3000 0x1000>;
+
+		pcsphy1: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi
new file mode 100644
index 0000000000..7c5edc01dc
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-2.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #2 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x0a: port@8a000 {
+		cell-index = <0xa>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x8a000 0x1000>;
+	};
+
+	fman0_tx_0x2a: port@aa000 {
+		cell-index = <0x2a>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xaa000 0x1000>;
+	};
+
+	ethernet@e4000 {
+		cell-index = <2>;
+		compatible = "fsl,fman-memac";
+		reg = <0xe4000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy2>;
+		status = "disabled";
+	};
+
+	mdio@e5000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xe5000 0x1000>;
+
+		pcsphy2: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi
new file mode 100644
index 0000000000..2d2de58c52
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-3.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #3 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x0b: port@8b000 {
+		cell-index = <0xb>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x8b000 0x1000>;
+	};
+
+	fman0_tx_0x2b: port@ab000 {
+		cell-index = <0x2b>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xab000 0x1000>;
+	};
+
+	ethernet@e6000 {
+		cell-index = <3>;
+		compatible = "fsl,fman-memac";
+		reg = <0xe6000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy3>;
+		status = "disabled";
+	};
+
+	mdio@e7000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xe7000 0x1000>;
+
+		pcsphy3: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi
new file mode 100644
index 0000000000..f5a73dc733
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-4.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #4 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x0c: port@8c000 {
+		cell-index = <0xc>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x8c000 0x1000>;
+	};
+
+	fman0_tx_0x2c: port@ac000 {
+		cell-index = <0x2c>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xac000 0x1000>;
+	};
+
+	ethernet@e8000 {
+		cell-index = <4>;
+		compatible = "fsl,fman-memac";
+		reg = <0xe8000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy4>;
+		status = "disabled";
+	};
+
+	mdio@e9000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xe9000 0x1000>;
+
+		pcsphy4: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi
new file mode 100644
index 0000000000..baa5751191
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0-1g-5.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 1g port #5 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman@1a00000 {
+	fman0_rx_0x0d: port@8d000 {
+		cell-index = <0xd>;
+		compatible = "fsl,fman-v3-port-rx";
+		reg = <0x8d000 0x1000>;
+	};
+
+	fman0_tx_0x2d: port@ad000 {
+		cell-index = <0x2d>;
+		compatible = "fsl,fman-v3-port-tx";
+		reg = <0xad000 0x1000>;
+	};
+
+	ethernet@ea000 {
+		cell-index = <5>;
+		compatible = "fsl,fman-memac";
+		reg = <0xea000 0x1000>;
+		fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
+		ptp-timer = <&ptp_timer0>;
+		pcsphy-handle = <&pcsphy5>;
+		status = "disabled";
+	};
+
+	mdio@eb000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xeb000 0x1000>;
+
+		pcsphy5: ethernet-phy@0 {
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/arm/dts/qoriq-fman3-0.dtsi b/arch/arm/dts/qoriq-fman3-0.dtsi
new file mode 100644
index 0000000000..82fe796f4b
--- /dev/null
+++ b/arch/arm/dts/qoriq-fman3-0.dtsi
@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * QorIQ FMan v3 device tree
+ *
+ * Copyright 2012-2015 Freescale Semiconductor Inc.
+ * Copyright 2020 NXP
+ *
+ */
+
+fman0: fman@1a00000 {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	cell-index = <0>;
+	compatible = "fsl,fman";
+	ranges = <0x0 0x0 0x1a00000 0xfe000>;
+	reg = <0x0 0x1a00000 0x0 0xfe000>;
+	clocks = <&clockgen 3 0>;
+	clock-names = "fmanclk";
+	fsl,qman-channel-range = <0x800 0x10>;
+	ptimer-handle = <&ptp_timer0>;
+
+	muram@0 {
+		compatible = "fsl,fman-muram";
+		reg = <0x0 0x60000>;
+	};
+
+	fman0_oh_0x2: port@82000 {
+		cell-index = <0x2>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x82000 0x1000>;
+	};
+
+	fman0_oh_0x3: port@83000 {
+		cell-index = <0x3>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x83000 0x1000>;
+	};
+
+	fman0_oh_0x4: port@84000 {
+		cell-index = <0x4>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x84000 0x1000>;
+	};
+
+	fman0_oh_0x5: port@85000 {
+		cell-index = <0x5>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x85000 0x1000>;
+	};
+
+	fman0_oh_0x6: port@86000 {
+		cell-index = <0x6>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x86000 0x1000>;
+	};
+
+	fman0_oh_0x7: port@87000 {
+		cell-index = <0x7>;
+		compatible = "fsl,fman-v3-port-oh";
+		reg = <0x87000 0x1000>;
+	};
+
+	mdio0: mdio@fc000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xfc000 0x1000>;
+	};
+
+	xmdio0: mdio@fd000 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
+		reg = <0xfd000 0x1000>;
+	};
+};
+
+ptp_timer0: ptp-timer@1afe000 {
+	compatible = "fsl,fman-ptp-timer";
+	reg = <0x0 0x1afe000 0x0 0x1000>;
+	clocks = <&clockgen 3 0>;
+};
diff --git a/arch/arm/dts/r8a7790-lager.dts b/arch/arm/dts/r8a7790-lager.dts
index 7b9508e83d..097fd9317c 100644
--- a/arch/arm/dts/r8a7790-lager.dts
+++ b/arch/arm/dts/r8a7790-lager.dts
@@ -56,7 +56,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -150,8 +150,7 @@
 
 		gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi2: regulator-vcc-sdhi2 {
@@ -174,8 +173,7 @@
 
 		gpios = <&gpio5 30 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	audio_clock: audio_clock {
@@ -325,10 +323,10 @@
 		#size-cells = <0>;
 	};
 
-        /*
-         * IIC2 and I2C2 may be switched using pinmux.
-         * A fallback to GPIO is also provided.
-         */
+	/*
+	 * IIC2 and I2C2 may be switched using pinmux.
+	 * A fallback to GPIO is also provided.
+	 */
 	i2chdmi: i2c-12 {
 		compatible = "i2c-demux-pinctrl";
 		i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
@@ -423,6 +421,8 @@
 	 */
 	i2cpwr: i2c-13 {
 		compatible = "i2c-demux-pinctrl";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_irq_pins>;
 		i2c-parent = <&iic3>, <&i2c3>;
 		i2c-bus-name = "i2c-pwr";
 		#address-cells = <1>;
@@ -615,6 +615,11 @@
 		function = "iic3";
 	};
 
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
+
 	hsusb_pins: hsusb {
 		groups = "usb0_ovc_vbus";
 		function = "usb0";
diff --git a/arch/arm/dts/r8a7790-stout.dts b/arch/arm/dts/r8a7790-stout.dts
index 7a7d3b84d1..a315ba749a 100644
--- a/arch/arm/dts/r8a7790-stout.dts
+++ b/arch/arm/dts/r8a7790-stout.dts
@@ -19,7 +19,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -179,6 +179,11 @@
 		function = "iic3";
 	};
 
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
+
 	usb0_pins: usb0 {
 		groups = "usb0";
 		function = "usb0";
@@ -317,7 +322,7 @@
 
 &iic3 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&iic3_pins>;
+	pinctrl-0 = <&iic3_pins &pmic_irq_pins>;
 	status = "okay";
 
 	pmic@58 {
diff --git a/arch/arm/dts/r8a7790.dtsi b/arch/arm/dts/r8a7790.dtsi
index 5a2747758f..334ba19769 100644
--- a/arch/arm/dts/r8a7790.dtsi
+++ b/arch/arm/dts/r8a7790.dtsi
@@ -487,6 +487,9 @@
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0xe63a0000 0x12000>;
 		};
 
 		icram1:	sram@e63c0000 {
@@ -669,8 +672,8 @@
 			compatible = "renesas,r8a7790-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
@@ -683,8 +686,8 @@
 			compatible = "renesas,r8a7790-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
@@ -697,22 +700,22 @@
 			compatible = "renesas,dmac-r8a7790",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
-			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -730,22 +733,22 @@
 			compatible = "renesas,dmac-r8a7790",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6720000 0 0x20000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1300,20 +1303,20 @@
 			compatible = "renesas,dmac-r8a7790",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1331,20 +1334,20 @@
 			compatible = "renesas,dmac-r8a7790",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1388,10 +1391,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x800 0 0 0 0>;
@@ -1423,10 +1426,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
 		pci2: pci@ee0d0000 {
@@ -1446,10 +1449,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x20800 0 0 0 0>;
@@ -1614,13 +1617,13 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
-			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
-				      0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
+			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
+				     <0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/r8a7791-koelsch.dts b/arch/arm/dts/r8a7791-koelsch.dts
index e6580aa0ce..2b096d5e06 100644
--- a/arch/arm/dts/r8a7791-koelsch.dts
+++ b/arch/arm/dts/r8a7791-koelsch.dts
@@ -56,7 +56,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -193,8 +193,7 @@
 
 		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi1: regulator-vcc-sdhi1 {
@@ -217,8 +216,7 @@
 
 		gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi2: regulator-vcc-sdhi2 {
@@ -241,8 +239,7 @@
 
 		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	audio_clock: audio_clock {
@@ -540,6 +537,11 @@
 		function = "intc";
 	};
 
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
+
 	sdhi0_pins: sd0 {
 		groups = "sdhi0_data4", "sdhi0_ctrl";
 		function = "sdhi0";
@@ -776,6 +778,8 @@
 };
 
 &i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_irq_pins>;
 	status = "okay";
 	clock-frequency = <100000>;
 
diff --git a/arch/arm/dts/r8a7791-porter.dts b/arch/arm/dts/r8a7791-porter.dts
index fefdf8238b..f9ece7ab20 100644
--- a/arch/arm/dts/r8a7791-porter.dts
+++ b/arch/arm/dts/r8a7791-porter.dts
@@ -31,7 +31,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -63,8 +63,7 @@
 
 		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi2: regulator-vcc-sdhi2 {
@@ -85,8 +84,7 @@
 
 		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	hdmi-out {
@@ -228,6 +226,11 @@
 		function = "intc";
 	};
 
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
+
 	sdhi0_pins: sd0 {
 		groups = "sdhi0_data4", "sdhi0_ctrl";
 		function = "sdhi0";
@@ -373,6 +376,8 @@
 };
 
 &i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_irq_pins>;
 	status = "okay";
 	clock-frequency = <100000>;
 
diff --git a/arch/arm/dts/r8a7791.dtsi b/arch/arm/dts/r8a7791.dtsi
index 6f87550245..59a55e87fc 100644
--- a/arch/arm/dts/r8a7791.dtsi
+++ b/arch/arm/dts/r8a7791.dtsi
@@ -420,6 +420,9 @@
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0xe63a0000 0x12000>;
 		};
 
 		icram1:	sram@e63c0000 {
@@ -618,8 +621,8 @@
 			compatible = "renesas,r8a7791-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
@@ -632,8 +635,8 @@
 			compatible = "renesas,r8a7791-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
@@ -646,22 +649,22 @@
 			compatible = "renesas,dmac-r8a7791",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
-			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -679,22 +682,22 @@
 			compatible = "renesas,dmac-r8a7791",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6720000 0 0x20000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1338,20 +1341,20 @@
 			compatible = "renesas,dmac-r8a7791",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1369,20 +1372,20 @@
 			compatible = "renesas,dmac-r8a7791",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1426,10 +1429,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x800 0 0 0 0>;
@@ -1461,10 +1464,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x10800 0 0 0 0>;
@@ -1598,13 +1601,13 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
-			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
-				      0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
+			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
+				     <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/dts/r8a7792-blanche.dts b/arch/arm/dts/r8a7792-blanche.dts
index f92301290b..248eb717eb 100644
--- a/arch/arm/dts/r8a7792-blanche.dts
+++ b/arch/arm/dts/r8a7792-blanche.dts
@@ -21,7 +21,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -234,6 +234,11 @@
 		groups = "du1_rgb666", "du1_sync", "du1_disp";
 		function = "du1";
 	};
+
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
 };
 
 &rwdt {
@@ -308,6 +313,28 @@
 	};
 };
 
+&iic3 {
+	status = "okay";
+
+	pmic@58 {
+		compatible = "dlg,da9063";
+		reg = <0x58>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_irq_pins>;
+		interrupt-parent = <&irqc>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+
+		rtc {
+			compatible = "dlg,da9063-rtc";
+		};
+
+		wdt {
+			compatible = "dlg,da9063-watchdog";
+		};
+	};
+};
+
 &du {
 	pinctrl-0 = <&du0_pins &du1_pins>;
 	pinctrl-names = "default";
diff --git a/arch/arm/dts/r8a7792.dtsi b/arch/arm/dts/r8a7792.dtsi
index 6fd80e3541..39af16caa2 100644
--- a/arch/arm/dts/r8a7792.dtsi
+++ b/arch/arm/dts/r8a7792.dtsi
@@ -22,6 +22,7 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		i2c6 = &iic3;
 		spi0 = &qspi;
 		spi1 = &msiof0;
 		spi2 = &msiof1;
@@ -344,6 +345,9 @@
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0xe63a0000 0x12000>;
 		};
 
 		icram1:	sram@e63c0000 {
@@ -465,22 +469,22 @@
 			compatible = "renesas,dmac-r8a7792",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
-			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -498,22 +502,22 @@
 			compatible = "renesas,dmac-r8a7792",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6720000 0 0x20000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -874,6 +878,40 @@
 			compatible = "renesas,prr";
 			reg = <0 0xff000044 0 4>;
 		};
+
+		cmt0: timer@ffca0000 {
+			compatible = "renesas,r8a7792-cmt0",
+				     "renesas,rcar-gen2-cmt0";
+			reg = <0 0xffca0000 0 0x1004>;
+			interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 124>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 124>;
+
+			status = "disabled";
+		};
+
+		cmt1: timer@e6130000 {
+			compatible = "renesas,r8a7792-cmt1",
+				     "renesas,rcar-gen2-cmt1";
+			reg = <0 0xe6130000 0 0x1004>;
+			interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 329>;
+			clock-names = "fck";
+			power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
+			resets = <&cpg 329>;
+
+			status = "disabled";
+		};
 	};
 
 	timer {
diff --git a/arch/arm/dts/r8a7793-gose.dts b/arch/arm/dts/r8a7793-gose.dts
index f51601af89..22ca7cd1e7 100644
--- a/arch/arm/dts/r8a7793-gose.dts
+++ b/arch/arm/dts/r8a7793-gose.dts
@@ -52,7 +52,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -65,81 +65,81 @@
 		compatible = "gpio-keys";
 
 		key-1 {
-		        gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_1>;
-		        label = "SW2-1";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_1>;
+			label = "SW2-1";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-2 {
-		        gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_2>;
-		        label = "SW2-2";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_2>;
+			label = "SW2-2";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-3 {
-		        gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_3>;
-		        label = "SW2-3";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_3>;
+			label = "SW2-3";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-4 {
-		        gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_4>;
-		        label = "SW2-4";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_4>;
+			label = "SW2-4";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-a {
-		        gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_A>;
-		        label = "SW30";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_A>;
+			label = "SW30";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-b {
-		        gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_B>;
-		        label = "SW31";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_B>;
+			label = "SW31";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-c {
-		        gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_C>;
-		        label = "SW32";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_C>;
+			label = "SW32";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-d {
-		        gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_D>;
-		        label = "SW33";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_D>;
+			label = "SW33";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-e {
-		        gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_E>;
-		        label = "SW34";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_E>;
+			label = "SW34";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-f {
-		        gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_F>;
-		        label = "SW35";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_F>;
+			label = "SW35";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 		key-g {
-		        gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
-		        linux,code = <KEY_G>;
-		        label = "SW36";
-		        wakeup-source;
-		        debounce-interval = <20>;
+			gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_G>;
+			label = "SW36";
+			wakeup-source;
+			debounce-interval = <20>;
 		};
 	};
 
@@ -179,8 +179,7 @@
 
 		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi1: regulator-vcc-sdhi1 {
@@ -203,8 +202,7 @@
 
 		gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi2: regulator-vcc-sdhi2 {
@@ -227,8 +225,7 @@
 
 		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	audio_clock: audio_clock {
@@ -514,6 +511,11 @@
 		function = "intc";
 	};
 
+	pmic_irq_pins: pmicirq {
+		groups = "intc_irq2";
+		function = "intc";
+	};
+
 	sdhi0_pins: sd0 {
 		groups = "sdhi0_data4", "sdhi0_ctrl";
 		function = "sdhi0";
@@ -711,6 +713,8 @@
 };
 
 &i2c6 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_irq_pins>;
 	status = "okay";
 	clock-frequency = <100000>;
 
diff --git a/arch/arm/dts/r8a7793.dtsi b/arch/arm/dts/r8a7793.dtsi
index bf05110fac..eef035c4d9 100644
--- a/arch/arm/dts/r8a7793.dtsi
+++ b/arch/arm/dts/r8a7793.dtsi
@@ -406,6 +406,9 @@
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0xe63a0000 0x12000>;
 		};
 
 		icram1:	sram@e63c0000 {
@@ -565,22 +568,22 @@
 			compatible = "renesas,dmac-r8a7793",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
-			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -598,22 +601,22 @@
 			compatible = "renesas,dmac-r8a7793",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6720000 0 0x20000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1166,20 +1169,20 @@
 			compatible = "renesas,dmac-r8a7793",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1197,20 +1200,20 @@
 			compatible = "renesas,dmac-r8a7793",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
diff --git a/arch/arm/dts/r8a7794-alt.dts b/arch/arm/dts/r8a7794-alt.dts
index ef7e2a837d..f79fce74cd 100644
--- a/arch/arm/dts/r8a7794-alt.dts
+++ b/arch/arm/dts/r8a7794-alt.dts
@@ -22,7 +22,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -60,8 +60,7 @@
 
 		gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi1: regulator-vcc-sdhi1 {
@@ -84,8 +83,7 @@
 
 		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	lbsc {
@@ -199,6 +197,22 @@
 	};
 };
 
+&pci0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&pci1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&usbphy {
+	status = "okay";
+};
+
 &du {
 	pinctrl-0 = <&du_pins>;
 	pinctrl-names = "default";
@@ -293,6 +307,16 @@
 		function = "sdhi1";
 		power-source = <1800>;
 	};
+
+	usb0_pins: usb0 {
+		groups = "usb0";
+		function = "usb0";
+	};
+
+	usb1_pins: usb1 {
+		groups = "usb1";
+		function = "usb1";
+	};
 };
 
 &cmt0 {
@@ -377,6 +401,27 @@
 	pinctrl-names = "i2c-exio4";
 };
 
+&i2c7 {
+	status = "okay";
+	clock-frequency = <100000>;
+
+	pmic@58 {
+		compatible = "dlg,da9063";
+		reg = <0x58>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-controller;
+
+		rtc {
+			compatible = "dlg,da9063-rtc";
+		};
+
+		wdt {
+			compatible = "dlg,da9063-watchdog";
+		};
+	};
+};
+
 &vin0 {
 	status = "okay";
 	pinctrl-0 = <&vin0_pins>;
diff --git a/arch/arm/dts/r8a7794-silk.dts b/arch/arm/dts/r8a7794-silk.dts
index 60e91ebfa6..2c16ad8543 100644
--- a/arch/arm/dts/r8a7794-silk.dts
+++ b/arch/arm/dts/r8a7794-silk.dts
@@ -34,7 +34,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -126,8 +126,7 @@
 
 		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vga-encoder {
diff --git a/arch/arm/dts/r8a7794.dtsi b/arch/arm/dts/r8a7794.dtsi
index 8d797d3481..05ef79c6ed 100644
--- a/arch/arm/dts/r8a7794.dtsi
+++ b/arch/arm/dts/r8a7794.dtsi
@@ -351,6 +351,9 @@
 		icram0:	sram@e63a0000 {
 			compatible = "mmio-sram";
 			reg = <0 0xe63a0000 0 0x12000>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0 0xe63a0000 0x12000>;
 		};
 
 		icram1:	sram@e63c0000 {
@@ -527,22 +530,22 @@
 			compatible = "renesas,dmac-r8a7794",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x20000>;
-			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -560,22 +563,22 @@
 			compatible = "renesas,dmac-r8a7794",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6720000 0 0x20000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1132,20 +1135,20 @@
 			compatible = "renesas,dmac-r8a7794",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3", "ch4",
 					  "ch5", "ch6", "ch7", "ch8", "ch9",
@@ -1176,10 +1179,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x800 0 0 0 0>;
@@ -1211,10 +1214,10 @@
 			#size-cells = <2>;
 			#interrupt-cells = <1>;
 			ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
-			interrupt-map-mask = <0xff00 0 0 0x7>;
-			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
-					 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map-mask = <0xf800 0 0 0x7>;
+			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+					<0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 
 			usb@1,0 {
 				reg = <0x10800 0 0 0 0>;
diff --git a/arch/arm/dts/r8a7795-u-boot.dtsi b/arch/arm/dts/r8a7795-u-boot.dtsi
deleted file mode 100644
index 3f4b1f5acc..0000000000
--- a/arch/arm/dts/r8a7795-u-boot.dtsi
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on RCar R8A7795 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&extalr_clk {
-	u-boot,dm-pre-reloc;
-};
-
-/ {
-	soc {
-		rpc: rpc@0xee200000 {
-			compatible = "renesas,rpc-r8a7795", "renesas,rpc";
-			reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
-			clocks = <&cpg CPG_MOD 917>;
-			bank-width = <2>;
-			status = "disabled";
-		};
-	};
-};
diff --git a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts
index 2a7b149894..e039e33d59 100644
--- a/arch/arm/dts/r8a7796-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77950-salvator-x-u-boot.dts
@@ -5,8 +5,8 @@
  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
  */
 
-#include "r8a7796-salvator-x.dts"
-#include "r8a7796-u-boot.dtsi"
+#include "r8a77950-salvator-x.dts"
+#include "r8a77950-u-boot.dtsi"
 
 &sdhi0 {
 	sd-uhs-sdr12;
@@ -16,6 +16,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 };
diff --git a/arch/arm/dts/r8a7795-salvator-x.dts b/arch/arm/dts/r8a77950-salvator-x.dts
index d2d48b33b3..2438825c9b 100644
--- a/arch/arm/dts/r8a7795-salvator-x.dts
+++ b/arch/arm/dts/r8a77950-salvator-x.dts
@@ -1,16 +1,16 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the Salvator-X board with R-Car H3 ES2.0
+ * Device Tree Source for the Salvator-X board with R-Car H3 ES1.x
  *
  * Copyright (C) 2015 Renesas Electronics Corp.
  */
 
 /dts-v1/;
-#include "r8a7795.dtsi"
+#include "r8a77950.dtsi"
 #include "salvator-x.dtsi"
 
 / {
-	model = "Renesas Salvator-X board based on r8a7795 ES2.0+";
+	model = "Renesas Salvator-X board based on r8a77950";
 	compatible = "renesas,salvator-x", "renesas,r8a7795";
 
 	memory@48000000 {
@@ -52,12 +52,6 @@
 	status = "okay";
 };
 
-&sound_card {
-	dais = <&rsnd_port0	/* ak4613 */
-		&rsnd_port1	/* HDMI0  */
-		&rsnd_port2>;	/* HDMI1  */
-};
-
 &hdmi0 {
 	status = "okay";
 
@@ -108,6 +102,13 @@
 	status = "okay";
 };
 
+&pfc {
+	usb2_pins: usb2 {
+		groups = "usb2";
+		function = "usb2";
+	};
+};
+
 &rcar_sound {
 	ports {
 		/* rsnd_port0 is on salvator-common */
@@ -138,17 +139,16 @@
 	};
 };
 
-&pfc {
-	usb2_pins: usb2 {
-		groups = "usb2";
-		function = "usb2";
-	};
-};
-
 &sata {
 	status = "okay";
 };
 
+&sound_card {
+	dais = <&rsnd_port0	/* ak4613 */
+		&rsnd_port1	/* HDMI0  */
+		&rsnd_port2>;	/* HDMI1  */
+};
+
 &usb2_phy2 {
 	pinctrl-0 = <&usb2_pins>;
 	pinctrl-names = "default";
diff --git a/arch/arm/dts/r8a77950-u-boot.dtsi b/arch/arm/dts/r8a77950-u-boot.dtsi
new file mode 100644
index 0000000000..0317f47f0f
--- /dev/null
+++ b/arch/arm/dts/r8a77950-u-boot.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RCar R8A7795 SoC
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+	u-boot,dm-pre-reloc;
+};
+
+/ {
+	soc {
+		rpc: rpc@0xee200000 {
+			compatible = "renesas,rpc-r8a7795", "renesas,rpc";
+			reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+			clocks = <&cpg CPG_MOD 917>;
+			bank-width = <2>;
+			status = "disabled";
+		};
+	};
+};
+
+/delete-node/ &ak4613;
+/delete-node/ &audma0;
+/delete-node/ &audma1;
+/delete-node/ &can0;
+/delete-node/ &can1;
+/delete-node/ &canfd;
+/delete-node/ &csi20;
+/delete-node/ &csi21;
+/delete-node/ &csi40;
+/delete-node/ &csi41;
+/delete-node/ &drif00;
+/delete-node/ &drif01;
+/delete-node/ &drif10;
+/delete-node/ &drif11;
+/delete-node/ &drif20;
+/delete-node/ &drif21;
+/delete-node/ &drif30;
+/delete-node/ &drif31;
+/delete-node/ &du;
+/delete-node/ &fcpf0;
+/delete-node/ &fcpf1;
+/delete-node/ &fcpf2;
+/delete-node/ &fcpvb0;
+/delete-node/ &fcpvb1;
+/delete-node/ &fcpvd0;
+/delete-node/ &fcpvd1;
+/delete-node/ &fcpvd2;
+/delete-node/ &fcpvd3;
+/delete-node/ &fcpvi0;
+/delete-node/ &fcpvi1;
+/delete-node/ &fcpvi2;
+/delete-node/ &hdmi0;
+/delete-node/ &hdmi1;
+/delete-node/ &lvds0;
+/delete-node/ &rcar_sound;
+/delete-node/ &sound_card;
+/delete-node/ &vin0;
+/delete-node/ &vin1;
+/delete-node/ &vin2;
+/delete-node/ &vin3;
+/delete-node/ &vin4;
+/delete-node/ &vin5;
+/delete-node/ &vin6;
+/delete-node/ &vin7;
+/delete-node/ &vspbc;
+/delete-node/ &vspbd;
+/delete-node/ &vspd0;
+/delete-node/ &vspd1;
+/delete-node/ &vspd2;
+/delete-node/ &vspd3;
+/delete-node/ &vspi0;
+/delete-node/ &vspi1;
+/delete-node/ &vspi2;
+
+/ {
+	/delete-node/ cvbs-in;
+	/delete-node/ hdmi-in;
+	/delete-node/ hdmi0-out;
+	/delete-node/ hdmi1-out;
+	/delete-node/ vga-encoder;
+	/delete-node/ vga;
+};
+
+&i2c4 {
+	/delete-node/ video-receiver@70;
+};
+
+&soc {
+	/delete-node/ fdp1@fe940000;
+	/delete-node/ fdp1@fe944000;
+	/delete-node/ fdp1@fe948000;
+	/delete-node/ imr-lx4@fe860000;
+	/delete-node/ imr-lx4@fe870000;
+	/delete-node/ imr-lx4@fe880000;
+	/delete-node/ imr-lx4@fe890000;
+};
diff --git a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts b/arch/arm/dts/r8a77950-ulcb-u-boot.dts
index ef1c57f672..b7f26c11b1 100644
--- a/arch/arm/dts/r8a7795-h3ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77950-ulcb-u-boot.dts
@@ -5,8 +5,8 @@
  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
  */
 
-#include "r8a7795-h3ulcb.dts"
-#include "r8a7795-u-boot.dtsi"
+#include "r8a77950-ulcb.dts"
+#include "r8a77950-u-boot.dtsi"
 
 / {
 	cpld {
@@ -27,6 +27,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 };
diff --git a/arch/arm/dts/r8a7795-h3ulcb.dts b/arch/arm/dts/r8a77950-ulcb.dts
index 54515eaf03..38a6d6a108 100644
--- a/arch/arm/dts/r8a7795-h3ulcb.dts
+++ b/arch/arm/dts/r8a77950-ulcb.dts
@@ -7,11 +7,11 @@
  */
 
 /dts-v1/;
-#include "r8a7795.dtsi"
+#include "r8a77950.dtsi"
 #include "ulcb.dtsi"
 
 / {
-	model = "Renesas H3ULCB board based on r8a7795 ES2.0+";
+	model = "Renesas H3ULCB board based on r8a77950";
 	compatible = "renesas,h3ulcb", "renesas,r8a7795";
 
 	memory@48000000 {
@@ -35,16 +35,3 @@
 		reg = <0x7 0x00000000 0x0 0x40000000>;
 	};
 };
-
-&du {
-	clocks = <&cpg CPG_MOD 724>,
-		 <&cpg CPG_MOD 723>,
-		 <&cpg CPG_MOD 722>,
-		 <&cpg CPG_MOD 721>,
-		 <&versaclock5 1>,
-		 <&versaclock5 3>,
-		 <&versaclock5 4>,
-		 <&versaclock5 2>;
-	clock-names = "du.0", "du.1", "du.2", "du.3",
-		      "dclkin.0", "dclkin.1", "dclkin.2", "dclkin.3";
-};
diff --git a/arch/arm/dts/r8a77950.dtsi b/arch/arm/dts/r8a77950.dtsi
new file mode 100644
index 0000000000..15216495e1
--- /dev/null
+++ b/arch/arm/dts/r8a77950.dtsi
@@ -0,0 +1,319 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car H3 (R8A77950) SoC
+ *
+ * Copyright (C) 2015 Renesas Electronics Corp.
+ */
+
+#include "r8a77951.dtsi"
+
+&audma0 {
+	iommus = <&ipmmu_mp1 0>, <&ipmmu_mp1 1>,
+	       <&ipmmu_mp1 2>, <&ipmmu_mp1 3>,
+	       <&ipmmu_mp1 4>, <&ipmmu_mp1 5>,
+	       <&ipmmu_mp1 6>, <&ipmmu_mp1 7>,
+	       <&ipmmu_mp1 8>, <&ipmmu_mp1 9>,
+	       <&ipmmu_mp1 10>, <&ipmmu_mp1 11>,
+	       <&ipmmu_mp1 12>, <&ipmmu_mp1 13>,
+	       <&ipmmu_mp1 14>, <&ipmmu_mp1 15>;
+};
+
+&audma1 {
+	iommus = <&ipmmu_mp1 16>, <&ipmmu_mp1 17>,
+	       <&ipmmu_mp1 18>, <&ipmmu_mp1 19>,
+	       <&ipmmu_mp1 20>, <&ipmmu_mp1 21>,
+	       <&ipmmu_mp1 22>, <&ipmmu_mp1 23>,
+	       <&ipmmu_mp1 24>, <&ipmmu_mp1 25>,
+	       <&ipmmu_mp1 26>, <&ipmmu_mp1 27>,
+	       <&ipmmu_mp1 28>, <&ipmmu_mp1 29>,
+	       <&ipmmu_mp1 30>, <&ipmmu_mp1 31>;
+};
+
+&du {
+	vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd3 0>;
+};
+
+&fcpvb1 {
+	iommus = <&ipmmu_vp0 7>;
+};
+
+&fcpf1 {
+	iommus = <&ipmmu_vp0 1>;
+};
+
+&fcpvi1 {
+	iommus = <&ipmmu_vp0 9>;
+};
+
+&fcpvd2 {
+	iommus = <&ipmmu_vi0 10>;
+};
+
+&gpio1 {
+	gpio-ranges = <&pfc 0 32 28>;
+};
+
+&ipmmu_vi0 {
+	renesas,ipmmu-main = <&ipmmu_mm 11>;
+};
+
+&ipmmu_vp0 {
+	renesas,ipmmu-main = <&ipmmu_mm 12>;
+};
+
+&ipmmu_vc0 {
+	renesas,ipmmu-main = <&ipmmu_mm 9>;
+};
+
+&ipmmu_vc1 {
+	renesas,ipmmu-main = <&ipmmu_mm 10>;
+};
+
+&ipmmu_rt {
+	renesas,ipmmu-main = <&ipmmu_mm 7>;
+};
+
+&soc {
+	/delete-node/ dma-controller@e6460000;
+	/delete-node/ dma-controller@e6470000;
+
+	ipmmu_mp1: mmu@ec680000 {
+		compatible = "renesas,ipmmu-r8a7795";
+		reg = <0 0xec680000 0 0x1000>;
+		renesas,ipmmu-main = <&ipmmu_mm 5>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		#iommu-cells = <1>;
+	};
+
+	ipmmu_sy: mmu@e7730000 {
+		compatible = "renesas,ipmmu-r8a7795";
+		reg = <0 0xe7730000 0 0x1000>;
+		renesas,ipmmu-main = <&ipmmu_mm 8>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		#iommu-cells = <1>;
+	};
+
+	/delete-node/ mmu@fd950000;
+	/delete-node/ mmu@fd960000;
+	/delete-node/ mmu@fd970000;
+	/delete-node/ mmu@febe0000;
+	/delete-node/ mmu@fe980000;
+
+	xhci1: usb@ee040000 {
+		compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
+		reg = <0 0xee040000 0 0xc00>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD 327>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		resets = <&cpg 327>;
+		status = "disabled";
+	};
+
+	/delete-node/ usb@e659c000;
+	/delete-node/ usb@ee0e0000;
+	/delete-node/ usb@ee0e0100;
+
+	/delete-node/ usb-phy@ee0e0200;
+
+	fdp1@fe948000 {
+		compatible = "renesas,fdp1";
+		reg = <0 0xfe948000 0 0x2400>;
+		interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD 117>;
+		power-domains = <&sysc R8A7795_PD_A3VP>;
+		resets = <&cpg 117>;
+		renesas,fcp = <&fcpf2>;
+	};
+
+	fcpf2: fcp@fe952000 {
+		compatible = "renesas,fcpf";
+		reg = <0 0xfe952000 0 0x200>;
+		clocks = <&cpg CPG_MOD 613>;
+		power-domains = <&sysc R8A7795_PD_A3VP>;
+		resets = <&cpg 613>;
+		iommus = <&ipmmu_vp0 2>;
+	};
+
+	fcpvd3: fcp@fea3f000 {
+		compatible = "renesas,fcpv";
+		reg = <0 0xfea3f000 0 0x200>;
+		clocks = <&cpg CPG_MOD 600>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		resets = <&cpg 600>;
+		iommus = <&ipmmu_vi0 11>;
+	};
+
+	fcpvi2: fcp@fe9cf000 {
+		compatible = "renesas,fcpv";
+		reg = <0 0xfe9cf000 0 0x200>;
+		clocks = <&cpg CPG_MOD 609>;
+		power-domains = <&sysc R8A7795_PD_A3VP>;
+		resets = <&cpg 609>;
+		iommus = <&ipmmu_vp0 10>;
+	};
+
+	vspd3: vsp@fea38000 {
+		compatible = "renesas,vsp2";
+		reg = <0 0xfea38000 0 0x5000>;
+		interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD 620>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		resets = <&cpg 620>;
+
+		renesas,fcp = <&fcpvd3>;
+	};
+
+	vspi2: vsp@fe9c0000 {
+		compatible = "renesas,vsp2";
+		reg = <0 0xfe9c0000 0 0x8000>;
+		interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD 629>;
+		power-domains = <&sysc R8A7795_PD_A3VP>;
+		resets = <&cpg 629>;
+
+		renesas,fcp = <&fcpvi2>;
+	};
+
+	csi21: csi2@fea90000 {
+		compatible = "renesas,r8a7795-csi2";
+		reg = <0 0xfea90000 0 0x10000>;
+		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cpg CPG_MOD 713>;
+		power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		resets = <&cpg 713>;
+		status = "disabled";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@1 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				reg = <1>;
+
+				csi21vin0: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&vin0csi21>;
+				};
+				csi21vin1: endpoint@1 {
+					reg = <1>;
+					remote-endpoint = <&vin1csi21>;
+				};
+				csi21vin2: endpoint@2 {
+					reg = <2>;
+					remote-endpoint = <&vin2csi21>;
+				};
+				csi21vin3: endpoint@3 {
+					reg = <3>;
+					remote-endpoint = <&vin3csi21>;
+				};
+				csi21vin4: endpoint@4 {
+					reg = <4>;
+					remote-endpoint = <&vin4csi21>;
+				};
+				csi21vin5: endpoint@5 {
+					reg = <5>;
+					remote-endpoint = <&vin5csi21>;
+				};
+				csi21vin6: endpoint@6 {
+					reg = <6>;
+					remote-endpoint = <&vin6csi21>;
+				};
+				csi21vin7: endpoint@7 {
+					reg = <7>;
+					remote-endpoint = <&vin7csi21>;
+				};
+			};
+		};
+	};
+};
+
+&vin0 {
+	ports {
+		port@1 {
+			vin0csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin0>;
+			};
+		};
+	};
+};
+
+&vin1 {
+	ports {
+		port@1 {
+			vin1csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin1>;
+			};
+		};
+	};
+};
+
+&vin2 {
+	ports {
+		port@1 {
+			vin2csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin2>;
+			};
+		};
+	};
+};
+
+&vin3 {
+	ports {
+		port@1 {
+			vin3csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin3>;
+			};
+		};
+	};
+};
+
+&vin4 {
+	ports {
+		port@1 {
+			vin4csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin4>;
+			};
+		};
+	};
+};
+
+&vin5 {
+	ports {
+		port@1 {
+			vin5csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin5>;
+			};
+		};
+	};
+};
+
+&vin6 {
+	ports {
+		port@1 {
+			vin6csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin6>;
+			};
+		};
+	};
+};
+
+&vin7 {
+	ports {
+		port@1 {
+			vin7csi21: endpoint@1 {
+				reg = <1>;
+				remote-endpoint = <&csi21vin7>;
+			};
+		};
+	};
+};
diff --git a/arch/arm/dts/r8a7795.dtsi b/arch/arm/dts/r8a77951.dtsi
index 097538cc4b..a8729eb744 100644
--- a/arch/arm/dts/r8a7795.dtsi
+++ b/arch/arm/dts/r8a77951.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Device Tree Source for the R-Car H3 (R8A77950) SoC
+ * Device Tree Source for the R-Car H3 (R8A77951) SoC
  *
  * Copyright (C) 2015 Renesas Electronics Corp.
  */
@@ -155,6 +155,8 @@
 			power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
+			dynamic-power-coefficient = <854>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -168,6 +170,7 @@
 			power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -181,6 +184,7 @@
 			power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -194,6 +198,7 @@
 			power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -207,6 +212,9 @@
 			power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			#cooling-cells = <2>;
+			dynamic-power-coefficient = <277>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -219,6 +227,7 @@
 			power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -231,6 +240,7 @@
 			power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -243,6 +253,7 @@
 			power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -261,6 +272,28 @@
 			cache-unified;
 			cache-level = <2>;
 		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP_0: cpu-sleep-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <400>;
+				exit-latency-us = <500>;
+				min-residency-us = <4000>;
+			};
+
+			CPU_SLEEP_1: cpu-sleep-1 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <700>;
+				exit-latency-us = <700>;
+				min-residency-us = <5000>;
+			};
+		};
 	};
 
 	extal_clk: extal {
@@ -572,12 +605,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -812,7 +845,7 @@
 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 704>, <&cpg 703>;
@@ -829,7 +862,7 @@
 			       <&usb_dmac3 0>, <&usb_dmac3 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy3>;
+			phys = <&usb2_phy3 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 705>, <&cpg 700>;
@@ -840,8 +873,8 @@
 			compatible = "renesas,r8a7795-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -854,8 +887,8 @@
 			compatible = "renesas,r8a7795-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -868,8 +901,8 @@
 			compatible = "renesas,r8a7795-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe6460000 0 0x100>;
-			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 326>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -882,8 +915,8 @@
 			compatible = "renesas,r8a7795-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe6470000 0 0x100>;
-			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 329>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -918,23 +951,23 @@
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x10000>;
-			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -960,23 +993,23 @@
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1002,23 +1035,23 @@
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1450,6 +1483,17 @@
 			status = "disabled";
 		};
 
+		tpu: pwm@e6e80000 {
+			compatible = "renesas,tpu-r8a7795", "renesas,tpu";
+			reg = <0 0xe6e80000 0 0x148>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 304>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 304>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		msiof0: spi@e6e90000 {
 			compatible = "renesas,msiof-r8a7795",
 				     "renesas,rcar-gen3-msiof";
@@ -2299,23 +2343,23 @@
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -2341,23 +2385,23 @@
 			compatible = "renesas,dmac-r8a7795",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -2405,7 +2449,7 @@
 			reg = <0 0xee080000 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
@@ -2417,7 +2461,7 @@
 			reg = <0 0xee0a0000 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
@@ -2429,7 +2473,7 @@
 			reg = <0 0xee0c0000 0 0x100>;
 			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 701>;
-			phys = <&usb2_phy2>;
+			phys = <&usb2_phy2 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 701>;
@@ -2441,7 +2485,7 @@
 			reg = <0 0xee0e0000 0 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
-			phys = <&usb2_phy3>;
+			phys = <&usb2_phy3 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 700>, <&cpg 705>;
@@ -2453,7 +2497,7 @@
 			reg = <0 0xee080100 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2466,7 +2510,7 @@
 			reg = <0 0xee0a0100 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 2>;
 			phy-names = "usb";
 			companion = <&ohci1>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2479,7 +2523,7 @@
 			reg = <0 0xee0c0100 0 0x100>;
 			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 701>;
-			phys = <&usb2_phy2>;
+			phys = <&usb2_phy2 2>;
 			phy-names = "usb";
 			companion = <&ohci2>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2492,7 +2536,7 @@
 			reg = <0 0xee0e0100 0 0x100>;
 			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
-			phys = <&usb2_phy3>;
+			phys = <&usb2_phy3 2>;
 			phy-names = "usb";
 			companion = <&ohci3>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
@@ -2508,7 +2552,7 @@
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2519,7 +2563,7 @@
 			clocks = <&cpg CPG_MOD 702>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2530,7 +2574,7 @@
 			clocks = <&cpg CPG_MOD 701>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 701>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2542,7 +2586,7 @@
 			clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 700>, <&cpg 705>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2555,6 +2599,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -2567,6 +2612,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 313>;
+			iommus = <&ipmmu_ds1 33>;
 			status = "disabled";
 		};
 
@@ -2579,6 +2625,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 312>;
+			iommus = <&ipmmu_ds1 34>;
 			status = "disabled";
 		};
 
@@ -2591,6 +2638,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 			resets = <&cpg 311>;
+			iommus = <&ipmmu_ds1 35>;
 			status = "disabled";
 		};
 
@@ -2631,10 +2679,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2658,10 +2706,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
-				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
-				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
-				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
+				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
+				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
+				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
@@ -2717,6 +2765,83 @@
 			resets = <&cpg 820>;
 		};
 
+		vspbc: vsp@fe920000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe920000 0 0x8000>;
+			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 624>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+			resets = <&cpg 624>;
+
+			renesas,fcp = <&fcpvb1>;
+		};
+
+		vspbd: vsp@fe960000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe960000 0 0x8000>;
+			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 626>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+			resets = <&cpg 626>;
+
+			renesas,fcp = <&fcpvb0>;
+		};
+
+		vspd0: vsp@fea20000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea20000 0 0x5000>;
+			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 623>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 623>;
+
+			renesas,fcp = <&fcpvd0>;
+		};
+
+		vspd1: vsp@fea28000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea28000 0 0x5000>;
+			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 622>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 622>;
+
+			renesas,fcp = <&fcpvd1>;
+		};
+
+		vspd2: vsp@fea30000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea30000 0 0x5000>;
+			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 621>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			resets = <&cpg 621>;
+
+			renesas,fcp = <&fcpvd2>;
+		};
+
+		vspi0: vsp@fe9a0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9a0000 0 0x8000>;
+			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 631>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+			resets = <&cpg 631>;
+
+			renesas,fcp = <&fcpvi0>;
+		};
+
+		vspi1: vsp@fe9b0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9b0000 0 0x8000>;
+			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 630>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+			resets = <&cpg 630>;
+
+			renesas,fcp = <&fcpvi1>;
+		};
+
 		fdp1@fe940000 {
 			compatible = "renesas,fdp1";
 			reg = <0 0xfe940000 0 0x2400>;
@@ -2818,81 +2943,40 @@
 			iommus = <&ipmmu_vi1 10>;
 		};
 
-		vspbd: vsp@fe960000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfe960000 0 0x8000>;
-			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 626>;
-			power-domains = <&sysc R8A7795_PD_A3VP>;
-			resets = <&cpg 626>;
-
-			renesas,fcp = <&fcpvb0>;
-		};
-
-		vspbc: vsp@fe920000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfe920000 0 0x8000>;
-			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 624>;
-			power-domains = <&sysc R8A7795_PD_A3VP>;
-			resets = <&cpg 624>;
-
-			renesas,fcp = <&fcpvb1>;
-		};
-
-		vspd0: vsp@fea20000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfea20000 0 0x5000>;
-			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 623>;
+		cmm0: cmm@fea40000 {
+			compatible = "renesas,r8a7795-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea40000 0 0x1000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-			resets = <&cpg 623>;
-
-			renesas,fcp = <&fcpvd0>;
+			clocks = <&cpg CPG_MOD 711>;
+			resets = <&cpg 711>;
 		};
 
-		vspd1: vsp@fea28000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfea28000 0 0x5000>;
-			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 622>;
+		cmm1: cmm@fea50000 {
+			compatible = "renesas,r8a7795-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea50000 0 0x1000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-			resets = <&cpg 622>;
-
-			renesas,fcp = <&fcpvd1>;
+			clocks = <&cpg CPG_MOD 710>;
+			resets = <&cpg 710>;
 		};
 
-		vspd2: vsp@fea30000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfea30000 0 0x5000>;
-			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 621>;
+		cmm2: cmm@fea60000 {
+			compatible = "renesas,r8a7795-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea60000 0 0x1000>;
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
-			resets = <&cpg 621>;
-
-			renesas,fcp = <&fcpvd2>;
+			clocks = <&cpg CPG_MOD 709>;
+			resets = <&cpg 709>;
 		};
 
-		vspi0: vsp@fe9a0000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfe9a0000 0 0x8000>;
-			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 631>;
-			power-domains = <&sysc R8A7795_PD_A3VP>;
-			resets = <&cpg 631>;
-
-			renesas,fcp = <&fcpvi0>;
-		};
-
-		vspi1: vsp@fe9b0000 {
-			compatible = "renesas,vsp2";
-			reg = <0 0xfe9b0000 0 0x8000>;
-			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 630>;
-			power-domains = <&sysc R8A7795_PD_A3VP>;
-			resets = <&cpg 630>;
-
-			renesas,fcp = <&fcpvi1>;
+		cmm3: cmm@fea70000 {
+			compatible = "renesas,r8a7795-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea70000 0 0x1000>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 708>;
+			resets = <&cpg 708>;
 		};
 
 		csi20: csi2@fea80000 {
@@ -3098,7 +3182,10 @@
 				 <&cpg CPG_MOD 722>,
 				 <&cpg CPG_MOD 721>;
 			clock-names = "du.0", "du.1", "du.2", "du.3";
-			vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
+
+			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
+			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
+
 			status = "disabled";
 
 			ports {
@@ -3168,58 +3255,30 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 0>;
+			sustainable-power = <6313>;
 
 			trips {
-				sensor1_passive: sensor1-passive {
-					temperature = <95000>;
-					hysteresis = <1000>;
-					type = "passive";
-				};
 				sensor1_crit: sensor1-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-				map0 {
-					trip = <&sensor1_passive>;
-					cooling-device = <&a57_0 4 4>,
-							 <&a57_1 4 4>,
-							 <&a57_2 4 4>,
-							 <&a57_3 4 4>;
-				};
-			};
 		};
 
 		sensor_thermal2: sensor-thermal2 {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 1>;
+			sustainable-power = <6313>;
 
 			trips {
-				sensor2_passive: sensor2-passive {
-					temperature = <95000>;
-					hysteresis = <1000>;
-					type = "passive";
-				};
 				sensor2_crit: sensor2-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-				map0 {
-					trip = <&sensor2_passive>;
-					cooling-device = <&a57_0 4 4>,
-							 <&a57_1 4 4>,
-							 <&a57_2 4 4>,
-							 <&a57_3 4 4>;
-				};
-			};
 		};
 
 		sensor_thermal3: sensor-thermal3 {
@@ -3228,11 +3287,12 @@
 			thermal-sensors = <&tsc 2>;
 
 			trips {
-				sensor3_passive: sensor3-passive {
-					temperature = <95000>;
+				target: trip-point1 {
+					temperature = <100000>;
 					hysteresis = <1000>;
 					type = "passive";
 				};
+
 				sensor3_crit: sensor3-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
@@ -3242,11 +3302,15 @@
 
 			cooling-maps {
 				map0 {
-					trip = <&sensor3_passive>;
-					cooling-device = <&a57_0 4 4>,
-							 <&a57_1 4 4>,
-							 <&a57_2 4 4>,
-							 <&a57_3 4 4>;
+					trip = <&target>;
+					cooling-device = <&a57_0 2 4>;
+					contribution = <1024>;
+				};
+
+				map1 {
+					trip = <&target>;
+					cooling-device = <&a53_0 0 2>;
+					contribution = <1024>;
 				};
 			};
 		};
diff --git a/arch/arm/dts/r8a7796-u-boot.dtsi b/arch/arm/dts/r8a7796-u-boot.dtsi
deleted file mode 100644
index 622105486b..0000000000
--- a/arch/arm/dts/r8a7796-u-boot.dtsi
+++ /dev/null
@@ -1,24 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source extras for U-Boot on RCar R8A7796 SoC
- *
- * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
- */
-
-#include "r8a779x-u-boot.dtsi"
-
-&extalr_clk {
-	u-boot,dm-pre-reloc;
-};
-
-/ {
-	soc {
-		rpc: rpc@0xee200000 {
-			compatible = "renesas,rpc-r8a7796", "renesas,rpc";
-			reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
-			clocks = <&cpg CPG_MOD 917>;
-			bank-width = <2>;
-			status = "disabled";
-		};
-	};
-};
diff --git a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts
index e93afe37d0..d3b09246f5 100644
--- a/arch/arm/dts/r8a7795-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77960-salvator-x-u-boot.dts
@@ -5,8 +5,8 @@
  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
  */
 
-#include "r8a7795-salvator-x.dts"
-#include "r8a7795-u-boot.dtsi"
+#include "r8a77960-salvator-x.dts"
+#include "r8a77960-u-boot.dtsi"
 
 &sdhi0 {
 	sd-uhs-sdr12;
@@ -16,6 +16,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 };
diff --git a/arch/arm/dts/r8a7796-salvator-x.dts b/arch/arm/dts/r8a77960-salvator-x.dts
index 2aefa53cb1..ecfbeafeaf 100644
--- a/arch/arm/dts/r8a7796-salvator-x.dts
+++ b/arch/arm/dts/r8a77960-salvator-x.dts
@@ -6,11 +6,11 @@
  */
 
 /dts-v1/;
-#include "r8a7796.dtsi"
+#include "r8a77960.dtsi"
 #include "salvator-x.dtsi"
 
 / {
-	model = "Renesas Salvator-X board based on r8a7796";
+	model = "Renesas Salvator-X board based on r8a77960";
 	compatible = "renesas,salvator-x", "renesas,r8a7796";
 
 	memory@48000000 {
@@ -36,11 +36,6 @@
 		      "dclkin.0", "dclkin.1", "dclkin.2";
 };
 
-&sound_card {
-	dais = <&rsnd_port0	/* ak4613 */
-		&rsnd_port1>;	/* HDMI0  */
-};
-
 &hdmi0 {
 	status = "okay";
 
@@ -81,3 +76,8 @@
 		};
 	};
 };
+
+&sound_card {
+	dais = <&rsnd_port0	/* ak4613 */
+		&rsnd_port1>;	/* HDMI0  */
+};
diff --git a/arch/arm/dts/r8a77960-u-boot.dtsi b/arch/arm/dts/r8a77960-u-boot.dtsi
new file mode 100644
index 0000000000..826c2384bc
--- /dev/null
+++ b/arch/arm/dts/r8a77960-u-boot.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RCar R8A7796 SoC
+ *
+ * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+	u-boot,dm-pre-reloc;
+};
+
+/ {
+	soc {
+		rpc: rpc@0xee200000 {
+			compatible = "renesas,rpc-r8a7796", "renesas,rpc";
+			reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+			clocks = <&cpg CPG_MOD 917>;
+			bank-width = <2>;
+			status = "disabled";
+		};
+	};
+};
+
+/delete-node/ &ak4613;
+/delete-node/ &audma0;
+/delete-node/ &audma1;
+/delete-node/ &can0;
+/delete-node/ &can1;
+/delete-node/ &canfd;
+/delete-node/ &csi20;
+/delete-node/ &csi40;
+/delete-node/ &drif00;
+/delete-node/ &drif01;
+/delete-node/ &drif10;
+/delete-node/ &drif11;
+/delete-node/ &drif20;
+/delete-node/ &drif21;
+/delete-node/ &drif30;
+/delete-node/ &drif31;
+/delete-node/ &du;
+/delete-node/ &fcpf0;
+/delete-node/ &fcpvb0;
+/delete-node/ &fcpvd0;
+/delete-node/ &fcpvd1;
+/delete-node/ &fcpvd2;
+/delete-node/ &fcpvi0;
+/delete-node/ &hdmi0;
+/delete-node/ &lvds0;
+/delete-node/ &rcar_sound;
+/delete-node/ &sound_card;
+/delete-node/ &vin0;
+/delete-node/ &vin1;
+/delete-node/ &vin2;
+/delete-node/ &vin3;
+/delete-node/ &vin4;
+/delete-node/ &vin5;
+/delete-node/ &vin6;
+/delete-node/ &vin7;
+/delete-node/ &vspb;
+/delete-node/ &vspd0;
+/delete-node/ &vspd1;
+/delete-node/ &vspd2;
+/delete-node/ &vspi0;
+
+/ {
+	/delete-node/ cvbs-in;
+	/delete-node/ hdmi-in;
+	/delete-node/ hdmi0-out;
+	/delete-node/ hdmi1-out;
+	/delete-node/ vga-encoder;
+	/delete-node/ vga;
+};
+
+&i2c4 {
+	/delete-node/ video-receiver@70;
+};
+
+/ {
+	soc {
+		/delete-node/ fdp1@fe940000;
+		/delete-node/ fdp1@fe944000;
+		/delete-node/ fdp1@fe948000;
+		/delete-node/ imr-lx4@fe860000;
+		/delete-node/ imr-lx4@fe870000;
+		/delete-node/ imr-lx4@fe880000;
+		/delete-node/ imr-lx4@fe890000;
+	};
+};
diff --git a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts b/arch/arm/dts/r8a77960-ulcb-u-boot.dts
index 314eacc2bc..bd1d634574 100644
--- a/arch/arm/dts/r8a7796-m3ulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77960-ulcb-u-boot.dts
@@ -5,8 +5,8 @@
  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
  */
 
-#include "r8a7796-m3ulcb.dts"
-#include "r8a7796-u-boot.dtsi"
+#include "r8a77960-ulcb.dts"
+#include "r8a77960-u-boot.dtsi"
 
 / {
 	cpld {
@@ -27,6 +27,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 };
diff --git a/arch/arm/dts/r8a7796-m3ulcb.dts b/arch/arm/dts/r8a77960-ulcb.dts
index 9e4594c27f..d041042a56 100644
--- a/arch/arm/dts/r8a7796-m3ulcb.dts
+++ b/arch/arm/dts/r8a77960-ulcb.dts
@@ -7,11 +7,11 @@
  */
 
 /dts-v1/;
-#include "r8a7796.dtsi"
+#include "r8a77960.dtsi"
 #include "ulcb.dtsi"
 
 / {
-	model = "Renesas M3ULCB board based on r8a7796";
+	model = "Renesas M3ULCB board based on r8a77960";
 	compatible = "renesas,m3ulcb", "renesas,r8a7796";
 
 	memory@48000000 {
diff --git a/arch/arm/dts/r8a7796.dtsi b/arch/arm/dts/r8a77960.dtsi
index d5e2f4af83..60f156cfd2 100644
--- a/arch/arm/dts/r8a7796.dtsi
+++ b/arch/arm/dts/r8a77960.dtsi
@@ -160,6 +160,8 @@
 			power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
+			dynamic-power-coefficient = <854>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -173,6 +175,7 @@
 			power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_0>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 			capacity-dmips-mhz = <1024>;
@@ -186,6 +189,9 @@
 			power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
+			#cooling-cells = <2>;
+			dynamic-power-coefficient = <277>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -198,6 +204,7 @@
 			power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -210,6 +217,7 @@
 			power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -222,6 +230,7 @@
 			power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			cpu-idle-states = <&CPU_SLEEP_1>;
 			clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 			capacity-dmips-mhz = <535>;
@@ -240,6 +249,28 @@
 			cache-unified;
 			cache-level = <2>;
 		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP_0: cpu-sleep-0 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <400>;
+				exit-latency-us = <500>;
+				min-residency-us = <4000>;
+			};
+
+			CPU_SLEEP_1: cpu-sleep-1 {
+				compatible = "arm,idle-state";
+				arm,psci-suspend-param = <0x0010000>;
+				local-timer-stop;
+				entry-latency-us = <700>;
+				exit-latency-us = <700>;
+				min-residency-us = <5000>;
+			};
+		};
 	};
 
 	extal_clk: extal {
@@ -543,12 +574,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -783,7 +814,7 @@
 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 704>, <&cpg 703>;
@@ -794,8 +825,8 @@
 			compatible = "renesas,r8a7796-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -808,8 +839,8 @@
 			compatible = "renesas,r8a7796-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -835,23 +866,23 @@
 			compatible = "renesas,dmac-r8a7796",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x10000>;
-			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -877,23 +908,23 @@
 			compatible = "renesas,dmac-r8a7796",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -919,23 +950,23 @@
 			compatible = "renesas,dmac-r8a7796",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1319,6 +1350,17 @@
 			status = "disabled";
 		};
 
+		tpu: pwm@e6e80000 {
+			compatible = "renesas,tpu-r8a7796", "renesas,tpu";
+			reg = <0 0xe6e80000 0 0x148>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 304>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			resets = <&cpg 304>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		msiof0: spi@e6e90000 {
 			compatible = "renesas,msiof-r8a7796",
 				     "renesas,rcar-gen3-msiof";
@@ -1819,6 +1861,17 @@
 				      "ssi.1", "ssi.0";
 			status = "disabled";
 
+			rcar_sound,ctu {
+				ctu00: ctu-0 { };
+				ctu01: ctu-1 { };
+				ctu02: ctu-2 { };
+				ctu03: ctu-3 { };
+				ctu10: ctu-4 { };
+				ctu11: ctu-5 { };
+				ctu12: ctu-6 { };
+				ctu13: ctu-7 { };
+			};
+
 			rcar_sound,dvc {
 				dvc0: dvc-0 {
 					dmas = <&audma1 0xbc>;
@@ -1835,17 +1888,6 @@
 				mix1: mix-1 { };
 			};
 
-			rcar_sound,ctu {
-				ctu00: ctu-0 { };
-				ctu01: ctu-1 { };
-				ctu02: ctu-2 { };
-				ctu03: ctu-3 { };
-				ctu10: ctu-4 { };
-				ctu11: ctu-5 { };
-				ctu12: ctu-6 { };
-				ctu13: ctu-7 { };
-			};
-
 			rcar_sound,src {
 				src0: src-0 {
 					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
@@ -1899,6 +1941,59 @@
 				};
 			};
 
+			rcar_sound,ssi {
+				ssi0: ssi-0 {
+					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x01>, <&audma1 0x02>;
+					dma-names = "rx", "tx";
+				};
+				ssi1: ssi-1 {
+					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x03>, <&audma1 0x04>;
+					dma-names = "rx", "tx";
+				};
+				ssi2: ssi-2 {
+					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x05>, <&audma1 0x06>;
+					dma-names = "rx", "tx";
+				};
+				ssi3: ssi-3 {
+					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x07>, <&audma1 0x08>;
+					dma-names = "rx", "tx";
+				};
+				ssi4: ssi-4 {
+					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x09>, <&audma1 0x0a>;
+					dma-names = "rx", "tx";
+				};
+				ssi5: ssi-5 {
+					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0b>, <&audma1 0x0c>;
+					dma-names = "rx", "tx";
+				};
+				ssi6: ssi-6 {
+					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0d>, <&audma1 0x0e>;
+					dma-names = "rx", "tx";
+				};
+				ssi7: ssi-7 {
+					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x0f>, <&audma1 0x10>;
+					dma-names = "rx", "tx";
+				};
+				ssi8: ssi-8 {
+					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x11>, <&audma1 0x12>;
+					dma-names = "rx", "tx";
+				};
+				ssi9: ssi-9 {
+					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+					dmas = <&audma0 0x13>, <&audma1 0x14>;
+					dma-names = "rx", "tx";
+				};
+			};
+
 			rcar_sound,ssiu {
 				ssiu00: ssiu-0 {
 					dmas = <&audma0 0x15>, <&audma1 0x16>;
@@ -2109,82 +2204,29 @@
 					dma-names = "rx", "tx";
 				};
 			};
-
-			rcar_sound,ssi {
-				ssi0: ssi-0 {
-					interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x01>, <&audma1 0x02>;
-					dma-names = "rx", "tx";
-				};
-				ssi1: ssi-1 {
-					interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x03>, <&audma1 0x04>;
-					dma-names = "rx", "tx";
-				};
-				ssi2: ssi-2 {
-					interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x05>, <&audma1 0x06>;
-					dma-names = "rx", "tx";
-				};
-				ssi3: ssi-3 {
-					interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x07>, <&audma1 0x08>;
-					dma-names = "rx", "tx";
-				};
-				ssi4: ssi-4 {
-					interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x09>, <&audma1 0x0a>;
-					dma-names = "rx", "tx";
-				};
-				ssi5: ssi-5 {
-					interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x0b>, <&audma1 0x0c>;
-					dma-names = "rx", "tx";
-				};
-				ssi6: ssi-6 {
-					interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x0d>, <&audma1 0x0e>;
-					dma-names = "rx", "tx";
-				};
-				ssi7: ssi-7 {
-					interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x0f>, <&audma1 0x10>;
-					dma-names = "rx", "tx";
-				};
-				ssi8: ssi-8 {
-					interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x11>, <&audma1 0x12>;
-					dma-names = "rx", "tx";
-				};
-				ssi9: ssi-9 {
-					interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
-					dmas = <&audma0 0x13>, <&audma1 0x14>;
-					dma-names = "rx", "tx";
-				};
-			};
 		};
 
 		audma0: dma-controller@ec700000 {
 			compatible = "renesas,dmac-r8a7796",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -2210,23 +2252,23 @@
 			compatible = "renesas,dmac-r8a7796",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -2275,7 +2317,7 @@
 			reg = <0 0xee080000 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
@@ -2287,7 +2329,7 @@
 			reg = <0 0xee0a0000 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
@@ -2299,7 +2341,7 @@
 			reg = <0 0xee080100 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -2312,7 +2354,7 @@
 			reg = <0 0xee0a0100 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 2>;
 			phy-names = "usb";
 			companion = <&ohci1>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
@@ -2328,7 +2370,7 @@
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2339,7 +2381,7 @@
 			clocks = <&cpg CPG_MOD 702>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2352,6 +2394,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -2364,6 +2407,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 313>;
+			iommus = <&ipmmu_ds1 33>;
 			status = "disabled";
 		};
 
@@ -2376,6 +2420,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 312>;
+			iommus = <&ipmmu_ds1 34>;
 			status = "disabled";
 		};
 
@@ -2388,6 +2433,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 			resets = <&cpg 311>;
+			iommus = <&ipmmu_ds1 35>;
 			status = "disabled";
 		};
 
@@ -2416,10 +2462,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2443,10 +2489,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
-				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
-				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
-				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
+				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
+				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
+				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
@@ -2599,6 +2645,33 @@
 			renesas,fcp = <&fcpvi0>;
 		};
 
+		cmm0: cmm@fea40000 {
+			compatible = "renesas,r8a7796-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea40000 0 0x1000>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 711>;
+			resets = <&cpg 711>;
+		};
+
+		cmm1: cmm@fea50000 {
+			compatible = "renesas,r8a7796-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea50000 0 0x1000>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 710>;
+			resets = <&cpg 710>;
+		};
+
+		cmm2: cmm@fea60000 {
+			compatible = "renesas,r8a7796-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea60000 0 0x1000>;
+			power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 709>;
+			resets = <&cpg 709>;
+		};
+
 		csi20: csi2@fea80000 {
 			compatible = "renesas,r8a7796-csi2";
 			reg = <0 0xfea80000 0 0x10000>;
@@ -2749,9 +2822,11 @@
 				 <&cpg CPG_MOD 723>,
 				 <&cpg CPG_MOD 722>;
 			clock-names = "du.0", "du.1", "du.2";
-			status = "disabled";
 
-			vsps = <&vspd0 &vspd1 &vspd2>;
+			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
+			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
+
+			status = "disabled";
 
 			ports {
 				#address-cells = <1>;
@@ -2814,78 +2889,63 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 0>;
+			sustainable-power = <3874>;
 
 			trips {
-				sensor1_passive: sensor1-passive {
-					temperature = <95000>;
-					hysteresis = <1000>;
-					type = "passive";
-				};
 				sensor1_crit: sensor1-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-				map0 {
-					trip = <&sensor1_passive>;
-					cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
-				};
-			};
 		};
 
 		sensor_thermal2: sensor-thermal2 {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 1>;
+			sustainable-power = <3874>;
 
 			trips {
-				sensor2_passive: sensor2-passive {
-					temperature = <95000>;
-					hysteresis = <1000>;
-					type = "passive";
-				};
 				sensor2_crit: sensor2-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-				map0 {
-					trip = <&sensor2_passive>;
-					cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
-				};
-			};
 		};
 
 		sensor_thermal3: sensor-thermal3 {
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 2>;
+			sustainable-power = <3874>;
 
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&a57_0 2 4>;
+					contribution = <1024>;
+				};
+				map1 {
+					trip = <&target>;
+					cooling-device = <&a53_0 0 2>;
+					contribution = <1024>;
+				};
+			};
 			trips {
-				sensor3_passive: sensor3-passive {
-					temperature = <95000>;
+				target: trip-point1 {
+					temperature = <100000>;
 					hysteresis = <1000>;
 					type = "passive";
 				};
+
 				sensor3_crit: sensor3-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-				map0 {
-					trip = <&sensor3_passive>;
-					cooling-device = <&a57_0 5 5>, <&a57_1 5 5>;
-				};
-			};
 		};
 	};
 
diff --git a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts
index e4bd2d3e4f..d6f0708555 100644
--- a/arch/arm/dts/r8a77965-salvator-x-u-boot.dts
+++ b/arch/arm/dts/r8a77965-salvator-x-u-boot.dts
@@ -17,6 +17,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 	status = "okay";
diff --git a/arch/arm/dts/r8a77965-salvator-x.dts b/arch/arm/dts/r8a77965-salvator-x.dts
index 340a3c72b6..660a0240ee 100644
--- a/arch/arm/dts/r8a77965-salvator-x.dts
+++ b/arch/arm/dts/r8a77965-salvator-x.dts
@@ -41,9 +41,37 @@
 				remote-endpoint = <&hdmi0_con>;
 			};
 		};
+		port@2 {
+			reg = <2>;
+			dw_hdmi0_snd_in: endpoint {
+				remote-endpoint = <&rsnd_endpoint1>;
+			};
+		};
 	};
 };
 
 &hdmi0_con {
 	remote-endpoint = <&rcar_dw_hdmi0_out>;
 };
+
+&rcar_sound {
+	ports {
+		rsnd_port1: port@1 {
+			reg = <1>;
+			rsnd_endpoint1: endpoint {
+				remote-endpoint = <&dw_hdmi0_snd_in>;
+
+				dai-format = "i2s";
+				bitclock-master = <&rsnd_endpoint1>;
+				frame-master = <&rsnd_endpoint1>;
+
+				playback = <&ssi2>;
+			};
+		};
+	};
+};
+
+&sound_card {
+	dais = <&rsnd_port0	/* ak4613 */
+		&rsnd_port1>;	/* HDMI0  */
+};
diff --git a/arch/arm/dts/r8a77965-u-boot.dtsi b/arch/arm/dts/r8a77965-u-boot.dtsi
index 81ee0961e2..33ff5b148b 100644
--- a/arch/arm/dts/r8a77965-u-boot.dtsi
+++ b/arch/arm/dts/r8a77965-u-boot.dtsi
@@ -22,3 +22,59 @@
 		};
 	};
 };
+
+/delete-node/ &ak4613;
+/delete-node/ &audma0;
+/delete-node/ &audma1;
+/delete-node/ &can0;
+/delete-node/ &can1;
+/delete-node/ &canfd;
+/delete-node/ &csi20;
+/delete-node/ &csi40;
+/delete-node/ &du;
+/delete-node/ &fcpf0;
+/delete-node/ &fcpvb0;
+/delete-node/ &fcpvd0;
+/delete-node/ &fcpvd1;
+/delete-node/ &fcpvi0;
+/delete-node/ &hdmi0;
+/delete-node/ &lvds0;
+/delete-node/ &rcar_sound;
+/delete-node/ &sound_card;
+/delete-node/ &vin0;
+/delete-node/ &vin1;
+/delete-node/ &vin2;
+/delete-node/ &vin3;
+/delete-node/ &vin4;
+/delete-node/ &vin5;
+/delete-node/ &vin6;
+/delete-node/ &vin7;
+/delete-node/ &vspb;
+/delete-node/ &vspd0;
+/delete-node/ &vspd1;
+/delete-node/ &vspi0;
+
+/ {
+	/delete-node/ cvbs-in;
+	/delete-node/ hdmi-in;
+	/delete-node/ hdmi0-out;
+	/delete-node/ hdmi1-out;
+	/delete-node/ vga-encoder;
+	/delete-node/ vga;
+};
+
+&i2c4 {
+	/delete-node/ video-receiver@70;
+};
+
+/ {
+	soc {
+		/delete-node/ fdp1@fe940000;
+		/delete-node/ fdp1@fe944000;
+		/delete-node/ fdp1@fe948000;
+		/delete-node/ imr-lx4@fe860000;
+		/delete-node/ imr-lx4@fe870000;
+		/delete-node/ imr-lx4@fe880000;
+		/delete-node/ imr-lx4@fe890000;
+	};
+};
diff --git a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts b/arch/arm/dts/r8a77965-ulcb-u-boot.dts
index cf10431269..954d8b685c 100644
--- a/arch/arm/dts/r8a77965-m3nulcb-u-boot.dts
+++ b/arch/arm/dts/r8a77965-ulcb-u-boot.dts
@@ -5,7 +5,7 @@
  * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
  */
 
-#include "r8a77965-m3nulcb.dts"
+#include "r8a77965-ulcb.dts"
 #include "r8a77965-u-boot.dtsi"
 
 / {
@@ -28,6 +28,8 @@
 };
 
 &sdhi2 {
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	max-frequency = <200000000>;
 	status = "okay";
diff --git a/arch/arm/dts/r8a77965-m3nulcb.dts b/arch/arm/dts/r8a77965-ulcb.dts
index 964078b6cc..964078b6cc 100644
--- a/arch/arm/dts/r8a77965-m3nulcb.dts
+++ b/arch/arm/dts/r8a77965-ulcb.dts
diff --git a/arch/arm/dts/r8a77965.dtsi b/arch/arm/dts/r8a77965.dtsi
index 2554b1742d..c17d90bd16 100644
--- a/arch/arm/dts/r8a77965.dtsi
+++ b/arch/arm/dts/r8a77965.dtsi
@@ -111,6 +111,8 @@
 			power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
 			next-level-cache = <&L2_CA57>;
 			enable-method = "psci";
+			#cooling-cells = <2>;
+			dynamic-power-coefficient = <854>;
 			clocks = <&cpg CPG_CORE R8A77965_CLK_Z>;
 			operating-points-v2 = <&cluster0_opp>;
 		};
@@ -427,12 +429,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -667,7 +669,7 @@
 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 704>, <&cpg 703>;
@@ -678,8 +680,8 @@
 			compatible = "renesas,r8a77965-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
@@ -692,8 +694,8 @@
 			compatible = "renesas,r8a77965-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
@@ -719,23 +721,23 @@
 			compatible = "renesas,dmac-r8a77965",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x10000>;
-			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -761,23 +763,23 @@
 			compatible = "renesas,dmac-r8a77965",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -803,23 +805,23 @@
 			compatible = "renesas,dmac-r8a77965",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1195,6 +1197,17 @@
 			status = "disabled";
 		};
 
+		tpu: pwm@e6e80000 {
+			compatible = "renesas,tpu-r8a77965", "renesas,tpu";
+			reg = <0 0xe6e80000 0 0x148>;
+			interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 304>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			resets = <&cpg 304>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		msiof0: spi@e6e90000 {
 			compatible = "renesas,msiof-r8a77965",
 				     "renesas,rcar-gen3-msiof";
@@ -1924,23 +1937,23 @@
 			compatible = "renesas,dmac-r8a77965",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1958,23 +1971,23 @@
 			compatible = "renesas,dmac-r8a77965",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec720000 0 0x10000>;
-			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -2015,7 +2028,7 @@
 			reg = <0 0xee080000 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
@@ -2027,7 +2040,7 @@
 			reg = <0 0xee0a0000 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
@@ -2039,7 +2052,7 @@
 			reg = <0 0xee080100 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
@@ -2052,7 +2065,7 @@
 			reg = <0 0xee0a0100 0 0x100>;
 			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 702>;
-			phys = <&usb2_phy1>;
+			phys = <&usb2_phy1 2>;
 			phy-names = "usb";
 			companion = <&ohci1>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
@@ -2068,7 +2081,7 @@
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2079,7 +2092,7 @@
 			clocks = <&cpg CPG_MOD 702>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 702>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -2092,6 +2105,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -2104,6 +2118,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 313>;
+			iommus = <&ipmmu_ds1 33>;
 			status = "disabled";
 		};
 
@@ -2116,6 +2131,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 312>;
+			iommus = <&ipmmu_ds1 34>;
 			status = "disabled";
 		};
 
@@ -2128,6 +2144,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
 			resets = <&cpg 311>;
+			iommus = <&ipmmu_ds1 35>;
 			status = "disabled";
 		};
 
@@ -2167,10 +2184,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -2194,10 +2211,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
-				0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
-				0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
-				0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
+				 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
+				 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
+				 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
@@ -2242,14 +2259,6 @@
 			renesas,fcp = <&fcpvb0>;
 		};
 
-		fcpvb0: fcp@fe96f000 {
-			compatible = "renesas,fcpv";
-			reg = <0 0xfe96f000 0 0x200>;
-			clocks = <&cpg CPG_MOD 607>;
-			power-domains = <&sysc R8A77965_PD_A3VP>;
-			resets = <&cpg 607>;
-		};
-
 		vspi0: vsp@fe9a0000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfe9a0000 0 0x8000>;
@@ -2261,14 +2270,6 @@
 			renesas,fcp = <&fcpvi0>;
 		};
 
-		fcpvi0: fcp@fe9af000 {
-			compatible = "renesas,fcpv";
-			reg = <0 0xfe9af000 0 0x200>;
-			clocks = <&cpg CPG_MOD 611>;
-			power-domains = <&sysc R8A77965_PD_A3VP>;
-			resets = <&cpg 611>;
-		};
-
 		vspd0: vsp@fea20000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfea20000 0 0x5000>;
@@ -2280,14 +2281,6 @@
 			renesas,fcp = <&fcpvd0>;
 		};
 
-		fcpvd0: fcp@fea27000 {
-			compatible = "renesas,fcpv";
-			reg = <0 0xfea27000 0 0x200>;
-			clocks = <&cpg CPG_MOD 603>;
-			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
-			resets = <&cpg 603>;
-		};
-
 		vspd1: vsp@fea28000 {
 			compatible = "renesas,vsp2";
 			reg = <0 0xfea28000 0 0x5000>;
@@ -2299,6 +2292,22 @@
 			renesas,fcp = <&fcpvd1>;
 		};
 
+		fcpvb0: fcp@fe96f000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe96f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 607>;
+			power-domains = <&sysc R8A77965_PD_A3VP>;
+			resets = <&cpg 607>;
+		};
+
+		fcpvd0: fcp@fea27000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfea27000 0 0x200>;
+			clocks = <&cpg CPG_MOD 603>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			resets = <&cpg 603>;
+		};
+
 		fcpvd1: fcp@fea2f000 {
 			compatible = "renesas,fcpv";
 			reg = <0 0xfea2f000 0 0x200>;
@@ -2307,6 +2316,41 @@
 			resets = <&cpg 602>;
 		};
 
+		fcpvi0: fcp@fe9af000 {
+			compatible = "renesas,fcpv";
+			reg = <0 0xfe9af000 0 0x200>;
+			clocks = <&cpg CPG_MOD 611>;
+			power-domains = <&sysc R8A77965_PD_A3VP>;
+			resets = <&cpg 611>;
+		};
+
+		cmm0: cmm@fea40000 {
+			compatible = "renesas,r8a77965-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea40000 0 0x1000>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 711>;
+			resets = <&cpg 711>;
+		};
+
+		cmm1: cmm@fea50000 {
+			compatible = "renesas,r8a77965-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea50000 0 0x1000>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 710>;
+			resets = <&cpg 710>;
+		};
+
+		cmm3: cmm@fea70000 {
+			compatible = "renesas,r8a77965-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea70000 0 0x1000>;
+			power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 708>;
+			resets = <&cpg 708>;
+		};
+
 		csi20: csi2@fea80000 {
 			compatible = "renesas,r8a77965-csi2";
 			reg = <0 0xfea80000 0 0x10000>;
@@ -2454,9 +2498,11 @@
 				 <&cpg CPG_MOD 723>,
 				 <&cpg CPG_MOD 721>;
 			clock-names = "du.0", "du.1", "du.3";
-			status = "disabled";
 
-			vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
+			renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
+			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
+
+			status = "disabled";
 
 			ports {
 				#address-cells = <1>;
@@ -2519,6 +2565,7 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 0>;
+			sustainable-power = <2439>;
 
 			trips {
 				sensor1_crit: sensor1-crit {
@@ -2533,6 +2580,7 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 1>;
+			sustainable-power = <2439>;
 
 			trips {
 				sensor2_crit: sensor2-crit {
@@ -2547,14 +2595,30 @@
 			polling-delay-passive = <250>;
 			polling-delay = <1000>;
 			thermal-sensors = <&tsc 2>;
+			sustainable-power = <2439>;
 
 			trips {
+				target: trip-point1 {
+					/* miliCelsius  */
+					temperature = <100000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+
 				sensor3_crit: sensor3-crit {
 					temperature = <120000>;
 					hysteresis = <1000>;
 					type = "critical";
 				};
 			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&a57_0 2 4>;
+					contribution = <1024>;
+				};
+			};
 		};
 	};
 
diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts
index b6d5332157..2afb91ec9c 100644
--- a/arch/arm/dts/r8a77970-eagle.dts
+++ b/arch/arm/dts/r8a77970-eagle.dts
@@ -19,14 +19,17 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory@48000000 {
-		device_type = "memory";
-		/* first 128MB is reserved for secure area. */
-		reg = <0x0 0x48000000 0x0 0x38000000>;
+	d3p3: regulator-fixed {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
 	};
 
 	hdmi-out {
@@ -40,15 +43,6 @@
 		};
 	};
 
-	d3p3: regulator-fixed {
-		compatible = "regulator-fixed";
-		regulator-name = "fixed-3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
 	lvds-decoder {
 		compatible = "thine,thc63lvd1024";
 
@@ -73,6 +67,12 @@
 			};
 		};
 	};
+
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x38000000>;
+	};
 };
 
 &avb {
@@ -102,6 +102,10 @@
 	};
 };
 
+&du {
+	status = "okay";
+};
+
 &extal_clk {
 	clock-frequency = <16666666>;
 };
@@ -157,6 +161,18 @@
 	};
 };
 
+&lvds0 {
+	status = "okay";
+
+	ports {
+		port@1 {
+			lvds0_out: endpoint {
+				remote-endpoint = <&thc63lvd1024_in>;
+			};
+		};
+	};
+};
+
 &pfc {
 	avb_pins: avb0 {
 		groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
@@ -190,19 +206,3 @@
 
 	status = "okay";
 };
-
-&du {
-	status = "okay";
-};
-
-&lvds0 {
-	status = "okay";
-
-	ports {
-		port@1 {
-			lvds0_out: endpoint {
-				remote-endpoint = <&thc63lvd1024_in>;
-			};
-		};
-	};
-};
diff --git a/arch/arm/dts/r8a77970.dtsi b/arch/arm/dts/r8a77970.dtsi
index 5b6164d4b8..664a73a2cc 100644
--- a/arch/arm/dts/r8a77970.dtsi
+++ b/arch/arm/dts/r8a77970.dtsi
@@ -302,8 +302,8 @@
 
 		thermal: thermal@e6190000 {
 			compatible = "renesas,thermal-r8a77970";
-			reg =  <0 0xe6190000 0 0x10
-				0 0xe6190100 0 0x120>;
+			reg = <0 0xe6190000 0 0x10>,
+			      <0 0xe6190100 0 0x120>;
 			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
@@ -318,12 +318,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -652,7 +652,7 @@
 		};
 
 		pwm3: pwm@e6e33000 {
-			compatible = "renesas,pwm-r8a7790", "renesas,pwm-rcar";
+			compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
 			reg = <0 0xe6e33000 0 8>;
 			#pwm-cells = <2>;
 			clocks = <&cpg CPG_MOD 523>;
@@ -933,15 +933,15 @@
 			compatible = "renesas,dmac-r8a77970",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7";
@@ -961,15 +961,15 @@
 			compatible = "renesas,dmac-r8a77970",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7";
@@ -1035,6 +1035,7 @@
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
 			max-frequency = <200000000>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -1120,7 +1121,7 @@
 			clock-names = "du.0";
 			power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
 			resets = <&cpg 724>;
-			vsps = <&vspd0>;
+			vsps = <&vspd0 0>;
 			status = "disabled";
 
 			ports {
@@ -1181,6 +1182,9 @@
 			polling-delay = <1000>;
 			thermal-sensors = <&thermal>;
 
+			cooling-maps {
+			};
+
 			trips {
 				cpu-crit {
 					temperature = <120000>;
@@ -1188,9 +1192,6 @@
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-			};
 		};
 	};
 
diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts
index 5a7012be0d..3dde028e22 100644
--- a/arch/arm/dts/r8a77980-condor.dts
+++ b/arch/arm/dts/r8a77980-condor.dts
@@ -22,35 +22,20 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory@48000000 {
-		device_type = "memory";
-		/* first 128MB is reserved for secure area. */
-		reg = <0 0x48000000 0 0x78000000>;
-	};
-
-	d3_3v: regulator-0 {
-		compatible = "regulator-fixed";
-		regulator-name = "D3.3V";
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	vddq_vin01: regulator-1 {
+	d1_8v: regulator-2 {
 		compatible = "regulator-fixed";
-		regulator-name = "VDDQ_VIN01";
+		regulator-name = "D1.8V";
 		regulator-min-microvolt = <1800000>;
 		regulator-max-microvolt = <1800000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
 
-	d1_8v: regulator-2 {
+	d3_3v: regulator-0 {
 		compatible = "regulator-fixed";
-		regulator-name = "D1.8V";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
+		regulator-name = "D3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
@@ -90,6 +75,21 @@
 		};
 	};
 
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0 0x48000000 0 0x78000000>;
+	};
+
+	vddq_vin01: regulator-1 {
+		compatible = "regulator-fixed";
+		regulator-name = "VDDQ_VIN01";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
 	x1_clk: x1-clock {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
diff --git a/arch/arm/dts/r8a77980.dtsi b/arch/arm/dts/r8a77980.dtsi
index a901a341dc..b340fb4699 100644
--- a/arch/arm/dts/r8a77980.dtsi
+++ b/arch/arm/dts/r8a77980.dtsi
@@ -348,12 +348,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -1174,23 +1174,23 @@
 			compatible = "renesas,dmac-r8a77980",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1216,23 +1216,23 @@
 			compatible = "renesas,dmac-r8a77980",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					  "ch0", "ch1", "ch2", "ch3",
 					  "ch4", "ch5", "ch6", "ch7",
@@ -1299,9 +1299,9 @@
 			#iommu-cells = <1>;
 		};
 
-		ipmmu_vc0: mmu@fe6b0000 {
+		ipmmu_vc0: mmu@fe990000 {
 			compatible = "renesas,ipmmu-r8a77980";
-			reg = <0 0xfe6b0000 0 0x1000>;
+			reg = <0 0xfe990000 0 0x1000>;
 			renesas,ipmmu-main = <&ipmmu_mm 12>;
 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 			#iommu-cells = <1>;
@@ -1338,6 +1338,7 @@
 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
 			max-frequency = <200000000>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -1366,21 +1367,17 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <
-				0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000
-				0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000
-				0x02000000 0 0x30000000 0 0x30000000 0 0x8000000
-				0x42000000 0 0x38000000 0 0x38000000 0 0x8000000
-			>;
-			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000
-				      0 0x80000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
+			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 			interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 0>;
-			interrupt-map = <0 0 0 0 &gic GIC_SPI 148
-					 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
 			clock-names = "pcie", "pcie_bus";
 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
@@ -1495,7 +1492,7 @@
 			clock-names = "du.0";
 			power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
 			resets = <&cpg 724>;
-			vsps = <&vspd0>;
+			vsps = <&vspd0 0>;
 			status = "disabled";
 
 			ports {
diff --git a/arch/arm/dts/r8a77990-ebisu.dts b/arch/arm/dts/r8a77990-ebisu.dts
index c727725899..07a4c9bbae 100644
--- a/arch/arm/dts/r8a77990-ebisu.dts
+++ b/arch/arm/dts/r8a77990-ebisu.dts
@@ -19,16 +19,10 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory@48000000 {
-		device_type = "memory";
-		/* first 128MB is reserved for secure area. */
-		reg = <0x0 0x48000000 0x0 0x38000000>;
-	};
-
 	audio_clkout: audio-clkout {
 		/*
 		 * This is same as <&rcar_sound 0>
@@ -107,36 +101,10 @@
 		};
 	};
 
-	vga {
-		compatible = "vga-connector";
-
-		port {
-			vga_in: endpoint {
-				remote-endpoint = <&adv7123_out>;
-			};
-		};
-	};
-
-	vga-encoder {
-		compatible = "adi,adv7123";
-
-		ports {
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			port@0 {
-				reg = <0>;
-				adv7123_in: endpoint {
-					remote-endpoint = <&du_out_rgb>;
-				};
-			};
-			port@1 {
-				reg = <1>;
-				adv7123_out: endpoint {
-					remote-endpoint = <&vga_in>;
-				};
-			};
-		};
+	memory@48000000 {
+		device_type = "memory";
+		/* first 128MB is reserved for secure area. */
+		reg = <0x0 0x48000000 0x0 0x38000000>;
 	};
 
 	reg_1p8v: regulator0 {
@@ -157,15 +125,13 @@
 		regulator-always-on;
 	};
 
-	vbus0_usb2: regulator-vbus0-usb2 {
+	reg_12p0v: regulator2 {
 		compatible = "regulator-fixed";
-
-		regulator-name = "USB20_VBUS_CN";
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-
-		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
-		enable-active-high;
+		regulator-name = "D12.0V";
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		regulator-boot-on;
+		regulator-always-on;
 	};
 
 	rsnd_ak4613: sound {
@@ -176,34 +142,24 @@
 		simple-audio-card,bitclock-master = <&sndcpu>;
 		simple-audio-card,frame-master = <&sndcpu>;
 
-		sndcpu: simple-audio-card,cpu {
-			sound-dai = <&rcar_sound>;
-		};
-
 		sndcodec: simple-audio-card,codec {
 			sound-dai = <&ak4613>;
 		};
-	};
 
-	x12_clk: x12 {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <24576000>;
+		sndcpu: simple-audio-card,cpu {
+			sound-dai = <&rcar_sound>;
+		};
 	};
 
-	reg_12p0v: regulator2 {
+	vbus0_usb2: regulator-vbus0-usb2 {
 		compatible = "regulator-fixed";
-		regulator-name = "D12.0V";
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-		regulator-boot-on;
-		regulator-always-on;
-	};
 
-	x13_clk: x13 {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <74250000>;
+		regulator-name = "USB20_VBUS_CN";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
 	};
 
 	vcc_sdhi0: regulator-vcc-sdhi0 {
@@ -226,8 +182,7 @@
 
 		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi1: regulator-vcc-sdhi1 {
@@ -250,8 +205,51 @@
 
 		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
+	};
+
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
+	x12_clk: x12 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <24576000>;
+	};
+
+	x13_clk: x13 {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <74250000>;
 	};
 };
 
@@ -262,7 +260,6 @@
 &avb {
 	pinctrl-0 = <&avb_pins>;
 	pinctrl-names = "default";
-	renesas,no-ether-link;
 	phy-handle = <&phy0>;
 	status = "okay";
 
@@ -272,6 +269,14 @@
 		interrupt-parent = <&gpio2>;
 		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
 		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+		/*
+		 * TX clock internal delay mode is required for reliable
+		 * 1Gbps communication using the KSZ9031RNX phy present on
+		 * the Ebisu board, however, TX clock internal delay mode
+		 * isn't supported on r8a77990.  Thus, limit speed to
+		 * 100Mbps for reliable communication.
+		 */
+		max-speed = <100>;
 	};
 };
 
@@ -548,6 +553,11 @@
 		function = "pwm5";
 	};
 
+	scif2_pins: scif2 {
+		groups = "scif2_data_a";
+		function = "scif2";
+	};
+
 	sdhi0_pins: sd0 {
 		groups = "sdhi0_data4", "sdhi0_ctrl";
 		function = "sdhi0";
@@ -578,20 +588,15 @@
 		power-source = <1800>;
 	};
 
-	sound_pins: sound {
-		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
-		function = "ssi";
-	};
-
 	sound_clk_pins: sound_clk {
 		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
 			 "audio_clkout_a", "audio_clkout1_a";
 		function = "audio_clk";
 	};
 
-	scif2_pins: scif2 {
-		groups = "scif2_data_a";
-		function = "scif2";
+	sound_pins: sound {
+		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
+		function = "ssi";
 	};
 
 	usb0_pins: usb {
@@ -629,7 +634,6 @@
 	/* audio_clkout0/1/2/3 */
 	#clock-cells = <1>;
 	clock-frequency = <12288000 11289600>;
-	clkout-lr-synchronous;
 
 	status = "okay";
 
@@ -672,38 +676,6 @@
 	status = "okay";
 };
 
-&ssi1 {
-	shared-pin;
-};
-
-&usb2_phy0 {
-	pinctrl-0 = <&usb0_pins>;
-	pinctrl-names = "default";
-
-	vbus-supply = <&vbus0_usb2>;
-	status = "okay";
-};
-
-&usb3_peri0 {
-	companion = <&xhci0>;
-	status = "okay";
-};
-
-&vin4 {
-	status = "okay";
-};
-
-&vin5 {
-	status = "okay";
-};
-
-&xhci0 {
-	pinctrl-0 = <&usb30_pins>;
-	pinctrl-names = "default";
-
-	status = "okay";
-};
-
 &sdhi0 {
 	pinctrl-0 = <&sdhi0_pins>;
 	pinctrl-1 = <&sdhi0_pins_uhs>;
@@ -741,9 +713,42 @@
 
 	vmmc-supply = <&reg_3p3v>;
 	vqmmc-supply = <&reg_1p8v>;
+	mmc-ddr-1_8v;
 	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
 	bus-width = <8>;
 	non-removable;
 	status = "okay";
 };
+
+&ssi1 {
+	shared-pin;
+};
+
+&usb2_phy0 {
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+
+	vbus-supply = <&vbus0_usb2>;
+	status = "okay";
+};
+
+&usb3_peri0 {
+	companion = <&xhci0>;
+	status = "okay";
+};
+
+&vin4 {
+	status = "okay";
+};
+
+&vin5 {
+	status = "okay";
+};
+
+&xhci0 {
+	pinctrl-0 = <&usb30_pins>;
+	pinctrl-names = "default";
+
+	status = "okay";
+};
diff --git a/arch/arm/dts/r8a77990.dtsi b/arch/arm/dts/r8a77990.dtsi
index 56cb566ffa..32d91f2102 100644
--- a/arch/arm/dts/r8a77990.dtsi
+++ b/arch/arm/dts/r8a77990.dtsi
@@ -84,9 +84,11 @@
 			compatible = "arm,cortex-a53";
 			reg = <0>;
 			device_type = "cpu";
+			#cooling-cells = <2>;
 			power-domains = <&sysc R8A77990_PD_CA53_CPU0>;
 			next-level-cache = <&L2_CA53>;
 			enable-method = "psci";
+			dynamic-power-coefficient = <277>;
 			clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
 			operating-points-v2 = <&cluster1_opp>;
 		};
@@ -392,12 +394,12 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
@@ -630,7 +632,7 @@
 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 704>, <&cpg 703>;
@@ -641,8 +643,8 @@
 			compatible = "renesas,r8a77990-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
@@ -655,8 +657,8 @@
 			compatible = "renesas,r8a77990-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
@@ -669,23 +671,23 @@
 			compatible = "renesas,dmac-r8a77990",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x10000>;
-			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -711,23 +713,23 @@
 			compatible = "renesas,dmac-r8a77990",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -753,23 +755,23 @@
 			compatible = "renesas,dmac-r8a77990",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1324,6 +1326,17 @@
 				      "ssi.1", "ssi.0";
 			status = "disabled";
 
+			rcar_sound,ctu {
+				ctu00: ctu-0 { };
+				ctu01: ctu-1 { };
+				ctu02: ctu-2 { };
+				ctu03: ctu-3 { };
+				ctu10: ctu-4 { };
+				ctu11: ctu-5 { };
+				ctu12: ctu-6 { };
+				ctu13: ctu-7 { };
+			};
+
 			rcar_sound,dvc {
 				dvc0: dvc-0 {
 					dmas = <&audma0 0xbc>;
@@ -1340,17 +1353,6 @@
 				mix1: mix-1 { };
 			};
 
-			rcar_sound,ctu {
-				ctu00: ctu-0 { };
-				ctu01: ctu-1 { };
-				ctu02: ctu-2 { };
-				ctu03: ctu-3 { };
-				ctu10: ctu-4 { };
-				ctu11: ctu-5 { };
-				ctu12: ctu-6 { };
-				ctu13: ctu-7 { };
-			};
-
 			rcar_sound,src {
 				src0: src-0 {
 					interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
@@ -1472,23 +1474,23 @@
 			compatible = "renesas,dmac-r8a77990",
 				     "renesas,rcar-dmac";
 			reg = <0 0xec700000 0 0x10000>;
-			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7",
@@ -1537,7 +1539,7 @@
 			reg = <0 0xee080000 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
@@ -1549,7 +1551,7 @@
 			reg = <0 0xee080100 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
@@ -1565,7 +1567,7 @@
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -1578,6 +1580,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 314>;
+			iommus = <&ipmmu_ds1 32>;
 			status = "disabled";
 		};
 
@@ -1590,6 +1593,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 313>;
+			iommus = <&ipmmu_ds1 33>;
 			status = "disabled";
 		};
 
@@ -1602,6 +1606,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
 			resets = <&cpg 311>;
+			iommus = <&ipmmu_ds1 35>;
 			status = "disabled";
 		};
 
@@ -1630,10 +1635,10 @@
 			#size-cells = <2>;
 			bus-range = <0x00 0xff>;
 			device_type = "pci";
-			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
-				  0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
-				  0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
-				  0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
+			ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
+				 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
+				 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
+				 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
 			/* Map all possible DDR as inbound ranges */
 			dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
@@ -1725,6 +1730,24 @@
 			iommus = <&ipmmu_vi0 9>;
 		};
 
+		cmm0: cmm@fea40000 {
+			compatible = "renesas,r8a77990-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea40000 0 0x1000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 711>;
+			resets = <&cpg 711>;
+		};
+
+		cmm1: cmm@fea50000 {
+			compatible = "renesas,r8a77990-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea50000 0 0x1000>;
+			power-domains = <&sysc R8A77990_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 710>;
+			resets = <&cpg 710>;
+		};
+
 		csi40: csi2@feaa0000 {
 			compatible = "renesas,r8a77990-csi2";
 			reg = <0 0xfeaa0000 0 0x10000>;
@@ -1758,13 +1781,18 @@
 
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a77990";
-			reg = <0 0xfeb00000 0 0x80000>;
+			reg = <0 0xfeb00000 0 0x40000>;
 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 724>,
 				 <&cpg CPG_MOD 723>;
 			clock-names = "du.0", "du.1";
-			vsps = <&vspd0 0 &vspd1 0>;
+			resets = <&cpg 724>;
+			reset-names = "du.0";
+
+			renesas,cmms = <&cmm0>, <&cmm1>;
+			vsps = <&vspd0 0>, <&vspd1 0>;
+
 			status = "disabled";
 
 			ports {
@@ -1801,6 +1829,8 @@
 			resets = <&cpg 727>;
 			status = "disabled";
 
+			renesas,companion = <&lvds1>;
+
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -1856,18 +1886,30 @@
 	thermal-zones {
 		cpu-thermal {
 			polling-delay-passive = <250>;
-			polling-delay = <1000>;
-			thermal-sensors = <&thermal>;
+			polling-delay = <0>;
+			thermal-sensors = <&thermal 0>;
+			sustainable-power = <717>;
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&a53_0 0 2>;
+					contribution = <1024>;
+				};
+			};
 
 			trips {
-				cpu-crit {
+				sensor1_crit: sensor1-crit {
 					temperature = <120000>;
 					hysteresis = <2000>;
 					type = "critical";
 				};
-			};
 
-			cooling-maps {
+				target: trip-point1 {
+					temperature = <100000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
 			};
 		};
 	};
diff --git a/arch/arm/dts/r8a77995-draak.dts b/arch/arm/dts/r8a77995-draak.dts
index a7dc11e36f..67634cb01d 100644
--- a/arch/arm/dts/r8a77995-draak.dts
+++ b/arch/arm/dts/r8a77995-draak.dts
@@ -19,11 +19,6 @@
 		ethernet0 = &avb;
 	};
 
-	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
-		stdout-path = "serial0:115200n8";
-	};
-
 	backlight: backlight {
 		compatible = "pwm-backlight";
 		pwms = <&pwm1 0 50000>;
@@ -35,6 +30,11 @@
 		enable-gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
 	};
 
+	chosen {
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
+		stdout-path = "serial0:115200n8";
+	};
+
 	composite-in {
 		compatible = "composite-video-connector";
 
@@ -97,7 +97,7 @@
 		reg = <0x0 0x48000000 0x0 0x18000000>;
 	};
 
-	reg_1p8v: regulator0 {
+	reg_1p8v: regulator-1p8v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-1.8V";
 		regulator-min-microvolt = <1800000>;
@@ -106,7 +106,7 @@
 		regulator-always-on;
 	};
 
-	reg_3p3v: regulator1 {
+	reg_3p3v: regulator-3p3v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";
 		regulator-min-microvolt = <3300000>;
@@ -115,7 +115,7 @@
 		regulator-always-on;
 	};
 
-	reg_12p0v: regulator1 {
+	reg_12p0v: regulator-12p0v {
 		compatible = "regulator-fixed";
 		regulator-name = "D12.0V";
 		regulator-min-microvolt = <12000000>;
@@ -175,6 +175,14 @@
 		reg = <0>;
 		interrupt-parent = <&gpio5>;
 		interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
+		/*
+		 * TX clock internal delay mode is required for reliable
+		 * 1Gbps communication using the KSZ9031RNX phy present on
+		 * the Draak board, however, TX clock internal delay mode
+		 * isn't supported on r8a77995.  Thus, limit speed to
+		 * 100Mbps for reliable communication.
+		 */
+		max-speed = <100>;
 	};
 };
 
@@ -511,12 +519,7 @@
 	status = "okay";
 
 	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-
+		port {
 			vin4_in: endpoint {
 				remote-endpoint = <&adv7180_out>;
 			};
diff --git a/arch/arm/dts/r8a77995.dtsi b/arch/arm/dts/r8a77995.dtsi
index 5bf3af246e..9503007c34 100644
--- a/arch/arm/dts/r8a77995.dtsi
+++ b/arch/arm/dts/r8a77995.dtsi
@@ -231,52 +231,17 @@
 			#interrupt-cells = <2>;
 			interrupt-controller;
 			reg = <0 0xe61c0000 0 0x200>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 407>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 407>;
 		};
 
-		hscif0: serial@e6540000 {
-			compatible = "renesas,hscif-r8a77995",
-				     "renesas,rcar-gen3-hscif",
-				     "renesas,hscif";
-			reg = <0 0xe6540000 0 0x60>;
-			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 520>,
-				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
-				 <&scif_clk>;
-			clock-names = "fck", "brg_int", "scif_clk";
-			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
-			       <&dmac2 0x31>, <&dmac2 0x30>;
-			dma-names = "tx", "rx", "tx", "rx";
-			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
-			resets = <&cpg 520>;
-			status = "disabled";
-		};
-
-		hscif3: serial@e66a0000 {
-			compatible = "renesas,hscif-r8a77995",
-				     "renesas,rcar-gen3-hscif",
-				     "renesas,hscif";
-			reg = <0 0xe66a0000 0 0x60>;
-			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cpg CPG_MOD 517>,
-				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
-				 <&scif_clk>;
-			clock-names = "fck", "brg_int", "scif_clk";
-			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
-			dma-names = "tx", "rx";
-			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
-			resets = <&cpg 517>;
-			status = "disabled";
-		};
-
 		i2c0: i2c@e6500000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -344,6 +309,41 @@
 			status = "disabled";
 		};
 
+		hscif0: serial@e6540000 {
+			compatible = "renesas,hscif-r8a77995",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe6540000 0 0x60>;
+			interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 520>,
+				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+			       <&dmac2 0x31>, <&dmac2 0x30>;
+			dma-names = "tx", "rx", "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 520>;
+			status = "disabled";
+		};
+
+		hscif3: serial@e66a0000 {
+			compatible = "renesas,hscif-r8a77995",
+				     "renesas,rcar-gen3-hscif",
+				     "renesas,hscif";
+			reg = <0 0xe66a0000 0 0x60>;
+			interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 517>,
+				 <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
+				 <&scif_clk>;
+			clock-names = "fck", "brg_int", "scif_clk";
+			dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+			dma-names = "tx", "rx";
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			resets = <&cpg 517>;
+			status = "disabled";
+		};
+
 		hsusb: usb@e6590000 {
 			compatible = "renesas,usbhs-r8a77995",
 				     "renesas,rcar-gen3-usbhs";
@@ -354,7 +354,7 @@
 			       <&usb_dmac1 0>, <&usb_dmac1 1>;
 			dma-names = "ch0", "ch1", "ch2", "ch3";
 			renesas,buswait = <11>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 3>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 704>, <&cpg 703>;
@@ -365,8 +365,8 @@
 			compatible = "renesas,r8a77995-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65a0000 0 0x100>;
-			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 330>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
@@ -379,8 +379,8 @@
 			compatible = "renesas,r8a77995-usb-dmac",
 				     "renesas,usb-dmac";
 			reg = <0 0xe65b0000 0 0x100>;
-			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "ch0", "ch1";
 			clocks = <&cpg CPG_MOD 331>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
@@ -418,15 +418,15 @@
 			compatible = "renesas,dmac-r8a77995",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe6700000 0 0x10000>;
-			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7";
@@ -446,15 +446,15 @@
 			compatible = "renesas,dmac-r8a77995",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7300000 0 0x10000>;
-			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7";
@@ -474,15 +474,15 @@
 			compatible = "renesas,dmac-r8a77995",
 				     "renesas,rcar-dmac";
 			reg = <0 0xe7310000 0 0x10000>;
-			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
+			interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "error",
 					"ch0", "ch1", "ch2", "ch3",
 					"ch4", "ch5", "ch6", "ch7";
@@ -875,7 +875,7 @@
 			reg = <0 0xee080000 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 1>;
 			phy-names = "usb";
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
@@ -887,7 +887,7 @@
 			reg = <0 0xee080100 0 0x100>;
 			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
-			phys = <&usb2_phy0>;
+			phys = <&usb2_phy0 2>;
 			phy-names = "usb";
 			companion = <&ohci0>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
@@ -903,7 +903,7 @@
 			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 703>, <&cpg 704>;
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			status = "disabled";
 		};
 
@@ -916,6 +916,7 @@
 			max-frequency = <200000000>;
 			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
 			resets = <&cpg 312>;
+			iommus = <&ipmmu_ds1 34>;
 			status = "disabled";
 		};
 
@@ -993,15 +994,38 @@
 			iommus = <&ipmmu_vi0 9>;
 		};
 
+		cmm0: cmm@fea40000 {
+			compatible = "renesas,r8a77995-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea40000 0 0x1000>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 711>;
+			resets = <&cpg 711>;
+		};
+
+		cmm1: cmm@fea50000 {
+			compatible = "renesas,r8a77995-cmm",
+				     "renesas,rcar-gen3-cmm";
+			reg = <0 0xfea50000 0 0x1000>;
+			power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+			clocks = <&cpg CPG_MOD 710>;
+			resets = <&cpg 710>;
+		};
+
 		du: display@feb00000 {
 			compatible = "renesas,du-r8a77995";
-			reg = <0 0xfeb00000 0 0x80000>;
+			reg = <0 0xfeb00000 0 0x40000>;
 			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&cpg CPG_MOD 724>,
 				 <&cpg CPG_MOD 723>;
 			clock-names = "du.0", "du.1";
-			vsps = <&vspd0 0 &vspd1 0>;
+			resets = <&cpg 724>;
+			reset-names = "du.0";
+
+			renesas,cmms = <&cmm0>, <&cmm1>;
+			vsps = <&vspd0 0>, <&vspd1 0>;
+
 			status = "disabled";
 
 			ports {
@@ -1038,6 +1062,8 @@
 			resets = <&cpg 727>;
 			status = "disabled";
 
+			renesas,companion = <&lvds1>;
+
 			ports {
 				#address-cells = <1>;
 				#size-cells = <0>;
@@ -1096,6 +1122,9 @@
 			polling-delay = <1000>;
 			thermal-sensors = <&thermal>;
 
+			cooling-maps {
+			};
+
 			trips {
 				cpu-crit {
 					temperature = <120000>;
@@ -1103,9 +1132,6 @@
 					type = "critical";
 				};
 			};
-
-			cooling-maps {
-			};
 		};
 	};
 
diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi
index 4a827063c5..4bfa0c2330 100644
--- a/arch/arm/dts/rk3328-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi
@@ -6,6 +6,45 @@
 #include "rk3328-u-boot.dtsi"
 #include "rk3328-sdram-ddr3-666.dtsi"
 
+/{
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
+	vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vcc5v0_host_xhci";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+};
+
+&gmac2io {
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	clock_in_out = "input";
+	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_pins>;
+	tx_delay = <0x26>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
+&gmac2phy {
+	/* Integrated PHY unsupported by U-boot */
+	status = "broken";
+};
+
 &usb_host0_xhci {
 	vbus-supply = <&vcc5v0_host_xhci>;
 	status = "okay";
diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts
index a2ee838fcd..6abc6f4a86 100644
--- a/arch/arm/dts/rk3328-evb.dts
+++ b/arch/arm/dts/rk3328-evb.dts
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 /dts-v1/;
@@ -11,40 +11,51 @@
 	compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
 
 	chosen {
-		stdout-path = &uart2;
+		stdout-path = "serial2:1500000n8";
 	};
 
-	gmac_clkin: external-gmac-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "gmac_clkin";
-		#clock-cells = <0>;
-	};
-
-	vcc3v3_sdmmc: sdmmc-pwren {
+	dc_12v: dc-12v {
 		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3";
-		gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
+		regulator-name = "dc_12v";
 		regulator-always-on;
 		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
 	};
 
-	vcc5v0_otg: vcc5v0-otg-drv {
+	vcc_sd: sdmmc-regulator {
 		compatible = "regulator-fixed";
-		enable-active-high;
-		regulator-name = "vcc5v0_otg";
-		gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
+		gpio = <&gpio0 30 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0m1_gpio>;
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_io>;
 	};
 
-	vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
+	vcc_sys: vcc-sys {
 		compatible = "regulator-fixed";
-		enable-active-high;
-		regulator-name = "vcc5v0_host_xhci";
-		gpio = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vcc_sys";
+		regulator-always-on;
+		regulator-boot-on;
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
+		vin-supply = <&dc_12v>;
 	};
 
 	vcc_phy: vcc-phy-regulator {
@@ -55,96 +66,60 @@
 	};
 };
 
-&saradc {
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	card-detect-delay = <200>;
-	disable-wp;
-	num-slots = <1>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
-	status = "okay";
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
 };
 
 &emmc {
 	bus-width = <8>;
 	cap-mmc-highspeed;
-	supports-emmc;
-	disable-wp;
 	non-removable;
-	num-slots = <1>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
 	status = "okay";
 };
 
-&gmac2io {
+&gmac2phy {
 	phy-supply = <&vcc_phy>;
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
-	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmiim1_pins>;
-	tx_delay = <0x26>;
-	rx_delay = <0x11>;
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
+	clock_in_out = "output";
+	assigned-clocks = <&cru SCLK_MAC2PHY_SRC>;
+	assigned-clock-rate = <50000000>;
+	assigned-clocks = <&cru SCLK_MAC2PHY>;
+	assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>;
 
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb20_otg {
-	vbus-supply = <&vcc5v0_otg>;
-	status = "okay";
 };
 
 &i2c1 {
-	clock-frequency = <400000>;
-	i2c-scl-rising-time-ns = <168>;
-	i2c-scl-falling-time-ns = <4>;
 	status = "okay";
 
 	rk805: pmic@18 {
 		compatible = "rockchip,rk805";
-		status = "okay";
 		reg = <0x18>;
 		interrupt-parent = <&gpio2>;
 		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+		gpio-controller;
+		#gpio-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pmic_int_l>;
 		rockchip,system-power-controller;
 		wakeup-source;
-		gpio-controller;
-		#gpio-cells = <2>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk805-clkout2";
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc5-supply = <&vcc_io>;
+		vcc6-supply = <&vcc_io>;
 
 		regulators {
 			vdd_logic: DCDC_REG1 {
 				regulator-name = "vdd_logic";
 				regulator-min-microvolt = <712500>;
 				regulator-max-microvolt = <1450000>;
-				regulator-ramp-delay = <6001>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1000000>;
@@ -155,19 +130,18 @@
 				regulator-name = "vdd_arm";
 				regulator-min-microvolt = <712500>;
 				regulator-max-microvolt = <1450000>;
-				regulator-ramp-delay = <6001>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1000000>;
+					regulator-suspend-microvolt = <950000>;
 				};
 			};
 
 			vcc_ddr: DCDC_REG3 {
 				regulator-name = "vcc_ddr";
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 				};
@@ -177,32 +151,32 @@
 				regulator-name = "vcc_io";
 				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <3300000>;
 				};
 			};
 
-			vdd_18: LDO_REG1 {
-				regulator-name = "vdd_18";
+			vcc_18: LDO_REG1 {
+				regulator-name = "vcc_18";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1800000>;
 				};
 			};
 
-			vcc_18emmc: LDO_REG2 {
-				regulator-name = "vcc_18emmc";
+			vcc18_emmc: LDO_REG2 {
+				regulator-name = "vcc18_emmc";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1800000>;
@@ -213,8 +187,8 @@
 				regulator-name = "vdd_10";
 				regulator-min-microvolt = <1000000>;
 				regulator-max-microvolt = <1000000>;
-				regulator-boot-on;
 				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1000000>;
@@ -227,9 +201,71 @@
 &pinctrl {
 	pmic {
 		pmic_int_l: pmic-int-l {
+			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
 		rockchip,pins =
-			<2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;	/* gpio2_a6 */
+			<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 };
 
+&sdio {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	max-frequency = <150000000>;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+	vmmc-supply = <&vcc_sd>;
+	status = "okay";
+};
+
+&tsadc {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
new file mode 100644
index 0000000000..e929d86e30
--- /dev/null
+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk3328-u-boot.dtsi"
+#include "rk3328-sdram-ddr4-666.dtsi"
+/ {
+	chosen {
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
+	};
+};
+
+&gpio0 {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+};
+
+&sdmmc0m1_gpio {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+	u-boot,dm-spl;
+};
+
+&usb_host0_xhci {
+	vbus-supply = <&vcc_host1_5v>;
+	status = "okay";
+};
+
+/*
+ * This makes XHCI responsible for toggling VBUS. This is needed to work
+ * around an issue where either XHCI only works with USB 2.0 or OTG doesn't
+ * work, depending on how VBUS is configured. Having USB 3.0 seems better.
+ */
+&vcc_host1_5v {
+	/delete-property/ regulator-always-on;
+};
+
+/* Need this and all the pinctrl/gpio stuff above to set pinmux */
+&vcc_sd {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3328-roc-cc.dts b/arch/arm/dts/rk3328-roc-cc.dts
new file mode 100644
index 0000000000..8d553c9218
--- /dev/null
+++ b/arch/arm/dts/rk3328-roc-cc.dts
@@ -0,0 +1,354 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
+ */
+
+/dts-v1/;
+#include "rk3328.dtsi"
+
+/ {
+	model = "Firefly roc-rk3328-cc";
+	compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	gmac_clkin: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "gmac_clkin";
+		#clock-cells = <0>;
+	};
+
+	dc_12v: dc-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_12v";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	vcc_sd: sdmmc-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0m1_gpio>;
+		regulator-boot-on;
+		regulator-name = "vcc_sd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_io>;
+	};
+
+	vcc_sdio: sdmmcio-regulator {
+		compatible = "regulator-gpio";
+		gpios = <&grf_gpio 0 GPIO_ACTIVE_HIGH>;
+		states = <1800000 0x1
+			  3300000 0x0>;
+		regulator-name = "vcc_sdio";
+		regulator-type = "voltage";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb20_host_drv>;
+		regulator-name = "vcc_host1_5v";
+		regulator-always-on;
+		vin-supply = <&vcc_sys>;
+	};
+
+	vcc_sys: vcc-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&dc_12v>;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "firefly:blue:power";
+			linux,default-trigger = "heartbeat";
+			gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+			mode = <0x23>;
+		};
+
+		user {
+			label = "firefly:yellow:user";
+			linux,default-trigger = "mmc1";
+			gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
+			default-state = "off";
+			mode = <0x05>;
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu2 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&cpu3 {
+	cpu-supply = <&vdd_arm>;
+};
+
+&emmc {
+	bus-width = <8>;
+	cap-mmc-highspeed;
+	max-frequency = <150000000>;
+	mmc-ddr-1_8v;
+	mmc-hs200-1_8v;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
+	vmmc-supply = <&vcc_io>;
+	vqmmc-supply = <&vcc18_emmc>;
+	status = "okay";
+};
+
+&gmac2io {
+	assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
+	assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
+	clock_in_out = "input";
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmiim1_pins>;
+	snps,aal;
+	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	snps,rxpbl = <0x4>;
+	snps,txpbl = <0x4>;
+	tx_delay = <0x24>;
+	rx_delay = <0x18>;
+	status = "okay";
+};
+
+&hdmi {
+	status = "okay";
+};
+
+&hdmiphy {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+
+	rk805: pmic@18 {
+		compatible = "rockchip,rk805";
+		reg = <0x18>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk805-clkout2";
+		gpio-controller;
+		#gpio-cells = <2>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc5-supply = <&vcc_io>;
+		vcc6-supply = <&vcc_io>;
+
+		regulators {
+			vdd_logic: DCDC_REG1 {
+				regulator-name = "vdd_logic";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+
+			vdd_arm: DCDC_REG2 {
+				regulator-name = "vdd_arm";
+				regulator-min-microvolt = <712500>;
+				regulator-max-microvolt = <1450000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <950000>;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_io: DCDC_REG4 {
+				regulator-name = "vcc_io";
+				regulator-min-microvolt = <3300000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3300000>;
+				};
+			};
+
+			vcc_18: LDO_REG1 {
+				regulator-name = "vcc_18";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc18_emmc: LDO_REG2 {
+				regulator-name = "vcc18_emmc";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vdd_10: LDO_REG3 {
+				regulator-name = "vdd_10";
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <1000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1000000>;
+				};
+			};
+		};
+	};
+};
+
+&io_domains {
+	status = "okay";
+
+	vccio1-supply = <&vcc_io>;
+	vccio2-supply = <&vcc18_emmc>;
+	vccio3-supply = <&vcc_sdio>;
+	vccio4-supply = <&vcc_18>;
+	vccio5-supply = <&vcc_io>;
+	vccio6-supply = <&vcc_io>;
+	pmuio-supply = <&vcc_io>;
+};
+
+&pinctrl {
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	usb2 {
+		usb20_host_drv: usb20-host-drv {
+			rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc_sd>;
+	vqmmc-supply = <&vcc_sdio>;
+	status = "okay";
+};
+
+&tsadc {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_host {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usb20_otg {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&vop {
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
index e5946d2d2d..f076075076 100644
--- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi
@@ -11,6 +11,38 @@
 	};
 };
 
+&gpio0 {
+	u-boot,dm-spl;
+};
+
+&pinctrl {
+	u-boot,dm-spl;
+};
+
+&sdmmc0m1_gpio {
+	u-boot,dm-spl;
+};
+
+&pcfg_pull_up_4ma {
+	u-boot,dm-spl;
+};
+
 &usb_host0_xhci {
+	vbus-supply = <&vcc_host_5v>;
 	status = "okay";
 };
+
+/*
+ * This makes XHCI responsible for toggling VBUS. This is needed to work
+ * around an issue where either XHCI only works with USB 2.0 or OTG doesn't
+ * work, depending on how VBUS is configured. Having USB 3.0 seems better.
+ */
+&vcc_host_5v {
+	/delete-property/ regulator-always-on;
+	/delete-property/ regulator-boot-on;
+};
+
+/* Need this and all the pinctrl/gpio stuff above to set pinmux */
+&vcc_sd {
+	u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/rk3328-rock64.dts b/arch/arm/dts/rk3328-rock64.dts
index a78eb4ac6f..ebf3eb222e 100644
--- a/arch/arm/dts/rk3328-rock64.dts
+++ b/arch/arm/dts/rk3328-rock64.dts
@@ -43,6 +43,17 @@
 		vin-supply = <&vcc_sys>;
 	};
 
+	vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
+		compatible = "regulator-fixed";
+		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&usb20_host_drv>;
+		regulator-name = "vcc_host1_5v";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc_sys>;
+	};
+
 	vcc_sys: vcc-sys {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc_sys";
@@ -51,6 +62,56 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+
+	ir-receiver {
+		compatible = "gpio-ir-receiver";
+		gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&ir_int>;
+		pinctrl-names = "default";
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power {
+			gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "mmc0";
+		};
+
+		standby {
+			gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "heartbeat";
+		};
+	};
+
+	sound {
+		compatible = "audio-graph-card";
+		label = "rockchip,rk3328";
+		dais = <&i2s1_p0
+			&spdif_p0>;
+	};
+
+	spdif-dit {
+		compatible = "linux,spdif-dit";
+		#sound-dai-cells = <0>;
+
+		port {
+			dit_p0_0: endpoint {
+				remote-endpoint = <&spdif_p0_0>;
+			};
+		};
+	};
+};
+
+&codec {
+	mute-gpios = <&grf_gpio 0 GPIO_ACTIVE_LOW>;
+	status = "okay";
+
+	port@0 {
+		codec_p0_0: endpoint {
+			remote-endpoint = <&i2s1_p0_0>;
+		};
+	};
 };
 
 &cpu0 {
@@ -98,16 +159,26 @@
 	status = "okay";
 };
 
+&hdmi {
+	status = "okay";
+};
+
+&hdmiphy {
+	status = "okay";
+};
+
 &i2c1 {
 	status = "okay";
 
-	rk805: rk805@18 {
+	rk805: pmic@18 {
 		compatible = "rockchip,rk805";
 		reg = <0x18>;
 		interrupt-parent = <&gpio2>;
 		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
 		#clock-cells = <1>;
 		clock-output-names = "xin32k", "rk805-clkout2";
+		gpio-controller;
+		#gpio-cells = <2>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pmic_int_l>;
 		rockchip,system-power-controller;
@@ -169,7 +240,7 @@
 			};
 
 			vcc_18: LDO_REG1 {
-				regulator-name = "vdd_18";
+				regulator-name = "vcc_18";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
@@ -181,7 +252,7 @@
 			};
 
 			vcc18_emmc: LDO_REG2 {
-				regulator-name = "vcc_18emmc";
+				regulator-name = "vcc18_emmc";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
 				regulator-always-on;
@@ -207,6 +278,18 @@
 	};
 };
 
+&i2s1 {
+	status = "okay";
+
+	i2s1_p0: port {
+		i2s1_p0_0: endpoint {
+			dai-format = "i2s";
+			mclk-fs = <256>;
+			remote-endpoint = <&codec_p0_0>;
+		};
+	};
+};
+
 &io_domains {
 	status = "okay";
 
@@ -220,6 +303,12 @@
 };
 
 &pinctrl {
+	ir {
+		ir_int: ir-int {
+			rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -245,6 +334,17 @@
 	status = "okay";
 };
 
+&spdif {
+	pinctrl-0 = <&spdifm0_tx>;
+	status = "okay";
+
+	spdif_p0: port {
+		spdif_p0_0: endpoint {
+			remote-endpoint = <&dit_p0_0>;
+		};
+	};
+};
+
 &spi0 {
 	status = "okay";
 
@@ -257,10 +357,28 @@
 	};
 };
 
+&tsadc {
+	rockchip,hw-tshut-mode = <0>;
+	rockchip,hw-tshut-polarity = <0>;
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
 
+&u2phy {
+	status = "okay";
+
+	u2phy_host: host-port {
+		status = "okay";
+	};
+
+	u2phy_otg: otg-port {
+		status = "okay";
+	};
+};
+
 &usb20_otg {
 	dr_mode = "host";
 	status = "okay";
@@ -273,3 +391,11 @@
 &usb_host0_ohci {
 	status = "okay";
 };
+
+&vop {
+	status = "okay";
+};
+
+&vop_mmu {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index 6d5b3ec06e..c69e13e11e 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -62,3 +62,7 @@
 	/* mmc to sram can't do dma, prevent aborts transfering TF-A parts */
 	u-boot,spl-fifo-mode;
 };
+
+&usb20_otg {
+	hnp-srp-disable;
+};
diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi
index 060c84e6c0..945387e579 100644
--- a/arch/arm/dts/rk3328.dtsi
+++ b/arch/arm/dts/rk3328.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #include <dt-bindings/clock/rk3328-cru.h>
@@ -8,6 +8,9 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/power/rk3328-power.h>
+#include <dt-bindings/soc/rockchip,boot-mode.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3328";
@@ -24,9 +27,8 @@
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
 		i2c3 = &i2c3;
-		mmc0 = &emmc;
-		mmc1 = &sdmmc;
-		mmc2 = &sdmmc_ext;
+		ethernet0 = &gmac2io;
+		ethernet1 = &gmac2phy;
 	};
 
 	cpus {
@@ -35,29 +37,71 @@
 
 		cpu0: cpu@0 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x0>;
+			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SLEEP>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
-//			clocks = <&cru ARMCLK>;
+			next-level-cache = <&l2>;
 			operating-points-v2 = <&cpu0_opp_table>;
 		};
+
 		cpu1: cpu@1 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x1>;
+			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SLEEP>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
+			next-level-cache = <&l2>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
+
 		cpu2: cpu@2 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x2>;
+			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SLEEP>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
+			next-level-cache = <&l2>;
+			operating-points-v2 = <&cpu0_opp_table>;
 		};
+
 		cpu3: cpu@3 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x3>;
+			clocks = <&cru ARMCLK>;
+			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SLEEP>;
+			dynamic-power-coefficient = <120>;
 			enable-method = "psci";
+			next-level-cache = <&l2>;
+			operating-points-v2 = <&cpu0_opp_table>;
+		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP: cpu-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <120>;
+				exit-latency-us = <250>;
+				min-residency-us = <900>;
+			};
+		};
+
+		l2: l2-cache0 {
+			compatible = "cache";
 		};
 	};
 
@@ -65,39 +109,72 @@
 		compatible = "operating-points-v2";
 		opp-shared;
 
-		opp@408000000 {
+		opp-408000000 {
 			opp-hz = /bits/ 64 <408000000>;
 			opp-microvolt = <950000>;
 			clock-latency-ns = <40000>;
 			opp-suspend;
 		};
-		opp@600000000 {
+		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
 			opp-microvolt = <950000>;
 			clock-latency-ns = <40000>;
 		};
-		opp@816000000 {
+		opp-816000000 {
 			opp-hz = /bits/ 64 <816000000>;
 			opp-microvolt = <1000000>;
 			clock-latency-ns = <40000>;
 		};
-		opp@1008000000 {
+		opp-1008000000 {
 			opp-hz = /bits/ 64 <1008000000>;
 			opp-microvolt = <1100000>;
 			clock-latency-ns = <40000>;
 		};
-		opp@1200000000 {
+		opp-1200000000 {
 			opp-hz = /bits/ 64 <1200000000>;
 			opp-microvolt = <1225000>;
 			clock-latency-ns = <40000>;
 		};
-		opp@1296000000 {
+		opp-1296000000 {
 			opp-hz = /bits/ 64 <1296000000>;
 			opp-microvolt = <1300000>;
 			clock-latency-ns = <40000>;
 		};
 	};
 
+	amba: bus {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dmac: dmac@ff1f0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x0 0xff1f0000 0x0 0x4000>;
+			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru ACLK_DMAC>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+		};
+	};
+
+	analog_sound: analog-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,name = "Analog";
+		status = "disabled";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&codec>;
+		};
+	};
+
 	arm-pmu {
 		compatible = "arm,cortex-a53-pmu";
 		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
@@ -107,8 +184,29 @@
 		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_out>;
+	};
+
+	hdmi_sound: hdmi-sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <128>;
+		simple-audio-card,name = "HDMI";
+		status = "disabled";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s0>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&hdmi>;
+		};
+	};
+
 	psci {
-		compatible = "arm,psci-1.0";
+		compatible = "arm,psci-1.0", "arm,psci-0.2";
 		method = "smc";
 	};
 
@@ -134,8 +232,8 @@
 		clocks = <&cru SCLK_I2S0>, <&cru HCLK_I2S0_8CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 11>, <&dmac 12>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
@@ -146,8 +244,8 @@
 		clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 14>, <&dmac 15>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
@@ -158,16 +256,8 @@
 		clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
 		clock-names = "i2s_clk", "i2s_hclk";
 		dmas = <&dmac 0>, <&dmac 1>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
-		pinctrl-names = "default", "sleep";
-		pinctrl-0 = <&i2s2m0_mclk
-			     &i2s2m0_sclk
-			     &i2s2m0_lrcktx
-			     &i2s2m0_lrckrx
-			     &i2s2m0_sdo
-			     &i2s2m0_sdi>;
-		pinctrl-1 = <&i2s2m0_sleep>;
+		#sound-dai-cells = <0>;
 		status = "disabled";
 	};
 
@@ -178,10 +268,31 @@
 		clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF_8CH>;
 		clock-names = "mclk", "hclk";
 		dmas = <&dmac 10>;
-		#dma-cells = <1>;
 		dma-names = "tx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spdifm2_tx>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	pdm: pdm@ff040000 {
+		compatible = "rockchip,pdm";
+		reg = <0x0 0xff040000 0x0 0x1000>;
+		clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
+		clock-names = "pdm_clk", "pdm_hclk";
+		dmas = <&dmac 16>;
+		dma-names = "rx";
+		pinctrl-names = "default", "sleep";
+		pinctrl-0 = <&pdmm0_clk
+			     &pdmm0_sdi0
+			     &pdmm0_sdi1
+			     &pdmm0_sdi2
+			     &pdmm0_sdi3>;
+		pinctrl-1 = <&pdmm0_clk_sleep
+			     &pdmm0_sdi0_sleep
+			     &pdmm0_sdi1_sleep
+			     &pdmm0_sdi2_sleep
+			     &pdmm0_sdi3_sleep>;
 		status = "disabled";
 	};
 
@@ -193,6 +304,39 @@
 			compatible = "rockchip,rk3328-io-voltage-domain";
 			status = "disabled";
 		};
+
+		grf_gpio: grf-gpio {
+			compatible = "rockchip,rk3328-grf-gpio";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		power: power-controller {
+			compatible = "rockchip,rk3328-power-controller";
+			#power-domain-cells = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			pd_hevc@RK3328_PD_HEVC {
+				reg = <RK3328_PD_HEVC>;
+			};
+			pd_video@RK3328_PD_VIDEO {
+				reg = <RK3328_PD_VIDEO>;
+			};
+			pd_vpu@RK3328_PD_VPU {
+				reg = <RK3328_PD_VPU>;
+				clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+			};
+		};
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x5c8>;
+			mode-normal = <BOOT_NORMAL>;
+			mode-recovery = <BOOT_RECOVERY>;
+			mode-bootloader = <BOOT_FASTBOOT>;
+			mode-loader = <BOOT_BL_DOWNLOAD>;
+		};
 	};
 
 	uart0: serial@ff110000 {
@@ -201,12 +345,12 @@
 		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
 		clock-names = "baudclk", "apb_pclk";
-		reg-shift = <2>;
-		reg-io-width = <4>;
 		dmas = <&dmac 2>, <&dmac 3>;
-		#dma-cells = <2>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+		reg-io-width = <4>;
+		reg-shift = <2>;
 		status = "disabled";
 	};
 
@@ -215,13 +359,13 @@
 		reg = <0x0 0xff120000 0x0 0x100>;
 		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
-		clock-names = "sclk_uart", "pclk_uart";
-		reg-shift = <2>;
-		reg-io-width = <4>;
+		clock-names = "baudclk", "apb_pclk";
 		dmas = <&dmac 4>, <&dmac 5>;
-		#dma-cells = <2>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
+		reg-io-width = <4>;
+		reg-shift = <2>;
 		status = "disabled";
 	};
 
@@ -231,22 +375,17 @@
 		interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
-		reg-shift = <2>;
-		reg-io-width = <4>;
 		dmas = <&dmac 6>, <&dmac 7>;
-		#dma-cells = <2>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&uart2m1_xfer>;
+		reg-io-width = <4>;
+		reg-shift = <2>;
 		status = "disabled";
 	};
 
-	pmu: power-management@ff140000 {
-		compatible = "rockchip,rk3328-pmu", "syscon", "simple-mfd";
-		reg = <0x0 0xff140000 0x0 0x1000>;
-	};
-
 	i2c0: i2c@ff150000 {
-		compatible = "rockchip,rk3328-i2c";
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xff150000 0x0 0x1000>;
 		interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
@@ -259,7 +398,7 @@
 	};
 
 	i2c1: i2c@ff160000 {
-		compatible = "rockchip,rk3328-i2c";
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xff160000 0x0 0x1000>;
 		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
@@ -272,7 +411,7 @@
 	};
 
 	i2c2: i2c@ff170000 {
-		compatible = "rockchip,rk3328-i2c";
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xff170000 0x0 0x1000>;
 		interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
@@ -285,7 +424,7 @@
 	};
 
 	i2c3: i2c@ff180000 {
-		compatible = "rockchip,rk3328-i2c";
+		compatible = "rockchip,rk3328-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xff180000 0x0 0x1000>;
 		interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
@@ -306,7 +445,6 @@
 		clocks = <&cru SCLK_SPI>, <&cru PCLK_SPI>;
 		clock-names = "spiclk", "apb_pclk";
 		dmas = <&dmac 8>, <&dmac 9>;
-		#dma-cells = <2>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi0m2_clk &spi0m2_tx &spi0m2_rx &spi0m2_cs0>;
@@ -317,28 +455,141 @@
 		compatible = "snps,dw-wdt";
 		reg = <0x0 0xff1a0000 0x0 0x100>;
 		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_WDT>;
+	};
+
+	pwm0: pwm@ff1b0000 {
+		compatible = "rockchip,rk3328-pwm";
+		reg = <0x0 0xff1b0000 0x0 0x10>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm0_pin>;
+		#pwm-cells = <3>;
 		status = "disabled";
 	};
 
-	amba {
-		compatible = "simple-bus";
-		#address-cells = <2>;
-		#size-cells = <2>;
-		ranges;
+	pwm1: pwm@ff1b0010 {
+		compatible = "rockchip,rk3328-pwm";
+		reg = <0x0 0xff1b0010 0x0 0x10>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm1_pin>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
 
-		dmac: dmac@ff1f0000 {
-			compatible = "arm,pl330", "arm,primecell";
-			reg = <0x0 0xff1f0000 0x0 0x4000>;
-			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&cru ACLK_DMAC>;
-			clock-names = "apb_pclk";
-			#dma-cells = <1>;
+	pwm2: pwm@ff1b0020 {
+		compatible = "rockchip,rk3328-pwm";
+		reg = <0x0 0xff1b0020 0x0 0x10>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwm2_pin>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
+
+	pwm3: pwm@ff1b0030 {
+		compatible = "rockchip,rk3328-pwm";
+		reg = <0x0 0xff1b0030 0x0 0x10>;
+		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>;
+		clock-names = "pwm", "pclk";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwmir_pin>;
+		#pwm-cells = <3>;
+		status = "disabled";
+	};
+
+	thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>;
+			polling-delay = <1000>;
+			sustainable-power = <1000>;
+
+			thermal-sensors = <&tsadc 0>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				target: trip-point1 {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				soc_crit: soc-crit {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <4096>;
+				};
+			};
+		};
+
+	};
+
+	tsadc: tsadc@ff250000 {
+		compatible = "rockchip,rk3328-tsadc";
+		reg = <0x0 0xff250000 0x0 0x100>;
+		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <50000>;
+		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		pinctrl-names = "init", "default", "sleep";
+		pinctrl-0 = <&otp_gpio>;
+		pinctrl-1 = <&otp_out>;
+		pinctrl-2 = <&otp_gpio>;
+		resets = <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb";
+		rockchip,grf = <&grf>;
+		rockchip,hw-tshut-temp = <100000>;
+		#thermal-sensor-cells = <1>;
+		status = "disabled";
+	};
+
+	efuse: efuse@ff260000 {
+		compatible = "rockchip,rk3328-efuse";
+		reg = <0x0 0xff260000 0x0 0x50>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru SCLK_EFUSE>;
+		clock-names = "pclk_efuse";
+		rockchip,efuse-size = <0x20>;
+
+		/* Data cells */
+		efuse_id: id@7 {
+			reg = <0x07 0x10>;
+		};
+		cpu_leakage: cpu-leakage@17 {
+			reg = <0x17 0x1>;
+		};
+		logic_leakage: logic-leakage@19 {
+			reg = <0x19 0x1>;
+		};
+		efuse_cpu_version: cpu-version@1a {
+			reg = <0x1a 0x1>;
+			bits = <3 3>;
 		};
 	};
 
-	saradc: saradc@ff280000 {
-		compatible = "rockchip,rk3328-saradc", "rockchip,saradc";
+	saradc: adc@ff280000 {
+		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";
 		reg = <0x0 0xff280000 0x0 0x100>;
 		interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 		#io-channel-cells = <1>;
@@ -349,6 +600,169 @@
 		status = "disabled";
 	};
 
+	gpu: gpu@ff300000 {
+		compatible = "rockchip,rk3328-mali", "arm,mali-450";
+		reg = <0x0 0xff300000 0x0 0x40000>;
+		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "gp",
+				  "gpmmu",
+				  "pp",
+				  "pp0",
+				  "ppmmu0",
+				  "pp1",
+				  "ppmmu1";
+		clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>;
+		clock-names = "bus", "core";
+		resets = <&cru SRST_GPU_A>;
+	};
+
+	h265e_mmu: iommu@ff330200 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff330200 0 0x100>;
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "h265e_mmu";
+		clocks = <&cru ACLK_H265>, <&cru PCLK_H265>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vepu_mmu: iommu@ff340800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff340800 0x0 0x40>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vepu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vpu: video-codec@ff350000 {
+		compatible = "rockchip,rk3328-vpu";
+		reg = <0x0 0xff350000 0x0 0x800>;
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vdpu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "hclk";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power RK3328_PD_VPU>;
+	};
+
+	vpu_mmu: iommu@ff350800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff350800 0x0 0x40>;
+		interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		power-domains = <&power RK3328_PD_VPU>;
+	};
+
+	rkvdec_mmu: iommu@ff360480 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>;
+		interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "rkvdec_mmu";
+		clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	vop: vop@ff370000 {
+		compatible = "rockchip,rk3328-vop";
+		reg = <0x0 0xff370000 0x0 0x3efc>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_VOP>, <&cru DCLK_LCDC>, <&cru HCLK_VOP>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		resets = <&cru SRST_VOP_A>, <&cru SRST_VOP_H>, <&cru SRST_VOP_D>;
+		reset-names = "axi", "ahb", "dclk";
+		iommus = <&vop_mmu>;
+		status = "disabled";
+
+		vop_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			vop_out_hdmi: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&hdmi_in_vop>;
+			};
+		};
+	};
+
+	vop_mmu: iommu@ff373f00 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff373f00 0x0 0x100>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "vop_mmu";
+		clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	hdmi: hdmi@ff3c0000 {
+		compatible = "rockchip,rk3328-dw-hdmi";
+		reg = <0x0 0xff3c0000 0x0 0x20000>;
+		reg-io-width = <4>;
+		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_HDMI>,
+			 <&cru SCLK_HDMI_SFC>,
+			 <&cru SCLK_RTC32K>;
+		clock-names = "iahb",
+			      "isfr",
+			      "cec";
+		phys = <&hdmiphy>;
+		phy-names = "hdmi";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_cec &hdmii2c_xfer &hdmi_hpd>;
+		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+
+		ports {
+			hdmi_in: port {
+				hdmi_in_vop: endpoint {
+					remote-endpoint = <&vop_out_hdmi>;
+				};
+			};
+		};
+	};
+
+	codec: codec@ff410000 {
+		compatible = "rockchip,rk3328-codec";
+		reg = <0x0 0xff410000 0x0 0x1000>;
+		clocks = <&cru PCLK_ACODECPHY>, <&cru SCLK_I2S1>;
+		clock-names = "pclk", "mclk";
+		rockchip,grf = <&grf>;
+		#sound-dai-cells = <0>;
+		status = "disabled";
+	};
+
+	hdmiphy: phy@ff430000 {
+		compatible = "rockchip,rk3328-hdmi-phy";
+		reg = <0x0 0xff430000 0x0 0x10000>;
+		interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru PCLK_HDMIPHY>, <&xin24m>, <&cru DCLK_HDMIPHY>;
+		clock-names = "sysclk", "refoclk", "refpclk";
+		clock-output-names = "hdmi_phy";
+		#clock-cells = <0>;
+		nvmem-cells = <&efuse_cpu_version>;
+		nvmem-cell-names = "cpu-version";
+		#phy-cells = <0>;
+		status = "disabled";
+	};
+
 	cru: clock-controller@ff440000 {
 		compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon";
 		reg = <0x0 0xff440000 0x0 0x1000>;
@@ -356,6 +770,12 @@
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 		assigned-clocks =
+			/*
+			 * CPLL should run at 1200, but that is to high for
+			 * the initial dividers of most of its children.
+			 * We need set cpll child clk div first,
+			 * and then set the cpll frequency.
+			 */
 			<&cru DCLK_LCDC>, <&cru SCLK_PDM>,
 			<&cru SCLK_RTC32K>, <&cru SCLK_UART0>,
 			<&cru SCLK_UART1>, <&cru SCLK_UART2>,
@@ -371,15 +791,7 @@
 			<&cru ACLK_BUS_PRE>, <&cru HCLK_BUS_PRE>,
 			<&cru PCLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
 			<&cru HCLK_PERI>, <&cru PCLK_PERI>,
-			<&cru ACLK_VIO_PRE>, <&cru HCLK_VIO_PRE>,
-			<&cru ACLK_RGA_PRE>, <&cru SCLK_RGA>,
-			<&cru ACLK_VOP_PRE>, <&cru ACLK_RKVDEC_PRE>,
-			<&cru ACLK_RKVENC>, <&cru ACLK_VPU_PRE>,
-			<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
-			<&cru SCLK_VENC_CORE>, <&cru SCLK_VENC_DSP>,
-			<&cru SCLK_EFUSE>, <&cru PCLK_DDR>,
-			<&cru ACLK_GMAC>, <&cru PCLK_GMAC>,
-			<&cru SCLK_RTC32K>, <&cru SCLK_USB3OTG_SUSPEND>;
+			<&cru SCLK_RTC32K>;
 		assigned-clock-parents =
 			<&cru HDMIPHY>, <&cru PLL_APLL>,
 			<&cru PLL_GPLL>, <&xin24m>,
@@ -400,55 +812,85 @@
 			<150000000>, <75000000>,
 			<75000000>, <150000000>,
 			<75000000>, <75000000>,
-			<300000000>, <100000000>,
-			<300000000>, <200000000>,
-			<400000000>, <500000000>,
-			<200000000>, <300000000>,
-			<300000000>, <250000000>,
-			<200000000>, <100000000>,
-			<24000000>, <100000000>,
-			<150000000>, <50000000>,
-			<32768>, <32768>;
+			<32768>;
 	};
 
-	sdmmc: rksdmmc@ff500000 {
+	usb2phy_grf: syscon@ff450000 {
+		compatible = "rockchip,rk3328-usb2phy-grf", "syscon",
+			     "simple-mfd";
+		reg = <0x0 0xff450000 0x0 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		u2phy: usb2-phy@100 {
+			compatible = "rockchip,rk3328-usb2phy";
+			reg = <0x100 0x10>;
+			clocks = <&xin24m>;
+			clock-names = "phyclk";
+			clock-output-names = "usb480m_phy";
+			#clock-cells = <0>;
+			assigned-clocks = <&cru USB480M>;
+			assigned-clock-parents = <&u2phy>;
+			status = "disabled";
+
+			u2phy_otg: otg-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "otg-bvalid", "otg-id",
+						  "linestate";
+				status = "disabled";
+			};
+
+			u2phy_host: host-port {
+				#phy-cells = <0>;
+				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "linestate";
+				status = "disabled";
+			};
+		};
+	};
+
+	sdmmc: mmc@ff500000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff500000 0x0 0x4000>;
-		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
-		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
+			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <150000000>;
 		status = "disabled";
 	};
 
-	sdio: dwmmc@ff510000 {
+	sdio: mmc@ff510000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff510000 0x0 0x4000>;
-		max-frequency = <150000000>;
+		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
 			 <&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
-		clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
 		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+		max-frequency = <150000000>;
 		status = "disabled";
 	};
 
-	emmc: rksdmmc@ff520000 {
+	emmc: mmc@ff520000 {
 		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xff520000 0x0 0x4000>;
-		max-frequency = <150000000>;
-		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
-		clock-names = "biu", "ciu";
-		fifo-depth = <0x100>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
+			 <&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
+		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
+		fifo-depth = <0x100>;
+		max-frequency = <150000000>;
 		status = "disabled";
 	};
 
 	gmac2io: ethernet@ff540000 {
 		compatible = "rockchip,rk3328-gmac";
 		reg = <0x0 0xff540000 0x0 0x10000>;
-		rockchip,grf = <&grf>;
 		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 		interrupt-names = "macirq";
 		clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_RX>,
@@ -461,13 +903,56 @@
 			      "pclk_mac";
 		resets = <&cru SRST_GMAC2IO_A>;
 		reset-names = "stmmaceth";
+		rockchip,grf = <&grf>;
+		snps,txpbl = <0x4>;
 		status = "disabled";
 	};
 
+	gmac2phy: ethernet@ff550000 {
+		compatible = "rockchip,rk3328-gmac";
+		reg = <0x0 0xff550000 0x0 0x10000>;
+		rockchip,grf = <&grf>;
+		interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "macirq";
+		clocks = <&cru SCLK_MAC2PHY_SRC>, <&cru SCLK_MAC2PHY_RXTX>,
+			 <&cru SCLK_MAC2PHY_RXTX>, <&cru SCLK_MAC2PHY_REF>,
+			 <&cru ACLK_MAC2PHY>, <&cru PCLK_MAC2PHY>,
+			 <&cru SCLK_MAC2PHY_OUT>;
+		clock-names = "stmmaceth", "mac_clk_rx",
+			      "mac_clk_tx", "clk_mac_ref",
+			      "aclk_mac", "pclk_mac",
+			      "clk_macphy";
+		resets = <&cru SRST_GMAC2PHY_A>, <&cru SRST_MACPHY>;
+		reset-names = "stmmaceth", "mac-phy";
+		phy-mode = "rmii";
+		phy-handle = <&phy>;
+		snps,txpbl = <0x4>;
+		status = "disabled";
+
+		mdio {
+			compatible = "snps,dwmac-mdio";
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			phy: phy@0 {
+				compatible = "ethernet-phy-id1234.d400", "ethernet-phy-ieee802.3-c22";
+				reg = <0>;
+				clocks = <&cru SCLK_MAC2PHY_OUT>;
+				resets = <&cru SRST_MACPHY>;
+				pinctrl-names = "default";
+				pinctrl-0 = <&fephyled_rxm1 &fephyled_linkm1>;
+				phy-is-integrated;
+			};
+		};
+	};
+
 	usb_host0_ehci: usb@ff5c0000 {
 		compatible = "generic-ehci";
 		reg = <0x0 0xff5c0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&u2phy>;
+		phys = <&u2phy_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
@@ -475,31 +960,38 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xff5d0000 0x0 0x10000>;
 		interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>, <&u2phy>;
+		phys = <&u2phy_host>;
+		phy-names = "usb";
 		status = "disabled";
 	};
 
+	/*
+	 * U-boot Specific Change
+	 *
+	 * The OTG controller must come after the USB host pair for it
+	 * to work. This is likely due to lack of support for the USB
+	 * PHYs. This must be manually changed after each device tree
+	 * sync. There is no clean way to handle this in -u-boot.dtsi
+	 * files.
+	 */
 	usb20_otg: usb@ff580000 {
 		compatible = "rockchip,rk3328-usb", "rockchip,rk3066-usb",
 			     "snps,dwc2";
 		reg = <0x0 0xff580000 0x0 0x40000>;
 		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
-		hnp-srp-disable;
+		clocks = <&cru HCLK_OTG>;
+		clock-names = "otg";
 		dr_mode = "otg";
+		g-np-tx-fifo-size = <16>;
+		g-rx-fifo-size = <280>;
+		g-tx-fifo-size = <256 128 128 64 32 16>;
+		phys = <&u2phy_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
-	sdmmc_ext: rksdmmc@ff5f0000 {
-		compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
-		reg = <0x0 0xff5f0000 0x0 0x4000>;
-		max-frequency = <150000000>;
-		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
-		clock-names = "biu", "ciu";
-		fifo-depth = <0x100>;
-		interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
-		status = "disabled";
-	};
-
-	gic: interrupt-controller@ffb70000 {
+	gic: interrupt-controller@ff811000 {
 		compatible = "arm,gic-400";
 		#interrupt-cells = <3>;
 		#address-cells = <0>;
@@ -647,654 +1139,576 @@
 
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
-				rockchip,pins =
-					<2 24 RK_FUNC_1 &pcfg_pull_none>,
-					<2 25 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD0 1 &pcfg_pull_none>,
+						<2 RK_PD1 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2c1 {
 			i2c1_xfer: i2c1-xfer {
-				rockchip,pins =
-					<2 4 RK_FUNC_2 &pcfg_pull_none>,
-					<2 5 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA4 2 &pcfg_pull_none>,
+						<2 RK_PA5 2 &pcfg_pull_none>;
 			};
 		};
 
 		i2c2 {
 			i2c2_xfer: i2c2-xfer {
-				rockchip,pins =
-					<2 13 RK_FUNC_1 &pcfg_pull_none>,
-					<2 14 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>,
+						<2 RK_PB6 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2c3 {
 			i2c3_xfer: i2c3-xfer {
-				rockchip,pins =
-					<0 5 RK_FUNC_2 &pcfg_pull_none>,
-					<0 6 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PA5 2 &pcfg_pull_none>,
+						<0 RK_PA6 2 &pcfg_pull_none>;
 			};
 			i2c3_gpio: i2c3-gpio {
 				rockchip,pins =
-					<0 5 RK_FUNC_GPIO &pcfg_pull_none>,
-					<0 6 RK_FUNC_GPIO &pcfg_pull_none>;
+					<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
+					<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
 			};
 		};
 
 		hdmi_i2c {
 			hdmii2c_xfer: hdmii2c-xfer {
+				rockchip,pins = <0 RK_PA5 1 &pcfg_pull_none>,
+						<0 RK_PA6 1 &pcfg_pull_none>;
+			};
+		};
+
+		pdm-0 {
+			pdmm0_clk: pdmm0-clk {
+				rockchip,pins = <2 RK_PC2 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_fsync: pdmm0-fsync {
+				rockchip,pins = <2 RK_PC7 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_sdi0: pdmm0-sdi0 {
+				rockchip,pins = <2 RK_PC3 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_sdi1: pdmm0-sdi1 {
+				rockchip,pins = <2 RK_PC4 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_sdi2: pdmm0-sdi2 {
+				rockchip,pins = <2 RK_PC5 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_sdi3: pdmm0-sdi3 {
+				rockchip,pins = <2 RK_PC6 2 &pcfg_pull_none>;
+			};
+
+			pdmm0_clk_sleep: pdmm0-clk-sleep {
+				rockchip,pins =
+					<2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdmm0_sdi0_sleep: pdmm0-sdi0-sleep {
+				rockchip,pins =
+					<2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdmm0_sdi1_sleep: pdmm0-sdi1-sleep {
+				rockchip,pins =
+					<2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdmm0_sdi2_sleep: pdmm0-sdi2-sleep {
+				rockchip,pins =
+					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdmm0_sdi3_sleep: pdmm0-sdi3-sleep {
+				rockchip,pins =
+					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+
+			pdmm0_fsync_sleep: pdmm0-fsync-sleep {
 				rockchip,pins =
-					<0 5 RK_FUNC_1 &pcfg_pull_none>,
-					<0 6 RK_FUNC_1 &pcfg_pull_none>;
+					<2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
+			};
+		};
+
+		tsadc {
+			otp_gpio: otp-gpio {
+				rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			otp_out: otp-out {
+				rockchip,pins = <2 RK_PB5 1 &pcfg_pull_none>;
 			};
 		};
 
 		uart0 {
 			uart0_xfer: uart0-xfer {
-				rockchip,pins =
-					<1 9 RK_FUNC_1 &pcfg_pull_up>,
-					<1 8 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB1 1 &pcfg_pull_up>,
+						<1 RK_PB0 1 &pcfg_pull_none>;
 			};
 
 			uart0_cts: uart0-cts {
-				rockchip,pins =
-					<1 11 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none>;
 			};
 
 			uart0_rts: uart0-rts {
-				rockchip,pins =
-					<1 10 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB2 1 &pcfg_pull_none>;
 			};
 
 			uart0_rts_gpio: uart0-rts-gpio {
-				rockchip,pins =
-					<1 10 RK_FUNC_GPIO &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
 			};
 		};
 
 		uart1 {
 			uart1_xfer: uart1-xfer {
-				rockchip,pins =
-					<3 4 RK_FUNC_4 &pcfg_pull_up>,
-					<3 6 RK_FUNC_4 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA4 4 &pcfg_pull_up>,
+						<3 RK_PA6 4 &pcfg_pull_none>;
 			};
 
 			uart1_cts: uart1-cts {
-				rockchip,pins =
-					<3 7 RK_FUNC_4 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA7 4 &pcfg_pull_none>;
 			};
 
 			uart1_rts: uart1-rts {
-				rockchip,pins =
-					<3 5 RK_FUNC_4 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA5 4 &pcfg_pull_none>;
 			};
 
 			uart1_rts_gpio: uart1-rts-gpio {
-				rockchip,pins =
-					<3 5 RK_FUNC_GPIO &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
 			};
 		};
 
 		uart2-0 {
 			uart2m0_xfer: uart2m0-xfer {
-				rockchip,pins =
-					<1 0 RK_FUNC_2 &pcfg_pull_up>,
-					<1 1 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PA0 2 &pcfg_pull_up>,
+						<1 RK_PA1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart2-1 {
 			uart2m1_xfer: uart2m1-xfer {
-				rockchip,pins =
-					<2 0 RK_FUNC_1 &pcfg_pull_up>,
-					<2 1 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA0 1 &pcfg_pull_up>,
+						<2 RK_PA1 1 &pcfg_pull_none>;
 			};
 		};
 
 		spi0-0 {
 			spi0m0_clk: spi0m0-clk {
-				rockchip,pins =
-					<2 8 RK_FUNC_1 &pcfg_pull_up>;
+				rockchip,pins = <2 RK_PB0 1 &pcfg_pull_up>;
 			};
 
 			spi0m0_cs0: spi0m0-cs0 {
-				rockchip,pins =
-					<2 11 RK_FUNC_1 &pcfg_pull_up>;
+				rockchip,pins = <2 RK_PB3 1 &pcfg_pull_up>;
 			};
 
 			spi0m0_tx: spi0m0-tx {
-				rockchip,pins =
-					<2 9 RK_FUNC_1 &pcfg_pull_up>;
+				rockchip,pins = <2 RK_PB1 1 &pcfg_pull_up>;
 			};
 
 			spi0m0_rx: spi0m0-rx {
-				rockchip,pins =
-					<2 10 RK_FUNC_1 &pcfg_pull_up>;
+				rockchip,pins = <2 RK_PB2 1 &pcfg_pull_up>;
 			};
 
 			spi0m0_cs1: spi0m0-cs1 {
-				rockchip,pins =
-					<2 12 RK_FUNC_1 &pcfg_pull_up>;
+				rockchip,pins = <2 RK_PB4 1 &pcfg_pull_up>;
 			};
 		};
 
 		spi0-1 {
 			spi0m1_clk: spi0m1-clk {
-				rockchip,pins =
-					<3 23 RK_FUNC_2 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PC7 2 &pcfg_pull_up>;
 			};
 
 			spi0m1_cs0: spi0m1-cs0 {
-				rockchip,pins =
-					<3 26 RK_FUNC_2 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PD2 2 &pcfg_pull_up>;
 			};
 
 			spi0m1_tx: spi0m1-tx {
-				rockchip,pins =
-					<3 25 RK_FUNC_2 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PD1 2 &pcfg_pull_up>;
 			};
 
 			spi0m1_rx: spi0m1-rx {
-				rockchip,pins =
-					<3 24 RK_FUNC_2 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PD0 2 &pcfg_pull_up>;
 			};
 
 			spi0m1_cs1: spi0m1-cs1 {
-				rockchip,pins =
-					<3 27 RK_FUNC_2 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PD3 2 &pcfg_pull_up>;
 			};
 		};
 
 		spi0-2 {
 			spi0m2_clk: spi0m2-clk {
-				rockchip,pins =
-					<3 0 RK_FUNC_4 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PA0 4 &pcfg_pull_up>;
 			};
 
 			spi0m2_cs0: spi0m2-cs0 {
-				rockchip,pins =
-					<3 8 RK_FUNC_3 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PB0 3 &pcfg_pull_up>;
 			};
 
 			spi0m2_tx: spi0m2-tx {
-				rockchip,pins =
-					<3 1 RK_FUNC_4 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PA1 4 &pcfg_pull_up>;
 			};
 
 			spi0m2_rx: spi0m2-rx {
-				rockchip,pins =
-					<3 2 RK_FUNC_4 &pcfg_pull_up>;
+				rockchip,pins = <3 RK_PA2 4 &pcfg_pull_up>;
 			};
 		};
 
 		i2s1 {
 			i2s1_mclk: i2s1-mclk {
-				rockchip,pins =
-					<2 15 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PB7 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sclk: i2s1-sclk {
-				rockchip,pins =
-					<2 18 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC2 1 &pcfg_pull_none>;
 			};
 
 			i2s1_lrckrx: i2s1-lrckrx {
-				rockchip,pins =
-					<2 16 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC0 1 &pcfg_pull_none>;
 			};
 
 			i2s1_lrcktx: i2s1-lrcktx {
-				rockchip,pins =
-					<2 17 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC1 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sdi: i2s1-sdi {
-				rockchip,pins =
-					<2 19 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC3 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sdo: i2s1-sdo {
-				rockchip,pins =
-					<2 23 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC7 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sdio1: i2s1-sdio1 {
-				rockchip,pins =
-					<2 20 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC4 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sdio2: i2s1-sdio2 {
-				rockchip,pins =
-					<2 21 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC5 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sdio3: i2s1-sdio3 {
-				rockchip,pins =
-					<2 22 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC6 1 &pcfg_pull_none>;
 			};
 
 			i2s1_sleep: i2s1-sleep {
 				rockchip,pins =
-					<2 15 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 16 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 17 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 18 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 19 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 20 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 21 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 22 RK_FUNC_GPIO &pcfg_input_high>,
-					<2 23 RK_FUNC_GPIO &pcfg_input_high>;
+					<2 RK_PB7 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC0 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC1 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC2 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC3 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC4 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
+					<2 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>;
 			};
 		};
 
 		i2s2-0 {
 			i2s2m0_mclk: i2s2m0-mclk {
-				rockchip,pins =
-					<1 21 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_sclk: i2s2m0-sclk {
-				rockchip,pins =
-					<1 22 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC6 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_lrckrx: i2s2m0-lrckrx {
-				rockchip,pins =
-					<1 26 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD2 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_lrcktx: i2s2m0-lrcktx {
-				rockchip,pins =
-					<1 23 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC7 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_sdi: i2s2m0-sdi {
-				rockchip,pins =
-					<1 24 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD0 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_sdo: i2s2m0-sdo {
-				rockchip,pins =
-					<1 25 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PD1 1 &pcfg_pull_none>;
 			};
 
 			i2s2m0_sleep: i2s2m0-sleep {
 				rockchip,pins =
-					<1 21 RK_FUNC_GPIO &pcfg_input_high>,
-					<1 22 RK_FUNC_GPIO &pcfg_input_high>,
-					<1 26 RK_FUNC_GPIO &pcfg_input_high>,
-					<1 23 RK_FUNC_GPIO &pcfg_input_high>,
-					<1 24 RK_FUNC_GPIO &pcfg_input_high>,
-					<1 25 RK_FUNC_GPIO &pcfg_input_high>;
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PC6 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD2 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PC7 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD0 RK_FUNC_GPIO &pcfg_input_high>,
+					<1 RK_PD1 RK_FUNC_GPIO &pcfg_input_high>;
 			};
 		};
 
 		i2s2-1 {
 			i2s2m1_mclk: i2s2m1-mclk {
-				rockchip,pins =
-					<1 21 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PC5 1 &pcfg_pull_none>;
 			};
 
 			i2s2m1_sclk: i2s2m1-sclk {
-				rockchip,pins =
-					<3 0 RK_FUNC_6 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA0 6 &pcfg_pull_none>;
 			};
 
 			i2s2m1_lrckrx: i2sm1-lrckrx {
-				rockchip,pins =
-					<3 8 RK_FUNC_6 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PB0 6 &pcfg_pull_none>;
 			};
 
 			i2s2m1_lrcktx: i2s2m1-lrcktx {
-				rockchip,pins =
-					<3 8 RK_FUNC_4 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PB0 4 &pcfg_pull_none>;
 			};
 
 			i2s2m1_sdi: i2s2m1-sdi {
-				rockchip,pins =
-					<3 2 RK_FUNC_6 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA2 6 &pcfg_pull_none>;
 			};
 
 			i2s2m1_sdo: i2s2m1-sdo {
-				rockchip,pins =
-					<3 1 RK_FUNC_6 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PA1 6 &pcfg_pull_none>;
 			};
 
 			i2s2m1_sleep: i2s2m1-sleep {
 				rockchip,pins =
-					<1 21 RK_FUNC_GPIO &pcfg_input_high>,
-					<3 0 RK_FUNC_GPIO &pcfg_input_high>,
-					<3 8 RK_FUNC_GPIO &pcfg_input_high>,
-					<3 2 RK_FUNC_GPIO &pcfg_input_high>,
-					<3 1 RK_FUNC_GPIO &pcfg_input_high>;
+					<1 RK_PC5 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PB0 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_input_high>,
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_input_high>;
 			};
 		};
 
 		spdif-0 {
 			spdifm0_tx: spdifm0-tx {
-				rockchip,pins =
-					<0 27 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD3 1 &pcfg_pull_none>;
 			};
 		};
 
 		spdif-1 {
 			spdifm1_tx: spdifm1-tx {
-				rockchip,pins =
-					<2 17 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PC1 2 &pcfg_pull_none>;
 			};
 		};
 
 		spdif-2 {
 			spdifm2_tx: spdifm2-tx {
-				rockchip,pins =
-					<0 2 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PA2 2 &pcfg_pull_none>;
 			};
 		};
 
 		sdmmc0-0 {
 			sdmmc0m0_pwren: sdmmc0m0-pwren {
-				rockchip,pins =
-					<2 7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <2 RK_PA7 1 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0m0_gpio: sdmmc0m0-gpio {
-				rockchip,pins =
-					<2 7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+				rockchip,pins = <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
 			};
 		};
 
 		sdmmc0-1 {
 			sdmmc0m1_pwren: sdmmc0m1-pwren {
-				rockchip,pins =
-					<0 30 RK_FUNC_3 &pcfg_pull_up_4ma>;
+				rockchip,pins = <0 RK_PD6 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0m1_gpio: sdmmc0m1-gpio {
-				rockchip,pins =
-					<0 30 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+				rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
 			};
 		};
 
 		sdmmc0 {
 			sdmmc0_clk: sdmmc0-clk {
-				rockchip,pins =
-					<1 6 RK_FUNC_1 &pcfg_pull_none_4ma>;
+				rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_8ma>;
 			};
 
 			sdmmc0_cmd: sdmmc0-cmd {
-				rockchip,pins =
-					<1 4 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc0_dectn: sdmmc0-dectn {
-				rockchip,pins =
-					<1 5 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0_wrprt: sdmmc0-wrprt {
-				rockchip,pins =
-					<1 7 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <1 RK_PA7 1 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0_bus1: sdmmc0-bus1 {
-				rockchip,pins =
-					<1 0 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc0_bus4: sdmmc0-bus4 {
-				rockchip,pins =
-					<1 0 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 1 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 2 RK_FUNC_1 &pcfg_pull_up_4ma>,
-					<1 3 RK_FUNC_1 &pcfg_pull_up_4ma>;
+				rockchip,pins = <1 RK_PA0 1 &pcfg_pull_up_8ma>,
+						<1 RK_PA1 1 &pcfg_pull_up_8ma>,
+						<1 RK_PA2 1 &pcfg_pull_up_8ma>,
+						<1 RK_PA3 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc0_gpio: sdmmc0-gpio {
 				rockchip,pins =
-					<1 6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 0 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+					<1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
 			};
 		};
 
 		sdmmc0ext {
 			sdmmc0ext_clk: sdmmc0ext-clk {
-				rockchip,pins =
-					<3 2 RK_FUNC_3 &pcfg_pull_none_4ma>;
+				rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_4ma>;
 			};
 
 			sdmmc0ext_cmd: sdmmc0ext-cmd {
-				rockchip,pins =
-					<3 0 RK_FUNC_3 &pcfg_pull_up_4ma>;
+				rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0ext_wrprt: sdmmc0ext-wrprt {
-				rockchip,pins =
-					<3 3 RK_FUNC_3 &pcfg_pull_up_4ma>;
+				rockchip,pins = <3 RK_PA3 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0ext_dectn: sdmmc0ext-dectn {
-				rockchip,pins =
-					<3 1 RK_FUNC_3 &pcfg_pull_up_4ma>;
+				rockchip,pins = <3 RK_PA1 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0ext_bus1: sdmmc0ext-bus1 {
-				rockchip,pins =
-					<3 4 RK_FUNC_3 &pcfg_pull_up_4ma>;
+				rockchip,pins = <3 RK_PA4 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0ext_bus4: sdmmc0ext-bus4 {
 				rockchip,pins =
-					<3 4 RK_FUNC_3 &pcfg_pull_up_4ma>,
-					<3 5 RK_FUNC_3 &pcfg_pull_up_4ma>,
-					<3 6 RK_FUNC_3 &pcfg_pull_up_4ma>,
-					<3 7 RK_FUNC_3 &pcfg_pull_up_4ma>;
+					<3 RK_PA4 3 &pcfg_pull_up_4ma>,
+					<3 RK_PA5 3 &pcfg_pull_up_4ma>,
+					<3 RK_PA6 3 &pcfg_pull_up_4ma>,
+					<3 RK_PA7 3 &pcfg_pull_up_4ma>;
 			};
 
 			sdmmc0ext_gpio: sdmmc0ext-gpio {
 				rockchip,pins =
-					<3 0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<3 7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+					<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
 			};
 		};
 
 		sdmmc1 {
 			sdmmc1_clk: sdmmc1-clk {
-				rockchip,pins =
-					<1 12 RK_FUNC_1 &pcfg_pull_none_8ma>;
+				rockchip,pins = <1 RK_PB4 1 &pcfg_pull_none_8ma>;
 			};
 
 			sdmmc1_cmd: sdmmc1-cmd {
-				rockchip,pins =
-					<1 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PB5 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_pwren: sdmmc1-pwren {
-				rockchip,pins =
-					<1 18 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PC2 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_wrprt: sdmmc1-wrprt {
-				rockchip,pins =
-					<1 20 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PC4 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_dectn: sdmmc1-dectn {
-				rockchip,pins =
-					<1 19 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PC3 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_bus1: sdmmc1-bus1 {
-				rockchip,pins =
-					<1 14 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_bus4: sdmmc1-bus4 {
-				rockchip,pins =
-					<1 12 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 13 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 16 RK_FUNC_1 &pcfg_pull_up_8ma>,
-					<1 17 RK_FUNC_1 &pcfg_pull_up_8ma>;
+				rockchip,pins = <1 RK_PB6 1 &pcfg_pull_up_8ma>,
+						<1 RK_PB7 1 &pcfg_pull_up_8ma>,
+						<1 RK_PC0 1 &pcfg_pull_up_8ma>,
+						<1 RK_PC1 1 &pcfg_pull_up_8ma>;
 			};
 
 			sdmmc1_gpio: sdmmc1-gpio {
 				rockchip,pins =
-					<1 12 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 13 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 14 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 15 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 16 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 17 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 18 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 19 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
-					<1 20 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
+					<1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up_4ma>,
+					<1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up_4ma>;
 			};
 		};
 
 		emmc {
 			emmc_clk: emmc-clk {
-				rockchip,pins =
-					<3 21 RK_FUNC_2 &pcfg_pull_none_12ma>;
+				rockchip,pins = <3 RK_PC5 2 &pcfg_pull_none_12ma>;
 			};
 
 			emmc_cmd: emmc-cmd {
-				rockchip,pins =
-					<3 19 RK_FUNC_2 &pcfg_pull_up_12ma>;
+				rockchip,pins = <3 RK_PC3 2 &pcfg_pull_up_12ma>;
 			};
 
 			emmc_pwren: emmc-pwren {
-				rockchip,pins =
-					<3 22 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PC6 2 &pcfg_pull_none>;
 			};
 
 			emmc_rstnout: emmc-rstnout {
-				rockchip,pins =
-					<3 20 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <3 RK_PC4 2 &pcfg_pull_none>;
 			};
 
 			emmc_bus1: emmc-bus1 {
-				rockchip,pins =
-					<0 7 RK_FUNC_2 &pcfg_pull_up_12ma>;
+				rockchip,pins = <0 RK_PA7 2 &pcfg_pull_up_12ma>;
 			};
 
 			emmc_bus4: emmc-bus4 {
 				rockchip,pins =
-					<0 7 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 28 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 29 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 30 RK_FUNC_2 &pcfg_pull_up_12ma>;
+					<0 RK_PA7 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD4 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD5 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD6 2 &pcfg_pull_up_12ma>;
 			};
 
 			emmc_bus8: emmc-bus8 {
 				rockchip,pins =
-					<0 7 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 28 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 29 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 30 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<2 31 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<3 16 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<3 17 RK_FUNC_2 &pcfg_pull_up_12ma>,
-					<3 18 RK_FUNC_2 &pcfg_pull_up_12ma>;
+					<0 RK_PA7 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD4 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD5 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD6 2 &pcfg_pull_up_12ma>,
+					<2 RK_PD7 2 &pcfg_pull_up_12ma>,
+					<3 RK_PC0 2 &pcfg_pull_up_12ma>,
+					<3 RK_PC1 2 &pcfg_pull_up_12ma>,
+					<3 RK_PC2 2 &pcfg_pull_up_12ma>;
 			};
 		};
 
 		pwm0 {
 			pwm0_pin: pwm0-pin {
-				rockchip,pins =
-					<2 4 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA4 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm1 {
 			pwm1_pin: pwm1-pin {
-				rockchip,pins =
-					<2 5 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA5 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
-				rockchip,pins =
-					<2 6 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PA6 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwmir {
 			pwmir_pin: pwmir-pin {
-				rockchip,pins =
-					<2 2 RK_FUNC_1 &pcfg_pull_none>;
-			};
-		};
-
-		gmac-0 {
-			rgmiim0_pins: rgmiim0-pins {
-				rockchip,pins =
-					/* mac_txclk */
-					<0 8 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_rxclk */
-					<0 10 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_mdio */
-					<0 11 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_txen */
-					<0 12 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_clk */
-					<0 24 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxdv */
-					<0 25 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_mdc */
-					<0 19 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxd1 */
-					<0 14 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxd0 */
-					<0 15 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_txd1 */
-					<0 16 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_txd0 */
-					<0 17 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_rxd3 */
-					<0 20 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxd2 */
-					<0 21 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_txd3 */
-					<0 23 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_txd2 */
-					<0 22 RK_FUNC_1 &pcfg_pull_none_12ma>;
-			};
-
-			rmiim0_pins: rmiim0-pins {
-				rockchip,pins =
-					/* mac_mdio */
-					<0 11 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_txen */
-					<0 12 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_clk */
-					<0 24 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxer */
-					<0 13 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxdv */
-					<0 25 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_mdc */
-					<0 19 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxd1 */
-					<0 14 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_rxd0 */
-					<0 15 RK_FUNC_1 &pcfg_pull_none>,
-					/* mac_txd1 */
-					<0 16 RK_FUNC_1 &pcfg_pull_none_12ma>,
-					/* mac_txd0 */
-					<0 17 RK_FUNC_1 &pcfg_pull_none_12ma>;
+				rockchip,pins = <2 RK_PA2 1 &pcfg_pull_none>;
 			};
 		};
 
@@ -1302,157 +1716,128 @@
 			rgmiim1_pins: rgmiim1-pins {
 				rockchip,pins =
 					/* mac_txclk */
-					<1 12 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PB4 2 &pcfg_pull_none_8ma>,
 					/* mac_rxclk */
-					<1 13 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB5 2 &pcfg_pull_none_4ma>,
 					/* mac_mdio */
-					<1 19 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC3 2 &pcfg_pull_none_4ma>,
 					/* mac_txen */
-					<1 25 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PD1 2 &pcfg_pull_none_8ma>,
 					/* mac_clk */
-					<1 21 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC5 2 &pcfg_pull_none_4ma>,
 					/* mac_rxdv */
-					<1 22 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC6 2 &pcfg_pull_none_4ma>,
 					/* mac_mdc */
-					<1 23 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC7 2 &pcfg_pull_none_4ma>,
 					/* mac_rxd1 */
-					<1 10 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB2 2 &pcfg_pull_none_4ma>,
 					/* mac_rxd0 */
-					<1 11 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB3 2 &pcfg_pull_none_4ma>,
 					/* mac_txd1 */
-					<1 8 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PB0 2 &pcfg_pull_none_8ma>,
 					/* mac_txd0 */
-					<1 9 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PB1 2 &pcfg_pull_none_8ma>,
 					/* mac_rxd3 */
-					<1 14 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB6 2 &pcfg_pull_none_4ma>,
 					/* mac_rxd2 */
-					<1 15 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB7 2 &pcfg_pull_none_4ma>,
 					/* mac_txd3 */
-					<1 16 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PC0 2 &pcfg_pull_none_8ma>,
 					/* mac_txd2 */
-					<1 17 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PC1 2 &pcfg_pull_none_8ma>,
 
 					/* mac_txclk */
-					<0 8 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PB0 1 &pcfg_pull_none_8ma>,
 					/* mac_txen */
-					<0 12 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PB4 1 &pcfg_pull_none_8ma>,
 					/* mac_clk */
-					<0 24 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PD0 1 &pcfg_pull_none_4ma>,
 					/* mac_txd1 */
-					<0 16 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PC0 1 &pcfg_pull_none_8ma>,
 					/* mac_txd0 */
-					<0 17 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PC1 1 &pcfg_pull_none_8ma>,
 					/* mac_txd3 */
-					<0 23 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PC7 1 &pcfg_pull_none_8ma>,
 					/* mac_txd2 */
-					<0 22 RK_FUNC_1 &pcfg_pull_none>;
+					<0 RK_PC6 1 &pcfg_pull_none_8ma>;
 			};
 
 			rmiim1_pins: rmiim1-pins {
 				rockchip,pins =
 					/* mac_mdio */
-					<1 19 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC3 2 &pcfg_pull_none_2ma>,
 					/* mac_txen */
-					<1 25 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PD1 2 &pcfg_pull_none_12ma>,
 					/* mac_clk */
-					<1 21 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC5 2 &pcfg_pull_none_2ma>,
 					/* mac_rxer */
-					<1 24 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PD0 2 &pcfg_pull_none_2ma>,
 					/* mac_rxdv */
-					<1 22 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC6 2 &pcfg_pull_none_2ma>,
 					/* mac_mdc */
-					<1 23 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PC7 2 &pcfg_pull_none_2ma>,
 					/* mac_rxd1 */
-					<1 10 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB2 2 &pcfg_pull_none_2ma>,
 					/* mac_rxd0 */
-					<1 11 RK_FUNC_2 &pcfg_pull_none_2ma>,
+					<1 RK_PB3 2 &pcfg_pull_none_2ma>,
 					/* mac_txd1 */
-					<1 8 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PB0 2 &pcfg_pull_none_12ma>,
 					/* mac_txd0 */
-					<1 9 RK_FUNC_2 &pcfg_pull_none_12ma>,
+					<1 RK_PB1 2 &pcfg_pull_none_12ma>,
 
 					/* mac_mdio */
-					<0 11 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PB3 1 &pcfg_pull_none>,
 					/* mac_txen */
-					<0 12 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PB4 1 &pcfg_pull_none>,
 					/* mac_clk */
-					<0 24 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PD0 1 &pcfg_pull_none>,
 					/* mac_mdc */
-					<0 19 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PC3 1 &pcfg_pull_none>,
 					/* mac_txd1 */
-					<0 16 RK_FUNC_1 &pcfg_pull_none>,
+					<0 RK_PC0 1 &pcfg_pull_none>,
 					/* mac_txd0 */
-					<0 17 RK_FUNC_1 &pcfg_pull_none>;
+					<0 RK_PC1 1 &pcfg_pull_none>;
 			};
 		};
 
 		gmac2phy {
-			fephyled_speed100: fephyled-speed100 {
-				rockchip,pins =
-					<0 31 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
 			fephyled_speed10: fephyled-speed10 {
-				rockchip,pins =
-					<0 30 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD6 1 &pcfg_pull_none>;
 			};
 
 			fephyled_duplex: fephyled-duplex {
-				rockchip,pins =
-					<0 30 RK_FUNC_2 &pcfg_pull_none>;
-			};
-
-			fephyled_rxm0: fephyled-rxm0 {
-				rockchip,pins =
-					<0 29 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
-			fephyled_txm0: fephyled-txm0 {
-				rockchip,pins =
-					<0 29 RK_FUNC_2 &pcfg_pull_none>;
-			};
-
-			fephyled_linkm0: fephyled-linkm0 {
-				rockchip,pins =
-					<0 28 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PD6 2 &pcfg_pull_none>;
 			};
 
 			fephyled_rxm1: fephyled-rxm1 {
-				rockchip,pins =
-					<2 25 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD1 2 &pcfg_pull_none>;
 			};
 
 			fephyled_txm1: fephyled-txm1 {
-				rockchip,pins =
-					<2 25 RK_FUNC_3 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD1 3 &pcfg_pull_none>;
 			};
 
 			fephyled_linkm1: fephyled-linkm1 {
-				rockchip,pins =
-					<2 24 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PD0 2 &pcfg_pull_none>;
 			};
 		};
 
 		tsadc_pin {
 			tsadc_int: tsadc-int {
-				rockchip,pins =
-					<2 13 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PB5 2 &pcfg_pull_none>;
 			};
 			tsadc_gpio: tsadc-gpio {
-				rockchip,pins =
-					<2 13 RK_FUNC_GPIO &pcfg_pull_none>;
+				rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
 			};
 		};
 
 		hdmi_pin {
 			hdmi_cec: hdmi-cec {
-				rockchip,pins =
-					<0 3 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PA3 1 &pcfg_pull_none>;
 			};
 
 			hdmi_hpd: hdmi-hpd {
-				rockchip,pins =
-					<0 4 RK_FUNC_1 &pcfg_pull_down>;
+				rockchip,pins = <0 RK_PA4 1 &pcfg_pull_down>;
 			};
 		};
 
@@ -1460,29 +1845,29 @@
 			dvp_d2d9_m0:dvp-d2d9-m0 {
 				rockchip,pins =
 					/* cif_d0 */
-					<3 4 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA4 2 &pcfg_pull_none>,
 					/* cif_d1 */
-					<3 5 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA5 2 &pcfg_pull_none>,
 					/* cif_d2 */
-					<3 6 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA6 2 &pcfg_pull_none>,
 					/* cif_d3 */
-					<3 7 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA7 2 &pcfg_pull_none>,
 					/* cif_d4 */
-					<3 8 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PB0 2 &pcfg_pull_none>,
 					/* cif_d5m0 */
-					<3 9 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PB1 2 &pcfg_pull_none>,
 					/* cif_d6m0 */
-					<3 10 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PB2 2 &pcfg_pull_none>,
 					/* cif_d7m0 */
-					<3 11 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PB3 2 &pcfg_pull_none>,
 					/* cif_href */
-					<3 1 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA1 2 &pcfg_pull_none>,
 					/* cif_vsync */
-					<3 0 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA0 2 &pcfg_pull_none>,
 					/* cif_clkoutm0 */
-					<3 3 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA3 2 &pcfg_pull_none>,
 					/* cif_clkin */
-					<3 2 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PA2 2 &pcfg_pull_none>;
 			};
 		};
 
@@ -1490,29 +1875,29 @@
 			dvp_d2d9_m1:dvp-d2d9-m1 {
 				rockchip,pins =
 					/* cif_d0 */
-					<3 4 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA4 2 &pcfg_pull_none>,
 					/* cif_d1 */
-					<3 5 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA5 2 &pcfg_pull_none>,
 					/* cif_d2 */
-					<3 6 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA6 2 &pcfg_pull_none>,
 					/* cif_d3 */
-					<3 7 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA7 2 &pcfg_pull_none>,
 					/* cif_d4 */
-					<3 8 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PB0 2 &pcfg_pull_none>,
 					/* cif_d5m1 */
-					<2 16 RK_FUNC_4 &pcfg_pull_none>,
+					<2 RK_PC0 4 &pcfg_pull_none>,
 					/* cif_d6m1 */
-					<2 17 RK_FUNC_4 &pcfg_pull_none>,
+					<2 RK_PC1 4 &pcfg_pull_none>,
 					/* cif_d7m1 */
-					<2 18 RK_FUNC_4 &pcfg_pull_none>,
+					<2 RK_PC2 4 &pcfg_pull_none>,
 					/* cif_href */
-					<3 1 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA1 2 &pcfg_pull_none>,
 					/* cif_vsync */
-					<3 0 RK_FUNC_2 &pcfg_pull_none>,
+					<3 RK_PA0 2 &pcfg_pull_none>,
 					/* cif_clkoutm1 */
-					<2 15 RK_FUNC_4 &pcfg_pull_none>,
+					<2 RK_PB7 4 &pcfg_pull_none>,
 					/* cif_clkin */
-					<3 2 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PA2 2 &pcfg_pull_none>;
 			};
 		};
 	};
diff --git a/arch/arm/dts/rk3399-evb-u-boot.dtsi b/arch/arm/dts/rk3399-evb-u-boot.dtsi
index ccb33d34d1..c42bd2856f 100644
--- a/arch/arm/dts/rk3399-evb-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-evb-u-boot.dtsi
@@ -8,6 +8,31 @@
 
 / {
 	chosen {
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
 	};
 };
+
+&rng {
+	status = "okay";
+};
+
+&i2c0 {
+	u-boot,dm-pre-reloc;
+};
+
+&rk808 {
+	u-boot,dm-pre-reloc;
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 4129e902a8..694b0d08d6 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -1,86 +1,18 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 /dts-v1/;
 #include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
 
 / {
 	model = "Rockchip RK3399 Evaluation Board";
-	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
-		     "google,rk3399evb-rev2";
-
-	chosen {
-		stdout-path = &uart2;
-	};
-
-	vdd_center: vdd-center {
-		compatible = "pwm-regulator";
-		pwms = <&pwm3 0 25000 1>;
-		regulator-name = "vdd_center";
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1400000>;
-		regulator-init-microvolt = <950000>;
-		regulator-always-on;
-		regulator-boot-on;
-		status = "okay";
-	};
-
-	vccsys: vccsys {
-		compatible = "regulator-fixed";
-		regulator-name = "vccsys";
-		regulator-boot-on;
-		regulator-always-on;
-	};
-
-	vcc3v3_sys: vcc3v3-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-
-	vcc_phy: vcc-phy-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_phy";
-		regulator-always-on;
-		regulator-boot-on;
-	};
-
-	vcc5v0_host: vcc5v0-host-en {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_host";
-		gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
-	};
-
-	vcc5v0_typec0: vcc5v0-typec0-en {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_typec0";
-		gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>;
-	};
-
-	vcc5v0_typec1: vcc5v0-typec1-en {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_typec1";
-		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
-	};
-
-	clkin_gmac: external-gmac-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "clkin_gmac";
-		#clock-cells = <0>;
-	};
+	compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
 
 	backlight: backlight {
 		compatible = "pwm-backlight";
-		power-supply = <&vccsys>;
-		enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 		brightness-levels = <
 			  0   1   2   3   4   5   6   7
 			  8   9  10  11  12  13  14  15
@@ -116,18 +48,98 @@
 			248 249 250 251 252 253 254 255>;
 		default-brightness-level = <200>;
 		pwms = <&pwm0 0 25000 0>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pwm0_pin>;
-		pwm-delay-us = <10000>;
-		status = "disabled";
 	};
 
-	panel:panel {
-		compatible = "simple-panel";
-		power-supply = <&vcc33_lcd>;
+	edp_panel: edp-panel {
+		compatible ="lg,lp079qx1-sp0v";
 		backlight = <&backlight>;
-		/*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
-		status = "disabled";
+		enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
+		power-supply = <&vcc3v3_s0>;
+
+		port {
+			panel_in_edp: endpoint {
+				remote-endpoint = <&edp_out_panel>;
+			};
+		};
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+
+	vdd_center: vdd-center {
+		compatible = "pwm-regulator";
+		pwms = <&pwm3 0 25000 0>;
+		regulator-name = "vdd_center";
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1400000>;
+		regulator-always-on;
+		regulator-boot-on;
+		status = "okay";
+	};
+
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	vcc5v0_host: vcc5v0-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_host_en>;
+		regulator-name = "vcc5v0_host";
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc_phy: vcc-phy-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_phy";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+};
+
+&edp {
+	status = "okay";
+	force-hpd;
+
+	ports {
+		edp_out: port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_out_panel: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_in_edp>;
+			};
+		};
 	};
 };
 
@@ -135,24 +147,253 @@
 	status = "okay";
 };
 
-&pwm0 {
+&gmac {
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	clock_in_out = "input";
+	phy-supply = <&vcc_phy>;
+	phy-mode = "rgmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
 	status = "okay";
 };
 
-&pwm2 {
+&i2c0 {
 	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+		#clock-cells = <1>;
+		clock-output-names = "rk808-clkout1", "rk808-clkout2";
+
+		vcc1-supply = <&vcc3v3_sys>;
+		vcc2-supply = <&vcc3v3_sys>;
+		vcc3-supply = <&vcc3v3_sys>;
+		vcc4-supply = <&vcc3v3_sys>;
+		vcc6-supply = <&vcc3v3_sys>;
+		vcc7-supply = <&vcc3v3_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc3v3_sys>;
+		vcc10-supply = <&vcc3v3_sys>;
+		vcc11-supply = <&vcc3v3_sys>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcc1v8_pmu>;
+
+		regulators {
+			vdd_log: DCDC_REG1 {
+				regulator-name = "vdd_log";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <900000>;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-name = "vdd_cpu_l";
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG1 {
+				regulator-name = "vcc1v8_dvp";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v0_tp: LDO_REG2 {
+				regulator-name = "vcc3v0_tp";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc1v8_pmu: LDO_REG3 {
+				regulator-name = "vcc1v8_pmu";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sd: LDO_REG4 {
+				regulator-name = "vcc_sd";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcca3v0_codec: LDO_REG5 {
+				regulator-name = "vcca3v0_codec";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_1v5: LDO_REG6 {
+				regulator-name = "vcc_1v5";
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcca1v8_codec: LDO_REG7 {
+				regulator-name = "vcca1v8_codec";
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_3v0: LDO_REG8 {
+				regulator-name = "vcc_3v0";
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v3_s3: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+
+	vdd_cpu_b: regulator@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_cpu_b";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_gpu: regulator@41 {
+		compatible = "silergy,syr828";
+		reg = <0x41>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
 };
 
-&pwm3 {
+&pwm0 {
 	status = "okay";
 };
 
-&saradc {
+&pwm2 {
 	status = "okay";
 };
 
-&sdmmc {
-	bus-width = <4>;
+&pwm3 {
 	status = "okay";
 };
 
@@ -164,117 +405,76 @@
 	status = "okay";
 };
 
-&uart2 {
-	status = "okay";
+&pcie_phy {
+	status = "disabled";
 };
 
-&usb_host0_ehci {
-	status = "okay";
+&pcie0 {
+	ep-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn_cpm>;
+	status = "disabled";
 };
 
-&usb_host0_ohci {
+&u2phy0 {
 	status = "okay";
 };
 
-&usbdrd3_0 {
-	vbus-supply = <&vcc5v0_typec0>;
+&u2phy0_host {
+	phy-supply = <&vcc5v0_host>;
 	status = "okay";
 };
 
-&usb_host1_ehci {
+&u2phy1 {
 	status = "okay";
 };
 
-&usb_host1_ohci {
+&u2phy1_host {
+	phy-supply = <&vcc5v0_host>;
 	status = "okay";
 };
 
-&usbdrd3_1 {
-	vbus-supply = <&vcc5v0_typec1>;
+&uart2 {
 	status = "okay";
 };
 
-&i2c0 {
+&usb_host0_ehci {
 	status = "okay";
-	clock-frequency = <400000>;
-	i2c-scl-falling-time-ns = <50>;
-	i2c-scl-rising-time-ns = <100>;
-	u-boot,dm-pre-reloc;
-
-	rk808: pmic@1b {
-		compatible = "rockchip,rk808";
-		clock-output-names = "xin32k", "wifibt_32kin";
-		interrupt-parent = <&gpio0>;
-		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		reg = <0x1b>;
-		rockchip,system-power-controller;
-		#clock-cells = <1>;
-		u-boot,dm-pre-reloc;
-		status = "okay";
+};
 
-		vcc12-supply = <&vcc3v3_sys>;
+&usb_host0_ohci {
+	status = "okay";
+};
 
-		regulators {
-			vcc33_lcd: SWITCH_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-name = "vcc33_lcd";
-			};
-		};
-	};
+&usb_host1_ehci {
+	status = "okay";
 };
 
-&mipi_dsi {
-	status = "disabled";
-	rockchip,panel = <&panel>;
-	display-timings {
-		timing0 {
-		bits-per-pixel = <24>;
-		clock-frequency = <160000000>;
-		hfront-porch = <120>;
-		hsync-len = <20>;
-		hback-porch = <21>;
-		hactive = <1200>;
-		vfront-porch = <21>;
-		vsync-len = <3>;
-		vback-porch = <18>;
-		vactive = <1920>;
-		hsync-active = <0>;
-		vsync-active = <0>;
-		de-active = <1>;
-		pixelclk-active = <0>;
-		};
-	};
+&usb_host1_ohci {
+	status = "okay";
 };
 
 &pinctrl {
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins =
-				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;
+				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
+	};
 
-		pmic_dvs2: pmic-dvs2 {
+	usb2 {
+		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins =
-				<1 18 RK_FUNC_GPIO &pcfg_pull_down>;
+				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 };
 
-&gmac {
-        phy-supply = <&vcc_phy>;
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-	assigned-clocks = <&cru SCLK_RMII_SRC>;
-	assigned-clock-parents = <&clkin_gmac>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
-	tx_delay = <0x28>;
-	rx_delay = <0x11>;
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index f3f7aa7c45..38e0897db9 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -8,6 +8,6 @@
 
 / {
 	chosen {
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
 	};
 };
diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
index 6b059bd7a0..ebe2ee77ba 100644
--- a/arch/arm/dts/rk3399-ficus.dts
+++ b/arch/arm/dts/rk3399-ficus.dts
@@ -146,6 +146,12 @@
 	};
 };
 
+&spi1 {
+	/* On both Low speed and High speed expansion */
+	cs-gpios = <0>, <&gpio4 RK_PA6 0>, <&gpio4 RK_PA7 0>;
+	status = "okay";
+};
+
 &usbdrd_dwc3_0 {
 	dr_mode = "host";
 };
diff --git a/arch/arm/dts/rk3399-firefly.dts b/arch/arm/dts/rk3399-firefly.dts
index 89c67fd24c..d63faf38cc 100644
--- a/arch/arm/dts/rk3399-firefly.dts
+++ b/arch/arm/dts/rk3399-firefly.dts
@@ -1,19 +1,20 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
  */
 
 /dts-v1/;
+#include <dt-bindings/input/linux-event-codes.h>
 #include <dt-bindings/pwm/pwm.h>
-#include <dt-bindings/pinctrl/rockchip.h>
 #include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
 
 / {
 	model = "Firefly-RK3399 Board";
 	compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
 
 	chosen {
-		stdout-path = &uart2;
+		stdout-path = "serial2:1500000n8";
 	};
 
 	backlight: backlight {
@@ -63,6 +64,48 @@
 		#clock-cells = <0>;
 	};
 
+	dc_12v: dc-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "dc_12v";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		autorepeat;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwrbtn>;
+
+		power {
+			debounce-interval = <100>;
+			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+			label = "GPIO Key Power";
+			linux,code = <KEY_POWER>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
+
+		work-led {
+			label = "work";
+			default-state = "on";
+			gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+		};
+
+		diy-led {
+			label = "diy";
+			default-state = "off";
+			gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
 	rt5640-sound {
 		compatible = "simple-audio-card";
 		simple-audio-card,name = "rockchip,rt5640-codec";
@@ -102,15 +145,27 @@
 		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
 	};
 
+	/* switched by pmic_sleep */
+	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v8_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_1v8>;
+	};
+
 	vcc3v3_pcie: vcc3v3-pcie-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_drv>;
+		pinctrl-0 = <&pcie_pwr_en>;
 		regulator-name = "vcc3v3_pcie";
 		regulator-always-on;
 		regulator-boot-on;
+		vin-supply = <&dc_12v>;
 	};
 
 	vcc3v3_sys: vcc3v3-sys {
@@ -120,32 +175,29 @@
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_sys>;
 	};
 
+	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
 	vcc5v0_host: vcc5v0-host-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
+		pinctrl-0 = <&vcc5v0_host_en>;
 		regulator-name = "vcc5v0_host";
 		regulator-always-on;
+		vin-supply = <&vcc_sys>;
 	};
 
-	vcc5v0_sys: vcc5v0-sys {
+	vcc_sys: vcc-sys {
 		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
+		regulator-name = "vcc_sys";
 		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
-	};
-
-	vcc_phy: vcc-phy-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_phy";
-		regulator-always-on;
-		regulator-boot-on;
+		vin-supply = <&dc_12v>;
 	};
 
 	vdd_log: vdd-log {
@@ -156,16 +208,7 @@
 		regulator-boot-on;
 		regulator-min-microvolt = <430000>;
 		regulator-max-microvolt = <1400000>;
-		regulator-init-microvolt = <950000>;
-	};
-
-	vccadc_ref: vccadc-ref {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc1v8_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_sys>;
 	};
 };
 
@@ -201,15 +244,22 @@
 	assigned-clocks = <&cru SCLK_RMII_SRC>;
 	assigned-clock-parents = <&clkin_gmac>;
 	clock_in_out = "input";
-	phy-supply = <&vcc_phy>;
+	phy-supply = <&vcc_lan>;
 	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
 	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 50000>;
-	tx_delay = <0x33>;
-	rx_delay = <0x45>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_cec>;
 	status = "okay";
 };
 
@@ -231,16 +281,16 @@
 		rockchip,system-power-controller;
 		wakeup-source;
 
-		vcc1-supply = <&vcc3v3_sys>;
-		vcc2-supply = <&vcc3v3_sys>;
-		vcc3-supply = <&vcc3v3_sys>;
-		vcc4-supply = <&vcc3v3_sys>;
-		vcc6-supply = <&vcc3v3_sys>;
-		vcc7-supply = <&vcc3v3_sys>;
+		vcc1-supply = <&vcc_sys>;
+		vcc2-supply = <&vcc_sys>;
+		vcc3-supply = <&vcc_sys>;
+		vcc4-supply = <&vcc_sys>;
+		vcc6-supply = <&vcc_sys>;
+		vcc7-supply = <&vcc_sys>;
 		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc3v3_sys>;
-		vcc10-supply = <&vcc3v3_sys>;
-		vcc11-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc_sys>;
+		vcc10-supply = <&vcc_sys>;
+		vcc11-supply = <&vcc_sys>;
 		vcc12-supply = <&vcc3v3_sys>;
 		vddio-supply = <&vcc1v8_pmu>;
 
@@ -301,12 +351,12 @@
 				};
 			};
 
-			vcc3v0_tp: LDO_REG2 {
-				regulator-name = "vcc3v0_tp";
+			vcc2v8_dvp: LDO_REG2 {
+				regulator-name = "vcc2v8_dvp";
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
+				regulator-min-microvolt = <2800000>;
+				regulator-max-microvolt = <2800000>;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
@@ -324,8 +374,8 @@
 				};
 			};
 
-			vcc_sd: LDO_REG4 {
-				regulator-name = "vcc_sd";
+			vcc_sdio: LDO_REG4 {
+				regulator-name = "vcc_sdio";
 				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
@@ -382,7 +432,7 @@
 				};
 			};
 
-			vcc3v3_s3: SWITCH_REG1 {
+			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
 				regulator-name = "vcc3v3_s3";
 				regulator-always-on;
 				regulator-boot-on;
@@ -412,7 +462,7 @@
 		regulator-ramp-delay = <1000>;
 		regulator-always-on;
 		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
+		vin-supply = <&vcc_sys>;
 
 		regulator-state-mem {
 			regulator-off-in-suspend;
@@ -429,7 +479,7 @@
 		regulator-ramp-delay = <1000>;
 		regulator-always-on;
 		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
+		vin-supply = <&vcc_sys>;
 
 		regulator-state-mem {
 			regulator-off-in-suspend;
@@ -476,19 +526,16 @@
 &i2s0 {
 	rockchip,playback-channels = <8>;
 	rockchip,capture-channels = <8>;
-	#sound-dai-cells = <0>;
 	status = "okay";
 };
 
 &i2s1 {
 	rockchip,playback-channels = <2>;
 	rockchip,capture-channels = <2>;
-	#sound-dai-cells = <0>;
 	status = "okay";
 };
 
 &i2s2 {
-	#sound-dai-cells = <0>;
 	status = "okay";
 };
 
@@ -497,7 +544,7 @@
 
 	bt656-supply = <&vcc1v8_dvp>;
 	audio-supply = <&vcca1v8_codec>;
-	sdmmc-supply = <&vcc_sd>;
+	sdmmc-supply = <&vcc_sdio>;
 	gpio1830-supply = <&vcc_3v0>;
 };
 
@@ -509,7 +556,7 @@
 	ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
 	num-lanes = <4>;
 	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_clkreqn>;
+	pinctrl-0 = <&pcie_clkreqn_cpm>;
 	status = "okay";
 };
 
@@ -532,7 +579,7 @@
 	};
 
 	pcie {
-		pcie_drv: pcie-drv {
+		pcie_pwr_en: pcie-pwr-en {
 			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
@@ -570,10 +617,26 @@
 	};
 
 	usb2 {
-		host_vbus_drv: host-vbus-drv {
+		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	wifi {
+		wifi_host_wake_l: wifi-host-wake-l {
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	leds {
+		work_led_gpio: work_led-gpio {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		diy_led_gpio: diy_led-gpio {
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
 };
 
 &pwm0 {
@@ -585,24 +648,70 @@
 };
 
 &saradc {
-	vref-supply = <&vccadc_ref>;
+	vref-supply = <&vcca1v8_s3>;
 	status = "okay";
 };
 
+&sdio0 {
+	/* WiFi & BT combo module Ampak AP6356S */
+	bus-width = <4>;
+	cap-sdio-irq;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+
+	/* Power supply */
+	vqmmc-supply = &vcc1v8_s3;	/* IO line */
+	vmmc-supply = &vcc_sdio;	/* card's power */
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	status = "okay";
+
+	brcmf: wifi@1 {
+		reg = <1>;
+		compatible = "brcm,bcm4329-fmac";
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+		interrupt-names = "host-wake";
+		brcm,drive-strength = <5>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_host_wake_l>;
+	};
+};
+
 &sdmmc {
 	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
 	status = "okay";
 };
 
 &sdhci {
 	bus-width = <8>;
-	keep-power-in-suspend;
 	mmc-hs400-1_8v;
 	mmc-hs400-enhanced-strobe;
 	non-removable;
 	status = "okay";
 };
 
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
 &tsadc {
 	/* tshut mode 0:CRU 1:GPIO */
 	rockchip,hw-tshut-mode = <1>;
@@ -662,3 +771,37 @@
 &usb_host1_ohci {
 	status = "okay";
 };
+
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-gru-bob.dts b/arch/arm/dts/rk3399-gru-bob.dts
index 1ee0dc0d9f..e6c1c94c8d 100644
--- a/arch/arm/dts/rk3399-gru-bob.dts
+++ b/arch/arm/dts/rk3399-gru-bob.dts
@@ -18,11 +18,11 @@
 		     "google,bob", "google,gru", "rockchip,rk3399";
 
 	edp_panel: edp-panel {
-		compatible = "boe,nv101wxmn51", "simple-panel";
+		compatible = "boe,nv101wxmn51";
 		backlight = <&backlight>;
 		power-supply = <&pp3300_disp>;
 
-		ports {
+		port {
 			panel_in_edp: endpoint {
 				remote-endpoint = <&edp_out_panel>;
 			};
@@ -68,12 +68,22 @@
 
 &spi0 {
 	status = "okay";
+
+	cr50@0 {
+		compatible = "google,cr50";
+		reg = <0>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <5 IRQ_TYPE_EDGE_RISING>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&h1_int_od_l>;
+		spi-max-frequency = <800000>;
+	};
 };
 
 &pinctrl {
 	tpm {
 		h1_int_od_l: h1-int-od-l {
-			rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 };
diff --git a/arch/arm/dts/rk3399-gru-chromebook.dtsi b/arch/arm/dts/rk3399-gru-chromebook.dtsi
index c6495adcca..1384dabbdf 100644
--- a/arch/arm/dts/rk3399-gru-chromebook.dtsi
+++ b/arch/arm/dts/rk3399-gru-chromebook.dtsi
@@ -194,20 +194,25 @@
 
 	backlight: backlight {
 		compatible = "pwm-backlight";
-		brightness-levels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
-				     17 18 19 20 21 22 23 24 25 26 27 28 29 30
-				     31 32 33 34 35 36 37 38 39 40 41 42 43 44
-				     45 46 47 48 49 50 51 52 53 54 55 56 57 58
-				     59 60 61 62 63 64 65 66 67 68 69 70 71 72
-				     73 74 75 76 77 78 79 80 81 82 83 84 85 86
-				     87 88 89 90 91 92 93 94 95 96 97 98 99 100>;
-		default-brightness-level = <51>;
 		enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 		power-supply = <&pp3300_disp>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&bl_en>;
 		pwm-delay-us = <10000>;
 	};
+
+	gpio_keys: gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_host_wake_l>;
+
+		wake_on_bt: wake-on-bt {
+			label = "Wake-on-Bluetooth";
+			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WAKEUP>;
+			wakeup-source;
+		};
+	};
 };
 
 &ppvar_bigcpu {
@@ -232,7 +237,6 @@
 &edp {
 	status = "okay";
 
-	rockchip,panel = <&edp_panel>;
 	ports {
 		edp_out: port@1 {
 			reg = <1>;
@@ -287,11 +291,9 @@ ap_i2c_tp: &i2c5 {
 		#pwm-cells = <1>;
 	};
 
-	usbc_extcon1: extcon@1 {
+	usbc_extcon1: extcon1 {
 		compatible = "google,extcon-usbc-cros-ec";
 		google,usb-port-id = <1>;
-
-		#extcon-cells = <0>;
 	};
 };
 
@@ -361,27 +363,27 @@ ap_i2c_tp: &i2c5 {
 &pinctrl {
 	discrete-regulators {
 		pp1500_en: pp1500-en {
-			rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 
 		pp1800_audio_en: pp1800-audio-en {
-			rockchip,pins = <RK_GPIO0 2 RK_FUNC_GPIO
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO
 					 &pcfg_pull_down>;
 		};
 
 		pp3000_en: pp3000-en {
-			rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO
+			rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 
 		pp3300_disp_en: pp3300-disp-en {
-			rockchip,pins = <RK_GPIO4 27 RK_FUNC_GPIO
+			rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 
 		wlan_module_pd_l: wlan-module-pd-l {
-			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO
+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO
 					 &pcfg_pull_down>;
 		};
 	};
@@ -389,10 +391,10 @@ ap_i2c_tp: &i2c5 {
 
 &wifi {
 	wifi_perst_l: wifi-perst-l {
-		rockchip,pins = <2 27 RK_FUNC_GPIO &pcfg_pull_none>;
+		rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 
 	wlan_host_wake_l: wlan-host-wake-l {
-		rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_none>;
+		rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
 	};
 };
diff --git a/arch/arm/dts/rk3399-gru-kevin.dts b/arch/arm/dts/rk3399-gru-kevin.dts
index 2cc7c47d6a..2bbef9fcbe 100644
--- a/arch/arm/dts/rk3399-gru-kevin.dts
+++ b/arch/arm/dts/rk3399-gru-kevin.dts
@@ -39,11 +39,25 @@
 	};
 
 	edp_panel: edp-panel {
-		compatible = "sharp,lq123p1jx31", "simple-panel";
+		compatible = "sharp,lq123p1jx31";
 		backlight = <&backlight>;
 		power-supply = <&pp3300_disp>;
 
-		ports {
+		panel-timing {
+			clock-frequency = <266666667>;
+			hactive = <2400>;
+			hfront-porch = <48>;
+			hback-porch = <84>;
+			hsync-len = <32>;
+			hsync-active = <0>;
+			vactive = <1600>;
+			vfront-porch = <3>;
+			vback-porch = <120>;
+			vsync-len = <10>;
+			vsync-active = <0>;
+		};
+
+		port {
 			panel_in_edp: endpoint {
 				remote-endpoint = <&edp_out_panel>;
 			};
@@ -118,13 +132,17 @@
 			map0 {
 				trip = <&ppvar_bigcpu_alert>;
 				cooling-device =
-					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				contribution = <4096>;
 			};
 			map1 {
 				trip = <&ppvar_bigcpu_alert>;
 				cooling-device =
-					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				contribution = <1024>;
 			};
 		};
@@ -286,24 +304,24 @@ ap_i2c_dig: &i2c2 {
 	digitizer {
 		/* Has external pullup */
 		cpu1_dig_irq_l: cpu1-dig-irq-l {
-			rockchip,pins = <2 4 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
 		/* Has external pullup */
 		cpu1_dig_pdct_l: cpu1-dig-pdct-l {
-			rockchip,pins = <2 5 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	discrete-regulators {
 		cpu3_pen_pwr_en: cpu3-pen-pwr-en {
-			rockchip,pins = <4 30 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	pen {
 		cpu1_pen_eject: cpu1-pen-eject {
-			rockchip,pins = <0 13 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 };
diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
index 0e2e047180..7ac88392f2 100644
--- a/arch/arm/dts/rk3399-gru.dtsi
+++ b/arch/arm/dts/rk3399-gru.dtsi
@@ -11,13 +11,7 @@
 
 / {
 	chosen {
-		u-boot,dm-pre-reloc;
 		stdout-path = "serial2:115200n8";
-		u-boot,spl-boot-order = &spi_flash;
-	};
-
-	config {
-		u-boot,spl-payload-offset = <0x40000>;
 	};
 
 	/*
@@ -268,17 +262,11 @@
 	pp5000_usb_a_vbus: pp5000 {
 	};
 
-	gpio_keys: gpio-keys {
-		compatible = "gpio-keys";
-		pinctrl-names = "default";
-		pinctrl-0 = <&bt_host_wake_l>;
-
-		wake_on_bt: wake-on-bt {
-			label = "Wake-on-Bluetooth";
-			gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
-			linux,code = <KEY_WAKEUP>;
-			wakeup-source;
-		};
+	ap_rtc_clk: ap-rtc-clk {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		clock-output-names = "xin32k";
+		#clock-cells = <0>;
 	};
 
 	max98357a: max98357a {
@@ -549,8 +537,7 @@ ap_i2c_audio: &i2c8 {
 	pinctrl-names = "default", "sleep";
 	pinctrl-1 = <&spi1_sleep>;
 
-	spi_flash: spiflash@0 {
-		u-boot,dm-pre-reloc;
+	spiflash@0 {
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 
@@ -565,16 +552,12 @@ ap_i2c_audio: &i2c8 {
 
 &spi5 {
 	status = "okay";
-	spi-activate-delay = <100>;
-	spi-max-frequency = <3000000>;
-	spi-deactivate-delay = <200>;
 
 	cros_ec: ec@0 {
 		compatible = "google,cros-ec-spi";
 		reg = <0>;
 		interrupt-parent = <&gpio0>;
 		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
-		ec-interrupt = <&gpio0 1 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&ec_ap_int_l>;
 		spi-max-frequency = <3000000>;
@@ -586,11 +569,9 @@ ap_i2c_audio: &i2c8 {
 			#size-cells = <0>;
 		};
 
-		usbc_extcon0: extcon@0 {
+		usbc_extcon0: extcon0 {
 			compatible = "google,extcon-usbc-cros-ec";
 			google,usb-port-id = <0>;
-
-			#extcon-cells = <0>;
 		};
 	};
 };
@@ -692,29 +673,29 @@ ap_i2c_audio: &i2c8 {
 
 	backlight-enable {
 		bl_en: bl-en {
-			rockchip,pins = <1 17 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	cros-ec {
 		ec_ap_int_l: ec-ap-int-l {
-			rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	discrete-regulators {
 		sd_io_pwr_en: sd-io-pwr-en {
-			rockchip,pins = <RK_GPIO2 2 RK_FUNC_GPIO
+			rockchip,pins = <2 RK_PA2 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 
 		sd_pwr_1800_sel: sd-pwr-1800-sel {
-			rockchip,pins = <RK_GPIO2 28 RK_FUNC_GPIO
+			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 
 		sd_slot_pwr_en: sd-slot-pwr-en {
-			rockchip,pins = <RK_GPIO4 29 RK_FUNC_GPIO
+			rockchip,pins = <4 RK_PD5 RK_FUNC_GPIO
 					 &pcfg_pull_none>;
 		};
 	};
@@ -722,17 +703,17 @@ ap_i2c_audio: &i2c8 {
 	codec {
 		/* Has external pullup */
 		headset_int_l: headset-int-l {
-			rockchip,pins = <1 23 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
 		mic_int: mic-int {
-			rockchip,pins = <1 13 RK_FUNC_GPIO &pcfg_pull_down>;
+			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
 		};
 	};
 
 	max98357a {
 		sdmode_en: sdmode-en {
-			rockchip,pins = <1 2 RK_FUNC_GPIO &pcfg_pull_down>;
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
 		};
 	};
 
@@ -743,7 +724,7 @@ ap_i2c_audio: &i2c8 {
 			 * to hack this as gpio, so the EP could be able to
 			 * de-assert it along and make ClockPM(CPM) work.
 			 */
-			rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
@@ -754,20 +735,20 @@ ap_i2c_audio: &i2c8 {
 		 */
 		sdmmc_bus4: sdmmc-bus4 {
 			rockchip,pins =
-				<4 8 RK_FUNC_1 &pcfg_pull_none_8ma>,
-				<4 9 RK_FUNC_1 &pcfg_pull_none_8ma>,
-				<4 10 RK_FUNC_1 &pcfg_pull_none_8ma>,
-				<4 11 RK_FUNC_1 &pcfg_pull_none_8ma>;
+				<4 RK_PB0 1 &pcfg_pull_none_8ma>,
+				<4 RK_PB1 1 &pcfg_pull_none_8ma>,
+				<4 RK_PB2 1 &pcfg_pull_none_8ma>,
+				<4 RK_PB3 1 &pcfg_pull_none_8ma>;
 		};
 
 		sdmmc_clk: sdmmc-clk {
 			rockchip,pins =
-				<4 12 RK_FUNC_1 &pcfg_pull_none_8ma>;
+				<4 RK_PB4 1 &pcfg_pull_none_8ma>;
 		};
 
 		sdmmc_cmd: sdmmc-cmd {
 			rockchip,pins =
-				<4 13 RK_FUNC_1 &pcfg_pull_none_8ma>;
+				<4 RK_PB5 1 &pcfg_pull_none_8ma>;
 		};
 
 		/*
@@ -781,12 +762,12 @@ ap_i2c_audio: &i2c8 {
 		 */
 		sdmmc_cd: sdmmc-cd {
 			rockchip,pins =
-				<0 7 RK_FUNC_1 &pcfg_pull_none>;
+				<0 RK_PA7 1 &pcfg_pull_none>;
 		};
 
 		/* This is where we actually hook up CD; has external pull */
 		sdmmc_cd_gpio: sdmmc-cd-gpio {
-			rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
@@ -796,47 +777,47 @@ ap_i2c_audio: &i2c8 {
 			 * Pull down SPI1 CLK/CS/RX/TX during suspend, to
 			 * prevent leakage.
 			 */
-			rockchip,pins = <1 9 RK_FUNC_GPIO &pcfg_pull_down>,
-					<1 10 RK_FUNC_GPIO &pcfg_pull_down>,
-					<1 7 RK_FUNC_GPIO &pcfg_pull_down>,
-					<1 8 RK_FUNC_GPIO &pcfg_pull_down>;
+			rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>,
+					<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
 		};
 	};
 
 	touchscreen {
 		touch_int_l: touch-int-l {
-			rockchip,pins = <3 13 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 
 		touch_reset_l: touch-reset-l {
-			rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	trackpad {
 		ap_i2c_tp_pu_en: ap-i2c-tp-pu-en {
-			rockchip,pins = <3 12 RK_FUNC_GPIO &pcfg_output_high>;
+			rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_output_high>;
 		};
 
 		trackpad_int_l: trackpad-int-l {
-			rockchip,pins = <1 4 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	wifi: wifi {
 		wlan_module_reset_l: wlan-module-reset-l {
-			rockchip,pins = <1 11 RK_FUNC_GPIO &pcfg_pull_none>;
+			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
 		bt_host_wake_l: bt-host-wake-l {
 			/* Kevin has an external pull up, but Gru does not */
-			rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	write-protect {
 		ap_fw_wp: ap-fw-wp {
-			rockchip,pins = <1 18 RK_FUNC_GPIO &pcfg_pull_up>;
+			rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 };
diff --git a/arch/arm/dts/rk3399-khadas-edge.dtsi b/arch/arm/dts/rk3399-khadas-edge.dtsi
index 4944d78a0a..e87a044774 100644
--- a/arch/arm/dts/rk3399-khadas-edge.dtsi
+++ b/arch/arm/dts/rk3399-khadas-edge.dtsi
@@ -654,9 +654,12 @@
 	sd-uhs-sdr104;
 	vqmmc-supply = <&vcc1v8_s3>;
 	vmmc-supply = <&vccio_sd>;
+	#address-cells = <1>;
+	#size-cells = <0>;
 	status = "okay";
 
 	brcmf: wifi@1 {
+		reg = <1>;
 		compatible = "brcm,bcm4329-fmac";
 		interrupt-parent = <&gpio0>;
 		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
diff --git a/arch/arm/dts/rk3399-leez-p710.dts b/arch/arm/dts/rk3399-leez-p710.dts
index 32baa57b94..73be38a537 100644
--- a/arch/arm/dts/rk3399-leez-p710.dts
+++ b/arch/arm/dts/rk3399-leez-p710.dts
@@ -42,14 +42,14 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
-	vcc5v0_sys: vcc5v0-sys {
+	vcc3v3_lan: vcc3v3-lan {
 		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
+		regulator-name = "vcc3v3_lan";
 		regulator-always-on;
 		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&dc5v_adp>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vim-supply = <&vcc3v3_sys>;
 	};
 
 	vcc3v3_sys: vcc3v3-sys {
@@ -83,14 +83,14 @@
 		vin-supply = <&vcc5v0_sys>;
 	};
 
-	vcc3v3_lan: vcc3v3-lan {
+	vcc5v0_sys: vcc5v0-sys {
 		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_lan";
+		regulator-name = "vcc5v0_sys";
 		regulator-always-on;
 		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vim-supply = <&vcc3v3_sys>;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&dc5v_adp>;
 	};
 
 	vdd_log: vdd-log {
@@ -510,6 +510,14 @@
 	};
 };
 
+&sdhci {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	non-removable;
+	status = "okay";
+};
+
 &sdmmc {
 	bus-width = <4>;
 	cap-mmc-highspeed;
@@ -522,14 +530,6 @@
 	status = "okay";
 };
 
-&sdhci {
-	bus-width = <8>;
-	mmc-hs400-1_8v;
-	mmc-hs400-enhanced-strobe;
-	non-removable;
-	status = "okay";
-};
-
 &tcphy0 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-nanopc-t4.dts b/arch/arm/dts/rk3399-nanopc-t4.dts
index 84433cf02b..e0d75617bb 100644
--- a/arch/arm/dts/rk3399-nanopc-t4.dts
+++ b/arch/arm/dts/rk3399-nanopc-t4.dts
@@ -52,13 +52,58 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&ir_rx>;
 	};
+
+	fan: pwm-fan {
+		compatible = "pwm-fan";
+		/*
+		 * With 20KHz PWM and an EVERCOOL EC4007H12SA fan, these levels
+		 * work out to 0, ~1200, ~3000, and 5000RPM respectively.
+		 */
+		cooling-levels = <0 12 18 255>;
+		#cooling-cells = <2>;
+		fan-supply = <&vcc12v0_sys>;
+		pwms = <&pwm1 0 50000 0>;
+	};
+};
+
+&cpu_thermal {
+	trips {
+		cpu_warm: cpu_warm {
+			temperature = <55000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+
+		cpu_hot: cpu_hot {
+			temperature = <65000>;
+			hysteresis = <2000>;
+			type = "active";
+		};
+	};
+
+	cooling-maps {
+		map2 {
+			trip = <&cpu_warm>;
+			cooling-device = <&fan THERMAL_NO_LIMIT 1>;
+		};
+
+		map3 {
+			trip = <&cpu_hot>;
+			cooling-device = <&fan 2 THERMAL_NO_LIMIT>;
+		};
+	};
+};
+
+&pcie0 {
+	num-lanes = <4>;
+	vpcie3v3-supply = <&vcc3v3_sys>;
 };
 
 &pinctrl {
 	ir {
 		ir_rx: ir-rx {
 			/* external pullup to VCC3V3_SYS, despite being 1.8V :/ */
-			rockchip,pins = <0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+			rockchip,pins = <0 RK_PA6 1 &pcfg_pull_none>;
 		};
 	};
 };
diff --git a/arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
new file mode 100644
index 0000000000..a2f9786473
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+ * Copyright (C) 2020 Deepak Das <deepakdas.linux@gmail.com>
+ */
+
+#include "rk3399-nanopi4-u-boot.dtsi"
+#include "rk3399-sdram-ddr3-1866.dtsi"
diff --git a/arch/arm/dts/rk3399-nanopi-m4-2gb.dts b/arch/arm/dts/rk3399-nanopi-m4-2gb.dts
new file mode 100644
index 0000000000..60358ab8c7
--- /dev/null
+++ b/arch/arm/dts/rk3399-nanopi-m4-2gb.dts
@@ -0,0 +1,66 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * FriendlyElec NanoPi M4 board device tree source
+ *
+ * Copyright (c) 2018 FriendlyElec Computer Tech. Co., Ltd.
+ * (http://www.friendlyarm.com)
+ *
+ * Copyright (c) 2018 Collabora Ltd.
+ * Copyright (c) 2019 Arm Ltd.
+ */
+
+/dts-v1/;
+#include "rk3399-nanopi4.dtsi"
+
+/ {
+	model = "FriendlyElec NanoPi M4";
+	compatible = "friendlyarm,nanopi-m4", "rockchip,rk3399";
+
+	vdd_5v: vdd-5v {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_5v";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	vcc5v0_core: vcc5v0-core {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_core";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vdd_5v>;
+	};
+
+	vcc5v0_usb1: vcc5v0-usb1 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_usb1";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	vcc5v0_usb2: vcc5v0-usb2 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_usb2";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+	};
+};
+
+&vcc3v3_sys {
+	vin-supply = <&vcc5v0_core>;
+};
+
+&u2phy0_host {
+	phy-supply = <&vcc5v0_usb1>;
+};
+
+&u2phy1_host {
+	phy-supply = <&vcc5v0_usb2>;
+};
+
+&vbus_typec {
+	regulator-always-on;
+	vin-supply = <&vdd_5v>;
+};
diff --git a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
index a126bbaf08..a9d10592d5 100644
--- a/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-nanopi4-u-boot.dtsi
@@ -5,6 +5,12 @@
 
 #include "rk3399-u-boot.dtsi"
 
+/{
+	chosen {
+		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+	};
+};
+
 &sdmmc {
 	pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
 };
diff --git a/arch/arm/dts/rk3399-nanopi4.dtsi b/arch/arm/dts/rk3399-nanopi4.dtsi
index d325e11728..c88018a0ef 100644
--- a/arch/arm/dts/rk3399-nanopi4.dtsi
+++ b/arch/arm/dts/rk3399-nanopi4.dtsi
@@ -48,7 +48,7 @@
 	};
 
 	/* switched by pmic_sleep */
-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+	vcc1v8_s3: vcc1v8-s3 {
 		compatible = "regulator-fixed";
 		regulator-always-on;
 		regulator-boot-on;
@@ -71,6 +71,27 @@
 		vin-supply = <&vcc3v3_sys>;
 	};
 
+	/*
+	 * Really, this is supplied by vcc_1v8, and vcc1v8_s3 only
+	 * drives the enable pin, but we can't quite model that.
+	 */
+	vcca0v9_s3: vcca0v9-s3 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		regulator-name = "vcca0v9_s3";
+		vin-supply = <&vcc1v8_s3>;
+	};
+
+	/* As above, actually supplied by vcc3v3_sys */
+	vcca1v8_s3: vcca1v8-s3 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-name = "vcca1v8_s3";
+		vin-supply = <&vcc1v8_s3>;
+	};
+
 	vbus_typec: vbus-typec {
 		compatible = "regulator-fixed";
 		regulator-min-microvolt = <5000000>;
@@ -148,15 +169,28 @@
 	assigned-clocks = <&cru SCLK_RMII_SRC>;
 	clock_in_out = "input";
 	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
+	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
+	phy-handle = <&rtl8211e>;
 	phy-mode = "rgmii";
 	phy-supply = <&vcc3v3_s3>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
 	tx_delay = <0x28>;
 	rx_delay = <0x11>;
 	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		rtl8211e: phy@1 {
+			reg = <1>;
+			interrupt-parent = <&gpio3>;
+			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
+			reset-assert-us = <10000>;
+			reset-deassert-us = <30000>;
+			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &gpu {
@@ -171,6 +205,10 @@
 	status = "okay";
 };
 
+&hdmi_sound {
+	status = "okay";
+};
+
 &i2c0 {
 	clock-frequency = <400000>;
 	i2c-scl-rising-time-ns = <160>;
@@ -446,6 +484,10 @@
 	status = "okay";
 };
 
+&i2s2 {
+	status = "okay";
+};
+
 &io_domains {
 	bt656-supply = <&vcc_1v8>;
 	audio-supply = <&vcca1v8_codec>;
@@ -464,7 +506,9 @@
 &pcie0 {
 	ep-gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
 	max-link-speed = <2>;
-	num-lanes = <4>;
+	num-lanes = <2>;
+	vpcie0v9-supply = <&vcca0v9_s3>;
+	vpcie1v8-supply = <&vcca1v8_s3>;
 	status = "okay";
 };
 
@@ -481,6 +525,16 @@
 		};
 	};
 
+	phy {
+		phy_intb: phy-intb {
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		phy_rstb: phy-rstb {
+			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pmic {
 		cpu_b_sleep: cpu-b-sleep {
 			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
diff --git a/arch/arm/dts/rk3399-orangepi.dts b/arch/arm/dts/rk3399-orangepi.dts
index cf37b96a6b..f9f7246d4d 100644
--- a/arch/arm/dts/rk3399-orangepi.dts
+++ b/arch/arm/dts/rk3399-orangepi.dts
@@ -136,13 +136,13 @@
 		vin-supply = <&vcc_sys>;
 	};
 
-	vcc5v0_typec0: vcc5v0-typec0-regulator {
+	vbus_typec: vbus-typec-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
 		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_typec0_en>;
-		regulator-name = "vcc5v0_typec0";
+		pinctrl-0 = <&vcc5v0_typec_en>;
+		regulator-name = "vbus_typec";
 		vin-supply = <&vcc_sys>;
 	};
 
@@ -202,14 +202,27 @@
 	clock_in_out = "input";
 	phy-supply = <&vcc3v3_s3>;
 	phy-mode = "rgmii";
+	phy-handle = <&rtl8211e>;
 	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
+	pinctrl-0 = <&rgmii_pins>, <&phy_intb>, <&phy_rstb>;
 	tx_delay = <0x28>;
 	rx_delay = <0x11>;
 	status = "okay";
+
+	mdio {
+		compatible = "snps,dwmac-mdio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		rtl8211e: phy@1 {
+			reg = <1>;
+			interrupt-parent = <&gpio3>;
+			interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>;
+			reset-assert-us = <10000>;
+			reset-deassert-us = <30000>;
+			reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &gpu {
@@ -419,6 +432,8 @@
 		compatible = "silergy,syr827";
 		reg = <0x40>;
 		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cpu_b_sleep>;
 		regulator-name = "vdd_cpu_b";
 		regulator-min-microvolt = <712500>;
 		regulator-max-microvolt = <1500000>;
@@ -436,6 +451,8 @@
 		compatible = "silergy,syr828";
 		reg = <0x41>;
 		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&gpu_sleep>;
 		regulator-name = "vdd_gpu";
 		regulator-min-microvolt = <712500>;
 		regulator-max-microvolt = <1500000>;
@@ -472,6 +489,7 @@
 		compatible = "asahi-kasei,ak09911";
 		reg = <0x0c>;
 		vdd-supply = <&vcc3v3_s3>;
+		vid-supply = <&vcc3v3_s3>;
 	};
 
 	mpu6500@68 {
@@ -504,6 +522,16 @@
 		pinctrl-0 = <&light_int_l>;
 		vdd-supply = <&vcc3v3_s3>;
 	};
+
+	fusb302@22 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&chg_cc_int_l>;
+		vbus-supply = <&vbus_typec>;
+	};
 };
 
 &io_domains {
@@ -526,7 +554,25 @@
 		};
 	};
 
+	phy {
+		phy_intb: phy-intb {
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		phy_rstb: phy-rstb {
+			rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pmic {
+		cpu_b_sleep: cpu-b-sleep {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		gpu_sleep: gpu-sleep {
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
 		pmic_int_l: pmic-int-l {
 			rockchip,pins =
 				<1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -536,7 +582,7 @@
 	sd {
 		sdmmc0_pwr_h: sdmmc0-pwr-h {
 			rockchip,pins =
-				<RK_GPIO0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+				<0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
@@ -546,7 +592,7 @@
 				<4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 
-		vcc5v0_typec0_en: vcc5v0-typec0-en {
+		vcc5v0_typec_en: vcc5v0-typec-en {
 			rockchip,pins =
 				<1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
@@ -595,6 +641,12 @@
 			rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	fusb302 {
+		chg_cc_int_l: chg-cc-int-l {
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
 };
 
 &pwm0 {
@@ -631,9 +683,12 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
 	sd-uhs-sdr104;
+	#address-cells = <1>;
+	#size-cells = <0>;
 	status = "okay";
 
 	brcmf: wifi@1 {
+		reg = <1>;
 		compatible = "brcm,bcm4329-fmac";
 		interrupt-parent = <&gpio0>;
 		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
@@ -676,7 +731,7 @@
 	status = "okay";
 
 	u2phy0_otg: otg-port {
-		phy-supply = <&vcc5v0_typec0>;
+		phy-supply = <&vbus_typec>;
 		status = "okay";
 	};
 
@@ -707,12 +762,14 @@
 	bluetooth {
 		compatible = "brcm,bcm43438-bt";
 		clocks = <&rk808 1>;
-		clock-names = "ext_clock";
+		clock-names = "lpo";
 		device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
 		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
 		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_reg_on_h>;
+		vbat-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcc_1v8>;
 	};
 };
 
diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
new file mode 100644
index 0000000000..1a2e24d3ef
--- /dev/null
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Peter Robinson <pbrobinson at gmail.com>
+ */
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
+
+/ {
+	aliases {
+		spi0 = &spi1;
+	};
+
+	chosen {
+		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
+	};
+};
+
+&i2c0 {
+	u-boot,dm-pre-reloc;
+};
+
+&rk808 {
+	u-boot,dm-pre-reloc;
+};
+
+&sdhci {
+	max-frequency = <25000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&sdmmc {
+	max-frequency = <20000000>;
+	u-boot,dm-pre-reloc;
+};
+
+&spiflash {
+	u-boot,dm-pre-reloc;
+};
+
+&vdd_log {
+	regulator-init-microvolt = <950000>;
+};
diff --git a/arch/arm/dts/rk3399-pinebook-pro.dts b/arch/arm/dts/rk3399-pinebook-pro.dts
new file mode 100644
index 0000000000..294d21bf45
--- /dev/null
+++ b/arch/arm/dts/rk3399-pinebook-pro.dts
@@ -0,0 +1,1096 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
+ * Copyright (c) 2020 Tobias Schramm <t.schramm@manjaro.org>
+ */
+
+/dts-v1/;
+#include <dt-bindings/input/gpio-keys.h>
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+#include <dt-bindings/usb/pd.h>
+#include <dt-bindings/leds/common.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+	model = "Pine64 Pinebook Pro";
+	compatible = "pine64,pinebook-pro", "rockchip,rk3399";
+
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	backlight: edp-backlight {
+		compatible = "pwm-backlight";
+		power-supply = <&vcc_12v>;
+		pwms = <&pwm0 0 740740 0>;
+	};
+
+	edp_panel: edp-panel {
+		compatible = "boe,nv140fhmn49";
+		backlight = <&backlight>;
+		enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&panel_en_gpio>;
+		power-supply = <&vcc3v3_panel>;
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				panel_in_edp: endpoint@0 {
+					reg = <0>;
+					remote-endpoint = <&edp_out_panel>;
+				};
+			};
+		};
+	};
+
+	/*
+	 * Use separate nodes for gpio-keys to allow for selective deactivation
+	 * of wakeup sources via sysfs without disabling the whole key
+	 */
+	gpio-key-lid {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&lidbtn_gpio>;
+
+		lid {
+			debounce-interval = <20>;
+			gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_LOW>;
+			label = "Lid";
+			linux,code = <SW_LID>;
+			linux,input-type = <EV_SW>;
+			wakeup-event-action = <EV_ACT_DEASSERTED>;
+			wakeup-source;
+		};
+	};
+
+	gpio-key-power {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwrbtn_gpio>;
+
+		power {
+			debounce-interval = <20>;
+			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+			label = "Power";
+			linux,code = <KEY_POWER>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwrled_gpio &slpled_gpio>;
+
+		green-led {
+			color = <LED_COLOR_ID_GREEN>;
+			default-state = "on";
+			function = LED_FUNCTION_POWER;
+			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+			label = "green:power";
+		};
+
+		red-led {
+			color = <LED_COLOR_ID_RED>;
+			default-state = "off";
+			function = LED_FUNCTION_STANDBY;
+			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+			label = "red:standby";
+			panic-indicator;
+			retain-state-suspended;
+		};
+	};
+
+	/* Power sequence for SDIO WiFi module */
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h_gpio>;
+		post-power-on-delay-ms = <100>;
+		power-off-delay-us = <500000>;
+
+		/* WL_REG_ON on module */
+		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+	};
+
+	/* Audio components */
+	es8316-sound {
+		compatible = "simple-audio-card";
+		pinctrl-names = "default";
+		pinctrl-0 = <&hp_det_gpio>;
+		simple-audio-card,name = "rockchip,es8316-codec";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,mclk-fs = <256>;
+
+		simple-audio-card,widgets =
+			"Microphone", "Mic Jack",
+			"Headphone", "Headphones",
+			"Speaker", "Speaker";
+		simple-audio-card,routing =
+			"MIC1", "Mic Jack",
+			"Headphones", "HPOL",
+			"Headphones", "HPOR",
+			"Speaker Amplifier INL", "HPOL",
+			"Speaker Amplifier INR", "HPOR",
+			"Speaker", "Speaker Amplifier OUTL",
+			"Speaker", "Speaker Amplifier OUTR";
+
+		simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+		simple-audio-card,aux-devs = <&speaker_amp>;
+		simple-audio-card,pin-switches = "Speaker";
+
+		simple-audio-card,cpu {
+			sound-dai = <&i2s1>;
+		};
+
+		simple-audio-card,codec {
+			sound-dai = <&es8316>;
+		};
+	};
+
+	speaker_amp: speaker-amplifier {
+		compatible = "simple-audio-amplifier";
+		enable-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
+		sound-name-prefix = "Speaker Amplifier";
+		VCC-supply = <&pa_5v>;
+	};
+
+	/* Power tree */
+	/* Root power source */
+	vcc_sysin: vcc-sysin {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_sysin";
+		regulator-always-on;
+		regulator-boot-on;
+	};
+
+	/* Regulators supplied by vcc_sysin */
+	/* LCD backlight supply */
+	vcc_12v: vcc-12v {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_12v";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+		vin-supply = <&vcc_sysin>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* Main 3.3 V supply */
+	vcc3v3_sys: wifi_bat: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc_sysin>;
+
+		regulator-state-mem {
+			regulator-on-in-suspend;
+		};
+	};
+
+	/* 5 V USB power supply */
+	vcc5v0_usb: pa_5v: vcc5v0-usb-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_5v_gpio>;
+		regulator-name = "vcc5v0_usb";
+		regulator-always-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc_sysin>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* RK3399 logic supply */
+	vdd_log: vdd-log {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 25000 1>;
+		regulator-name = "vdd_log";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1400000>;
+		vin-supply = <&vcc_sysin>;
+
+		regulator-state-mem {
+			regulator-on-in-suspend;
+		};
+	};
+
+	/* Regulators supplied by vcc3v3_sys */
+	/* 0.9 V supply, always on */
+	vcc_0v9: vcc-0v9 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_0v9";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	/* S3 1.8 V supply, switched by vcc1v8_s3 */
+	vcca1v8_s3: vcc1v8-s3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcca1v8_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	/* micro SD card power */
+	vcc3v0_sd: vcc3v0-sd {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc0_pwr_h_gpio>;
+		regulator-name = "vcc3v0_sd";
+		regulator-always-on;
+		regulator-min-microvolt = <3000000>;
+		regulator-max-microvolt = <3000000>;
+		vin-supply = <&vcc3v3_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* LCD panel power, called VCC3V3_S0 in schematic */
+	vcc3v3_panel: vcc3v3-panel {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PC6 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&lcdvcc_en_gpio>;
+		regulator-name = "vcc3v3_panel";
+		regulator-always-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-enable-ramp-delay = <100000>;
+		vin-supply = <&vcc3v3_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* M.2 adapter power, switched by vcc1v8_s3 */
+	vcc3v3_ssd: vcc3v3-ssd {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_ssd";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
+	/* Regulators supplied by vcc5v0_usb */
+	/* USB 3 port power supply regulator  */
+	vcc5v0_otg: vcc5v0-otg {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_host_en_gpio>;
+		regulator-name = "vcc5v0_otg";
+		regulator-always-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_usb>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* Regulators supplied by vcc5v0_usb */
+	/* Type C port power supply regulator */
+	vbus_5vout: vbus_typec: vbus-5vout {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_typec0_en_gpio>;
+		regulator-name = "vbus_5vout";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc5v0_usb>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	/* Regulators supplied by vcc_1v8 */
+	/* Primary 0.9 V LDO */
+	vcca0v9_s3: vcca0v9-s3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc0v9_s3";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc_1v8>;
+
+		regulator-state-mem {
+			regulator-on-in-suspend;
+		};
+	};
+
+	mains_charger: dc-charger {
+		compatible = "gpio-charger";
+		charger-type = "mains";
+		gpios = <&gpio4 RK_PD0 GPIO_ACTIVE_LOW>;
+
+		/* Also triggered by USB charger */
+		pinctrl-names = "default";
+		pinctrl-0 = <&dc_det_gpio>;
+	};
+};
+
+&cdn_dp {
+	status = "okay";
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&edp {
+	force-hpd;
+	pinctrl-names = "default";
+	pinctrl-0 = <&edp_hpd>;
+	status = "okay";
+
+	ports {
+		edp_out: port@1 {
+			reg = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			edp_out_panel: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&panel_in_edp>;
+			};
+		};
+	};
+};
+
+&emmc_phy {
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
+&hdmi_sound {
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	i2c-scl-falling-time-ns = <4>;
+	i2c-scl-rising-time-ns = <168>;
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+		interrupt-parent = <&gpio3>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l_gpio>;
+		rockchip,system-power-controller;
+		wakeup-source;
+
+		vcc1-supply = <&vcc_sysin>;
+		vcc2-supply = <&vcc_sysin>;
+		vcc3-supply = <&vcc_sysin>;
+		vcc4-supply = <&vcc_sysin>;
+		vcc6-supply = <&vcc_sysin>;
+		vcc7-supply = <&vcc_sysin>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc_sysin>;
+		vcc10-supply = <&vcc_sysin>;
+		vcc11-supply = <&vcc_sysin>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vcc13-supply = <&vcc_sysin>;
+		vcc14-supply = <&vcc_sysin>;
+
+		regulators {
+			/* rk3399 center logic supply */
+			vdd_center: DCDC_REG1 {
+				regulator-name = "vdd_center";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-name = "vdd_cpu_l";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: vcc_wl: DCDC_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			/* not used */
+			LDO_REG1 {
+			};
+
+			/* not used */
+			LDO_REG2 {
+			};
+
+			vcc1v8_pmupll: LDO_REG3 {
+				regulator-name = "vcc1v8_pmupll";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sdio: LDO_REG4 {
+				regulator-name = "vcc_sdio";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcca3v0_codec: LDO_REG5 {
+				regulator-name = "vcca3v0_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_1v5: LDO_REG6 {
+				regulator-name = "vcc_1v5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcca1v8_codec: LDO_REG7 {
+				regulator-name = "vcca1v8_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_3v0: LDO_REG8 {
+				regulator-name = "vcc_3v0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v3_s3: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
+				regulator-always-on;
+				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
+				regulator-always-on;
+				regulator-boot-on;
+
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+
+	vdd_cpu_b: regulator@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel1_gpio>;
+		regulator-name = "vdd_cpu_b";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		vin-supply = <&vcc_1v8>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_gpu: regulator@41 {
+		compatible = "silergy,syr828";
+		reg = <0x41>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel2_gpio>;
+		regulator-name = "vdd_gpu";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		vin-supply = <&vcc_1v8>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c1 {
+	clock-frequency = <100000>;
+	i2c-scl-falling-time-ns = <4>;
+	i2c-scl-rising-time-ns = <168>;
+	status = "okay";
+
+	es8316: es8316@11 {
+		compatible = "everest,es8316";
+		reg = <0x11>;
+		clocks = <&cru SCLK_I2S_8CH_OUT>;
+		clock-names = "mclk";
+		#sound-dai-cells = <0>;
+	};
+};
+
+&i2c3 {
+	i2c-scl-falling-time-ns = <15>;
+	i2c-scl-rising-time-ns = <450>;
+	status = "okay";
+};
+
+&i2c4 {
+	i2c-scl-falling-time-ns = <20>;
+	i2c-scl-rising-time-ns = <600>;
+	status = "okay";
+
+	fusb0: fusb30x@22 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		fcs,int_n = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fusb0_int_gpio>;
+		vbus-supply = <&vbus_typec>;
+
+		connector {
+			compatible = "usb-c-connector";
+			data-role = "host";
+			label = "USB-C";
+			op-sink-microwatt = <1000000>;
+			power-role = "dual";
+			sink-pdos =
+				<PDO_FIXED(5000, 2500, PDO_FIXED_USB_COMM)>;
+			source-pdos =
+				<PDO_FIXED(5000, 1400, PDO_FIXED_USB_COMM)>;
+			try-power-role = "sink";
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+
+					usbc_hs: endpoint {
+						remote-endpoint =
+							<&u2phy0_typec_hs>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+
+					usbc_ss: endpoint {
+						remote-endpoint =
+							<&tcphy0_typec_ss>;
+					};
+				};
+
+				port@2 {
+					reg = <2>;
+
+					usbc_dp: endpoint {
+						remote-endpoint =
+							<&tcphy0_typec_dp>;
+					};
+				};
+			};
+		};
+	};
+};
+
+&i2s1 {
+	#sound-dai-cells = <0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2s_8ch_mclk_gpio>, <&i2s1_2ch_bus>;
+	rockchip,capture-channels = <8>;
+	rockchip,playback-channels = <8>;
+	status = "okay";
+};
+
+&io_domains {
+	audio-supply = <&vcc_3v0>;
+	gpio1830-supply = <&vcc_3v0>;
+	sdmmc-supply = <&vcc_sdio>;
+	status = "okay";
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pcie0 {
+	bus-scan-delay-ms = <1000>;
+	ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+	max-link-speed = <2>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn_cpm>;
+	vpcie0v9-supply = <&vcca0v9_s3>;
+	vpcie1v8-supply = <&vcca1v8_s3>;
+	vpcie3v3-supply = <&vcc3v3_ssd>;
+	status = "okay";
+};
+
+&pinctrl {
+	buttons {
+		pwrbtn_gpio: pwrbtn-gpio {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		lidbtn_gpio: lidbtn-gpio {
+			rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	dc-charger {
+		dc_det_gpio: dc-det-gpio {
+			rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	es8316 {
+		hp_det_gpio: hp-det-gpio {
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	fusb302x {
+		fusb0_int_gpio: fusb0-int-gpio {
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	i2s1 {
+		i2s_8ch_mclk_gpio: i2s-8ch-mclk-gpio {
+			rockchip,pins = <4 RK_PA0 1 &pcfg_pull_none>;
+		};
+	};
+
+	lcd-panel {
+		lcdvcc_en_gpio: lcdvcc-en-gpio {
+			rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		panel_en_gpio: panel-en-gpio {
+			rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		lcd_panel_reset_gpio: lcd-panel-reset-gpio {
+			rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds {
+		pwrled_gpio: pwrled_gpio {
+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		slpled_gpio: slpled_gpio {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int_l_gpio: pmic-int-l-gpio {
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		vsel1_gpio: vsel1-gpio {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		vsel2_gpio: vsel2-gpio {
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	sdcard {
+		sdmmc0_pwr_h_gpio: sdmmc0-pwr-h-gpio {
+			rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h_gpio: wifi-enable-h-gpio {
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb-typec {
+		vcc5v0_typec0_en_gpio: vcc5v0-typec0-en-gpio {
+			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	usb2 {
+		pwr_5v_gpio: pwr-5v-gpio {
+			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		vcc5v0_host_en_gpio: vcc5v0-host-en-gpio {
+			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	wireless-bluetooth {
+		bt_wake_gpio: bt-wake-gpio {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_host_wake_gpio: bt-host-wake-gpio {
+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_reset_gpio: bt-reset-gpio {
+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pmu_io_domains {
+	pmu1830-supply = <&vcc_3v0>;
+	status = "okay";
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcca1v8_s3>;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v0_sd>;
+	vqmmc-supply = <&vcc_sdio>;
+	status = "okay";
+};
+
+&sdio0 {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	status = "okay";
+};
+
+&spi1 {
+	max-freq = <10000000>;
+	status = "okay";
+
+	spiflash: flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		m25p,fast-read;
+		spi-max-frequency = <10000000>;
+	};
+};
+
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy0_dp {
+	port {
+		tcphy0_typec_dp: endpoint {
+			remote-endpoint = <&usbc_dp>;
+		};
+	};
+};
+
+&tcphy0_usb3 {
+	port {
+		tcphy0_typec_ss: endpoint {
+			remote-endpoint = <&usbc_ss>;
+		};
+	};
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&tsadc {
+	/* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-mode = <1>;
+	/* tshut polarity 0:LOW 1:HIGH */
+	rockchip,hw-tshut-polarity = <1>;
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		phy-supply = <&vcc5v0_otg>;
+		status = "okay";
+	};
+
+	port {
+		u2phy0_typec_hs: endpoint {
+			remote-endpoint = <&usbc_hs>;
+		};
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_otg>;
+		status = "okay";
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	uart-has-rtscts;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm4345c5";
+		clocks = <&rk808 1>;
+		clock-names = "lpo";
+		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+		max-speed = <1500000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_host_wake_gpio &bt_wake_gpio &bt_reset_gpio>;
+		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+		vbat-supply = <&wifi_bat>;
+		vddio-supply = <&vcc_wl>;
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	dr_mode = "host";
+	status = "okay";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-puma-u-boot.dtsi b/arch/arm/dts/rk3399-puma-u-boot.dtsi
index 52f62b5d39..3ad1139833 100644
--- a/arch/arm/dts/rk3399-puma-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-puma-u-boot.dtsi
@@ -13,7 +13,7 @@
        chosen {
                stdout-path = "serial0:115200n8";
                u-boot,spl-boot-order = \
-                       "same-as-spl", &spiflash, &sdhci, &sdmmc;
+			"same-as-spl", &norflash, &sdhci, &sdmmc;
        };
 
        aliases {
@@ -21,4 +21,33 @@
                spi1 = &spi5;
        };
 
+	/*
+	 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
+	 * eMMC and SPI flash powered-down initially (in fact it keeps the
+	 * reset signal asserted).  Even though it is an enable signal, we
+	 * model this as a regulator.
+	 */
+	bios_enable: bios_enable {
+		compatible = "regulator-fixed";
+		u-boot,dm-pre-reloc;
+		regulator-name = "bios_enable";
+		enable-active-high;
+		gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+	};
+};
+
+&gpio1 {
+	u-boot,dm-pre-reloc;
+};
+
+&gpio3 {
+	u-boot,dm-pre-reloc;
+};
+
+&norflash {
+	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index 558b6337df..07694b196f 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -1,30 +1,74 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
  */
 
 #include <dt-bindings/pwm/pwm.h>
 #include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
 
 / {
-	model = "Theobroma Systems RK3399-Q7 SoM";
-	compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
-
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
-		pinctrl-0 = <&leds_pins_puma>;
+		pinctrl-0 = <&led_pin_module>;
 
-		module_led {
+		module-led {
 			label = "module_led";
 			gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
 			linux,default-trigger = "heartbeat";
+			panic-indicator;
 		};
+	};
 
-		sd_card_led {
-			label = "sd_card_led";
-			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
-			linux,default-trigger = "mmc0";
+	/*
+	 * Overwrite the opp-table for CPUB as this board uses a different
+	 * regulator (FAN53555) that only allows 10mV steps and therefore
+	 * can't reach the operation point target voltages from rk3399-opp.dtsi
+	 */
+	/delete-node/ opp-table1;
+	cluster1_opp: opp-table1 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp00 {
+			opp-hz = /bits/ 64 <408000000>;
+			opp-microvolt = <800000>;
+			clock-latency-ns = <40000>;
+		};
+		opp01 {
+			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <800000>;
+		};
+		opp02 {
+			opp-hz = /bits/ 64 <816000000>;
+			opp-microvolt = <830000>;
+			opp-suspend;
+		};
+		opp03 {
+			opp-hz = /bits/ 64 <1008000000>;
+			opp-microvolt = <880000>;
+		};
+		opp04 {
+			opp-hz = /bits/ 64 <1200000000>;
+			opp-microvolt = <950000>;
+		};
+		opp05 {
+			opp-hz = /bits/ 64 <1416000000>;
+			opp-microvolt = <1030000>;
+		};
+		opp06 {
+			opp-hz = /bits/ 64 <1608000000>;
+			opp-microvolt = <1100000>;
+		};
+		opp07 {
+			opp-hz = /bits/ 64 <1800000000>;
+			opp-microvolt = <1200000>;
+		};
+		opp08 {
+			opp-hz = /bits/ 64 <1992000000>;
+			opp-microvolt = <1230000>;
+			turbo-mode;
 		};
 	};
 
@@ -35,79 +79,14 @@
 		#clock-cells = <0>;
 	};
 
-	dw_hdmi_audio: dw-hdmi-audio {
-		status = "enabled";
-		compatible = "rockchip,dw-hdmi-audio";
-		#sound-dai-cells = <0>;
-	};
-
-	hdmi_codec: hdmi-codec {
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,name = "HDMI-CODEC";
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s2>;
-		};
-
-		simple-audio-card,codec {
-			sound-dai = <&hdmi>;
-		};
-	};
-
-	hdmi_sound: hdmi-sound {
-		status = "disabled";
-		compatible = "simple-audio-card";
-		simple-audio-card,format = "i2s";
-		simple-audio-card,mclk-fs = <256>;
-		simple-audio-card,name = "rockchip,hdmi";
-
-		simple-audio-card,cpu {
-			sound-dai = <&i2s2>;
-		};
-		simple-audio-card,codec {
-			sound-dai = <&hdmi>;
-		};
-	};
-
-	usbhub_enable: usbhub_enable {
-		compatible = "regulator-fixed";
-		regulator-name = "usbhub_enable";
-		enable-active-low;
-		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&host_vbus_drv>;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-	};
-
-	/*
-	 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
-	 * eMMC and SPI flash powered-down initially (in fact it keeps the
-	 * reset signal asserted).  Even though it is an enable signal, we
-	 * model this as a regulator.
-	 */
-	bios_enable: bios_enable {
-		compatible = "regulator-fixed";
-		u-boot,dm-pre-reloc;
-		regulator-name = "bios_enable";
-		enable-active-high;
-		gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-	};
-
-	vccadc_ref: vccadc-ref {
+	vcc1v2_phy: vcc1v2-phy {
 		compatible = "regulator-fixed";
-		regulator-name = "vcc1v8_sys";
+		regulator-name = "vcc1v2_phy";
 		regulator-always-on;
 		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
+		regulator-min-microvolt = <1200000>;
+		regulator-max-microvolt = <1200000>;
+		vin-supply = <&vcc5v0_sys>;
 	};
 
 	vcc3v3_sys: vcc3v3-sys {
@@ -117,16 +96,18 @@
 		regulator-boot-on;
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
 	};
 
-	vcc5v0_otg: vcc5v0-otg-regulator {
+	vcc5v0_host: vcc5v0-host-regulator {
 		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
+		enable-active-low;
 		pinctrl-names = "default";
-		pinctrl-0 = <&otg_vbus_drv>;
-		regulator-name = "vcc5v0_otg";
+		pinctrl-0 = <&vcc5v0_host_en>;
+		regulator-name = "vcc5v0_host";
 		regulator-always-on;
+		vin-supply = <&vcc5v0_sys>;
 	};
 
 	vcc5v0_sys: vcc5v0-sys {
@@ -137,48 +118,55 @@
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 	};
+};
 
-	vcc_phy: vcc-phy-regulator {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc_phy";
-		regulator-always-on;
-		regulator-boot-on;
-	};
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
 
-	vdd_log: vdd-log {
-		compatible = "pwm-regulator";
-		pwms = <&pwm2 0 25000 1>;
-		regulator-name = "vdd_log";
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1400000>;
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-init-microvolt = <950000>;
-	};
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
 };
 
 &emmc_phy {
 	status = "okay";
+	drive-impedance-ohm = <33>;
 };
 
 &gmac {
-	phy-supply = <&vcc_phy>;
-	phy-mode = "rgmii";
-	clock_in_out = "input";
-	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <2 10000 50000>;
 	assigned-clocks = <&cru SCLK_RMII_SRC>;
 	assigned-clock-parents = <&clkin_gmac>;
+	clock_in_out = "input";
+	phy-supply = <&vcc1v2_phy>;
+	phy-mode = "rgmii";
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
 	tx_delay = <0x10>;
 	rx_delay = <0x10>;
 	status = "okay";
 };
 
-&hdmi {
-	#sound-dai-cells = <0>;
+&gpu {
+	mali-supply = <&vdd_gpu>;
 	status = "okay";
 };
 
@@ -188,37 +176,17 @@
 	i2c-scl-falling-time-ns = <4>;
 	clock-frequency = <400000>;
 
-	vdd_gpu: vdd_gpu {
-		status = "okay";
-		compatible = "fcs,fan53555";
-		reg = <0x60>;
-		vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
-		vin-supply = <&vcc5v0_sys>;
-		regulator-compatible = "fan53555-reg";
-		regulator-name = "vdd_gpu";
-		regulator-min-microvolt = <600000>;
-		regulator-max-microvolt = <1230000>;
-		regulator-ramp-delay = <1000>;
-		fcs,suspend-voltage-selector = <1>;
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-initial-state = <3>;
-			regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
 	rk808: pmic@1b {
 		compatible = "rockchip,rk808";
 		reg = <0x1b>;
 		interrupt-parent = <&gpio1>;
-		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;  // TODO check interrupt?
+		interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
 		pinctrl-names = "default";
 		pinctrl-0 = <&pmic_int_l>;
 		rockchip,system-power-controller;
 		wakeup-source;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk808-clkout2";
 
 		vcc1-supply = <&vcc5v0_sys>;
 		vcc2-supply = <&vcc5v0_sys>;
@@ -235,44 +203,44 @@
 
 		regulators {
 			vdd_center: DCDC_REG1 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd_center";
 				regulator-min-microvolt = <750000>;
 				regulator-max-microvolt = <1350000>;
 				regulator-ramp-delay = <6001>;
-				regulator-name = "vdd_center";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vdd_cpu_l: DCDC_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vdd_cpu_l";
 				regulator-min-microvolt = <750000>;
 				regulator-max-microvolt = <1350000>;
 				regulator-ramp-delay = <6001>;
-				regulator-name = "vdd_cpu_l";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-name = "vcc_ddr";
 				regulator-state-mem {
 					regulator-on-in-suspend;
 				};
 			};
 
 			vcc_1v8: DCDC_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc_1v8";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1800000>;
@@ -280,32 +248,32 @@
 			};
 
 			vcc_ldo1: LDO_REG1 {
-				regulator-boot-on;
+				regulator-name = "vcc_ldo1";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_ldo1";
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc1v8_hdmi: LDO_REG2 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc1v8_hdmi";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc1v8_hdmi";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc1v8_pmu: LDO_REG3 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc1v8_pmu";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc1v8_pmu";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <1800000>;
@@ -313,11 +281,11 @@
 			};
 
 			vcc_sd: LDO_REG4 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc_sd";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3000000>;
-				regulator-name = "vcc_sd";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-on-in-suspend;
 					regulator-suspend-microvolt = <3000000>;
@@ -325,79 +293,105 @@
 			};
 
 			vcc_ldo5: LDO_REG5 {
-				regulator-boot-on;
+				regulator-name = "vcc_ldo5";
 				regulator-min-microvolt = <3000000>;
 				regulator-max-microvolt = <3000000>;
-				regulator-name = "vcc_ldo5";
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc_ldo6: LDO_REG6 {
-				regulator-boot-on;
+				regulator-name = "vcc_ldo6";
 				regulator-min-microvolt = <1500000>;
 				regulator-max-microvolt = <1500000>;
-				regulator-name = "vcc_ldo6";
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc0v9_hdmi: LDO_REG7 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc0v9_hdmi";
 				regulator-min-microvolt = <900000>;
 				regulator-max-microvolt = <900000>;
-				regulator-name = "vcc0v9_hdmi";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc_efuse: LDO_REG8 {
-				regulator-always-on;
-				regulator-boot-on;
+				regulator-name = "vcc_efuse";
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <1800000>;
-				regulator-name = "vcc_efuse";
+				regulator-always-on;
+				regulator-boot-on;
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc3v3_s3: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-name = "vcc3v3_s3";
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 
 			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
 				regulator-always-on;
 				regulator-boot-on;
-				regulator-name = "vcc3v3_s0";
 				regulator-state-mem {
 					regulator-off-in-suspend;
 				};
 			};
 		};
 	};
+
+	vdd_gpu: regulator@60 {
+		compatible = "fcs,fan53555";
+		reg = <0x60>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <600000>;
+		regulator-max-microvolt = <1230000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+	};
+};
+
+&i2c7 {
+	status = "okay";
+	clock-frequency = <400000>;
+
+	fan: fan@18 {
+		compatible = "ti,amc6821";
+		reg = <0x18>;
+		#cooling-cells = <2>;
+	};
+
+	rtc_twi: rtc@6f {
+		compatible = "isil,isl1208";
+		reg = <0x6f>;
+	};
 };
 
 &i2c8 {
 	status = "okay";
 	clock-frequency = <400000>;
 
-	vdd_cpu_b: vdd_cpu_b {
-		status = "okay";
+	vdd_cpu_b: regulator@60 {
 		compatible = "fcs,fan53555";
 		reg = <0x60>;
-		vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
 		vin-supply = <&vcc5v0_sys>;
-		regulator-compatible = "fan53555-reg";
 		regulator-name = "vdd_cpu_b";
 		regulator-min-microvolt = <600000>;
 		regulator-max-microvolt = <1230000>;
@@ -405,48 +399,36 @@
 		fcs,suspend-voltage-selector = <1>;
 		regulator-always-on;
 		regulator-boot-on;
-		regulator-initial-state = <3>;
-			regulator-state-mem {
-			regulator-off-in-suspend;
-		};
 	};
 };
 
 &i2s0 {
+	pinctrl-0 = <&i2s0_2ch_bus>;
+	rockchip,playback-channels = <2>;
+	rockchip,capture-channels = <2>;
 	status = "okay";
-	rockchip,i2s-broken-burst-len;
-	rockchip,playback-channels = <8>;
-	rockchip,capture-channels = <8>;
-	#sound-dai-cells = <0>;
 };
 
-&i2s2 {
-	#sound-dai-cells = <0>;
-	status = "okay";
+/*
+ * As Q7 does not specify neither a global nor a RX clock for I2S these
+ * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
+ * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
+ * conflicts.
+ */
+&i2s0_2ch_bus {
+	rockchip,pins =
+		<3 RK_PD0 1 &pcfg_pull_none>,
+		<3 RK_PD2 1 &pcfg_pull_none>,
+		<3 RK_PD3 1 &pcfg_pull_none>,
+		<3 RK_PD7 1 &pcfg_pull_none>;
 };
 
 &io_domains {
 	status = "okay";
-
-	bt656-supply = <&vcc_1v8>;	/* bt656_gpio2ab_ms */
-	audio-supply = <&vcc_1v8>;	/* audio_gpio3d4a_ms */
-	sdmmc-supply = <&vcc_sd>;	/* sdmmc_gpio4b_ms */
-	gpio1830-supply = <&vcc_1v8>;	/* gpio1833_gpio4cd_ms */
-};
-
-&pcie0 {
-	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
-	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
-	assigned-clock-rates = <100000000>;
-	ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
-	num-lanes = <4>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_clkreqn>;
-	status = "okay";
-};
-
-&pcie_phy {
-		status = "okay";
+	bt656-supply = <&vcc_1v8>;
+	audio-supply = <&vcc_1v8>;
+	sdmmc-supply = <&vcc_sd>;
+	gpio1830-supply = <&vcc_1v8>;
 };
 
 &pmu_io_domains {
@@ -454,195 +436,99 @@
 	pmu1830-supply = <&vcc_1v8>;
 };
 
-&pwm0 {
-	status = "okay";
-};
-
 &pwm2 {
 	status = "okay";
 };
 
-&sdhci {
-	bus-width = <8>;
-	mmc-hs400-1_8v;
-	supports-emmc;
-	non-removable;
-	keep-power-in-suspend;
-	mmc-hs400-enhanced-strobe;
-	status = "okay";
-};
-
-&sdmmc {
-	clock-frequency = <150000000>;
-	max-frequency = <40000000>;
-	supports-sd;
-	bus-width = <4>;
-	cap-mmc-highspeed;
-	cap-sd-highspeed;
-	disable-wp;
-	num-slots = <1>;
-	vqmmc-supply = <&vcc_sd>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "disabled";
-};
-
-&usb_host0_ohci {
-	status = "disabled";
-};
-
-&usbdrd3_0 {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "disabled";
-};
-
-&usb_host1_ohci {
-	status = "disabled";
-};
-
-&usbdrd3_1 {
-	status = "okay";
-	tsd,usb-port-power = "usbhub_enable";
-};
-
-&vopb {
-	status = "okay";
-};
-
-&gpio1 {
-	u-boot,dm-pre-reloc;
-};
-
-&gpio3 {
-	u-boot,dm-pre-reloc;
-};
-
 &pinctrl {
-	/* Pins that are not explicitely used by any devices */
-	pinctrl-names = "default";
-	pinctrl-0 = <&puma_pin_hog>;
-
-	hog {
-		puma_pin_hog: puma_pin_hog {
+	i2c8 {
+		i2c8_xfer_a: i2c8-xfer {
 			rockchip,pins =
-				/* We need pull-ups on Q7 buttons */
-				<RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
-				<RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
-				<RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
-				<RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
+			  <1 RK_PC4 1 &pcfg_pull_up>,
+			  <1 RK_PC5 1 &pcfg_pull_up>;
 		};
 	};
 
-	pmic {
-		pmic_int_l: pmic-int-l {
+	leds {
+		led_pin_module: led-module-gpio {
 			rockchip,pins =
-				<RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
+			  <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
-	leds_pins_puma: led_pins@0 {
-			rockchip,pins =
-				<RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
-				<RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-	};
-
-	usb2 {
-		otg_vbus_drv: otg-vbus-drv {
-			rockchip,pins =
-				<RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		host_vbus_drv: host-vbus-drv {
+	pmic {
+		pmic_int_l: pmic-int-l {
 			rockchip,pins =
-				<RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+			  <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
-	i2c8 {
-		i2c8_xfer_a: i2c8-xfer {
+	usb2 {
+		vcc5v0_host_en: vcc5v0-host-en {
 			rockchip,pins =
-				<RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
-				<RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
+			  <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 };
 
-&i2c1 {
+&sdhci {
+	bus-width = <8>;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
+	non-removable;
 	status = "okay";
-	clock-frequency = <400000>;
 };
-&i2c2 {
-	status = "okay";
-	clock-frequency = <400000>;
+
+&sdmmc {
+	vqmmc-supply = <&vcc_sd>;
 };
-&i2c4 {
+
+&spi1 {
 	status = "okay";
-	clock-frequency = <400000>;
+
+	norflash: flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
 };
-&i2c6 {
+
+&tcphy1 {
 	status = "okay";
-	clock-frequency = <400000>;
 };
 
-&i2c6_xfer {
-	/* Enable pull-ups, the pins would float otherwise. */
-	rockchip,pins =
-		<RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>,
-		<RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
+&tsadc {
+	rockchip,hw-tshut-mode = <1>;
+	rockchip,hw-tshut-polarity = <1>;
+	status = "okay";
 };
 
-&i2c7 {
+&u2phy1 {
 	status = "okay";
-	clock-frequency = <400000>;
 
-	rtc_twi: rtc@6f {
-		compatible = "isil,isl1208";
-		reg = <0x6f>;
+	u2phy1_otg: otg-port {
+		status = "okay";
 	};
-	fan: fan@18 {
-		compatible = "ti,amc6821";
-		reg = <0x18>;
-		cooling-min-state = <0>;
-		cooling-max-state = <9>;
-		#cooling-cells = <2>;
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
 	};
 };
 
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_xfer &uart0_cts>;
+&usbdrd3_1 {
 	status = "okay";
 };
 
-
-&spi1 {
+&usbdrd_dwc3_1 {
 	status = "okay";
+	dr_mode = "host";
+};
 
-	#address-cells = <1>;
-	#size-cells = <0>;
-
-	spiflash: w25q32dw@0 {
-		u-boot,dm-pre-reloc;
-
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <49500000>;
-		spi-cpol;
-		spi-cpha;
-	};
+&usb_host1_ehci {
+	status = "okay";
 };
 
-&spi5 {
+&usb_host1_ohci {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi
new file mode 100644
index 0000000000..f50c18dd3d
--- /dev/null
+++ b/arch/arm/dts/rk3399-roc-pc-mezzanine-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include "rk3399-roc-pc-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-roc-pc-mezzanine.dts b/arch/arm/dts/rk3399-roc-pc-mezzanine.dts
new file mode 100644
index 0000000000..2acb3d500f
--- /dev/null
+++ b/arch/arm/dts/rk3399-roc-pc-mezzanine.dts
@@ -0,0 +1,93 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
+ * Copyright (c) 2019 Markus Reichl <m.reichl@fivetechno.de>
+ */
+
+/dts-v1/;
+#include "rk3399-roc-pc.dtsi"
+
+/ {
+	model = "Firefly ROC-RK3399-PC Mezzanine Board";
+	compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
+
+	vcc3v3_ngff: vcc3v3-ngff {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_ngff";
+		enable-active-high;
+		gpio = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc3v3_ngff_en>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&dc_12v>;
+	};
+
+	vcc3v3_pcie: vcc3v3-pcie {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_pcie";
+		enable-active-high;
+		gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc3v3_pcie_en>;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&dc_12v>;
+	};
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pcie0 {
+	ep-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_perst>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
+	vpcie1v8-supply = <&vcc1v8_pmu>;
+	vpcie0v9-supply = <&vcca_0v9>;
+	status = "okay";
+};
+
+&pinctrl {
+	ngff {
+		vcc3v3_ngff_en: vcc3v3-ngff-en {
+			rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		vcc3v3_pcie_en: vcc3v3-pcie-en {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		pcie_perst: pcie-perst {
+			rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&sdio0 {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vcc3v3_ngff>;
+	vqmmc-supply = <&vcc_1v8>;
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442981..141dd0b306 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -14,9 +14,45 @@
 	chosen {
 		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
 	};
+
+	vcc_hub_en: vcc_hub_en-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hub_rst>;
+		regulator-name = "vcc_hub_en";
+		regulator-always-on;
+	};
+};
+
+/*
+ * should be placed inside mp8859, but not until mp8859 has
+ * its own dt-binding.
+ */
+&dc_12v {
+	compatible = "regulator-fixed";
+	regulator-name = "dc_12v";
+	regulator-always-on;
+	regulator-boot-on;
+	regulator-min-microvolt = <12000000>;
+	regulator-max-microvolt = <12000000>;
+	vin-supply = <&vcc_vbus_typec0>;
 };
 
 &vdd_log {
 	regulator-min-microvolt = <430000>;
 	regulator-init-microvolt = <950000>;
 };
+
+&vcc5v0_host {
+	regulator-always-on;
+};
+
+&vcc_sys {
+	regulator-always-on;
+};
+
+&vcc_sdio {
+	regulator-always-on;
+};
diff --git a/arch/arm/dts/rk3399-roc-pc.dts b/arch/arm/dts/rk3399-roc-pc.dts
index 6a909e4eef..cd41954253 100644
--- a/arch/arm/dts/rk3399-roc-pc.dts
+++ b/arch/arm/dts/rk3399-roc-pc.dts
@@ -8,6 +8,5 @@
 
 / {
 	model = "Firefly ROC-RK3399-PC Board";
-	compatible = "libretech,roc-rk3399-pc", "firefly,roc-rk3399-pc",
-		     "rockchip,rk3399";
+	compatible = "firefly,roc-rk3399-pc", "rockchip,rk3399";
 };
diff --git a/arch/arm/dts/rk3399-roc-pc.dtsi b/arch/arm/dts/rk3399-roc-pc.dtsi
index 9a1ce3a4ae..9f225e9c3d 100644
--- a/arch/arm/dts/rk3399-roc-pc.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc.dtsi
@@ -110,20 +110,6 @@
 		regulator-max-microvolt = <5000000>;
 	};
 
-	/*
-	 * should be placed inside mp8859, but not until mp8859 has
-	 * its own dt-binding.
-	 */
-	dc_12v: mp8859-dcdc1 {
-		compatible = "regulator-fixed";
-		regulator-name = "dc_12v";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-		vin-supply = <&vcc_vbus_typec0>;
-	};
-
 	/* switched by pmic_sleep */
 	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
 		compatible = "regulator-fixed";
@@ -176,7 +162,6 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&vcc5v0_host_en &hub_rst>;
 		regulator-name = "vcc5v0_host";
-		regulator-always-on;
 		vin-supply = <&vcc_sys>;
 	};
 
@@ -198,7 +183,6 @@
 		pinctrl-names = "default";
 		pinctrl-0 = <&vcc_sys_en>;
 		regulator-name = "vcc_sys";
-		regulator-always-on;
 		regulator-boot-on;
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
@@ -392,7 +376,6 @@
 
 			vcc_sdio: LDO_REG4 {
 				regulator-name = "vcc_sdio";
-				regulator-always-on;
 				regulator-boot-on;
 				regulator-min-microvolt = <1800000>;
 				regulator-max-microvolt = <3000000>;
@@ -549,6 +532,24 @@
 		vbus-supply = <&vcc_vbus_typec0>;
 		status = "okay";
 	};
+
+	mp8859: regulator@66 {
+		compatible = "mps,mp8859";
+		reg = <0x66>;
+		dc_12v: mp8859_dcdc {
+			regulator-name = "dc_12v";
+			regulator-min-microvolt = <12000000>;
+			regulator-max-microvolt = <12000000>;
+			regulator-always-on;
+			regulator-boot-on;
+			vin-supply = <&vcc_vbus_typec0>;
+
+			regulator-state-mem {
+				regulator-on-in-suspend;
+				regulator-suspend-microvolt = <12000000>;
+			};
+		};
+	};
 };
 
 &i2s0 {
diff --git a/arch/arm/dts/rk3399-rock-pi-4.dts b/arch/arm/dts/rk3399-rock-pi-4.dts
index 4a543f2117..3923ec01ef 100644
--- a/arch/arm/dts/rk3399-rock-pi-4.dts
+++ b/arch/arm/dts/rk3399-rock-pi-4.dts
@@ -25,6 +25,15 @@
 		#clock-cells = <0>;
 	};
 
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+	};
+
 	vcc12v_dcin: dc-12v {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc12v_dcin";
@@ -44,6 +53,16 @@
 		vin-supply = <&vcc12v_dcin>;
 	};
 
+	vcc_0v9: vcc-0v9 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_0v9";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
+
 	vcc3v3_pcie: vcc3v3-pcie-regulator {
 		compatible = "regulator-fixed";
 		enable-active-high;
@@ -157,12 +176,22 @@
 	status = "okay";
 };
 
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
 &hdmi {
+	ddc-i2c-bus = <&i2c3>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&hdmi_cec>;
 	status = "okay";
 };
 
+&hdmi_sound {
+	status = "okay";
+};
+
 &i2c0 {
 	clock-frequency = <400000>;
 	i2c-scl-rising-time-ns = <168>;
@@ -444,13 +473,60 @@
 	pmu1830-supply = <&vcc_3v0>;
 };
 
+&pcie_phy {
+	status = "okay";
+};
+
+&pcie0 {
+	ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
+	max-link-speed = <2>;
+	num-lanes = <4>;
+	pinctrl-0 = <&pcie_clkreqnb_cpm>;
+	pinctrl-names = "default";
+	vpcie0v9-supply = <&vcc_0v9>;
+	vpcie1v8-supply = <&vcc_1v8>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
+	status = "okay";
+};
+
 &pinctrl {
+	bt {
+		bt_enable_h: bt-enable-h {
+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_host_wake_l: bt-host-wake-l {
+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_wake_l: bt-wake-l {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	pcie {
 		pcie_pwr_en: pcie-pwr-en {
 			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
+	sdio0 {
+		sdio0_bus4: sdio0-bus4 {
+			rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>,
+					<2 RK_PC5 1 &pcfg_pull_up_20ma>,
+					<2 RK_PC6 1 &pcfg_pull_up_20ma>,
+					<2 RK_PC7 1 &pcfg_pull_up_20ma>;
+		};
+
+		sdio0_cmd: sdio0-cmd {
+			rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>;
+		};
+
+		sdio0_clk: sdio0-clk {
+			rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>;
+		};
+	};
+
 	pmic {
 		pmic_int_l: pmic-int-l {
 			rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -476,6 +552,16 @@
 			rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	wifi {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		wifi_host_wake_l: wifi-host-wake-l {
+			rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
 };
 
 &pwm2 {
@@ -488,6 +574,32 @@
 	vref-supply = <&vcc_1v8>;
 };
 
+&sdio0 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	bus-width = <4>;
+	clock-frequency = <50000000>;
+	cap-sdio-irq;
+	cap-sd-highspeed;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+	status = "okay";
+
+	brcmf: wifi@1 {
+		compatible = "brcm,bcm4329-fmac";
+		reg = <1>;
+		interrupt-parent = <&gpio0>;
+		interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
+		interrupt-names = "host-wake";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_host_wake_l>;
+	};
+};
+
 &sdmmc {
 	bus-width = <4>;
 	cap-mmc-highspeed;
@@ -551,6 +663,23 @@
 	};
 };
 
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+	};
+};
+
 &uart2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index 82f2c311af..c190089e26 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -8,7 +8,7 @@
 
 / {
 	chosen {
-		u-boot,spl-boot-order = &sdhci, &sdmmc;
+		u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
 	};
 
 	vdd_log: vdd-log {
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
index 12285c51cc..437a75f31a 100644
--- a/arch/arm/dts/rk3399-rock960.dts
+++ b/arch/arm/dts/rk3399-rock960.dts
@@ -114,6 +114,55 @@
 	};
 };
 
+&spi0 {
+	/* On Low speed expansion (LS-SPI0) */
+	status = "okay";
+};
+
+&spi4 {
+	/* On High speed expansion (HS-SPI1) */
+	status = "okay";
+};
+
+&thermal_zones {
+	cpu_thermal: cpu {
+		polling-delay-passive = <100>;
+		polling-delay = <1000>;
+		thermal-sensors = <&tsadc 0>;
+		sustainable-power = <1550>;
+
+		trips {
+			cpu_alert0: cpu_alert0 {
+				    temperature = <65000>;
+				    hysteresis = <2000>;
+				    type = "passive";
+			};
+
+			cpu_alert1: cpu_alert1 {
+				    temperature = <75000>;
+				    hysteresis = <2000>;
+				    type = "passive";
+			};
+
+			cpu_crit: cpu_crit {
+				  temperature = <95000>;
+				  hysteresis = <2000>;
+				  type = "critical";
+			};
+		};
+
+		cooling-maps {
+			     map0 {
+
+			     trip = <&cpu_alert1>;
+			     cooling-device =
+					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+					<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+			};
+		};
+	};
+};
+
 &usbdrd_dwc3_0 {
 	dr_mode = "otg";
 };
diff --git a/arch/arm/dts/rk3399-rock960.dtsi b/arch/arm/dts/rk3399-rock960.dtsi
index c7d48d41e1..ba7c75c9f2 100644
--- a/arch/arm/dts/rk3399-rock960.dtsi
+++ b/arch/arm/dts/rk3399-rock960.dtsi
@@ -76,6 +76,15 @@
 		regulator-always-on;
 		vin-supply = <&vcc5v0_sys>;
 	};
+
+	vcc_0v9: vcc-0v9 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc_0v9";
+		regulator-always-on;
+		regulator-min-microvolt = <900000>;
+		regulator-max-microvolt = <900000>;
+		vin-supply = <&vcc3v3_sys>;
+	};
 };
 
 &cpu_l0 {
@@ -384,6 +393,8 @@
 	num-lanes = <4>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_clkreqn_cpm>;
+	vpcie0v9-supply = <&vcc_0v9>;
+	vpcie1v8-supply = <&vcca_1v8>;
 	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 };
@@ -531,7 +542,7 @@
 	cap-mmc-highspeed;
 	cap-sd-highspeed;
 	clock-frequency = <100000000>;
-	clock-freq-min-max = <100000 100000000>;
+	max-frequency = <100000000>;
 	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 	disable-wp;
 	sd-uhs-sdr104;
diff --git a/arch/arm/dts/rk3399-rockpro64.dts b/arch/arm/dts/rk3399-rockpro64.dts
index e544deb61d..4b42717800 100644
--- a/arch/arm/dts/rk3399-rockpro64.dts
+++ b/arch/arm/dts/rk3399-rockpro64.dts
@@ -2,752 +2,29 @@
 /*
  * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
  * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
+ * Copyright (c) 2019 Katsuhiro Suzuki <katsuhiro@katsuster.net>
  */
 
 /dts-v1/;
-#include <dt-bindings/input/linux-event-codes.h>
-#include <dt-bindings/pwm/pwm.h>
-#include "rk3399.dtsi"
-#include "rk3399-opp.dtsi"
+#include "rk3399-rockpro64.dtsi"
 
 / {
-	model = "Pine64 RockPro64";
-	compatible = "pine64,rockpro64", "rockchip,rk3399";
-
-	chosen {
-		stdout-path = "serial2:1500000n8";
-	};
-
-	clkin_gmac: external-gmac-clock {
-		compatible = "fixed-clock";
-		clock-frequency = <125000000>;
-		clock-output-names = "clkin_gmac";
-		#clock-cells = <0>;
-	};
-
-	gpio-keys {
-		compatible = "gpio-keys";
-		autorepeat;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pwrbtn>;
-
-		power {
-			debounce-interval = <100>;
-			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
-			label = "GPIO Key Power";
-			linux,code = <KEY_POWER>;
-			wakeup-source;
-		};
-	};
-
-	leds {
-		compatible = "gpio-leds";
-		pinctrl-names = "default";
-		pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
-
-		work-led {
-			label = "work";
-			default-state = "on";
-			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
-		};
-
-		diy-led {
-			label = "diy";
-			default-state = "off";
-			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
-		};
-	};
-
-	fan: pwm-fan {
-		compatible = "pwm-fan";
-		#cooling-cells = <2>;
-		fan-supply = <&vcc12v_dcin>;
-		pwms = <&pwm1 0 50000 0>;
-	};
-
-	sdio_pwrseq: sdio-pwrseq {
-		compatible = "mmc-pwrseq-simple";
-		clocks = <&rk808 1>;
-		clock-names = "ext_clock";
-		pinctrl-names = "default";
-		pinctrl-0 = <&wifi_enable_h>;
-
-		/*
-		 * On the module itself this is one of these (depending
-		 * on the actual card populated):
-		 * - SDIO_RESET_L_WL_REG_ON
-		 * - PDN (power down when low)
-		 */
-		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
-	};
-
-	vcc12v_dcin: vcc12v-dcin {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc12v_dcin";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <12000000>;
-		regulator-max-microvolt = <12000000>;
-	};
-
-	/* switched by pmic_sleep */
-	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc1v8_s3";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		vin-supply = <&vcc_1v8>;
-	};
-
-	vcc3v3_pcie: vcc3v3-pcie-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pcie_pwr_en>;
-		regulator-name = "vcc3v3_pcie";
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc3v3_sys: vcc3v3-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc3v3_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <3300000>;
-		regulator-max-microvolt = <3300000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-
-	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
-	vcc5v0_host: vcc5v0-host-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_host_en>;
-		regulator-name = "vcc5v0_host";
-		regulator-always-on;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_typec: vcc5v0-typec-regulator {
-		compatible = "regulator-fixed";
-		enable-active-high;
-		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vcc5v0_typec_en>;
-		regulator-name = "vcc5v0_typec";
-		regulator-always-on;
-		vin-supply = <&vcc5v0_usb>;
-	};
-
-	vcc5v0_sys: vcc5v0-sys {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_sys";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vcc5v0_usb: vcc5v0-usb {
-		compatible = "regulator-fixed";
-		regulator-name = "vcc5v0_usb";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <5000000>;
-		regulator-max-microvolt = <5000000>;
-		vin-supply = <&vcc12v_dcin>;
-	};
-
-	vdd_log: vdd-log {
-		compatible = "pwm-regulator";
-		pwms = <&pwm2 0 25000 1>;
-		regulator-name = "vdd_log";
-		regulator-always-on;
-		regulator-boot-on;
-		regulator-min-microvolt = <800000>;
-		regulator-max-microvolt = <1700000>;
-		vin-supply = <&vcc5v0_sys>;
-	};
-};
-
-&cpu_l0 {
-	cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l1 {
-	cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l2 {
-	cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_l3 {
-	cpu-supply = <&vdd_cpu_l>;
-};
-
-&cpu_b0 {
-	cpu-supply = <&vdd_cpu_b>;
-};
-
-&cpu_b1 {
-	cpu-supply = <&vdd_cpu_b>;
-};
-
-&emmc_phy {
-	status = "okay";
-};
-
-&gmac {
-	assigned-clocks = <&cru SCLK_RMII_SRC>;
-	assigned-clock-parents = <&clkin_gmac>;
-	clock_in_out = "input";
-	phy-supply = <&vcc_lan>;
-	phy-mode = "rgmii";
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
-	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
-	snps,reset-active-low;
-	snps,reset-delays-us = <0 10000 50000>;
-	tx_delay = <0x28>;
-	rx_delay = <0x11>;
-	status = "okay";
-};
-
-&hdmi {
-	ddc-i2c-bus = <&i2c3>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&hdmi_cec>;
-	status = "okay";
-};
-
-&hdmi_sound {
-	status = "okay";
-};
-
-&gpu {
-	mali-supply = <&vdd_gpu>;
-	status = "okay";
-};
-
-&i2c0 {
-	clock-frequency = <400000>;
-	i2c-scl-rising-time-ns = <168>;
-	i2c-scl-falling-time-ns = <4>;
-	status = "okay";
-
-	rk808: pmic@1b {
-		compatible = "rockchip,rk808";
-		reg = <0x1b>;
-		interrupt-parent = <&gpio3>;
-		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
-		#clock-cells = <1>;
-		clock-output-names = "xin32k", "rk808-clkout2";
-		pinctrl-names = "default";
-		pinctrl-0 = <&pmic_int_l>;
-		rockchip,system-power-controller;
-		wakeup-source;
-
-		vcc1-supply = <&vcc5v0_sys>;
-		vcc2-supply = <&vcc5v0_sys>;
-		vcc3-supply = <&vcc5v0_sys>;
-		vcc4-supply = <&vcc5v0_sys>;
-		vcc6-supply = <&vcc5v0_sys>;
-		vcc7-supply = <&vcc5v0_sys>;
-		vcc8-supply = <&vcc3v3_sys>;
-		vcc9-supply = <&vcc5v0_sys>;
-		vcc10-supply = <&vcc5v0_sys>;
-		vcc11-supply = <&vcc5v0_sys>;
-		vcc12-supply = <&vcc3v3_sys>;
-		vddio-supply = <&vcca_1v8>;
-
-		regulators {
-			vdd_center: DCDC_REG1 {
-				regulator-name = "vdd_center";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vdd_cpu_l: DCDC_REG2 {
-				regulator-name = "vdd_cpu_l";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <750000>;
-				regulator-max-microvolt = <1350000>;
-				regulator-ramp-delay = <6001>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_ddr: DCDC_REG3 {
-				regulator-name = "vcc_ddr";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-				};
-			};
-
-			vcc_1v8: DCDC_REG4 {
-				regulator-name = "vcc_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcc1v8_dvp: LDO_REG1 {
-				regulator-name = "vcc1v8_dvp";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v0_touch: LDO_REG2 {
-				regulator-name = "vcc3v0_touch";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcca_1v8: LDO_REG3 {
-				regulator-name = "vcca_1v8";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1800000>;
-				};
-			};
-
-			vcc_sdio: LDO_REG4 {
-				regulator-name = "vcc_sdio";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcca3v0_codec: LDO_REG5 {
-				regulator-name = "vcca3v0_codec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_1v5: LDO_REG6 {
-				regulator-name = "vcc_1v5";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1500000>;
-				regulator-max-microvolt = <1500000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <1500000>;
-				};
-			};
-
-			vcca1v8_codec: LDO_REG7 {
-				regulator-name = "vcca1v8_codec";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <1800000>;
-				regulator-max-microvolt = <1800000>;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc_3v0: LDO_REG8 {
-				regulator-name = "vcc_3v0";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-min-microvolt = <3000000>;
-				regulator-max-microvolt = <3000000>;
-				regulator-state-mem {
-					regulator-on-in-suspend;
-					regulator-suspend-microvolt = <3000000>;
-				};
-			};
-
-			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
-				regulator-name = "vcc3v3_s3";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-
-			vcc3v3_s0: SWITCH_REG2 {
-				regulator-name = "vcc3v3_s0";
-				regulator-always-on;
-				regulator-boot-on;
-				regulator-state-mem {
-					regulator-off-in-suspend;
-				};
-			};
-		};
-	};
-
-	vdd_cpu_b: regulator@40 {
-		compatible = "silergy,syr827";
-		reg = <0x40>;
-		fcs,suspend-voltage-selector = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vsel1_gpio>;
-		regulator-name = "vdd_cpu_b";
-		regulator-min-microvolt = <712500>;
-		regulator-max-microvolt = <1500000>;
-		regulator-ramp-delay = <1000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
-
-	vdd_gpu: regulator@41 {
-		compatible = "silergy,syr828";
-		reg = <0x41>;
-		fcs,suspend-voltage-selector = <1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&vsel2_gpio>;
-		regulator-name = "vdd_gpu";
-		regulator-min-microvolt = <712500>;
-		regulator-max-microvolt = <1500000>;
-		regulator-ramp-delay = <1000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vcc5v0_sys>;
-
-		regulator-state-mem {
-			regulator-off-in-suspend;
-		};
-	};
+	model = "Pine64 RockPro64 v2.1";
+	compatible = "pine64,rockpro64-v2.1", "pine64,rockpro64", "rockchip,rk3399";
 };
 
 &i2c1 {
-	i2c-scl-rising-time-ns = <300>;
-	i2c-scl-falling-time-ns = <15>;
-	status = "okay";
-};
-
-&i2c3 {
-	i2c-scl-rising-time-ns = <450>;
-	i2c-scl-falling-time-ns = <15>;
-	status = "okay";
-};
-
-&i2c4 {
-	i2c-scl-rising-time-ns = <600>;
-	i2c-scl-falling-time-ns = <20>;
-	status = "okay";
-
-	fusb0: typec-portc@22 {
-		compatible = "fcs,fusb302";
-		reg = <0x22>;
-		interrupt-parent = <&gpio1>;
-		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&fusb0_int>;
-		vbus-supply = <&vcc5v0_typec>;
-		status = "okay";
-	};
-};
+	es8316: codec@11 {
+		compatible = "everest,es8316";
+		reg = <0x11>;
+		clocks = <&cru SCLK_I2S_8CH_OUT>;
+		clock-names = "mclk";
+		#sound-dai-cells = <0>;
 
-&i2s0 {
-	rockchip,playback-channels = <8>;
-	rockchip,capture-channels = <8>;
-	status = "okay";
-};
-
-&i2s1 {
-	rockchip,playback-channels = <2>;
-	rockchip,capture-channels = <2>;
-	status = "okay";
-};
-
-&i2s2 {
-	status = "okay";
-};
-
-&io_domains {
-	status = "okay";
-
-	bt656-supply = <&vcc1v8_dvp>;
-	audio-supply = <&vcc_3v0>;
-	sdmmc-supply = <&vcc_sdio>;
-	gpio1830-supply = <&vcc_3v0>;
-};
-
-&pcie0 {
-	ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
-	num-lanes = <4>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_perst>;
-	vpcie12v-supply = <&vcc12v_dcin>;
-	vpcie3v3-supply = <&vcc3v3_pcie>;
-	status = "okay";
-};
-
-&pcie_phy {
-	status = "okay";
-};
-
-&pmu_io_domains {
-	pmu1830-supply = <&vcc_3v0>;
-	status = "okay";
-};
-
-&pinctrl {
-	buttons {
-		pwrbtn: pwrbtn {
-			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	fusb302x {
-		fusb0_int: fusb0-int {
-			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	leds {
-		work_led_gpio: work_led-gpio {
-			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		diy_led_gpio: diy_led-gpio {
-			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pcie {
-		pcie_perst: pcie-perst {
-			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-
-		pcie_pwr_en: pcie-pwr-en {
-			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	pmic {
-		pmic_int_l: pmic-int-l {
-			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-
-		vsel1_gpio: vsel1-gpio {
-			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-
-		vsel2_gpio: vsel2-gpio {
-			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
-		};
-	};
-
-	sdio-pwrseq {
-		wifi_enable_h: wifi-enable-h {
-			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
-		};
-	};
-
-	usb-typec {
-		vcc5v0_typec_en: vcc5v0_typec_en {
-			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
-		};
-	};
-
-	usb2 {
-		vcc5v0_host_en: vcc5v0-host-en {
-			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		port {
+			es8316_p0_0: endpoint {
+				remote-endpoint = <&i2s1_p0_0>;
+			};
 		};
 	};
 };
-
-&pwm0 {
-	status = "okay";
-};
-
-&pwm1 {
-	status = "okay";
-};
-
-&pwm2 {
-	status = "okay";
-};
-
-&saradc {
-	vref-supply = <&vcca1v8_s3>;
-	status = "okay";
-};
-
-&sdmmc {
-	bus-width = <4>;
-	cap-sd-highspeed;
-	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
-	disable-wp;
-	max-frequency = <150000000>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
-	status = "okay";
-};
-
-&sdhci {
-	bus-width = <8>;
-	mmc-hs200-1_8v;
-	non-removable;
-	status = "okay";
-};
-
-&spi1 {
-	status = "okay";
-
-	flash@0 {
-		compatible = "jedec,spi-nor";
-		reg = <0>;
-		spi-max-frequency = <10000000>;
-	};
-};
-
-&tcphy0 {
-	status = "okay";
-};
-
-&tcphy1 {
-	status = "okay";
-};
-
-&tsadc {
-	/* tshut mode 0:CRU 1:GPIO */
-	rockchip,hw-tshut-mode = <1>;
-	/* tshut polarity 0:LOW 1:HIGH */
-	rockchip,hw-tshut-polarity = <1>;
-	status = "okay";
-};
-
-&u2phy0 {
-	status = "okay";
-
-	u2phy0_otg: otg-port {
-		status = "okay";
-	};
-
-	u2phy0_host: host-port {
-		phy-supply = <&vcc5v0_host>;
-		status = "okay";
-	};
-};
-
-&u2phy1 {
-	status = "okay";
-
-	u2phy1_otg: otg-port {
-		status = "okay";
-	};
-
-	u2phy1_host: host-port {
-		phy-supply = <&vcc5v0_host>;
-		status = "okay";
-	};
-};
-
-&uart0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart0_xfer &uart0_cts>;
-	status = "okay";
-};
-
-&uart2 {
-	status = "okay";
-};
-
-&usb_host0_ehci {
-	status = "okay";
-};
-
-&usb_host0_ohci {
-	status = "okay";
-};
-
-&usb_host1_ehci {
-	status = "okay";
-};
-
-&usb_host1_ohci {
-	status = "okay";
-};
-
-&usbdrd3_0 {
-	status = "okay";
-};
-
-&usbdrd_dwc3_0 {
-	status = "okay";
-	dr_mode = "otg";
-};
-
-&usbdrd3_1 {
-	status = "okay";
-};
-
-&usbdrd_dwc3_1 {
-	status = "okay";
-	dr_mode = "host";
-};
-
-&vopb {
-	status = "okay";
-};
-
-&vopb_mmu {
-	status = "okay";
-};
-
-&vopl {
-	status = "okay";
-};
-
-&vopl_mmu {
-	status = "okay";
-};
diff --git a/arch/arm/dts/rk3399-rockpro64.dtsi b/arch/arm/dts/rk3399-rockpro64.dtsi
new file mode 100644
index 0000000000..9bca258012
--- /dev/null
+++ b/arch/arm/dts/rk3399-rockpro64.dtsi
@@ -0,0 +1,797 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2018 Akash Gajjar <Akash_Gajjar@mentor.com>
+ */
+
+#include <dt-bindings/input/linux-event-codes.h>
+#include <dt-bindings/pwm/pwm.h>
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+	chosen {
+		stdout-path = "serial2:1500000n8";
+	};
+
+	clkin_gmac: external-gmac-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <125000000>;
+		clock-output-names = "clkin_gmac";
+		#clock-cells = <0>;
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+		autorepeat;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwrbtn>;
+
+		power {
+			debounce-interval = <100>;
+			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
+			label = "GPIO Key Power";
+			linux,code = <KEY_POWER>;
+			wakeup-source;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&work_led_gpio>, <&diy_led_gpio>;
+
+		work-led {
+			label = "work";
+			default-state = "on";
+			gpios = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
+		};
+
+		diy-led {
+			label = "diy";
+			default-state = "off";
+			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fan: pwm-fan {
+		compatible = "pwm-fan";
+		#cooling-cells = <2>;
+		fan-supply = <&vcc12v_dcin>;
+		pwms = <&pwm1 0 50000 0>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+		reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
+	};
+
+	sound {
+		compatible = "audio-graph-card";
+		label = "rockchip,rk3399";
+		dais = <&i2s1_p0>;
+	};
+
+	vcc12v_dcin: vcc12v-dcin {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc12v_dcin";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <12000000>;
+		regulator-max-microvolt = <12000000>;
+	};
+
+	/* switched by pmic_sleep */
+	vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc1v8_s3";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		vin-supply = <&vcc_1v8>;
+	};
+
+	vcc3v3_pcie: vcc3v3-pcie-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pcie_pwr_en>;
+		regulator-name = "vcc3v3_pcie";
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vcc3v3_sys: vcc3v3-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc3v3_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+
+	/* Actually 3 regulators (host0, 1, 2) controlled by the same gpio */
+	vcc5v0_host: vcc5v0-host-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_host_en>;
+		regulator-name = "vcc5v0_host";
+		regulator-always-on;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_typec: vcc5v0-typec-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vcc5v0_typec_en>;
+		regulator-name = "vcc5v0_typec";
+		regulator-always-on;
+		vin-supply = <&vcc5v0_usb>;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vcc5v0_usb: vcc5v0-usb {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_usb";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		vin-supply = <&vcc12v_dcin>;
+	};
+
+	vdd_log: vdd-log {
+		compatible = "pwm-regulator";
+		pwms = <&pwm2 0 25000 1>;
+		regulator-name = "vdd_log";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1700000>;
+		vin-supply = <&vcc5v0_sys>;
+	};
+};
+
+&cpu_l0 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l1 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l2 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_l3 {
+	cpu-supply = <&vdd_cpu_l>;
+};
+
+&cpu_b0 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&cpu_b1 {
+	cpu-supply = <&vdd_cpu_b>;
+};
+
+&emmc_phy {
+	status = "okay";
+};
+
+&gmac {
+	assigned-clocks = <&cru SCLK_RMII_SRC>;
+	assigned-clock-parents = <&clkin_gmac>;
+	clock_in_out = "input";
+	phy-supply = <&vcc_lan>;
+	phy-mode = "rgmii";
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	snps,reset-delays-us = <0 10000 50000>;
+	tx_delay = <0x28>;
+	rx_delay = <0x11>;
+	status = "okay";
+};
+
+&hdmi {
+	ddc-i2c-bus = <&i2c3>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&hdmi_cec>;
+	status = "okay";
+};
+
+&hdmi_sound {
+	status = "okay";
+};
+
+&gpu {
+	mali-supply = <&vdd_gpu>;
+	status = "okay";
+};
+
+&i2c0 {
+	clock-frequency = <400000>;
+	i2c-scl-rising-time-ns = <168>;
+	i2c-scl-falling-time-ns = <4>;
+	status = "okay";
+
+	rk808: pmic@1b {
+		compatible = "rockchip,rk808";
+		reg = <0x1b>;
+		interrupt-parent = <&gpio3>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		#clock-cells = <1>;
+		clock-output-names = "xin32k", "rk808-clkout2";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pmic_int_l>;
+		rockchip,system-power-controller;
+		wakeup-source;
+
+		vcc1-supply = <&vcc5v0_sys>;
+		vcc2-supply = <&vcc5v0_sys>;
+		vcc3-supply = <&vcc5v0_sys>;
+		vcc4-supply = <&vcc5v0_sys>;
+		vcc6-supply = <&vcc5v0_sys>;
+		vcc7-supply = <&vcc5v0_sys>;
+		vcc8-supply = <&vcc3v3_sys>;
+		vcc9-supply = <&vcc5v0_sys>;
+		vcc10-supply = <&vcc5v0_sys>;
+		vcc11-supply = <&vcc5v0_sys>;
+		vcc12-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcca_1v8>;
+
+		regulators {
+			vdd_center: DCDC_REG1 {
+				regulator-name = "vdd_center";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vdd_cpu_l: DCDC_REG2 {
+				regulator-name = "vdd_cpu_l";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <750000>;
+				regulator-max-microvolt = <1350000>;
+				regulator-ramp-delay = <6001>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_ddr: DCDC_REG3 {
+				regulator-name = "vcc_ddr";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+				};
+			};
+
+			vcc_1v8: DCDC_REG4 {
+				regulator-name = "vcc_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc1v8_dvp: LDO_REG1 {
+				regulator-name = "vcc1v8_dvp";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v0_touch: LDO_REG2 {
+				regulator-name = "vcc3v0_touch";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcca_1v8: LDO_REG3 {
+				regulator-name = "vcca_1v8";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1800000>;
+				};
+			};
+
+			vcc_sdio: LDO_REG4 {
+				regulator-name = "vcc_sdio";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcca3v0_codec: LDO_REG5 {
+				regulator-name = "vcca3v0_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_1v5: LDO_REG6 {
+				regulator-name = "vcc_1v5";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1500000>;
+				regulator-max-microvolt = <1500000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <1500000>;
+				};
+			};
+
+			vcca1v8_codec: LDO_REG7 {
+				regulator-name = "vcca1v8_codec";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <1800000>;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc_3v0: LDO_REG8 {
+				regulator-name = "vcc_3v0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-min-microvolt = <3000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-state-mem {
+					regulator-on-in-suspend;
+					regulator-suspend-microvolt = <3000000>;
+				};
+			};
+
+			vcc3v3_s3: vcc_lan: SWITCH_REG1 {
+				regulator-name = "vcc3v3_s3";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+
+			vcc3v3_s0: SWITCH_REG2 {
+				regulator-name = "vcc3v3_s0";
+				regulator-always-on;
+				regulator-boot-on;
+				regulator-state-mem {
+					regulator-off-in-suspend;
+				};
+			};
+		};
+	};
+
+	vdd_cpu_b: regulator@40 {
+		compatible = "silergy,syr827";
+		reg = <0x40>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel1_gpio>;
+		regulator-name = "vdd_cpu_b";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+
+	vdd_gpu: regulator@41 {
+		compatible = "silergy,syr828";
+		reg = <0x41>;
+		fcs,suspend-voltage-selector = <1>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&vsel2_gpio>;
+		regulator-name = "vdd_gpu";
+		regulator-min-microvolt = <712500>;
+		regulator-max-microvolt = <1500000>;
+		regulator-ramp-delay = <1000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vcc5v0_sys>;
+
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&i2c1 {
+	i2c-scl-rising-time-ns = <300>;
+	i2c-scl-falling-time-ns = <15>;
+	status = "okay";
+};
+
+&i2c3 {
+	i2c-scl-rising-time-ns = <450>;
+	i2c-scl-falling-time-ns = <15>;
+	status = "okay";
+};
+
+&i2c4 {
+	i2c-scl-rising-time-ns = <600>;
+	i2c-scl-falling-time-ns = <20>;
+	status = "okay";
+
+	fusb0: typec-portc@22 {
+		compatible = "fcs,fusb302";
+		reg = <0x22>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <RK_PA2 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&fusb0_int>;
+		vbus-supply = <&vcc5v0_typec>;
+		status = "okay";
+	};
+};
+
+&i2s0 {
+	rockchip,playback-channels = <8>;
+	rockchip,capture-channels = <8>;
+	status = "okay";
+};
+
+&i2s1 {
+	rockchip,playback-channels = <2>;
+	rockchip,capture-channels = <2>;
+	status = "okay";
+
+	i2s1_p0: port {
+		i2s1_p0_0: endpoint {
+			dai-format = "i2s";
+			mclk-fs = <256>;
+			remote-endpoint = <&es8316_p0_0>;
+		};
+	};
+};
+
+&i2s2 {
+	status = "okay";
+};
+
+&io_domains {
+	status = "okay";
+
+	bt656-supply = <&vcc1v8_dvp>;
+	audio-supply = <&vcc_3v0>;
+	sdmmc-supply = <&vcc_sdio>;
+	gpio1830-supply = <&vcc_3v0>;
+};
+
+&pcie0 {
+	ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_perst>;
+	vpcie12v-supply = <&vcc12v_dcin>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
+	status = "okay";
+};
+
+&pcie_phy {
+	status = "okay";
+};
+
+&pmu_io_domains {
+	pmu1830-supply = <&vcc_3v0>;
+	status = "okay";
+};
+
+&pinctrl {
+	bt {
+		bt_enable_h: bt-enable-h {
+			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_host_wake_l: bt-host-wake-l {
+			rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		bt_wake_l: bt-wake-l {
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	buttons {
+		pwrbtn: pwrbtn {
+			rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	fusb302x {
+		fusb0_int: fusb0-int {
+			rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	leds {
+		work_led_gpio: work_led-gpio {
+			rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		diy_led_gpio: diy_led-gpio {
+			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pcie {
+		pcie_perst: pcie-perst {
+			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		pcie_pwr_en: pcie-pwr-en {
+			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	pmic {
+		pmic_int_l: pmic-int-l {
+			rockchip,pins = <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+
+		vsel1_gpio: vsel1-gpio {
+			rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+
+		vsel2_gpio: vsel2-gpio {
+			rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
+		};
+	};
+
+	sdio-pwrseq {
+		wifi_enable_h: wifi-enable-h {
+			rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	usb-typec {
+		vcc5v0_typec_en: vcc5v0_typec_en {
+			rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
+		};
+	};
+
+	usb2 {
+		vcc5v0_host_en: vcc5v0-host-en {
+			rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&pwm0 {
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&saradc {
+	vref-supply = <&vcca1v8_s3>;
+	status = "okay";
+};
+
+&sdio0 {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	disable-wp;
+	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	non-removable;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+	sd-uhs-sdr104;
+	status = "okay";
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+	disable-wp;
+	max-frequency = <150000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+	status = "okay";
+};
+
+&sdhci {
+	bus-width = <8>;
+	mmc-hs200-1_8v;
+	non-removable;
+	status = "okay";
+};
+
+&spi1 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+	};
+};
+
+&tcphy0 {
+	status = "okay";
+};
+
+&tcphy1 {
+	status = "okay";
+};
+
+&tsadc {
+	/* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-mode = <1>;
+	/* tshut polarity 0:LOW 1:HIGH */
+	rockchip,hw-tshut-polarity = <1>;
+	status = "okay";
+};
+
+&u2phy0 {
+	status = "okay";
+
+	u2phy0_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy0_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&u2phy1 {
+	status = "okay";
+
+	u2phy1_otg: otg-port {
+		status = "okay";
+	};
+
+	u2phy1_host: host-port {
+		phy-supply = <&vcc5v0_host>;
+		status = "okay";
+	};
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
+	status = "okay";
+
+	bluetooth {
+		compatible = "brcm,bcm43438-bt";
+		clocks = <&rk808 1>;
+		clock-names = "lpo";
+		device-wakeup-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
+		host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
+		shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
+		vbat-supply = <&vcc3v3_sys>;
+		vddio-supply = <&vcc_1v8>;
+	};
+};
+
+&uart2 {
+	status = "okay";
+};
+
+&usb_host0_ehci {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_ehci {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
+
+&usbdrd3_0 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_0 {
+	status = "okay";
+	dr_mode = "otg";
+};
+
+&usbdrd3_1 {
+	status = "okay";
+};
+
+&usbdrd_dwc3_1 {
+	status = "okay";
+	dr_mode = "host";
+};
+
+&vopb {
+	status = "okay";
+};
+
+&vopb_mmu {
+	status = "okay";
+};
+
+&vopl {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 8b857ccfc7..8237782408 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -8,6 +8,7 @@
 	aliases {
 		mmc0 = &sdhci;
 		mmc1 = &sdmmc;
+		pci0 = &pcie0;
 	};
 
 	cic: syscon@ff620000 {
@@ -25,6 +26,12 @@
 		clock-names = "pclk_ddr_mon";
 	};
 
+	rng: rng@ff8b8000 {
+		compatible = "rockchip,cryptov1-rng";
+		reg = <0x0 0xff8b8000 0x0 0x1000>;
+		status = "disabled";
+	};
+
 	dmc: dmc {
 		u-boot,dm-pre-reloc;
 		compatible = "rockchip,rk3399-dmc";
@@ -79,11 +86,15 @@
 };
 
 &sdhci {
+	max-frequency = <200000000>;
 	u-boot,dm-pre-reloc;
 };
 
 &sdmmc {
 	u-boot,dm-pre-reloc;
+
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
 };
 
 &spi1 {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 6b7c136ab8..74f2c3d490 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -1,6 +1,6 @@
-// SPDX-License-Identifier: GPL-2.0+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 /*
- * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd
  */
 
 #include <dt-bindings/clock/rk3399-cru.h>
@@ -19,6 +19,7 @@
 	#size-cells = <2>;
 
 	aliases {
+		ethernet0 = &gmac;
 		i2c0 = &i2c0;
 		i2c1 = &i2c1;
 		i2c2 = &i2c2;
@@ -67,53 +68,102 @@
 
 		cpu_l0: cpu@0 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x0>;
 			enable-method = "psci";
-			#cooling-cells = <2>; /* min followed by max */
+			capacity-dmips-mhz = <485>;
 			clocks = <&cru ARMCLKL>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <100>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
 		cpu_l1: cpu@1 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x1>;
 			enable-method = "psci";
+			capacity-dmips-mhz = <485>;
 			clocks = <&cru ARMCLKL>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <100>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
 		cpu_l2: cpu@2 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x2>;
 			enable-method = "psci";
+			capacity-dmips-mhz = <485>;
 			clocks = <&cru ARMCLKL>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <100>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
 		cpu_l3: cpu@3 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a53", "arm,armv8";
+			compatible = "arm,cortex-a53";
 			reg = <0x0 0x3>;
 			enable-method = "psci";
+			capacity-dmips-mhz = <485>;
 			clocks = <&cru ARMCLKL>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <100>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
 		cpu_b0: cpu@100 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a72", "arm,armv8";
+			compatible = "arm,cortex-a72";
 			reg = <0x0 0x100>;
 			enable-method = "psci";
-			#cooling-cells = <2>; /* min followed by max */
+			capacity-dmips-mhz = <1024>;
 			clocks = <&cru ARMCLKB>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <436>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
 
 		cpu_b1: cpu@101 {
 			device_type = "cpu";
-			compatible = "arm,cortex-a72", "arm,armv8";
+			compatible = "arm,cortex-a72";
 			reg = <0x0 0x101>;
 			enable-method = "psci";
+			capacity-dmips-mhz = <1024>;
 			clocks = <&cru ARMCLKB>;
+			#cooling-cells = <2>; /* min followed by max */
+			dynamic-power-coefficient = <436>;
+			cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
 		};
+
+		idle-states {
+			entry-method = "psci";
+
+			CPU_SLEEP: cpu-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <120>;
+				exit-latency-us = <250>;
+				min-residency-us = <900>;
+			};
+
+			CLUSTER_SLEEP: cluster-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x1010000>;
+				entry-latency-us = <400>;
+				exit-latency-us = <500>;
+				min-residency-us = <2000>;
+			};
+		};
+	};
+
+	display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vopl_out>, <&vopb_out>;
 	};
 
 	pmu_a53 {
@@ -147,7 +197,7 @@
 		#clock-cells = <0>;
 	};
 
-	amba {
+	amba: bus {
 		compatible = "simple-bus";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -183,7 +233,7 @@
 		#size-cells = <2>;
 		#interrupt-cells = <1>;
 		aspm-no-l0s;
-		bus-range = <0x0 0x1>;
+		bus-range = <0x0 0x1f>;
 		clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>,
 			 <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
 		clock-names = "aclk", "aclk-perf",
@@ -200,10 +250,12 @@
 		linux,pci-domain = <0>;
 		max-link-speed = <1>;
 		msi-map = <0x0 &its 0x0 0x1000>;
-		phys = <&pcie_phy>;
-		phy-names = "pcie-phy";
-		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000
-			  0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>;
+		phys = <&pcie_phy 0>, <&pcie_phy 1>,
+		       <&pcie_phy 2>, <&pcie_phy 3>;
+		phy-names = "pcie-phy-0", "pcie-phy-1",
+			    "pcie-phy-2", "pcie-phy-3";
+		ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x1e00000
+			  0x81000000 0x0 0xfbe00000 0x0 0xfbe00000 0x0 0x100000>;
 		resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>,
 			 <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE>,
 			 <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>,
@@ -236,10 +288,11 @@
 		resets = <&cru SRST_A_GMAC>;
 		reset-names = "stmmaceth";
 		rockchip,grf = <&grf>;
+		snps,txpbl = <0x4>;
 		status = "disabled";
 	};
 
-	sdio0: dwmmc@fe310000 {
+	sdio0: mmc@fe310000 {
 		compatible = "rockchip,rk3399-dw-mshc",
 			     "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe310000 0x0 0x4000>;
@@ -255,12 +308,14 @@
 		status = "disabled";
 	};
 
-	sdmmc: dwmmc@fe320000 {
+	sdmmc: mmc@fe320000 {
 		compatible = "rockchip,rk3399-dw-mshc",
 			     "rockchip,rk3288-dw-mshc";
 		reg = <0x0 0xfe320000 0x0 0x4000>;
 		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
 		max-frequency = <150000000>;
+		assigned-clocks = <&cru HCLK_SD>;
+		assigned-clock-rates = <200000000>;
 		clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
 			 <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
 		clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
@@ -278,7 +333,6 @@
 		arasan,soc-ctl-syscon = <&grf>;
 		assigned-clocks = <&cru SCLK_EMMC>;
 		assigned-clock-rates = <200000000>;
-		max-frequency = <200000000>;
 		clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
 		clock-names = "clk_xin", "clk_ahb";
 		clock-output-names = "emmc_cardclock";
@@ -286,6 +340,7 @@
 		phys = <&emmc_phy>;
 		phy-names = "phy_arasan";
 		power-domains = <&power RK3399_PD_EMMC>;
+		disable-cqe-dcmd;
 		status = "disabled";
 	};
 
@@ -295,11 +350,8 @@
 		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
 			 <&u2phy0>;
-		clock-names = "usbhost", "arbiter",
-			      "utmi";
 		phys = <&u2phy0_host>;
 		phy-names = "usb";
-		power-domains = <&power RK3399_PD_PERIHP>;
 		status = "disabled";
 	};
 
@@ -309,11 +361,8 @@
 		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>,
 			 <&u2phy0>;
-		clock-names = "usbhost", "arbiter",
-			      "utmi";
 		phys = <&u2phy0_host>;
 		phy-names = "usb";
-		power-domains = <&power RK3399_PD_PERIHP>;
 		status = "disabled";
 	};
 
@@ -323,11 +372,8 @@
 		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
 			 <&u2phy1>;
-		clock-names = "usbhost", "arbiter",
-			      "utmi";
 		phys = <&u2phy1_host>;
 		phy-names = "usb";
-		power-domains = <&power RK3399_PD_PERIHP>;
 		status = "disabled";
 	};
 
@@ -337,15 +383,12 @@
 		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH 0>;
 		clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>,
 			 <&u2phy1>;
-		clock-names = "usbhost", "arbiter",
-			      "utmi";
 		phys = <&u2phy1_host>;
 		phy-names = "usb";
-		power-domains = <&power RK3399_PD_PERIHP>;
 		status = "disabled";
 	};
 
-	usbdrd3_0: dwc3_typec0: usb@fe800000 {
+	usbdrd3_0: usb@fe800000 {
 		compatible = "rockchip,rk3399-dwc3";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -364,6 +407,9 @@
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe800000 0x0 0x100000>;
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
+				 <&cru SCLK_USB3OTG0_SUSPEND>;
+			clock-names = "ref", "bus_early", "suspend";
 			dr_mode = "otg";
 			phys = <&u2phy0_otg>, <&tcphy0_usb3>;
 			phy-names = "usb2-phy", "usb3-phy";
@@ -378,7 +424,7 @@
 		};
 	};
 
-	dwc3_typec1: usbdrd3_1: usb@fe900000 {
+	usbdrd3_1: usb@fe900000 {
 		compatible = "rockchip,rk3399-dwc3";
 		#address-cells = <2>;
 		#size-cells = <2>;
@@ -397,6 +443,9 @@
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe900000 0x0 0x100000>;
 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
+			clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
+				 <&cru SCLK_USB3OTG1_SUSPEND>;
+			clock-names = "ref", "bus_early", "suspend";
 			dr_mode = "otg";
 			phys = <&u2phy1_otg>, <&tcphy1_usb3>;
 			phy-names = "usb2-phy", "usb3-phy";
@@ -464,6 +513,7 @@
 		its: interrupt-controller@fee20000 {
 			compatible = "arm,gic-v3-its";
 			msi-controller;
+			#msi-cells = <1>;
 			reg = <0x0 0xfee20000 0x0 0x20000>;
 		};
 
@@ -612,7 +662,6 @@
 		clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
 		clock-names = "baudclk", "apb_pclk";
 		interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH 0>;
-		clock-frequency = <24000000>;
 		reg-shift = <2>;
 		reg-io-width = <4>;
 		pinctrl-names = "default";
@@ -639,6 +688,8 @@
 		clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
 		clock-names = "spiclk", "apb_pclk";
 		interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH 0>;
+		dmas = <&dmac_peri 10>, <&dmac_peri 11>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi0_clk &spi0_tx &spi0_rx &spi0_cs0>;
 		#address-cells = <1>;
@@ -652,6 +703,8 @@
 		clocks = <&cru SCLK_SPI1>, <&cru PCLK_SPI1>;
 		clock-names = "spiclk", "apb_pclk";
 		interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH 0>;
+		dmas = <&dmac_peri 12>, <&dmac_peri 13>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi1_clk &spi1_tx &spi1_rx &spi1_cs0>;
 		#address-cells = <1>;
@@ -665,6 +718,8 @@
 		clocks = <&cru SCLK_SPI2>, <&cru PCLK_SPI2>;
 		clock-names = "spiclk", "apb_pclk";
 		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH 0>;
+		dmas = <&dmac_peri 14>, <&dmac_peri 15>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi2_clk &spi2_tx &spi2_rx &spi2_cs0>;
 		#address-cells = <1>;
@@ -678,6 +733,8 @@
 		clocks = <&cru SCLK_SPI4>, <&cru PCLK_SPI4>;
 		clock-names = "spiclk", "apb_pclk";
 		interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH 0>;
+		dmas = <&dmac_peri 18>, <&dmac_peri 19>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi4_clk &spi4_tx &spi4_rx &spi4_cs0>;
 		#address-cells = <1>;
@@ -691,8 +748,11 @@
 		clocks = <&cru SCLK_SPI5>, <&cru PCLK_SPI5>;
 		clock-names = "spiclk", "apb_pclk";
 		interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH 0>;
+		dmas = <&dmac_bus 8>, <&dmac_bus 9>;
+		dma-names = "tx", "rx";
 		pinctrl-names = "default";
 		pinctrl-0 = <&spi5_clk &spi5_tx &spi5_rx &spi5_cs0>;
+		power-domains = <&power RK3399_PD_SDIOAUDIO>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		status = "disabled";
@@ -727,13 +787,18 @@
 				map0 {
 					trip = <&cpu_alert0>;
 					cooling-device =
-						<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+						<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 				map1 {
 					trip = <&cpu_alert1>;
 					cooling-device =
 						<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-						<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+						<&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 			};
 		};
@@ -761,7 +826,7 @@
 				map0 {
 					trip = <&gpu_alert0>;
 					cooling-device =
-						<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+						<&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 				};
 			};
 		};
@@ -980,22 +1045,11 @@
 					 <&cru PCLK_GMAC>;
 				pm_qos = <&qos_gmac>;
 			};
-			pd_perihp@RK3399_PD_PERIHP {
-				reg = <RK3399_PD_PERIHP>;
-				#address-cells = <1>;
-				#size-cells = <0>;
-				clocks = <&cru ACLK_PERIHP>;
-				pm_qos = <&qos_perihp>,
-					 <&qos_pcie>,
-					 <&qos_usb_host0>,
-					 <&qos_usb_host1>;
-
-				pd_sd@RK3399_PD_SD {
-					reg = <RK3399_PD_SD>;
-					clocks = <&cru HCLK_SDMMC>,
-						 <&cru SCLK_SDMMC>;
-					pm_qos = <&qos_sd>;
-				};
+			pd_sd@RK3399_PD_SD {
+				reg = <RK3399_PD_SD>;
+				clocks = <&cru HCLK_SDMMC>,
+					 <&cru SCLK_SDMMC>;
+				pm_qos = <&qos_sd>;
 			};
 			pd_sdioaudio@RK3399_PD_SDIOAUDIO {
 				reg = <RK3399_PD_SDIOAUDIO>;
@@ -1070,6 +1124,8 @@
 	pmugrf: syscon@ff320000 {
 		compatible = "rockchip,rk3399-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xff320000 0x0 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
 
 		pmu_io_domains: io-domains {
 			compatible = "rockchip,rk3399-pmu-io-voltage-domain";
@@ -1192,6 +1248,62 @@
 		status = "disabled";
 	};
 
+	vpu: video-codec@ff650000 {
+		compatible = "rockchip,rk3399-vpu";
+		reg = <0x0 0xff650000 0x0 0x800>;
+		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>,
+			     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "vepu", "vdpu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "hclk";
+		iommus = <&vpu_mmu>;
+		power-domains = <&power RK3399_PD_VCODEC>;
+	};
+
+	vpu_mmu: iommu@ff650800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff650800 0x0 0x40>;
+		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "vpu_mmu";
+		clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		power-domains = <&power RK3399_PD_VCODEC>;
+	};
+
+	vdec_mmu: iommu@ff660480 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>;
+		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "vdec_mmu";
+		clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	iep_mmu: iommu@ff670800 {
+		compatible = "rockchip,iommu";
+		reg = <0x0 0xff670800 0x0 0x40>;
+		interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>;
+		interrupt-names = "iep_mmu";
+		clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
+		clock-names = "aclk", "iface";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	rga: rga@ff680000 {
+		compatible = "rockchip,rk3399-rga";
+		reg = <0x0 0xff680000 0x0 0x10000>;
+		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+		clock-names = "aclk", "hclk", "sclk";
+		resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
+		reset-names = "core", "axi", "ahb";
+		power-domains = <&power RK3399_PD_RGA>;
+	};
+
 	efuse0: efuse@ff690000 {
 		compatible = "rockchip,rk3399-efuse";
 		reg = <0x0 0xff690000 0x0 0x80>;
@@ -1342,8 +1454,9 @@
 			compatible = "rockchip,rk3399-pcie-phy";
 			clocks = <&cru SCLK_PCIEPHY_REF>;
 			clock-names = "refclk";
-			#phy-cells = <0>;
+			#phy-cells = <1>;
 			resets = <&cru SRST_PCIEPHY>;
+			drive-impedance-ohm = <50>;
 			reset-names = "phy";
 			status = "disabled";
 		};
@@ -1592,11 +1705,11 @@
 		reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
 		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "isp0_mmu";
-		clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>;
+		clocks = <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
+		power-domains = <&power RK3399_PD_ISP0>;
 		rockchip,disable-mmu-reset;
-		status = "disabled";
 	};
 
 	isp1_mmu: iommu@ff924000 {
@@ -1604,11 +1717,11 @@
 		reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>;
 		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "isp1_mmu";
-		clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>;
+		clocks = <&cru ACLK_ISP1_WRAPPER>, <&cru HCLK_ISP1_WRAPPER>;
 		clock-names = "aclk", "iface";
 		#iommu-cells = <0>;
+		power-domains = <&power RK3399_PD_ISP1>;
 		rockchip,disable-mmu-reset;
-		status = "disabled";
 	};
 
 	hdmi_sound: hdmi-sound {
@@ -1660,21 +1773,29 @@
 	};
 
 	mipi_dsi: mipi@ff960000 {
-		compatible = "rockchip,rk3399_mipi_dsi";
+		compatible = "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi";
 		reg = <0x0 0xff960000 0x0 0x8000>;
 		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH 0>;
-		clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
-		         <&cru SCLK_DPHY_TX0_CFG>;
-		clock-names = "ref", "pclk", "phy_cfg";
+		clocks = <&cru SCLK_DPHY_PLL>, <&cru PCLK_MIPI_DSI0>,
+			 <&cru SCLK_DPHY_TX0_CFG>, <&cru PCLK_VIO_GRF>;
+		clock-names = "ref", "pclk", "phy_cfg", "grf";
+		power-domains = <&power RK3399_PD_VIO>;
+		resets = <&cru SRST_P_MIPI_DSI0>;
+		reset-names = "apb";
 		rockchip,grf = <&grf>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		status = "disabled";
+
 		ports {
-			reg = <1>;
-			mipi_in: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			mipi_in: port@0 {
+				reg = <0>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+
 				mipi_in_vopb: endpoint@0 {
 					reg = <0>;
 					remote-endpoint = <&vopb_out_mipi>;
@@ -1698,6 +1819,8 @@
 		resets = <&cru SRST_P_MIPI_DSI1>;
 		reset-names = "apb";
 		rockchip,grf = <&grf>;
+		#address-cells = <1>;
+		#size-cells = <0>;
 		status = "disabled";
 
 		ports {
@@ -1765,6 +1888,7 @@
 			     <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH 0>;
 		interrupt-names = "gpu", "job", "mmu";
 		clocks = <&cru ACLK_GPU>;
+		#cooling-cells = <2>;
 		power-domains = <&power RK3399_PD_GPU>;
 		status = "disabled";
 	};
@@ -1929,14 +2053,14 @@
 
 		clock {
 			clk_32k: clk-32k {
-				rockchip,pins = <0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
 			};
 		};
 
 		edp {
 			edp_hpd: edp-hpd {
 				rockchip,pins =
-					<4 RK_PC7 RK_FUNC_2 &pcfg_pull_none>;
+					<4 RK_PC7 2 &pcfg_pull_none>;
 			};
 		};
 
@@ -1944,382 +2068,409 @@
 			rgmii_pins: rgmii-pins {
 				rockchip,pins =
 					/* mac_txclk */
-					<3 RK_PC1 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PC1 1 &pcfg_pull_none_13ma>,
 					/* mac_rxclk */
-					<3 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB6 1 &pcfg_pull_none>,
 					/* mac_mdio */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB5 1 &pcfg_pull_none>,
 					/* mac_txen */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PB4 1 &pcfg_pull_none_13ma>,
 					/* mac_clk */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB3 1 &pcfg_pull_none>,
 					/* mac_rxdv */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB1 1 &pcfg_pull_none>,
 					/* mac_mdc */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB0 1 &pcfg_pull_none>,
 					/* mac_rxd1 */
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA7 1 &pcfg_pull_none>,
 					/* mac_rxd0 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA6 1 &pcfg_pull_none>,
 					/* mac_txd1 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PA5 1 &pcfg_pull_none_13ma>,
 					/* mac_txd0 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PA4 1 &pcfg_pull_none_13ma>,
 					/* mac_rxd3 */
-					<3 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA3 1 &pcfg_pull_none>,
 					/* mac_rxd2 */
-					<3 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA2 1 &pcfg_pull_none>,
 					/* mac_txd3 */
-					<3 RK_PA1 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PA1 1 &pcfg_pull_none_13ma>,
 					/* mac_txd2 */
-					<3 RK_PA0 RK_FUNC_1 &pcfg_pull_none_13ma>;
+					<3 RK_PA0 1 &pcfg_pull_none_13ma>;
 			};
 
 			rmii_pins: rmii-pins {
 				rockchip,pins =
 					/* mac_mdio */
-					<3 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB5 1 &pcfg_pull_none>,
 					/* mac_txen */
-					<3 RK_PB4 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PB4 1 &pcfg_pull_none_13ma>,
 					/* mac_clk */
-					<3 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB3 1 &pcfg_pull_none>,
 					/* mac_rxer */
-					<3 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB2 1 &pcfg_pull_none>,
 					/* mac_rxdv */
-					<3 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB1 1 &pcfg_pull_none>,
 					/* mac_mdc */
-					<3 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PB0 1 &pcfg_pull_none>,
 					/* mac_rxd1 */
-					<3 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA7 1 &pcfg_pull_none>,
 					/* mac_rxd0 */
-					<3 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
+					<3 RK_PA6 1 &pcfg_pull_none>,
 					/* mac_txd1 */
-					<3 RK_PA5 RK_FUNC_1 &pcfg_pull_none_13ma>,
+					<3 RK_PA5 1 &pcfg_pull_none_13ma>,
 					/* mac_txd0 */
-					<3 RK_PA4 RK_FUNC_1 &pcfg_pull_none_13ma>;
+					<3 RK_PA4 1 &pcfg_pull_none_13ma>;
 			};
 		};
 
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
 				rockchip,pins =
-					<1 RK_PB7 RK_FUNC_2 &pcfg_pull_none>,
-					<1 RK_PC0 RK_FUNC_2 &pcfg_pull_none>;
+					<1 RK_PB7 2 &pcfg_pull_none>,
+					<1 RK_PC0 2 &pcfg_pull_none>;
 			};
 		};
 
 		i2c1 {
 			i2c1_xfer: i2c1-xfer {
 				rockchip,pins =
-					<4 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PA2 1 &pcfg_pull_none>,
+					<4 RK_PA1 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2c2 {
 			i2c2_xfer: i2c2-xfer {
 				rockchip,pins =
-					<2 RK_PA1 RK_FUNC_2 &pcfg_pull_none_12ma>,
-					<2 RK_PA0 RK_FUNC_2 &pcfg_pull_none_12ma>;
+					<2 RK_PA1 2 &pcfg_pull_none_12ma>,
+					<2 RK_PA0 2 &pcfg_pull_none_12ma>;
 			};
 		};
 
 		i2c3 {
 			i2c3_xfer: i2c3-xfer {
 				rockchip,pins =
-					<4 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PC0 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC1 1 &pcfg_pull_none>,
+					<4 RK_PC0 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2c4 {
 			i2c4_xfer: i2c4-xfer {
 				rockchip,pins =
-					<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
-					<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>;
+					<1 RK_PB4 1 &pcfg_pull_none>,
+					<1 RK_PB3 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2c5 {
 			i2c5_xfer: i2c5-xfer {
 				rockchip,pins =
-					<3 RK_PB3 RK_FUNC_2 &pcfg_pull_none>,
-					<3 RK_PB2 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PB3 2 &pcfg_pull_none>,
+					<3 RK_PB2 2 &pcfg_pull_none>;
 			};
 		};
 
 		i2c6 {
 			i2c6_xfer: i2c6-xfer {
 				rockchip,pins =
-					<2 RK_PB2 RK_FUNC_2 &pcfg_pull_none>,
-					<2 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+					<2 RK_PB2 2 &pcfg_pull_none>,
+					<2 RK_PB1 2 &pcfg_pull_none>;
 			};
 		};
 
 		i2c7 {
 			i2c7_xfer: i2c7-xfer {
 				rockchip,pins =
-					<2 RK_PB0 RK_FUNC_2 &pcfg_pull_none>,
-					<2 RK_PA7 RK_FUNC_2 &pcfg_pull_none>;
+					<2 RK_PB0 2 &pcfg_pull_none>,
+					<2 RK_PA7 2 &pcfg_pull_none>;
 			};
 		};
 
 		i2c8 {
 			i2c8_xfer: i2c8-xfer {
 				rockchip,pins =
-					<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>,
-					<1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+					<1 RK_PC5 1 &pcfg_pull_none>,
+					<1 RK_PC4 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2s0 {
+			i2s0_2ch_bus: i2s0-2ch-bus {
+				rockchip,pins =
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					<3 RK_PD1 1 &pcfg_pull_none>,
+					<3 RK_PD2 1 &pcfg_pull_none>,
+					<3 RK_PD3 1 &pcfg_pull_none>,
+					<3 RK_PD7 1 &pcfg_pull_none>,
+					<4 RK_PA0 1 &pcfg_pull_none>;
+			};
+
 			i2s0_8ch_bus: i2s0-8ch-bus {
 				rockchip,pins =
-					<3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD1 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD4 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD5 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD6 RK_FUNC_1 &pcfg_pull_none>,
-					<3 RK_PD7 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA0 RK_FUNC_1 &pcfg_pull_none>;
+					<3 RK_PD0 1 &pcfg_pull_none>,
+					<3 RK_PD1 1 &pcfg_pull_none>,
+					<3 RK_PD2 1 &pcfg_pull_none>,
+					<3 RK_PD3 1 &pcfg_pull_none>,
+					<3 RK_PD4 1 &pcfg_pull_none>,
+					<3 RK_PD5 1 &pcfg_pull_none>,
+					<3 RK_PD6 1 &pcfg_pull_none>,
+					<3 RK_PD7 1 &pcfg_pull_none>,
+					<4 RK_PA0 1 &pcfg_pull_none>;
 			};
 		};
 
 		i2s1 {
 			i2s1_2ch_bus: i2s1-2ch-bus {
 				rockchip,pins =
-					<4 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
-					<4 RK_PA7 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PA3 1 &pcfg_pull_none>,
+					<4 RK_PA4 1 &pcfg_pull_none>,
+					<4 RK_PA5 1 &pcfg_pull_none>,
+					<4 RK_PA6 1 &pcfg_pull_none>,
+					<4 RK_PA7 1 &pcfg_pull_none>;
 			};
 		};
 
 		sdio0 {
 			sdio0_bus1: sdio0-bus1 {
 				rockchip,pins =
-					<2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PC4 1 &pcfg_pull_up>;
 			};
 
 			sdio0_bus4: sdio0-bus4 {
 				rockchip,pins =
-					<2 RK_PC4 RK_FUNC_1 &pcfg_pull_up>,
-					<2 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
-					<2 RK_PC6 RK_FUNC_1 &pcfg_pull_up>,
-					<2 RK_PC7 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PC4 1 &pcfg_pull_up>,
+					<2 RK_PC5 1 &pcfg_pull_up>,
+					<2 RK_PC6 1 &pcfg_pull_up>,
+					<2 RK_PC7 1 &pcfg_pull_up>;
 			};
 
 			sdio0_cmd: sdio0-cmd {
 				rockchip,pins =
-					<2 RK_PD0 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PD0 1 &pcfg_pull_up>;
 			};
 
 			sdio0_clk: sdio0-clk {
 				rockchip,pins =
-					<2 RK_PD1 RK_FUNC_1 &pcfg_pull_none>;
+					<2 RK_PD1 1 &pcfg_pull_none>;
 			};
 
 			sdio0_cd: sdio0-cd {
 				rockchip,pins =
-					<2 RK_PD2 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PD2 1 &pcfg_pull_up>;
 			};
 
 			sdio0_pwr: sdio0-pwr {
 				rockchip,pins =
-					<2 RK_PD3 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PD3 1 &pcfg_pull_up>;
 			};
 
 			sdio0_bkpwr: sdio0-bkpwr {
 				rockchip,pins =
-					<2 RK_PD4 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PD4 1 &pcfg_pull_up>;
 			};
 
 			sdio0_wp: sdio0-wp {
 				rockchip,pins =
-					<0 RK_PA3 RK_FUNC_1 &pcfg_pull_up>;
+					<0 RK_PA3 1 &pcfg_pull_up>;
 			};
 
 			sdio0_int: sdio0-int {
 				rockchip,pins =
-					<0 RK_PA4 RK_FUNC_1 &pcfg_pull_up>;
+					<0 RK_PA4 1 &pcfg_pull_up>;
 			};
 		};
 
 		sdmmc {
 			sdmmc_bus1: sdmmc-bus1 {
 				rockchip,pins =
-					<4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+					<4 RK_PB0 1 &pcfg_pull_up>;
 			};
 
 			sdmmc_bus4: sdmmc-bus4 {
 				rockchip,pins =
-					<4 RK_PB0 RK_FUNC_1 &pcfg_pull_up>,
-					<4 RK_PB1 RK_FUNC_1 &pcfg_pull_up>,
-					<4 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
-					<4 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
+					<4 RK_PB0 1 &pcfg_pull_up>,
+					<4 RK_PB1 1 &pcfg_pull_up>,
+					<4 RK_PB2 1 &pcfg_pull_up>,
+					<4 RK_PB3 1 &pcfg_pull_up>;
 			};
 
 			sdmmc_clk: sdmmc-clk {
 				rockchip,pins =
-					<4 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PB4 1 &pcfg_pull_none>;
 			};
 
 			sdmmc_cmd: sdmmc-cmd {
 				rockchip,pins =
-					<4 RK_PB5 RK_FUNC_1 &pcfg_pull_up>;
+					<4 RK_PB5 1 &pcfg_pull_up>;
 			};
 
 			sdmmc_cd: sdmmc-cd {
 				rockchip,pins =
-					<0 RK_PA7 RK_FUNC_1 &pcfg_pull_up>;
+					<0 RK_PA7 1 &pcfg_pull_up>;
 			};
 
 			sdmmc_wp: sdmmc-wp {
 				rockchip,pins =
-					<0 RK_PB0 RK_FUNC_1 &pcfg_pull_up>;
+					<0 RK_PB0 1 &pcfg_pull_up>;
 			};
 		};
 
 		sleep {
 			ap_pwroff: ap-pwroff {
-				rockchip,pins = <1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>;
 			};
 
 			ddrio_pwroff: ddrio-pwroff {
-				rockchip,pins = <0 RK_PA1 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
 			};
 		};
 
 		spdif {
 			spdif_bus: spdif-bus {
 				rockchip,pins =
-					<4 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC5 1 &pcfg_pull_none>;
 			};
 
 			spdif_bus_1: spdif-bus-1 {
 				rockchip,pins =
-					<3 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+					<3 RK_PC0 3 &pcfg_pull_none>;
 			};
 		};
 
 		spi0 {
 			spi0_clk: spi0-clk {
 				rockchip,pins =
-					<3 RK_PA6 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA6 2 &pcfg_pull_up>;
 			};
 			spi0_cs0: spi0-cs0 {
 				rockchip,pins =
-					<3 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA7 2 &pcfg_pull_up>;
 			};
 			spi0_cs1: spi0-cs1 {
 				rockchip,pins =
-					<3 RK_PB0 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PB0 2 &pcfg_pull_up>;
 			};
 			spi0_tx: spi0-tx {
 				rockchip,pins =
-					<3 RK_PA5 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA5 2 &pcfg_pull_up>;
 			};
 			spi0_rx: spi0-rx {
 				rockchip,pins =
-					<3 RK_PA4 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA4 2 &pcfg_pull_up>;
 			};
 		};
 
 		spi1 {
 			spi1_clk: spi1-clk {
 				rockchip,pins =
-					<1 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
+					<1 RK_PB1 2 &pcfg_pull_up>;
 			};
 			spi1_cs0: spi1-cs0 {
 				rockchip,pins =
-					<1 RK_PB2 RK_FUNC_2 &pcfg_pull_up>;
+					<1 RK_PB2 2 &pcfg_pull_up>;
 			};
 			spi1_rx: spi1-rx {
 				rockchip,pins =
-					<1 RK_PA7 RK_FUNC_2 &pcfg_pull_up>;
+					<1 RK_PA7 2 &pcfg_pull_up>;
 			};
 			spi1_tx: spi1-tx {
 				rockchip,pins =
-					<1 RK_PB0 RK_FUNC_2 &pcfg_pull_up>;
+					<1 RK_PB0 2 &pcfg_pull_up>;
 			};
 		};
 
 		spi2 {
 			spi2_clk: spi2-clk {
 				rockchip,pins =
-					<2 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PB3 1 &pcfg_pull_up>;
 			};
 			spi2_cs0: spi2-cs0 {
 				rockchip,pins =
-					<2 RK_PB4 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PB4 1 &pcfg_pull_up>;
 			};
 			spi2_rx: spi2-rx {
 				rockchip,pins =
-					<2 RK_PB1 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PB1 1 &pcfg_pull_up>;
 			};
 			spi2_tx: spi2-tx {
 				rockchip,pins =
-					<2 RK_PB2 RK_FUNC_1 &pcfg_pull_up>;
+					<2 RK_PB2 1 &pcfg_pull_up>;
 			};
 		};
 
 		spi3 {
 			spi3_clk: spi3-clk {
 				rockchip,pins =
-					<1 RK_PC1 RK_FUNC_1 &pcfg_pull_up>;
+					<1 RK_PC1 1 &pcfg_pull_up>;
 			};
 			spi3_cs0: spi3-cs0 {
 				rockchip,pins =
-					<1 RK_PC2 RK_FUNC_1 &pcfg_pull_up>;
+					<1 RK_PC2 1 &pcfg_pull_up>;
 			};
 			spi3_rx: spi3-rx {
 				rockchip,pins =
-					<1 RK_PB7 RK_FUNC_1 &pcfg_pull_up>;
+					<1 RK_PB7 1 &pcfg_pull_up>;
 			};
 			spi3_tx: spi3-tx {
 				rockchip,pins =
-					<1 RK_PC0 RK_FUNC_1 &pcfg_pull_up>;
+					<1 RK_PC0 1 &pcfg_pull_up>;
 			};
 		};
 
 		spi4 {
 			spi4_clk: spi4-clk {
 				rockchip,pins =
-					<3 RK_PA2 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA2 2 &pcfg_pull_up>;
 			};
 			spi4_cs0: spi4-cs0 {
 				rockchip,pins =
-					<3 RK_PA3 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA3 2 &pcfg_pull_up>;
 			};
 			spi4_rx: spi4-rx {
 				rockchip,pins =
-					<3 RK_PA0 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA0 2 &pcfg_pull_up>;
 			};
 			spi4_tx: spi4-tx {
 				rockchip,pins =
-					<3 RK_PA1 RK_FUNC_2 &pcfg_pull_up>;
+					<3 RK_PA1 2 &pcfg_pull_up>;
 			};
 		};
 
 		spi5 {
 			spi5_clk: spi5-clk {
 				rockchip,pins =
-					<2 RK_PC6 RK_FUNC_2 &pcfg_pull_up>;
+					<2 RK_PC6 2 &pcfg_pull_up>;
 			};
 			spi5_cs0: spi5-cs0 {
 				rockchip,pins =
-					<2 RK_PC7 RK_FUNC_2 &pcfg_pull_up>;
+					<2 RK_PC7 2 &pcfg_pull_up>;
 			};
 			spi5_rx: spi5-rx {
 				rockchip,pins =
-					<2 RK_PC4 RK_FUNC_2 &pcfg_pull_up>;
+					<2 RK_PC4 2 &pcfg_pull_up>;
 			};
 			spi5_tx: spi5-tx {
 				rockchip,pins =
-					<2 RK_PC5 RK_FUNC_2 &pcfg_pull_up>;
+					<2 RK_PC5 2 &pcfg_pull_up>;
+			};
+		};
+
+		testclk {
+			test_clkout0: test-clkout0 {
+				rockchip,pins =
+					<0 RK_PA0 1 &pcfg_pull_none>;
+			};
+
+			test_clkout1: test-clkout1 {
+				rockchip,pins =
+					<2 RK_PD1 2 &pcfg_pull_none>;
+			};
+
+			test_clkout2: test-clkout2 {
+				rockchip,pins =
+					<0 RK_PB0 3 &pcfg_pull_none>;
 			};
 		};
 
@@ -2329,168 +2480,168 @@
 			};
 
 			otp_out: otp-out {
-				rockchip,pins = <1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>;
 			};
 		};
 
 		uart0 {
 			uart0_xfer: uart0-xfer {
 				rockchip,pins =
-					<2 RK_PC0 RK_FUNC_1 &pcfg_pull_up>,
-					<2 RK_PC1 RK_FUNC_1 &pcfg_pull_none>;
+					<2 RK_PC0 1 &pcfg_pull_up>,
+					<2 RK_PC1 1 &pcfg_pull_none>;
 			};
 
 			uart0_cts: uart0-cts {
 				rockchip,pins =
-					<2 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+					<2 RK_PC2 1 &pcfg_pull_none>;
 			};
 
 			uart0_rts: uart0-rts {
 				rockchip,pins =
-					<2 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+					<2 RK_PC3 1 &pcfg_pull_none>;
 			};
 		};
 
 		uart1 {
 			uart1_xfer: uart1-xfer {
 				rockchip,pins =
-					<3 RK_PB4 RK_FUNC_2 &pcfg_pull_up>,
-					<3 RK_PB5 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PB4 2 &pcfg_pull_up>,
+					<3 RK_PB5 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart2a {
 			uart2a_xfer: uart2a-xfer {
 				rockchip,pins =
-					<4 RK_PB0 RK_FUNC_2 &pcfg_pull_up>,
-					<4 RK_PB1 RK_FUNC_2 &pcfg_pull_none>;
+					<4 RK_PB0 2 &pcfg_pull_up>,
+					<4 RK_PB1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart2b {
 			uart2b_xfer: uart2b-xfer {
 				rockchip,pins =
-					<4 RK_PC0 RK_FUNC_2 &pcfg_pull_up>,
-					<4 RK_PC1 RK_FUNC_2 &pcfg_pull_none>;
+					<4 RK_PC0 2 &pcfg_pull_up>,
+					<4 RK_PC1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart2c {
 			uart2c_xfer: uart2c-xfer {
 				rockchip,pins =
-					<4 RK_PC3 RK_FUNC_1 &pcfg_pull_up>,
-					<4 RK_PC4 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC3 1 &pcfg_pull_up>,
+					<4 RK_PC4 1 &pcfg_pull_none>;
 			};
 		};
 
 		uart3 {
 			uart3_xfer: uart3-xfer {
 				rockchip,pins =
-					<3 RK_PB6 RK_FUNC_2 &pcfg_pull_up>,
-					<3 RK_PB7 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PB6 2 &pcfg_pull_up>,
+					<3 RK_PB7 2 &pcfg_pull_none>;
 			};
 
 			uart3_cts: uart3-cts {
 				rockchip,pins =
-					<3 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PC0 2 &pcfg_pull_none>;
 			};
 
 			uart3_rts: uart3-rts {
 				rockchip,pins =
-					<3 RK_PC3 RK_FUNC_2 &pcfg_pull_none>;
+					<3 RK_PC1 2 &pcfg_pull_none>;
 			};
 		};
 
 		uart4 {
 			uart4_xfer: uart4-xfer {
 				rockchip,pins =
-					<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up>,
-					<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>;
+					<1 RK_PA7 1 &pcfg_pull_up>,
+					<1 RK_PB0 1 &pcfg_pull_none>;
 			};
 		};
 
 		uarthdcp {
 			uarthdcp_xfer: uarthdcp-xfer {
 				rockchip,pins =
-					<4 RK_PC5 RK_FUNC_2 &pcfg_pull_up>,
-					<4 RK_PC6 RK_FUNC_2 &pcfg_pull_none>;
+					<4 RK_PC5 2 &pcfg_pull_up>,
+					<4 RK_PC6 2 &pcfg_pull_none>;
 			};
 		};
 
 		pwm0 {
 			pwm0_pin: pwm0-pin {
 				rockchip,pins =
-					<4 RK_PC2 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC2 1 &pcfg_pull_none>;
+			};
+
+			pwm0_pin_pull_down: pwm0-pin-pull-down {
+				rockchip,pins =
+					<4 RK_PC2 1 &pcfg_pull_down>;
 			};
 
 			vop0_pwm_pin: vop0-pwm-pin {
 				rockchip,pins =
-					<4 RK_PC2 RK_FUNC_2 &pcfg_pull_none>;
+					<4 RK_PC2 2 &pcfg_pull_none>;
+			};
+
+			vop1_pwm_pin: vop1-pwm-pin {
+				rockchip,pins =
+					<4 RK_PC2 3 &pcfg_pull_none>;
 			};
 		};
 
 		pwm1 {
 			pwm1_pin: pwm1-pin {
 				rockchip,pins =
-					<4 RK_PC6 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC6 1 &pcfg_pull_none>;
 			};
 
-			vop1_pwm_pin: vop1-pwm-pin {
+			pwm1_pin_pull_down: pwm1-pin-pull-down {
 				rockchip,pins =
-					<4 RK_PC2 RK_FUNC_3 &pcfg_pull_none>;
+					<4 RK_PC6 1 &pcfg_pull_down>;
 			};
 		};
 
 		pwm2 {
 			pwm2_pin: pwm2-pin {
 				rockchip,pins =
-					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>;
+					<1 RK_PC3 1 &pcfg_pull_none>;
 			};
 
 			pwm2_pin_pull_down: pwm2-pin-pull-down {
 				rockchip,pins =
-					<1 RK_PC3 RK_FUNC_1 &pcfg_pull_down>;
+					<1 RK_PC3 1 &pcfg_pull_down>;
 			};
 		};
 
 		pwm3a {
 			pwm3a_pin: pwm3a-pin {
 				rockchip,pins =
-					<0 RK_PA6 RK_FUNC_1 &pcfg_pull_none>;
+					<0 RK_PA6 1 &pcfg_pull_none>;
 			};
 		};
 
 		pwm3b {
 			pwm3b_pin: pwm3b-pin {
 				rockchip,pins =
-					<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>;
+					<1 RK_PB6 1 &pcfg_pull_none>;
 			};
 		};
 
 		hdmi {
 			hdmi_i2c_xfer: hdmi-i2c-xfer {
 				rockchip,pins =
-					<4 RK_PC1 RK_FUNC_3 &pcfg_pull_none>,
-					<4 RK_PC0 RK_FUNC_3 &pcfg_pull_none>;
+					<4 RK_PC1 3 &pcfg_pull_none>,
+					<4 RK_PC0 3 &pcfg_pull_none>;
 			};
 
 			hdmi_cec: hdmi-cec {
 				rockchip,pins =
-					<4 RK_PC7 RK_FUNC_1 &pcfg_pull_none>;
+					<4 RK_PC7 1 &pcfg_pull_none>;
 			};
 		};
 
 		pcie {
-			pcie_clkreqn: pci-clkreqn {
-				rockchip,pins =
-					<2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
-			};
-
-			pcie_clkreqnb: pci-clkreqnb {
-				rockchip,pins =
-					<4 RK_PD0 RK_FUNC_1 &pcfg_pull_none>;
-			};
-
 			pcie_clkreqn_cpm: pci-clkreqn-cpm {
 				rockchip,pins =
 					<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
diff --git a/arch/arm/dts/salvator-common.dtsi b/arch/arm/dts/salvator-common.dtsi
index 2dba1328ac..98bbcafc8c 100644
--- a/arch/arm/dts/salvator-common.dtsi
+++ b/arch/arm/dts/salvator-common.dtsi
@@ -39,7 +39,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -87,6 +87,28 @@
 		};
 	};
 
+	hdmi0-out {
+		compatible = "hdmi-connector";
+		label = "HDMI0 OUT";
+		type = "a";
+
+		port {
+			hdmi0_con: endpoint {
+			};
+		};
+	};
+
+	hdmi1-out {
+		compatible = "hdmi-connector";
+		label = "HDMI1 OUT";
+		type = "a";
+
+		port {
+			hdmi1_con: endpoint {
+			};
+		};
+	};
+
 	keys {
 		compatible = "gpio-keys";
 
@@ -210,8 +232,7 @@
 
 		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vcc_sdhi3: regulator-vcc-sdhi3 {
@@ -234,30 +255,7 @@
 
 		gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
-	};
-
-	hdmi0-out {
-		compatible = "hdmi-connector";
-		label = "HDMI0 OUT";
-		type = "a";
-
-		port {
-			hdmi0_con: endpoint {
-			};
-		};
-	};
-
-	hdmi1-out {
-		compatible = "hdmi-connector";
-		label = "HDMI1 OUT";
-		type = "a";
-
-		port {
-			hdmi1_con: endpoint {
-			};
-		};
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	vga {
@@ -462,20 +460,6 @@
 		#gpio-cells = <2>;
 	};
 
-	csa_vdd: adc@7c {
-		compatible = "maxim,max9611";
-		reg = <0x7c>;
-
-		shunt-resistor-micro-ohms = <5000>;
-	};
-
-	csa_dvfs: adc@7f {
-		compatible = "maxim,max9611";
-		reg = <0x7f>;
-
-		shunt-resistor-micro-ohms = <5000>;
-	};
-
 	video-receiver@70 {
 		compatible = "adi,adv7482";
 		reg = <0x70 0x71 0x72 0x73 0x74 0x75
@@ -527,6 +511,20 @@
 			};
 		};
 	};
+
+	csa_vdd: adc@7c {
+		compatible = "maxim,max9611";
+		reg = <0x7c>;
+
+		shunt-resistor-micro-ohms = <5000>;
+	};
+
+	csa_dvfs: adc@7f {
+		compatible = "maxim,max9611";
+		reg = <0x7f>;
+
+		shunt-resistor-micro-ohms = <5000>;
+	};
 };
 
 &i2c_dvfs {
diff --git a/arch/arm/dts/salvator-xs.dtsi b/arch/arm/dts/salvator-xs.dtsi
new file mode 100644
index 0000000000..717d42758c
--- /dev/null
+++ b/arch/arm/dts/salvator-xs.dtsi
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the Salvator-X 2nd version board
+ *
+ * Copyright (C) 2015-2017 Renesas Electronics Corp.
+ */
+
+#include "salvator-common.dtsi"
+
+/ {
+	model = "Renesas Salvator-X 2nd version board";
+	compatible = "renesas,salvator-xs";
+};
+
+&extal_clk {
+	clock-frequency = <16640000>;
+};
+
+&i2c4 {
+	clock-frequency = <400000>;
+
+	versaclock6: clock-generator@6a {
+		compatible = "idt,5p49v6901";
+		reg = <0x6a>;
+		#clock-cells = <1>;
+		clocks = <&x23_clk>;
+		clock-names = "xin";
+	};
+};
diff --git a/arch/arm/dts/stm32mp15-ddr.dtsi b/arch/arm/dts/stm32mp15-ddr.dtsi
index 8b20b5e173..2a139c54e9 100644
--- a/arch/arm/dts/stm32mp15-ddr.dtsi
+++ b/arch/arm/dts/stm32mp15-ddr.dtsi
@@ -2,156 +2,240 @@
 /*
  * Copyright : STMicroelectronics 2018
  */
+#include <linux/stringify.h>
 
-/ {
-	soc {
-		ddr: ddr@5a003000 {
-			u-boot,dm-pre-reloc;
+&ddr {
+	config-DDR_MEM_COMPATIBLE {
+		u-boot,dm-pre-reloc;
 
-			compatible = "st,stm32mp1-ddr";
+		compatible = __stringify(st,DDR_MEM_COMPATIBLE);
 
-			reg = <0x5A003000 0x550
-			       0x5A004000 0x234>;
+		st,mem-name = DDR_MEM_NAME;
+		st,mem-speed = <DDR_MEM_SPEED>;
+		st,mem-size = <DDR_MEM_SIZE>;
 
-			clocks = <&rcc AXIDCG>,
-				 <&rcc DDRC1>,
-				 <&rcc DDRC2>,
-				 <&rcc DDRPHYC>,
-				 <&rcc DDRCAPB>,
-				 <&rcc DDRPHYCAPB>;
+		st,ctl-reg = <
+			DDR_MSTR
+			DDR_MRCTRL0
+			DDR_MRCTRL1
+			DDR_DERATEEN
+			DDR_DERATEINT
+			DDR_PWRCTL
+			DDR_PWRTMG
+			DDR_HWLPCTL
+			DDR_RFSHCTL0
+			DDR_RFSHCTL3
+			DDR_CRCPARCTL0
+			DDR_ZQCTL0
+			DDR_DFITMG0
+			DDR_DFITMG1
+			DDR_DFILPCFG0
+			DDR_DFIUPD0
+			DDR_DFIUPD1
+			DDR_DFIUPD2
+			DDR_DFIPHYMSTR
+			DDR_ODTMAP
+			DDR_DBG0
+			DDR_DBG1
+			DDR_DBGCMD
+			DDR_POISONCFG
+			DDR_PCCFG
+		>;
 
-			clock-names = "axidcg",
-				      "ddrc1",
-				      "ddrc2",
-				      "ddrphyc",
-				      "ddrcapb",
-				      "ddrphycapb";
+		st,ctl-timing = <
+			DDR_RFSHTMG
+			DDR_DRAMTMG0
+			DDR_DRAMTMG1
+			DDR_DRAMTMG2
+			DDR_DRAMTMG3
+			DDR_DRAMTMG4
+			DDR_DRAMTMG5
+			DDR_DRAMTMG6
+			DDR_DRAMTMG7
+			DDR_DRAMTMG8
+			DDR_DRAMTMG14
+			DDR_ODTCFG
+		>;
 
-			st,mem-name = DDR_MEM_NAME;
-			st,mem-speed = <DDR_MEM_SPEED>;
-			st,mem-size = <DDR_MEM_SIZE>;
+		st,ctl-map = <
+			DDR_ADDRMAP1
+			DDR_ADDRMAP2
+			DDR_ADDRMAP3
+			DDR_ADDRMAP4
+			DDR_ADDRMAP5
+			DDR_ADDRMAP6
+			DDR_ADDRMAP9
+			DDR_ADDRMAP10
+			DDR_ADDRMAP11
+		>;
 
-			st,ctl-reg = <
-				DDR_MSTR
-				DDR_MRCTRL0
-				DDR_MRCTRL1
-				DDR_DERATEEN
-				DDR_DERATEINT
-				DDR_PWRCTL
-				DDR_PWRTMG
-				DDR_HWLPCTL
-				DDR_RFSHCTL0
-				DDR_RFSHCTL3
-				DDR_CRCPARCTL0
-				DDR_ZQCTL0
-				DDR_DFITMG0
-				DDR_DFITMG1
-				DDR_DFILPCFG0
-				DDR_DFIUPD0
-				DDR_DFIUPD1
-				DDR_DFIUPD2
-				DDR_DFIPHYMSTR
-				DDR_ODTMAP
-				DDR_DBG0
-				DDR_DBG1
-				DDR_DBGCMD
-				DDR_POISONCFG
-				DDR_PCCFG
-			>;
+		st,ctl-perf = <
+			DDR_SCHED
+			DDR_SCHED1
+			DDR_PERFHPR1
+			DDR_PERFLPR1
+			DDR_PERFWR1
+			DDR_PCFGR_0
+			DDR_PCFGW_0
+			DDR_PCFGQOS0_0
+			DDR_PCFGQOS1_0
+			DDR_PCFGWQOS0_0
+			DDR_PCFGWQOS1_0
+			DDR_PCFGR_1
+			DDR_PCFGW_1
+			DDR_PCFGQOS0_1
+			DDR_PCFGQOS1_1
+			DDR_PCFGWQOS0_1
+			DDR_PCFGWQOS1_1
+		>;
 
-			st,ctl-timing = <
-				DDR_RFSHTMG
-				DDR_DRAMTMG0
-				DDR_DRAMTMG1
-				DDR_DRAMTMG2
-				DDR_DRAMTMG3
-				DDR_DRAMTMG4
-				DDR_DRAMTMG5
-				DDR_DRAMTMG6
-				DDR_DRAMTMG7
-				DDR_DRAMTMG8
-				DDR_DRAMTMG14
-				DDR_ODTCFG
-			>;
+		st,phy-reg = <
+			DDR_PGCR
+			DDR_ACIOCR
+			DDR_DXCCR
+			DDR_DSGCR
+			DDR_DCR
+			DDR_ODTCR
+			DDR_ZQ0CR1
+			DDR_DX0GCR
+			DDR_DX1GCR
+			DDR_DX2GCR
+			DDR_DX3GCR
+		>;
 
-			st,ctl-map = <
-				DDR_ADDRMAP1
-				DDR_ADDRMAP2
-				DDR_ADDRMAP3
-				DDR_ADDRMAP4
-				DDR_ADDRMAP5
-				DDR_ADDRMAP6
-				DDR_ADDRMAP9
-				DDR_ADDRMAP10
-				DDR_ADDRMAP11
-			>;
-
-			st,ctl-perf = <
-				DDR_SCHED
-				DDR_SCHED1
-				DDR_PERFHPR1
-				DDR_PERFLPR1
-				DDR_PERFWR1
-				DDR_PCFGR_0
-				DDR_PCFGW_0
-				DDR_PCFGQOS0_0
-				DDR_PCFGQOS1_0
-				DDR_PCFGWQOS0_0
-				DDR_PCFGWQOS1_0
-				DDR_PCFGR_1
-				DDR_PCFGW_1
-				DDR_PCFGQOS0_1
-				DDR_PCFGQOS1_1
-				DDR_PCFGWQOS0_1
-				DDR_PCFGWQOS1_1
-			>;
-
-			st,phy-reg = <
-				DDR_PGCR
-				DDR_ACIOCR
-				DDR_DXCCR
-				DDR_DSGCR
-				DDR_DCR
-				DDR_ODTCR
-				DDR_ZQ0CR1
-				DDR_DX0GCR
-				DDR_DX1GCR
-				DDR_DX2GCR
-				DDR_DX3GCR
-			>;
-
-			st,phy-timing = <
-				DDR_PTR0
-				DDR_PTR1
-				DDR_PTR2
-				DDR_DTPR0
-				DDR_DTPR1
-				DDR_DTPR2
-				DDR_MR0
-				DDR_MR1
-				DDR_MR2
-				DDR_MR3
-			>;
+		st,phy-timing = <
+			DDR_PTR0
+			DDR_PTR1
+			DDR_PTR2
+			DDR_DTPR0
+			DDR_DTPR1
+			DDR_DTPR2
+			DDR_MR0
+			DDR_MR1
+			DDR_MR2
+			DDR_MR3
+		>;
 
 #ifdef DDR_PHY_CAL_SKIP
-			st,phy-cal = <
-				DDR_DX0DLLCR
-				DDR_DX0DQTR
-				DDR_DX0DQSTR
-				DDR_DX1DLLCR
-				DDR_DX1DQTR
-				DDR_DX1DQSTR
-				DDR_DX2DLLCR
-				DDR_DX2DQTR
-				DDR_DX2DQSTR
-				DDR_DX3DLLCR
-				DDR_DX3DQTR
-				DDR_DX3DQSTR
-			>;
+		st,phy-cal = <
+			DDR_DX0DLLCR
+			DDR_DX0DQTR
+			DDR_DX0DQSTR
+			DDR_DX1DLLCR
+			DDR_DX1DQTR
+			DDR_DX1DQSTR
+			DDR_DX2DLLCR
+			DDR_DX2DQTR
+			DDR_DX2DQSTR
+			DDR_DX3DLLCR
+			DDR_DX3DQTR
+			DDR_DX3DQSTR
+		>;
 
 #endif
 
-			status = "okay";
-		};
+		status = "okay";
 	};
 };
+
+#undef DDR_MEM_COMPATIBLE
+#undef DDR_MEM_NAME
+#undef DDR_MEM_SPEED
+#undef DDR_MEM_SIZE
+
+#undef DDR_MSTR
+#undef DDR_MRCTRL0
+#undef DDR_MRCTRL1
+#undef DDR_DERATEEN
+#undef DDR_DERATEINT
+#undef DDR_PWRCTL
+#undef DDR_PWRTMG
+#undef DDR_HWLPCTL
+#undef DDR_RFSHCTL0
+#undef DDR_RFSHCTL3
+#undef DDR_RFSHTMG
+#undef DDR_CRCPARCTL0
+#undef DDR_DRAMTMG0
+#undef DDR_DRAMTMG1
+#undef DDR_DRAMTMG2
+#undef DDR_DRAMTMG3
+#undef DDR_DRAMTMG4
+#undef DDR_DRAMTMG5
+#undef DDR_DRAMTMG6
+#undef DDR_DRAMTMG7
+#undef DDR_DRAMTMG8
+#undef DDR_DRAMTMG14
+#undef DDR_ZQCTL0
+#undef DDR_DFITMG0
+#undef DDR_DFITMG1
+#undef DDR_DFILPCFG0
+#undef DDR_DFIUPD0
+#undef DDR_DFIUPD1
+#undef DDR_DFIUPD2
+#undef DDR_DFIPHYMSTR
+#undef DDR_ADDRMAP1
+#undef DDR_ADDRMAP2
+#undef DDR_ADDRMAP3
+#undef DDR_ADDRMAP4
+#undef DDR_ADDRMAP5
+#undef DDR_ADDRMAP6
+#undef DDR_ADDRMAP9
+#undef DDR_ADDRMAP10
+#undef DDR_ADDRMAP11
+#undef DDR_ODTCFG
+#undef DDR_ODTMAP
+#undef DDR_SCHED
+#undef DDR_SCHED1
+#undef DDR_PERFHPR1
+#undef DDR_PERFLPR1
+#undef DDR_PERFWR1
+#undef DDR_DBG0
+#undef DDR_DBG1
+#undef DDR_DBGCMD
+#undef DDR_POISONCFG
+#undef DDR_PCCFG
+#undef DDR_PCFGR_0
+#undef DDR_PCFGW_0
+#undef DDR_PCFGQOS0_0
+#undef DDR_PCFGQOS1_0
+#undef DDR_PCFGWQOS0_0
+#undef DDR_PCFGWQOS1_0
+#undef DDR_PCFGR_1
+#undef DDR_PCFGW_1
+#undef DDR_PCFGQOS0_1
+#undef DDR_PCFGQOS1_1
+#undef DDR_PCFGWQOS0_1
+#undef DDR_PCFGWQOS1_1
+#undef DDR_PGCR
+#undef DDR_PTR0
+#undef DDR_PTR1
+#undef DDR_PTR2
+#undef DDR_ACIOCR
+#undef DDR_DXCCR
+#undef DDR_DSGCR
+#undef DDR_DCR
+#undef DDR_DTPR0
+#undef DDR_DTPR1
+#undef DDR_DTPR2
+#undef DDR_MR0
+#undef DDR_MR1
+#undef DDR_MR2
+#undef DDR_MR3
+#undef DDR_ODTCR
+#undef DDR_ZQ0CR1
+#undef DDR_DX0GCR
+#undef DDR_DX0DLLCR
+#undef DDR_DX0DQTR
+#undef DDR_DX0DQSTR
+#undef DDR_DX1GCR
+#undef DDR_DX1DLLCR
+#undef DDR_DX1DQTR
+#undef DDR_DX1DQSTR
+#undef DDR_DX2GCR
+#undef DDR_DX2DLLCR
+#undef DDR_DX2DQTR
+#undef DDR_DX2DQSTR
+#undef DDR_DX3GCR
+#undef DDR_DX3DLLCR
+#undef DDR_DX3DQTR
+#undef DDR_DX3DQSTR
diff --git a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi
index 11e8f2bef6..b4787c4735 100644
--- a/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi
+++ b/arch/arm/dts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi
@@ -1,24 +1,23 @@
 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+
+/*
+ * File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs
+ * DDR type: DDR3 / DDR3L
+ * DDR width: 16bits
+ * DDR density: 4Gb
+ * System frequency: 533000Khz
+ * Relaxed Timing Mode: false
+ * Address mapping type: RBC
  *
- * STM32MP157C DK1/DK2 BOARD configuration
- * 1x DDR3L 4Gb, 16-bit, 533MHz.
- * Reference used NT5CC256M16DP-DI from NANYA
- *
- * DDR type / Platform	DDR3/3L
- * freq		533MHz
- * width	16
- * datasheet	0  = MT41J256M16-187 / DDR3-1066 bin G
- * DDR density	4
- * timing mode	optimized
- * Scheduling/QoS options : type = 2
- * address mapping : RBC
- * Tc > + 85C : N
+ * Save Date: 2020.02.20, save Time: 18:45:20
  */
-#define DDR_MEM_NAME "DDR3-1066/888 bin G 1x4Gb 533MHz v1.45"
-#define DDR_MEM_SPEED 533000
-#define DDR_MEM_SIZE 0x20000000
+#define DDR_MEM_COMPATIBLE ddr3-1066-888-bin-g-1x4gb-533mhz
+#define DDR_MEM_NAME	"DDR3-DDR3L 16bits 533000Khz"
+#define DDR_MEM_SPEED	533000
+#define DDR_MEM_SIZE	0x20000000
 
 #define DDR_MSTR 0x00041401
 #define DDR_MRCTRL0 0x00000010
@@ -50,15 +49,6 @@
 #define DDR_DFIUPD1 0x00000000
 #define DDR_DFIUPD2 0x00000000
 #define DDR_DFIPHYMSTR 0x00000000
-#define DDR_ADDRMAP1 0x00070707
-#define DDR_ADDRMAP2 0x00000000
-#define DDR_ADDRMAP3 0x1F000000
-#define DDR_ADDRMAP4 0x00001F1F
-#define DDR_ADDRMAP5 0x06060606
-#define DDR_ADDRMAP6 0x0F060606
-#define DDR_ADDRMAP9 0x00000000
-#define DDR_ADDRMAP10 0x00000000
-#define DDR_ADDRMAP11 0x00000000
 #define DDR_ODTCFG 0x06000600
 #define DDR_ODTMAP 0x00000001
 #define DDR_SCHED 0x00000C01
@@ -83,6 +73,15 @@
 #define DDR_PCFGQOS1_1 0x00800040
 #define DDR_PCFGWQOS0_1 0x01100C03
 #define DDR_PCFGWQOS1_1 0x01000200
+#define DDR_ADDRMAP1 0x00070707
+#define DDR_ADDRMAP2 0x00000000
+#define DDR_ADDRMAP3 0x1F000000
+#define DDR_ADDRMAP4 0x00001F1F
+#define DDR_ADDRMAP5 0x06060606
+#define DDR_ADDRMAP6 0x0F060606
+#define DDR_ADDRMAP9 0x00000000
+#define DDR_ADDRMAP10 0x00000000
+#define DDR_ADDRMAP11 0x00000000
 #define DDR_PGCR 0x01442E02
 #define DDR_PTR0 0x0022AA5B
 #define DDR_PTR1 0x04841104
diff --git a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
index 4b70b60554..dc2875ca08 100644
--- a/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
+++ b/arch/arm/dts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi
@@ -1,24 +1,23 @@
 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
 /*
  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ */
+
+/*
+ * File generated by STMicroelectronics STM32CubeMX DDR Tool for MPUs
+ * DDR type: DDR3 / DDR3L
+ * DDR width: 32bits
+ * DDR density: 8Gb
+ * System frequency: 533000Khz
+ * Relaxed Timing Mode: false
+ * Address mapping type: RBC
  *
- * STM32MP157C ED1 BOARD configuration
- * 2x DDR3L 4Gb each, 16-bit, 533MHz, Single Die Package in flyby topology.
- * Reference used NT5CC256M16DP-DI from NANYA
- *
- * DDR type / Platform	DDR3/3L
- * freq		533MHz
- * width	32
- * datasheet	0  = MT41J256M16-187 / DDR3-1066 bin G
- * DDR density	8
- * timing mode	optimized
- * Scheduling/QoS options : type = 2
- * address mapping : RBC
- * Tc > + 85C : N
+ * Save Date: 2020.02.20, save Time: 18:49:33
  */
-#define DDR_MEM_NAME "DDR3-1066/888 bin G 2x4Gb 533MHz v1.45"
-#define DDR_MEM_SPEED 533000
-#define DDR_MEM_SIZE 0x40000000
+#define DDR_MEM_COMPATIBLE ddr3-1066-888-bin-g-2x4gb-533mhz
+#define DDR_MEM_NAME	"DDR3-DDR3L 32bits 533000Khz"
+#define DDR_MEM_SPEED	533000
+#define DDR_MEM_SIZE	0x40000000
 
 #define DDR_MSTR 0x00040401
 #define DDR_MRCTRL0 0x00000010
@@ -50,15 +49,6 @@
 #define DDR_DFIUPD1 0x00000000
 #define DDR_DFIUPD2 0x00000000
 #define DDR_DFIPHYMSTR 0x00000000
-#define DDR_ADDRMAP1 0x00080808
-#define DDR_ADDRMAP2 0x00000000
-#define DDR_ADDRMAP3 0x00000000
-#define DDR_ADDRMAP4 0x00001F1F
-#define DDR_ADDRMAP5 0x07070707
-#define DDR_ADDRMAP6 0x0F070707
-#define DDR_ADDRMAP9 0x00000000
-#define DDR_ADDRMAP10 0x00000000
-#define DDR_ADDRMAP11 0x00000000
 #define DDR_ODTCFG 0x06000600
 #define DDR_ODTMAP 0x00000001
 #define DDR_SCHED 0x00000C01
@@ -83,6 +73,15 @@
 #define DDR_PCFGQOS1_1 0x00800040
 #define DDR_PCFGWQOS0_1 0x01100C03
 #define DDR_PCFGWQOS1_1 0x01000200
+#define DDR_ADDRMAP1 0x00080808
+#define DDR_ADDRMAP2 0x00000000
+#define DDR_ADDRMAP3 0x00000000
+#define DDR_ADDRMAP4 0x00001F1F
+#define DDR_ADDRMAP5 0x07070707
+#define DDR_ADDRMAP6 0x0F070707
+#define DDR_ADDRMAP9 0x00000000
+#define DDR_ADDRMAP10 0x00000000
+#define DDR_ADDRMAP11 0x00000000
 #define DDR_PGCR 0x01442E02
 #define DDR_PTR0 0x0022AA5B
 #define DDR_PTR1 0x04841104
diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi
new file mode 100644
index 0000000000..b3eb280f96
--- /dev/null
+++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, DH electronics - All Rights Reserved
+ *
+ * STM32MP15xx DHSOM configuration
+ * 2x DDR3L 1Gb each, 16-bit, 533MHz, Single Die Package in flyby topology.
+ * Reference used W631GU6MB15I from Winbond
+ *
+ * DDR type / Platform	DDR3/3L
+ * freq		533MHz
+ * width	32
+ * datasheet	0  = W631GU6MB15I / DDR3-1333
+ * DDR density	2
+ * timing mode	optimized
+ * address mapping : RBC
+ * Tc > + 85C : J
+ */
+#define DDR_MEM_COMPATIBLE ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz
+#define DDR_MEM_NAME "DDR3L 32bits 2x1Gb 533MHz"
+#define DDR_MEM_SPEED 533000
+#define DDR_MEM_SIZE 0x10000000
+
+#define DDR_MSTR 0x00040401
+#define DDR_MRCTRL0 0x00000010
+#define DDR_MRCTRL1 0x00000000
+#define DDR_DERATEEN 0x00000000
+#define DDR_DERATEINT 0x00800000
+#define DDR_PWRCTL 0x00000000
+#define DDR_PWRTMG 0x00400010
+#define DDR_HWLPCTL 0x00000000
+#define DDR_RFSHCTL0 0x00210000
+#define DDR_RFSHCTL3 0x00000000
+#define DDR_RFSHTMG 0x0040008B
+#define DDR_CRCPARCTL0 0x00000000
+#define DDR_DRAMTMG0 0x121B1214
+#define DDR_DRAMTMG1 0x000A041C
+#define DDR_DRAMTMG2 0x0608090F
+#define DDR_DRAMTMG3 0x0050400C
+#define DDR_DRAMTMG4 0x08040608
+#define DDR_DRAMTMG5 0x06060403
+#define DDR_DRAMTMG6 0x02020002
+#define DDR_DRAMTMG7 0x00000202
+#define DDR_DRAMTMG8 0x00001005
+#define DDR_DRAMTMG14 0x000000A0
+#define DDR_ZQCTL0 0xC2000040
+#define DDR_DFITMG0 0x02060105
+#define DDR_DFITMG1 0x00000202
+#define DDR_DFILPCFG0 0x07000000
+#define DDR_DFIUPD0 0xC0400003
+#define DDR_DFIUPD1 0x00000000
+#define DDR_DFIUPD2 0x00000000
+#define DDR_DFIPHYMSTR 0x00000000
+#define DDR_ODTCFG 0x06000600
+#define DDR_ODTMAP 0x00000001
+#define DDR_SCHED 0x00000C01
+#define DDR_SCHED1 0x00000000
+#define DDR_PERFHPR1 0x01000001
+#define DDR_PERFLPR1 0x08000200
+#define DDR_PERFWR1 0x08000400
+#define DDR_DBG0 0x00000000
+#define DDR_DBG1 0x00000000
+#define DDR_DBGCMD 0x00000000
+#define DDR_POISONCFG 0x00000000
+#define DDR_PCCFG 0x00000010
+#define DDR_PCFGR_0 0x00010000
+#define DDR_PCFGW_0 0x00000000
+#define DDR_PCFGQOS0_0 0x02100C03
+#define DDR_PCFGQOS1_0 0x00800100
+#define DDR_PCFGWQOS0_0 0x01100C03
+#define DDR_PCFGWQOS1_0 0x01000200
+#define DDR_PCFGR_1 0x00010000
+#define DDR_PCFGW_1 0x00000000
+#define DDR_PCFGQOS0_1 0x02100C03
+#define DDR_PCFGQOS1_1 0x00800040
+#define DDR_PCFGWQOS0_1 0x01100C03
+#define DDR_PCFGWQOS1_1 0x01000200
+#define DDR_ADDRMAP1 0x00080808
+#define DDR_ADDRMAP2 0x00000000
+#define DDR_ADDRMAP3 0x00000000
+#define DDR_ADDRMAP4 0x00001F1F
+#define DDR_ADDRMAP5 0x07070707
+#define DDR_ADDRMAP6 0x0F0F0F07
+#define DDR_ADDRMAP9 0x00000000
+#define DDR_ADDRMAP10 0x00000000
+#define DDR_ADDRMAP11 0x00000000
+#define DDR_PGCR 0x01442E02
+#define DDR_PTR0 0x0022AA5B
+#define DDR_PTR1 0x04841104
+#define DDR_PTR2 0x042DA068
+#define DDR_ACIOCR 0x10400812
+#define DDR_DXCCR 0x00000C40
+#define DDR_DSGCR 0xF200011F
+#define DDR_DCR 0x0000000B
+#define DDR_DTPR0 0x38D488D0
+#define DDR_DTPR1 0x098B00D8
+#define DDR_DTPR2 0x10023600
+#define DDR_MR0 0x00000840
+#define DDR_MR1 0x00000000
+#define DDR_MR2 0x00000248
+#define DDR_MR3 0x00000000
+#define DDR_ODTCR 0x00010000
+#define DDR_ZQ0CR1 0x00000038
+#define DDR_DX0GCR 0x0000CE81
+#define DDR_DX0DLLCR 0x40000000
+#define DDR_DX0DQTR 0xFFFFFFFF
+#define DDR_DX0DQSTR 0x3DB02000
+#define DDR_DX1GCR 0x0000CE81
+#define DDR_DX1DLLCR 0x40000000
+#define DDR_DX1DQTR 0xFFFFFFFF
+#define DDR_DX1DQSTR 0x3DB02000
+#define DDR_DX2GCR 0x0000CE81
+#define DDR_DX2DLLCR 0x40000000
+#define DDR_DX2DQTR 0xFFFFFFFF
+#define DDR_DX2DQSTR 0x3DB02000
+#define DDR_DX3GCR 0x0000CE81
+#define DDR_DX3DLLCR 0x40000000
+#define DDR_DX3DQTR 0xFFFFFFFF
+#define DDR_DX3DQSTR 0x3DB02000
+
+#include "stm32mp15-ddr.dtsi"
diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi
new file mode 100644
index 0000000000..ed3a5248f8
--- /dev/null
+++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, DH electronics - All Rights Reserved
+ *
+ * STM32MP15xx DHSOM configuration
+ * 2x DDR3L 2Gb each, 16-bit, 533MHz, Single Die Package in flyby topology.
+ * Reference used W632GU6NB15I from Winbond
+ *
+ * DDR type / Platform	DDR3/3L
+ * freq		533MHz
+ * width	32
+ * datasheet	0  = W632GU6NB15I / DDR3-1333
+ * DDR density	4
+ * timing mode	optimized
+ * address mapping : RBC
+ * Tc > + 85C : J
+ */
+#define DDR_MEM_COMPATIBLE ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz
+#define DDR_MEM_NAME "DDR3L 32bits 2x2Gb 533MHz"
+#define DDR_MEM_SPEED 533000
+#define DDR_MEM_SIZE 0x20000000
+
+#define DDR_MSTR 0x00040401
+#define DDR_MRCTRL0 0x00000010
+#define DDR_MRCTRL1 0x00000000
+#define DDR_DERATEEN 0x00000000
+#define DDR_DERATEINT 0x00800000
+#define DDR_PWRCTL 0x00000000
+#define DDR_PWRTMG 0x00400010
+#define DDR_HWLPCTL 0x00000000
+#define DDR_RFSHCTL0 0x00210000
+#define DDR_RFSHCTL3 0x00000000
+#define DDR_RFSHTMG 0x0040008B
+#define DDR_CRCPARCTL0 0x00000000
+#define DDR_DRAMTMG0 0x121B1214
+#define DDR_DRAMTMG1 0x000A041C
+#define DDR_DRAMTMG2 0x0608090F
+#define DDR_DRAMTMG3 0x0050400C
+#define DDR_DRAMTMG4 0x08040608
+#define DDR_DRAMTMG5 0x06060403
+#define DDR_DRAMTMG6 0x02020002
+#define DDR_DRAMTMG7 0x00000202
+#define DDR_DRAMTMG8 0x00001005
+#define DDR_DRAMTMG14 0x000000A0
+#define DDR_ZQCTL0 0xC2000040
+#define DDR_DFITMG0 0x02060105
+#define DDR_DFITMG1 0x00000202
+#define DDR_DFILPCFG0 0x07000000
+#define DDR_DFIUPD0 0xC0400003
+#define DDR_DFIUPD1 0x00000000
+#define DDR_DFIUPD2 0x00000000
+#define DDR_DFIPHYMSTR 0x00000000
+#define DDR_ODTCFG 0x06000600
+#define DDR_ODTMAP 0x00000001
+#define DDR_SCHED 0x00000C01
+#define DDR_SCHED1 0x00000000
+#define DDR_PERFHPR1 0x01000001
+#define DDR_PERFLPR1 0x08000200
+#define DDR_PERFWR1 0x08000400
+#define DDR_DBG0 0x00000000
+#define DDR_DBG1 0x00000000
+#define DDR_DBGCMD 0x00000000
+#define DDR_POISONCFG 0x00000000
+#define DDR_PCCFG 0x00000010
+#define DDR_PCFGR_0 0x00010000
+#define DDR_PCFGW_0 0x00000000
+#define DDR_PCFGQOS0_0 0x02100C03
+#define DDR_PCFGQOS1_0 0x00800100
+#define DDR_PCFGWQOS0_0 0x01100C03
+#define DDR_PCFGWQOS1_0 0x01000200
+#define DDR_PCFGR_1 0x00010000
+#define DDR_PCFGW_1 0x00000000
+#define DDR_PCFGQOS0_1 0x02100C03
+#define DDR_PCFGQOS1_1 0x00800040
+#define DDR_PCFGWQOS0_1 0x01100C03
+#define DDR_PCFGWQOS1_1 0x01000200
+#define DDR_ADDRMAP1 0x00080808
+#define DDR_ADDRMAP2 0x00000000
+#define DDR_ADDRMAP3 0x00000000
+#define DDR_ADDRMAP4 0x00001F1F
+#define DDR_ADDRMAP5 0x07070707
+#define DDR_ADDRMAP6 0x0F0F0707
+#define DDR_ADDRMAP9 0x00000000
+#define DDR_ADDRMAP10 0x00000000
+#define DDR_ADDRMAP11 0x00000000
+#define DDR_PGCR 0x01442E02
+#define DDR_PTR0 0x0022AA5B
+#define DDR_PTR1 0x04841104
+#define DDR_PTR2 0x042DA068
+#define DDR_ACIOCR 0x10400812
+#define DDR_DXCCR 0x00000C40
+#define DDR_DSGCR 0xF200011F
+#define DDR_DCR 0x0000000B
+#define DDR_DTPR0 0x38D488D0
+#define DDR_DTPR1 0x098B00D8
+#define DDR_DTPR2 0x10023600
+#define DDR_MR0 0x00000840
+#define DDR_MR1 0x00000000
+#define DDR_MR2 0x00000248
+#define DDR_MR3 0x00000000
+#define DDR_ODTCR 0x00010000
+#define DDR_ZQ0CR1 0x00000038
+#define DDR_DX0GCR 0x0000CE81
+#define DDR_DX0DLLCR 0x40000000
+#define DDR_DX0DQTR 0xFFFFFFFF
+#define DDR_DX0DQSTR 0x3DB02000
+#define DDR_DX1GCR 0x0000CE81
+#define DDR_DX1DLLCR 0x40000000
+#define DDR_DX1DQTR 0xFFFFFFFF
+#define DDR_DX1DQSTR 0x3DB02000
+#define DDR_DX2GCR 0x0000CE81
+#define DDR_DX2DLLCR 0x40000000
+#define DDR_DX2DQTR 0xFFFFFFFF
+#define DDR_DX2DQSTR 0x3DB02000
+#define DDR_DX3GCR 0x0000CE81
+#define DDR_DX3DLLCR 0x40000000
+#define DDR_DX3DQTR 0xFFFFFFFF
+#define DDR_DX3DQSTR 0x3DB02000
+
+#include "stm32mp15-ddr.dtsi"
diff --git a/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
new file mode 100644
index 0000000000..d5813d64b0
--- /dev/null
+++ b/arch/arm/dts/stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, DH electronics - All Rights Reserved
+ *
+ * STM32MP15xx DHSOM configuration
+ * 2x DDR3L 4Gb each, 16-bit, 533MHz, Single Die Package in flyby topology.
+ * Reference used W634GU6NB15I from Winbond
+ *
+ * DDR type / Platform	DDR3/3L
+ * freq		533MHz
+ * width	32
+ * datasheet	0  = W634GU6NB15I / DDR3-1333
+ * DDR density	8
+ * timing mode	optimized
+ * address mapping : RBC
+ * Tc > + 85C : J
+ */
+#define DDR_MEM_COMPATIBLE ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz
+#define DDR_MEM_NAME "DDR3L 32bits 2x4Gb 533MHz"
+#define DDR_MEM_SPEED 533000
+#define DDR_MEM_SIZE 0x40000000
+
+#define DDR_MSTR 0x00040401
+#define DDR_MRCTRL0 0x00000010
+#define DDR_MRCTRL1 0x00000000
+#define DDR_DERATEEN 0x00000000
+#define DDR_DERATEINT 0x00800000
+#define DDR_PWRCTL 0x00000000
+#define DDR_PWRTMG 0x00400010
+#define DDR_HWLPCTL 0x00000000
+#define DDR_RFSHCTL0 0x00210000
+#define DDR_RFSHCTL3 0x00000000
+#define DDR_RFSHTMG 0x0040008B
+#define DDR_CRCPARCTL0 0x00000000
+#define DDR_DRAMTMG0 0x121B1214
+#define DDR_DRAMTMG1 0x000A041C
+#define DDR_DRAMTMG2 0x0608090F
+#define DDR_DRAMTMG3 0x0050400C
+#define DDR_DRAMTMG4 0x08040608
+#define DDR_DRAMTMG5 0x06060403
+#define DDR_DRAMTMG6 0x02020002
+#define DDR_DRAMTMG7 0x00000202
+#define DDR_DRAMTMG8 0x00001005
+#define DDR_DRAMTMG14 0x000000A0
+#define DDR_ZQCTL0 0xC2000040
+#define DDR_DFITMG0 0x02060105
+#define DDR_DFITMG1 0x00000202
+#define DDR_DFILPCFG0 0x07000000
+#define DDR_DFIUPD0 0xC0400003
+#define DDR_DFIUPD1 0x00000000
+#define DDR_DFIUPD2 0x00000000
+#define DDR_DFIPHYMSTR 0x00000000
+#define DDR_ODTCFG 0x06000600
+#define DDR_ODTMAP 0x00000001
+#define DDR_SCHED 0x00000C01
+#define DDR_SCHED1 0x00000000
+#define DDR_PERFHPR1 0x01000001
+#define DDR_PERFLPR1 0x08000200
+#define DDR_PERFWR1 0x08000400
+#define DDR_DBG0 0x00000000
+#define DDR_DBG1 0x00000000
+#define DDR_DBGCMD 0x00000000
+#define DDR_POISONCFG 0x00000000
+#define DDR_PCCFG 0x00000010
+#define DDR_PCFGR_0 0x00010000
+#define DDR_PCFGW_0 0x00000000
+#define DDR_PCFGQOS0_0 0x02100C03
+#define DDR_PCFGQOS1_0 0x00800100
+#define DDR_PCFGWQOS0_0 0x01100C03
+#define DDR_PCFGWQOS1_0 0x01000200
+#define DDR_PCFGR_1 0x00010000
+#define DDR_PCFGW_1 0x00000000
+#define DDR_PCFGQOS0_1 0x02100C03
+#define DDR_PCFGQOS1_1 0x00800040
+#define DDR_PCFGWQOS0_1 0x01100C03
+#define DDR_PCFGWQOS1_1 0x01000200
+#define DDR_ADDRMAP1 0x00080808
+#define DDR_ADDRMAP2 0x00000000
+#define DDR_ADDRMAP3 0x00000000
+#define DDR_ADDRMAP4 0x00001F1F
+#define DDR_ADDRMAP5 0x07070707
+#define DDR_ADDRMAP6 0x0F070707
+#define DDR_ADDRMAP9 0x00000000
+#define DDR_ADDRMAP10 0x00000000
+#define DDR_ADDRMAP11 0x00000000
+#define DDR_PGCR 0x01442E02
+#define DDR_PTR0 0x0022AA5B
+#define DDR_PTR1 0x04841104
+#define DDR_PTR2 0x042DA068
+#define DDR_ACIOCR 0x10400812
+#define DDR_DXCCR 0x00000C40
+#define DDR_DSGCR 0xF200011F
+#define DDR_DCR 0x0000000B
+#define DDR_DTPR0 0x38D488D0
+#define DDR_DTPR1 0x098B00D8
+#define DDR_DTPR2 0x10023600
+#define DDR_MR0 0x00000840
+#define DDR_MR1 0x00000000
+#define DDR_MR2 0x00000248
+#define DDR_MR3 0x00000000
+#define DDR_ODTCR 0x00010000
+#define DDR_ZQ0CR1 0x00000038
+#define DDR_DX0GCR 0x0000CE81
+#define DDR_DX0DLLCR 0x40000000
+#define DDR_DX0DQTR 0xFFFFFFFF
+#define DDR_DX0DQSTR 0x3DB02000
+#define DDR_DX1GCR 0x0000CE81
+#define DDR_DX1DLLCR 0x40000000
+#define DDR_DX1DQTR 0xFFFFFFFF
+#define DDR_DX1DQSTR 0x3DB02000
+#define DDR_DX2GCR 0x0000CE81
+#define DDR_DX2DLLCR 0x40000000
+#define DDR_DX2DQTR 0xFFFFFFFF
+#define DDR_DX2DQSTR 0x3DB02000
+#define DDR_DX3GCR 0x0000CE81
+#define DDR_DX3DLLCR 0x40000000
+#define DDR_DX3DQTR 0xFFFFFFFF
+#define DDR_DX3DQSTR 0x3DB02000
+
+#include "stm32mp15-ddr.dtsi"
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi
index 29acdc4afd..c385896ebc 100644
--- a/arch/arm/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi
@@ -213,6 +213,40 @@
 		};
 	};
 
+	ethernet0_rmii_pins_a: rmii-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
+				 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
+				 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
+				 <STM32_PINMUX('A', 1, AF0)>,   /* ETH1_RMII_REF_CLK */
+				 <STM32_PINMUX('A', 2, AF11)>,  /* ETH1_MDIO */
+				 <STM32_PINMUX('C', 1, AF11)>;  /* ETH1_MDC */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <2>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
+				 <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
+				 <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
+			bias-disable;
+		};
+	};
+
+	ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
+				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
+				 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
+				 <STM32_PINMUX('A', 2, ANALOG)>,  /* ETH1_MDIO */
+				 <STM32_PINMUX('C', 1, ANALOG)>,  /* ETH1_MDC */
+				 <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
+				 <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
+				 <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
+				 <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
+		};
+	};
+
 	fmc_pins_a: fmc-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('D', 4, AF12)>, /* FMC_NOE */
@@ -323,6 +357,23 @@
 		};
 	};
 
+	i2c2_pins_c: i2c2-4 {
+		pins {
+			pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
+				 <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
+			bias-disable;
+			drive-open-drain;
+			slew-rate = <0>;
+		};
+	};
+
+	i2c2_pins_sleep_c: i2c2-5 {
+		pins {
+			pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
+				 <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
+		};
+	};
+
 	i2c5_pins_a: i2c5-0 {
 		pins {
 			pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
@@ -736,6 +787,25 @@
 		};
 	};
 
+	sai2a_pins_b: sai2a-2 {
+		pins1 {
+			pinmux = <STM32_PINMUX('I', 6, AF10)>,	/* SAI2_SD_A */
+				 <STM32_PINMUX('I', 7, AF10)>,	/* SAI2_FS_A */
+				 <STM32_PINMUX('D', 13, AF10)>;	/* SAI2_SCK_A */
+			slew-rate = <0>;
+			drive-push-pull;
+			bias-disable;
+		};
+	};
+
+	sai2a_sleep_pins_b: sai2a-sleep-3 {
+		pins {
+			pinmux = <STM32_PINMUX('I', 6, ANALOG)>,  /* SAI2_SD_A */
+				 <STM32_PINMUX('I', 7, ANALOG)>,  /* SAI2_FS_A */
+				 <STM32_PINMUX('D', 13, ANALOG)>; /* SAI2_SCK_A */
+		};
+	};
+
 	sai2b_pins_a: sai2b-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
@@ -1118,6 +1188,19 @@
 		};
 	};
 
+	usart3_pins_a: usart3-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('B', 10, AF7)>; /* USART3_TX */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */
+			bias-disable;
+		};
+	};
+
 	uart4_pins_a: uart4-0 {
 		pins1 {
 			pinmux = <STM32_PINMUX('G', 11, AF6)>; /* UART4_TX */
@@ -1158,6 +1241,32 @@
 			bias-disable;
 		};
 	};
+
+	uart8_pins_a: uart8-0 {
+		pins1 {
+			pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */
+			bias-disable;
+			drive-push-pull;
+			slew-rate = <0>;
+		};
+		pins2 {
+			pinmux = <STM32_PINMUX('E', 0, AF8)>; /* UART8_RX */
+			bias-disable;
+		};
+	};
+
+	usbotg_hs_pins_a: usbotg-hs-0 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */
+		};
+	};
+
+	usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 {
+		pins {
+			pinmux = <STM32_PINMUX('A', 11, ANALOG)>, /* OTG_FS_DM */
+				 <STM32_PINMUX('A', 12, ANALOG)>; /* OTG_FS_DP */
+		};
+	};
 };
 
 &pinctrl_z {
diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi
index 8f9535a4db..1279589a56 100644
--- a/arch/arm/dts/stm32mp15-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15-u-boot.dtsi
@@ -36,6 +36,31 @@
 
 	soc {
 		u-boot,dm-pre-reloc;
+
+		ddr: ddr@5a003000 {
+			u-boot,dm-pre-reloc;
+
+			compatible = "st,stm32mp1-ddr";
+
+			reg = <0x5A003000 0x550
+			       0x5A004000 0x234>;
+
+			clocks = <&rcc AXIDCG>,
+				 <&rcc DDRC1>,
+				 <&rcc DDRC2>,
+				 <&rcc DDRPHYC>,
+				 <&rcc DDRCAPB>,
+				 <&rcc DDRPHYCAPB>;
+
+			clock-names = "axidcg",
+				      "ddrc1",
+				      "ddrc2",
+				      "ddrphyc",
+				      "ddrcapb",
+				      "ddrphycapb";
+
+			status = "okay";
+		};
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi
index f185639a46..75d2c0d296 100644
--- a/arch/arm/dts/stm32mp151.dtsi
+++ b/arch/arm/dts/stm32mp151.dtsi
@@ -17,6 +17,7 @@
 
 		cpu0: cpu@0 {
 			compatible = "arm,cortex-a7";
+			clock-frequency = <650000000>;
 			device_type = "cpu";
 			reg = <0>;
 		};
@@ -490,6 +491,7 @@
 			resets = <&rcc I2C1_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
@@ -503,6 +505,7 @@
 			resets = <&rcc I2C2_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
@@ -516,6 +519,7 @@
 			resets = <&rcc I2C3_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
@@ -529,6 +533,7 @@
 			resets = <&rcc I2C5_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
@@ -966,6 +971,7 @@
 				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&rcc DMA1>;
+			resets = <&rcc DMA1_R>;
 			#dma-cells = <4>;
 			st,mem2mem;
 			dma-requests = <8>;
@@ -983,6 +989,7 @@
 				     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&rcc DMA2>;
+			resets = <&rcc DMA2_R>;
 			#dma-cells = <4>;
 			st,mem2mem;
 			dma-requests = <8>;
@@ -996,6 +1003,7 @@
 			dma-masters = <&dma1 &dma2>;
 			dma-channels = <16>;
 			clocks = <&rcc DMAMUX>;
+			resets = <&rcc DMAMUX_R>;
 		};
 
 		adc: adc@48003000 {
@@ -1051,7 +1059,7 @@
 		};
 
 		usbotg_hs: usb-otg@49000000 {
-			compatible = "snps,dwc2";
+			compatible = "st,stm32mp15-hsotg", "snps,dwc2";
 			reg = <0x49000000 0x10000>;
 			clocks = <&rcc USBO_K>;
 			clock-names = "otg";
@@ -1296,6 +1304,7 @@
 			reg = <0x58000000 0x1000>;
 			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&rcc MDMA>;
+			resets = <&rcc MDMA_R>;
 			#dma-cells = <5>;
 			dma-channels = <32>;
 			dma-requests = <48>;
@@ -1495,6 +1504,7 @@
 			resets = <&rcc I2C4_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
@@ -1530,6 +1540,7 @@
 			resets = <&rcc I2C6_R>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			wakeup-source;
 			status = "disabled";
 		};
 
diff --git a/arch/arm/dts/stm32mp153.dtsi b/arch/arm/dts/stm32mp153.dtsi
index 2d759fc601..6d9ab08667 100644
--- a/arch/arm/dts/stm32mp153.dtsi
+++ b/arch/arm/dts/stm32mp153.dtsi
@@ -10,6 +10,7 @@
 	cpus {
 		cpu1: cpu@1 {
 			compatible = "arm,cortex-a7";
+			clock-frequency = <650000000>;
 			device_type = "cpu";
 			reg = <1>;
 		};
diff --git a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
index 5844d41c53..c52abeb1e7 100644
--- a/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi
@@ -27,10 +27,6 @@
 			default-state = "off";
 			status = "okay";
 		};
-
-		blue {
-			default-state = "on";
-		};
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index ed2f024be9..84af7fa47b 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -28,10 +28,6 @@
 			default-state = "off";
 			status = "okay";
 		};
-
-		blue {
-			default-state = "on";
-		};
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts
index 54af7c97b3..4fb71100f5 100644
--- a/arch/arm/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/dts/stm32mp157c-ed1.dts
@@ -70,6 +70,11 @@
 			reg = <0xe8000000 0x8000000>;
 			no-map;
 		};
+
+		optee@fe000000 {
+			reg = <0xfe000000 0x02000000>;
+			no-map;
+		};
 	};
 
 	aliases {
@@ -130,10 +135,12 @@
 };
 
 &i2c4 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&i2c4_pins_a>;
+	pinctrl-1 = <&i2c4_pins_sleep_a>;
 	i2c-scl-rising-time-ns = <185>;
 	i2c-scl-falling-time-ns = <20>;
+	clock-frequency = <400000>;
 	status = "okay";
 	/* spare dmas for other usage */
 	/delete-property/dmas;
@@ -218,8 +225,6 @@
 
 			vdd_usb: ldo4 {
 				regulator-name = "vdd_usb";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
 				interrupts = <IT_CURLIM_LDO4 0>;
 			};
 
@@ -241,7 +246,6 @@
 			vref_ddr: vref_ddr {
 				regulator-name = "vref_ddr";
 				regulator-always-on;
-				regulator-over-current-protection;
 			};
 
 			bst_out: boost {
@@ -313,7 +317,8 @@
 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
 	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
-	broken-cd;
+	cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	disable-wp;
 	st,sig-dir;
 	st,neg-edge;
 	st,use-ckin;
@@ -334,7 +339,7 @@
 	st,neg-edge;
 	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
-	vqmmc-supply = <&v3v3>;
+	vqmmc-supply = <&vdd>;
 	mmc-ddr-3_3v;
 	status = "okay";
 };
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
index 228e35e168..8a4c7ff31a 100644
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -174,8 +174,9 @@
 };
 
 &i2c2 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&i2c2_pins_a>;
+	pinctrl-1 = <&i2c2_pins_sleep_a>;
 	i2c-scl-rising-time-ns = <185>;
 	i2c-scl-falling-time-ns = <20>;
 	status = "okay";
@@ -210,7 +211,7 @@
 		interrupt-parent = <&gpioi>;
 		vdd-supply = <&v3v3>;
 
-		stmfx_pinctrl: stmfx-pin-controller {
+		stmfx_pinctrl: pinctrl {
 			compatible = "st,stmfx-0300-pinctrl";
 			gpio-controller;
 			#gpio-cells = <2>;
@@ -218,7 +219,7 @@
 			#interrupt-cells = <2>;
 			gpio-ranges = <&stmfx_pinctrl 0 0 24>;
 
-			joystick_pins: joystick {
+			joystick_pins: joystick-pins {
 				pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
 				bias-pull-down;
 			};
@@ -227,8 +228,9 @@
 };
 
 &i2c5 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&i2c5_pins_a>;
+	pinctrl-1 = <&i2c5_pins_sleep_a>;
 	i2c-scl-rising-time-ns = <185>;
 	i2c-scl-falling-time-ns = <20>;
 	status = "okay";
@@ -353,7 +355,8 @@
 };
 
 &usbotg_hs {
-	dr_mode = "peripheral";
+	pinctrl-0 = <&usbotg_hs_pins_a>;
+	pinctrl-names = "default";
 	phys = <&usbphyc_port1 0>;
 	phy-names = "usb2-phy";
 	status = "okay";
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index b57f3d520c..75d75266e8 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -5,7 +5,9 @@
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
 #include "stm32mp15-u-boot.dtsi"
-#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
 
 / {
 	aliases {
@@ -23,6 +25,8 @@
 		u-boot,error-led = "error";
 		st,fastboot-gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
 		st,stm32prog-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
+		dh,som-coding-gpios = <&gpiof 12 0>, <&gpiof 13 0>, <&gpiof 15 0>;
+		dh,ddr3-coding-gpios = <&gpioz 6 0>, <&gpioz 7 0>;
 	};
 
 	led {
@@ -45,6 +49,15 @@
 	};
 };
 
+&gpiof {
+	snor-nwp {
+		gpio-hog;
+		gpios = <7 0>;
+		output-high;
+		line-name = "spi-nor-nwp";
+	};
+};
+
 &i2c4 {
 	u-boot,dm-pre-reloc;
 };
diff --git a/arch/arm/dts/stm32mp15xx-dhcom.dtsi b/arch/arm/dts/stm32mp15xx-dhcom.dtsi
index d8a255b9c6..b3f4cb4515 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom.dtsi
@@ -269,7 +269,8 @@
 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
 	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
-	broken-cd;
+	cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	disable-wp;
 	st,sig-dir;
 	st,neg-edge;
 	st,use-ckin;
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
index 3f82f20705..cb92fc9c14 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96-u-boot.dtsi
@@ -15,6 +15,7 @@
 	config {
 		u-boot,boot-led = "led1";
 		u-boot,error-led = "led4";
+		dh,board-coding-gpios = <&gpiog 13 0>, <&gpiod 9 0>;
 	};
 };
 
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
index a600677563..c1cc80bcf5 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
+++ b/arch/arm/dts/stm32mp15xx-dhcor-avenger96.dts
@@ -7,7 +7,7 @@
 
 /dts-v1/;
 
-#include "stm32mp15xx-dhcor.dtsi"
+#include "stm32mp15xx-dhcor-io1v8.dtsi"
 #include "stm32mp15xx-dhcor-avenger96-u-boot.dtsi"
 
 / {
@@ -107,7 +107,7 @@
 	};
 };
 
-&i2c1 {
+&i2c1 {	/* X6 I2C1 */
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c1_pins_b>;
 	i2c-scl-rising-time-ns = <185>;
@@ -117,9 +117,9 @@
 	/delete-property/dma-names;
 };
 
-&i2c2 {
+&i2c2 {	/* X6 I2C2 */
 	pinctrl-names = "default";
-	pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>;
+	pinctrl-0 = <&i2c2_pins_c>;
 	i2c-scl-rising-time-ns = <185>;
 	i2c-scl-falling-time-ns = <20>;
 	status = "okay";
@@ -144,7 +144,6 @@
 	st,sig-dir;
 	st,neg-edge;
 	st,use-ckin;
-	sd-uhs-sdr104;
 	bus-width = <4>;
 	vmmc-supply = <&vdd_sd>;
 	vqmmc-supply = <&sd_switch>;
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
new file mode 100644
index 0000000000..75435424d6
--- /dev/null
+++ b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp15xx-dhcor-io3v3.dtsi"
+
+/ {
+	/* Enpirion EP3A8LQI U2 on the 1V8 IO DHCOR */
+	vdd_io: regulator-buck-io {
+		compatible = "regulator-fixed";
+		regulator-name = "buck-io";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+		regulator-boot-on;
+		vin-supply = <&vdd>;
+	};
+};
+
+&pwr_regulators {
+	vdd-supply = <&vdd_io>;
+	vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-io3v3.dtsi
index 97d370e119..64299df816 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-io3v3.dtsi
@@ -21,17 +21,6 @@
 		device_type = "memory";
 		reg = <0xc0000000 0x40000000>;
 	};
-
-	/* Enpirion EP3A8LQI U2 on the DHCOR */
-	vdd_io: regulator-buck-io {
-		compatible = "regulator-fixed";
-		regulator-name = "buck-io";
-		regulator-min-microvolt = <1800000>;
-		regulator-max-microvolt = <1800000>;
-		regulator-always-on;
-		regulator-boot-on;
-		vin-supply = <&vdd>;
-	};
 };
 
 &i2c4 {
@@ -51,10 +40,6 @@
 		#interrupt-cells = <2>;
 		status = "okay";
 
-		st,main-control-register = <0x04>;
-		st,vin-control-register = <0xc0>;
-		st,usb-control-register = <0x30>;
-
 		regulators {
 			compatible = "st,stpmic1-regulators";
 
@@ -89,7 +74,6 @@
 				regulator-min-microvolt = <2900000>;
 				regulator-max-microvolt = <2900000>;
 				regulator-always-on;
-				st,mask_reset;
 				regulator-initial-mode = <0>;
 				regulator-over-current-protection;
 			};
@@ -129,8 +113,6 @@
 
 			vdd_usb: ldo4 {
 				regulator-name = "vdd_usb";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
 				interrupts = <IT_CURLIM_LDO4 0>;
 				interrupt-parent = <&pmic>;
 			};
@@ -156,7 +138,6 @@
 			vref_ddr: vref_ddr {
 				regulator-name = "vref_ddr";
 				regulator-always-on;
-				regulator-over-current-protection;
 			};
 
 			bst_out: boost {
@@ -200,7 +181,7 @@
 };
 
 &pwr_regulators {
-	vdd-supply = <&vdd_io>;
+	vdd-supply = <&vdd>;
 	vdd_3v3_usbfs-supply = <&vdd_usb>;
 };
 
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 5de7b87b9a..bd4c2adc35 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -9,7 +9,26 @@
 
 #include <dt-bindings/clock/stm32mp1-clksrc.h>
 #include "stm32mp15-u-boot.dtsi"
-#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x1Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x2Gb-1066-binG.dtsi"
+#include "stm32mp15-ddr3-dhsom-2x4Gb-1066-binG.dtsi"
+
+/ {
+	u-boot,dm-pre-reloc;
+	config {
+		dh,ddr3-coding-gpios = <&gpiog 0 0>, <&gpiog 1 0>;
+		dh,som-coding-gpios = <&gpioz 7 0>, <&gpiof 3 0>;
+	};
+};
+
+&gpiof {
+	snor-nwp {
+		gpio-hog;
+		gpios = <7 0>;
+		output-high;
+		line-name = "spi-nor-nwp";
+	};
+};
 
 &i2c4 {
 	u-boot,dm-pre-reloc;
diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi
index 42d3f0cb2d..812e370ee4 100644
--- a/arch/arm/dts/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi
@@ -58,6 +58,11 @@
 			reg = <0xd4000000 0x4000000>;
 			no-map;
 		};
+
+		optee@de000000 {
+			reg = <0xde000000 0x02000000>;
+			no-map;
+		};
 	};
 
 	led {
@@ -216,10 +221,12 @@
 };
 
 &i2c4 {
-	pinctrl-names = "default";
+	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&i2c4_pins_a>;
+	pinctrl-1 = <&i2c4_pins_sleep_a>;
 	i2c-scl-rising-time-ns = <185>;
 	i2c-scl-falling-time-ns = <20>;
+	clock-frequency = <400000>;
 	status = "okay";
 	/* spare dmas for other usage */
 	/delete-property/dmas;
@@ -322,8 +329,6 @@
 
 			vdd_usb: ldo4 {
 				regulator-name = "vdd_usb";
-				regulator-min-microvolt = <3300000>;
-				regulator-max-microvolt = <3300000>;
 				interrupts = <IT_CURLIM_LDO4 0>;
 			};
 
@@ -346,7 +351,6 @@
 			vref_ddr: vref_ddr {
 				regulator-name = "vref_ddr";
 				regulator-always-on;
-				regulator-over-current-protection;
 			};
 
 			 bst_out: boost {
@@ -497,7 +501,8 @@
 	pinctrl-0 = <&sdmmc1_b4_pins_a>;
 	pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
 	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
-	broken-cd;
+	cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+	disable-wp;
 	st,neg-edge;
 	bus-width = <4>;
 	vmmc-supply = <&v3v3>;
diff --git a/arch/arm/dts/ulcb.dtsi b/arch/arm/dts/ulcb.dtsi
index e70e1bac2b..ff88af8e39 100644
--- a/arch/arm/dts/ulcb.dtsi
+++ b/arch/arm/dts/ulcb.dtsi
@@ -26,7 +26,7 @@
 	};
 
 	chosen {
-		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
+		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
 		stdout-path = "serial0:115200n8";
 	};
 
@@ -120,8 +120,7 @@
 
 		gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 		gpios-states = <1>;
-		states = <3300000 1
-			  1800000 0>;
+		states = <3300000 1>, <1800000 0>;
 	};
 
 	x12_clk: x12 {
@@ -428,6 +427,11 @@
 	};
 };
 
+&rwdt {
+	timeout-sec = <60>;
+	status = "okay";
+};
+
 &scif2 {
 	pinctrl-0 = <&scif2_pins>;
 	pinctrl-names = "default";
@@ -478,8 +482,3 @@
 
 	status = "okay";
 };
-
-&rwdt {
-	timeout-sec = <60>;
-	status = "okay";
-};
diff --git a/arch/arm/dts/zynq-cse-nand.dts b/arch/arm/dts/zynq-cse-nand.dts
index 1e16d7fab9..32cb3bffcb 100644
--- a/arch/arm/dts/zynq-cse-nand.dts
+++ b/arch/arm/dts/zynq-cse-nand.dts
@@ -38,6 +38,21 @@
 		#size-cells = <1>;
 		ranges;
 
+		smcc: memory-controller@e000e000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			clock-names = "memclk", "apb_pclk";
+			clocks = <&clkc 11>, <&clkc 44>;
+			compatible = "arm,pl353-smc-r2p1", "arm,primecell";
+			ranges;
+			reg = <0xe000e000 0x1000>;
+
+			nand0: flash@e1000000 {
+				compatible = "arm,pl353-nand-r2p1";
+				reg = <0xe1000000 0x1000000>;
+			};
+		};
+
 		slcr: slcr@f8000000 {
 			u-boot,dm-pre-reloc;
 			#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
index 39b5d7fff9..bf982e2218 100644
--- a/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-e-a2197-00-revA.dts
@@ -162,9 +162,9 @@
 		  "", "", "", "", "", /* 65 - 69 */
 		  "", "", "", "", "", /* 70 - 74 */
 		  "", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
-		  "", "", /* 78 - 79 */
-		  "", "", "", "", "", /* 80 - 84 */
-		  "", "", "", "", "", /* 85 -89 */
+		  "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
+		  "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "", "", /* 80 - 84 */
+		  "", "", "", "", "", /* 85 - 89 */
 		  "", "", "", "", "", /* 90 - 94 */
 		  "", "", "", "", "", /* 95 - 99 */
 		  "", "", "", "", "", /* 100 - 104 */
@@ -198,9 +198,6 @@
 			#size-cells = <0>;
 			reg = <0>;
 			/* u152 IR35215 0x16/0x46 vcc_soc */
-			/* u160 IRPS5401 0x17/0x47 */
-			/* u167 IRPS5401 0x1c/0x4c */
-			/* u175 IRPS5401 0x1d/0x4d */
 			/* u179 ir38164 0x19/0x49 vcco_500 */
 			/* u181 ir38164 0x1a/0x4a vcco_501 */
 			/* u183 ir38164 0x1b/0x4b vcco_502 */
@@ -209,6 +206,19 @@
 			/* u189 ir38164 0x20/0x50 mgtyavtt */
 			/* u194 ir38164 0x13/0x43 vdd1_1v8_lp4 */
 			/* u195 ir38164 0x14/0x44 vdd2_1v8_lp4 */
+
+			irps5401_47: irps5401@47 { /* IRPS5401 - u160 */
+				compatible = "infineon,irps5401";
+				reg = <0x47>; /* pmbus / i2c 0x17 */
+			};
+			irps5401_4c: irps5401@4c { /* IRPS5401 - u167 */
+				compatible = "infineon,irps5401";
+				reg = <0x4c>; /* pmbus / i2c 0x1c */
+			};
+			irps5401_4d: irps5401@4d { /* IRPS5401 - u175 */
+				compatible = "infineon,irps5401";
+				reg = <0x4d>; /* pmbus / i2c 0x1d */
+			};
 		};
 		i2c@1 { /* PMBUS1_INA226 */
 			#address-cells = <1>;
diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts
index 3ceb39dce0..a4bd6b800a 100644
--- a/arch/arm/dts/zynqmp-zcu104-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revA.dts
@@ -147,15 +147,13 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
-				#clock-cells = <0>;
+			irps5401_43: irps5401@43 { /* IRPS5401 - u175 */
 				compatible = "infineon,irps5401";
-				reg = <0x43>;
+				reg = <0x43>; /* pmbus / i2c 0x13 */
 			};
-			irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
-				#clock-cells = <0>;
+			irps5401_44: irps5401@44 { /* IRPS5401 - u180 */
 				compatible = "infineon,irps5401";
-				reg = <0x4d>;
+				reg = <0x44>; /* pmbus / i2c 0x14 */
 			};
 		};
 
diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts
index 7dad4523de..d4b3769a27 100644
--- a/arch/arm/dts/zynqmp-zcu104-revC.dts
+++ b/arch/arm/dts/zynqmp-zcu104-revC.dts
@@ -172,15 +172,13 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			irps5401_43: irps54012@43 { /* IRPS5401 - u175 */
-				#clock-cells = <0>;
+			irps5401_43: irps5401@43 { /* IRPS5401 - u175 */
 				compatible = "infineon,irps5401";
-				reg = <0x43>;
+				reg = <0x43>; /* pmbus / i2c 0x13 */
 			};
-			irps5401_4d: irps54012@4d { /* IRPS5401 - u180 */
-				#clock-cells = <0>;
+			irps5401_44: irps5401@44 { /* IRPS5401 - u180 */
 				compatible = "infineon,irps5401";
-				reg = <0x4d>;
+				reg = <0x44>; /* pmbus / i2c 0x14 */
 			};
 		};
 
diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts
index d16bf8ac7a..63e285fe9a 100644
--- a/arch/arm/dts/zynqmp-zcu111-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu111-revA.dts
@@ -327,18 +327,15 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
-				#clock-cells = <0>;
+			irps5401_43: irps5401@43 { /* IRPS5401 - u53 check these */
 				compatible = "infineon,irps5401";
 				reg = <0x43>;
 			};
-			irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
-				#clock-cells = <0>;
+			irps5401_44: irps5401@44 { /* IRPS5401 - u55 */
 				compatible = "infineon,irps5401";
 				reg = <0x44>;
 			};
-			irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
-				#clock-cells = <0>;
+			irps5401_45: irps5401@45 { /* IRPS5401 - u57 */
 				compatible = "infineon,irps5401";
 				reg = <0x45>;
 			};
diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts
index 75ecd7a5c2..118a2de96b 100644
--- a/arch/arm/dts/zynqmp-zcu208-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu208-revA.dts
@@ -351,13 +351,11 @@
 			/* u112 - ir38164 0x13/0x43 */
 			/* u123 - ir38164 0x1c/0x4c */
 
-			irps5401_44: irps54012@44 { /* IRPS5401 - u53 */
-				#clock-cells = <0>;
+			irps5401_44: irps5401@44 { /* IRPS5401 - u53 */
 				compatible = "infineon,irps5401";
 				reg = <0x44>; /* i2c addr 0x14 */
 			};
-			irps5401_45: irps54012@45 { /* IRPS5401 - u55 */
-				#clock-cells = <0>;
+			irps5401_45: irps5401@45 { /* IRPS5401 - u55 */
 				compatible = "infineon,irps5401";
 				reg = <0x45>; /* i2c addr 0x15 */
 			};
diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts
index f3b5edfeb4..e454bfcba7 100644
--- a/arch/arm/dts/zynqmp-zcu216-revA.dts
+++ b/arch/arm/dts/zynqmp-zcu216-revA.dts
@@ -355,13 +355,11 @@
 			/* u112 - ir38164 0x13/0x43 */
 			/* u123 - ir38164 0x1c/0x4c */
 
-			irps5401_44: irps54012@44 { /* IRPS5401 - u53 */
-				#clock-cells = <0>;
+			irps5401_44: irps5401@44 { /* IRPS5401 - u53 */
 				compatible = "infineon,irps5401";
 				reg = <0x44>; /* i2c addr 0x14 */
 			};
-			irps5401_45: irps54012@45 { /* IRPS5401 - u55 */
-				#clock-cells = <0>;
+			irps5401_45: irps5401@45 { /* IRPS5401 - u55 */
 				compatible = "infineon,irps5401";
 				reg = <0x45>; /* i2c addr 0x15 */
 			};
diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
index 6579cc0c5d..7bcafba6f0 100644
--- a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
+++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
@@ -10,8 +10,6 @@
 #ifndef __CLK_SYNTHESIZER_H
 #define __CLK_SYNTHESIZER_H
 
-#include <common.h>
-
 #define CLK_SYNTHESIZER_ID_REG		0x0
 #define CLK_SYNTHESIZER_XCSEL		0x05
 #define CLK_SYNTHESIZER_MUX_REG		0x14
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h
index 9b819b0a1c..79081de700 100644
--- a/arch/arm/include/asm/arch-am33xx/cpu.h
+++ b/arch/arm/include/asm/arch-am33xx/cpu.h
@@ -12,6 +12,7 @@
 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
 
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
index 64809d5deb..0b73ebdbb4 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_am43xx.h
@@ -10,6 +10,10 @@
 #ifndef __AM43XX_HARDWARE_AM43XX_H
 #define __AM43XX_HARDWARE_AM43XX_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Module base addresses */
 
 /* L3 Fast Configuration Bandwidth Limiter Base Address */
diff --git a/arch/arm/include/asm/arch-am33xx/mux.h b/arch/arm/include/asm/arch-am33xx/mux.h
index d8bf87258b..b16b184733 100644
--- a/arch/arm/include/asm/arch-am33xx/mux.h
+++ b/arch/arm/include/asm/arch-am33xx/mux.h
@@ -16,7 +16,6 @@
 #ifndef _MUX_H_
 #define _MUX_H_
 
-#include <common.h>
 #include <asm/io.h>
 
 #ifdef CONFIG_AM33XX
diff --git a/arch/arm/include/asm/arch-am33xx/mux_am33xx.h b/arch/arm/include/asm/arch-am33xx/mux_am33xx.h
index d5cab3e083..26bd4b46ff 100644
--- a/arch/arm/include/asm/arch-am33xx/mux_am33xx.h
+++ b/arch/arm/include/asm/arch-am33xx/mux_am33xx.h
@@ -16,7 +16,6 @@
 #ifndef _MUX_AM33XX_H_
 #define _MUX_AM33XX_H_
 
-#include <common.h>
 #include <asm/io.h>
 
 #define MUX_CFG(value, offset)	\
diff --git a/arch/arm/include/asm/arch-am33xx/mux_am43xx.h b/arch/arm/include/asm/arch-am33xx/mux_am43xx.h
index 256c5e243f..f74ae74ff1 100644
--- a/arch/arm/include/asm/arch-am33xx/mux_am43xx.h
+++ b/arch/arm/include/asm/arch-am33xx/mux_am43xx.h
@@ -8,7 +8,6 @@
 #ifndef _MUX_AM43XX_H_
 #define _MUX_AM43XX_H_
 
-#include <common.h>
 #include <asm/io.h>
 
 #define MUX_CFG(value, offset)	\
diff --git a/arch/arm/include/asm/arch-am33xx/mux_ti816x.h b/arch/arm/include/asm/arch-am33xx/mux_ti816x.h
index e4e5a48ad6..a6a8a988a0 100644
--- a/arch/arm/include/asm/arch-am33xx/mux_ti816x.h
+++ b/arch/arm/include/asm/arch-am33xx/mux_ti816x.h
@@ -17,7 +17,6 @@
 #ifndef _MUX_TI816X_H_
 #define _MUX_TI816X_H_
 
-#include <common.h>
 #include <asm/io.h>
 
 #define MUX_CFG(value, offset)  \
diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h
index 9eafe43fba..bf05cb3a72 100644
--- a/arch/arm/include/asm/arch-bcmcygnus/configs.h
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -21,7 +21,6 @@
 #define CONFIG_SYS_NS16550_COM3		0x18023000
 
 /* Ethernet */
-#define CONFIG_PHY_BROADCOM
 #define CONFIG_PHY_RESET_DELAY 10000 /* PHY reset delay in us*/
 
 #endif /* __ARCH_CONFIGS_H */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/clock.h b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
index 95d6156476..d561691437 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/clock.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/clock.h
@@ -8,8 +8,6 @@
 #ifndef __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
 #define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_
 
-#include <common.h>
-
 enum mxc_clock {
 	MXC_ARM_CLK = 0,
 	MXC_BUS_CLK,
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index ddd9390df4..e13f4d83e6 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -10,6 +10,10 @@
 #include <linux/kconfig.h>
 #include <fsl_ddrc_version.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define CONFIG_STANDALONE_LOAD_ADDR	0x80300000
 
 /*
@@ -306,7 +310,6 @@
 #define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_QSPI_BE
 #define CONFIG_SYS_FSL_CCSR_GUR_BE
 #define CONFIG_SYS_FSL_PEX_LUT_BE
 
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index 862ec2e2f1..c9be0768e3 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -7,6 +7,9 @@
 #define __ARCH_FSL_LSCH2_IMMAP_H__
 
 #include <fsl_immap.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CONFIG_SYS_IMMR				0x01000000
 #define CONFIG_SYS_DCSRBAR			0x20000000
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
index c2fbc23b11..baa9fa8529 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
@@ -589,5 +589,5 @@ struct ccsr_serdes {
 	u8 res5[0x19fc - 0xa00];
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 #endif /* __ARCH_FSL_LSCH3_IMMAP_H_ */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index c62d414aac..020548ac6c 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -158,6 +158,10 @@ void erratum_a010315(void);
 
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
+
+#ifdef CONFIG_GIC_V3_ITS
+int ls_gic_rd_tables_init(void *blob);
+#endif
 #endif
 
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
diff --git a/arch/arm/include/asm/arch-hi3660/hi3660.h b/arch/arm/include/asm/arch-hi3660/hi3660.h
index 3ca0951543..882262d13c 100644
--- a/arch/arm/include/asm/arch-hi3660/hi3660.h
+++ b/arch/arm/include/asm/arch-hi3660/hi3660.h
@@ -7,6 +7,10 @@
 #ifndef __HI3660_H__
 #define __HI3660_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define HI3660_UART6_BASE			0xfff32000
 
 #define PMU_REG_BASE                            0xfff34000
diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h
index 5ade63665a..e9c0078922 100644
--- a/arch/arm/include/asm/arch-imx/cpu.h
+++ b/arch/arm/include/asm/arch-imx/cpu.h
@@ -26,6 +26,8 @@
 #define MXC_CPU_MX7S		0x71 /* dummy ID */
 #define MXC_CPU_MX7D		0x72
 #define MXC_CPU_IMX8MQ		0x82
+#define MXC_CPU_IMX8MD		0x83 /* dummy ID */
+#define MXC_CPU_IMX8MQL     0x84 /* dummy ID */
 #define MXC_CPU_IMX8MM		0x85 /* dummy ID */
 #define MXC_CPU_IMX8MML		0x86 /* dummy ID */
 #define MXC_CPU_IMX8MMD		0x87 /* dummy ID */
@@ -33,6 +35,11 @@
 #define MXC_CPU_IMX8MMS		0x89 /* dummy ID */
 #define MXC_CPU_IMX8MMSL	0x8a /* dummy ID */
 #define MXC_CPU_IMX8MN		0x8b /* dummy ID */
+#define MXC_CPU_IMX8MND		0x8c /* dummy ID */
+#define MXC_CPU_IMX8MNS		0x8d /* dummy ID */
+#define MXC_CPU_IMX8MNL		0x8e /* dummy ID */
+#define MXC_CPU_IMX8MNDL		0x8f /* dummy ID */
+#define MXC_CPU_IMX8MNSL		0x181 /* dummy ID */
 #define MXC_CPU_IMX8MP		0x182/* dummy ID */
 #define MXC_CPU_IMX8QXP_A0	0x90 /* dummy ID */
 #define MXC_CPU_IMX8QM		0x91 /* dummy ID */
@@ -57,6 +64,7 @@
 
 #define CHIP_REV_A		0x0
 #define CHIP_REV_B		0x1
+#define CHIP_REV_C		0x2
 
 #define BOARD_REV_1_0           0x0
 #define BOARD_REV_2_0           0x1
diff --git a/arch/arm/include/asm/arch-imx8/iomux.h b/arch/arm/include/asm/arch-imx8/iomux.h
index bedd01bfd8..3acef1ea6b 100644
--- a/arch/arm/include/asm/arch-imx8/iomux.h
+++ b/arch/arm/include/asm/arch-imx8/iomux.h
@@ -6,6 +6,10 @@
 #ifndef __ASM_ARCH_IMX8_IOMUX_H__
 #define __ASM_ARCH_IMX8_IOMUX_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * We use 64bits value for iomux settings.
  * High 32bits are used for padring register value,
diff --git a/arch/arm/include/asm/arch-imx8/sci/rpc.h b/arch/arm/include/asm/arch-imx8/sci/rpc.h
index 8e1e9bbf43..c1a9c353ba 100644
--- a/arch/arm/include/asm/arch-imx8/sci/rpc.h
+++ b/arch/arm/include/asm/arch-imx8/sci/rpc.h
@@ -8,6 +8,11 @@
 #define SC_RPC_H
 
 /* Note: Check SCFW API Released DOC before you want to modify something */
+/* Defines */
+
+#define SCFW_API_VERSION_MAJOR  1U
+#define SCFW_API_VERSION_MINOR  15U
+
 #define SC_RPC_VERSION          1U
 
 #define SC_RPC_MAX_MSG          8U
@@ -17,9 +22,13 @@
 #define RPC_SVC(MSG)            ((MSG)->svc)
 #define RPC_FUNC(MSG)           ((MSG)->func)
 #define RPC_R8(MSG)             ((MSG)->func)
+#define RPC_I64(MSG, IDX)       ((s64)(RPC_U32((MSG), (IDX))) << 32ULL) | \
+				  (s64)(RPC_U32((MSG), (IDX) + 4U))
 #define RPC_I32(MSG, IDX)       ((MSG)->DATA.i32[(IDX) / 4U])
 #define RPC_I16(MSG, IDX)       ((MSG)->DATA.i16[(IDX) / 2U])
 #define RPC_I8(MSG, IDX)        ((MSG)->DATA.i8[(IDX)])
+#define RPC_U64(MSG, IDX)       ((u64)(RPC_U32((MSG), (IDX))) << 32ULL) | \
+				  (u64)(RPC_U32((MSG), (IDX) + 4U))
 #define RPC_U32(MSG, IDX)       ((MSG)->DATA.u32[(IDX) / 4U])
 #define RPC_U16(MSG, IDX)       ((MSG)->DATA.u16[(IDX) / 2U])
 #define RPC_U8(MSG, IDX)        ((MSG)->DATA.u8[(IDX)])
@@ -76,6 +85,8 @@ struct sc_rpc_msg_s {
 #define PM_FUNC_REBOOT				9U
 #define PM_FUNC_REBOOT_PARTITION		12U
 #define PM_FUNC_CPU_START			11U
+#define PM_FUNC_CPU_RESET			23U
+#define PM_FUNC_RESOURCE_RESET			29U
 #define PM_FUNC_IS_PARTITION_STARTED 24U
 
 /* MISC RPC */
@@ -160,26 +171,59 @@ struct sc_rpc_msg_s {
 #define RM_FUNC_DUMP				27U
 
 /* SECO RPC */
-#define SECO_FUNC_UNKNOWN			0
-#define SECO_FUNC_IMAGE_LOAD			1U
-#define SECO_FUNC_AUTHENTICATE			2U
-#define SECO_FUNC_FORWARD_LIFECYCLE		3U
-#define SECO_FUNC_RETURN_LIFECYCLE		4U
-#define SECO_FUNC_COMMIT			5U
-#define SECO_FUNC_ATTEST_MODE			6U
-#define SECO_FUNC_ATTEST			7U
-#define SECO_FUNC_GET_ATTEST_PKEY		8U
-#define SECO_FUNC_GET_ATTEST_SIGN		9U
-#define SECO_FUNC_ATTEST_VERIFY			10U
-#define SECO_FUNC_GEN_KEY_BLOB			11U
-#define SECO_FUNC_LOAD_KEY			12U
-#define SECO_FUNC_GET_MP_KEY			13U
-#define SECO_FUNC_UPDATE_MPMR			14U
-#define SECO_FUNC_GET_MP_SIGN			15U
-#define SECO_FUNC_BUILD_INFO			16U
-#define SECO_FUNC_CHIP_INFO			17U
-#define SECO_FUNC_ENABLE_DEBUG			18U
-#define SECO_FUNC_GET_EVENT			19U
-#define SECO_FUNC_FUSE_WRITE			20U
+#define SECO_FUNC_UNKNOWN 0 /* Unknown function */
+#define SECO_FUNC_IMAGE_LOAD 1U /* Index for seco_image_load() RPC call */
+#define SECO_FUNC_AUTHENTICATE 2U /* Index for seco_authenticate() RPC call */
+#define SECO_FUNC_ENH_AUTHENTICATE 24U /* Index for sc_seco_enh_authenticate() RPC call */
+#define SECO_FUNC_FORWARD_LIFECYCLE 3U /* Index for seco_forward_lifecycle() RPC call */
+#define SECO_FUNC_RETURN_LIFECYCLE 4U /* Index for seco_return_lifecycle() RPC call */
+#define SECO_FUNC_COMMIT 5U /* Index for seco_commit() RPC call */
+#define SECO_FUNC_ATTEST_MODE 6U /* Index for seco_attest_mode() RPC call */
+#define SECO_FUNC_ATTEST 7U /* Index for seco_attest() RPC call */
+#define SECO_FUNC_GET_ATTEST_PKEY 8U /* Index for seco_get_attest_pkey() RPC call */
+#define SECO_FUNC_GET_ATTEST_SIGN 9U /* Index for seco_get_attest_sign() RPC call */
+#define SECO_FUNC_ATTEST_VERIFY 10U /* Index for seco_attest_verify() RPC call */
+#define SECO_FUNC_GEN_KEY_BLOB 11U /* Index for seco_gen_key_blob() RPC call */
+#define SECO_FUNC_LOAD_KEY 12U /* Index for seco_load_key() RPC call */
+#define SECO_FUNC_GET_MP_KEY 13U /* Index for seco_get_mp_key() RPC call */
+#define SECO_FUNC_UPDATE_MPMR 14U /* Index for seco_update_mpmr() RPC call */
+#define SECO_FUNC_GET_MP_SIGN 15U /* Index for seco_get_mp_sign() RPC call */
+#define SECO_FUNC_BUILD_INFO 16U /* Index for seco_build_info() RPC call */
+#define SECO_FUNC_CHIP_INFO 17U /* Index for seco_chip_info() RPC call */
+#define SECO_FUNC_ENABLE_DEBUG 18U /* Index for seco_enable_debug() RPC call */
+#define SECO_FUNC_GET_EVENT 19U /* Index for seco_get_event() RPC call */
+#define SECO_FUNC_FUSE_WRITE 20U /* Index for seco_fuse_write() RPC call */
+#define SECO_FUNC_PATCH 21U /* Index for sc_seco_patch() RPC call */
+#define SECO_FUNC_START_RNG 22U /* Index for sc_seco_start_rng() RPC call */
+#define SECO_FUNC_SAB_MSG 23U /* Index for sc_seco_sab_msg() RPC call */
+#define SECO_FUNC_SECVIO_ENABLE 25U /* Index for sc_seco_secvio_enable() RPC call */
+#define SECO_FUNC_SECVIO_CONFIG 26U /* Index for sc_seco_secvio_config() RPC call */
+#define SECO_FUNC_SECVIO_DGO_CONFIG 27U /* Index for sc_seco_secvio_dgo_config() RPC call */
+
+/* IRQ RPC */
+#define IRQ_FUNC_UNKNOWN 0 /* Unknown function */
+#define IRQ_FUNC_ENABLE 1U /* Index for sc_irq_enable() RPC call */
+#define IRQ_FUNC_STATUS 2U /* Index for sc_irq_status() RPC call */
+
+/* TIMER RPC */
+#define TIMER_FUNC_UNKNOWN 0 /* Unknown function */
+#define TIMER_FUNC_SET_WDOG_TIMEOUT 1U /* Index for sc_timer_set_wdog_timeout() RPC call */
+#define TIMER_FUNC_SET_WDOG_PRE_TIMEOUT 12U /* Index for sc_timer_set_wdog_pre_timeout() RPC call */
+#define TIMER_FUNC_START_WDOG 2U /* Index for sc_timer_start_wdog() RPC call */
+#define TIMER_FUNC_STOP_WDOG 3U /* Index for sc_timer_stop_wdog() RPC call */
+#define TIMER_FUNC_PING_WDOG 4U /* Index for sc_timer_ping_wdog() RPC call */
+#define TIMER_FUNC_GET_WDOG_STATUS 5U /* Index for sc_timer_get_wdog_status() RPC call */
+#define TIMER_FUNC_PT_GET_WDOG_STATUS 13U /* Index for sc_timer_pt_get_wdog_status() RPC call */
+#define TIMER_FUNC_SET_WDOG_ACTION 10U /* Index for sc_timer_set_wdog_action() RPC call */
+#define TIMER_FUNC_SET_RTC_TIME 6U /* Index for sc_timer_set_rtc_time() RPC call */
+#define TIMER_FUNC_GET_RTC_TIME 7U /* Index for sc_timer_get_rtc_time() RPC call */
+#define TIMER_FUNC_GET_RTC_SEC1970 9U /* Index for sc_timer_get_rtc_sec1970() RPC call */
+#define TIMER_FUNC_SET_RTC_ALARM 8U /* Index for sc_timer_set_rtc_alarm() RPC call */
+#define TIMER_FUNC_SET_RTC_PERIODIC_ALARM 14U /* Index for sc_timer_set_rtc_periodic_alarm() RPC call */
+#define TIMER_FUNC_CANCEL_RTC_ALARM 15U /* Index for sc_timer_cancel_rtc_alarm() RPC call */
+#define TIMER_FUNC_SET_RTC_CALB 11U /* Index for sc_timer_set_rtc_calb() RPC call */
+#define TIMER_FUNC_SET_SYSCTR_ALARM 16U /* Index for sc_timer_set_sysctr_alarm() RPC call */
+#define TIMER_FUNC_SET_SYSCTR_PERIODIC_ALARM 17U /* Index for sc_timer_set_sysctr_periodic_alarm() RPC call */
+#define TIMER_FUNC_CANCEL_SYSCTR_ALARM 18U /* Index for sc_timer_cancel_sysctr_alarm() RPC call */
 
 #endif /* SC_RPC_H */
diff --git a/arch/arm/include/asm/arch-imx8/sci/sci.h b/arch/arm/include/asm/arch-imx8/sci/sci.h
index 14ee6f999b..f91f7cc587 100644
--- a/arch/arm/include/asm/arch-imx8/sci/sci.h
+++ b/arch/arm/include/asm/arch-imx8/sci/sci.h
@@ -6,6 +6,7 @@
 #ifndef _SC_SCI_H
 #define _SC_SCI_H
 
+#include <log.h>
 #include <asm/arch/sci/types.h>
 #include <asm/arch/sci/svc/misc/api.h>
 #include <asm/arch/sci/svc/pad/api.h>
@@ -72,6 +73,7 @@ int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
 int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
 		    sc_faddr_t address);
 sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
+int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource);
 
 /* MISC API */
 int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
@@ -108,6 +110,7 @@ int sc_rm_get_resource_owner(sc_ipc_t ipc, sc_rsrc_t resource,
 
 /* PAD API */
 int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val);
+int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, uint32_t *val);
 
 /* SMMU API */
 int sc_rm_set_master_sid(sc_ipc_t ipc, sc_rsrc_t resource, sc_rm_sid_t sid);
@@ -122,5 +125,13 @@ void sc_seco_build_info(sc_ipc_t ipc, u32 *version, u32 *commit);
 int sc_seco_get_event(sc_ipc_t ipc, u8 idx, u32 *event);
 int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
 			 sc_faddr_t export_addr, u16 max_size);
+int sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr, u16 dst_size);
+int sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, u8 size, u8 lock);
+int sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
+			u16 msg_size, sc_faddr_t dst_addr, u16 dst_size);
+int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data);
+int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access,
+			  u32 *data0, u32 *data1, u32 *data2, u32 *data3,
+			  u32 *data4, u8 size);
 
 #endif
diff --git a/arch/arm/include/asm/arch-imx8/sci/svc/pad/api.h b/arch/arm/include/asm/arch-imx8/sci/svc/pad/api.h
index 905c56834e..df368e8c8b 100644
--- a/arch/arm/include/asm/arch-imx8/sci/svc/pad/api.h
+++ b/arch/arm/include/asm/arch-imx8/sci/svc/pad/api.h
@@ -6,6 +6,9 @@
 #ifndef SC_PAD_API_H
 #define SC_PAD_API_H
 
+/* Defines for type widths */
+#define SC_PAD_MUX_W            3U    /* Width of mux parameter */
+
 /* Defines for sc_pad_config_t */
 #define SC_PAD_CONFIG_NORMAL	0U	/* Normal */
 #define SC_PAD_CONFIG_OD	1U	/* Open Drain */
diff --git a/arch/arm/include/asm/arch-imx8/sci/types.h b/arch/arm/include/asm/arch-imx8/sci/types.h
index 9eadc88592..adfed13e33 100644
--- a/arch/arm/include/asm/arch-imx8/sci/types.h
+++ b/arch/arm/include/asm/arch-imx8/sci/types.h
@@ -32,6 +32,7 @@ typedef u64 sc_ipc_t;
 #define SC_83MHZ         83333333U   /* 83MHz */
 #define SC_84MHZ         84375000U   /* 84.37MHz */
 #define SC_100MHZ       100000000U   /* 100MHz */
+#define SC_114MHZ       114000000U   /* 114MHz */
 #define SC_125MHZ       125000000U   /* 125MHz */
 #define SC_133MHZ       133333333U   /* 133MHz */
 #define SC_135MHZ       135000000U   /* 135MHz */
@@ -52,6 +53,7 @@ typedef u64 sc_ipc_t;
 #define SC_372MHZ       372000000U   /* 372MHz */
 #define SC_375MHZ       375000000U   /* 375MHz */
 #define SC_400MHZ       400000000U   /* 400MHz */
+#define SC_465MHZ       465000000U   /* 465MHz */
 #define SC_500MHZ       500000000U   /* 500MHz */
 #define SC_594MHZ       594000000U   /* 594MHz */
 #define SC_625MHZ       625000000U   /* 625MHz */
@@ -75,6 +77,7 @@ typedef u64 sc_ipc_t;
 #define SC_1500MHZ     1500000000U   /* 1.5GHz */
 #define SC_1600MHZ     1600000000U   /* 1.6GHz */
 #define SC_1800MHZ     1800000000U   /* 1.8GHz */
+#define SC_1860MHZ     1860000000U   /* 1.86GHz */
 #define SC_2000MHZ     2000000000U   /* 2.0GHz */
 #define SC_2112MHZ     2112000000U   /* 2.12GHz */
 
@@ -89,6 +92,7 @@ typedef u64 sc_ipc_t;
 #define SC_144MHZ       144000000U   /* 144MHz */
 #define SC_192MHZ       192000000U   /* 192MHz */
 #define SC_211MHZ       211200000U   /* 211.2MHz */
+#define SC_228MHZ       228000000U   /* 233MHz */
 #define SC_240MHZ       240000000U   /* 240MHz */
 #define SC_264MHZ       264000000U   /* 264MHz */
 #define SC_352MHZ       352000000U   /* 352MHz */
@@ -96,11 +100,13 @@ typedef u64 sc_ipc_t;
 #define SC_384MHZ       384000000U   /* 384MHz */
 #define SC_396MHZ       396000000U   /* 396MHz */
 #define SC_432MHZ       432000000U   /* 432MHz */
+#define SC_456MHZ       456000000U   /* 466MHz */
 #define SC_480MHZ       480000000U   /* 480MHz */
 #define SC_600MHZ       600000000U   /* 600MHz */
 #define SC_744MHZ       744000000U   /* 744MHz */
 #define SC_792MHZ       792000000U   /* 792MHz */
 #define SC_864MHZ       864000000U   /* 864MHz */
+#define SC_912MHZ       912000000U   /* 912MHz */
 #define SC_960MHZ       960000000U   /* 960MHz */
 #define SC_1056MHZ     1056000000U   /* 1056MHz */
 #define SC_1104MHZ     1104000000U   /* 1104MHz */
diff --git a/arch/arm/include/asm/arch-imx8/snvs_security_sc.h b/arch/arm/include/asm/arch-imx8/snvs_security_sc.h
new file mode 100644
index 0000000000..0b7ded7ba6
--- /dev/null
+++ b/arch/arm/include/asm/arch-imx8/snvs_security_sc.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef _SNVS_SECURITY_SC_H
+#define _SNVS_SECURITY_SC_H
+
+int snvs_security_sc_init(void);
+
+#endif /* _SNVS_SECURITY_SC_H */
diff --git a/arch/arm/include/asm/arch-imx8/sys_proto.h b/arch/arm/include/asm/arch-imx8/sys_proto.h
index 0e981ae950..6f1fc8f999 100644
--- a/arch/arm/include/asm/arch-imx8/sys_proto.h
+++ b/arch/arm/include/asm/arch-imx8/sys_proto.h
@@ -5,6 +5,11 @@
 
 #include <asm/arch/sci/sci.h>
 #include <asm/mach-imx/sys_proto.h>
+#include <asm/arch/power-domain.h>
+#include <dm/platdata.h>
+#include <dm/device-internal.h>
+#include <dm/device.h>
+#include <power-domain.h>
 #include <linux/types.h>
 
 struct pass_over_info_t {
@@ -21,3 +26,7 @@ void build_info(void);
 enum boot_device get_boot_device(void);
 int print_bootinfo(void);
 int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate);
+int imx8_power_domain_lookup_name(const char *name,
+				  struct power_domain *power_domain);
+void imx8_power_off_pd_devices(const char *permanent_on_devices[], int size);
+bool m4_parts_booted(void);
diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
index debed6bac7..63b14b9ca5 100644
--- a/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
+++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mm.h
@@ -8,6 +8,10 @@
 #ifndef _ASM_ARCH_IMX8MM_CLOCK_H
 #define _ASM_ARCH_IMX8MM_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define PLL_1443X_RATE(_rate, _m, _p, _s, _k)			\
 	{							\
 		.rate	=	(_rate),			\
@@ -19,7 +23,7 @@
 
 #define LOCK_STATUS	BIT(31)
 #define LOCK_SEL_MASK	BIT(29)
-#define CLKE_MASK	BIT(11)
+#define CLKE_MASK	BIT(13)
 #define RST_MASK	BIT(9)
 #define BYPASS_MASK	BIT(4)
 #define	MDIV_SHIFT	12
@@ -363,7 +367,8 @@ enum clk_root_src {
 	EXT_CLK_2,
 	EXT_CLK_3,
 	EXT_CLK_4,
-	OSC_HDMI_CLK
+	OSC_HDMI_CLK,
+	ARM_A53_ALT_CLK,
 };
 
 enum clk_ccgr_index {
diff --git a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
index 38a6f5966b..742cbf3bf8 100644
--- a/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
+++ b/arch/arm/include/asm/arch-imx8m/clock_imx8mq.h
@@ -8,6 +8,10 @@
 #ifndef _ASM_ARCH_IMX8M_CLOCK_H
 #define _ASM_ARCH_IMX8M_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 enum pll_clocks {
 	ANATOP_ARM_PLL,
 	ANATOP_GPU_PLL,
@@ -153,6 +157,7 @@ enum clk_root_src {
 	EXT_CLK_3,
 	EXT_CLK_4,
 	OSC_27M_CLK,
+	ARM_A53_ALT_CLK,
 };
 
 /* CCGR index */
@@ -419,7 +424,7 @@ enum clk_src_index {
 
 enum frac_pll_out_val {
 	FRAC_PLL_OUT_1000M,
-	FRAC_PLL_OUT_1600M,
+	FRAC_PLL_OUT_800M,
 };
 
 void init_nand_clk(void);
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 62640d996e..3cfa169c97 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -137,6 +137,40 @@ struct fuse_bank1_regs {
 	u32 rsvd3[3];
 };
 
+struct fuse_bank3_regs {
+	u32 mem_trim0;
+	u32 rsvd0[3];
+	u32 mem_trim1;
+	u32 rsvd1[3];
+	u32 mem_trim2;
+	u32 rsvd2[3];
+	u32 ana0;
+	u32 rsvd3[3];
+};
+
+struct fuse_bank9_regs {
+	u32 mac_addr0;
+	u32 rsvd0[3];
+	u32 mac_addr1;
+	u32 rsvd1[11];
+};
+
+struct fuse_bank38_regs {
+	u32 ana_trim1; /* trim0 is at 0xD70, bank 37*/
+	u32 rsvd0[3];
+	u32 ana_trim2;
+	u32 rsvd1[3];
+	u32 ana_trim3;
+	u32 rsvd2[3];
+	u32 ana_trim4;
+	u32 rsvd3[3];
+};
+
+struct fuse_bank39_regs {
+	u32 ana_trim5;
+	u32 rsvd[15];
+};
+
 #ifdef CONFIG_IMX8MQ
 struct anamix_pll {
 	u32 audio_pll1_cfg0;
@@ -227,13 +261,6 @@ struct anamix_pll {
 };
 #endif
 
-struct fuse_bank9_regs {
-	u32 mac_addr0;
-	u32 rsvd0[3];
-	u32 mac_addr1;
-	u32 rsvd1[11];
-};
-
 /* System Reset Controller (SRC) */
 struct src {
 	u32 scr;
diff --git a/arch/arm/include/asm/arch-lpc32xx/dma.h b/arch/arm/include/asm/arch-lpc32xx/dma.h
index 8775491245..d69e3c4664 100644
--- a/arch/arm/include/asm/arch-lpc32xx/dma.h
+++ b/arch/arm/include/asm/arch-lpc32xx/dma.h
@@ -11,8 +11,6 @@
 #ifndef _LPC32XX_DMA_H
 #define _LPC32XX_DMA_H
 
-#include <common.h>
-
 /*
  * DMA linked list structure used with a channel's LLI register;
  * refer to UM10326, "LPC32x0 and LPC32x0/01 User manual" - Rev. 3
diff --git a/arch/arm/include/asm/arch-lpc32xx/i2c.h b/arch/arm/include/asm/arch-lpc32xx/i2c.h
index 5301d4c1b0..f39b14001b 100644
--- a/arch/arm/include/asm/arch-lpc32xx/i2c.h
+++ b/arch/arm/include/asm/arch-lpc32xx/i2c.h
@@ -1,7 +1,6 @@
 #ifndef _LPC32XX_I2C_H
 #define _LPC32XX_I2C_H
 
-#include <common.h>
 #include <asm/types.h>
 
 /* i2c register set */
diff --git a/arch/arm/include/asm/arch-ls102xa/clock.h b/arch/arm/include/asm/arch-ls102xa/clock.h
index e66e57f759..01978c08f5 100644
--- a/arch/arm/include/asm/arch-ls102xa/clock.h
+++ b/arch/arm/include/asm/arch-ls102xa/clock.h
@@ -7,8 +7,6 @@
 #ifndef __ASM_ARCH_LS102XA_CLOCK_H_
 #define __ASM_ARCH_LS102XA_CLOCK_H_
 
-#include <common.h>
-
 enum mxc_clock {
 	MXC_ARM_CLK = 0,
 	MXC_UART_CLK,
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 970537870d..3884948a2c 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -94,7 +94,6 @@
 #define CONFIG_SYS_FSL_ESDHC_BE
 #define CONFIG_SYS_FSL_WDOG_BE
 #define CONFIG_SYS_FSL_DSPI_BE
-#define CONFIG_SYS_FSL_QSPI_BE
 #define CONFIG_SYS_FSL_DCU_BE
 #define CONFIG_SYS_FSL_SEC_MON_LE
 #define CONFIG_SYS_FSL_SFP_VER_3_2
diff --git a/arch/arm/include/asm/arch-meson/axg.h b/arch/arm/include/asm/arch-meson/axg.h
index d293f2a839..91c87696e0 100644
--- a/arch/arm/include/asm/arch-meson/axg.h
+++ b/arch/arm/include/asm/arch-meson/axg.h
@@ -7,6 +7,10 @@
 #ifndef __AXG_H__
 #define __AXG_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define AXG_AOBUS_BASE		0xff800000
 #define AXG_PERIPHS_BASE	0xff634400
 #define AXG_HIU_BASE		0xff63c000
diff --git a/arch/arm/include/asm/arch-meson/g12a.h b/arch/arm/include/asm/arch-meson/g12a.h
index b806667860..db29cc3a00 100644
--- a/arch/arm/include/asm/arch-meson/g12a.h
+++ b/arch/arm/include/asm/arch-meson/g12a.h
@@ -7,6 +7,10 @@
 #ifndef __G12A_H__
 #define __G12A_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define G12A_AOBUS_BASE			0xff800000
 #define G12A_PERIPHS_BASE		0xff634400
 #define G12A_HIU_BASE			0xff63c000
diff --git a/arch/arm/include/asm/arch-meson/gx.h b/arch/arm/include/asm/arch-meson/gx.h
index b781ba9475..743d2e8bb9 100644
--- a/arch/arm/include/asm/arch-meson/gx.h
+++ b/arch/arm/include/asm/arch-meson/gx.h
@@ -6,6 +6,10 @@
 #ifndef __GX_H__
 #define __GX_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define GX_FIRMWARE_MEM_SIZE	0x1000000
 
 #define GX_AOBUS_BASE		0xc8100000
diff --git a/arch/arm/include/asm/arch-meson/sd_emmc.h b/arch/arm/include/asm/arch-meson/sd_emmc.h
index e3a72c8b66..1e9f8cf498 100644
--- a/arch/arm/include/asm/arch-meson/sd_emmc.h
+++ b/arch/arm/include/asm/arch-meson/sd_emmc.h
@@ -7,6 +7,10 @@
 #define __SD_EMMC_H__
 
 #include <mmc.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 
 #define SDIO_PORT_A			0
 #define SDIO_PORT_B			1
diff --git a/arch/arm/include/asm/arch-mx25/clock.h b/arch/arm/include/asm/arch-mx25/clock.h
index 7eec73163b..3045b78d08 100644
--- a/arch/arm/include/asm/arch-mx25/clock.h
+++ b/arch/arm/include/asm/arch-mx25/clock.h
@@ -9,8 +9,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 #ifdef CONFIG_MX25_HCLK_FREQ
 #define MXC_HCLK	CONFIG_MX25_HCLK_FREQ
 #else
diff --git a/arch/arm/include/asm/arch-mx27/regs-rtc.h b/arch/arm/include/asm/arch-mx27/regs-rtc.h
index d373ab1583..8434f4c1cb 100644
--- a/arch/arm/include/asm/arch-mx27/regs-rtc.h
+++ b/arch/arm/include/asm/arch-mx27/regs-rtc.h
@@ -21,6 +21,6 @@ struct rtc_regs {
 	u32 dayr;
 	u32 dayalarm;
 };
-#endif /* __ASSEMBLY__*/
+#endif /* __ASSEMBLY__ */
 
 #endif	/* __MX28_REGS_RTC_H__ */
diff --git a/arch/arm/include/asm/arch-mx31/clock.h b/arch/arm/include/asm/arch-mx31/clock.h
index aafc2d690e..e99e115f79 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -7,8 +7,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 #define MXC_HCLK	CONFIG_MX31_HCLK_FREQ
 
 #define MXC_CLK32	CONFIG_MX31_CLK32
diff --git a/arch/arm/include/asm/arch-mx35/clock.h b/arch/arm/include/asm/arch-mx35/clock.h
index 788534083c..cb0b53a69f 100644
--- a/arch/arm/include/asm/arch-mx35/clock.h
+++ b/arch/arm/include/asm/arch-mx35/clock.h
@@ -7,8 +7,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 #ifdef CONFIG_MX35_HCLK_FREQ
 #define MXC_HCLK	CONFIG_MX35_HCLK_FREQ
 #else
diff --git a/arch/arm/include/asm/arch-mx5/clock.h b/arch/arm/include/asm/arch-mx5/clock.h
index 6f5ca5888a..63a51042e1 100644
--- a/arch/arm/include/asm/arch-mx5/clock.h
+++ b/arch/arm/include/asm/arch-mx5/clock.h
@@ -7,8 +7,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 #ifdef CONFIG_SYS_MX5_HCLK
 #define MXC_HCLK	CONFIG_SYS_MX5_HCLK
 #else
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index fbb6e599b6..3d1cc68322 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -557,6 +557,6 @@ struct pwm_regs {
 	u32	cnr;
 };
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 
 #endif				/* __ASM_ARCH_MX5_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h
index f7760541a4..8ae4971578 100644
--- a/arch/arm/include/asm/arch-mx6/clock.h
+++ b/arch/arm/include/asm/arch-mx6/clock.h
@@ -7,7 +7,7 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
+#include <linux/types.h>
 
 #ifdef CONFIG_SYS_MX6_HCLK
 #define MXC_HCLK	CONFIG_SYS_MX6_HCLK
@@ -21,6 +21,8 @@
 #define MXC_CLK32	32768
 #endif
 
+struct cmd_tbl;
+
 enum mxc_clock {
 	MXC_ARM_CLK = 0,
 	MXC_PER_CLK,
@@ -80,5 +82,6 @@ void enable_thermal_clk(void);
 void mxs_set_lcdclk(u32 base_addr, u32 freq);
 void select_ldb_di_clock_source(enum ldb_di_clock clk);
 void enable_eim_clk(unsigned char enable);
-int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_mx6_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[]);
 #endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 4f01b20aed..ccd48e8305 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -372,6 +372,7 @@
 #include <asm/mach-imx/regs-lcdif.h>
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* only for i.MX6SX/UL */
 #define WDOG3_BASE_ADDR (((is_mx6ul() || is_mx6ull()) ?	\
@@ -1003,5 +1004,5 @@ struct pwm_regs {
  */
 #define	is_boot_from_usb(void) (!(readl(USB_PHY0_BASE_ADDR) & (1<<20)))
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx7/clock.h b/arch/arm/include/asm/arch-mx7/clock.h
index 984bd3f141..48c7c3367a 100644
--- a/arch/arm/include/asm/arch-mx7/clock.h
+++ b/arch/arm/include/asm/arch-mx7/clock.h
@@ -9,7 +9,6 @@
 #ifndef _ASM_ARCH_CLOCK_H
 #define _ASM_ARCH_CLOCK_H
 
-#include <common.h>
 #include <asm/arch/crm_regs.h>
 
 #ifdef CONFIG_SYS_MX7_HCLK
diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
index 6336514007..95238dcaa8 100644
--- a/arch/arm/include/asm/arch-mx7/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
@@ -225,6 +225,7 @@
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/mach-imx/regs-lcdif.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 extern void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
 
@@ -1223,5 +1224,5 @@ struct bootrom_sw_info {
 	u32 reserved_3[3];
 };
 
-#endif /* __ASSEMBLER__*/
+#endif /* __ASSEMBLY__ */
 #endif /* __ASM_ARCH_MX7_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-mx7/mx7-ddr.h b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
index 3c0790487e..37aaee0ad7 100644
--- a/arch/arm/include/asm/arch-mx7/mx7-ddr.h
+++ b/arch/arm/include/asm/arch-mx7/mx7-ddr.h
@@ -10,6 +10,10 @@
 #ifndef __ASM_ARCH_MX7_DDR_H__
 #define __ASM_ARCH_MX7_DDR_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* DDRC Registers (DDRC_IPS_BASE_ADDR) */
 struct ddrc {
 	u32 mstr;		/* 0x0000 */
diff --git a/arch/arm/include/asm/arch-mx7ulp/clock.h b/arch/arm/include/asm/arch-mx7ulp/clock.h
index eb02a20fdc..92d4463dff 100644
--- a/arch/arm/include/asm/arch-mx7ulp/clock.h
+++ b/arch/arm/include/asm/arch-mx7ulp/clock.h
@@ -6,7 +6,6 @@
 #ifndef _ASM_ARCH_CLOCK_H
 #define _ASM_ARCH_CLOCK_H
 
-#include <common.h>
 #include <asm/arch/pcc.h>
 #include <asm/arch/scg.h>
 
diff --git a/arch/arm/include/asm/arch-mx7ulp/pcc.h b/arch/arm/include/asm/arch-mx7ulp/pcc.h
index dee3cfcdc0..8f0d700628 100644
--- a/arch/arm/include/asm/arch-mx7ulp/pcc.h
+++ b/arch/arm/include/asm/arch-mx7ulp/pcc.h
@@ -6,7 +6,6 @@
 #ifndef _ASM_ARCH_PCC_H
 #define _ASM_ARCH_PCC_H
 
-#include <common.h>
 #include <asm/arch/scg.h>
 
 /* PCC2 */
diff --git a/arch/arm/include/asm/arch-mx7ulp/scg.h b/arch/arm/include/asm/arch-mx7ulp/scg.h
index b79bde338f..3b5b7f6803 100644
--- a/arch/arm/include/asm/arch-mx7ulp/scg.h
+++ b/arch/arm/include/asm/arch-mx7ulp/scg.h
@@ -6,8 +6,6 @@
 #ifndef _ASM_ARCH_SCG_H
 #define _ASM_ARCH_SCG_H
 
-#include <common.h>
-
 #ifdef CONFIG_CLK_DEBUG
 #define clk_debug(fmt, args...)	printf(fmt, ##args)
 #else
diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index 037045ca31..0a626fe647 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -7,7 +7,6 @@
  */
 #ifndef _CLOCKS_OMAP4_H_
 #define _CLOCKS_OMAP4_H_
-#include <common.h>
 #include <asm/omap_common.h>
 
 /*
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h
index e261bd43f2..87eb3f335a 100644
--- a/arch/arm/include/asm/arch-omap5/clock.h
+++ b/arch/arm/include/asm/arch-omap5/clock.h
@@ -8,7 +8,6 @@
  */
 #ifndef _CLOCKS_OMAP5_H_
 #define _CLOCKS_OMAP5_H_
-#include <common.h>
 #include <asm/omap_common.h>
 
 /*
diff --git a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h
index 09edfadc32..ea2f113f98 100644
--- a/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h
+++ b/arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h
@@ -9,7 +9,6 @@
 #ifndef _DRA7_IODELAY_H_
 #define _DRA7_IODELAY_H_
 
-#include <common.h>
 #include <asm/arch/sys_proto.h>
 
 /* CONFIG_REG_0 */
diff --git a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
index a14b64cdb3..86c906bb0e 100644
--- a/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
+++ b/arch/arm/include/asm/arch-rk3308/cru_rk3308.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_CRU_RK3308_H
 #define _ASM_ARCH_CRU_RK3308_H
 
-#include <common.h>
-
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
diff --git a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h b/arch/arm/include/asm/arch-rk3308/grf_rk3308.h
index 3e68626d3e..a995bb950d 100644
--- a/arch/arm/include/asm/arch-rk3308/grf_rk3308.h
+++ b/arch/arm/include/asm/arch-rk3308/grf_rk3308.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_rk3308_H
 #define _ASM_ARCH_GRF_rk3308_H
 
-#include <common.h>
-
 struct rk3308_grf {
 	unsigned int gpio0a_iomux;
 	unsigned int reserved0;
diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h
index 5cf2aec11a..5eb17f9d55 100644
--- a/arch/arm/include/asm/arch-rockchip/cru.h
+++ b/arch/arm/include/asm/arch-rockchip/cru.h
@@ -7,6 +7,10 @@
 #ifndef _ROCKCHIP_CLOCK_H
 #define _ROCKCHIP_CLOCK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #if defined(CONFIG_ROCKCHIP_RK3288)
 # include <asm/arch-rockchip/cru_rk3288.h>
 #elif defined(CONFIG_ROCKCHIP_RK3399)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_px30.h b/arch/arm/include/asm/arch-rockchip/cru_px30.h
index 798444ae49..732ca37040 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_px30.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_CRU_PX30_H
 #define _ASM_ARCH_CRU_PX30_H
 
-#include <common.h>
-
 #define MHz		1000000
 #define KHz		1000
 #define OSC_HZ		(24 * MHz)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index 4722522954..5db0407baa 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_CRU_RK3036_H
 #define _ASM_ARCH_CRU_RK3036_H
 
-#include <common.h>
-
 #define OSC_HZ		(24 * 1000 * 1000)
 
 #define APLL_HZ		(600 * 1000000)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
index b8565605cd..cca812d29e 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3128.h
@@ -6,7 +6,9 @@
 #ifndef _ASM_ARCH_CRU_RK3128_H
 #define _ASM_ARCH_CRU_RK3128_H
 
-#include <common.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
index c87c830716..ee12fa831f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk322x.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_CRU_RK322X_H
 #define _ASM_ARCH_CRU_RK322X_H
 
-#include <common.h>
-
 #define MHz		1000000
 #define OSC_HZ		(24 * MHz)
 
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
index 4bf69dbe08..226744d67d 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3328.h
@@ -6,8 +6,6 @@
 #ifndef __ASM_ARCH_CRU_RK3328_H_
 #define __ASM_ARCH_CRU_RK3328_H_
 
-#include <common.h>
-
 struct rk3328_clk_priv {
 	struct rk3328_cru *cru;
 	ulong rate;
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
index 1fe1f01b9e..316c67c62f 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h
@@ -6,8 +6,9 @@
 #ifndef _ASM_ARCH_CRU_RK3368_H
 #define _ASM_ARCH_CRU_RK3368_H
 
-#include <common.h>
-
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /* RK3368 clock numbers */
 enum rk3368_pll_id {
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index 789ca6aa28..d941a129f3 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -6,8 +6,6 @@
 #ifndef __ASM_ARCH_CRU_RK3399_H_
 #define __ASM_ARCH_CRU_RK3399_H_
 
-#include <common.h>
-
 /* Private data for the clock driver - used by rockchip_get_cru() */
 struct rk3399_clk_priv {
 	struct rockchip_cru *cru;
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
index 7697e96a91..0ba5ff6a04 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rv1108.h
@@ -6,7 +6,9 @@
 #ifndef _ASM_ARCH_CRU_RV1108_H
 #define _ASM_ARCH_CRU_RV1108_H
 
-#include <common.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define OSC_HZ		(24 * 1000 * 1000)
 
diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h b/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
index 82234cf8ad..40cdcf4a45 100644
--- a/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3368.h
@@ -6,6 +6,10 @@
 #ifndef __ASM_ARCH_DDR_RK3368_H__
 #define __ASM_ARCH_DDR_RK3368_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * The RK3368 DDR PCTL differs from the incarnation in the RK3288 only
  * in a few details. Most notably, it has an additional field to track
diff --git a/arch/arm/include/asm/arch-rockchip/grf_px30.h b/arch/arm/include/asm/arch-rockchip/grf_px30.h
index 3d2a877032..d51e29b19e 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_px30.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_px30_H
 #define _ASM_ARCH_GRF_px30_H
 
-#include <common.h>
-
 struct px30_grf {
 	unsigned int gpio1al_iomux;
 	unsigned int gpio1ah_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
index 5f12ebf262..08348d8228 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3036.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_RK3036_H
 #define _ASM_ARCH_GRF_RK3036_H
 
-#include <common.h>
-
 struct rk3036_grf {
 	unsigned int reserved[0x2a];
 	unsigned int gpio0a_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
index 519b36ad2a..fe07d69b42 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3128.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_RK3128_H
 #define _ASM_ARCH_GRF_RK3128_H
 
-#include <common.h>
-
 struct rk3128_grf {
 	unsigned int reserved[0x2a];
 	unsigned int gpio0a_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
index a99d13732d..5f4d9d8224 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk322x.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_RK322X_H
 #define _ASM_ARCH_GRF_RK322X_H
 
-#include <common.h>
-
 struct rk322x_grf {
 	unsigned int gpio0a_iomux;
 	unsigned int gpio0b_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
index b70b08fcce..0079d20078 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3368.h
@@ -6,7 +6,9 @@
 #ifndef _ASM_ARCH_GRF_RK3368_H
 #define _ASM_ARCH_GRF_RK3368_H
 
-#include <common.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct rk3368_grf {
 	u32 gpio1a_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
index 9f42fbde8d..92bbe34af6 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rv1108.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_GRF_RV1108_H
 #define _ASM_ARCH_GRF_RV1108_H
 
-#include <common.h>
-
 struct rv1108_grf {
 	u32 reserved[4];
 	u32 gpio1a_iomux;
diff --git a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
index 0f00df6bf5..fb25504b12 100644
--- a/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/lvds_rk3288.h
@@ -6,6 +6,10 @@
 #ifndef _ASM_ARCH_LVDS_RK3288_H
 #define _ASM_ARCH_LVDS_RK3288_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define RK3288_LVDS_CH0_REG0			0x00
 #define RK3288_LVDS_CH0_REG0_LVDS_EN		BIT(7)
 #define RK3288_LVDS_CH0_REG0_TTL_EN		BIT(6)
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
index 9781881738..3a3657789f 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_pctl_px30.h
@@ -7,6 +7,10 @@
 #define _ASM_ARCH_SDRAM_PCTL_PX30_H
 #include <asm/arch-rockchip/sdram_common.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct ddr_pctl_regs {
 	u32 pctl[30][2];
 };
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
index c75a633c91..a033a18538 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_phy_px30.h
@@ -8,6 +8,10 @@
 #include <asm/arch-rockchip/sdram_common.h>
 #include <asm/arch-rockchip/sdram_phy_ron_rtt_px30.h>
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct ddr_phy_regs {
 	u32 phy[5][2];
 };
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
index 5de3220d6f..46298165fb 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3036.h
@@ -5,8 +5,6 @@
 #ifndef _ASM_ARCH_SDRAM_RK3036_H
 #define _ASM_ARCH_SDRAM_RK3036_H
 
-#include <common.h>
-
 struct rk3036_ddr_pctl {
 	u32 scfg;
 	u32 sctl;
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
index 336c5d7e8c..6f6c5c9954 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk322x.h
@@ -5,7 +5,9 @@
 #ifndef _ASM_ARCH_SDRAM_RK322X_H
 #define _ASM_ARCH_SDRAM_RK322X_H
 
-#include <common.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct rk322x_sdram_channel {
 	/*
diff --git a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
index 267649fda4..c76372ee82 100644
--- a/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/sdram_rk3399.h
@@ -7,6 +7,9 @@
 #define _ASM_ARCH_SDRAM_RK3399_H
 #include <asm/arch-rockchip/sdram_common.h>
 #include <asm/arch-rockchip/sdram_msch.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct rk3399_ddr_pctl_regs {
 	u32 denali_ctl[332];
diff --git a/arch/arm/include/asm/arch-s32v234/clock.h b/arch/arm/include/asm/arch-s32v234/clock.h
index c60065444c..70846094e8 100644
--- a/arch/arm/include/asm/arch-s32v234/clock.h
+++ b/arch/arm/include/asm/arch-s32v234/clock.h
@@ -6,8 +6,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 enum mxc_clock {
 	MXC_ARM_CLK = 0,
 	MXC_BUS_CLK,
diff --git a/arch/arm/include/asm/arch-s32v234/imx-regs.h b/arch/arm/include/asm/arch-s32v234/imx-regs.h
index 9a779cce96..1472a43f1b 100644
--- a/arch/arm/include/asm/arch-s32v234/imx-regs.h
+++ b/arch/arm/include/asm/arch-s32v234/imx-regs.h
@@ -323,6 +323,6 @@ struct mscm_ir {
 	u32 ipcie[4];		/* Interconnect Parity Checking Injection Enable Register       */
 };
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #endif /* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-stih410/sdhci.h b/arch/arm/include/asm/arch-stih410/sdhci.h
index 105d3580ef..d5557b89fc 100644
--- a/arch/arm/include/asm/arch-stih410/sdhci.h
+++ b/arch/arm/include/asm/arch-stih410/sdhci.h
@@ -7,6 +7,10 @@
 #ifndef __STI_SDHCI_H__
 #define __STI_SDHCI_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define FLASHSS_MMC_CORE_CONFIG_1			0x400
 #define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_UNIT_MHZ	BIT(24)
 #define FLASHSS_MMC_CORECFG_TIMEOUT_CLK_FREQ_MIN	BIT(12)
diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_pwr.h b/arch/arm/include/asm/arch-stm32f4/stm32_pwr.h
index de42996037..8af6de220d 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32_pwr.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32_pwr.h
@@ -5,6 +5,11 @@
  */
 
 #ifndef __STM32_PWR_H_
+#define __STM32_PWR_H_
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /*
  * Offsets of some PWR registers
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_pwr.h b/arch/arm/include/asm/arch-stm32f7/stm32_pwr.h
index c93fc5a7e3..02faaeb663 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32_pwr.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32_pwr.h
@@ -5,6 +5,11 @@
  */
 
 #ifndef __STM32_PWR_H_
+#define __STM32_PWR_H_
+
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /*
  * Offsets of some PWR registers
diff --git a/arch/arm/include/asm/arch-stm32f7/syscfg.h b/arch/arm/include/asm/arch-stm32f7/syscfg.h
index ce2a952f78..985ae2544d 100644
--- a/arch/arm/include/asm/arch-stm32f7/syscfg.h
+++ b/arch/arm/include/asm/arch-stm32f7/syscfg.h
@@ -7,6 +7,10 @@
 #ifndef _STM32_SYSCFG_H
 #define _STM32_SYSCFG_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct stm32_syscfg_regs {
 	u32 memrmp;
 	u32 pmc;
diff --git a/arch/arm/include/asm/arch-sunxi/ccu.h b/arch/arm/include/asm/arch-sunxi/ccu.h
index 5dd97ab227..cac5c5faf0 100644
--- a/arch/arm/include/asm/arch-sunxi/ccu.h
+++ b/arch/arm/include/asm/arch-sunxi/ccu.h
@@ -7,6 +7,10 @@
 #ifndef _ASM_ARCH_CCU_H
 #define _ASM_ARCH_CCU_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /**
  * enum ccu_flags - ccu clock/reset flags
  *
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
index e36937059b..426069fc69 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun50i_h6.h
@@ -9,6 +9,10 @@
 #ifndef _SUNXI_CLOCK_SUN50I_H6_H
 #define _SUNXI_CLOCK_SUN50I_H6_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_ccm_reg {
 	u32 pll1_cfg;		/* 0x000 pll1 (cpux) control */
 	u8 reserved_0x004[12];
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
index 530e0dd73b..fe6b8ba273 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun9i.h
@@ -8,6 +8,10 @@
 #ifndef _SUNXI_CLOCK_SUN9I_H
 #define _SUNXI_CLOCK_SUN9I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_ccm_reg {
 	u32 pll1_c0_cfg;	/* 0x00 c0cpu# pll configuration */
 	u32 pll2_c1_cfg;	/* 0x04 c1cpu# pll configuration */
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
index 49a8a66f7b..be02655cdd 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h
@@ -10,6 +10,9 @@
 #define _SUNXI_DRAM_SUN50I_H6_H
 
 #include <stdbool.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 enum sunxi_dram_type {
 	SUNXI_DRAM_TYPE_DDR3 = 3,
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun6i.h b/arch/arm/include/asm/arch-sunxi/dram_sun6i.h
index 929450fc67..b66d58cd73 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun6i.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun6i.h
@@ -13,6 +13,10 @@
 #ifndef _SUNXI_DRAM_SUN6I_H
 #define _SUNXI_DRAM_SUN6I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h
index 49a6108c19..3f65306cc6 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a33.h
@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN8I_A33_H
 #define _SUNXI_DRAM_SUN8I_A33_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
index d4634e55e4..2a87996354 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun8i_a83t.h
@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN8I_A83T_H
 #define _SUNXI_DRAM_SUN8I_A83T_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun9i.h b/arch/arm/include/asm/arch-sunxi/dram_sun9i.h
index 603850b9ff..41df5fe5b6 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sun9i.h
@@ -11,6 +11,10 @@
 #ifndef _SUNXI_DRAM_SUN9I_H
 #define _SUNXI_DRAM_SUN9I_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct sunxi_mctl_com_reg {
 	u32 cr;			/* 0x00 */
 	u32 ccr;		/* 0x04 controller configuration register */
diff --git a/arch/arm/include/asm/arch-sunxi/pwm.h b/arch/arm/include/asm/arch-sunxi/pwm.h
index dca283c7a9..b89bddd2e8 100644
--- a/arch/arm/include/asm/arch-sunxi/pwm.h
+++ b/arch/arm/include/asm/arch-sunxi/pwm.h
@@ -6,6 +6,10 @@
 #ifndef _SUNXI_PWM_H
 #define _SUNXI_PWM_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define SUNXI_PWM_CTRL_REG		(SUNXI_PWM_BASE + 0)
 #define SUNXI_PWM_CH0_PERIOD		(SUNXI_PWM_BASE + 4)
 
diff --git a/arch/arm/include/asm/arch-sunxi/rsb.h b/arch/arm/include/asm/arch-sunxi/rsb.h
index 616b6e2a64..8c64a995f2 100644
--- a/arch/arm/include/asm/arch-sunxi/rsb.h
+++ b/arch/arm/include/asm/arch-sunxi/rsb.h
@@ -11,7 +11,6 @@
 #ifndef __SUNXI_RSB_H
 #define __SUNXI_RSB_H
 
-#include <common.h>
 #include <asm/io.h>
 
 struct sunxi_rsb_reg {
diff --git a/arch/arm/include/asm/arch-tegra/cboot.h b/arch/arm/include/asm/arch-tegra/cboot.h
index 021c246175..4e1da98d1f 100644
--- a/arch/arm/include/asm/arch-tegra/cboot.h
+++ b/arch/arm/include/asm/arch-tegra/cboot.h
@@ -6,7 +6,10 @@
 #ifndef _TEGRA_CBOOT_H_
 #define _TEGRA_CBOOT_H_
 
+#include <net.h>
+
 #ifdef CONFIG_ARM64
+
 extern unsigned long cboot_boot_x0;
 
 void cboot_save_boot_params(unsigned long x0, unsigned long x1,
diff --git a/arch/arm/include/asm/arch-tegra/dc.h b/arch/arm/include/asm/arch-tegra/dc.h
index 59347dd3d8..6444af2993 100644
--- a/arch/arm/include/asm/arch-tegra/dc.h
+++ b/arch/arm/include/asm/arch-tegra/dc.h
@@ -7,6 +7,10 @@
 #ifndef __ASM_ARCH_TEGRA_DC_H
 #define __ASM_ARCH_TEGRA_DC_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Register definitions for the Tegra display controller */
 
 /* CMD register 0x000 ~ 0x43 */
diff --git a/arch/arm/include/asm/arch-tegra/ivc.h b/arch/arm/include/asm/arch-tegra/ivc.h
index 53cb56d271..52c10b8fab 100644
--- a/arch/arm/include/asm/arch-tegra/ivc.h
+++ b/arch/arm/include/asm/arch-tegra/ivc.h
@@ -6,8 +6,6 @@
 #ifndef _ASM_ARCH_TEGRA_IVC_H
 #define _ASM_ARCH_TEGRA_IVC_H
 
-#include <common.h>
-
 /*
  * Tegra IVC is a communication protocol that transfers fixed-size frames
  * bi-directionally and in-order between the local CPU and some remote entity.
diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h
index 1524bf2911..e1f5a73813 100644
--- a/arch/arm/include/asm/arch-tegra/pmc.h
+++ b/arch/arm/include/asm/arch-tegra/pmc.h
@@ -7,6 +7,10 @@
 #ifndef _PMC_H_
 #define _PMC_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* Power Management Controller (APBDEV_PMC_) registers */
 struct pmc_ctlr {
 	uint pmc_cntrl;			/* _CNTRL_0, offset 00 */
diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
index 70dcf4aa66..d6a55764ba 100644
--- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
+++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
@@ -8,7 +8,6 @@
 #ifndef __TEGRA_MMC_H_
 #define __TEGRA_MMC_H_
 
-#include <common.h>
 #include <clk.h>
 #include <reset.h>
 #include <fdtdec.h>
diff --git a/arch/arm/include/asm/arch-tegra124/flow.h b/arch/arm/include/asm/arch-tegra124/flow.h
index 62947bf99c..ebcb22f1cb 100644
--- a/arch/arm/include/asm/arch-tegra124/flow.h
+++ b/arch/arm/include/asm/arch-tegra124/flow.h
@@ -7,6 +7,10 @@
 #ifndef _TEGRA124_FLOW_H_
 #define _TEGRA124_FLOW_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 struct flow_ctlr {
 	u32 halt_cpu_events;	/* offset 0x00 */
 	u32 halt_cop_events;	/* offset 0x04 */
diff --git a/arch/arm/include/asm/arch-vf610/clock.h b/arch/arm/include/asm/arch-vf610/clock.h
index 72184fd608..ec9786ce4f 100644
--- a/arch/arm/include/asm/arch-vf610/clock.h
+++ b/arch/arm/include/asm/arch-vf610/clock.h
@@ -6,8 +6,6 @@
 #ifndef __ASM_ARCH_CLOCK_H
 #define __ASM_ARCH_CLOCK_H
 
-#include <common.h>
-
 enum mxc_clock {
 	MXC_ARM_CLK = 0,
 	MXC_BUS_CLK,
diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h
index ae0a187c4d..97211f4b12 100644
--- a/arch/arm/include/asm/arch-vf610/imx-regs.h
+++ b/arch/arm/include/asm/arch-vf610/imx-regs.h
@@ -302,6 +302,7 @@
 
 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* System Reset Controller (SRC) */
 struct src {
@@ -474,6 +475,6 @@ struct mscm {
 	u32 cpxcfg3;
 };
 
-#endif	/* __ASSEMBLER__*/
+#endif	/* __ASSEMBLY__ */
 
 #endif	/* __ASM_ARCH_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/armv7_mpu.h b/arch/arm/include/asm/armv7_mpu.h
index 8f77ec42a6..16b9d0d1ae 100644
--- a/arch/arm/include/asm/armv7_mpu.h
+++ b/arch/arm/include/asm/armv7_mpu.h
@@ -7,6 +7,10 @@
 #ifndef _ASM_ARMV7_MPU_H
 #define _ASM_ARMV7_MPU_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #ifdef CONFIG_CPU_V7M
 #define AP_SHIFT			24
 #define XN_SHIFT			28
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h
index b02c454d04..fa8548624a 100644
--- a/arch/arm/include/asm/bitops.h
+++ b/arch/arm/include/asm/bitops.h
@@ -16,9 +16,15 @@
 #define __ASM_ARM_BITOPS_H
 
 #include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/__fls.h>
+#include <asm-generic/bitops/fls.h>
+#include <asm-generic/bitops/fls64.h>
 
 #ifdef __KERNEL__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 #include <asm/proc-armv/system.h>
 
 #define smp_mb__before_clear_bit()	do { } while (0)
@@ -176,8 +182,4 @@ found_middle:
 
 #endif /* __KERNEL__ */
 
-#include <asm-generic/bitops/__fls.h>
-#include <asm-generic/bitops/fls.h>
-#include <asm-generic/bitops/fls64.h>
-
 #endif /* _ARM_BITOPS_H */
diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h
index 8bb3fa2e0e..8af1ea0aa4 100644
--- a/arch/arm/include/asm/dma-mapping.h
+++ b/arch/arm/include/asm/dma-mapping.h
@@ -7,10 +7,10 @@
 #ifndef __ASM_ARM_DMA_MAPPING_H
 #define __ASM_ARM_DMA_MAPPING_H
 
-#include <common.h>
 #include <asm/cache.h>
 #include <cpu_func.h>
 #include <linux/dma-direction.h>
+#include <linux/kernel.h>
 #include <linux/types.h>
 #include <malloc.h>
 
diff --git a/arch/arm/include/asm/ehci-omap.h b/arch/arm/include/asm/ehci-omap.h
index 1549f7bf21..f970bba937 100644
--- a/arch/arm/include/asm/ehci-omap.h
+++ b/arch/arm/include/asm/ehci-omap.h
@@ -123,6 +123,7 @@ struct omap_ehci {
 	u32 insreg08;		/* 0xb0 */
 };
 
+#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
 /*
  * FIXME: forward declaration of this structs needed because omap got the
  * ehci implementation backwards. move out ehci_hcd_x from board files
@@ -133,5 +134,6 @@ struct ehci_hcor;
 int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
 		       struct ehci_hccr **hccr, struct ehci_hcor **hcor);
 int omap_ehci_hcd_stop(void);
+#endif
 
 #endif /* _OMAP_COMMON_EHCI_H_ */
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h
index dc398efd32..35424345bf 100644
--- a/arch/arm/include/asm/emif.h
+++ b/arch/arm/include/asm/emif.h
@@ -13,7 +13,6 @@
 #ifndef _EMIF_H_
 #define _EMIF_H_
 #include <asm/types.h>
-#include <common.h>
 #include <asm/io.h>
 
 /* Base address */
diff --git a/arch/arm/include/asm/gic-v3.h b/arch/arm/include/asm/gic-v3.h
index ac6c9e7013..5131fabec4 100644
--- a/arch/arm/include/asm/gic-v3.h
+++ b/arch/arm/include/asm/gic-v3.h
@@ -6,6 +6,10 @@
 #ifndef __GIC_V3_H__
 #define __GIC_V3_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define GICR_CTLR_ENABLE_LPIS		BIT(0)
 #define GICR_CTLR_RWP			BIT(3)
 
diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h
index f23b6bfb75..7c0905d240 100644
--- a/arch/arm/include/asm/global_data.h
+++ b/arch/arm/include/asm/global_data.h
@@ -117,4 +117,13 @@ static inline gd_t *get_gd(void)
 #endif
 #endif
 
+static inline void set_gd(volatile gd_t *gd_ptr)
+{
+#ifdef CONFIG_ARM64
+	__asm__ volatile("ldr x18, %0\n" : : "m"(gd_ptr));
+#else
+	__asm__ volatile("ldr r9, %0\n" : : "m"(gd_ptr));
+#endif
+}
+
 #endif /* __ASM_GBL_DATA_H */
diff --git a/arch/arm/include/asm/iproc-common/configs.h b/arch/arm/include/asm/iproc-common/configs.h
index 96c4f54f4a..4733c0793c 100644
--- a/arch/arm/include/asm/iproc-common/configs.h
+++ b/arch/arm/include/asm/iproc-common/configs.h
@@ -10,7 +10,6 @@
 
 /* Architecture, CPU, chip, etc */
 #define CONFIG_IPROC
-#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 
 /* Memory Info */
 #define CONFIG_SYS_SDRAM_BASE		0x61000000
diff --git a/arch/arm/include/asm/mach-imx/dma.h b/arch/arm/include/asm/mach-imx/dma.h
index ca70731b9e..55eb84cb8e 100644
--- a/arch/arm/include/asm/mach-imx/dma.h
+++ b/arch/arm/include/asm/mach-imx/dma.h
@@ -7,11 +7,13 @@
  *
  * Based on code from LTIB:
  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2020 NXP
  */
 
 #ifndef __DMA_H__
 #define __DMA_H__
 
+#include <asm/cache.h>
 #include <linux/list.h>
 #include <linux/compiler.h>
 
@@ -53,7 +55,7 @@ enum {
 	MXS_DMA_CHANNEL_AHB_APBH_RESERVED1,
 	MXS_MAX_DMA_CHANNELS,
 };
-#elif defined(CONFIG_MX6) || defined(CONFIG_MX7)
+#else
 enum {
 	MXS_DMA_CHANNEL_AHB_APBH_GPMI0 = 0,
 	MXS_DMA_CHANNEL_AHB_APBH_GPMI1,
@@ -95,13 +97,13 @@ enum {
 #define	MXS_DMA_DESC_BYTES_OFFSET	16
 
 struct mxs_dma_cmd {
-	unsigned long		next;
-	unsigned long		data;
+	u32		next;
+	u32		data;
 	union {
-		dma_addr_t	address;
-		unsigned long	alternate;
+		u32	address;
+		u32	alternate;
 	};
-	unsigned long		pio_words[DMA_PIO_WORDS];
+	u32		pio_words[DMA_PIO_WORDS];
 };
 
 /*
@@ -117,7 +119,7 @@ struct mxs_dma_cmd {
 struct mxs_dma_desc {
 	struct mxs_dma_cmd	cmd;
 	unsigned int		flags;
-	dma_addr_t		address;
+	u32			address;
 	void			*buffer;
 	struct list_head	node;
 } __aligned(MXS_DMA_ALIGNMENT);
diff --git a/arch/arm/include/asm/mach-imx/imx-nandbcb.h b/arch/arm/include/asm/mach-imx/imx-nandbcb.h
index 907e7ed8f9..74c9031d4e 100644
--- a/arch/arm/include/asm/mach-imx/imx-nandbcb.h
+++ b/arch/arm/include/asm/mach-imx/imx-nandbcb.h
@@ -9,9 +9,11 @@
 
 #define FCB_FINGERPRINT		0x20424346      /* 'FCB' */
 #define FCB_VERSION_1		0x01000000
+#define FCB_FINGERPRINT_OFF	0x4		/* FCB fingerprint offset*/
 
-#define DBBT_FINGERPRINT2	0x54424244	/* 'DBBT' */
+#define DBBT_FINGERPRINT	0x54424244	/* 'DBBT' */
 #define DBBT_VERSION_1		0x01000000
+#define DBBT_FINGERPRINT_OFF	0x4		/* DBBT fingerprint offset*/
 
 struct dbbt_block {
 	u32 checksum;	/* reserved on i.MX6 */
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h b/arch/arm/include/asm/mach-imx/iomux-v3.h
index 06dbd8d943..1de7093355 100644
--- a/arch/arm/include/asm/mach-imx/iomux-v3.h
+++ b/arch/arm/include/asm/mach-imx/iomux-v3.h
@@ -10,7 +10,7 @@
 #ifndef __MACH_IOMUX_V3_H__
 #define __MACH_IOMUX_V3_H__
 
-#include <common.h>
+#include <linux/types.h>
 
 /*
  *	build IOMUX_PAD structure
diff --git a/arch/arm/include/asm/mach-imx/module_fuse.h b/arch/arm/include/asm/mach-imx/module_fuse.h
new file mode 100644
index 0000000000..a46fc3f1f8
--- /dev/null
+++ b/arch/arm/include/asm/mach-imx/module_fuse.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2019 NXP
+ */
+
+#ifndef __MODULE_FUSE_H__
+#define __MODULE_FUSE_H__
+
+enum fuse_module_type {
+	MODULE_TSC,
+	MODULE_ADC1,
+	MODULE_ADC2,
+	MODULE_SIM1,
+	MODULE_SIM2,
+	MODULE_FLEXCAN1,
+	MODULE_FLEXCAN2,
+	MODULE_SPDIF,
+	MODULE_EIM,
+	MODULE_SD1,
+	MODULE_SD2,
+	MODULE_SD3,
+	MODULE_SD4,
+	MODULE_QSPI1,
+	MODULE_QSPI2,
+	MODULE_GPMI,
+	MODULE_APBHDMA,
+	MODULE_LCDIF,
+	MODULE_PXP,
+	MODULE_CSI,
+	MODULE_ENET1,
+	MODULE_ENET2,
+	MODULE_CAAM,
+	MODULE_USB_OTG1,
+	MODULE_USB_OTG2,
+	MODULE_SAI2,
+	MODULE_SAI3,
+	MODULE_BEE,
+	MODULE_UART1,
+	MODULE_UART2,
+	MODULE_UART3,
+	MODULE_UART4,
+	MODULE_UART5,
+	MODULE_UART6,
+	MODULE_UART7,
+	MODULE_UART8,
+	MODULE_PWM5,
+	MODULE_PWM6,
+	MODULE_PWM7,
+	MODULE_PWM8,
+	MODULE_ECSPI1,
+	MODULE_ECSPI2,
+	MODULE_ECSPI3,
+	MODULE_ECSPI4,
+	MODULE_ECSPI5,
+	MODULE_I2C1,
+	MODULE_I2C2,
+	MODULE_I2C3,
+	MODULE_I2C4,
+	MODULE_GPT1,
+	MODULE_GPT2,
+	MODULE_EPIT1,
+	MODULE_EPIT2,
+	MODULE_EPDC,
+	MODULE_ESAI,
+	MODULE_DCP,
+	MODULE_DCP_CRYPTO,
+};
+
+struct fuse_entry_desc {
+	enum fuse_module_type module;
+	const char *node_path;
+	u32 fuse_word_offset;
+	u32 fuse_bit_offset;
+	u32 status;
+};
+
+#if !CONFIG_IS_ENABLED(IMX_MODULE_FUSE)
+static inline u32 check_module_fused(enum fuse_module_type module)
+{
+	return 0;
+};
+
+static inline u32 esdhc_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 ecspi_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 uart_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 usb_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 qspi_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 i2c_fused(ulong base_addr)
+{
+	return 0;
+};
+
+static inline u32 enet_fused(ulong base_addr)
+{
+	return 0;
+};
+#else
+u32 check_module_fused(enum fuse_module_type module);
+u32 esdhc_fused(ulong base_addr);
+u32 ecspi_fused(ulong base_addr);
+u32 uart_fused(ulong base_addr);
+u32 usb_fused(ulong base_addr);
+u32 qspi_fused(ulong base_addr);
+u32 i2c_fused(ulong base_addr);
+u32 enet_fused(ulong base_addr);
+#endif
+#endif /* __MODULE_FUSE_H__ */
diff --git a/arch/arm/include/asm/mach-imx/regs-apbh.h b/arch/arm/include/asm/mach-imx/regs-apbh.h
index d7baf13343..94c330c7f9 100644
--- a/arch/arm/include/asm/mach-imx/regs-apbh.h
+++ b/arch/arm/include/asm/mach-imx/regs-apbh.h
@@ -7,6 +7,7 @@
  *
  * Based on code from LTIB:
  * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2020 NXP
  */
 
 #ifndef __REGS_APBH_H__
@@ -95,7 +96,7 @@ struct mxs_apbh_regs {
 	mxs_reg_32(hw_apbh_version)
 };
 
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
+#else
 struct mxs_apbh_regs {
 	mxs_reg_32(hw_apbh_ctrl0)
 	mxs_reg_32(hw_apbh_ctrl1)
@@ -274,7 +275,7 @@ struct mxs_apbh_regs {
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND7		0x0800
 #define	APBH_CTRL0_CLKGATE_CHANNEL_HSADC		0x1000
 #define	APBH_CTRL0_CLKGATE_CHANNEL_LCDIF		0x2000
-#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7))
+#elif (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
 #define	APBH_CTRL0_CLKGATE_CHANNEL_OFFSET		0
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND0		0x0001
 #define	APBH_CTRL0_CLKGATE_CHANNEL_NAND1		0x0002
@@ -357,7 +358,6 @@ struct mxs_apbh_regs {
 
 #if defined(CONFIG_MX28)
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_MASK		(0xffff << 16)
-#define	APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET		16
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP0		(0x0001 << 16)
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP1		(0x0002 << 16)
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_SSP2		(0x0004 << 16)
@@ -390,9 +390,8 @@ struct mxs_apbh_regs {
 #define	APBH_CHANNEL_CTRL_FREEZE_CHANNEL_LCDIF		0x2000
 #endif
 
-#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
+/* Not on i.MX23 */
 #define	APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET		16
-#endif
 
 #if defined(CONFIG_MX23)
 #define	APBH_DEVSEL_CH7_MASK				(0xf << 28)
diff --git a/arch/arm/include/asm/mach-imx/regs-bch.h b/arch/arm/include/asm/mach-imx/regs-bch.h
index 39ac5f4d45..5a149002e2 100644
--- a/arch/arm/include/asm/mach-imx/regs-bch.h
+++ b/arch/arm/include/asm/mach-imx/regs-bch.h
@@ -6,7 +6,9 @@
  * on behalf of DENX Software Engineering GmbH
  *
  * Based on code from LTIB:
- * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008-2010, 2016 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2020 NXP
+ *
  */
 
 #ifndef __MX28_REGS_BCH_H__
@@ -40,6 +42,7 @@ struct mxs_bch_regs {
 	mxs_reg_32(hw_bch_dbgahbmread)
 	mxs_reg_32(hw_bch_blockname)
 	mxs_reg_32(hw_bch_version)
+	mxs_reg_32(hw_bch_debug1)
 };
 #endif
 
@@ -75,6 +78,9 @@ struct mxs_bch_regs {
 
 #define	BCH_MODE_ERASE_THRESHOLD_MASK			0xff
 #define	BCH_MODE_ERASE_THRESHOLD_OFFSET			0
+#define BCH_MODE_ERASE_THRESHOLD(v)			\
+	(((v) << BCH_MODE_ERASE_THRESHOLD_OFFSET) &	\
+	 BCH_MODE_ERASE_THRESHOLD_MASK)
 
 #define	BCH_ENCODEPTR_ADDR_MASK				0xffffffff
 #define	BCH_ENCODEPTR_ADDR_OFFSET			0
@@ -122,7 +128,7 @@ struct mxs_bch_regs {
 #define	BCH_FLASHLAYOUT0_NBLOCKS_OFFSET			24
 #define	BCH_FLASHLAYOUT0_META_SIZE_MASK			(0xff << 16)
 #define	BCH_FLASHLAYOUT0_META_SIZE_OFFSET		16
-#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
+#if (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
 #define	BCH_FLASHLAYOUT0_ECC0_MASK			(0x1f << 11)
 #define	BCH_FLASHLAYOUT0_ECC0_OFFSET			11
 #else
@@ -146,14 +152,14 @@ struct mxs_bch_regs {
 #define	BCH_FLASHLAYOUT0_ECC0_ECC28			(0xe << 12)
 #define	BCH_FLASHLAYOUT0_ECC0_ECC30			(0xf << 12)
 #define	BCH_FLASHLAYOUT0_ECC0_ECC32			(0x10 << 12)
-#define	BCH_FLASHLAYOUT0_GF13_0_GF14_1			(1 << 10)
+#define	BCH_FLASHLAYOUT0_GF13_0_GF14_1_MASK		BIT(10)
 #define	BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET		10
-#define	BCH_FLASHLAYOUT0_DATA0_SIZE_MASK		0xfff
+#define	BCH_FLASHLAYOUT0_DATA0_SIZE_MASK		0x3ff
 #define	BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET		0
 
 #define	BCH_FLASHLAYOUT1_PAGE_SIZE_MASK			(0xffff << 16)
 #define	BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET		16
-#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
+#if (defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || defined(CONFIG_IMX8M))
 #define	BCH_FLASHLAYOUT1_ECCN_MASK			(0x1f << 11)
 #define	BCH_FLASHLAYOUT1_ECCN_OFFSET			11
 #else
@@ -177,9 +183,9 @@ struct mxs_bch_regs {
 #define	BCH_FLASHLAYOUT1_ECCN_ECC28			(0xe << 12)
 #define	BCH_FLASHLAYOUT1_ECCN_ECC30			(0xf << 12)
 #define	BCH_FLASHLAYOUT1_ECCN_ECC32			(0x10 << 12)
-#define	BCH_FLASHLAYOUT1_GF13_0_GF14_1			(1 << 10)
+#define	BCH_FLASHLAYOUT1_GF13_0_GF14_1_MASK		BIT(10)
 #define	BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET		10
-#define	BCH_FLASHLAYOUT1_DATAN_SIZE_MASK		0xfff
+#define	BCH_FLASHLAYOUT1_DATAN_SIZE_MASK		0x3ff
 #define	BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET		0
 
 #define	BCH_DEBUG0_RSVD1_MASK				(0x1f << 27)
diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h
index 35b39b1f86..0bc705df17 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -9,14 +9,17 @@
 
 #include <asm/io.h>
 #include <asm/mach-imx/regs-common.h>
-#include <common.h>
+#include <asm/mach-imx/module_fuse.h>
+#include <linux/bitops.h>
 #include "../arch-imx/cpu.h"
 
+struct bd_info;
+
 #define soc_rev() (get_cpu_rev() & 0xFF)
 #define is_soc_rev(rev) (soc_rev() == rev)
 
 /* returns MXC_CPU_ value */
-#define cpu_type(rev) (((rev) >> 12) & 0xff)
+#define cpu_type(rev) (((rev) >> 12) & 0x1ff)
 #define soc_type(rev) (((rev) >> 12) & 0xf0)
 /* both macros return/take MXC_CPU_ constants */
 #define get_cpu_type() (cpu_type(get_cpu_rev()))
@@ -37,13 +40,15 @@
 #define is_mx6sl() (is_cpu_type(MXC_CPU_MX6SL))
 #define is_mx6solo() (is_cpu_type(MXC_CPU_MX6SOLO))
 #define is_mx6ul() (is_cpu_type(MXC_CPU_MX6UL))
-#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL))
+#define is_mx6ull() (is_cpu_type(MXC_CPU_MX6ULL) || is_cpu_type(MXC_CPU_MX6ULZ))
 #define is_mx6ulz() (is_cpu_type(MXC_CPU_MX6ULZ))
 #define is_mx6sll() (is_cpu_type(MXC_CPU_MX6SLL))
 
 #define is_mx7ulp() (is_cpu_type(MXC_CPU_MX7ULP))
 
-#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ))
+#define is_imx8mq() (is_cpu_type(MXC_CPU_IMX8MQ) || is_cpu_type(MXC_CPU_IMX8MD) || is_cpu_type(MXC_CPU_IMX8MQL))
+#define is_imx8md() (is_cpu_type(MXC_CPU_IMX8MD))
+#define is_imx8mql() (is_cpu_type(MXC_CPU_IMX8MQL))
 #define is_imx8qm() (is_cpu_type(MXC_CPU_IMX8QM))
 #define is_imx8mm() (is_cpu_type(MXC_CPU_IMX8MM) || is_cpu_type(MXC_CPU_IMX8MML) ||\
 	is_cpu_type(MXC_CPU_IMX8MMD) || is_cpu_type(MXC_CPU_IMX8MMDL) || \
@@ -53,7 +58,14 @@
 #define is_imx8mmdl() (is_cpu_type(MXC_CPU_IMX8MMDL))
 #define is_imx8mms() (is_cpu_type(MXC_CPU_IMX8MMS))
 #define is_imx8mmsl() (is_cpu_type(MXC_CPU_IMX8MMSL))
-#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN))
+#define is_imx8mn() (is_cpu_type(MXC_CPU_IMX8MN) || is_cpu_type(MXC_CPU_IMX8MND) || \
+	is_cpu_type(MXC_CPU_IMX8MNS) || is_cpu_type(MXC_CPU_IMX8MNL) || \
+	is_cpu_type(MXC_CPU_IMX8MNDL) || is_cpu_type(MXC_CPU_IMX8MNSL))
+#define is_imx8mnd() (is_cpu_type(MXC_CPU_IMX8MND))
+#define is_imx8mns() (is_cpu_type(MXC_CPU_IMX8MNS))
+#define is_imx8mnl() (is_cpu_type(MXC_CPU_IMX8MNL))
+#define is_imx8mndl() (is_cpu_type(MXC_CPU_IMX8MNDL))
+#define is_imx8mnsl() (is_cpu_type(MXC_CPU_IMX8MNSL))
 #define is_imx8mp() (is_cpu_type(MXC_CPU_IMX8MP))
 
 #define is_imx8qxp() (is_cpu_type(MXC_CPU_IMX8QXP))
@@ -172,7 +184,7 @@ char nxp_board_rev_string(void);
  * Initializes on-chip ethernet controllers.
  * to override, implement board_eth_init()
  */
-int fecmxc_initialize(bd_t *bis);
+int fecmxc_initialize(struct bd_info *bis);
 u32 get_ahb_clk(void);
 u32 get_periph_clk(void);
 
@@ -188,4 +200,6 @@ unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
 unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0,
 				unsigned long *reg1, unsigned long reg2,
 				unsigned long reg3);
+
+void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
 #endif
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 54b7cd19bb..de8fc99d04 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -10,10 +10,12 @@
 
 #ifndef __ASSEMBLY__
 
-#include <common.h>
+#include <linux/types.h>
 
 #define NUM_SYS_CLKS	7
 
+struct bd_info;
+
 struct prcm_regs {
 	/* cm1.ckgen */
 	u32 cm_clksel_core;
@@ -683,9 +685,9 @@ void omap_die_id(unsigned int *die_id);
 void gpi2c_init(void);
 
 /* Common FDT Fixups */
-int ft_hs_disable_rng(void *fdt, bd_t *bd);
-int ft_hs_fixup_dram(void *fdt, bd_t *bd);
-int ft_hs_add_tee(void *fdt, bd_t *bd);
+int ft_hs_disable_rng(void *fdt, struct bd_info *bd);
+int ft_hs_fixup_dram(void *fdt, struct bd_info *bd);
+int ft_hs_add_tee(void *fdt, struct bd_info *bd);
 
 /* ABB */
 #define OMAP_ABB_NOMINAL_OPP		0
diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h
index 6d31cc4422..7933ad5a86 100644
--- a/arch/arm/include/asm/omap_mmc.h
+++ b/arch/arm/include/asm/omap_mmc.h
@@ -26,6 +26,9 @@
 #define OMAP_MMC_H_
 
 #include <mmc.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 struct hsmmc {
 #ifndef CONFIG_OMAP34XX
diff --git a/arch/arm/include/asm/omap_sec_common.h b/arch/arm/include/asm/omap_sec_common.h
index f10a41f304..30f0a9f5cb 100644
--- a/arch/arm/include/asm/omap_sec_common.h
+++ b/arch/arm/include/asm/omap_sec_common.h
@@ -8,8 +8,6 @@
 #ifndef	_OMAP_SEC_COMMON_H_
 #define	_OMAP_SEC_COMMON_H_
 
-#include <common.h>
-
 /*
  * Invoke secure ROM API on high-security (HS) device variants. It formats
  * the variable argument list into the format expected by the ROM code before
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 3ddcd95a26..67e9234066 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -18,6 +18,10 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define ARM_PSCI_VER_1_0		(0x00010000)
 #define ARM_PSCI_VER_0_2		(0x00000002)
 
@@ -96,6 +100,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
 u32 psci_get_target_pc(int cpu);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 81ccead112..7a40b56acd 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_ARM_SYSTEM_H
 #define __ASM_ARM_SYSTEM_H
 
-#include <common.h>
 #include <linux/compiler.h>
 #include <asm/barriers.h>
 
@@ -110,6 +109,8 @@
 
 #ifndef __ASSEMBLY__
 
+struct pt_regs;
+
 u64 get_page_table_size(void);
 #define PGTABLE_SIZE	get_page_table_size()
 
@@ -485,6 +486,14 @@ enum dcache_option {
 };
 #endif
 
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITETHROUGH
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITEALLOC
+#elif defined(CONFIG_SYS_ARM_CACHE_WRITEBACK)
+#define DCACHE_DEFAULT_OPTION	DCACHE_WRITEBACK
+#endif
+
 /* Size of an MMU section */
 enum {
 #ifdef CONFIG_ARMV7_LPAE
@@ -519,6 +528,7 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop);
 
 #ifdef CONFIG_ARMV7_PSCI
 void psci_arch_cpu_entry(void);
+void psci_arch_init(void);
 u32 psci_version(void);
 s32 psci_features(u32 function_id, u32 psci_fid);
 s32 psci_cpu_off(void);
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index bba1048499..0852ce80a6 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -11,6 +11,9 @@
 
 #include <asm/io.h>
 #include <phy.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /* EMAC */
 #ifdef CONFIG_KSNET_NETCP_V1_0
diff --git a/arch/arm/include/asm/ti-common/omap_wdt.h b/arch/arm/include/asm/ti-common/omap_wdt.h
index fbc421b630..42d7e4c989 100644
--- a/arch/arm/include/asm/ti-common/omap_wdt.h
+++ b/arch/arm/include/asm/ti-common/omap_wdt.h
@@ -10,6 +10,10 @@
 #ifndef __OMAP_WDT_H__
 #define __OMAP_WDT_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * Watchdog:
  * Using the prescaler, the OMAP watchdog could go for many
diff --git a/arch/arm/include/asm/ti-common/ti-edma3.h b/arch/arm/include/asm/ti-common/ti-edma3.h
index 96c8a31fb8..9abdbc88e4 100644
--- a/arch/arm/include/asm/ti-common/ti-edma3.h
+++ b/arch/arm/include/asm/ti-common/ti-edma3.h
@@ -9,6 +9,9 @@
 #ifndef _EDMA3_H_
 #define _EDMA3_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 #include <linux/stddef.h>
 
 #define EDMA3_PARSET_NULL_LINK			0xffff
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 8482f5446c..b839aa7a50 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -57,7 +57,7 @@ obj-y	+= interrupts_64.o
 else
 obj-y	+= interrupts.o
 endif
-ifndef CONFIG_SYSRESET
+ifndef CONFIG_$(SPL_TPL_)SYSRESET
 obj-y	+= reset.o
 endif
 
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index f4b5ca6de0..2df98d3e01 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -12,10 +12,13 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <hang.h>
+#include <lmb.h>
+#include <log.h>
 #include <dm/root.h>
 #include <env.h>
 #include <image.h>
@@ -29,6 +32,7 @@
 #include <linux/compiler.h>
 #include <bootm.h>
 #include <vxworks.h>
+#include <asm/cache.h>
 
 #ifdef CONFIG_ARMV7_NONSEC
 #include <asm/armv7.h>
@@ -419,7 +423,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
  * DIFFERENCE: Instead of calling prep and go at the end
  * they are called if subcommand is equal 0.
  */
-int do_bootm_linux(int flag, int argc, char * const argv[],
+int do_bootm_linux(int flag, int argc, char *const argv[],
 		   bootm_headers_t *images)
 {
 	/* No need for those on ARM */
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index f8d20960da..1da2e92fe2 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/system.h>
 #include <asm/cache.h>
 #include <linux/compiler.h>
@@ -61,8 +62,11 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
 	unsigned long startpt, stoppt;
 	unsigned long upto, end;
 
-	end = ALIGN(start + size, MMU_SECTION_SIZE) >> MMU_SECTION_SHIFT;
+	/* div by 2 before start + size to avoid phys_addr_t overflow */
+	end = ALIGN((start / 2) + (size / 2), MMU_SECTION_SIZE / 2)
+	      >> (MMU_SECTION_SHIFT - 1);
 	start = start >> MMU_SECTION_SHIFT;
+
 #ifdef CONFIG_ARMV7_LPAE
 	debug("%s: start=%pa, size=%zu, option=%llx\n", __func__, &start, size,
 	      option);
@@ -91,19 +95,16 @@ __weak void dram_bank_mmu_setup(int bank)
 	bd_t *bd = gd->bd;
 	int	i;
 
+	/* bd->bi_dram is available only after relocation */
+	if ((gd->flags & GD_FLG_RELOC) == 0)
+		return;
+
 	debug("%s: bank: %d\n", __func__, bank);
 	for (i = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
 	     i < (bd->bi_dram[bank].start >> MMU_SECTION_SHIFT) +
 		 (bd->bi_dram[bank].size >> MMU_SECTION_SHIFT);
-	     i++) {
-#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
-		set_section_dcache(i, DCACHE_WRITETHROUGH);
-#elif defined(CONFIG_SYS_ARM_CACHE_WRITEALLOC)
-		set_section_dcache(i, DCACHE_WRITEALLOC);
-#else
-		set_section_dcache(i, DCACHE_WRITEBACK);
-#endif
-	}
+	     i++)
+		set_section_dcache(i, DCACHE_DEFAULT_OPTION);
 }
 
 /* to activate the MMU we need to set up virtual memory: use 1M areas */
diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c
index 44dde26065..ee7d14b2d3 100644
--- a/arch/arm/lib/cache.c
+++ b/arch/arm/lib/cache.c
@@ -8,7 +8,9 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -75,6 +77,15 @@ static unsigned long noncached_start;
 static unsigned long noncached_end;
 static unsigned long noncached_next;
 
+void noncached_set_region(void)
+{
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+	mmu_set_region_dcache_behaviour(noncached_start,
+					noncached_end - noncached_start,
+					DCACHE_OFF);
+#endif
+}
+
 void noncached_init(void)
 {
 	phys_addr_t start, end;
@@ -91,9 +102,7 @@ void noncached_init(void)
 	noncached_end = end;
 	noncached_next = start;
 
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-	mmu_set_region_dcache_behaviour(noncached_start, size, DCACHE_OFF);
-#endif
+	noncached_set_region();
 }
 
 phys_addr_t noncached_alloc(size_t size, size_t align)
diff --git a/arch/arm/lib/cmd_boot.c b/arch/arm/lib/cmd_boot.c
index 03dde84252..c905ecc4bd 100644
--- a/arch/arm/lib/cmd_boot.c
+++ b/arch/arm/lib/cmd_boot.c
@@ -32,7 +32,7 @@
  *    instructions, otherwise a fault occurs."
  */
 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
-			 int argc, char * const argv[])
+			 int argc, char *const argv[])
 {
 	ulong addr = (ulong)entry | 1;
 	entry = (void *)addr;
diff --git a/arch/arm/lib/gic-v3-its.c b/arch/arm/lib/gic-v3-its.c
index 6ee22d2944..90f37a123c 100644
--- a/arch/arm/lib/gic-v3-its.c
+++ b/arch/arm/lib/gic-v3-its.c
@@ -6,6 +6,7 @@
 #include <asm/gic.h>
 #include <asm/gic-v3.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 
 static u32 lpi_id_bits;
diff --git a/arch/arm/lib/image.c b/arch/arm/lib/image.c
index 699bf44e70..94590d3049 100644
--- a/arch/arm/lib/image.c
+++ b/arch/arm/lib/image.c
@@ -5,7 +5,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <mapmem.h>
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 6dbf03b00c..703be5a320 100644
--- a/arch/arm/lib/interrupts.c
+++ b/arch/arm/lib/interrupts.c
@@ -23,6 +23,7 @@
 #include <efi_loader.h>
 #include <irq_func.h>
 #include <asm/proc-armv/ptrace.h>
+#include <asm/ptrace.h>
 #include <asm/u-boot-arm.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -34,6 +35,8 @@ int interrupt_init(void)
 	 */
 	IRQ_STACK_START_IN = gd->irq_sp + 8;
 
+	enable_interrupts();
+
 	return 0;
 }
 
diff --git a/arch/arm/lib/interrupts_64.c b/arch/arm/lib/interrupts_64.c
index dffdf57aa2..5299489013 100644
--- a/arch/arm/lib/interrupts_64.c
+++ b/arch/arm/lib/interrupts_64.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <irq_func.h>
 #include <linux/compiler.h>
 #include <efi_loader.h>
@@ -13,6 +14,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int interrupt_init(void)
 {
+	enable_interrupts();
+
 	return 0;
 }
 
diff --git a/arch/arm/lib/interrupts_m.c b/arch/arm/lib/interrupts_m.c
index 1f6fdf2995..2ae1c5ba76 100644
--- a/arch/arm/lib/interrupts_m.c
+++ b/arch/arm/lib/interrupts_m.c
@@ -31,6 +31,8 @@ struct autosave_regs {
 
 int interrupt_init(void)
 {
+	enable_interrupts();
+
 	return 0;
 }
 
diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c
index 246f3c7cb8..0ed29a43f1 100644
--- a/arch/arm/lib/psci-dt.c
+++ b/arch/arm/lib/psci-dt.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm/cache.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 835a40e59d..4f1a768bfe 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -21,18 +21,20 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <linux/delay.h>
 
 __weak void reset_misc(void)
 {
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	puts ("resetting ...\n");
 
-	udelay (50000);				/* wait 50 ms */
+	mdelay(50);				/* wait 50 ms */
 
 	disable_interrupts();
 
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
index 2658026cf4..904fddd6c0 100644
--- a/arch/arm/lib/semihosting.c
+++ b/arch/arm/lib/semihosting.c
@@ -13,6 +13,8 @@
  */
 #include <common.h>
 #include <command.h>
+#include <env.h>
+#include <log.h>
 
 #define SYSOPEN		0x01
 #define SYSCLOSE	0x02
@@ -180,7 +182,8 @@ static int smh_load_file(const char * const name, ulong load_addr,
 	return 0;
 }
 
-static int do_smhload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_smhload(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	if (argc == 3 || argc == 4) {
 		ulong load_addr;
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index 33cc76ba3d..af0c9ad6bd 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -9,8 +9,11 @@
 
 #include <common.h>
 #include <config.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <image.h>
+#include <asm/cache.h>
 #include <linux/compiler.h>
 #include <asm/mach-types.h>
 
diff --git a/arch/arm/lib/stack.c b/arch/arm/lib/stack.c
index c89a219dd2..96a248c0a9 100644
--- a/arch/arm/lib/stack.c
+++ b/arch/arm/lib/stack.c
@@ -11,6 +11,7 @@
  * Marius Groeger <mgroeger@sysgo.de>
  */
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/lib/zimage.c b/arch/arm/lib/zimage.c
index 49305299b3..477ea94997 100644
--- a/arch/arm/lib/zimage.c
+++ b/arch/arm/lib/zimage.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2012 Marek Vasut <marek.vasut@gmail.com>
  */
 #include <common.h>
+#include <image.h>
 
 #define	LINUX_ARM_ZIMAGE_MAGIC	0x016f2818
 #define	BAREBOX_IMAGE_MAGIC	0x00786f62
diff --git a/arch/arm/mach-aspeed/ast2500-board.c b/arch/arm/mach-aspeed/ast2500-board.c
index e7edd544e2..f74dcbbb62 100644
--- a/arch/arm/mach-aspeed/ast2500-board.c
+++ b/arch/arm/mach-aspeed/ast2500-board.c
@@ -4,6 +4,8 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <timer.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
index 9498cbc92d..a3adaa8a99 100644
--- a/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
+++ b/arch/arm/mach-aspeed/ast2500/sdram_ast2500.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <reset.h>
diff --git a/arch/arm/mach-at91/arm920t/cpu.c b/arch/arm/mach-at91/arm920t/cpu.c
index 42d0d2269f..44c079c0fd 100644
--- a/arch/arm/mach-at91/arm920t/cpu.c
+++ b/arch/arm/mach-at91/arm920t/cpu.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/clk.h>
diff --git a/arch/arm/mach-at91/arm920t/timer.c b/arch/arm/mach-at91/arm920t/timer.c
index 3aef9538b4..dca2d2c70c 100644
--- a/arch/arm/mach-at91/arm920t/timer.c
+++ b/arch/arm/mach-at91/arm920t/timer.c
@@ -14,7 +14,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm926ejs/cpu.c b/arch/arm/mach-at91/arm926ejs/cpu.c
index e9b4e06595..761edb6df5 100644
--- a/arch/arm/mach-at91/arm926ejs/cpu.c
+++ b/arch/arm/mach-at91/arm926ejs/cpu.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <vsprintf.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c
index 7b61fa7226..23c24936ed 100644
--- a/arch/arm/mach-at91/arm926ejs/eflash.c
+++ b/arch/arm/mach-at91/arm926ejs/eflash.c
@@ -43,6 +43,8 @@
  * do a read-modify-write for partially programmed pages
  */
 #include <common.h>
+#include <flash.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_common.h>
@@ -58,7 +60,7 @@
 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 static u32 pagesize;
 
-unsigned long flash_init (void)
+unsigned long flash_init(void)
 {
 	at91_eefc_t *eefc = (at91_eefc_t *) ATMEL_BASE_EEFC;
 	at91_dbu_t *dbu = (at91_dbu_t *) ATMEL_BASE_DBGU;
@@ -127,7 +129,7 @@ unsigned long flash_init (void)
 	return size;
 }
 
-void flash_print_info (flash_info_t *info)
+void flash_print_info(flash_info_t *info)
 {
 	int i;
 
@@ -202,7 +204,7 @@ static u32 erase_write_page (u32 pagenum)
 		& (AT91_EEFC_FSR_FCMDE | AT91_EEFC_FSR_FLOCKE);
 }
 
-int flash_erase (flash_info_t *info, int s_first, int s_last)
+int flash_erase(flash_info_t *info, int s_first, int s_last)
 {
 	debug("erase first=%d last=%d\n", s_first, s_last);
 	puts("this flash does not need and support erasing!\n");
@@ -215,7 +217,7 @@ int flash_erase (flash_info_t *info, int s_first, int s_last)
  * 1 - write timeout
  */
 
-int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
 	u32 pagenum;
 	u32 *src32, *dst32;
diff --git a/arch/arm/mach-at91/arm926ejs/timer.c b/arch/arm/mach-at91/arm926ejs/timer.c
index 31ad0bf702..42ef349966 100644
--- a/arch/arm/mach-at91/arm926ejs/timer.c
+++ b/arch/arm/mach-at91/arm926ejs/timer.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/armv7/clock.c b/arch/arm/mach-at91/armv7/clock.c
index 3640fce882..3926896958 100644
--- a/arch/arm/mach-at91/armv7/clock.c
+++ b/arch/arm/mach-at91/armv7/clock.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/armv7/cpu.c b/arch/arm/mach-at91/armv7/cpu.c
index 4474a96743..a8f4356ce9 100644
--- a/arch/arm/mach-at91/armv7/cpu.c
+++ b/arch/arm/mach-at91/armv7/cpu.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <vsprintf.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/armv7/timer.c b/arch/arm/mach-at91/armv7/timer.c
index 15c036cc27..a6346c01b2 100644
--- a/arch/arm/mach-at91/armv7/timer.c
+++ b/arch/arm/mach-at91/armv7/timer.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h
index f423afd0ad..2ce99d956c 100644
--- a/arch/arm/mach-at91/include/mach/at91_pmc.h
+++ b/arch/arm/mach-at91/include/mach/at91_pmc.h
@@ -24,6 +24,7 @@
 #else
 
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 typedef struct at91_pmc {
 	u32	scer;		/* 0x00 System Clock Enable Register */
diff --git a/arch/arm/mach-at91/include/mach/at91_sfr.h b/arch/arm/mach-at91/include/mach/at91_sfr.h
index 0300c336dd..4517df41bc 100644
--- a/arch/arm/mach-at91/include/mach/at91_sfr.h
+++ b/arch/arm/mach-at91/include/mach/at91_sfr.h
@@ -9,6 +9,7 @@
 #ifndef __AT91_SFR_H
 #define __AT91_SFR_H
 
+#include <linux/bitops.h>
 struct atmel_sfr {
 	u32 reserved1;	/* 0x00 */
 	union {
diff --git a/arch/arm/mach-at91/include/mach/atmel_pio4.h b/arch/arm/mach-at91/include/mach/atmel_pio4.h
index 7a03d6d3c7..f348b05bc8 100644
--- a/arch/arm/mach-at91/include/mach/atmel_pio4.h
+++ b/arch/arm/mach-at91/include/mach/atmel_pio4.h
@@ -9,6 +9,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/bitops.h>
 struct atmel_pio4_port {
 	u32 mskr;		/* 0x00 PIO Mask Register */
 	u32 cfgr;		/* 0x04 PIO Configuration Register */
diff --git a/arch/arm/mach-at91/mpddrc.c b/arch/arm/mach-at91/mpddrc.c
index 3df0ea7c79..5422c05456 100644
--- a/arch/arm/mach-at91/mpddrc.c
+++ b/arch/arm/mach-at91/mpddrc.c
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <asm/arch/atmel_mpddrc.h>
 #include <asm/arch/at91_common.h>
+#include <linux/delay.h>
 
 #define SAMA5D3_MPDDRC_VERSION		0x140
 
diff --git a/arch/arm/mach-at91/phy.c b/arch/arm/mach-at91/phy.c
index a10c0cae74..6101eee358 100644
--- a/arch/arm/mach-at91/phy.c
+++ b/arch/arm/mach-at91/phy.c
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <asm/hardware.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <asm/arch/at91_rstc.h>
 #include <watchdog.h>
diff --git a/arch/arm/mach-at91/spl_at91.c b/arch/arm/mach-at91/spl_at91.c
index 822f877de7..35a3d5185d 100644
--- a/arch/arm/mach-at91/spl_at91.c
+++ b/arch/arm/mach-at91/spl_at91.c
@@ -10,6 +10,8 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91sam9_matrix.h>
diff --git a/arch/arm/mach-at91/spl_atmel.c b/arch/arm/mach-at91/spl_atmel.c
index 6ee0e1c24c..23588e79f9 100644
--- a/arch/arm/mach-at91/spl_atmel.c
+++ b/arch/arm/mach-at91/spl_atmel.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pit.h>
diff --git a/arch/arm/mach-bcm283x/Kconfig b/arch/arm/mach-bcm283x/Kconfig
index 00419bf254..e6eb904e7f 100644
--- a/arch/arm/mach-bcm283x/Kconfig
+++ b/arch/arm/mach-bcm283x/Kconfig
@@ -209,4 +209,6 @@ config SYS_SOC
 config SYS_CONFIG_NAME
 	default "rpi"
 
+source "board/raspberrypi/rpi/Kconfig"
+
 endmenu
diff --git a/arch/arm/mach-bcm283x/include/mach/timer.h b/arch/arm/mach-bcm283x/include/mach/timer.h
index 01c0ebad64..5567dbd7f3 100644
--- a/arch/arm/mach-bcm283x/include/mach/timer.h
+++ b/arch/arm/mach-bcm283x/include/mach/timer.h
@@ -8,6 +8,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/arch/base.h>
+#include <linux/bug.h>
 #endif
 
 #define BCM2835_TIMER_PHYSADDR ({ BUG_ON(!rpi_bcm283x_base); \
diff --git a/arch/arm/mach-bcm283x/init.c b/arch/arm/mach-bcm283x/init.c
index 9966d6c833..f4d00d892d 100644
--- a/arch/arm/mach-bcm283x/init.c
+++ b/arch/arm/mach-bcm283x/init.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <dm/device.h>
 #include <fdt_support.h>
 
diff --git a/arch/arm/mach-bcm283x/mbox.c b/arch/arm/mach-bcm283x/mbox.c
index 1785550642..da9faafe1d 100644
--- a/arch/arm/mach-bcm283x/mbox.c
+++ b/arch/arm/mach-bcm283x/mbox.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/base.h>
 #include <asm/arch/mbox.h>
diff --git a/arch/arm/mach-davinci/cpu.c b/arch/arm/mach-davinci/cpu.c
index 9fd6564d04..40dd44af67 100644
--- a/arch/arm/mach-davinci/cpu.c
+++ b/arch/arm/mach-davinci/cpu.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 
diff --git a/arch/arm/mach-davinci/da850_lowlevel.c b/arch/arm/mach-davinci/da850_lowlevel.c
index 822e0dc4a1..07bf19b5e4 100644
--- a/arch/arm/mach-davinci/da850_lowlevel.c
+++ b/arch/arm/mach-davinci/da850_lowlevel.c
@@ -6,6 +6,7 @@
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  */
 #include <common.h>
+#include <init.h>
 #include <nand.h>
 #include <ns16550.h>
 #include <post.h>
diff --git a/arch/arm/mach-davinci/misc.c b/arch/arm/mach-davinci/misc.c
index 3e5185261c..5bfc47dae4 100644
--- a/arch/arm/mach-davinci/misc.c
+++ b/arch/arm/mach-davinci/misc.c
@@ -12,6 +12,7 @@
 #include <env.h>
 #include <i2c.h>
 #include <init.h>
+#include <log.h>
 #include <net.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-davinci/spl.c b/arch/arm/mach-davinci/spl.c
index d44e840aa0..5fea935d6e 100644
--- a/arch/arm/mach-davinci/spl.c
+++ b/arch/arm/mach-davinci/spl.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <config.h>
 #include <hang.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
diff --git a/arch/arm/mach-davinci/timer.c b/arch/arm/mach-davinci/timer.c
index 9846463c60..a6681821f6 100644
--- a/arch/arm/mach-davinci/timer.c
+++ b/arch/arm/mach-davinci/timer.c
@@ -21,10 +21,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/timer_defs.h>
 #include <div64.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 73aa4cdad3..ef48d35aa4 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
diff --git a/arch/arm/mach-exynos/include/mach/clock.h b/arch/arm/mach-exynos/include/mach/clock.h
index e4c706adea..9d23c476f9 100644
--- a/arch/arm/mach-exynos/include/mach/clock.h
+++ b/arch/arm/mach-exynos/include/mach/clock.h
@@ -8,6 +8,7 @@
 #define __ASM_ARM_ARCH_CLOCK_H_
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 struct exynos4_clock {
 	unsigned char	res1[0x4200];
 	unsigned int	src_leftbus;
diff --git a/arch/arm/mach-exynos/include/mach/dp_info.h b/arch/arm/mach-exynos/include/mach/dp_info.h
index d3a516fbc6..3226eb95f0 100644
--- a/arch/arm/mach-exynos/include/mach/dp_info.h
+++ b/arch/arm/mach-exynos/include/mach/dp_info.h
@@ -197,4 +197,5 @@ unsigned int exynos_init_dp(void)
 }
 #endif
 
+#include <linux/delay.h>
 #endif /* _DP_INFO_H */
diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c
index 1e090fd63c..97d6ca8fc2 100644
--- a/arch/arm/mach-exynos/lowlevel_init.c
+++ b/arch/arm/mach-exynos/lowlevel_init.c
@@ -26,6 +26,8 @@
 #include <common.h>
 #include <config.h>
 #include <debug_uart.h>
+#include <asm/system.h>
+#include <init.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/dmc.h>
 #include <asm/arch/power.h>
diff --git a/arch/arm/mach-exynos/pinmux.c b/arch/arm/mach-exynos/pinmux.c
index b24f1bb8f4..ad3fbf2da7 100644
--- a/arch/arm/mach-exynos/pinmux.c
+++ b/arch/arm/mach-exynos/pinmux.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/sromc.h>
diff --git a/arch/arm/mach-exynos/soc.c b/arch/arm/mach-exynos/soc.c
index c4cf59dabb..810fa348ee 100644
--- a/arch/arm/mach-exynos/soc.c
+++ b/arch/arm/mach-exynos/soc.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/system.h>
 
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index 103bb38d45..9c7ca49519 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -5,7 +5,10 @@
 
 #include <common.h>
 #include <config.h>
+#include <init.h>
+#include <log.h>
 
+#include <asm/cache.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/dmc.h>
diff --git a/arch/arm/mach-highbank/timer.c b/arch/arm/mach-highbank/timer.c
index cd08ff444d..2423a0e378 100644
--- a/arch/arm/mach-highbank/timer.c
+++ b/arch/arm/mach-highbank/timer.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch-armv7/systimer.h>
 
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 329149900a..bed8cc7e88 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -27,6 +27,13 @@ config IMX_BOOTAUX
 	help
 	  bootaux [addr] to boot auxiliary core.
 
+config IMX_MODULE_FUSE
+	bool "i.MX Module Fuse"
+	depends on ARCH_MX6
+	help
+	  i.MX module fuse to runtime disable some driver, including
+	  Linux OS device node.
+
 config USE_IMXIMG_PLUGIN
 	bool "Use imximage plugin code"
 	depends on ARCH_MX7 || ARCH_MX6 || ARCH_MX7ULP
@@ -82,7 +89,7 @@ config CMD_NANDBCB
 	bool "i.MX6 NAND Boot Control Block(BCB) command"
 	depends on MTD_RAW_NAND && CMD_MTDPARTS
 	select BCH if MX6UL || MX6ULL
-	default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS)
+	default y if ((ARCH_MX6 || ARCH_MX7 || ARCH_IMX8M) && NAND_MXS)
 	help
 	  Unlike normal 'nand write/erase' commands, this command update
 	  Boot Control Block(BCB) for i.MX6 platform NAND IP's.
diff --git a/arch/arm/mach-imx/cache.c b/arch/arm/mach-imx/cache.c
index 4fd2e43448..4e3b49a3fd 100644
--- a/arch/arm/mach-imx/cache.c
+++ b/arch/arm/mach-imx/cache.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <asm/armv7.h>
+#include <asm/cache.h>
 #include <asm/pl310.h>
 #include <asm/io.h>
 #include <asm/mach-imx/sys_proto.h>
diff --git a/arch/arm/mach-imx/cmd_bmode.c b/arch/arm/mach-imx/cmd_bmode.c
index 2d4d6efe5a..19bfd9f9a0 100644
--- a/arch/arm/mach-imx/cmd_bmode.c
+++ b/arch/arm/mach-imx/cmd_bmode.c
@@ -54,8 +54,8 @@ static int create_usage(char *dest)
 	return size;
 }
 
-static int do_boot_mode(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+static int do_boot_mode(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	const struct boot_mode *p;
 	int reset_requested = 1;
@@ -87,7 +87,7 @@ void add_board_boot_modes(const struct boot_mode *p)
 	int size;
 	char *dest;
 
-	cmd_tbl_t *entry = ll_entry_get(cmd_tbl_t, bmode, cmd);
+	struct cmd_tbl *entry = ll_entry_get(struct cmd_tbl, bmode, cmd);
 
 	if (entry->usage) {
 		free(entry->usage);
diff --git a/arch/arm/mach-imx/cmd_dek.c b/arch/arm/mach-imx/cmd_dek.c
index 1b111ba26b..49dd473af7 100644
--- a/arch/arm/mach-imx/cmd_dek.c
+++ b/arch/arm/mach-imx/cmd_dek.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 #include <linux/compiler.h>
@@ -54,7 +55,8 @@ static int blob_encap_dek(const u8 *src, u8 *dst, u32 len)
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_dek_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_dek_blob(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	uint32_t src_addr, dst_addr, len;
 	uint8_t *src_ptr, *dst_ptr;
diff --git a/arch/arm/mach-imx/cmd_hdmidet.c b/arch/arm/mach-imx/cmd_hdmidet.c
index 6aa7d82577..e2571adfb0 100644
--- a/arch/arm/mach-imx/cmd_hdmidet.c
+++ b/arch/arm/mach-imx/cmd_hdmidet.c
@@ -3,11 +3,13 @@
  * Copyright (C) 2012 Boundary Devices Inc.
  */
 #include <common.h>
+#include <command.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mxc_hdmi.h>
 #include <asm/io.h>
 
-static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_hdmidet(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct hdmi_regs *hdmi	= (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
 	return (readb(&hdmi->phy_stat0) & HDMI_DVI_STAT) ? 0 : 1;
diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c
index b3e59b1b00..44fc37695d 100644
--- a/arch/arm/mach-imx/cmd_nandbcb.c
+++ b/arch/arm/mach-imx/cmd_nandbcb.c
@@ -1,18 +1,23 @@
 /*
- * i.MX6 nand boot control block(bcb).
+ * i.MX nand boot control block(bcb).
  *
  * Based on the common/imx-bbu-nand-fcb.c from barebox and imx kobs-ng
  *
  * Copyright (C) 2017 Jagan Teki <jagan@amarulasolutions.com>
  * Copyright (C) 2016 Sergey Kubushyn <ksi@koi8.net>
  *
+ * Reconstucted by Han Xu <han.xu@nxp.com>
+ *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <nand.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
 
 #include <asm/io.h>
 #include <jffs2/jffs2.h>
@@ -25,11 +30,296 @@
 #include <mxs_nand.h>
 #include <linux/mtd/mtd.h>
 #include <nand.h>
+#include <fuse.h>
 
 #include "../../../cmd/legacy-mtd-utils.h"
 
-#define BF_VAL(v, bf)		(((v) & bf##_MASK) >> bf##_OFFSET)
+/* FCB related flags */
+/* FCB layout with leading 12B reserved */
+#define FCB_LAYOUT_RESV_12B		BIT(0)
+/* FCB layout with leading 32B meta data */
+#define FCB_LAYOUT_META_32B		BIT(1)
+/* FCB encrypted by Hamming code */
+#define FCB_ENCODE_HAMMING		BIT(2)
+/* FCB encrypted by 40bit BCH */
+#define FCB_ENCODE_BCH_40b		BIT(3)
+/* FCB encrypted by 62bit BCH */
+#define FCB_ENCODE_BCH_62b		BIT(4)
+/* FCB encrypted by BCH */
+#define FCB_ENCODE_BCH			(FCB_ENCODE_BCH_40b | FCB_ENCODE_BCH_62b)
+/* FCB data was randomized */
+#define FCB_RANDON_ENABLED		BIT(5)
+
+/* Firmware related flags */
+/* No 1K padding */
+#define FIRMWARE_NEED_PADDING		BIT(8)
+/* Extra firmware*/
+#define FIRMWARE_EXTRA_ONE		BIT(9)
+/* Secondary firmware on fixed address */
+#define FIRMWARE_SECONDARY_FIXED_ADDR	BIT(10)
+
+/* Boot search related flags */
+#define BT_SEARCH_CNT_FROM_FUSE		BIT(16)
+
+struct platform_config {
+	int misc_flags;
+};
+
+static struct platform_config plat_config;
+
+/* imx6q/dl/solo */
+static struct platform_config imx6qdl_plat_config = {
+	.misc_flags = FCB_LAYOUT_RESV_12B |
+		     FCB_ENCODE_HAMMING |
+		     FIRMWARE_NEED_PADDING,
+};
+
+static struct platform_config imx6sx_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FIRMWARE_NEED_PADDING |
+		     FCB_RANDON_ENABLED,
+};
+
+static struct platform_config imx7d_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FIRMWARE_NEED_PADDING |
+		     FCB_RANDON_ENABLED,
+};
+
+/* imx6ul/ull/ulz */
+static struct platform_config imx6ul_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_40b |
+		     FIRMWARE_NEED_PADDING,
+};
+
+static struct platform_config imx8mq_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FIRMWARE_NEED_PADDING |
+		     FCB_RANDON_ENABLED |
+		     FIRMWARE_EXTRA_ONE,
+};
+
+/* all other imx8mm */
+static struct platform_config imx8mm_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FIRMWARE_NEED_PADDING |
+		     FCB_RANDON_ENABLED,
+};
+
+/* imx8mn */
+static struct platform_config imx8mn_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FCB_RANDON_ENABLED |
+		     FIRMWARE_SECONDARY_FIXED_ADDR |
+		     BT_SEARCH_CNT_FROM_FUSE,
+};
+
+/* imx8qx/qm */
+static struct platform_config imx8q_plat_config = {
+	.misc_flags = FCB_LAYOUT_META_32B |
+		     FCB_ENCODE_BCH_62b |
+		     FCB_RANDON_ENABLED |
+		     FIRMWARE_SECONDARY_FIXED_ADDR |
+		     BT_SEARCH_CNT_FROM_FUSE,
+};
+
+/* boot search related variables and definitions */
+static int g_boot_search_count = 4;
+static int g_boot_search_stride;
+static int g_pages_per_stride;
+
+/* mtd config structure */
+struct boot_config {
+	int dev;
+	struct mtd_info *mtd;
+	loff_t maxsize;
+	loff_t input_size;
+	loff_t offset;
+	loff_t boot_stream1_address;
+	loff_t boot_stream2_address;
+	size_t boot_stream1_size;
+	size_t boot_stream2_size;
+	size_t max_boot_stream_size;
+	int stride_size_in_byte;
+	int search_area_size_in_bytes;
+	int search_area_size_in_pages;
+	int secondary_boot_stream_off_in_MB;
+};
+
+/* boot_stream config structure */
+struct boot_stream_config {
+	char bs_label[32];
+	loff_t bs_addr;
+	size_t bs_size;
+	void *bs_buf;
+	loff_t next_bs_addr;
+	bool need_padding;
+};
+
+/* FW index */
+#define FW1_ONLY	1
+#define FW2_ONLY	2
+#define FW_ALL		FW1_ONLY | FW2_ONLY
+#define FW_INX(x)	(1 << (x))
+
+/* NAND convert macros */
+#define CONV_TO_PAGES(x)	((u32)(x) / (u32)(mtd->writesize))
+#define CONV_TO_BLOCKS(x)	((u32)(x) / (u32)(mtd->erasesize))
+
 #define GETBIT(v, n)		(((v) >> (n)) & 0x1)
+#define IMX8MQ_SPL_SZ 0x3e000
+#define IMX8MQ_HDMI_FW_SZ 0x19c00
+
+static int nandbcb_get_info(int argc, char * const argv[],
+			    struct boot_config *boot_cfg)
+{
+	int dev;
+	struct mtd_info *mtd;
+
+	dev = nand_curr_device;
+	if (dev < 0) {
+		printf("failed to get nand_curr_device, run nand device\n");
+		return CMD_RET_FAILURE;
+	}
+
+	mtd = get_nand_dev_by_index(dev);
+	if (!mtd) {
+		printf("failed to get mtd info\n");
+		return CMD_RET_FAILURE;
+	}
+
+	boot_cfg->dev = dev;
+	boot_cfg->mtd = mtd;
+
+	return CMD_RET_SUCCESS;
+}
+
+static int nandbcb_get_size(int argc, char * const argv[], int num,
+			    struct boot_config *boot_cfg)
+{
+	int dev;
+	loff_t offset, size, maxsize;
+	struct mtd_info *mtd;
+
+	dev = boot_cfg->dev;
+	mtd = boot_cfg->mtd;
+	size = 0;
+
+	if (mtd_arg_off_size(argc - num, argv + num, &dev, &offset, &size,
+			     &maxsize, MTD_DEV_TYPE_NAND, mtd->size))
+		return CMD_RET_FAILURE;
+
+	boot_cfg->maxsize = maxsize;
+	boot_cfg->offset = offset;
+
+	debug("max: %llx, offset: %llx\n", maxsize, offset);
+
+	if (size && size != maxsize)
+		boot_cfg->input_size = size;
+
+	return CMD_RET_SUCCESS;
+}
+
+static int nandbcb_set_boot_config(int argc, char * const argv[],
+				   struct boot_config *boot_cfg)
+{
+	struct mtd_info *mtd;
+	loff_t maxsize;
+	loff_t boot_stream1_address, boot_stream2_address, max_boot_stream_size;
+
+	if (!boot_cfg->mtd) {
+		printf("Didn't get the mtd info, quit\n");
+		return CMD_RET_FAILURE;
+	}
+	mtd = boot_cfg->mtd;
+
+	/*
+	 * By default
+	 * set the search count as 4
+	 * set each FCB/DBBT/Firmware offset at the beginning of blocks
+	 * customers may change the value as needed
+	 */
+
+	/* if need more compact layout, change these values */
+	/* g_boot_search_count was set as 4 at the definition*/
+	/* g_pages_per_stride was set as block size */
+
+	g_pages_per_stride = mtd->erasesize / mtd->writesize;
+
+	g_boot_search_stride = mtd->writesize * g_pages_per_stride;
+
+	boot_cfg->stride_size_in_byte = g_boot_search_stride * mtd->writesize;
+	boot_cfg->search_area_size_in_bytes =
+		g_boot_search_count * g_boot_search_stride;
+	boot_cfg->search_area_size_in_pages =
+		boot_cfg->search_area_size_in_bytes / mtd->writesize;
+
+	/* after FCB/DBBT, split the rest of area for two Firmwares */
+	if (!boot_cfg->maxsize) {
+		printf("Didn't get the maxsize, quit\n");
+		return CMD_RET_FAILURE;
+	}
+	maxsize = boot_cfg->maxsize;
+	/* align to page boundary */
+	maxsize = ((u32)(maxsize + mtd->writesize - 1)) / (u32)mtd->writesize
+			* mtd->writesize;
+
+	boot_stream1_address = 2 * boot_cfg->search_area_size_in_bytes;
+	boot_stream2_address = ((maxsize - boot_stream1_address) / 2 +
+			       boot_stream1_address);
+
+	if (boot_cfg->secondary_boot_stream_off_in_MB)
+		boot_stream2_address = boot_cfg->secondary_boot_stream_off_in_MB * 1024 * 1024;
+
+	max_boot_stream_size = boot_stream2_address - boot_stream1_address;
+
+	/* sanity check */
+	if (max_boot_stream_size <= 0) {
+		debug("st1_addr: %llx, st2_addr: %llx, max: %llx\n",
+		      boot_stream1_address, boot_stream2_address,
+		      max_boot_stream_size);
+		printf("something wrong with firmware address settings\n");
+		return CMD_RET_FAILURE;
+	}
+	boot_cfg->boot_stream1_address = boot_stream1_address;
+	boot_cfg->boot_stream2_address = boot_stream2_address;
+	boot_cfg->max_boot_stream_size = max_boot_stream_size;
+
+	/* set the boot_stream size as the input size now */
+	if (boot_cfg->input_size) {
+		boot_cfg->boot_stream1_size = boot_cfg->input_size;
+		boot_cfg->boot_stream2_size = boot_cfg->input_size;
+	}
+
+	return CMD_RET_SUCCESS;
+}
+
+static int nandbcb_check_space(struct boot_config *boot_cfg)
+{
+	size_t maxsize = boot_cfg->maxsize;
+	size_t max_boot_stream_size = boot_cfg->max_boot_stream_size;
+	loff_t boot_stream2_address = boot_cfg->boot_stream2_address;
+
+	if (boot_cfg->boot_stream1_size &&
+	    boot_cfg->boot_stream1_size > max_boot_stream_size) {
+		printf("boot stream1 doesn't fit, check partition size or settings\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (boot_cfg->boot_stream2_size &&
+	    boot_cfg->boot_stream2_size > maxsize - boot_stream2_address) {
+		printf("boot stream2 doesn't fit, check partition size or settings\n");
+		return CMD_RET_FAILURE;
+	}
+
+	return CMD_RET_SUCCESS;
+}
 
 #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
 static uint8_t reverse_bit(uint8_t b)
@@ -132,9 +422,9 @@ static u32 calc_chksum(void *buf, size_t size)
 	return ~chksum;
 }
 
-static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd,
-		     u32 fw1_start, u32 fw2_start, u32 fw_pages)
+static void fill_fcb(struct fcb_block *fcb, struct boot_config *boot_cfg)
 {
+	struct mtd_info *mtd = boot_cfg->mtd;
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
 	struct mxs_nand_layout l;
@@ -144,6 +434,11 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd,
 	fcb->fingerprint = FCB_FINGERPRINT;
 	fcb->version = FCB_VERSION_1;
 
+	fcb->datasetup = 80;
+	fcb->datahold = 60;
+	fcb->addr_setup = 25;
+	fcb->dsample_time = 6;
+
 	fcb->pagesize = mtd->writesize;
 	fcb->oob_pagesize = mtd->writesize + mtd->oobsize;
 	fcb->sectors = mtd->erasesize / mtd->writesize;
@@ -154,42 +449,27 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd,
 	fcb->ecc_level = l.ecc0;
 	fcb->ecc_size = l.datan_size;
 	fcb->ecc_type = l.eccn;
+	fcb->bchtype = l.gf_len;
 
-	/* Also hardcoded in kobs-ng */
-	if (is_mx6()) {
-		fcb->datasetup = 80;
-		fcb->datahold = 60;
-		fcb->addr_setup = 25;
-		fcb->dsample_time = 6;
-	} else if (is_mx7()) {
-		fcb->datasetup = 10;
-		fcb->datahold = 7;
-		fcb->addr_setup = 15;
-		fcb->dsample_time = 6;
-	}
-
-	/* DBBT search area starts at second page on first block */
-	fcb->dbbt_start = 1;
+	/* DBBT search area starts from the next block after all FCB */
+	fcb->dbbt_start = boot_cfg->search_area_size_in_pages;
 
 	fcb->bb_byte = nand_info->bch_geometry.block_mark_byte_offset;
 	fcb->bb_start_bit = nand_info->bch_geometry.block_mark_bit_offset;
 
 	fcb->phy_offset = mtd->writesize;
 
-	fcb->nr_blocks = mtd->writesize / fcb->ecc_nr - 1;
-
 	fcb->disbbm = 0;
-	fcb->disbbm_search = 0;
 
-	fcb->fw1_start = fw1_start; /* Firmware image starts on this sector */
-	fcb->fw2_start = fw2_start; /* Secondary FW Image starting Sector */
-	fcb->fw1_pages = fw_pages; /* Number of sectors in firmware image */
-	fcb->fw2_pages = fw_pages; /* Number of sector in secondary FW image */
+	fcb->fw1_start = CONV_TO_PAGES(boot_cfg->boot_stream1_address);
+	fcb->fw2_start = CONV_TO_PAGES(boot_cfg->boot_stream2_address);
+	fcb->fw1_pages = CONV_TO_PAGES(boot_cfg->boot_stream1_size);
+	fcb->fw2_pages = CONV_TO_PAGES(boot_cfg->boot_stream2_size);
 
 	fcb->checksum = calc_chksum((void *)fcb + 4, sizeof(*fcb) - 4);
 }
 
-static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks)
+static int fill_dbbt_data(struct mtd_info *mtd, void *buf, int num_blocks)
 {
 	int n, n_bad_blocks = 0;
 	u32 *bb = buf + 0x8;
@@ -209,20 +489,92 @@ static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks)
 	return n_bad_blocks;
 }
 
-static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb,
-			  struct dbbt_block *dbbt, void *dbbt_data_page,
-			  loff_t off)
+/*
+ * return 1	- bad block
+ * return 0	- read successfully
+ * return < 0	- read failed
+ */
+static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb,
+		    loff_t off)
+{
+	struct mtd_info *mtd;
+	void *fcb_raw_page;
+	size_t size;
+	int ret = 0;
+
+	mtd = boot_cfg->mtd;
+	fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
+
+	if (mtd_block_isbad(mtd, off)) {
+		printf("Block %d is bad, skipped\n", (int)CONV_TO_BLOCKS(off));
+		return 1;
+	}
+
+	/*
+	 * User BCH hardware to decode ECC for FCB
+	 */
+	if (plat_config.misc_flags & FCB_ENCODE_BCH) {
+		size = sizeof(struct fcb_block);
+
+		/* switch nand BCH to FCB compatible settings */
+		if (plat_config.misc_flags & FCB_ENCODE_BCH_62b)
+			mxs_nand_mode_fcb_62bit(mtd);
+		else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b)
+			mxs_nand_mode_fcb_40bit(mtd);
+
+		ret = nand_read(mtd, off, &size, (u_char *)fcb);
+
+		/* switch BCH back */
+		mxs_nand_mode_normal(mtd);
+		printf("NAND FCB read from 0x%llx offset 0x%zx read: %s\n",
+		       off, size, ret ? "ERROR" : "OK");
+
+	} else if (plat_config.misc_flags & FCB_ENCODE_HAMMING) {
+		/* raw read*/
+		mtd_oob_ops_t ops = {
+			.datbuf = (u8 *)fcb_raw_page,
+			.oobbuf = ((u8 *)fcb_raw_page) + mtd->writesize,
+			.len = mtd->writesize,
+			.ooblen = mtd->oobsize,
+			.mode = MTD_OPS_RAW
+			};
+
+		ret = mtd_read_oob(mtd, off, &ops);
+		printf("NAND FCB read from 0x%llx offset 0x%zx read: %s\n",
+		       off, ops.len, ret ? "ERROR" : "OK");
+	}
+
+	if (ret)
+		goto fcb_raw_page_err;
+
+	if ((plat_config.misc_flags & FCB_ENCODE_HAMMING) &&
+	    (plat_config.misc_flags & FCB_LAYOUT_RESV_12B))
+		memcpy(fcb, fcb_raw_page + 12, sizeof(struct fcb_block));
+
+/* TODO: check if it can pass Hamming check */
+
+fcb_raw_page_err:
+	kfree(fcb_raw_page);
+
+	return ret;
+}
+
+static int write_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb)
 {
-	void *fcb_raw_page = 0;
+	struct mtd_info *mtd;
+	void *fcb_raw_page = NULL;
 	int i, ret;
-	size_t dummy;
+	loff_t off;
+	size_t size;
+
+	mtd = boot_cfg->mtd;
 
 	/*
 	 * We prepare raw page only for i.MX6, for i.MX7 we
 	 * leverage BCH hw module instead
 	 */
-	if (is_mx6()) {
-		/* write fcb/dbbt */
+	if ((plat_config.misc_flags & FCB_ENCODE_HAMMING) &&
+	    (plat_config.misc_flags & FCB_LAYOUT_RESV_12B)) {
 		fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize,
 				       GFP_KERNEL);
 		if (!fcb_raw_page) {
@@ -250,29 +602,36 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb,
 		 */
 		memset(fcb_raw_page + mtd->writesize, 0xFF, 2);
 	}
-	for (i = 0; i < 2; i++) {
+
+	/* start writing FCB from the very beginning */
+	off = 0;
+
+	for (i = 0; i < g_boot_search_count; i++) {
 		if (mtd_block_isbad(mtd, off)) {
 			printf("Block %d is bad, skipped\n", i);
 			continue;
 		}
 
 		/*
-		 * User BCH ECC hardware module for i.MX7
+		 * User BCH hardware module to generate ECC for FCB
 		 */
-		if (is_mx7()) {
-			u32 off = i * mtd->erasesize;
-			size_t rwsize = sizeof(*fcb);
-
-			printf("Writing %d bytes to 0x%x: ", rwsize, off);
+		if (plat_config.misc_flags & FCB_ENCODE_BCH) {
+			size = sizeof(struct fcb_block);
 
 			/* switch nand BCH to FCB compatible settings */
-			mxs_nand_mode_fcb(mtd);
-			ret = nand_write(mtd, off, &rwsize,
-					 (unsigned char *)fcb);
+			if (plat_config.misc_flags & FCB_ENCODE_BCH_62b)
+				mxs_nand_mode_fcb_62bit(mtd);
+			else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b)
+				mxs_nand_mode_fcb_40bit(mtd);
+
+			ret = nand_write(mtd, off, &size, (u_char *)fcb);
+
+			/* switch BCH back */
 			mxs_nand_mode_normal(mtd);
+			printf("NAND FCB write to 0x%zx offset 0x%llx written: %s\n",
+			       size, off, ret ? "ERROR" : "OK");
 
-			printf("%s\n", ret ? "ERROR" : "OK");
-		} else if (is_mx6()) {
+		} else if (plat_config.misc_flags & FCB_ENCODE_HAMMING) {
 			/* raw write */
 			mtd_oob_ops_t ops = {
 				.datbuf = (u8 *)fcb_raw_page,
@@ -283,52 +642,327 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb,
 				.mode = MTD_OPS_RAW
 			};
 
-			ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops);
-			if (ret)
-				goto fcb_raw_page_err;
-			debug("NAND fcb write: 0x%x offset 0x%x written: %s\n",
-			      mtd->erasesize * i, ops.len, ret ?
-			      "ERROR" : "OK");
+			ret = mtd_write_oob(mtd, off, &ops);
+			printf("NAND FCB write to 0x%llxx offset 0x%zx written: %s\n", off, ops.len, ret ? "ERROR" : "OK");
 		}
 
-		ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize,
-				mtd->writesize, &dummy, (void *)dbbt);
 		if (ret)
 			goto fcb_raw_page_err;
-		debug("NAND dbbt write: 0x%x offset, 0x%x bytes written: %s\n",
-		      mtd->erasesize * i + mtd->writesize, dummy,
-		      ret ? "ERROR" : "OK");
+
+		/* next writing location */
+		off += g_boot_search_stride;
+	}
+
+	return 0;
+
+fcb_raw_page_err:
+	kfree(fcb_raw_page);
+
+	return ret;
+}
+
+/*
+ * return 1	- bad block
+ * return 0	- read successfully
+ * return < 0	- read failed
+ */
+static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt,
+		      void *dbbt_data_page, loff_t off)
+{
+	size_t size;
+	struct mtd_info *mtd;
+	loff_t to;
+	int ret;
+
+	mtd = boot_cfg->mtd;
+
+	if (mtd_block_isbad(mtd, off)) {
+		printf("Block %d is bad, skipped\n",
+		       (int)CONV_TO_BLOCKS(off));
+		return 1;
+	}
+
+	size = sizeof(struct dbbt_block);
+	ret = nand_read(mtd, off, &size, (u_char *)dbbt);
+	printf("NAND DBBT read from 0x%llx offset 0x%zx read: %s\n",
+	       off, size, ret ? "ERROR" : "OK");
+	if (ret)
+		return ret;
+
+	/* dbbtpages == 0 if no bad blocks */
+	if (dbbt->dbbtpages > 0) {
+		to = off + 4 * mtd->writesize;
+		size = mtd->writesize;
+		ret = nand_read(mtd, to, &size, dbbt_data_page);
+		printf("DBBT data read from 0x%llx offset 0x%zx read: %s\n",
+		       to, size, ret ? "ERROR" : "OK");
+
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int write_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt,
+		      void *dbbt_data_page)
+{
+	int i;
+	loff_t off, to;
+	size_t size;
+	struct mtd_info *mtd;
+	int ret;
+
+	mtd = boot_cfg->mtd;
+
+	/* start writing DBBT after all FCBs */
+	off = boot_cfg->search_area_size_in_bytes;
+	size = mtd->writesize;
+
+	for (i = 0; i < g_boot_search_count; i++) {
+		if (mtd_block_isbad(mtd, off)) {
+			printf("Block %d is bad, skipped\n",
+			       (int)(i + CONV_TO_BLOCKS(off)));
+			continue;
+		}
+
+		ret = nand_write(mtd, off, &size, (u_char *)dbbt);
+		printf("NAND DBBT write to 0x%llx offset 0x%zx written: %s\n",
+		       off, size, ret ? "ERROR" : "OK");
+		if (ret)
+			return ret;
 
 		/* dbbtpages == 0 if no bad blocks */
 		if (dbbt->dbbtpages > 0) {
-			loff_t to = (mtd->erasesize * i + mtd->writesize * 5);
+			to = off + 4 * mtd->writesize;
+			ret = nand_write(mtd, to, &size, dbbt_data_page);
+			printf("DBBT data write to 0x%llx offset 0x%zx written: %s\n",
+			       to, size, ret ? "ERROR" : "OK");
 
-			ret = mtd_write(mtd, to, mtd->writesize, &dummy,
-					dbbt_data_page);
-			if (ret)
-				goto fcb_raw_page_err;
+		if (ret)
+			return ret;
 		}
+
+		/* next writing location */
+		off += g_boot_search_stride;
 	}
 
-fcb_raw_page_err:
-	if (is_mx6())
-		kfree(fcb_raw_page);
+	return 0;
+}
+
+/* reuse the check_skip_len from nand_util.c with minor change*/
+static int check_skip_length(struct boot_config *boot_cfg, loff_t offset,
+			     size_t length, size_t *used)
+{
+	struct mtd_info *mtd = boot_cfg->mtd;
+	size_t maxsize = boot_cfg->maxsize;
+	size_t len_excl_bad = 0;
+	int ret = 0;
+
+	while (len_excl_bad < length) {
+		size_t block_len, block_off;
+		loff_t block_start;
+
+		if (offset >= maxsize)
+			return -1;
+
+		block_start = offset & ~(loff_t)(mtd->erasesize - 1);
+		block_off = offset & (mtd->erasesize - 1);
+		block_len = mtd->erasesize - block_off;
+
+		if (!nand_block_isbad(mtd, block_start))
+			len_excl_bad += block_len;
+		else
+			ret = 1;
+
+		offset += block_len;
+		*used += block_len;
+	}
+
+	/* If the length is not a multiple of block_len, adjust. */
+	if (len_excl_bad > length)
+		*used -= (len_excl_bad - length);
+
+	return ret;
+}
+
+static int nandbcb_get_next_good_blk_addr(struct boot_config *boot_cfg,
+					  struct boot_stream_config *bs_cfg)
+{
+	struct mtd_info *mtd = boot_cfg->mtd;
+	loff_t offset = bs_cfg->bs_addr;
+	size_t length = bs_cfg->bs_size;
+	size_t used = 0;
+	int ret;
+
+	ret = check_skip_length(boot_cfg, offset, length, &used);
+
+	if (ret < 0)
+		return ret;
+
+	/* get next image address */
+	bs_cfg->next_bs_addr = (u32)(offset + used + mtd->erasesize - 1)
+				 / (u32)mtd->erasesize * mtd->erasesize;
 
 	return ret;
 }
 
-static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
-			  size_t maxsize, const u_char *buf)
+static int nandbcb_write_bs_skip_bad(struct boot_config *boot_cfg,
+				     struct boot_stream_config *bs_cfg)
 {
+	struct mtd_info *mtd;
+	void *buf;
+	loff_t offset, maxsize;
+	size_t size;
+	size_t length;
+	int ret;
+	bool padding_flag = false;
+
+	mtd = boot_cfg->mtd;
+	offset = bs_cfg->bs_addr;
+	maxsize = boot_cfg->maxsize;
+	size = bs_cfg->bs_size;
+
+	/* some boot images may need leading offset */
+	if (bs_cfg->need_padding &&
+	    (plat_config.misc_flags & FIRMWARE_NEED_PADDING))
+		padding_flag = 1;
+
+	if (padding_flag)
+		length = ALIGN(size + FLASH_OFFSET_STANDARD, mtd->writesize);
+	else
+		length = ALIGN(size, mtd->writesize);
+
+	buf = kzalloc(length, GFP_KERNEL);
+	if (!buf) {
+		printf("failed to allocate buffer for firmware\n");
+		ret = -ENOMEM;
+		return ret;
+	}
+
+	if (padding_flag)
+		memcpy(buf + FLASH_OFFSET_STANDARD, bs_cfg->bs_buf, size);
+	else
+		memcpy(buf, bs_cfg->bs_buf, size);
+
+	ret = nand_write_skip_bad(mtd, offset, &length, NULL, maxsize,
+				  (u_char *)buf, WITH_WR_VERIFY);
+	printf("Write %s @0x%llx offset, 0x%zx bytes written: %s\n",
+	       bs_cfg->bs_label, offset, length, ret ? "ERROR" : "OK");
+
+	if (ret)
+		/* write image failed, quit */
+		goto err;
+
+	/* get next good blk address if needed */
+	if (bs_cfg->need_padding) {
+		ret = nandbcb_get_next_good_blk_addr(boot_cfg, bs_cfg);
+		if (ret < 0) {
+			printf("Next image cannot fit in NAND partition\n");
+			goto err;
+		}
+	}
+
+	/* now we know how the exact image size written to NAND */
+	bs_cfg->bs_size = length;
+	return 0;
+err:
+	kfree(buf);
+	return ret;
+}
+
+static int nandbcb_write_fw(struct boot_config *boot_cfg, u_char *buf,
+			    int index)
+{
+	int i;
+	loff_t offset;
+	size_t size;
+	loff_t next_bs_addr;
+	struct boot_stream_config bs_cfg;
+	int ret;
+
+	for (i = 0; i < 2; ++i) {
+		if (!(FW_INX(i) & index))
+			continue;
+
+		if (i == 0) {
+			offset = boot_cfg->boot_stream1_address;
+			size = boot_cfg->boot_stream1_size;
+		} else {
+			offset = boot_cfg->boot_stream2_address;
+			size = boot_cfg->boot_stream2_size;
+		}
+
+		/* write Firmware*/
+		if (!(plat_config.misc_flags & FIRMWARE_EXTRA_ONE)) {
+			memset(&bs_cfg, 0, sizeof(struct boot_stream_config));
+			sprintf(bs_cfg.bs_label, "firmware%d", i);
+			bs_cfg.bs_addr = offset;
+			bs_cfg.bs_size = size;
+			bs_cfg.bs_buf = buf;
+			bs_cfg.need_padding = 1;
+
+			ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg);
+			if (ret)
+				return ret;
+
+			/* update the boot stream size */
+			if (i == 0)
+				boot_cfg->boot_stream1_size = bs_cfg.bs_size;
+			else
+				boot_cfg->boot_stream2_size = bs_cfg.bs_size;
+
+		} else {
+		/* some platforms need extra firmware */
+			memset(&bs_cfg, 0, sizeof(struct boot_stream_config));
+			sprintf(bs_cfg.bs_label, "fw%d_part%d", i, 1);
+			bs_cfg.bs_addr = offset;
+			bs_cfg.bs_size = IMX8MQ_HDMI_FW_SZ;
+			bs_cfg.bs_buf = buf;
+			bs_cfg.need_padding = 1;
+
+			ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg);
+			if (ret)
+				return ret;
+
+			/* update the boot stream size */
+			if (i == 0)
+				boot_cfg->boot_stream1_size = bs_cfg.bs_size;
+			else
+				boot_cfg->boot_stream2_size = bs_cfg.bs_size;
+
+			/* get next image address */
+			next_bs_addr = bs_cfg.next_bs_addr;
+
+			memset(&bs_cfg, 0, sizeof(struct boot_stream_config));
+			sprintf(bs_cfg.bs_label, "fw%d_part%d", i, 2);
+			bs_cfg.bs_addr = next_bs_addr;
+			bs_cfg.bs_size = IMX8MQ_SPL_SZ;
+			bs_cfg.bs_buf = (u_char *)(buf + IMX8MQ_HDMI_FW_SZ);
+			bs_cfg.need_padding = 0;
+
+			ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg);
+			if (ret)
+				return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int nandbcb_init(struct boot_config *boot_cfg, u_char *buf)
+{
+	struct mtd_info *mtd;
 	nand_erase_options_t opts;
 	struct fcb_block *fcb;
 	struct dbbt_block *dbbt;
-	loff_t fw1_off;
-	void *fwbuf, *dbbt_page, *dbbt_data_page;
-	u32 fw1_start, fw1_pages;
-	int nr_blks, nr_blks_fcb, fw1_blk;
-	size_t fwsize;
+	void *dbbt_page, *dbbt_data_page;
 	int ret;
+	loff_t maxsize, off;
+
+	mtd = boot_cfg->mtd;
+	maxsize = boot_cfg->maxsize;
+	off = boot_cfg->offset;
 
 	/* erase */
 	memset(&opts, 0, sizeof(opts));
@@ -358,42 +992,24 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
 	 * - two firmware blocks, primary and secondary
 	 * - first 4 block for FCB/DBBT
 	 * - rest split in half for primary and secondary firmware
-	 * - same firmware will write two times
+	 * - same firmware write twice
 	 */
-	nr_blks_fcb = 2;
-	nr_blks = maxsize / mtd->erasesize;
-	fw1_blk = nr_blks_fcb;
-
-	/* write fw */
-	fwsize = ALIGN(size + FLASH_OFFSET_STANDARD + mtd->writesize,
-		       mtd->writesize);
-	fwbuf = kzalloc(fwsize, GFP_KERNEL);
-	if (!fwbuf) {
-		debug("failed to allocate fwbuf\n");
-		ret = -ENOMEM;
-		goto err;
-	}
 
-	memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, size);
-	fw1_off = fw1_blk * mtd->erasesize;
-	ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize,
-				  (u_char *)fwbuf, WITH_WR_VERIFY);
-	printf("NAND fw write: 0x%llx offset, 0x%x bytes written: %s\n",
-	       fw1_off, fwsize, ret ? "ERROR" : "OK");
+	/* write Firmware*/
+	ret = nandbcb_write_fw(boot_cfg, buf, FW_ALL);
 	if (ret)
-		goto fwbuf_err;
+		goto err;
 
 	/* fill fcb */
 	fcb = kzalloc(sizeof(*fcb), GFP_KERNEL);
 	if (!fcb) {
 		debug("failed to allocate fcb\n");
 		ret = -ENOMEM;
-		goto fwbuf_err;
+		return ret;
 	}
+	fill_fcb(fcb, boot_cfg);
 
-	fw1_start = (fw1_blk * mtd->erasesize) / mtd->writesize;
-	fw1_pages = size / mtd->writesize + 1;
-	fill_fcb(fcb, mtd, fw1_start, 0, fw1_pages);
+	ret = write_fcb(boot_cfg, fcb);
 
 	/* fill dbbt */
 	dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL);
@@ -412,16 +1028,16 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size,
 
 	dbbt = dbbt_page;
 	dbbt->checksum = 0;
-	dbbt->fingerprint = DBBT_FINGERPRINT2;
+	dbbt->fingerprint = DBBT_FINGERPRINT;
 	dbbt->version = DBBT_VERSION_1;
-	ret = dbbt_fill_data(mtd, dbbt_data_page, nr_blks);
+	ret = fill_dbbt_data(mtd, dbbt_data_page, CONV_TO_BLOCKS(maxsize));
 	if (ret < 0)
 		goto dbbt_data_page_err;
 	else if (ret > 0)
 		dbbt->dbbtpages = 1;
 
-	/* write fcb and dbbt to nand */
-	ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, off);
+	/* write dbbt */
+	ret = write_dbbt(boot_cfg, dbbt, dbbt_data_page);
 	if (ret < 0)
 		printf("failed to write FCB/DBBT\n");
 
@@ -431,79 +1047,106 @@ dbbt_page_err:
 	kfree(dbbt_page);
 fcb_err:
 	kfree(fcb);
-fwbuf_err:
-	kfree(fwbuf);
 err:
 	return ret;
 }
 
-static int do_nandbcb_bcbonly(int argc, char * const argv[])
+static int do_nandbcb_bcbonly(int argc, char *const argv[])
 {
 	struct fcb_block *fcb;
 	struct dbbt_block *dbbt;
-	u32 fw_len, fw1_off, fw2_off;
 	struct mtd_info *mtd;
+	nand_erase_options_t opts;
+	size_t maxsize;
+	loff_t off;
 	void *dbbt_page, *dbbt_data_page;
-	int dev, ret;
+	int ret;
+	struct boot_config cfg;
 
-	dev = nand_curr_device;
-	if ((dev < 0) || (dev >= CONFIG_SYS_MAX_NAND_DEVICE) ||
-	    (!get_nand_dev_by_index(dev))) {
-		puts("No devices available\n");
+	if (argc < 4)
+		return CMD_RET_USAGE;
+
+	memset(&cfg, 0, sizeof(struct boot_config));
+	if (nandbcb_get_info(argc, argv, &cfg))
 		return CMD_RET_FAILURE;
-	}
 
-	mtd = get_nand_dev_by_index(dev);
+	/* only get the partition info */
+	if (nandbcb_get_size(2, argv, 1, &cfg))
+		return CMD_RET_FAILURE;
 
-	if (argc < 3)
+	if (nandbcb_set_boot_config(argc, argv, &cfg))
 		return CMD_RET_FAILURE;
 
-	fw_len = simple_strtoul(argv[1], NULL, 16);
-	fw1_off = simple_strtoul(argv[2], NULL, 16);
+	mtd = cfg.mtd;
 
-	if (argc > 3)
-		fw2_off = simple_strtoul(argv[3], NULL, 16);
-	else
-		fw2_off = fw1_off;
+	cfg.boot_stream1_address = simple_strtoul(argv[2], NULL, 16);
+	cfg.boot_stream1_size = simple_strtoul(argv[3], NULL, 16);
+	cfg.boot_stream1_size = ALIGN(cfg.boot_stream1_size, mtd->writesize);
+
+	if (argc > 5) {
+		cfg.boot_stream2_address = simple_strtoul(argv[4], NULL, 16);
+		cfg.boot_stream2_size = simple_strtoul(argv[5], NULL, 16);
+		cfg.boot_stream2_size = ALIGN(cfg.boot_stream2_size,
+					      mtd->writesize);
+	}
+
+	/* sanity check */
+	nandbcb_check_space(&cfg);
+
+	maxsize = cfg.maxsize;
+	off = cfg.offset;
+
+	/* erase the previous FCB/DBBT */
+	memset(&opts, 0, sizeof(opts));
+	opts.offset = off;
+	opts.length = g_boot_search_stride * 2;
+	ret = nand_erase_opts(mtd, &opts);
+	if (ret) {
+		printf("%s: erase failed (ret = %d)\n", __func__, ret);
+		return CMD_RET_FAILURE;
+	}
 
 	/* fill fcb */
 	fcb = kzalloc(sizeof(*fcb), GFP_KERNEL);
 	if (!fcb) {
-		debug("failed to allocate fcb\n");
+		printf("failed to allocate fcb\n");
 		ret = -ENOMEM;
 		return CMD_RET_FAILURE;
 	}
 
-	fill_fcb(fcb, mtd, fw1_off / mtd->writesize,
-		 fw2_off / mtd->writesize, fw_len / mtd->writesize);
+	fill_fcb(fcb, &cfg);
+
+	/* write fcb */
+	ret = write_fcb(&cfg, fcb);
 
 	/* fill dbbt */
 	dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL);
 	if (!dbbt_page) {
-		debug("failed to allocate dbbt_page\n");
+		printf("failed to allocate dbbt_page\n");
 		ret = -ENOMEM;
 		goto fcb_err;
 	}
 
 	dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL);
 	if (!dbbt_data_page) {
-		debug("failed to allocate dbbt_data_page\n");
+		printf("failed to allocate dbbt_data_page\n");
 		ret = -ENOMEM;
 		goto dbbt_page_err;
 	}
 
 	dbbt = dbbt_page;
 	dbbt->checksum = 0;
-	dbbt->fingerprint = DBBT_FINGERPRINT2;
+	dbbt->fingerprint = DBBT_FINGERPRINT;
 	dbbt->version = DBBT_VERSION_1;
-	ret = dbbt_fill_data(mtd, dbbt_data_page, 0);
+	ret = fill_dbbt_data(mtd, dbbt_data_page, CONV_TO_BLOCKS(maxsize));
 	if (ret < 0)
 		goto dbbt_data_page_err;
 	else if (ret > 0)
 		dbbt->dbbtpages = 1;
 
-	/* write fcb and dbbt to nand */
-	ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, 0);
+	/* write dbbt */
+	ret = write_dbbt(&cfg, dbbt, dbbt_data_page);
+
 dbbt_data_page_err:
 	kfree(dbbt_data_page);
 dbbt_page_err:
@@ -519,31 +1162,292 @@ fcb_err:
 	return CMD_RET_SUCCESS;
 }
 
-static int do_nandbcb_update(int argc, char * const argv[])
+/* dump data which is read from NAND chip */
+void dump_structure(struct boot_config *boot_cfg, struct fcb_block *fcb,
+		    struct dbbt_block *dbbt, void *dbbt_data_page)
+{
+	int i;
+	struct mtd_info *mtd = boot_cfg->mtd;
+
+	#define P1(x) printf("  %s = 0x%08x\n", #x, fcb->x)
+		printf("FCB\n");
+		P1(checksum);
+		P1(fingerprint);
+		P1(version);
+	#undef P1
+	#define P1(x)	printf("  %s = %d\n", #x, fcb->x)
+		P1(datasetup);
+		P1(datahold);
+		P1(addr_setup);
+		P1(dsample_time);
+		P1(pagesize);
+		P1(oob_pagesize);
+		P1(sectors);
+		P1(nr_nand);
+		P1(nr_die);
+		P1(celltype);
+		P1(ecc_type);
+		P1(ecc_nr);
+		P1(ecc_size);
+		P1(ecc_level);
+		P1(meta_size);
+		P1(nr_blocks);
+		P1(ecc_type_sdk);
+		P1(ecc_nr_sdk);
+		P1(ecc_size_sdk);
+		P1(ecc_level_sdk);
+		P1(nr_blocks_sdk);
+		P1(meta_size_sdk);
+		P1(erase_th);
+		P1(bootpatch);
+		P1(patch_size);
+		P1(fw1_start);
+		P1(fw2_start);
+		P1(fw1_pages);
+		P1(fw2_pages);
+		P1(dbbt_start);
+		P1(bb_byte);
+		P1(bb_start_bit);
+		P1(phy_offset);
+		P1(bchtype);
+		P1(readlatency);
+		P1(predelay);
+		P1(cedelay);
+		P1(postdelay);
+		P1(cmdaddpause);
+		P1(datapause);
+		P1(tmspeed);
+		P1(busytimeout);
+		P1(disbbm);
+		P1(spare_offset);
+#if !defined(CONFIG_MX6) || defined(CONFIG_MX6SX) || \
+	defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
+		P1(onfi_sync_enable);
+		P1(onfi_sync_speed);
+		P1(onfi_sync_nand_data);
+		P1(disbbm_search);
+		P1(disbbm_search_limit);
+		P1(read_retry_enable);
+#endif
+	#undef P1
+	#define P1(x)	printf("  %s = 0x%08x\n", #x, dbbt->x)
+		printf("DBBT :\n");
+		P1(checksum);
+		P1(fingerprint);
+		P1(version);
+	#undef P1
+	#define P1(x)	printf("  %s = %d\n", #x, dbbt->x)
+		P1(dbbtpages);
+	#undef P1
+
+	for (i = 0; i < dbbt->dbbtpages; ++i)
+		printf("%d ", *((u32 *)(dbbt_data_page + i)));
+
+	if (!(plat_config.misc_flags & FIRMWARE_EXTRA_ONE)) {
+		printf("Firmware: image #0 @ 0x%x size 0x%x\n",
+		       fcb->fw1_start, fcb->fw1_pages * mtd->writesize);
+		printf("Firmware: image #1 @ 0x%x size 0x%x\n",
+		       fcb->fw2_start, fcb->fw2_pages * mtd->writesize);
+	} else {
+		printf("Firmware: image #0 @ 0x%x size 0x%x\n",
+		       fcb->fw1_start, fcb->fw1_pages * mtd->writesize);
+		printf("Firmware: image #1 @ 0x%x size 0x%x\n",
+		       fcb->fw2_start, fcb->fw2_pages * mtd->writesize);
+		/* TODO: Add extra image information */
+	}
+}
+
+static bool check_fingerprint(void *data, int fingerprint)
+{
+	int off = 4;
+
+	return (*(int *)(data + off) == fingerprint);
+}
+
+static int fuse_to_search_count(u32 bank, u32 word, u32 mask, u32 off)
+{
+	int err;
+	u32 val;
+	int ret;
+
+	/* by default, the boot search count from fuse should be 2 */
+	err = fuse_read(bank, word, &val);
+	if (err)
+		return 2;
+
+	val = (val & mask) >> off;
+
+	switch (val) {
+		case 0:
+			ret = 2;
+			break;
+		case 1:
+		case 2:
+		case 3:
+			ret = 1 << val;
+			break;
+		default:
+			ret = 2;
+	}
+
+	return ret;
+}
+
+static int nandbcb_dump(struct boot_config *boot_cfg)
+{
+	int i;
+	loff_t off;
+	struct mtd_info *mtd = boot_cfg->mtd;
+	struct fcb_block fcb, fcb_copy;
+	struct dbbt_block dbbt, dbbt_copy;
+	void *dbbt_data_page, *dbbt_data_page_copy;
+	bool fcb_not_found, dbbt_not_found;
+	int ret = 0;
+
+	dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL);
+	if (!dbbt_data_page) {
+		printf("failed to allocate dbbt_data_page\n");
+		ret = -ENOMEM;
+		return ret;
+	}
+
+	dbbt_data_page_copy = kzalloc(mtd->writesize, GFP_KERNEL);
+	if (!dbbt_data_page_copy) {
+		printf("failed to allocate dbbt_data_page\n");
+		ret = -ENOMEM;
+		goto dbbt_page_err;
+	}
+
+	/* read fcb */
+	fcb_not_found = 1;
+	off = 0;
+	for (i = 0; i < g_boot_search_count; ++i) {
+		if (fcb_not_found) {
+			ret = read_fcb(boot_cfg, &fcb, off);
+
+			if (ret < 0)
+				goto dbbt_page_copy_err;
+			else if (ret == 1)
+				continue;
+			else if (ret == 0)
+				if (check_fingerprint(&fcb, FCB_FINGERPRINT))
+					fcb_not_found = 0;
+		} else {
+			ret = read_fcb(boot_cfg, &fcb_copy, off);
+
+			if (ret < 0)
+				goto dbbt_page_copy_err;
+			if (memcmp(&fcb, &fcb_copy,
+				   sizeof(struct fcb_block))) {
+				printf("FCB copies are not identical\n");
+				ret = -EINVAL;
+				goto dbbt_page_copy_err;
+			}
+		}
+
+		/* next read location */
+		off += g_boot_search_stride;
+	}
+
+	/* read dbbt*/
+	dbbt_not_found = 1;
+	off = boot_cfg->search_area_size_in_bytes;
+	for (i = 0; i < g_boot_search_count; ++i) {
+		if (dbbt_not_found) {
+			ret = read_dbbt(boot_cfg, &dbbt, dbbt_data_page, off);
+
+			if (ret < 0)
+				goto dbbt_page_copy_err;
+			else if (ret == 1)
+				continue;
+			else if (ret == 0)
+				if (check_fingerprint(&dbbt, DBBT_FINGERPRINT))
+					dbbt_not_found = 0;
+		} else {
+			ret = read_dbbt(boot_cfg, &dbbt_copy,
+					dbbt_data_page_copy, off);
+
+			if (ret < 0)
+				goto dbbt_page_copy_err;
+			if (memcmp(&dbbt, &dbbt_copy,
+				   sizeof(struct dbbt_block))) {
+				printf("DBBT copies are not identical\n");
+				ret = -EINVAL;
+				goto dbbt_page_copy_err;
+			}
+			if (dbbt.dbbtpages > 0 &&
+			    memcmp(dbbt_data_page, dbbt_data_page_copy,
+				   mtd->writesize)) {
+				printf("DBBT data copies are not identical\n");
+				ret = -EINVAL;
+				goto dbbt_page_copy_err;
+			}
+		}
+
+		/* next read location */
+		off += g_boot_search_stride;
+	}
+
+	dump_structure(boot_cfg, &fcb, &dbbt, dbbt_data_page);
+
+dbbt_page_copy_err:
+	kfree(dbbt_data_page_copy);
+dbbt_page_err:
+	kfree(dbbt_data_page);
+
+	return ret;
+}
+
+static int do_nandbcb_dump(int argc, char * const argv[])
+{
+	struct boot_config cfg;
+	int ret;
+
+	if (argc != 2)
+		return CMD_RET_USAGE;
+
+	memset(&cfg, 0, sizeof(struct boot_config));
+	if (nandbcb_get_info(argc, argv, &cfg))
+		return CMD_RET_FAILURE;
+
+	if (nandbcb_get_size(argc, argv, 1, &cfg))
+		return CMD_RET_FAILURE;
+
+	if (nandbcb_set_boot_config(argc, argv, &cfg))
+		return CMD_RET_FAILURE;
+
+	ret = nandbcb_dump(&cfg);
+	if (ret)
+		return ret;
+
+	return ret;
+}
+
+static int do_nandbcb_init(int argc, char * const argv[])
 {
-	struct mtd_info *mtd;
-	loff_t addr, offset, size, maxsize;
-	char *endp;
 	u_char *buf;
-	int dev;
+	size_t size;
+	loff_t addr;
+	char *endp;
 	int ret;
+	struct boot_config cfg;
 
 	if (argc != 4)
 		return CMD_RET_USAGE;
 
-	dev = nand_curr_device;
-	if (dev < 0) {
-		printf("failed to get nand_curr_device, run nand device\n");
+	memset(&cfg, 0, sizeof(struct boot_config));
+	if (nandbcb_get_info(argc, argv, &cfg))
 		return CMD_RET_FAILURE;
-	}
 
-	addr = simple_strtoul(argv[1], &endp, 16);
-	if (*argv[1] == 0 || *endp != 0)
+	if (nandbcb_get_size(argc, argv, 2, &cfg))
 		return CMD_RET_FAILURE;
+	size = cfg.boot_stream1_size;
 
-	mtd = get_nand_dev_by_index(dev);
-	if (mtd_arg_off_size(argc - 2, argv + 2, &dev, &offset, &size,
-			     &maxsize, MTD_DEV_TYPE_NAND, mtd->size))
+	if (nandbcb_set_boot_config(argc, argv, &cfg))
+		return CMD_RET_FAILURE;
+
+	addr = simple_strtoul(argv[1], &endp, 16);
+	if (*argv[1] == 0 || *endp != 0)
 		return CMD_RET_FAILURE;
 
 	buf = map_physmem(addr, size, MAP_WRBACK);
@@ -552,26 +1456,62 @@ static int do_nandbcb_update(int argc, char * const argv[])
 		return CMD_RET_FAILURE;
 	}
 
-	ret = nandbcb_update(mtd, offset, size, maxsize, buf);
+	ret = nandbcb_init(&cfg, buf);
 
 	return ret == 0 ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
 }
 
-static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_nandbcb(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	const char *cmd;
 	int ret = 0;
 
-	if (argc < 5)
+	if (argc < 3)
 		goto usage;
 
+	/* check the platform config first */
+	if (is_mx6sx()) {
+		plat_config = imx6sx_plat_config;
+	} else if (is_mx7()) {
+		plat_config = imx7d_plat_config;
+	} else if (is_mx6ul() || is_mx6ull()) {
+		plat_config = imx6ul_plat_config;
+	} else if (is_mx6() && !is_mx6sx() && !is_mx6ul() && !is_mx6ull()) {
+		plat_config = imx6qdl_plat_config;
+	} else if (is_imx8mq()) {
+		plat_config = imx8mq_plat_config;
+	} else if (is_imx8mm()) {
+		plat_config = imx8mm_plat_config;
+	} else if (is_imx8mn()) {
+		plat_config = imx8mn_plat_config;
+	} else if (is_imx8qm() || is_imx8qxp()) {
+		plat_config = imx8q_plat_config;
+	} else {
+		printf("ERROR: Unknown platform\n");
+		return CMD_RET_FAILURE;
+	}
+
+	if (plat_config.misc_flags & BT_SEARCH_CNT_FROM_FUSE) {
+		if (is_imx8qxp()) {
+			g_boot_search_count = fuse_to_search_count(0, 720,
+								   0xc0, 6);
+			printf("search count set to %d from fuse\n",
+			       g_boot_search_count);
+		}
+	}
+
 	cmd = argv[1];
 	--argc;
 	++argv;
 
-	if (strcmp(cmd, "update") == 0) {
-		ret = do_nandbcb_update(argc, argv);
+	if (strcmp(cmd, "init") == 0) {
+		ret = do_nandbcb_init(argc, argv);
+		goto done;
+	}
+
+	if (strcmp(cmd, "dump") == 0) {
+		ret = do_nandbcb_dump(argc, argv);
 		goto done;
 	}
 
@@ -589,17 +1529,19 @@ usage:
 
 #ifdef CONFIG_SYS_LONGHELP
 static char nandbcb_help_text[] =
-	"update addr off|partition len	- update 'len' bytes starting at\n"
+	"init addr off|partition len - update 'len' bytes starting at\n"
 	"       'off|part' to memory address 'addr', skipping  bad blocks\n"
-	"bcbonly fw-size fw1-off [fw2-off] - write only BCB (FCB and DBBT)\n"
-	"       where `fw-size` is fw sizes in bytes, `fw1-off`\n"
+	"nandbcb bcbonly off|partition fw1-off fw1-size [fw2-off fw2-size]\n"
+	"	    - write BCB only (FCB and DBBT)\n"
+	"       where `fwx-size` is fw sizes in bytes, `fw1-off`\n"
 	"       and `fw2-off` - firmware offsets\n"
 	"       FIY, BCB isn't erased automatically, so mtd erase should\n"
 	"       be called in advance before writing new BCB:\n"
-	"           > mtd erase mx7-bcb";
+	"           > mtd erase mx7-bcb\n"
+	"nandbcb dump off|partition - dump/verify boot structures\n";
 #endif
 
-U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb,
-	   "i.MX6/i.MX7 NAND Boot Control Blocks write",
+U_BOOT_CMD(nandbcb, 7, 1, do_nandbcb,
+	   "i.MX NAND Boot Control Blocks write",
 	   nandbcb_help_text
 );
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index bfa85c64c6..f2070c9714 100644
--- a/arch/arm/mach-imx/cpu.c
+++ b/arch/arm/mach-imx/cpu.c
@@ -8,6 +8,9 @@
 
 #include <bootm.h>
 #include <common.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <linux/errno.h>
 #include <asm/io.h>
@@ -95,7 +98,17 @@ const char *get_imx_type(u32 imxtype)
 	case MXC_CPU_IMX8MP:
 		return "8MP";	/* Quad-core version of the imx8mp */
 	case MXC_CPU_IMX8MN:
-		return "8MNano";/* Quad-core version of the imx8mn */
+		return "8MNano Quad"; /* Quad-core version */
+	case MXC_CPU_IMX8MND:
+		return "8MNano Dual"; /* Dual-core version */
+	case MXC_CPU_IMX8MNS:
+		return "8MNano Solo"; /* Single-core version */
+	case MXC_CPU_IMX8MNL:
+		return "8MNano QuadLite"; /* Quad-core Lite version */
+	case MXC_CPU_IMX8MNDL:
+		return "8MNano DualLite"; /* Dual-core Lite version */
+	case MXC_CPU_IMX8MNSL:
+		return "8MNano SoloLite"; /* Single-core Lite version */
 	case MXC_CPU_IMX8MM:
 		return "8MMQ";	/* Quad-core version of the imx8mm */
 	case MXC_CPU_IMX8MML:
@@ -109,7 +122,11 @@ const char *get_imx_type(u32 imxtype)
 	case MXC_CPU_IMX8MMSL:
 		return "8MMSL";	/* Single-core Lite version of the imx8mm */
 	case MXC_CPU_IMX8MQ:
-		return "8MQ";	/* Quad-core version of the imx8m */
+		return "8MQ";	/* Quad-core version of the imx8mq */
+	case MXC_CPU_IMX8MQL:
+		return "8MQLite";	/* Quad-core Lite version of the imx8mq */
+	case MXC_CPU_IMX8MD:
+		return "8MD";	/* Dual-core version of the imx8mq */
 	case MXC_CPU_MX7S:
 		return "7S";	/* Single-core version of the mx7 */
 	case MXC_CPU_MX7D:
@@ -154,7 +171,7 @@ int print_cpuinfo(void)
 
 	cpurev = get_cpu_rev();
 
-#if defined(CONFIG_IMX_THERMAL)
+#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU)
 	struct udevice *thermal_dev;
 	int cpu_tmp, minc, maxc, ret;
 
@@ -177,7 +194,7 @@ int print_cpuinfo(void)
 		mxc_get_clock(MXC_ARM_CLK) / 1000000);
 #endif
 
-#if defined(CONFIG_IMX_THERMAL)
+#if defined(CONFIG_IMX_THERMAL) || defined(CONFIG_IMX_TMU)
 	puts("CPU:   ");
 	switch (get_cpu_temp_grade(&minc, &maxc)) {
 	case TEMP_AUTOMOTIVE:
@@ -314,6 +331,7 @@ enum cpu_speed {
 	OCOTP_TESTER3_SPEED_GRADE1,
 	OCOTP_TESTER3_SPEED_GRADE2,
 	OCOTP_TESTER3_SPEED_GRADE3,
+	OCOTP_TESTER3_SPEED_GRADE4,
 };
 
 u32 get_cpu_speed_grade_hz(void)
@@ -326,17 +344,28 @@ u32 get_cpu_speed_grade_hz(void)
 
 	val = readl(&fuse->tester3);
 	val >>= OCOTP_TESTER3_SPEED_SHIFT;
-	val &= 0x3;
+
+	if (is_imx8mn() || is_imx8mp()) {
+		val &= 0xf;
+		return 2300000000 - val * 100000000;
+	}
+
+	if (is_imx8mm())
+		val &= 0x7;
+	else
+		val &= 0x3;
 
 	switch(val) {
 	case OCOTP_TESTER3_SPEED_GRADE0:
 		return 800000000;
 	case OCOTP_TESTER3_SPEED_GRADE1:
-		return is_mx7() ? 500000000 : 1000000000;
+		return (is_mx7() ? 500000000 : (is_imx8mq() ? 1000000000 : 1200000000));
 	case OCOTP_TESTER3_SPEED_GRADE2:
-		return is_mx7() ? 1000000000 : 1300000000;
+		return (is_mx7() ? 1000000000 : (is_imx8mq() ? 1300000000 : 1600000000));
 	case OCOTP_TESTER3_SPEED_GRADE3:
-		return is_mx7() ? 1200000000 : 1500000000;
+		return (is_mx7() ? 1200000000 : (is_imx8mq() ? 1500000000 : 1800000000));
+	case OCOTP_TESTER3_SPEED_GRADE4:
+		return 2000000000;
 	}
 
 	return 0;
diff --git a/arch/arm/mach-imx/ddrmc-vf610-calibration.c b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
index f29de74c39..cd7e95e61d 100644
--- a/arch/arm/mach-imx/ddrmc-vf610-calibration.c
+++ b/arch/arm/mach-imx/ddrmc-vf610-calibration.c
@@ -8,6 +8,7 @@
  */
 /* #define DEBUG */
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <linux/bitmap.h>
diff --git a/arch/arm/mach-imx/ddrmc-vf610.c b/arch/arm/mach-imx/ddrmc-vf610.c
index 461fba4d3f..7895ee66f8 100644
--- a/arch/arm/mach-imx/ddrmc-vf610.c
+++ b/arch/arm/mach-imx/ddrmc-vf610.c
@@ -6,10 +6,12 @@
  * Copyright 2013 Freescale Semiconductor, Inc.
  */
 
+#include <common.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-vf610.h>
 #include <asm/arch/ddrmc-vf610.h>
+#include <linux/delay.h>
 #include "ddrmc-vf610-calibration.h"
 
 void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count)
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index 30db820b56..d0757d8b66 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <config.h>
 #include <fuse.h>
 #include <mapmem.h>
@@ -291,8 +292,8 @@ static int get_hab_status(void)
 	return 0;
 }
 
-static int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_hab_status(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	if ((argc != 1)) {
 		cmd_usage(cmdtp);
@@ -324,8 +325,8 @@ static ulong get_image_ivt_offset(ulong img_addr)
 	}
 }
 
-static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
-				 char * const argv[])
+static int do_authenticate_image(struct cmd_tbl *cmdtp, int flag, int argc,
+				 char *const argv[])
 {
 	ulong	addr, length, ivt_offset;
 	int	rcode = 0;
@@ -349,8 +350,8 @@ static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
 	return rcode;
 }
 
-static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_hab_failsafe(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	hab_rvt_failsafe_t *hab_rvt_failsafe;
 
@@ -365,8 +366,8 @@ static int do_hab_failsafe(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_hab_version(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_hab_version(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	struct hab_hdr *hdr = (struct hab_hdr *)HAB_RVT_BASE;
 
@@ -380,8 +381,8 @@ static int do_hab_version(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_authenticate_image_or_failover(cmd_tbl_t *cmdtp, int flag,
-					     int argc, char * const argv[])
+static int do_authenticate_image_or_failover(struct cmd_tbl *cmdtp, int flag,
+					     int argc, char *const argv[])
 {
 	int ret = CMD_RET_FAILURE;
 
diff --git a/arch/arm/mach-imx/i2c-mxv7.c b/arch/arm/mach-imx/i2c-mxv7.c
index 814d834b16..e6c74bf77e 100644
--- a/arch/arm/mach-imx/i2c-mxv7.c
+++ b/arch/arm/mach-imx/i2c-mxv7.c
@@ -6,6 +6,7 @@
 #include <malloc.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/mxc_i2c.h>
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 5827ab334f..9d1f73dfc7 100644
--- a/arch/arm/mach-imx/imx8/Kconfig
+++ b/arch/arm/mach-imx/imx8/Kconfig
@@ -18,11 +18,13 @@ config MU_BASE_SPL
 config IMX8QM
 	select IMX8
 	select SUPPORT_SPL
+	select SPL_RECOVER_DATA_SECTION
 	bool
 
 config IMX8QXP
 	select IMX8
 	select SUPPORT_SPL
+	select SPL_RECOVER_DATA_SECTION
 	bool
 
 config SYS_SOC
@@ -41,6 +43,14 @@ config IMX_CONTAINER_CFG
 	  This is to specific the cfg file for generating container
 	  image which will be loaded by SPL.
 
+config BOOTAUX_RESERVED_MEM_BASE
+	hex "i.MX auxiliary core dram memory base"
+	default 0
+
+config BOOTAUX_RESERVED_MEM_SIZE
+	hex "i.MX auxiliary core dram memory size"
+	default 0
+
 choice
 	prompt "i.MX8 board select"
 	optional
@@ -90,4 +100,17 @@ source "board/toradex/apalis-imx8/Kconfig"
 source "board/toradex/colibri-imx8x/Kconfig"
 source "board/siemens/capricorn/Kconfig"
 
+config IMX_SNVS_SEC_SC
+	bool "Support SNVS configuration"
+	help
+	  Allow to configure the SNVS via SCU API to configure tampers and secure
+	  violation.
+
+config IMX_SNVS_SEC_SC_AUTO
+	bool "Support SNVS configuration command"
+	depends on IMX_SNVS_SEC_SC
+	help
+	  This configuration will apply the selected configurations automatically
+	  at boot.
+
 endif
diff --git a/arch/arm/mach-imx/imx8/Makefile b/arch/arm/mach-imx/imx8/Makefile
index 7ffb7e95b2..bbb41adbe4 100644
--- a/arch/arm/mach-imx/imx8/Makefile
+++ b/arch/arm/mach-imx/imx8/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_AHAB_BOOT) += ahab.o
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SPL_LOAD_IMX_CONTAINER) += image.o parse-container.o
 endif
+obj-$(CONFIG_IMX_SNVS_SEC_SC) += snvs_security_sc.o
diff --git a/arch/arm/mach-imx/imx8/ahab.c b/arch/arm/mach-imx/imx8/ahab.c
index cf3c7d762a..22e76d535f 100644
--- a/arch/arm/mach-imx/imx8/ahab.c
+++ b/arch/arm/mach-imx/imx8/ahab.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/mach-imx/sys_proto.h>
@@ -75,7 +77,7 @@ int authenticate_os_container(ulong addr)
 	memcpy((void *)SEC_SECURE_RAM_BASE, (const void *)addr,
 	       ALIGN(length, CONFIG_SYS_CACHELINE_SIZE));
 
-	err = sc_seco_authenticate(-1, SC_MISC_AUTH_CONTAINER,
+	err = sc_seco_authenticate(-1, SC_SECO_AUTH_CONTAINER,
 				   SECO_LOCAL_SEC_SEC_SECURE_RAM_BASE);
 	if (err) {
 		printf("Authenticate container hdr failed, return %d\n",
@@ -90,22 +92,21 @@ int authenticate_os_container(ulong addr)
 					    sizeof(struct container_hdr) +
 					    i * sizeof(struct boot_img_t));
 
-		debug("img %d, dst 0x%llx, src 0x%lx, size 0x%x\n",
-		      i, img->dst, img->offset + addr, img->size);
+		debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
+		      i, (uint32_t) img->dst, img->offset + addr, img->size);
 
 		memcpy((void *)img->dst, (const void *)(img->offset + addr),
 		       img->size);
 
 		s = img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1);
-		e = ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE);
+		e = ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1;
 
 		flush_dcache_range(s, e);
 
 		/* Find the memreg and set permission for seco pt */
 		err = sc_rm_find_memreg(-1, &mr, s, e);
 		if (err) {
-			printf("Not found memreg for image: %d, error %d\n",
-			       i, err);
+			printf("Error: can't find memreg for image load address 0x%x, error %d\n", img->dst, err);
 			ret = -ENOMEM;
 			goto exit;
 		}
@@ -123,7 +124,7 @@ int authenticate_os_container(ulong addr)
 			goto exit;
 		}
 
-		err = sc_seco_authenticate(-1, SC_MISC_VERIFY_IMAGE,
+		err = sc_seco_authenticate(-1, SC_SECO_VERIFY_IMAGE,
 					   (1 << i));
 		if (err) {
 			printf("Authenticate img %d failed, return %d\n",
@@ -144,14 +145,14 @@ int authenticate_os_container(ulong addr)
 	}
 
 exit:
-	if (sc_seco_authenticate(-1, SC_MISC_REL_CONTAINER, 0) != SC_ERR_NONE)
+	if (sc_seco_authenticate(-1, SC_SECO_REL_CONTAINER, 0) != SC_ERR_NONE)
 		printf("Error: release container failed!\n");
 
 	return ret;
 }
 
-static int do_authenticate(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_authenticate(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	ulong addr;
 
@@ -251,8 +252,8 @@ static void display_ahab_auth_event(u32 event)
 	}
 }
 
-static int do_ahab_status(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_ahab_status(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int err;
 	u8 idx = 0U;
@@ -298,8 +299,8 @@ static int confirm_close(void)
 	return 0;
 }
 
-static int do_ahab_close(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_ahab_close(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int err;
 	u16 lc;
diff --git a/arch/arm/mach-imx/imx8/cpu.c b/arch/arm/mach-imx/imx8/cpu.c
index 2110380957..38b2c0926f 100644
--- a/arch/arm/mach-imx/imx8/cpu.c
+++ b/arch/arm/mach-imx/imx8/cpu.c
@@ -9,17 +9,22 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass.h>
 #include <errno.h>
+#include <spl.h>
 #include <thermal.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch-imx/cpu.h>
 #include <asm/armv8/cpu.h>
 #include <asm/armv8/mmu.h>
+#include <asm/setup.h>
 #include <asm/mach-imx/boot_mode.h>
+#include <spl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -38,6 +43,10 @@ struct pass_over_info_t *get_pass_over_info(void)
 
 int arch_cpu_init(void)
 {
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_RECOVER_DATA_SECTION)
+	spl_save_restore_data();
+#endif
+
 #ifdef CONFIG_SPL_BUILD
 	struct pass_over_info_t *pass_over;
 
@@ -162,6 +171,37 @@ enum boot_device get_boot_device(void)
 	return boot_dev;
 }
 
+#ifdef CONFIG_SERIAL_TAG
+#define FUSE_UNIQUE_ID_WORD0 16
+#define FUSE_UNIQUE_ID_WORD1 17
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+	sc_err_t err;
+	u32 val1 = 0, val2 = 0;
+	u32 word1, word2;
+
+	if (!serialnr)
+		return;
+
+	word1 = FUSE_UNIQUE_ID_WORD0;
+	word2 = FUSE_UNIQUE_ID_WORD1;
+
+	err = sc_misc_otp_fuse_read(-1, word1, &val1);
+	if (err != SC_ERR_NONE) {
+		printf("%s fuse %d read error: %d\n", __func__, word1, err);
+		return;
+	}
+
+	err = sc_misc_otp_fuse_read(-1, word2, &val2);
+	if (err != SC_ERR_NONE) {
+		printf("%s fuse %d read error: %d\n", __func__, word2, err);
+		return;
+	}
+	serialnr->low = val1;
+	serialnr->high = val2;
+}
+#endif /*CONFIG_SERIAL_TAG*/
+
 #ifdef CONFIG_ENV_IS_IN_MMC
 __weak int board_mmc_get_env_dev(int devno)
 {
@@ -223,7 +263,7 @@ static int get_owned_memreg(sc_rm_mr_t mr, sc_faddr_t *addr_start,
 phys_size_t get_effective_memsize(void)
 {
 	sc_rm_mr_t mr;
-	sc_faddr_t start, end, end1;
+	sc_faddr_t start, end, end1, start_aligned;
 	int err;
 
 	end1 = (sc_faddr_t)PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE;
@@ -231,9 +271,9 @@ phys_size_t get_effective_memsize(void)
 	for (mr = 0; mr < 64; mr++) {
 		err = get_owned_memreg(mr, &start, &end);
 		if (!err) {
-			start = roundup(start, MEMSTART_ALIGNMENT);
+			start_aligned = roundup(start, MEMSTART_ALIGNMENT);
 			/* Too small memory region, not use it */
-			if (start > end)
+			if (start_aligned > end)
 				continue;
 
 			/* Find the memory region runs the U-Boot */
@@ -537,3 +577,43 @@ u32 get_cpu_rev(void)
 	return (id << 12) | rev;
 }
 
+void board_boot_order(u32 *spl_boot_list)
+{
+	spl_boot_list[0] = spl_boot_device();
+
+	if (spl_boot_list[0] == BOOT_DEVICE_SPI) {
+		/* Check whether we own the flexspi0, if not, use NOR boot */
+		if (!sc_rm_is_resource_owned(-1, SC_R_FSPI_0))
+			spl_boot_list[0] = BOOT_DEVICE_NOR;
+	}
+}
+
+bool m4_parts_booted(void)
+{
+	sc_rm_pt_t m4_parts[2];
+	int err;
+
+	err = sc_rm_get_resource_owner(-1, SC_R_M4_0_PID0, &m4_parts[0]);
+	if (err) {
+		printf("%s get resource [%d] owner error: %d\n", __func__,
+		       SC_R_M4_0_PID0, err);
+		return false;
+	}
+
+	if (sc_pm_is_partition_started(-1, m4_parts[0]))
+		return true;
+
+	if (is_imx8qm()) {
+		err = sc_rm_get_resource_owner(-1, SC_R_M4_1_PID0, &m4_parts[1]);
+		if (err) {
+			printf("%s get resource [%d] owner error: %d\n",
+			       __func__, SC_R_M4_1_PID0, err);
+			return false;
+		}
+
+		if (sc_pm_is_partition_started(-1, m4_parts[1]))
+			return true;
+	}
+
+	return false;
+}
diff --git a/arch/arm/mach-imx/imx8/fdt.c b/arch/arm/mach-imx/imx8/fdt.c
index 65c8ac1a7e..7d70498fc8 100644
--- a/arch/arm/mach-imx/imx8/fdt.c
+++ b/arch/arm/mach-imx/imx8/fdt.c
@@ -4,10 +4,12 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/sys_proto.h>
 #include <dm/ofnode.h>
 #include <fdt_support.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -105,13 +107,13 @@ static int config_smmu_resource_sid(int rsrc, int sid)
 {
 	int err;
 
-	if (!check_owned_resource(rsrc)) {
-		printf("%s rsrc[%d] not owned\n", __func__, rsrc);
-		return -1;
-	}
 	err = sc_rm_set_master_sid(-1, rsrc, sid);
 	debug("set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err);
 	if (err != SC_ERR_NONE) {
+		if (!check_owned_resource(rsrc)) {
+			printf("%s rsrc[%d] not owned\n", __func__, rsrc);
+			return -1;
+		}
 		pr_err("fail set_master_sid rsrc=%d sid=0x%x err=%d\n", rsrc, sid, err);
 		return -EINVAL;
 	}
@@ -279,6 +281,15 @@ static int ft_add_optee_node(void *fdt, bd_t *bd)
 int ft_system_setup(void *blob, bd_t *bd)
 {
 	int ret;
+	int off;
+
+	if (CONFIG_BOOTAUX_RESERVED_MEM_BASE) {
+		off = fdt_add_mem_rsv(blob, CONFIG_BOOTAUX_RESERVED_MEM_BASE,
+				      CONFIG_BOOTAUX_RESERVED_MEM_SIZE);
+		if (off < 0)
+			printf("Failed	to reserve memory for bootaux: %s\n",
+			       fdt_strerror(off));
+	}
 
 	update_fdt_with_owned_resources(blob);
 
diff --git a/arch/arm/mach-imx/imx8/image.c b/arch/arm/mach-imx/imx8/image.c
index e6b299691d..5abc0d3a39 100644
--- a/arch/arm/mach-imx/imx8/image.c
+++ b/arch/arm/mach-imx/imx8/image.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <mmc.h>
diff --git a/arch/arm/mach-imx/imx8/iomux.c b/arch/arm/mach-imx/imx8/iomux.c
index 0ade85fb8f..b8e6f48a5f 100644
--- a/arch/arm/mach-imx/imx8/iomux.c
+++ b/arch/arm/mach-imx/imx8/iomux.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/sci/sci.h>
diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c
index 00fe4670bb..2cd794d54a 100644
--- a/arch/arm/mach-imx/imx8/misc.c
+++ b/arch/arm/mach-imx/imx8/misc.c
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0+
 #include <common.h>
+#include <log.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/mach-imx/sys_proto.h>
+#include <imx_sip.h>
 
 int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate)
 {
@@ -26,9 +28,6 @@ int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate)
 	return 0;
 }
 
-#define FSL_SIP_BUILDINFO			0xC2000003
-#define FSL_SIP_BUILDINFO_GET_COMMITHASH	0x00
-
 void build_info(void)
 {
 	u32 seco_build = 0, seco_commit = 0;
@@ -51,8 +50,8 @@ void build_info(void)
 	}
 
 	/* Get ARM Trusted Firmware commit id */
-	atf_commit = call_imx_sip(FSL_SIP_BUILDINFO,
-				  FSL_SIP_BUILDINFO_GET_COMMITHASH, 0, 0, 0);
+	atf_commit = call_imx_sip(IMX_SIP_BUILDINFO,
+				  IMX_SIP_BUILDINFO_GET_COMMITHASH, 0, 0, 0);
 	if (atf_commit == 0xffffffff) {
 		debug("ATF does not support build info\n");
 		atf_commit = 0x30; /* Display 0 */
diff --git a/arch/arm/mach-imx/imx8/parse-container.c b/arch/arm/mach-imx/imx8/parse-container.c
index b57e68e412..375098902f 100644
--- a/arch/arm/mach-imx/imx8/parse-container.c
+++ b/arch/arm/mach-imx/imx8/parse-container.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/arch/image.h>
 #include <asm/arch/sci/sci.h>
@@ -23,23 +24,23 @@ static int authenticate_image(struct boot_img_t *img, int image_index)
 	int err;
 	int ret = 0;
 
-	debug("img %d, dst 0x%llx, src 0x%x, size 0x%x\n",
-	      image_index, img->dst, img->offset, img->size);
+	debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
+	      image_index, (uint32_t)img->dst, img->offset, img->size);
 
 	/* Find the memreg and set permission for seco pt */
 	err = sc_rm_find_memreg(-1, &mr,
 				img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1),
-				ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE));
+				ALIGN(img->dst + img->size, CONFIG_SYS_CACHELINE_SIZE) - 1);
 
 	if (err) {
-		printf("can't find memreg for image: %d, err %d\n",
-		       image_index, err);
+		printf("can't find memreg for image %d load address 0x%x, error %d\n",
+		       image_index, img->dst & ~(CONFIG_SYS_CACHELINE_SIZE - 1), err);
 		return -ENOMEM;
 	}
 
 	err = sc_rm_get_memreg_info(-1, mr, &start, &end);
 	if (!err)
-		debug("memreg %u 0x%llx -- 0x%llx\n", mr, start, end);
+		debug("memreg %u 0x%x -- 0x%x\n", mr, start, end);
 
 	err = sc_rm_set_memreg_permissions(-1, mr,
 					   SECO_PT, SC_RM_PERM_FULL);
@@ -49,7 +50,7 @@ static int authenticate_image(struct boot_img_t *img, int image_index)
 		return -EPERM;
 	}
 
-	err = sc_seco_authenticate(-1, SC_MISC_VERIFY_IMAGE,
+	err = sc_seco_authenticate(-1, SC_SECO_VERIFY_IMAGE,
 				   1 << image_index);
 	if (err) {
 		printf("authenticate img %d failed, return %d\n",
@@ -168,7 +169,7 @@ static int read_auth_container(struct spl_image_info *spl_image,
 	memcpy((void *)SEC_SECURE_RAM_BASE, (const void *)container,
 	       ALIGN(length, CONFIG_SYS_CACHELINE_SIZE));
 
-	ret = sc_seco_authenticate(-1, SC_MISC_AUTH_CONTAINER,
+	ret = sc_seco_authenticate(-1, SC_SECO_AUTH_CONTAINER,
 				   SECO_LOCAL_SEC_SEC_SECURE_RAM_BASE);
 	if (ret) {
 		printf("authenticate container hdr failed, return %d\n", ret);
@@ -194,7 +195,7 @@ static int read_auth_container(struct spl_image_info *spl_image,
 
 end_auth:
 #ifdef CONFIG_AHAB_BOOT
-	if (sc_seco_authenticate(-1, SC_MISC_REL_CONTAINER, 0))
+	if (sc_seco_authenticate(-1, SC_SECO_REL_CONTAINER, 0))
 		printf("Error: release container failed!\n");
 #endif
 	return ret;
diff --git a/arch/arm/mach-imx/imx8/snvs_security_sc.c b/arch/arm/mach-imx/imx8/snvs_security_sc.c
new file mode 100644
index 0000000000..564d1bfdfb
--- /dev/null
+++ b/arch/arm/mach-imx/imx8/snvs_security_sc.c
@@ -0,0 +1,924 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2020 NXP.
+ */
+
+/*
+ * Configuration of the Tamper pins in different mode:
+ *  - default (no tamper pins): _default_
+ *  - passive mode expecting VCC on the line: "_passive_vcc_"
+ *  - passive mode expecting VCC on the line: "_passive_gnd_"
+ *  - active mode: "_active_"
+ */
+
+#include <command.h>
+#include <log.h>
+#include <stddef.h>
+#include <common.h>
+#include <asm/arch/sci/sci.h>
+#include <asm/arch-imx8/imx8-pins.h>
+#include <asm/arch-imx8/snvs_security_sc.h>
+
+/* Access to gd */
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SC_WRITE_CONF 1
+
+#define PGD_HEX_VALUE 0x41736166
+#define SRTC_EN 0x1
+#define DP_EN BIT(5)
+
+struct snvs_security_sc_conf {
+	struct snvs_hp_conf {
+		u32 lock;		/* HPLR - HP Lock */
+		u32 __cmd;		/* HPCOMR - HP Command */
+		u32 __ctl;		/* HPCR - HP Control */
+		u32 secvio_intcfg;	/* HPSICR - Security Violation Int
+					 * Config
+					 */
+		u32 secvio_ctl;		/* HPSVCR - Security Violation Control*/
+		u32 status;		/* HPSR - HP Status */
+		u32 secvio_status;	/* HPSVSR - Security Violation Status */
+		u32 __ha_counteriv;	/* High Assurance Counter IV */
+		u32 __ha_counter;		/* High Assurance Counter */
+		u32 __rtc_msb;		/* Real Time Clock/Counter MSB */
+		u32 __rtc_lsb;		/* Real Time Counter LSB */
+		u32 __time_alarm_msb;	/* Time Alarm MSB */
+		u32 __time_alarm_lsb;	/* Time Alarm LSB */
+	} hp;
+	struct snvs_lp_conf {
+		u32 lock;
+		u32 __ctl;
+		u32 __mstr_key_ctl;	/* Master Key Control */
+		u32 secvio_ctl;		/* Security Violation Control */
+		u32 tamper_filt_cfg;	/* Tamper Glitch Filters Configuration*/
+		u32 tamper_det_cfg;	/* Tamper Detectors Configuration */
+		u32 status;
+		u32 __srtc_msb;		/* Secure Real Time Clock/Counter MSB */
+		u32 __srtc_lsb;		/* Secure Real Time Clock/Counter LSB */
+		u32 __time_alarm;		/* Time Alarm */
+		u32 __smc_msb;		/* Secure Monotonic Counter MSB */
+		u32 __smc_lsb;		/* Secure Monotonic Counter LSB */
+		u32 __pwr_glitch_det;	/* Power Glitch Detector */
+		u32 __gen_purpose;
+		u8 __zmk[32];		/* Zeroizable Master Key */
+		u32 __rsvd0;
+		u32 __gen_purposes[4];	/* gp0_30 to gp0_33 */
+		u32 tamper_det_cfg2;	/* Tamper Detectors Configuration2 */
+		u32 tamper_det_status;	/* Tamper Detectors status */
+		u32 tamper_filt1_cfg;	/* Tamper Glitch Filter1 Configuration*/
+		u32 tamper_filt2_cfg;	/* Tamper Glitch Filter2 Configuration*/
+		u32 __rsvd1[4];
+		u32 act_tamper1_cfg;	/* Active Tamper1 Configuration */
+		u32 act_tamper2_cfg;	/* Active Tamper2 Configuration */
+		u32 act_tamper3_cfg;	/* Active Tamper3 Configuration */
+		u32 act_tamper4_cfg;	/* Active Tamper4 Configuration */
+		u32 act_tamper5_cfg;	/* Active Tamper5 Configuration */
+		u32 __rsvd2[3];
+		u32 act_tamper_ctl;	/* Active Tamper Control */
+		u32 act_tamper_clk_ctl;	/* Active Tamper Clock Control */
+		u32 act_tamper_routing_ctl1;/* Active Tamper Routing Control1 */
+		u32 act_tamper_routing_ctl2;/* Active Tamper Routing Control2 */
+	} lp;
+};
+
+static struct snvs_security_sc_conf snvs_default_config = {
+	.hp = {
+		.lock = 0x1f0703ff,
+		.secvio_ctl = 0x3000007f,
+	},
+	.lp = {
+		.lock = 0x1f0003ff,
+		.secvio_ctl = 0x36,
+		.tamper_filt_cfg = 0,
+		.tamper_det_cfg = 0x76, /* analogic tampers
+					 * + rollover tampers
+					 */
+		.tamper_det_cfg2 = 0,
+		.tamper_filt1_cfg = 0,
+		.tamper_filt2_cfg = 0,
+		.act_tamper1_cfg = 0,
+		.act_tamper2_cfg = 0,
+		.act_tamper3_cfg = 0,
+		.act_tamper4_cfg = 0,
+		.act_tamper5_cfg = 0,
+		.act_tamper_ctl = 0,
+		.act_tamper_clk_ctl = 0,
+		.act_tamper_routing_ctl1 = 0,
+		.act_tamper_routing_ctl2 = 0,
+	}
+};
+
+static struct snvs_security_sc_conf snvs_passive_vcc_config = {
+	.hp = {
+		.lock = 0x1f0703ff,
+		.secvio_ctl = 0x3000007f,
+	},
+	.lp = {
+		.lock = 0x1f0003ff,
+		.secvio_ctl = 0x36,
+		.tamper_filt_cfg = 0,
+		.tamper_det_cfg = 0x276, /* ET1 will trig on line at GND
+					  *  + analogic tampers
+					  *  + rollover tampers
+					  */
+		.tamper_det_cfg2 = 0,
+		.tamper_filt1_cfg = 0,
+		.tamper_filt2_cfg = 0,
+		.act_tamper1_cfg = 0,
+		.act_tamper2_cfg = 0,
+		.act_tamper3_cfg = 0,
+		.act_tamper4_cfg = 0,
+		.act_tamper5_cfg = 0,
+		.act_tamper_ctl = 0,
+		.act_tamper_clk_ctl = 0,
+		.act_tamper_routing_ctl1 = 0,
+		.act_tamper_routing_ctl2 = 0,
+	}
+};
+
+static struct snvs_security_sc_conf snvs_passive_gnd_config = {
+	.hp = {
+		.lock = 0x1f0703ff,
+		.secvio_ctl = 0x3000007f,
+	},
+	.lp = {
+		.lock = 0x1f0003ff,
+		.secvio_ctl = 0x36,
+		.tamper_filt_cfg = 0,
+		.tamper_det_cfg = 0xa76, /* ET1 will trig on line at VCC
+					  *  + analogic tampers
+					  *  + rollover tampers
+					  */
+		.tamper_det_cfg2 = 0,
+		.tamper_filt1_cfg = 0,
+		.tamper_filt2_cfg = 0,
+		.act_tamper1_cfg = 0,
+		.act_tamper2_cfg = 0,
+		.act_tamper3_cfg = 0,
+		.act_tamper4_cfg = 0,
+		.act_tamper5_cfg = 0,
+		.act_tamper_ctl = 0,
+		.act_tamper_clk_ctl = 0,
+		.act_tamper_routing_ctl1 = 0,
+		.act_tamper_routing_ctl2 = 0,
+	}
+};
+
+static struct snvs_security_sc_conf snvs_active_config = {
+	.hp = {
+		.lock = 0x1f0703ff,
+		.secvio_ctl = 0x3000007f,
+	},
+	.lp = {
+		.lock = 0x1f0003ff,
+		.secvio_ctl = 0x36,
+		.tamper_filt_cfg = 0x00800000, /* Enable filtering */
+		.tamper_det_cfg = 0x276, /* ET1 enabled + analogic tampers
+					  *  + rollover tampers
+					  */
+		.tamper_det_cfg2 = 0,
+		.tamper_filt1_cfg = 0,
+		.tamper_filt2_cfg = 0,
+		.act_tamper1_cfg = 0x84001111,
+		.act_tamper2_cfg = 0,
+		.act_tamper3_cfg = 0,
+		.act_tamper4_cfg = 0,
+		.act_tamper5_cfg = 0,
+		.act_tamper_ctl = 0x00010001,
+		.act_tamper_clk_ctl = 0,
+		.act_tamper_routing_ctl1 = 0x1,
+		.act_tamper_routing_ctl2 = 0,
+	}
+};
+
+static struct snvs_security_sc_conf *get_snvs_config(void)
+{
+	return &snvs_default_config;
+}
+
+struct snvs_dgo_conf {
+	u32 tamper_offset_ctl;
+	u32 tamper_pull_ctl;
+	u32 tamper_ana_test_ctl;
+	u32 tamper_sensor_trim_ctl;
+	u32 tamper_misc_ctl;
+	u32 tamper_core_volt_mon_ctl;
+};
+
+static struct snvs_dgo_conf snvs_dgo_default_config = {
+	.tamper_misc_ctl = 0x80000000, /* Lock the DGO */
+};
+
+static struct snvs_dgo_conf snvs_dgo_passive_vcc_config = {
+	.tamper_misc_ctl = 0x80000000, /* Lock the DGO */
+	.tamper_pull_ctl = 0x00000001, /* Pull down ET1 */
+	.tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
+};
+
+static struct snvs_dgo_conf snvs_dgo_passive_gnd_config = {
+	.tamper_misc_ctl = 0x80000000, /* Lock the DGO */
+	.tamper_pull_ctl = 0x00000401, /* Pull up ET1 */
+	.tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
+};
+
+static struct snvs_dgo_conf snvs_dgo_active_config = {
+	.tamper_misc_ctl = 0x80000000, /* Lock the DGO */
+	.tamper_ana_test_ctl = 0x20000000, /* Enable tamper */
+};
+
+static struct snvs_dgo_conf *get_snvs_dgo_config(void)
+{
+	return &snvs_dgo_default_config;
+}
+
+struct tamper_pin_cfg {
+	u32 pad;
+	u32 mux_conf;
+};
+
+static struct tamper_pin_cfg tamper_pin_list_default_config[] = {
+	{SC_P_CSI_D00, 0}, /* Tamp_Out0 */
+	{SC_P_CSI_D01, 0}, /* Tamp_Out1 */
+	{SC_P_CSI_D02, 0}, /* Tamp_Out2 */
+	{SC_P_CSI_D03, 0}, /* Tamp_Out3 */
+	{SC_P_CSI_D04, 0}, /* Tamp_Out4 */
+	{SC_P_CSI_D05, 0}, /* Tamp_In0 */
+	{SC_P_CSI_D06, 0}, /* Tamp_In1 */
+	{SC_P_CSI_D07, 0}, /* Tamp_In2 */
+	{SC_P_CSI_HSYNC, 0}, /* Tamp_In3 */
+	{SC_P_CSI_VSYNC, 0}, /* Tamp_In4 */
+};
+
+static struct tamper_pin_cfg tamper_pin_list_passive_vcc_config[] = {
+	{SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
+};
+
+static struct tamper_pin_cfg tamper_pin_list_passive_gnd_config[] = {
+	{SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
+};
+
+static struct tamper_pin_cfg tamper_pin_list_active_config[] = {
+	{SC_P_CSI_D00, 0x1a000060}, /* Tamp_Out0 */ /* Sel tamper + OD */
+	{SC_P_CSI_D05, 0x1c000060}, /* Tamp_In0 */ /* Sel tamper + OD input */
+};
+
+#define TAMPER_PIN_LIST_CHOSEN tamper_pin_list_default_config
+
+static struct tamper_pin_cfg *get_tamper_pin_cfg_list(u32 *size)
+{
+	*size = sizeof(TAMPER_PIN_LIST_CHOSEN) /
+		sizeof(TAMPER_PIN_LIST_CHOSEN[0]);
+
+	return TAMPER_PIN_LIST_CHOSEN;
+}
+
+#define SC_CONF_OFFSET_OF(_field) \
+	(offsetof(struct snvs_security_sc_conf, _field))
+
+static u32 ptr_value(u32 *_p)
+{
+	return (_p) ? *_p : 0xdeadbeef;
+}
+
+static int check_write_secvio_config(u32 id, u32 *_p1, u32 *_p2,
+				     u32 *_p3, u32 *_p4, u32 *_p5,
+				     u32 _cnt)
+{
+	int scierr = 0;
+	u32 d1 = ptr_value(_p1);
+	u32 d2 = ptr_value(_p2);
+	u32 d3 = ptr_value(_p3);
+	u32 d4 = ptr_value(_p4);
+	u32 d5 = ptr_value(_p5);
+
+	scierr = sc_seco_secvio_config(-1, id, SC_WRITE_CONF, &d1, &d2, &d3,
+				       &d4, &d4, _cnt);
+	if (scierr != SC_ERR_NONE) {
+		printf("Failed to set secvio configuration\n");
+		debug("Failed to set conf id 0x%x with values ", id);
+		debug("0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x (cnt: %d)\n",
+		      d1, d2, d3, d4, d5, _cnt);
+		goto exit;
+	}
+
+	if (_p1)
+		*(u32 *)_p1 = d1;
+	if (_p2)
+		*(u32 *)_p2 = d2;
+	if (_p3)
+		*(u32 *)_p3 = d3;
+	if (_p4)
+		*(u32 *)_p4 = d4;
+	if (_p5)
+		*(u32 *)_p5 = d5;
+
+exit:
+	return scierr;
+}
+
+#define SC_CHECK_WRITE1(id, _p1) \
+	check_write_secvio_config(id, _p1, NULL, NULL, NULL, NULL, 1)
+
+static int apply_snvs_config(struct snvs_security_sc_conf *cnf)
+{
+	int scierr = 0;
+
+	debug("%s\n", __func__);
+
+	debug("Applying config:\n"
+		  "\thp.lock = 0x%.8x\n"
+		  "\thp.secvio_ctl = 0x%.8x\n"
+		  "\tlp.lock = 0x%.8x\n"
+		  "\tlp.secvio_ctl = 0x%.8x\n"
+		  "\tlp.tamper_filt_cfg = 0x%.8x\n"
+		  "\tlp.tamper_det_cfg = 0x%.8x\n"
+		  "\tlp.tamper_det_cfg2 = 0x%.8x\n"
+		  "\tlp.tamper_filt1_cfg = 0x%.8x\n"
+		  "\tlp.tamper_filt2_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper1_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper2_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper3_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper4_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper5_cfg = 0x%.8x\n"
+		  "\tlp.act_tamper_ctl = 0x%.8x\n"
+		  "\tlp.act_tamper_clk_ctl = 0x%.8x\n"
+		  "\tlp.act_tamper_routing_ctl1 = 0x%.8x\n"
+		  "\tlp.act_tamper_routing_ctl2 = 0x%.8x\n",
+			cnf->hp.lock,
+			cnf->hp.secvio_ctl,
+			cnf->lp.lock,
+			cnf->lp.secvio_ctl,
+			cnf->lp.tamper_filt_cfg,
+			cnf->lp.tamper_det_cfg,
+			cnf->lp.tamper_det_cfg2,
+			cnf->lp.tamper_filt1_cfg,
+			cnf->lp.tamper_filt2_cfg,
+			cnf->lp.act_tamper1_cfg,
+			cnf->lp.act_tamper2_cfg,
+			cnf->lp.act_tamper3_cfg,
+			cnf->lp.act_tamper4_cfg,
+			cnf->lp.act_tamper5_cfg,
+			cnf->lp.act_tamper_ctl,
+			cnf->lp.act_tamper_clk_ctl,
+			cnf->lp.act_tamper_routing_ctl1,
+			cnf->lp.act_tamper_routing_ctl2);
+
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_filt_cfg),
+					   &cnf->lp.tamper_filt_cfg,
+					   &cnf->lp.tamper_filt1_cfg,
+					   &cnf->lp.tamper_filt2_cfg, NULL,
+					   NULL, 3);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Configure AT */
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.act_tamper1_cfg),
+					   &cnf->lp.act_tamper1_cfg,
+					   &cnf->lp.act_tamper2_cfg,
+					   &cnf->lp.act_tamper2_cfg,
+					   &cnf->lp.act_tamper2_cfg,
+					   &cnf->lp.act_tamper2_cfg, 5);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Configure AT routing */
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.act_tamper_routing_ctl1),
+					   &cnf->lp.act_tamper_routing_ctl1,
+					   &cnf->lp.act_tamper_routing_ctl2,
+					   NULL, NULL, NULL, 2);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Configure AT frequency */
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.act_tamper_clk_ctl),
+				 &cnf->lp.act_tamper_clk_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Activate the ATs */
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.act_tamper_ctl),
+				 &cnf->lp.act_tamper_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Activate the detectors */
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_det_cfg),
+					   &cnf->lp.tamper_det_cfg,
+					   &cnf->lp.tamper_det_cfg2, NULL, NULL,
+					   NULL, 2);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Configure LP secvio */
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.secvio_ctl),
+				 &cnf->lp.secvio_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Configure HP secvio */
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.secvio_ctl),
+				 &cnf->hp.secvio_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Lock access */
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(hp.lock), &cnf->hp.lock);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	scierr = SC_CHECK_WRITE1(SC_CONF_OFFSET_OF(lp.lock), &cnf->lp.lock);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+exit:
+	return (scierr == SC_ERR_NONE) ? 0 : -EIO;
+}
+
+static int dgo_write(u32 _id, u8 _access, u32 *_pdata)
+{
+	int scierr = sc_seco_secvio_dgo_config(-1, _id, _access, _pdata);
+
+	if (scierr != SC_ERR_NONE) {
+		printf("Failed to set dgo configuration\n");
+		debug("Failed to set conf id 0x%x : 0x%.8x", _id, *_pdata);
+	}
+
+	return scierr;
+}
+
+static int apply_snvs_dgo_config(struct snvs_dgo_conf *cnf)
+{
+	int scierr = 0;
+
+	debug("%s\n", __func__);
+
+	debug("Applying config:\n"
+		"\ttamper_offset_ctl = 0x%.8x\n"
+		"\ttamper_pull_ctl = 0x%.8x\n"
+		"\ttamper_ana_test_ctl = 0x%.8x\n"
+		"\ttamper_sensor_trim_ctl = 0x%.8x\n"
+		"\ttamper_misc_ctl = 0x%.8x\n"
+		"\ttamper_core_volt_mon_ctl = 0x%.8x\n",
+			cnf->tamper_offset_ctl,
+			cnf->tamper_pull_ctl,
+			cnf->tamper_ana_test_ctl,
+			cnf->tamper_sensor_trim_ctl,
+			cnf->tamper_misc_ctl,
+			cnf->tamper_core_volt_mon_ctl);
+
+	dgo_write(0x04, 1, &cnf->tamper_offset_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	dgo_write(0x14, 1, &cnf->tamper_pull_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	dgo_write(0x24, 1, &cnf->tamper_ana_test_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	dgo_write(0x34, 1, &cnf->tamper_sensor_trim_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	dgo_write(0x54, 1, &cnf->tamper_core_volt_mon_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	/* Last as it could lock the writes */
+	dgo_write(0x44, 1, &cnf->tamper_misc_ctl);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+exit:
+	return (scierr == SC_ERR_NONE) ? 0 : -EIO;
+}
+
+static int pad_write(u32 _pad, u32 _value)
+{
+	int scierr = sc_pad_set(-1, _pad, _value);
+
+	if (scierr != SC_ERR_NONE) {
+		printf("Failed to set pad configuration\n");
+		debug("Failed to set conf pad 0x%x : 0x%.8x", _pad, _value);
+	}
+
+	return scierr;
+}
+
+static int apply_tamper_pin_list_config(struct tamper_pin_cfg *confs, u32 size)
+{
+	int scierr = 0;
+	u32 idx;
+
+	debug("%s\n", __func__);
+
+	for (idx = 0; idx < size; idx++) {
+		debug("\t idx %d: pad %d: 0x%.8x\n", idx, confs[idx].pad,
+		      confs[idx].mux_conf);
+		pad_write(confs[idx].pad, 3 << 30 | confs[idx].mux_conf);
+		if (scierr != SC_ERR_NONE)
+			goto exit;
+	}
+
+exit:
+	return (scierr == SC_ERR_NONE) ? 0 : -EIO;
+}
+
+int examples(void)
+{
+	u32 size;
+	struct snvs_security_sc_conf *snvs_conf;
+	struct snvs_dgo_conf *snvs_dgo_conf;
+	struct tamper_pin_cfg *tamper_pin_conf;
+
+	/* Caller */
+	snvs_conf = get_snvs_config();
+	snvs_dgo_conf = get_snvs_dgo_config();
+	tamper_pin_conf = get_tamper_pin_cfg_list(&size);
+
+	/* Default */
+	snvs_conf = &snvs_default_config;
+	snvs_dgo_conf = &snvs_dgo_default_config;
+	tamper_pin_conf = tamper_pin_list_default_config;
+
+	/* Passive tamper expecting VCC on the line */
+	snvs_conf = &snvs_passive_vcc_config;
+	snvs_dgo_conf = &snvs_dgo_passive_vcc_config;
+	tamper_pin_conf = tamper_pin_list_passive_vcc_config;
+
+	/* Passive tamper expecting GND on the line */
+	snvs_conf = &snvs_passive_gnd_config;
+	snvs_dgo_conf = &snvs_dgo_passive_gnd_config;
+	tamper_pin_conf = tamper_pin_list_passive_gnd_config;
+
+	/* Active tamper */
+	snvs_conf = &snvs_active_config;
+	snvs_dgo_conf = &snvs_dgo_active_config;
+	tamper_pin_conf = tamper_pin_list_active_config;
+
+	return !snvs_conf + !snvs_dgo_conf + !tamper_pin_conf;
+}
+
+#ifdef CONFIG_IMX_SNVS_SEC_SC_AUTO
+int snvs_security_sc_init(void)
+{
+	int err = 0;
+
+	struct snvs_security_sc_conf *snvs_conf;
+	struct snvs_dgo_conf *snvs_dgo_conf;
+	struct tamper_pin_cfg *tamper_pin_conf;
+	u32 size;
+
+	debug("%s\n", __func__);
+
+	snvs_conf = get_snvs_config();
+	snvs_dgo_conf = get_snvs_dgo_config();
+
+	tamper_pin_conf = get_tamper_pin_cfg_list(&size);
+
+	err = apply_tamper_pin_list_config(tamper_pin_conf, size);
+	if (err) {
+		debug("Failed to set pins\n");
+		goto exit;
+	}
+
+	err = apply_snvs_dgo_config(snvs_dgo_conf);
+	if (err) {
+		debug("Failed to set dgo\n");
+		goto exit;
+	}
+
+	err = apply_snvs_config(snvs_conf);
+	if (err) {
+		debug("Failed to set snvs\n");
+		goto exit;
+	}
+
+exit:
+	return err;
+}
+#endif /* CONFIG_IMX_SNVS_SEC_SC_AUTO */
+
+static char snvs_cfg_help_text[] =
+	"snvs_cfg\n"
+	"\thp.lock\n"
+	"\thp.secvio_ctl\n"
+	"\tlp.lock\n"
+	"\tlp.secvio_ctl\n"
+	"\tlp.tamper_filt_cfg\n"
+	"\tlp.tamper_det_cfg\n"
+	"\tlp.tamper_det_cfg2\n"
+	"\tlp.tamper_filt1_cfg\n"
+	"\tlp.tamper_filt2_cfg\n"
+	"\tlp.act_tamper1_cfg\n"
+	"\tlp.act_tamper2_cfg\n"
+	"\tlp.act_tamper3_cfg\n"
+	"\tlp.act_tamper4_cfg\n"
+	"\tlp.act_tamper5_cfg\n"
+	"\tlp.act_tamper_ctl\n"
+	"\tlp.act_tamper_clk_ctl\n"
+	"\tlp.act_tamper_routing_ctl1\n"
+	"\tlp.act_tamper_routing_ctl2\n"
+	"\n"
+	"ALL values should be in hexadecimal format";
+
+#define NB_REGISTERS 18
+static int do_snvs_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
+{
+	int err = 0;
+	u32 idx = 0;
+
+	struct snvs_security_sc_conf conf = {0};
+
+	if (argc != (NB_REGISTERS + 1))
+		return CMD_RET_USAGE;
+
+	conf.hp.lock = simple_strtoul(argv[++idx], NULL, 16);
+	conf.hp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.lock = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.secvio_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_filt_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_det_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_det_cfg2 = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_filt1_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_filt2_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper1_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper2_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper3_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper4_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper5_cfg = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper_clk_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper_routing_ctl1 = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.act_tamper_routing_ctl2 = simple_strtoul(argv[++idx], NULL, 16);
+
+	err = apply_snvs_config(&conf);
+
+	return err;
+}
+
+U_BOOT_CMD(snvs_cfg,
+	   NB_REGISTERS + 1, 1, do_snvs_cfg,
+	   "Security violation configuration",
+	   snvs_cfg_help_text
+);
+
+static char snvs_dgo_cfg_help_text[] =
+	"snvs_dgo_cfg\n"
+	"\ttamper_offset_ctl\n"
+	"\ttamper_pull_ctl\n"
+	"\ttamper_ana_test_ctl\n"
+	"\ttamper_sensor_trim_ctl\n"
+	"\ttamper_misc_ctl\n"
+	"\ttamper_core_volt_mon_ctl\n"
+	"\n"
+	"ALL values should be in hexadecimal format";
+
+static int do_snvs_dgo_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
+{
+	int err = 0;
+	u32 idx = 0;
+
+	struct snvs_dgo_conf conf = {0};
+
+	if (argc != (6 + 1))
+		return CMD_RET_USAGE;
+
+	conf.tamper_offset_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.tamper_pull_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.tamper_ana_test_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.tamper_sensor_trim_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.tamper_misc_ctl = simple_strtoul(argv[++idx], NULL, 16);
+	conf.tamper_core_volt_mon_ctl = simple_strtoul(argv[++idx], NULL, 16);
+
+	err = apply_snvs_dgo_config(&conf);
+
+	return err;
+}
+
+U_BOOT_CMD(snvs_dgo_cfg,
+	   7, 1, do_snvs_dgo_cfg,
+	   "SNVS DGO configuration",
+	   snvs_dgo_cfg_help_text
+);
+
+static char tamper_pin_cfg_help_text[] =
+	"snvs_dgo_cfg\n"
+	"\tpad\n"
+	"\tvalue\n"
+	"\n"
+	"ALL values should be in hexadecimal format";
+
+static int do_tamper_pin_cfg(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
+{
+	int err = 0;
+	u32 idx = 0;
+
+	struct tamper_pin_cfg conf = {0};
+
+	if (argc != (2 + 1))
+		return CMD_RET_USAGE;
+
+	conf.pad = simple_strtoul(argv[++idx], NULL, 10);
+	conf.mux_conf = simple_strtoul(argv[++idx], NULL, 16);
+
+	err = apply_tamper_pin_list_config(&conf, 1);
+
+	return err;
+}
+
+U_BOOT_CMD(tamper_pin_cfg,
+	   3, 1, do_tamper_pin_cfg,
+	   "tamper pin configuration",
+	   tamper_pin_cfg_help_text
+);
+
+static char snvs_clear_status_help_text[] =
+	"snvs_clear_status\n"
+	"\tHPSR\n"
+	"\tHPSVSR\n"
+	"\tLPSR\n"
+	"\tLPTDSR\n"
+	"\n"
+	"Write the status registers with the value provided,"
+	" clearing the status";
+
+static int do_snvs_clear_status(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[])
+{
+	int scierr = 0;
+	u32 idx = 0;
+
+	struct snvs_security_sc_conf conf = {0};
+
+	if (argc != (2 + 1))
+		return CMD_RET_USAGE;
+
+	conf.lp.status = simple_strtoul(argv[++idx], NULL, 16);
+	conf.lp.tamper_det_status = simple_strtoul(argv[++idx], NULL, 16);
+
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.status),
+					   &conf.lp.status, NULL, NULL, NULL,
+					   NULL, 1);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+	scierr = check_write_secvio_config(SC_CONF_OFFSET_OF(lp.tamper_det_status),
+					   &conf.lp.tamper_det_status, NULL,
+					   NULL, NULL, NULL, 1);
+	if (scierr != SC_ERR_NONE)
+		goto exit;
+
+exit:
+	return (scierr == SC_ERR_NONE) ? 0 : 1;
+}
+
+U_BOOT_CMD(snvs_clear_status,
+	   3, 1, do_snvs_clear_status,
+	   "snvs clear status",
+	   snvs_clear_status_help_text
+);
+
+static char snvs_sec_status_help_text[] =
+	"snvs_sec_status\n"
+	"Display information about the security related to tamper and secvio";
+
+static int do_snvs_sec_status(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
+{
+	int scierr;
+	u32 idx;
+
+	u32 data[5];
+
+	u32 pads[] = {
+		SC_P_CSI_D00,
+		SC_P_CSI_D01,
+		SC_P_CSI_D02,
+		SC_P_CSI_D03,
+		SC_P_CSI_D04,
+		SC_P_CSI_D05,
+		SC_P_CSI_D06,
+		SC_P_CSI_D07,
+		SC_P_CSI_HSYNC,
+		SC_P_CSI_VSYNC,
+	};
+
+	u32 fuses[] = {
+		14,
+		30,
+		31,
+		260,
+		261,
+		262,
+		263,
+		768,
+	};
+
+	struct snvs_reg {
+		u32 id;
+		u32 nb;
+	} snvs[] = {
+		/* Locks */
+		{0x0,  1},
+		{0x34, 1},
+		/* Security violation */
+		{0xc,  1},
+		{0x10, 1},
+		{0x18, 1},
+		{0x40, 1},
+		/* Temper detectors */
+		{0x48, 2},
+		{0x4c, 1},
+		{0xa4, 1},
+		/* */
+		{0x44, 3},
+		{0xe0, 1},
+		{0xe4, 1},
+		{0xe8, 2},
+		/* Misc */
+		{0x3c, 1},
+		{0x5c, 2},
+		{0x64, 1},
+		{0xf8, 2},
+	};
+
+	u32 dgo[] = {
+		0x0,
+		0x10,
+		0x20,
+		0x30,
+		0x40,
+		0x50,
+	};
+
+	/* Pins */
+	printf("Pins:\n");
+	for (idx = 0; idx < ARRAY_SIZE(pads); idx++) {
+		u8 pad_id = pads[idx];
+
+		scierr = sc_pad_get(-1, pad_id, &data[0]);
+		if (scierr == 0)
+			printf("\t- Pin %d: %.8x\n", pad_id, data[0]);
+		else
+			printf("Failed to read Pin %d\n", pad_id);
+	}
+
+	/* Fuses */
+	printf("Fuses:\n");
+	for (idx = 0; idx < ARRAY_SIZE(fuses); idx++) {
+		u32 fuse_id = fuses[idx];
+
+		scierr = sc_misc_otp_fuse_read(-1, fuse_id, &data[0]);
+		if (scierr == 0)
+			printf("\t- Fuse %d: %.8x\n", fuse_id, data[0]);
+		else
+			printf("Failed to read Fuse %d\n", fuse_id);
+	}
+
+	/* SNVS */
+	printf("SNVS:\n");
+	for (idx = 0; idx < ARRAY_SIZE(snvs); idx++) {
+		struct snvs_reg *reg = &snvs[idx];
+
+		scierr = sc_seco_secvio_config(-1, reg->id, 0, &data[0],
+					       &data[1], &data[2], &data[3],
+					       &data[4], reg->nb);
+		if (scierr == 0) {
+			int subidx;
+
+			printf("\t- SNVS %.2x(%d):", reg->id, reg->nb);
+			for (subidx = 0; subidx < reg->nb; subidx++)
+				printf(" %.8x", data[subidx]);
+			printf("\n");
+		} else {
+			printf("Failed to read SNVS %d\n", reg->id);
+		}
+	}
+
+	/* DGO */
+	printf("DGO:\n");
+	for (idx = 0; idx < ARRAY_SIZE(dgo); idx++) {
+		u8 dgo_id = dgo[idx];
+
+		scierr = sc_seco_secvio_dgo_config(-1, dgo_id, 0, &data[0]);
+		if (scierr == 0)
+			printf("\t- DGO %.2x: %.8x\n", dgo_id, data[0]);
+		else
+			printf("Failed to read DGO %d\n", dgo_id);
+	}
+
+	return 0;
+}
+
+U_BOOT_CMD(snvs_sec_status,
+	   1, 1, do_snvs_sec_status,
+	   "tamper pin configuration",
+	   snvs_sec_status_help_text
+);
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 58f1758ab6..7771fc88af 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -32,6 +32,11 @@ config TARGET_IMX8MQ_EVK
 	select IMX8MQ
 	select IMX8M_LPDDR4
 
+config TARGET_IMX8MQ_PHANBELL
+        bool "imx8mq_phanbell"
+        select IMX8MQ
+        select IMX8M_LPDDR4
+
 config TARGET_IMX8MM_EVK
 	bool "imx8mm LPDDR4 EVK board"
 	select IMX8MM
@@ -50,18 +55,32 @@ config TARGET_IMX8MP_EVK
 	select SUPPORT_SPL
 	select IMX8M_LPDDR4
 
+config TARGET_PICO_IMX8MQ
+	bool "Support Technexion Pico iMX8MQ"
+	select IMX8MQ
+	select IMX8M_LPDDR4
+
 config TARGET_VERDIN_IMX8MM
        bool "Support Toradex Verdin iMX8M Mini module"
        select IMX8MM
        select SUPPORT_SPL
        select IMX8M_LPDDR4
 
+config TARGET_IMX8MM_BEACON
+	bool "imx8mm Beacon Embedded devkit"
+	select IMX8MM
+	select SUPPORT_SPL
+	select IMX8M_LPDDR4
+
 endchoice
 
 source "board/freescale/imx8mq_evk/Kconfig"
 source "board/freescale/imx8mm_evk/Kconfig"
 source "board/freescale/imx8mn_evk/Kconfig"
 source "board/freescale/imx8mp_evk/Kconfig"
+source "board/google/imx8mq_phanbell/Kconfig"
+source "board/technexion/pico-imx8mq/Kconfig"
 source "board/toradex/verdin-imx8mm/Kconfig"
+source "board/beacon/imx8mm/Kconfig"
 
 endif
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index c423ac0058..aafe2ed084 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -12,6 +12,8 @@
 #include <asm/io.h>
 #include <div64.h>
 #include <errno.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -447,34 +449,34 @@ static u32 decode_fracpll(enum clk_root_src frac_pll)
 	}
 
 	/* Only support SYS_XTAL 24M, PAD_CLK not take into consideration */
-	if ((pll_gnrl_ctl & INTPLL_REF_CLK_SEL_MASK) != 0)
+	if ((pll_gnrl_ctl & GENMASK(1, 0)) != 0)
 		return 0;
 
-	if ((pll_gnrl_ctl & INTPLL_RST_MASK) == 0)
+	if ((pll_gnrl_ctl & RST_MASK) == 0)
 		return 0;
 	/*
 	 * When BYPASS is equal to 1, PLL enters the bypass mode
 	 * regardless of the values of RESETB
 	 */
-	if (pll_gnrl_ctl & INTPLL_BYPASS_MASK)
+	if (pll_gnrl_ctl & BYPASS_MASK)
 		return 24000000u;
 
-	if (!(pll_gnrl_ctl & INTPLL_LOCK_MASK)) {
+	if (!(pll_gnrl_ctl & LOCK_STATUS)) {
 		puts("pll not locked\n");
 		return 0;
 	}
 
-	if (!(pll_gnrl_ctl & INTPLL_CLKE_MASK))
+	if (!(pll_gnrl_ctl & CLKE_MASK))
 		return 0;
 
-	main_div = (pll_fdiv_ctl0 & INTPLL_MAIN_DIV_MASK) >>
-		INTPLL_MAIN_DIV_SHIFT;
-	pre_div = (pll_fdiv_ctl0 & INTPLL_PRE_DIV_MASK) >>
-		INTPLL_PRE_DIV_SHIFT;
-	post_div = (pll_fdiv_ctl0 & INTPLL_POST_DIV_MASK) >>
-		INTPLL_POST_DIV_SHIFT;
+	main_div = (pll_fdiv_ctl0 & MDIV_MASK) >>
+		MDIV_SHIFT;
+	pre_div = (pll_fdiv_ctl0 & PDIV_MASK) >>
+		PDIV_SHIFT;
+	post_div = (pll_fdiv_ctl0 & SDIV_MASK) >>
+		SDIV_SHIFT;
 
-	k = pll_fdiv_ctl1 & GENMASK(15, 0);
+	k = pll_fdiv_ctl1 & KDIV_MASK;
 
 	return lldiv((main_div * 65536 + k) * 24000000ULL,
 		     65536 * pre_div * (1 << post_div));
@@ -578,3 +580,52 @@ u32 mxc_get_clock(enum mxc_clock clk)
 
 	return 0;
 }
+
+#ifdef CONFIG_FEC_MXC
+int set_clk_enet(enum enet_freq type)
+{
+	u32 target;
+	u32 enet1_ref;
+
+	switch (type) {
+	case ENET_125MHZ:
+		enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_125M_CLK;
+		break;
+	case ENET_50MHZ:
+		enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_50M_CLK;
+		break;
+	case ENET_25MHZ:
+		enet1_ref = ENET1_REF_CLK_ROOT_FROM_PLL_ENET_MAIN_25M_CLK;
+		break;
+	default:
+		return -EINVAL;
+	}
+
+	/* disable the clock first */
+	clock_enable(CCGR_ENET1, 0);
+	clock_enable(CCGR_SIM_ENET, 0);
+
+	/* set enet axi clock 266Mhz */
+	target = CLK_ROOT_ON | ENET_AXI_CLK_ROOT_FROM_SYS1_PLL_266M |
+		 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) |
+		 CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1);
+	clock_set_target_val(ENET_AXI_CLK_ROOT, target);
+
+	target = CLK_ROOT_ON | enet1_ref |
+		 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) |
+		 CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1);
+	clock_set_target_val(ENET_REF_CLK_ROOT, target);
+
+	target = CLK_ROOT_ON |
+		ENET1_TIME_CLK_ROOT_FROM_PLL_ENET_MAIN_100M_CLK |
+		CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) |
+		CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV4);
+	clock_set_target_val(ENET_TIMER_CLK_ROOT, target);
+
+	/* enable clock */
+	clock_enable(CCGR_SIM_ENET, 1);
+	clock_enable(CCGR_ENET1, 1);
+
+	return 0;
+}
+#endif
diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mq.c b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
index aad9cf13ef..759ec6d114 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mq.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mq.c
@@ -6,15 +6,19 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <errno.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 
 static struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR;
 
+static u32 get_root_clk(enum clk_root_index clock_id);
+
 static u32 decode_frac_pll(enum clk_root_src frac_pll)
 {
 	u32 pll_cfg0, pll_cfg1, pllout;
@@ -275,6 +279,8 @@ static u32 get_root_src_clk(enum clk_root_src root_src)
 	case SYSTEM_PLL2_50M_CLK:
 	case SYSTEM_PLL3_CLK:
 		return decode_sscg_pll(root_src);
+	case ARM_A53_ALT_CLK:
+		return get_root_clk(ARM_A53_CLK_ROOT);
 	default:
 		return 0;
 	}
@@ -322,13 +328,26 @@ int enable_i2c_clk(unsigned char enable, unsigned int i2c_num)
 	return 0;
 }
 
+u32 get_arm_core_clk(void)
+{
+	enum clk_root_src root_src;
+	u32 root_src_clk;
+
+	if (clock_get_src(CORE_SEL_CFG, &root_src) < 0)
+		return 0;
+
+	root_src_clk = get_root_src_clk(root_src);
+
+	return root_src_clk;
+}
+
 unsigned int mxc_get_clock(enum mxc_clock clk)
 {
 	u32 val;
 
-	switch(clk) {
+	switch (clk) {
 	case MXC_ARM_CLK:
-		return get_root_clk(ARM_A53_CLK_ROOT);
+		return get_arm_core_clk();
 	case MXC_IPG_CLK:
 		clock_get_target_val(IPG_CLK_ROOT, &val);
 		val = val & 0x3;
@@ -428,15 +447,13 @@ void init_clk_usdhc(u32 index)
 	case 0:
 		clock_enable(CCGR_USDHC1, 0);
 		clock_set_target_val(USDHC1_CLK_ROOT, CLK_ROOT_ON |
-				     CLK_ROOT_SOURCE_SEL(1) |
-				     CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV2));
+				     CLK_ROOT_SOURCE_SEL(1));
 		clock_enable(CCGR_USDHC1, 1);
 		return;
 	case 1:
 		clock_enable(CCGR_USDHC2, 0);
 		clock_set_target_val(USDHC2_CLK_ROOT, CLK_ROOT_ON |
-				     CLK_ROOT_SOURCE_SEL(1) |
-				     CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV2));
+				     CLK_ROOT_SOURCE_SEL(1));
 		clock_enable(CCGR_USDHC2, 1);
 		return;
 	default:
@@ -639,7 +656,7 @@ void dram_pll_init(ulong pll_val)
 static int frac_pll_init(u32 pll, enum frac_pll_out_val val)
 {
 	void __iomem *pll_cfg0, __iomem *pll_cfg1;
-	u32 val_cfg0, val_cfg1;
+	u32 val_cfg0, val_cfg1, divq;
 	int ret;
 
 	switch (pll) {
@@ -647,14 +664,17 @@ static int frac_pll_init(u32 pll, enum frac_pll_out_val val)
 		pll_cfg0 = &ana_pll->arm_pll_cfg0;
 		pll_cfg1 = &ana_pll->arm_pll_cfg1;
 
-		if (val == FRAC_PLL_OUT_1000M)
+		if (val == FRAC_PLL_OUT_1000M) {
 			val_cfg1 = FRAC_PLL_INT_DIV_CTL_VAL(49);
-		else
+			divq = 0;
+		} else {
 			val_cfg1 = FRAC_PLL_INT_DIV_CTL_VAL(79);
+			divq = 1;
+		}
 		val_cfg0 = FRAC_PLL_CLKE_MASK | FRAC_PLL_REFCLK_SEL_OSC_25M |
 			FRAC_PLL_LOCK_SEL_MASK | FRAC_PLL_NEWDIV_VAL_MASK |
 			FRAC_PLL_REFCLK_DIV_VAL(4) |
-			FRAC_PLL_OUTPUT_DIV_VAL(0);
+			FRAC_PLL_OUTPUT_DIV_VAL(divq);
 		break;
 	default:
 		return -EINVAL;
@@ -690,17 +710,14 @@ int clock_init(void)
 	 * We set ARM clock to 1Ghz for consumer, 800Mhz for industrial
 	 */
 	grade = get_cpu_temp_grade(NULL, NULL);
-	if (!grade) {
+	if (!grade)
 		frac_pll_init(ANATOP_ARM_PLL, FRAC_PLL_OUT_1000M);
-		clock_set_target_val(ARM_A53_CLK_ROOT, CLK_ROOT_ON |
-			     CLK_ROOT_SOURCE_SEL(1) |
-			     CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV1));
-	} else {
-		frac_pll_init(ANATOP_ARM_PLL, FRAC_PLL_OUT_1600M);
-		clock_set_target_val(ARM_A53_CLK_ROOT, CLK_ROOT_ON |
-			     CLK_ROOT_SOURCE_SEL(1) |
-			     CLK_ROOT_POST_DIV(CLK_ROOT_POST_DIV2));
-	}
+	else
+		frac_pll_init(ANATOP_ARM_PLL, FRAC_PLL_OUT_800M);
+
+	/* Bypass CCM A53 ROOT, Switch to ARM PLL -> MUX-> CPU */
+	clock_set_target_val(CORE_SEL_CFG, CLK_ROOT_SOURCE_SEL(1));
+
 	/*
 	 * According to ANAMIX SPEC
 	 * sys pll1 fixed at 800MHz
@@ -740,13 +757,15 @@ int clock_init(void)
  * Dump some clockes.
  */
 #ifndef CONFIG_SPL_BUILD
-static int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_imx8m_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	u32 freq;
 
 	freq = decode_frac_pll(ARM_PLL_CLK);
 	printf("ARM_PLL    %8d MHz\n", freq / 1000000);
+	freq = decode_sscg_pll(DRAM_PLL1_CLK);
+	printf("DRAM_PLL    %8d MHz\n", freq / 1000000);
 	freq = decode_sscg_pll(SYSTEM_PLL1_800M_CLK);
 	printf("SYS_PLL1_800    %8d MHz\n", freq / 1000000);
 	freq = decode_sscg_pll(SYSTEM_PLL1_400M_CLK);
diff --git a/arch/arm/mach-imx/imx8m/clock_slice.c b/arch/arm/mach-imx/imx8m/clock_slice.c
index 8b7a4dad65..b5ed27a923 100644
--- a/arch/arm/mach-imx/imx8m/clock_slice.c
+++ b/arch/arm/mach-imx/imx8m/clock_slice.c
@@ -472,33 +472,111 @@ static struct clk_root_map root_array[] = {
 	 {DRAM_PLL1_CLK}
 	},
 	{CORE_SEL_CFG, CORE_SEL_CLOCK_SLICE, 0,
-	 {DRAM_PLL1_CLK}
+	 {ARM_A53_ALT_CLK, ARM_PLL_CLK}
 	},
 };
-#elif defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
+#elif defined(CONFIG_IMX8MM)
 static struct clk_root_map root_array[] = {
 	{ARM_A53_CLK_ROOT, CORE_CLOCK_SLICE, 0,
 	 {OSC_24M_CLK, ARM_PLL_CLK, SYSTEM_PLL2_500M_CLK,
 	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
 	  SYSTEM_PLL1_400M_CLK, AUDIO_PLL1_CLK, SYSTEM_PLL3_CLK}
 	},
+	{ARM_M4_CLK_ROOT, CORE_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL3_CLK}
+	},
+	{VPU_A53_CLK_ROOT, CORE_CLOCK_SLICE, 2,
+	 {OSC_24M_CLK, ARM_PLL_CLK, SYSTEM_PLL2_500M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL1_400M_CLK, AUDIO_PLL1_CLK, VPU_PLL_CLK}
+	},
+	{GPU3D_CLK_ROOT, CORE_CLOCK_SLICE, 3,
+	 {OSC_24M_CLK, GPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{GPU2D_CLK_ROOT, CORE_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, GPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_200M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL3_CLK}
+	},
 	{NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
 	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
 	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_133M_CLK,
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL1_CLK}
 	},
+	{VPU_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 3,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, VPU_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{DISPLAY_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK, AUDIO_PLL2_CLK,
+	  EXT_CLK_1, EXT_CLK_4}
+	},
+	{DISPLAY_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK, AUDIO_PLL2_CLK,
+	  EXT_CLK_1, EXT_CLK_3}
+	},
+	{DISPLAY_RTRM_CLK_ROOT, BUS_CLOCK_SLICE, 6,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  EXT_CLK_2, EXT_CLK_3}
+	},
+	{USB_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 7,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
+	},
+	{GPU_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 8,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, GPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{GPU_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 9,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, GPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
 	{NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
 	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL3_CLK,
 	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_500M_CLK,
 	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
 	},
-#ifdef CONFIG_IMX8MM
 	{NOC_APB_CLK_ROOT, BUS_CLOCK_SLICE, 11,
 	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL3_CLK,
 	  SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_200M_CLK,
 	  SYSTEM_PLL1_800M_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
 	},
-#endif
+	{AHB_CLK_ROOT, AHB_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL1_400M_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
+	},
+	{AUDIO_AHB_CLK_ROOT, AHB_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_166M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_DSI_ESC_RX_CLK_ROOT, AHB_CLOCK_SLICE, 2,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
 	{DRAM_ALT_CLK_ROOT, IP_CLOCK_SLICE, 0,
 	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
 	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_1000M_CLK,
@@ -509,6 +587,146 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
 	},
+	{VPU_G1_CLK_ROOT, IP_CLOCK_SLICE, 2,
+	 {OSC_24M_CLK, VPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
+	  SYSTEM_PLL2_125M_CLK, SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK}
+	},
+	{VPU_G2_CLK_ROOT, IP_CLOCK_SLICE, 3,
+	 {OSC_24M_CLK, VPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_100M_CLK,
+	  SYSTEM_PLL2_125M_CLK, SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK}
+	},
+	{DISPLAY_DTRC_CLK_ROOT, IP_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, VIDEO_PLL2_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_160M_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK}
+	},
+	{DISPLAY_DC8000_CLK_ROOT, IP_CLOCK_SLICE, 5,
+	 {OSC_24M_CLK, VIDEO_PLL2_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_160M_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK}
+	},
+	{PCIE_CTRL_CLK_ROOT, IP_CLOCK_SLICE, 6,
+	 {OSC_24M_CLK, SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL3_CLK}
+	},
+	{PCIE_PHY_CLK_ROOT, IP_CLOCK_SLICE, 7,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_500M_CLK,
+	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3, EXT_CLK_4,
+	  SYSTEM_PLL1_400M_CLK}
+	},
+	{PCIE_AUX_CLK_ROOT, IP_CLOCK_SLICE, 8,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_200M_CLK}
+	},
+	{DC_PIXEL_CLK_ROOT, IP_CLOCK_SLICE, 9,
+	 {OSC_24M_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
+	  AUDIO_PLL1_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_4}
+	},
+	{LCDIF_PIXEL_CLK_ROOT, IP_CLOCK_SLICE, 10,
+	 {OSC_24M_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
+	  AUDIO_PLL1_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_4}
+	},
+	{SAI1_CLK_ROOT, IP_CLOCK_SLICE, 11,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_1, EXT_CLK_2}
+	},
+	{SAI2_CLK_ROOT, IP_CLOCK_SLICE, 12,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{SAI3_CLK_ROOT, IP_CLOCK_SLICE, 13,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{SAI4_CLK_ROOT, IP_CLOCK_SLICE, 14,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_1, EXT_CLK_2}
+	},
+	{SAI5_CLK_ROOT, IP_CLOCK_SLICE, 15,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{SAI6_CLK_ROOT, IP_CLOCK_SLICE, 16,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{SPDIF1_CLK_ROOT, IP_CLOCK_SLICE, 17,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{SPDIF2_CLK_ROOT, IP_CLOCK_SLICE, 18,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{ENET_REF_CLK_ROOT, IP_CLOCK_SLICE, 19,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, EXT_CLK_4}
+	},
+	{ENET_TIMER_CLK_ROOT, IP_CLOCK_SLICE, 20,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, AUDIO_PLL1_CLK,
+	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3, EXT_CLK_4,
+	  VIDEO_PLL_CLK}
+	},
+	{ENET_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 21,
+	 {OSC_24M_CLK, SYSTEM_PLL2_50M_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_500M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{NAND_CLK_ROOT, IP_CLOCK_SLICE, 22,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, AUDIO_PLL1_CLK,
+	  SYSTEM_PLL1_400M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL2_250M_CLK, VIDEO_PLL_CLK}
+	},
+	{QSPI_CLK_ROOT, IP_CLOCK_SLICE, 23,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL2_333M_CLK,
+	  SYSTEM_PLL2_500M_CLK, AUDIO_PLL2_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL3_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{USDHC1_CLK_ROOT, IP_CLOCK_SLICE, 24,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{USDHC2_CLK_ROOT, IP_CLOCK_SLICE, 25,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{I2C1_CLK_ROOT, IP_CLOCK_SLICE, 26,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C2_CLK_ROOT, IP_CLOCK_SLICE, 27,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C3_CLK_ROOT, IP_CLOCK_SLICE, 28,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C4_CLK_ROOT, IP_CLOCK_SLICE, 29,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
 	{UART1_CLK_ROOT, IP_CLOCK_SLICE, 30,
 	 {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK,
 	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
@@ -529,19 +747,546 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
 	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
 	},
+	{USB_CORE_REF_CLK_ROOT, IP_CLOCK_SLICE, 34,
+	 {OSC_24M_CLK, SYSTEM_PLL1_100M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{USB_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 35,
+	 {OSC_24M_CLK, SYSTEM_PLL1_100M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
 	{GIC_CLK_ROOT, IP_CLOCK_SLICE, 36,
 	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
 	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_800M_CLK,
 	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
 	},
+	{ECSPI1_CLK_ROOT, IP_CLOCK_SLICE, 37,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{ECSPI2_CLK_ROOT, IP_CLOCK_SLICE, 38,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{PWM1_CLK_ROOT, IP_CLOCK_SLICE, 39,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_1,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM2_CLK_ROOT, IP_CLOCK_SLICE, 40,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_1,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM3_CLK_ROOT, IP_CLOCK_SLICE, 41,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_2,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM4_CLK_ROOT, IP_CLOCK_SLICE, 42,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_2,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{GPT1_CLK_ROOT, IP_CLOCK_SLICE, 43,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_1}
+	},
+	{GPT2_CLK_ROOT, IP_CLOCK_SLICE, 44,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_2}
+	},
+	{GPT3_CLK_ROOT, IP_CLOCK_SLICE, 45,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_3}
+	},
+	{GPT4_CLK_ROOT, IP_CLOCK_SLICE, 46,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_1}
+	},
+	{GPT5_CLK_ROOT, IP_CLOCK_SLICE, 47,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_2}
+	},
+	{GPT6_CLK_ROOT, IP_CLOCK_SLICE, 48,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_3}
+	},
+	{TRACE_CLK_ROOT, IP_CLOCK_SLICE, 49,
+	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_160M_CLK,
+	  VPU_PLL_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_1, EXT_CLK_3}
+	},
 	{WDOG_CLK_ROOT, IP_CLOCK_SLICE, 50,
 	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_160M_CLK,
 	  VPU_PLL_CLK, SYSTEM_PLL2_125M_CLK,
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_166M_CLK}
 	},
+	{WRCLK_CLK_ROOT, IP_CLOCK_SLICE, 51,
+	 {OSC_24M_CLK, SYSTEM_PLL1_40M_CLK, VPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{IPP_DO_CLKO1, IP_CLOCK_SLICE, 52,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, OSC_HDMI_CLK,
+	  SYSTEM_PLL1_200M_CLK, AUDIO_PLL2_CLK,
+	  SYSTEM_PLL2_500M_CLK, VPU_PLL_CLK, SYSTEM_PLL1_80M_CLK}
+	},
+	{IPP_DO_CLKO2, IP_CLOCK_SLICE, 53,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL2_166M_CLK, SYSTEM_PLL3_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, OSC_32K_CLK}
+	},
+	{MIPI_DSI_CORE_CLK_ROOT, IP_CLOCK_SLICE, 54,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_DSI_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 55,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_DSI_DBI_CLK_ROOT, IP_CLOCK_SLICE, 56,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{USDHC3_CLK_ROOT, IP_CLOCK_SLICE, 57,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{MIPI_CSI1_CORE_CLK_ROOT, IP_CLOCK_SLICE, 58,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI1_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 59,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI1_ESC_CLK_ROOT, IP_CLOCK_SLICE, 60,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{MIPI_CSI2_CORE_CLK_ROOT, IP_CLOCK_SLICE, 61,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI2_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 62,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI2_ESC_CLK_ROOT, IP_CLOCK_SLICE, 63,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{PCIE2_CTRL_CLK_ROOT, IP_CLOCK_SLICE, 64,
+	 {OSC_24M_CLK, SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL3_CLK}
+	},
+	{PCIE2_PHY_CLK_ROOT, IP_CLOCK_SLICE, 65,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_500M_CLK,
+	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3,
+	  EXT_CLK_4, SYSTEM_PLL1_400M_CLK}
+	},
+	{PCIE2_AUX_CLK_ROOT, IP_CLOCK_SLICE, 66,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_80M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_200M_CLK}
+	},
+	{ECSPI3_CLK_ROOT, IP_CLOCK_SLICE, 67,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{PDM_CLK_ROOT, IP_CLOCK_SLICE, 68,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, AUDIO_PLL1_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK},
+	},
+	{VPU_H1_CLK_ROOT, IP_CLOCK_SLICE, 69,
+	 {OSC_24M_CLK, VPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, AUDIO_PLL2_CLK,
+	  SYSTEM_PLL2_125M_CLK, SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK}
+	},
 	{DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
 	 {DRAM_PLL1_CLK}
 	},
+	{CORE_SEL_CFG, CORE_SEL_CLOCK_SLICE, 0,
+	 {ARM_A53_ALT_CLK, ARM_PLL_CLK}
+	},
+};
+#elif defined(CONFIG_IMX8MN)
+static struct clk_root_map root_array[] = {
+	{ARM_A53_CLK_ROOT, CORE_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, ARM_PLL_CLK, SYSTEM_PLL2_500M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL1_400M_CLK, AUDIO_PLL1_CLK, SYSTEM_PLL3_CLK}
+	},
+	{ARM_M7_CLK_ROOT, CORE_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_250M_CLK,
+	  VPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL3_CLK}
+	},
+	{GPU_CORE_CLK_ROOT, CORE_CLOCK_SLICE, 3,
+	 {OSC_24M_CLK, GPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{GPU_SHADER_CLK_ROOT, CORE_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, GPU_PLL_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_250M_CLK, SYSTEM_PLL2_200M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, SYSTEM_PLL3_CLK}
+	},
+	{NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_133M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL1_CLK}
+	},
+	{DISPLAY_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK, AUDIO_PLL2_CLK,
+	  EXT_CLK_1, EXT_CLK_4}
+	},
+	{DISPLAY_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK, AUDIO_PLL2_CLK,
+	  EXT_CLK_1, EXT_CLK_3}
+	},
+	{USB_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 7,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
+	},
+	{GPU_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 8,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, GPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{GPU_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 9,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, GPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_1000M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_500M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{AHB_CLK_ROOT, AHB_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL1_400M_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
+	},
+	{AUDIO_AHB_CLK_ROOT, AHB_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_166M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
+	},
+	{DRAM_ALT_CLK_ROOT, IP_CLOCK_SLICE, 0,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, SYSTEM_PLL1_266M_CLK}
+	},
+	{DRAM_APB_CLK_ROOT, IP_CLOCK_SLICE, 1,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{DISPLAY_PIXEL_CLK_ROOT, IP_CLOCK_SLICE, 10,
+	 {OSC_24M_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
+	  AUDIO_PLL1_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_4}
+	},
+	{SAI2_CLK_ROOT, IP_CLOCK_SLICE, 12,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{SAI3_CLK_ROOT, IP_CLOCK_SLICE, 13,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{SAI5_CLK_ROOT, IP_CLOCK_SLICE, 15,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{SAI6_CLK_ROOT, IP_CLOCK_SLICE, 16,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{SPDIF1_CLK_ROOT, IP_CLOCK_SLICE, 17,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_2, EXT_CLK_3}
+	},
+	{ENET_REF_CLK_ROOT, IP_CLOCK_SLICE, 19,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, EXT_CLK_4}
+	},
+	{ENET_TIMER_CLK_ROOT, IP_CLOCK_SLICE, 20,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, AUDIO_PLL1_CLK,
+	  EXT_CLK_1, EXT_CLK_2, EXT_CLK_3, EXT_CLK_4,
+	  VIDEO_PLL_CLK}
+	},
+	{ENET_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 21,
+	 {OSC_24M_CLK, SYSTEM_PLL2_50M_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL2_500M_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK}
+	},
+	{NAND_CLK_ROOT, IP_CLOCK_SLICE, 22,
+	 {OSC_24M_CLK, SYSTEM_PLL2_500M_CLK, AUDIO_PLL1_CLK,
+	  SYSTEM_PLL1_400M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL2_250M_CLK, VIDEO_PLL_CLK}
+	},
+	{QSPI_CLK_ROOT, IP_CLOCK_SLICE, 23,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL2_333M_CLK,
+	  SYSTEM_PLL2_500M_CLK, AUDIO_PLL2_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL3_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{USDHC1_CLK_ROOT, IP_CLOCK_SLICE, 24,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{USDHC2_CLK_ROOT, IP_CLOCK_SLICE, 25,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{I2C1_CLK_ROOT, IP_CLOCK_SLICE, 26,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C2_CLK_ROOT, IP_CLOCK_SLICE, 27,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C3_CLK_ROOT, IP_CLOCK_SLICE, 28,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{I2C4_CLK_ROOT, IP_CLOCK_SLICE, 29,
+	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK,
+	  AUDIO_PLL2_CLK, SYSTEM_PLL1_133M_CLK}
+	},
+	{UART1_CLK_ROOT, IP_CLOCK_SLICE, 30,
+	 {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
+	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
+	},
+	{UART2_CLK_ROOT, IP_CLOCK_SLICE, 31,
+	 {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{UART3_CLK_ROOT, IP_CLOCK_SLICE, 32,
+	 {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
+	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
+	},
+	{UART4_CLK_ROOT, IP_CLOCK_SLICE, 33,
+	 {OSC_24M_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL3_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{USB_CORE_REF_CLK_ROOT, IP_CLOCK_SLICE, 34,
+	 {OSC_24M_CLK, SYSTEM_PLL1_100M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{USB_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 35,
+	 {OSC_24M_CLK, SYSTEM_PLL1_100M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL2_200M_CLK,
+	  EXT_CLK_2, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{GIC_CLK_ROOT, IP_CLOCK_SLICE, 36,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_800M_CLK,
+	  EXT_CLK_2, EXT_CLK_4, AUDIO_PLL2_CLK}
+	},
+	{ECSPI1_CLK_ROOT, IP_CLOCK_SLICE, 37,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{ECSPI2_CLK_ROOT, IP_CLOCK_SLICE, 38,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{PWM1_CLK_ROOT, IP_CLOCK_SLICE, 39,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_1,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM2_CLK_ROOT, IP_CLOCK_SLICE, 40,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_1,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM3_CLK_ROOT, IP_CLOCK_SLICE, 41,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_2,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{PWM4_CLK_ROOT, IP_CLOCK_SLICE, 42,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_160M_CLK,
+	  SYSTEM_PLL1_40M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_2,
+	  SYSTEM_PLL1_80M_CLK, VIDEO_PLL_CLK}
+	},
+	{GPT1_CLK_ROOT, IP_CLOCK_SLICE, 43,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_1}
+	},
+	{GPT2_CLK_ROOT, IP_CLOCK_SLICE, 44,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_2}
+	},
+	{GPT3_CLK_ROOT, IP_CLOCK_SLICE, 45,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_3}
+	},
+	{GPT4_CLK_ROOT, IP_CLOCK_SLICE, 46,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_1}
+	},
+	{GPT5_CLK_ROOT, IP_CLOCK_SLICE, 47,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_2}
+	},
+	{GPT6_CLK_ROOT, IP_CLOCK_SLICE, 48,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL1_40M_CLK, VIDEO_PLL_CLK,
+	  SYSTEM_PLL1_80M_CLK, AUDIO_PLL1_CLK, EXT_CLK_3}
+	},
+	{TRACE_CLK_ROOT, IP_CLOCK_SLICE, 49,
+	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_160M_CLK,
+	  VPU_PLL_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_1, EXT_CLK_3}
+	},
+	{WDOG_CLK_ROOT, IP_CLOCK_SLICE, 50,
+	 {OSC_24M_CLK, SYSTEM_PLL1_133M_CLK, SYSTEM_PLL1_160M_CLK,
+	  VPU_PLL_CLK, SYSTEM_PLL2_125M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_80M_CLK, SYSTEM_PLL2_166M_CLK}
+	},
+	{WRCLK_CLK_ROOT, IP_CLOCK_SLICE, 51,
+	 {OSC_24M_CLK, SYSTEM_PLL1_40M_CLK, VPU_PLL_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_200M_CLK,
+	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{IPP_DO_CLKO1, IP_CLOCK_SLICE, 52,
+	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, OSC_HDMI_CLK,
+	  SYSTEM_PLL1_200M_CLK, AUDIO_PLL2_CLK,
+	  SYSTEM_PLL2_500M_CLK, VPU_PLL_CLK, SYSTEM_PLL1_80M_CLK}
+	},
+	{IPP_DO_CLKO2, IP_CLOCK_SLICE, 53,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_400M_CLK,
+	  SYSTEM_PLL2_166M_CLK, SYSTEM_PLL3_CLK,
+	  AUDIO_PLL1_CLK, VIDEO_PLL_CLK, OSC_32K_CLK}
+	},
+	{MIPI_DSI_CORE_CLK_ROOT, IP_CLOCK_SLICE, 54,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{DISPLAY_DSI_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 55,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_DSI_DBI_CLK_ROOT, IP_CLOCK_SLICE, 56,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{USDHC3_CLK_ROOT, IP_CLOCK_SLICE, 57,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
+	},
+	{DISPLAY_CAMERA_PIXEL_CLK_ROOT, IP_CLOCK_SLICE, 58,
+	 {OSC_24M_CLK, SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_250M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI1_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 59,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI2_PHY_REF_CLK_ROOT, IP_CLOCK_SLICE, 62,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MIPI_CSI2_ESC_CLK_ROOT, IP_CLOCK_SLICE, 63,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
+	{ECSPI3_CLK_ROOT, IP_CLOCK_SLICE, 67,
+	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
+	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
+	},
+	{PDM_CLK_ROOT, IP_CLOCK_SLICE, 68,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, AUDIO_PLL1_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK},
+	},
+	{SAI7_CLK_ROOT, IP_CLOCK_SLICE, 70,
+	 {OSC_24M_CLK, AUDIO_PLL1_CLK, AUDIO_PLL2_CLK,
+	  VIDEO_PLL_CLK, SYSTEM_PLL1_133M_CLK,
+	  OSC_HDMI_CLK, EXT_CLK_3, EXT_CLK_4}
+	},
+	{DRAM_SEL_CFG, DRAM_SEL_CLOCK_SLICE, 0,
+	 {DRAM_PLL1_CLK}
+	},
+	{CORE_SEL_CFG, CORE_SEL_CLOCK_SLICE, 0,
+	 {ARM_A53_ALT_CLK, ARM_PLL_CLK}
+	},
 };
 #elif defined(CONFIG_IMX8MP)
 static struct clk_root_map root_array[] = {
@@ -580,6 +1325,26 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_133M_CLK,
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL1_CLK}
 	},
+	{MEDIA_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
+	 {OSC_24M_CLK, SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK,
+	  AUDIO_PLL2_CLK, EXT_CLK_1, SYSTEM_PLL2_500M_CLK}
+	},
+	{MEDIA_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK,
+	  AUDIO_PLL2_CLK, EXT_CLK_1, SYSTEM_PLL1_133M_CLK}
+	},
+	{HDMI_APB_CLK_ROOT, BUS_CLOCK_SLICE, 6,
+	 {OSC_24M_CLK, SYSTEM_PLL2_125M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK,
+	  AUDIO_PLL2_CLK, EXT_CLK_1, SYSTEM_PLL1_133M_CLK}
+	},
+	{HDMI_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 7,
+	 {OSC_24M_CLK, SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL3_CLK, SYSTEM_PLL1_40M_CLK,
+	  AUDIO_PLL2_CLK, EXT_CLK_1, SYSTEM_PLL2_500M_CLK}
+	},
 	{NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
 	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL3_CLK,
 	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL2_500M_CLK,
@@ -605,6 +1370,11 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL1_400M_CLK, SYSTEM_PLL2_125M_CLK,
 	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
 	},
+	{MEDIA_DISP2_CLK_ROOT, AHB_CLOCK_SLICE, 3,
+	 {OSC_24M_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
+	  AUDIO_PLL1_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_4}
+	},
 	{DRAM_ALT_CLK_ROOT, IP_CLOCK_SLICE, 0,
 	 {OSC_24M_CLK, SYSTEM_PLL1_800M_CLK, SYSTEM_PLL1_100M_CLK,
 	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL2_1000M_CLK,
@@ -615,11 +1385,6 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_250M_CLK, AUDIO_PLL2_CLK}
 	},
-	{MEMREPAIR_CLK_ROOT, IP_CLOCK_SLICE, 6,
-	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
-	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
-	  SYSTEM_PLL1_133M_CLK}
-	},
 	{I2C5_CLK_ROOT, IP_CLOCK_SLICE, 9,
 	 {OSC_24M_CLK, SYSTEM_PLL1_160M_CLK, SYSTEM_PLL2_50M_CLK,
 	  SYSTEM_PLL3_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
@@ -798,11 +1563,36 @@ static struct clk_root_map root_array[] = {
 	  SYSTEM_PLL3_CLK, SYSTEM_PLL2_200M_CLK,
 	  SYSTEM_PLL1_266M_CLK, SYSTEM_PLL2_500M_CLK, SYSTEM_PLL1_100M_CLK}
 	},
+	{HDMI_REF_266M_CLK_ROOT, IP_CLOCK_SLICE, 56,
+	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL3_CLK,
+	  SYSTEM_PLL2_333M_CLK, SYSTEM_PLL1_266M_CLK,
+	  SYSTEM_PLL2_200M_CLK, AUDIO_PLL1_CLK, VIDEO_PLL_CLK}
+	},
 	{USDHC3_CLK_ROOT, IP_CLOCK_SLICE, 57,
 	 {OSC_24M_CLK, SYSTEM_PLL1_400M_CLK, SYSTEM_PLL1_800M_CLK,
 	  SYSTEM_PLL2_500M_CLK, SYSTEM_PLL3_CLK,
 	  SYSTEM_PLL1_266M_CLK, AUDIO_PLL2_CLK, SYSTEM_PLL1_100M_CLK}
 	},
+	{MEDIA_MIPI_PHY1_REF_CLK_ROOT, IP_CLOCK_SLICE, 59,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MEDIA_DISP1_PIX_CLK_ROOT, IP_CLOCK_SLICE, 60,
+	 {OSC_24M_CLK, VIDEO_PLL_CLK, AUDIO_PLL2_CLK,
+	  AUDIO_PLL1_CLK, SYSTEM_PLL1_800M_CLK,
+	  SYSTEM_PLL2_1000M_CLK, SYSTEM_PLL3_CLK, EXT_CLK_4}
+	},
+	{MEDIA_LDB_CLK_ROOT, IP_CLOCK_SLICE, 62,
+	 {OSC_24M_CLK, SYSTEM_PLL2_333M_CLK, SYSTEM_PLL2_100M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  EXT_CLK_2, AUDIO_PLL2_CLK, VIDEO_PLL_CLK}
+	},
+	{MEMREPAIR_CLK_ROOT, IP_CLOCK_SLICE, 63,
+	 {OSC_24M_CLK, SYSTEM_PLL2_100M_CLK, SYSTEM_PLL1_80M_CLK,
+	  SYSTEM_PLL1_800M_CLK, SYSTEM_PLL2_1000M_CLK,
+	  SYSTEM_PLL3_CLK, EXT_CLK_3, AUDIO_PLL2_CLK}
+	},
 	{ECSPI3_CLK_ROOT, IP_CLOCK_SLICE, 67,
 	 {OSC_24M_CLK, SYSTEM_PLL2_200M_CLK, SYSTEM_PLL1_40M_CLK,
 	  SYSTEM_PLL1_160M_CLK, SYSTEM_PLL1_800M_CLK,
@@ -812,7 +1602,7 @@ static struct clk_root_map root_array[] = {
 	 {DRAM_PLL1_CLK}
 	},
 	{CORE_SEL_CFG, CORE_SEL_CLOCK_SLICE, 0,
-	 {DRAM_PLL1_CLK}
+	 {ARM_A53_ALT_CLK, ARM_PLL_CLK}
 	},
 };
 #endif
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 7fcbd53f30..1d2c8e6db2 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -1,12 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2017 NXP
+ * Copyright 2017-2019 NXP
  *
  * Peng Fan <peng.fan@nxp.com>
  */
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -20,6 +22,7 @@
 #include <fdt_support.h>
 #include <fsl_wdog.h>
 #include <imx_sip.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -165,7 +168,13 @@ static u32 get_cpu_variant_type(u32 type)
 
 	u32 value = readl(&fuse->tester4);
 
-	if (type == MXC_CPU_IMX8MM) {
+	if (type == MXC_CPU_IMX8MQ) {
+		if ((value & 0x3) == 0x2)
+			return MXC_CPU_IMX8MD;
+		else if (value & 0x200000)
+			return MXC_CPU_IMX8MQL;
+
+	} else if (type == MXC_CPU_IMX8MM) {
 		switch (value & 0x3) {
 		case 2:
 			if (value & 0x1c0000)
@@ -182,6 +191,23 @@ static u32 get_cpu_variant_type(u32 type)
 				return MXC_CPU_IMX8MML;
 			break;
 		}
+	} else if (type == MXC_CPU_IMX8MN) {
+		switch (value & 0x3) {
+		case 2:
+			if (value & 0x1000000)
+				return MXC_CPU_IMX8MNDL;
+			else
+				return MXC_CPU_IMX8MND;
+		case 3:
+			if (value & 0x1000000)
+				return MXC_CPU_IMX8MNSL;
+			else
+				return MXC_CPU_IMX8MNS;
+		default:
+			if (value & 0x1000000)
+				return MXC_CPU_IMX8MNL;
+			break;
+		}
 	}
 
 	return type;
@@ -202,7 +228,7 @@ u32 get_cpu_rev(void)
 		return (MXC_CPU_IMX8MP << 12) | reg;
 	} else if (major_low == 0x42) {
 		/* iMX8MN */
-		return (MXC_CPU_IMX8MN << 12) | reg;
+		type = get_cpu_variant_type(MXC_CPU_IMX8MN);
 	} else if (major_low == 0x41) {
 		type = get_cpu_variant_type(MXC_CPU_IMX8MM);
 	} else {
@@ -226,6 +252,8 @@ u32 get_cpu_rev(void)
 				}
 			}
 		}
+
+		type = get_cpu_variant_type(type);
 	}
 
 	return (type << 12) | reg;
@@ -364,16 +392,18 @@ int ft_system_setup(void *blob, bd_t *bd)
 			if (nodeoff < 0)
 				continue; /* Not found, skip it */
 
-			printf("Found %s node\n", nodes_path[i]);
+			debug("Found %s node\n", nodes_path[i]);
 
 			rc = fdt_delprop(blob, nodeoff, "cpu-idle-states");
+			if (rc == -FDT_ERR_NOTFOUND)
+				continue;
 			if (rc) {
 				printf("Unable to update property %s:%s, err=%s\n",
 				       nodes_path[i], "status", fdt_strerror(rc));
 				return rc;
 			}
 
-			printf("Remove %s:%s\n", nodes_path[i],
+			debug("Remove %s:%s\n", nodes_path[i],
 			       "cpu-idle-states");
 		}
 	}
@@ -382,21 +412,115 @@ int ft_system_setup(void *blob, bd_t *bd)
 }
 #endif
 
-#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_SYSRESET)
+#if !CONFIG_IS_ENABLED(SYSRESET)
 void reset_cpu(ulong addr)
 {
-       struct watchdog_regs *wdog = (struct watchdog_regs *)addr;
+	struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
 
-       if (!addr)
-	       wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
+	/* Clear WDA to trigger WDOG_B immediately */
+	writew((SET_WCR_WT(1) | WCR_WDT | WCR_WDE | WCR_SRS), &wdog->wcr);
 
-       /* Clear WDA to trigger WDOG_B immediately */
-       writew((WCR_WDE | WCR_SRS), &wdog->wcr);
+	while (1) {
+		/*
+		 * spin for .5 seconds before reset
+		 */
+	}
+}
+#endif
 
-       while (1) {
-               /*
-                * spin for .5 seconds before reset
-                */
-       }
+#if defined(CONFIG_ARCH_MISC_INIT)
+static void acquire_buildinfo(void)
+{
+	u64 atf_commit = 0;
+
+	/* Get ARM Trusted Firmware commit id */
+	atf_commit = call_imx_sip(IMX_SIP_BUILDINFO,
+				  IMX_SIP_BUILDINFO_GET_COMMITHASH, 0, 0, 0);
+	if (atf_commit == 0xffffffff) {
+		debug("ATF does not support build info\n");
+		atf_commit = 0x30; /* Display 0, 0 ascii is 0x30 */
+	}
+
+	printf("\n BuildInfo:\n  - ATF %s\n\n", (char *)&atf_commit);
 }
+
+int arch_misc_init(void)
+{
+	acquire_buildinfo();
+
+	return 0;
+}
+#endif
+
+void imx_tmu_arch_init(void *reg_base)
+{
+	if (is_imx8mm() || is_imx8mn()) {
+		/* Load TCALIV and TASR from fuses */
+		struct ocotp_regs *ocotp =
+			(struct ocotp_regs *)OCOTP_BASE_ADDR;
+		struct fuse_bank *bank = &ocotp->bank[3];
+		struct fuse_bank3_regs *fuse =
+			(struct fuse_bank3_regs *)bank->fuse_regs;
+
+		u32 tca_rt, tca_hr, tca_en;
+		u32 buf_vref, buf_slope;
+
+		tca_rt = fuse->ana0 & 0xFF;
+		tca_hr = (fuse->ana0 & 0xFF00) >> 8;
+		tca_en = (fuse->ana0 & 0x2000000) >> 25;
+
+		buf_vref = (fuse->ana0 & 0x1F00000) >> 20;
+		buf_slope = (fuse->ana0 & 0xF0000) >> 16;
+
+		writel(buf_vref | (buf_slope << 16), (ulong)reg_base + 0x28);
+		writel((tca_en << 31) | (tca_hr << 16) | tca_rt,
+		       (ulong)reg_base + 0x30);
+	}
+#ifdef CONFIG_IMX8MP
+	/* Load TCALIV0/1/m40 and TRIM from fuses */
+	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	struct fuse_bank *bank = &ocotp->bank[38];
+	struct fuse_bank38_regs *fuse =
+		(struct fuse_bank38_regs *)bank->fuse_regs;
+	struct fuse_bank *bank2 = &ocotp->bank[39];
+	struct fuse_bank39_regs *fuse2 =
+		(struct fuse_bank39_regs *)bank2->fuse_regs;
+	u32 buf_vref, buf_slope, bjt_cur, vlsb, bgr;
+	u32 reg;
+	u32 tca40[2], tca25[2], tca105[2];
+
+	/* For blank sample */
+	if (!fuse->ana_trim2 && !fuse->ana_trim3 &&
+	    !fuse->ana_trim4 && !fuse2->ana_trim5) {
+		/* Use a default 25C binary codes */
+		tca25[0] = 1596;
+		tca25[1] = 1596;
+		writel(tca25[0], (ulong)reg_base + 0x30);
+		writel(tca25[1], (ulong)reg_base + 0x34);
+		return;
+	}
+
+	buf_vref = (fuse->ana_trim2 & 0xc0) >> 6;
+	buf_slope = (fuse->ana_trim2 & 0xF00) >> 8;
+	bjt_cur = (fuse->ana_trim2 & 0xF000) >> 12;
+	bgr = (fuse->ana_trim2 & 0xF0000) >> 16;
+	vlsb = (fuse->ana_trim2 & 0xF00000) >> 20;
+	writel(buf_vref | (buf_slope << 16), (ulong)reg_base + 0x28);
+
+	reg = (bgr << 28) | (bjt_cur << 20) | (vlsb << 12) | (1 << 7);
+	writel(reg, (ulong)reg_base + 0x3c);
+
+	tca40[0] = (fuse->ana_trim3 & 0xFFF0000) >> 16;
+	tca25[0] = (fuse->ana_trim3 & 0xF0000000) >> 28;
+	tca25[0] |= ((fuse->ana_trim4 & 0xFF) << 4);
+	tca105[0] = (fuse->ana_trim4 & 0xFFF00) >> 8;
+	tca40[1] = (fuse->ana_trim4 & 0xFFF00000) >> 20;
+	tca25[1] = fuse2->ana_trim5 & 0xFFF;
+	tca105[1] = (fuse2->ana_trim5 & 0xFFF000) >> 12;
+
+	/* use 25c for 1p calibration */
+	writel(tca25[0] | (tca105[0] << 16), (ulong)reg_base + 0x30);
+	writel(tca25[1] | (tca105[1] << 16), (ulong)reg_base + 0x34);
+	writel(tca40[0] | (tca40[1] << 16), (ulong)reg_base + 0x38);
 #endif
+}
diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c
index ec0da1164f..868633cf8a 100644
--- a/arch/arm/mach-imx/imx_bootaux.c
+++ b/arch/arm/mach-imx/imx_bootaux.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/mach-imx/sys_proto.h>
 #include <command.h>
@@ -92,7 +93,8 @@ int arch_auxiliary_core_check_up(u32 core_id)
  * The TCMUL is mapped to (M4_BOOTROM_BASE_ADDR) at A core side for
  * accessing the M4 TCMUL.
  */
-static int do_bootaux(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootaux(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	ulong addr;
 	int ret, up;
diff --git a/arch/arm/mach-imx/imxrt/soc.c b/arch/arm/mach-imx/imxrt/soc.c
index e1eea23035..8e7d15160d 100644
--- a/arch/arm/mach-imx/imxrt/soc.c
+++ b/arch/arm/mach-imx/imxrt/soc.c
@@ -5,8 +5,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/armv7_mpu.h>
+#include <linux/bitops.h>
 
 int arch_cpu_init(void)
 {
diff --git a/arch/arm/mach-imx/misc.c b/arch/arm/mach-imx/misc.c
index 31e95a9a28..818f38e17d 100644
--- a/arch/arm/mach-imx/misc.c
+++ b/arch/arm/mach-imx/misc.c
@@ -4,7 +4,10 @@
  */
 
 #include <common.h>
+#include <lmb.h>
+#include <log.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/mach-imx/regs-common.h>
diff --git a/arch/arm/mach-imx/mx5/clock.c b/arch/arm/mach-imx/mx5/clock.c
index 2fabdd2eae..bbaddd5a33 100644
--- a/arch/arm/mach-imx/mx5/clock.c
+++ b/arch/arm/mach-imx/mx5/clock.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
@@ -943,7 +945,8 @@ void mxc_set_sata_internal_clock(void)
 /*
  * Dump some core clockes.
  */
-static int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mx5_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	u32 freq;
 
diff --git a/arch/arm/mach-imx/mx5/soc.c b/arch/arm/mach-imx/mx5/soc.c
index b3a57bcf4b..c61fcce3eb 100644
--- a/arch/arm/mach-imx/mx5/soc.c
+++ b/arch/arm/mach-imx/mx5/soc.c
@@ -11,6 +11,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
 
 #include <linux/errno.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-imx/mx6/Makefile b/arch/arm/mach-imx/mx6/Makefile
index 81e2913d14..7ea8f91e4f 100644
--- a/arch/arm/mach-imx/mx6/Makefile
+++ b/arch/arm/mach-imx/mx6/Makefile
@@ -6,6 +6,7 @@
 # (C) Copyright 2011 Freescale Semiconductor, Inc.
 
 obj-y	:= soc.o clock.o
+obj-$(CONFIG_IMX_MODULE_FUSE) += module_fuse.o
 obj-$(CONFIG_SPL_BUILD)	     += ddr.o
 obj-$(CONFIG_MP)             += mp.o
 obj-$(CONFIG_MX6UL_LITESOM)  += litesom.o
diff --git a/arch/arm/mach-imx/mx6/clock.c b/arch/arm/mach-imx/mx6/clock.c
index 6a9e673ca2..fb5e5b6f05 100644
--- a/arch/arm/mach-imx/mx6/clock.c
+++ b/arch/arm/mach-imx/mx6/clock.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <div64.h>
+#include <log.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
@@ -1305,7 +1307,8 @@ void disable_ipu_clock(void)
 /*
  * Dump some core clockes.
  */
-int do_mx6_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mx6_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	u32 freq;
 	freq = decode_pll(PLL_SYS, MXC_HCLK);
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 69fe756b0b..16df71083d 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <hang.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-ddr.h>
diff --git a/arch/arm/mach-imx/mx6/litesom.c b/arch/arm/mach-imx/mx6/litesom.c
index b0a6bd589c..596773f054 100644
--- a/arch/arm/mach-imx/mx6/litesom.c
+++ b/arch/arm/mach-imx/mx6/litesom.c
@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <common.h>
 #include <fsl_esdhc_imx.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <mmc.h>
 
diff --git a/arch/arm/mach-imx/mx6/module_fuse.c b/arch/arm/mach-imx/mx6/module_fuse.c
new file mode 100644
index 0000000000..3e94416065
--- /dev/null
+++ b/arch/arm/mach-imx/mx6/module_fuse.c
@@ -0,0 +1,322 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <common.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/imx-regs.h>
+#include <asm/mach-imx/module_fuse.h>
+#include <linux/errno.h>
+
+static struct fuse_entry_desc mx6_fuse_descs[] = {
+#if defined(CONFIG_MX6ULL)
+	{MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
+	{MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
+	{MODULE_EPDC, "/soc/aips-bus@2200000/epdc@228c000", 0x430, 24},
+	{MODULE_ESAI, "/soc/aips-bus@2000000/spba-bus@2000000/esai@2024000", 0x430, 25},
+	{MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
+	{MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
+	{MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
+	{MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
+	{MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
+	{MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
+	{MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
+	{MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
+	{MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
+	{MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
+	{MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
+	{MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
+	{MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
+	{MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
+	{MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
+	{MODULE_DCP, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 14},
+	{MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
+	{MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
+	{MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
+	{MODULE_DCP_CRYPTO, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 25},
+	{MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
+	{MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
+	{MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
+	{MODULE_UART8, "/soc/aips-bus@2200000/serial@2288000", 0x440, 26},
+	{MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
+	{MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
+	{MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
+	{MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
+	{MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
+	{MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
+	{MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
+	{MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
+	{MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
+	{MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
+	/* Paths for older imx tree: */
+	{MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
+	{MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
+	{MODULE_EPDC, "/soc/aips-bus@02200000/epdc@0228c000", 0x430, 24},
+	{MODULE_ESAI, "/soc/aips-bus@02000000/spba-bus@02000000/esai@02024000", 0x430, 25},
+	{MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
+	{MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
+	{MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
+	{MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
+	{MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
+	{MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
+	{MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
+	{MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
+	{MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
+	{MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
+	{MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
+	{MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
+	{MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
+	{MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
+	{MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
+	{MODULE_DCP, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 14},
+	{MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
+	{MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
+	{MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
+	{MODULE_DCP_CRYPTO, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 25},
+	{MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
+	{MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
+	{MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
+	{MODULE_UART8, "/soc/aips-bus@02200000/serial@02288000", 0x440, 26},
+	{MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
+	{MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
+	{MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
+	{MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
+	{MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
+	{MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
+	{MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
+	{MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
+	{MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
+	{MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
+#elif defined(CONFIG_MX6UL)
+	{MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
+	{MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
+	{MODULE_SIM1, "/soc/aips-bus@2100000/sim@218c000", 0x430, 24},
+	{MODULE_SIM2, "/soc/aips-bus@2100000/sim@21b4000", 0x430, 25},
+	{MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
+	{MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
+	{MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
+	{MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
+	{MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
+	{MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
+	{MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
+	{MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
+	{MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
+	{MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
+	{MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
+	{MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
+	{MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
+	{MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
+	{MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
+	{MODULE_CAAM, "/soc/aips-bus@2100000/caam@2140000", 0x440, 14},
+	{MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
+	{MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
+	{MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
+	{MODULE_BEE, "/soc/aips-bus@2000000/bee@2044000", 0x440, 25},
+	{MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
+	{MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
+	{MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
+	{MODULE_UART8, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2024000", 0x440, 26},
+	{MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
+	{MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
+	{MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
+	{MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
+	{MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
+	{MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
+	{MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
+	{MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
+	{MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
+	{MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
+	/* Paths for older imx tree: */
+	{MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
+	{MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
+	{MODULE_SIM1, "/soc/aips-bus@02100000/sim@0218c000", 0x430, 24},
+	{MODULE_SIM2, "/soc/aips-bus@02100000/sim@021b4000", 0x430, 25},
+	{MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
+	{MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
+	{MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
+	{MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
+	{MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
+	{MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
+	{MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
+	{MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
+	{MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
+	{MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
+	{MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
+	{MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
+	{MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
+	{MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
+	{MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
+	{MODULE_CAAM, "/soc/aips-bus@02100000/caam@2140000", 0x440, 14},
+	{MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
+	{MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
+	{MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
+	{MODULE_BEE, "/soc/aips-bus@02000000/bee@02044000", 0x440, 25},
+	{MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
+	{MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
+	{MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
+	{MODULE_UART8, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02024000", 0x440, 26},
+	{MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
+	{MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
+	{MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
+	{MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
+	{MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
+	{MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
+	{MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
+	{MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
+	{MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
+	{MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
+#endif
+};
+
+u32 check_module_fused(enum fuse_module_type module)
+{
+	u32 i, reg;
+
+	for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
+		if (mx6_fuse_descs[i].module == module) {
+			reg = readl(OCOTP_BASE_ADDR +
+				    mx6_fuse_descs[i].fuse_word_offset);
+			if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset))
+				return 1; /* disabled */
+			else
+				return 0; /* enabled */
+		}
+	}
+
+	return  0; /* Not has a fuse, always enabled */
+}
+
+#ifdef CONFIG_OF_SYSTEM_SETUP
+int ft_system_setup(void *blob, bd_t *bd)
+{
+	const char *status = "disabled";
+	u32 i, reg;
+	int rc, off;
+
+	for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
+		reg = readl(OCOTP_BASE_ADDR +
+			    mx6_fuse_descs[i].fuse_word_offset);
+		if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset)) {
+			off = fdt_path_offset(blob,
+					      mx6_fuse_descs[i].node_path);
+
+			if (off < 0)
+				continue; /* Not found, skip it */
+add_status:
+			rc = fdt_setprop(blob, nodeoff, "status", status,
+					 strlen(status) + 1);
+			if (rc) {
+				if (rc == -FDT_ERR_NOSPACE) {
+					rc = fdt_increase_size(blob, 512);
+					if (!rc)
+						goto add_status;
+				}
+				printf("Unable to update property %s:%s, err=%s\n", mx6_fuse_descs[i].node_path, "status", fdt_strerror(rc));
+			} else {
+				printf("Modify %s disabled\n", mx6_fuse_descs[i].node_path);
+			}
+		}
+	}
+
+	return 0;
+}
+#endif
+
+u32 esdhc_fused(ulong base_addr)
+{
+	switch (base_addr) {
+	case USDHC1_BASE_ADDR:
+		return check_module_fused(MODULE_SD1);
+	case USDHC2_BASE_ADDR:
+		return check_module_fused(MODULE_SD2);
+#ifdef USDHC3_BASE_ADDR
+	case USDHC3_BASE_ADDR:
+		return check_module_fused(MODULE_SD3);
+#endif
+#ifdef USDHC4_BASE_ADDR
+	case USDHC4_BASE_ADDR:
+		return check_module_fused(MODULE_SD4);
+#endif
+	default:
+		return 0;
+	}
+}
+
+u32 ecspi_fused(ulong base_addr)
+{
+	switch (base_addr) {
+	case ECSPI1_BASE_ADDR:
+		return check_module_fused(MODULE_ECSPI1);
+	case ECSPI2_BASE_ADDR:
+		return check_module_fused(MODULE_ECSPI2);
+	case ECSPI3_BASE_ADDR:
+		return check_module_fused(MODULE_ECSPI3);
+	case ECSPI4_BASE_ADDR:
+		return check_module_fused(MODULE_ECSPI4);
+#ifdef ECSPI5_BASE_ADDR
+	case ECSPI5_BASE_ADDR:
+		return check_module_fused(MODULE_ECSPI5);
+#endif
+	default:
+		return 0;
+	}
+}
+
+u32 usb_fused(ulong base_addr)
+{
+	int i = (base_addr - USB_BASE_ADDR) / 0x200;
+
+	return check_module_fused(MODULE_USB_OTG1 + i);
+}
+
+u32 qspi_fused(ulong base_addr)
+{
+	switch (base_addr) {
+#ifdef QSPI1_BASE_ADDR
+	case QSPI1_BASE_ADDR:
+		return check_module_fused(MODULE_QSPI1);
+#endif
+
+#ifdef QSPI2_BASE_ADDR
+	case QSPI2_BASE_ADDR:
+		return check_module_fused(MODULE_QSPI2);
+#endif
+	default:
+		return 0;
+	}
+}
+
+u32 i2c_fused(ulong base_addr)
+{
+	switch (base_addr) {
+	case I2C1_BASE_ADDR:
+		return check_module_fused(MODULE_I2C1);
+	case I2C2_BASE_ADDR:
+		return check_module_fused(MODULE_I2C2);
+	case I2C3_BASE_ADDR:
+		return check_module_fused(MODULE_I2C3);
+#ifdef I2C4_BASE_ADDR
+	case I2C4_BASE_ADDR:
+		return check_module_fused(MODULE_I2C4);
+#endif
+	}
+
+	return 0;
+}
+
+u32 enet_fused(ulong base_addr)
+{
+	switch (base_addr) {
+	case ENET_BASE_ADDR:
+		return check_module_fused(MODULE_ENET1);
+#ifdef ENET2_BASE_ADDR
+	case ENET2_BASE_ADDR:
+		return check_module_fused(MODULE_ENET2);
+#endif
+	default:
+		return 0;
+	}
+}
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index b8aaf3ef01..19ca382649 100644
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/mx7/clock.c b/arch/arm/mach-imx/mx7/clock.c
index 75be4f8ad7..aba9461d92 100644
--- a/arch/arm/mach-imx/mx7/clock.c
+++ b/arch/arm/mach-imx/mx7/clock.c
@@ -8,7 +8,9 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <div64.h>
+#include <log.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
@@ -1100,7 +1102,8 @@ void epdc_clock_disable(void)
 /*
  * Dump some core clockes.
  */
-int do_mx7_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mx7_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	u32 freq;
 	freq = decode_pll(PLL_CORE, MXC_HCLK);
diff --git a/arch/arm/mach-imx/mx7/psci-mx7.c b/arch/arm/mach-imx/mx7/psci-mx7.c
index c8f6ca235b..f32945ea37 100644
--- a/arch/arm/mach-imx/mx7/psci-mx7.c
+++ b/arch/arm/mach-imx/mx7/psci-mx7.c
@@ -5,6 +5,7 @@
  */
 
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/psci.h>
 #include <asm/secure.h>
diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 4aafeed188..798fe74a3d 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
@@ -18,6 +19,7 @@
 #include <imx_thermal.h>
 #include <fsl_sec.h>
 #include <asm/setup.h>
+#include <linux/delay.h>
 
 #define IOMUXC_GPR1		0x4
 #define BM_IOMUXC_GPR1_IRQ	0x1000
diff --git a/arch/arm/mach-imx/mx7ulp/clock.c b/arch/arm/mach-imx/mx7ulp/clock.c
index 3c0bcccd0d..a987ff22df 100644
--- a/arch/arm/mach-imx/mx7ulp/clock.c
+++ b/arch/arm/mach-imx/mx7ulp/clock.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <div64.h>
 #include <asm/io.h>
 #include <errno.h>
@@ -329,7 +330,8 @@ void hab_caam_clock_enable(unsigned char enable)
 /*
  * Dump some core clockes.
  */
-int do_mx7_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mx7_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	u32 addr = 0;
 	u32 freq;
diff --git a/arch/arm/mach-imx/mx7ulp/iomux.c b/arch/arm/mach-imx/mx7ulp/iomux.c
index 8c68655399..05ddeed2a6 100644
--- a/arch/arm/mach-imx/mx7ulp/iomux.c
+++ b/arch/arm/mach-imx/mx7ulp/iomux.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
  */
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
diff --git a/arch/arm/mach-imx/mx7ulp/pcc.c b/arch/arm/mach-imx/mx7ulp/pcc.c
index 234974ba0d..aa7ea86a44 100644
--- a/arch/arm/mach-imx/mx7ulp/pcc.c
+++ b/arch/arm/mach-imx/mx7ulp/pcc.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <div64.h>
+#include <log.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <asm/arch/imx-regs.h>
diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c
index c7bb7a1c66..4c066557c1 100644
--- a/arch/arm/mach-imx/mx7ulp/scg.c
+++ b/arch/arm/mach-imx/mx7ulp/scg.c
@@ -5,11 +5,13 @@
 
 #include <common.h>
 #include <div64.h>
+#include <log.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/pcc.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 scg_p scg1_regs = (scg_p)SCG1_RBASE;
 
diff --git a/arch/arm/mach-imx/mx7ulp/soc.c b/arch/arm/mach-imx/mx7ulp/soc.c
index 0d39dab7ea..8dd6b4d40e 100644
--- a/arch/arm/mach-imx/mx7ulp/soc.c
+++ b/arch/arm/mach-imx/mx7ulp/soc.c
@@ -2,14 +2,18 @@
 /*
  * Copyright (C) 2016 Freescale Semiconductor, Inc.
  */
+
+#include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/hab.h>
+#include <linux/bitops.h>
 
 #define PMC0_BASE_ADDR		0x410a1000
 #define PMC0_CTRL		0x28
diff --git a/arch/arm/mach-imx/sata.c b/arch/arm/mach-imx/sata.c
index b9f630952d..c4599aaf68 100644
--- a/arch/arm/mach-imx/sata.c
+++ b/arch/arm/mach-imx/sata.c
@@ -7,6 +7,7 @@
 #include <asm/arch/iomux.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
 
 int setup_sata(void)
diff --git a/arch/arm/mach-imx/sip.c b/arch/arm/mach-imx/sip.c
index fca520c671..6cb8179ee8 100644
--- a/arch/arm/mach-imx/sip.c
+++ b/arch/arm/mach-imx/sip.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 
 unsigned long call_imx_sip(unsigned long id, unsigned long reg0,
 			   unsigned long reg1, unsigned long reg2,
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 49bb3b928d..1a231c67f5 100644
--- a/arch/arm/mach-imx/spl.c
+++ b/arch/arm/mach-imx/spl.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
@@ -197,52 +199,35 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
 	case SD1_BOOT:
 	case SD2_BOOT:
 	case SD3_BOOT:
-#if defined(CONFIG_SPL_FAT_SUPPORT)
-		return MMCSD_MODE_FS;
-#else
-		return MMCSD_MODE_RAW;
-#endif
-		break;
+		if (IS_ENABLED(CONFIG_SPL_FS_FAT))
+			return MMCSD_MODE_FS;
+		else
+			return MMCSD_MODE_RAW;
 	case MMC1_BOOT:
 	case MMC2_BOOT:
 	case MMC3_BOOT:
-#if defined(CONFIG_SPL_FAT_SUPPORT)
-		return MMCSD_MODE_FS;
-#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
-		return MMCSD_MODE_EMMCBOOT;
-#else
-		return MMCSD_MODE_RAW;
-#endif
-		break;
+		if (IS_ENABLED(CONFIG_SPL_FS_FAT))
+			return MMCSD_MODE_FS;
+		else if (IS_ENABLED(CONFIG_SUPPORT_EMMC_BOOT))
+			return MMCSD_MODE_EMMCBOOT;
+		else
+			return MMCSD_MODE_RAW;
 	default:
 		puts("spl: ERROR:  unsupported device\n");
 		hang();
 	}
 #else
-/*
- * When CONFIG_SPL_FORCE_MMC_BOOT is defined the 'boot_device' is used
- * unconditionally to decide about device to use for booting.
- * This is crucial for falcon boot mode, when board boots up (i.e. ROM
- * loads SPL) from slow SPI-NOR memory and afterwards the SPL's 'falcon' boot
- * mode is used to load Linux OS from eMMC partition.
- */
-#ifdef CONFIG_SPL_FORCE_MMC_BOOT
 	switch (boot_device) {
-#else
-	switch (spl_boot_device()) {
-#endif
 	/* for MMC return either RAW or FAT mode */
 	case BOOT_DEVICE_MMC1:
 	case BOOT_DEVICE_MMC2:
 	case BOOT_DEVICE_MMC2_2:
-#if defined(CONFIG_SPL_FS_FAT)
-		return MMCSD_MODE_FS;
-#elif defined(CONFIG_SUPPORT_EMMC_BOOT)
-		return MMCSD_MODE_EMMCBOOT;
-#else
-		return MMCSD_MODE_RAW;
-#endif
-		break;
+		if (IS_ENABLED(CONFIG_SPL_FS_FAT))
+			return MMCSD_MODE_FS;
+		else if (IS_ENABLED(CONFIG_SUPPORT_EMMC_BOOT))
+			return MMCSD_MODE_EMMCBOOT;
+		else
+			return MMCSD_MODE_RAW;
 	default:
 		puts("spl: ERROR:  unsupported device\n");
 		hang();
diff --git a/arch/arm/mach-imx/spl_imx_romapi.c b/arch/arm/mach-imx/spl_imx_romapi.c
index 5dc0f7174e..f588a5f521 100644
--- a/arch/arm/mach-imx/spl_imx_romapi.c
+++ b/arch/arm/mach-imx/spl_imx_romapi.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <spl.h>
 
diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c
index 5a292c3964..7da43c32e0 100644
--- a/arch/arm/mach-imx/syscounter.c
+++ b/arch/arm/mach-imx/syscounter.c
@@ -6,12 +6,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <div64.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/syscounter.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-imx/timer.c b/arch/arm/mach-imx/timer.c
index 5fe5c51f6a..fa1941aec4 100644
--- a/arch/arm/mach-imx/timer.c
+++ b/arch/arm/mach-imx/timer.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <div64.h>
diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index a13cbef9b5..c7d186149b 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -119,7 +119,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
 config K3_SYSFW_IMAGE_SIZE_MAX
 	int "Amount of memory dynamically allocated for loading SYSFW blob"
 	depends on K3_LOAD_SYSFW
-	default	277000
+	default	278000
 	help
 	  Amount of memory (in bytes) reserved through dynamic allocation at
 	  runtime for loading the combined System Firmware and configuration image
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index b692806352..516a02e8a8 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <spl.h>
 #include <asm/arch/hardware.h>
@@ -197,6 +198,7 @@ void board_init_f(ulong dummy)
 	if (ret)
 		panic("DRAM init failed: %d\n", ret);
 #endif
+	spl_enable_dcache();
 }
 
 u32 spl_mmc_boot_mode(const u32 boot_device)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 80dfa5f0fd..9695b2236e 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -8,10 +8,14 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include "common.h"
 #include <dm.h>
 #include <remoteproc.h>
+#include <asm/cache.h>
 #include <linux/soc/ti/ti_sci_protocol.h>
 #include <fdt_support.h>
 #include <asm/arch/sys_proto.h>
@@ -406,3 +410,38 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
 		}
 	}
 }
+
+void spl_enable_dcache(void)
+{
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+	phys_addr_t ram_top = CONFIG_SYS_SDRAM_BASE;
+
+	dram_init_banksize();
+
+	/* reserve TLB table */
+	gd->arch.tlb_size = PGTABLE_SIZE;
+
+	ram_top += get_effective_memsize();
+	/* keep ram_top in the 32-bit address space */
+	if (ram_top >= 0x100000000)
+		ram_top = (phys_addr_t) 0x100000000;
+
+	gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
+	debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
+	      gd->arch.tlb_addr + gd->arch.tlb_size);
+
+	dcache_enable();
+#endif
+}
+
+#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
+void spl_board_prepare_for_boot(void)
+{
+	dcache_disable();
+}
+
+void spl_board_prepare_for_boot_linux(void)
+{
+	dcache_disable();
+}
+#endif
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index 57682e1973..94cdcb56ad 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -27,3 +27,4 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
 void start_non_linux_remote_cores(void);
 int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
 void k3_sysfw_print_ver(void);
+void spl_enable_dcache(void);
diff --git a/arch/arm/mach-k3/include/mach/am6_hardware.h b/arch/arm/mach-k3/include/mach/am6_hardware.h
index 6df7631545..a91ef5f735 100644
--- a/arch/arm/mach-k3/include/mach/am6_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am6_hardware.h
@@ -8,6 +8,9 @@
 #define __ASM_ARCH_AM6_HARDWARE_H
 
 #include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CTRL_MMR0_BASE					0x00100000
 #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)
diff --git a/arch/arm/mach-k3/include/mach/j721e_hardware.h b/arch/arm/mach-k3/include/mach/j721e_hardware.h
index ead136ed63..19873d6e28 100644
--- a/arch/arm/mach-k3/include/mach/j721e_hardware.h
+++ b/arch/arm/mach-k3/include/mach/j721e_hardware.h
@@ -8,6 +8,9 @@
 #define __ASM_ARCH_J721E_HARDWARE_H
 
 #include <config.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #define CTRL_MMR0_BASE					0x00100000
 #define CTRLMMR_MAIN_DEVSTAT				(CTRL_MMR0_BASE + 0x30)
@@ -18,6 +21,8 @@
 #define MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT	1
 #define MAIN_DEVSTAT_PRIM_BOOTMODE_MMC_PORT_MASK	BIT(6)
 #define MAIN_DEVSTAT_PRIM_BOOTMODE_PORT_SHIFT		6
+#define MAIN_DEVSTAT_BKUP_MMC_PORT_MASK			BIT(7)
+#define MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT		7
 
 #define WKUP_CTRL_MMR0_BASE				0x43000000
 #define MCU_CTRL_MMR0_BASE				0x40f00000
diff --git a/arch/arm/mach-k3/include/mach/j721e_spl.h b/arch/arm/mach-k3/include/mach/j721e_spl.h
index 475278bd04..3fa85ca3b6 100644
--- a/arch/arm/mach-k3/include/mach/j721e_spl.h
+++ b/arch/arm/mach-k3/include/mach/j721e_spl.h
@@ -7,6 +7,7 @@
 #define _ASM_ARCH_J721E_SPL_H_
 
 /* With BootMode B = 0 */
+#include <linux/bitops.h>
 #define BOOT_DEVICE_HYPERFLASH		0x00
 #define BOOT_DEVICE_OSPI		0x01
 #define BOOT_DEVICE_QSPI		0x02
@@ -25,7 +26,19 @@
 #define BOOT_DEVICE_MMC2_2		0x16
 #define BOOT_DEVICE_RAM			0x17
 
+/* Backup boot modes with MCU Only = 0 */
+#define BACKUP_BOOT_DEVICE_RAM		0x0
+#define BACKUP_BOOT_DEVICE_USB		0x1
+#define BACKUP_BOOT_DEVICE_UART		0x3
+#define BACKUP_BOOT_DEVICE_ETHERNET	0x4
+#define BACKUP_BOOT_DEVICE_MMC2		0x5
+#define BACKUP_BOOT_DEVICE_SPI		0x6
+#define BACKUP_BOOT_DEVICE_I2C		0x7
+
 #define BOOT_MODE_B_SHIFT		4
 #define BOOT_MODE_B_MASK		BIT(4)
 
+#define K3_PRIMARY_BOOTMODE		0x0
+#define K3_BACKUP_BOOTMODE		0x1
+
 #endif
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 71fc20c30b..f9454e3273 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/armv7_mpu.h>
@@ -221,6 +222,7 @@ void board_init_f(ulong dummy)
 	if (ret)
 		panic("DRAM init failed: %d\n", ret);
 #endif
+	spl_enable_dcache();
 }
 
 u32 spl_mmc_boot_mode(const u32 boot_device)
@@ -235,6 +237,35 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
 	}
 }
 
+static u32 __get_backup_bootmedia(u32 main_devstat)
+{
+	u32 bkup_boot = (main_devstat & MAIN_DEVSTAT_BKUP_BOOTMODE_MASK) >>
+			MAIN_DEVSTAT_BKUP_BOOTMODE_SHIFT;
+
+	switch (bkup_boot) {
+	case BACKUP_BOOT_DEVICE_USB:
+		return BOOT_DEVICE_DFU;
+	case BACKUP_BOOT_DEVICE_UART:
+		return BOOT_DEVICE_UART;
+	case BACKUP_BOOT_DEVICE_ETHERNET:
+		return BOOT_DEVICE_ETHERNET;
+	case BACKUP_BOOT_DEVICE_MMC2:
+	{
+		u32 port = (main_devstat & MAIN_DEVSTAT_BKUP_MMC_PORT_MASK) >>
+			    MAIN_DEVSTAT_BKUP_MMC_PORT_SHIFT;
+		if (port == 0x0)
+			return BOOT_DEVICE_MMC1;
+		return BOOT_DEVICE_MMC2;
+	}
+	case BACKUP_BOOT_DEVICE_SPI:
+		return BOOT_DEVICE_SPI;
+	case BACKUP_BOOT_DEVICE_I2C:
+		return BOOT_DEVICE_I2C;
+	}
+
+	return BOOT_DEVICE_RAM;
+}
+
 static u32 __get_primary_bootmedia(u32 main_devstat, u32 wkup_devstat)
 {
 
@@ -271,8 +302,10 @@ u32 spl_boot_device(void)
 	/* MAIN CTRL MMR can only be read if MCU ONLY is 0 */
 	main_devstat = readl(CTRLMMR_MAIN_DEVSTAT);
 
-	/* ToDo: Add support for backup boot media */
-	return __get_primary_bootmedia(main_devstat, wkup_devstat);
+	if (bootindex == K3_PRIMARY_BOOTMODE)
+		return __get_primary_bootmedia(main_devstat, wkup_devstat);
+	else
+		return __get_backup_bootmedia(main_devstat);
 }
 #endif
 
diff --git a/arch/arm/mach-k3/security.c b/arch/arm/mach-k3/security.c
index 0d77d98359..66f90a5a34 100644
--- a/arch/arm/mach-k3/security.c
+++ b/arch/arm/mach-k3/security.c
@@ -10,6 +10,9 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <hang.h>
+#include <image.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <linux/soc/ti/ti_sci_protocol.h>
 #include <mach/spl.h>
 #include <spl.h>
diff --git a/arch/arm/mach-k3/sysfw-loader.c b/arch/arm/mach-k3/sysfw-loader.c
index 4f5c848245..513be09c68 100644
--- a/arch/arm/mach-k3/sysfw-loader.c
+++ b/arch/arm/mach-k3/sysfw-loader.c
@@ -7,9 +7,12 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <malloc.h>
 #include <remoteproc.h>
+#include <asm/cache.h>
 #include <linux/soc/ti/ti_sci_protocol.h>
 #include <g_dnl.h>
 #include <usb.h>
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 3c46824d0b..0c59515d2e 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clock_defs.h>
+#include <linux/bitops.h>
 
 /* DEV and ARM speed definitions as specified in DEVSPEED register */
 int __weak speeds[DEVSPEED_NUMSPDS] = {
diff --git a/arch/arm/mach-keystone/cmd_clock.c b/arch/arm/mach-keystone/cmd_clock.c
index 667826b9f6..7165d666e5 100644
--- a/arch/arm/mach-keystone/cmd_clock.c
+++ b/arch/arm/mach-keystone/cmd_clock.c
@@ -19,7 +19,7 @@ struct pll_init_data cmd_pll_data = {
 	.pll_od = 2,
 };
 
-int do_pll_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_pll_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc != 5)
 		goto pll_cmd_usage;
@@ -63,7 +63,8 @@ U_BOOT_CMD(
 	PLLSET_CMD_LIST " <mult> <div> <OD>\n"
 );
 
-int do_getclk_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_getclk_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	unsigned int clk;
 	unsigned long freq;
@@ -92,7 +93,7 @@ U_BOOT_CMD(
 	CLOCK_INDEXES_LIST
 );
 
-int do_psc_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_psc_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int	psc_module;
 	int	res;
diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c
index 8142039040..049d573473 100644
--- a/arch/arm/mach-keystone/cmd_mon.c
+++ b/arch/arm/mach-keystone/cmd_mon.c
@@ -12,8 +12,8 @@
 #include <mach/mon.h>
 asm(".arch_extension sec\n\t");
 
-static int do_mon_install(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_mon_install(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	u32 addr, dpsc_base = 0x1E80000, freq, load_addr, size;
 	int     rcode = 0;
@@ -65,8 +65,8 @@ static void core_spin(void)
 	}
 }
 
-int do_mon_power(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+int do_mon_power(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	int     rcode = 0, core_id, on;
 	void (*fn)(void);
diff --git a/arch/arm/mach-keystone/cmd_poweroff.c b/arch/arm/mach-keystone/cmd_poweroff.c
index 89b18516cd..f0ad9173b9 100644
--- a/arch/arm/mach-keystone/cmd_poweroff.c
+++ b/arch/arm/mach-keystone/cmd_poweroff.c
@@ -12,7 +12,7 @@
 #include <asm/arch/psc_defs.h>
 #include <asm/arch/hardware.h>
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	mon_power_off(0);
 
diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c
index 23ff06466d..7dea600d50 100644
--- a/arch/arm/mach-keystone/ddr3.c
+++ b/arch/arm/mach-keystone/ddr3.c
@@ -7,11 +7,13 @@
  */
 
 #include <cpu_func.h>
+#include <env.h>
 #include <asm/io.h>
 #include <common.h>
 #include <asm/arch/msmc.h>
 #include <asm/arch/ddr3.h>
 #include <asm/arch/psc_defs.h>
+#include <linux/delay.h>
 
 #include <asm/ti-common/ti-edma3.h>
 
diff --git a/arch/arm/mach-keystone/ddr3_spd.c b/arch/arm/mach-keystone/ddr3_spd.c
index 6eee9ad13a..3803449c2b 100644
--- a/arch/arm/mach-keystone/ddr3_spd.c
+++ b/arch/arm/mach-keystone/ddr3_spd.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 
 #include <i2c.h>
 #include <ddr_spd.h>
diff --git a/arch/arm/mach-keystone/include/mach/clock_defs.h b/arch/arm/mach-keystone/include/mach/clock_defs.h
index 42bd0ac1cd..336b103dc8 100644
--- a/arch/arm/mach-keystone/include/mach/clock_defs.h
+++ b/arch/arm/mach-keystone/include/mach/clock_defs.h
@@ -9,6 +9,9 @@
 #define _CLOCK_DEFS_H_
 
 #include <asm/arch/hardware.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 /* PLL Control Registers */
 struct pllctl_regs {
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2hk.h b/arch/arm/mach-keystone/include/mach/hardware-k2hk.h
index 7793cf1266..3d078be991 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2hk.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2hk.h
@@ -9,6 +9,10 @@
 #ifndef __ASM_ARCH_HARDWARE_K2HK_H
 #define __ASM_ARCH_HARDWARE_K2HK_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define KS2_ARM_PLL_EN			BIT(13)
 
 /* PA SS Registers */
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2l.h b/arch/arm/mach-keystone/include/mach/hardware-k2l.h
index f46a98cfd1..0e710a3795 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2l.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2l.h
@@ -9,6 +9,10 @@
 #ifndef __ASM_ARCH_HARDWARE_K2L_H
 #define __ASM_ARCH_HARDWARE_K2L_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define KS2_ARM_PLL_EN			BIT(13)
 
 /* PA SS Registers */
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index d2234dc88c..0c5dc6a739 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -11,6 +11,7 @@
 #include <config.h>
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 
 #include <linux/sizes.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-keystone/include/mach/xhci-keystone.h b/arch/arm/mach-keystone/include/mach/xhci-keystone.h
index a05351292c..989b0c3158 100644
--- a/arch/arm/mach-keystone/include/mach/xhci-keystone.h
+++ b/arch/arm/mach-keystone/include/mach/xhci-keystone.h
@@ -6,6 +6,10 @@
  *     Texas Instruments Incorporated, <www.ti.com>
  */
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define USB3_PHY_REF_SSP_EN		BIT(29)
 #define USB3_PHY_OTG_VBUSVLDECTSEL	BIT(16)
 
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 375588894d..88e8912959 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -8,12 +8,15 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <ns16550.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/msmc.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/psc_defs.h>
+#include <linux/bitops.h>
 
 #define MAX_PCI_PORTS		2
 enum pci_mode	{
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index 7441052a55..efaabca5a7 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/psc_defs.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-keystone/mon.c b/arch/arm/mach-keystone/mon.c
index b7de9ba099..58995d73ac 100644
--- a/arch/arm/mach-keystone/mon.c
+++ b/arch/arm/mach-keystone/mon.c
@@ -6,6 +6,7 @@
  */
 
 #include <hang.h>
+#include <image.h>
 #include <asm/unaligned.h>
 #include <common.h>
 #include <command.h>
diff --git a/arch/arm/mach-keystone/psc.c b/arch/arm/mach-keystone/psc.c
index f87bcb3bea..145aff8ac6 100644
--- a/arch/arm/mach-keystone/psc.c
+++ b/arch/arm/mach-keystone/psc.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/processor.h>
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 2f68092f82..ae44cb665e 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -1,4 +1,4 @@
-if KIRKWOOD
+if ARCH_KIRKWOOD
 
 choice
 	prompt "Marvell Kirkwood board select"
diff --git a/arch/arm/mach-kirkwood/cache.c b/arch/arm/mach-kirkwood/cache.c
index 6b12ea5e91..009b7deeca 100644
--- a/arch/arm/mach-kirkwood/cache.c
+++ b/arch/arm/mach-kirkwood/cache.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <asm/arch/cpu.h>
+#include <asm/cache.h>
 
 #define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
 
diff --git a/arch/arm/mach-kirkwood/cpu.c b/arch/arm/mach-kirkwood/cpu.c
index 5e964af8ea..fa26903593 100644
--- a/arch/arm/mach-kirkwood/cpu.c
+++ b/arch/arm/mach-kirkwood/cpu.c
@@ -9,6 +9,9 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/cache.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c
index 7222504ed3..4fdad99cad 100644
--- a/arch/arm/mach-kirkwood/mpp.c
+++ b/arch/arm/mach-kirkwood/mpp.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig b/arch/arm/mach-lpc32xx/Kconfig
index 986ad738ac..986ad738ac 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/Kconfig
+++ b/arch/arm/mach-lpc32xx/Kconfig
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/Makefile b/arch/arm/mach-lpc32xx/Makefile
index 6303570bee..6303570bee 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/Makefile
+++ b/arch/arm/mach-lpc32xx/Makefile
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/clk.c b/arch/arm/mach-lpc32xx/clk.c
index cb2344d79f..cb2344d79f 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/clk.c
+++ b/arch/arm/mach-lpc32xx/clk.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c b/arch/arm/mach-lpc32xx/cpu.c
index 4c59a44f7e..ee15a9453d 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/cpu.c
+++ b/arch/arm/mach-lpc32xx/cpu.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c b/arch/arm/mach-lpc32xx/devices.c
index 7e7646a2e1..7e7646a2e1 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/devices.c
+++ b/arch/arm/mach-lpc32xx/devices.c
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/dram.c b/arch/arm/mach-lpc32xx/dram.c
index 4f975694fd..1602237923 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/dram.c
+++ b/arch/arm/mach-lpc32xx/dram.c
@@ -17,6 +17,7 @@
 #include <asm/arch/wdt.h>
 #include <asm/arch/emc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
 static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S b/arch/arm/mach-lpc32xx/lowlevel_init.S
index d42da2bc56..d42da2bc56 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/lowlevel_init.S
+++ b/arch/arm/mach-lpc32xx/lowlevel_init.S
diff --git a/arch/arm/cpu/arm926ejs/lpc32xx/timer.c b/arch/arm/mach-lpc32xx/timer.c
index 3a896d10ca..90183e3014 100644
--- a/arch/arm/cpu/arm926ejs/lpc32xx/timer.c
+++ b/arch/arm/mach-lpc32xx/timer.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/timer.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static struct timer_regs  *timer0 = (struct timer_regs *)TIMER0_BASE;
 static struct timer_regs  *timer1 = (struct timer_regs *)TIMER1_BASE;
diff --git a/arch/arm/mach-mediatek/cpu.c b/arch/arm/mach-mediatek/cpu.c
index 5e5f3f0842..c329e7cc98 100644
--- a/arch/arm/mach-mediatek/cpu.c
+++ b/arch/arm/mach-mediatek/cpu.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <init.h>
 #include <wdt.h>
 #include <dm/uclass-internal.h>
 
diff --git a/arch/arm/mach-mediatek/mt7622/init.c b/arch/arm/mach-mediatek/mt7622/init.c
index 1e527c0485..7f6ce80f37 100644
--- a/arch/arm/mach-mediatek/mt7622/init.c
+++ b/arch/arm/mach-mediatek/mt7622/init.c
@@ -6,7 +6,9 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 
 int print_cpuinfo(void)
 {
diff --git a/arch/arm/mach-mediatek/mt7629/init.c b/arch/arm/mach-mediatek/mt7629/init.c
index ba91a6eaa6..c260413a57 100644
--- a/arch/arm/mach-mediatek/mt7629/init.c
+++ b/arch/arm/mach-mediatek/mt7629/init.c
@@ -8,10 +8,13 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/arch/misc.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 #include <dt-bindings/clock/mt7629-clk.h>
diff --git a/arch/arm/mach-mediatek/mt8512/init.c b/arch/arm/mach-mediatek/mt8512/init.c
index a38b5d12d9..aa779f4376 100644
--- a/arch/arm/mach-mediatek/mt8512/init.c
+++ b/arch/arm/mach-mediatek/mt8512/init.c
@@ -10,10 +10,13 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <wdt.h>
 #include <asm/arch/misc.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
 #include <dt-bindings/clock/mt8512-clk.h>
diff --git a/arch/arm/mach-mediatek/mt8516/init.c b/arch/arm/mach-mediatek/mt8516/init.c
index 360d94abb0..13be391221 100644
--- a/arch/arm/mach-mediatek/mt8516/init.c
+++ b/arch/arm/mach-mediatek/mt8516/init.c
@@ -10,9 +10,11 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <ram.h>
 #include <asm/arch/misc.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
 #include <dt-bindings/clock/mt8516-clk.h>
diff --git a/arch/arm/mach-mediatek/mt8518/init.c b/arch/arm/mach-mediatek/mt8518/init.c
index c2b1b76982..531a403da1 100644
--- a/arch/arm/mach-mediatek/mt8518/init.c
+++ b/arch/arm/mach-mediatek/mt8518/init.c
@@ -11,9 +11,11 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <ram.h>
 #include <asm/arch/misc.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
 #include <dt-bindings/clock/mt8518-clk.h>
diff --git a/arch/arm/mach-mediatek/spl.c b/arch/arm/mach-mediatek/spl.c
index 37f1f219b2..927175c5a3 100644
--- a/arch/arm/mach-mediatek/spl.c
+++ b/arch/arm/mach-mediatek/spl.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <common.h>
 #include <hang.h>
+#include <init.h>
 #include <spl.h>
 
 #include "init.h"
diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c
index 6874458e36..5e0b3f6cb5 100644
--- a/arch/arm/mach-meson/board-axg.c
+++ b/arch/arm/mach-meson/board-axg.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/boot.h>
 #include <asm/arch/eth.h>
 #include <asm/arch/axg.h>
diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c
index bc4c92074c..19e5bfd366 100644
--- a/arch/arm/mach-meson/board-common.c
+++ b/arch/arm/mach-meson/board-common.c
@@ -6,8 +6,11 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/boot.h>
 #include <env.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 #include <linux/libfdt.h>
 #include <linux/err.h>
 #include <asm/arch/mem.h>
@@ -69,11 +72,8 @@ void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size)
 	if (ret)
 		printf("Could not reserve zone @ 0x%llx\n", start);
 
-	if (IS_ENABLED(CONFIG_EFI_LOADER)) {
-		efi_add_memory_map(start,
-				   ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
-				   EFI_RESERVED_MEMORY_TYPE, false);
-	}
+	if (IS_ENABLED(CONFIG_EFI_LOADER))
+		efi_add_memory_map(start, size, EFI_RESERVED_MEMORY_TYPE);
 }
 
 int meson_generate_serial_ethaddr(void)
diff --git a/arch/arm/mach-meson/board-g12a.c b/arch/arm/mach-meson/board-g12a.c
index 26d6b90790..14127ca737 100644
--- a/arch/arm/mach-meson/board-g12a.c
+++ b/arch/arm/mach-meson/board-g12a.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/boot.h>
 #include <asm/arch/eth.h>
 #include <asm/arch/g12a.h>
diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c
index 3da99017a5..c4cc11f1de 100644
--- a/arch/arm/mach-meson/board-gx.c
+++ b/arch/arm/mach-meson/board-gx.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/boot.h>
 #include <asm/arch/eth.h>
 #include <asm/arch/gx.h>
@@ -183,7 +184,8 @@ int board_usb_init(int index, enum usb_init_type init)
 
 	/* get the PHYs */
 	for (i = 0; i < 2; i++) {
-		ret = generic_phy_get_by_node(dwc2_node, i, &usb_phys[i]);
+		ret = generic_phy_get_by_index_nodev(dwc2_node, i,
+						     &usb_phys[i]);
 		if (ret && ret != -ENOENT) {
 			pr_err("Failed to get USB PHY%d for %s\n",
 			       i, ofnode_get_name(dwc2_node));
diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c
index 4b88afa9b7..3abb27e03b 100644
--- a/arch/arm/mach-meson/board-info.c
+++ b/arch/arm/mach-meson/board-info.c
@@ -5,11 +5,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <linux/bitfield.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define AO_SEC_SD_CFG8		0xe0
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index fac286b9c8..ebbb880b71 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -6,7 +6,13 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <env.h>
+#include <log.h>
 #include <asm/arch/sm.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <dm.h>
@@ -116,7 +122,7 @@ int meson_sm_get_reboot_reason(void)
 	return FIELD_GET(REBOOT_REASON_MASK, reason);
 }
 
-static int do_sm_serial(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_sm_serial(struct cmd_tbl *cmdtp, int flag, int argc,
 			char *const argv[])
 {
 	ulong address;
@@ -152,8 +158,8 @@ static const char *reboot_reasons[MAX_REBOOT_REASONS] = {
 	[REBOOT_REASON_WATCHDOG_REBOOT] = "watchdog_reboot",
 };
 
-static int do_sm_reboot_reason(cmd_tbl_t *cmdtp, int flag, int argc,
-			char *const argv[])
+static int do_sm_reboot_reason(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	const char *reason_str;
 	char *destarg = NULL;
@@ -180,15 +186,15 @@ static int do_sm_reboot_reason(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_sm_sub[] = {
+static struct cmd_tbl cmd_sm_sub[] = {
 	U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""),
 	U_BOOT_CMD_MKENT(reboot_reason, 1, 1, do_sm_reboot_reason, "", ""),
 };
 
-static int do_sm(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_sm(struct cmd_tbl *cmdtp, int flag, int argc,
 		 char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 645990b3ef..0d8e0922a2 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -165,8 +165,8 @@ config TARGET_DB_XC3_24G4XG
 	bool "Support DB-XC3-24G4XG"
 	select 98DX3336
 
-config TARGET_CRS305_1G_4S
-	bool "Support CRS305-1G-4S"
+config TARGET_CRS3XX_98DX3236
+	bool "Support CRS3XX-98DX3236"
 	select 98DX3236
 
 endchoice
@@ -188,7 +188,7 @@ config SYS_BOARD
 	default "a38x" if TARGET_CONTROLCENTERDC
 	default "x530" if TARGET_X530
 	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
-	default "crs305-1g-4s" if TARGET_CRS305_1G_4S
+	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
 
 config SYS_CONFIG_NAME
 	default "clearfog" if TARGET_CLEARFOG
@@ -207,7 +207,7 @@ config SYS_CONFIG_NAME
 	default "controlcenterdc" if TARGET_CONTROLCENTERDC
 	default "x530" if TARGET_X530
 	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
-	default "crs305-1g-4s" if TARGET_CRS305_1G_4S
+	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
 
 config SYS_VENDOR
 	default "Marvell" if TARGET_DB_MV784MP_GP
@@ -225,7 +225,7 @@ config SYS_VENDOR
 	default "CZ.NIC" if TARGET_TURRIS_MOX
 	default "gdsys" if TARGET_CONTROLCENTERDC
 	default "alliedtelesis" if TARGET_X530
-	default "mikrotik" if TARGET_CRS305_1G_4S
+	default "mikrotik" if TARGET_CRS3XX_98DX3236
 
 config SYS_SOC
 	default "mvebu"
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index b73952044d..7e9c206ed6 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -10,14 +10,14 @@ obj-y += arm64-common.o
 
 else # CONFIG_ARM64
 
-ifdef CONFIG_KIRKWOOD
+ifdef CONFIG_ARCH_KIRKWOOD
 
 obj-y	= dram.o
 obj-y	+= gpio.o
 obj-y	+= mbus.o
 obj-y	+= timer.o
 
-else # CONFIG_KIRKWOOD
+else # CONFIG_ARCH_KIRKWOOD
 
 obj-y	= cpu.o
 obj-y	+= dram.o
@@ -73,5 +73,5 @@ obj-$(CONFIG_SPL_BUILD) += lowlevel_spl.o
 obj-$(CONFIG_ARMADA_38X) += serdes/a38x/
 obj-$(CONFIG_ARMADA_XP) += serdes/axp/
 
-endif # CONFIG_KIRKWOOD
+endif # CONFIG_ARCH_KIRKWOOD
 endif # CONFIG_ARM64
diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c
index 34cc0479a8..c8c065e93c 100644
--- a/arch/arm/mach-mvebu/arm64-common.c
+++ b/arch/arm/mach-mvebu/arm64-common.c
@@ -7,6 +7,8 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <init.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 #include <linux/libfdt.h>
 #include <linux/sizes.h>
 #include <pci.h>
diff --git a/arch/arm/mach-mvebu/armada3700/cpu.c b/arch/arm/mach-mvebu/armada3700/cpu.c
index 17d2d43bab..e438b4922e 100644
--- a/arch/arm/mach-mvebu/armada3700/cpu.c
+++ b/arch/arm/mach-mvebu/armada3700/cpu.c
@@ -8,6 +8,8 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-mvebu/armada8k/dram.c b/arch/arm/mach-mvebu/armada8k/dram.c
index 265a8b0ae8..3da9fa589d 100644
--- a/arch/arm/mach-mvebu/armada8k/dram.c
+++ b/arch/arm/mach-mvebu/armada8k/dram.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <linux/sizes.h>
 
diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index fb241c7e4d..3a63dafde4 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -6,6 +6,9 @@
 #include <common.h>
 #include <ahci.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/mbus.h>
 #include <asm/io.h>
 #include <asm/pl310.h>
diff --git a/arch/arm/mach-mvebu/efuse.c b/arch/arm/mach-mvebu/efuse.c
index 16ccfec933..c79eee98fe 100644
--- a/arch/arm/mach-mvebu/efuse.c
+++ b/arch/arm/mach-mvebu/efuse.c
@@ -10,6 +10,8 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/efuse.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/mbus.h>
 
 #if defined(CONFIG_MVEBU_EFUSE_FAKE)
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index acb9257c90..3f3b15aa8a 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -10,6 +10,10 @@
 #ifndef _MVEBU_SOC_H
 #define _MVEBU_SOC_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define SOC_MV78230_ID		0x7823
 #define SOC_MV78260_ID		0x7826
 #define SOC_MV78460_ID		0x7846
diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c
index a95db5e5c3..f29abe5911 100644
--- a/arch/arm/mach-mvebu/mbus.c
+++ b/arch/arm/mach-mvebu/mbus.c
@@ -48,6 +48,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
@@ -411,7 +412,7 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size)
 	return 0;
 }
 
-#ifndef CONFIG_KIRKWOOD
+#ifndef CONFIG_ARCH_KIRKWOOD
 static void mvebu_mbus_get_lowest_base(struct mvebu_mbus_state *mbus,
 				       phys_addr_t *base)
 {
@@ -479,7 +480,7 @@ int mbus_dt_setup_win(struct mvebu_mbus_state *mbus,
 			return -ENOMEM;
 	}
 
-#ifndef CONFIG_KIRKWOOD
+#ifndef CONFIG_ARCH_KIRKWOOD
 	/*
 	 * Re-configure the mbus bridge registers each time this function
 	 * is called. Since it may get called from the board code in
@@ -497,7 +498,7 @@ int mvebu_mbus_probe(struct mbus_win windows[], int count)
 	int ret;
 	int i;
 
-#if defined(CONFIG_KIRKWOOD)
+#if defined(CONFIG_ARCH_KIRKWOOD)
 	mbus_state.soc = &kirkwood_mbus_data;
 #endif
 #if defined(CONFIG_ARCH_MVEBU)
diff --git a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
index a1cef9fdd6..adef3331a7 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
@@ -8,6 +8,8 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include "ctrl_pex.h"
 #include "sys_env_lib.h"
diff --git a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
index 66409a50c0..67a00cf1cf 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "high_speed_env_spec.h"
 #include "sys_env_lib.h"
diff --git a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
index d9edfaa1df..2a51b7113c 100644
--- a/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
+++ b/arch/arm/mach-mvebu/serdes/a38x/seq_exec.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "seq_exec.h"
 #include "high_speed_env_spec.h"
diff --git a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
index c8c9298864..ea3b4c7d5b 100644
--- a/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
+++ b/arch/arm/mach-mvebu/serdes/axp/high_speed_env_lib.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "high_speed_env_spec.h"
 #include "board_env_spec.h"
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 70fef3b573..f645befb2c 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -8,6 +8,8 @@
 #include <debug_uart.h>
 #include <fdtdec.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-mvebu/timer.c b/arch/arm/mach-mvebu/timer.c
index 2f6b4d1702..43b3ed15d0 100644
--- a/arch/arm/mach-mvebu/timer.c
+++ b/arch/arm/mach-mvebu/timer.c
@@ -7,8 +7,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 #define TIMER_LOAD_VAL			0xffffffff
 
diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c
index 108c93542d..722e6db056 100644
--- a/arch/arm/mach-omap2/abb.c
+++ b/arch/arm/mach-omap2/abb.c
@@ -13,6 +13,7 @@
 #include <asm/arch/clock.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/bitops.h>
 
 __weak s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
 {
diff --git a/arch/arm/mach-omap2/am33xx/board.c b/arch/arm/mach-omap2/am33xx/board.c
index 283f73522d..ce58bf811f 100644
--- a/arch/arm/mach-omap2/am33xx/board.c
+++ b/arch/arm/mach-omap2/am33xx/board.c
@@ -12,6 +12,7 @@
 #include <debug_uart.h>
 #include <errno.h>
 #include <init.h>
+#include <net.h>
 #include <ns16550.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
@@ -31,6 +32,7 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/compiler.h>
 #include <linux/usb/ch9.h>
diff --git a/arch/arm/mach-omap2/am33xx/chilisom.c b/arch/arm/mach-omap2/am33xx/chilisom.c
index 3942305108..15b6b35ae7 100644
--- a/arch/arm/mach-omap2/am33xx/chilisom.c
+++ b/arch/arm/mach-omap2/am33xx/chilisom.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/clk_synthesizer.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-omap2/am33xx/clock.c b/arch/arm/mach-omap2/am33xx/clock.c
index 8c61547ee9..8819062aaa 100644
--- a/arch/arm/mach-omap2/am33xx/clock.c
+++ b/arch/arm/mach-omap2/am33xx/clock.c
@@ -9,6 +9,8 @@
  */
 #include <common.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-omap2/am33xx/clock_ti814x.c b/arch/arm/mach-omap2/am33xx/clock_ti814x.c
index aef090b4f8..27abaff48f 100644
--- a/arch/arm/mach-omap2/am33xx/clock_ti814x.c
+++ b/arch/arm/mach-omap2/am33xx/clock_ti814x.c
@@ -12,6 +12,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 /* PRCM */
 #define PRCM_MOD_EN		0x2
diff --git a/arch/arm/mach-omap2/am33xx/clock_ti816x.c b/arch/arm/mach-omap2/am33xx/clock_ti816x.c
index e9c7b2d996..ec4cc75381 100644
--- a/arch/arm/mach-omap2/am33xx/clock_ti816x.c
+++ b/arch/arm/mach-omap2/am33xx/clock_ti816x.c
@@ -27,6 +27,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #include <asm/emif.h>
 
diff --git a/arch/arm/mach-omap2/am33xx/ddr.c b/arch/arm/mach-omap2/am33xx/ddr.c
index 3fd1d086ff..f8434ecf57 100644
--- a/arch/arm/mach-omap2/am33xx/ddr.c
+++ b/arch/arm/mach-omap2/am33xx/ddr.c
@@ -5,11 +5,14 @@
  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  */
 
+#include <common.h>
+#include <log.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 #include <asm/emif.h>
+#include <linux/delay.h>
 
 /**
  * Base address for EMIF instances
diff --git a/arch/arm/mach-omap2/am33xx/sys_info.c b/arch/arm/mach-omap2/am33xx/sys_info.c
index 17b46619b5..338f6afcae 100644
--- a/arch/arm/mach-omap2/am33xx/sys_info.c
+++ b/arch/arm/mach-omap2/am33xx/sys_info.c
@@ -12,6 +12,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/cpu.h>
diff --git a/arch/arm/mach-omap2/am33xx/ti816x_emif4.c b/arch/arm/mach-omap2/am33xx/ti816x_emif4.c
index 9f59489958..707ea807ac 100644
--- a/arch/arm/mach-omap2/am33xx/ti816x_emif4.c
+++ b/arch/arm/mach-omap2/am33xx/ti816x_emif4.c
@@ -15,6 +15,7 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 #include <asm/emif.h>
+#include <linux/delay.h>
 
 /*********************************************************************
  * Init DDR3 on TI816X EVM
diff --git a/arch/arm/mach-omap2/boot-common.c b/arch/arm/mach-omap2/boot-common.c
index 7538523724..cb9d7fdb15 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <ahci.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/omap_common.h>
 #include <asm/arch/omap.h>
@@ -194,10 +195,9 @@ u32 spl_mmc_boot_mode(const u32 boot_device)
 
 void spl_board_init(void)
 {
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
 	/* Prepare console output */
 	preloader_console_init();
-#endif
+
 #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
 	gpmc_init();
 #endif
diff --git a/arch/arm/mach-omap2/clocks-common.c b/arch/arm/mach-omap2/clocks-common.c
index 9aff83e9df..757fa3801a 100644
--- a/arch/arm/mach-omap2/clocks-common.c
+++ b/arch/arm/mach-omap2/clocks-common.c
@@ -15,6 +15,8 @@
 #include <common.h>
 #include <hang.h>
 #include <i2c.h>
+#include <init.h>
+#include <log.h>
 #include <asm/omap_common.h>
 #include <asm/gpio.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/mach-omap2/emif-common.c b/arch/arm/mach-omap2/emif-common.c
index 4658f67e84..312f868fbc 100644
--- a/arch/arm/mach-omap2/emif-common.c
+++ b/arch/arm/mach-omap2/emif-common.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <net.h>
 #include <asm/emif.h>
 #include <asm/arch/clock.h>
@@ -20,6 +21,7 @@
 #include <asm/utils.h>
 #include <linux/compiler.h>
 #include <asm/ti-common/ti-edma3.h>
+#include <linux/delay.h>
 
 static int emif1_enabled = -1, emif2_enabled = -1;
 
diff --git a/arch/arm/mach-omap2/fdt-common.c b/arch/arm/mach-omap2/fdt-common.c
index 3f420186ad..5f344f8283 100644
--- a/arch/arm/mach-omap2/fdt-common.c
+++ b/arch/arm/mach-omap2/fdt-common.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/arch/arm/mach-omap2/hwinit-common.c b/arch/arm/mach-omap2/hwinit-common.c
index 772b4c4db5..7a7086776e 100644
--- a/arch/arm/mach-omap2/hwinit-common.c
+++ b/arch/arm/mach-omap2/hwinit-common.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/arch/sys_proto.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-omap2/omap-cache.c b/arch/arm/mach-omap2/omap-cache.c
index 1eff9be270..2c9ada060c 100644
--- a/arch/arm/mach-omap2/omap-cache.c
+++ b/arch/arm/mach-omap2/omap-cache.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-omap2/omap3/am35x_musb.c b/arch/arm/mach-omap2/omap3/am35x_musb.c
index 5af6d28e74..026e5d2d13 100644
--- a/arch/arm/mach-omap2/omap3/am35x_musb.c
+++ b/arch/arm/mach-omap2/omap3/am35x_musb.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/am35x_def.h>
 
diff --git a/arch/arm/mach-omap2/omap3/board.c b/arch/arm/mach-omap2/omap3/board.c
index 60de0d6052..f08c8ab43a 100644
--- a/arch/arm/mach-omap2/omap3/board.c
+++ b/arch/arm/mach-omap2/omap3/board.c
@@ -16,7 +16,9 @@
  *
  */
 #include <common.h>
+#include <command.h>
 #include <dm.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
@@ -279,7 +281,8 @@ void abort(void)
 /******************************************************************************
  * OMAP3 specific command to switch between NAND HW and SW ecc
  *****************************************************************************/
-static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_switch_ecc(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int hw, strength = 1;
 
diff --git a/arch/arm/mach-omap2/omap3/emac.c b/arch/arm/mach-omap2/omap3/emac.c
index fb0c9188f5..eecc5d334e 100644
--- a/arch/arm/mach-omap2/omap3/emac.c
+++ b/arch/arm/mach-omap2/omap3/emac.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/am35x_def.h>
 
diff --git a/arch/arm/mach-omap2/omap3/emif4.c b/arch/arm/mach-omap2/omap3/emif4.c
index a8bd428e0c..4cfa132388 100644
--- a/arch/arm/mach-omap2/omap3/emif4.c
+++ b/arch/arm/mach-omap2/omap3/emif4.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap3/sdrc.c b/arch/arm/mach-omap2/omap3/sdrc.c
index 861d01d6df..1d65ed6227 100644
--- a/arch/arm/mach-omap2/omap3/sdrc.c
+++ b/arch/arm/mach-omap2/omap3/sdrc.c
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/omap4/sdram_elpida.c b/arch/arm/mach-omap2/omap4/sdram_elpida.c
index a29a264016..2a18cf0215 100644
--- a/arch/arm/mach-omap2/omap4/sdram_elpida.c
+++ b/arch/arm/mach-omap2/omap4/sdram_elpida.c
@@ -9,6 +9,7 @@
  * Aneesh V <aneesh@ti.com>
  */
 
+#include <common.h>
 #include <asm/emif.h>
 #include <asm/arch/sys_proto.h>
 
diff --git a/arch/arm/mach-omap2/omap5/abb.c b/arch/arm/mach-omap2/omap5/abb.c
index 446f99f634..2f9f8e65d0 100644
--- a/arch/arm/mach-omap2/omap5/abb.c
+++ b/arch/arm/mach-omap2/omap5/abb.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <asm/omap_common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /*
  * Setup LDOVBB for OMAP5.
diff --git a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
index 598074ba21..8569eff31a 100644
--- a/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
+++ b/arch/arm/mach-omap2/omap5/dra7xx_iodelay.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <hang.h>
+#include <log.h>
 #include <asm/utils.h>
 #include <asm/arch/dra7xx_iodelay.h>
 #include <asm/arch/omap.h>
diff --git a/arch/arm/mach-omap2/omap5/emif.c b/arch/arm/mach-omap2/omap5/emif.c
index f3661a0e74..2de36b6fec 100644
--- a/arch/arm/mach-omap2/omap5/emif.c
+++ b/arch/arm/mach-omap2/omap5/emif.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/emif.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/utils.h>
diff --git a/arch/arm/mach-omap2/omap5/fdt.c b/arch/arm/mach-omap2/omap5/fdt.c
index c4adba31e6..3f8474b8d0 100644
--- a/arch/arm/mach-omap2/omap5/fdt.c
+++ b/arch/arm/mach-omap2/omap5/fdt.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <hang.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <malloc.h>
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c b/arch/arm/mach-omap2/omap5/hwinit.c
index 3b1733099f..47ac8656bf 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -18,6 +18,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <asm/utils.h>
 #include <asm/arch/gpio.h>
diff --git a/arch/arm/mach-omap2/omap5/sdram.c b/arch/arm/mach-omap2/omap5/sdram.c
index 6bf4cf4a75..786da45fac 100644
--- a/arch/arm/mach-omap2/omap5/sdram.c
+++ b/arch/arm/mach-omap2/omap5/sdram.c
@@ -10,6 +10,7 @@
  * Sricharan R <r.sricharan@ti.com>
  */
 
+#include <common.h>
 #include <asm/emif.h>
 #include <asm/arch/sys_proto.h>
 
diff --git a/arch/arm/mach-omap2/pipe3-phy.c b/arch/arm/mach-omap2/pipe3-phy.c
index 8808e353a9..35ec81d314 100644
--- a/arch/arm/mach-omap2/pipe3-phy.c
+++ b/arch/arm/mach-omap2/pipe3-phy.c
@@ -11,6 +11,8 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include "pipe3-phy.h"
 
diff --git a/arch/arm/mach-omap2/sec-common.c b/arch/arm/mach-omap2/sec-common.c
index 28b929f84f..0551bc125e 100644
--- a/arch/arm/mach-omap2/sec-common.c
+++ b/arch/arm/mach-omap2/sec-common.c
@@ -13,9 +13,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <stdarg.h>
 
 #include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index dbb68f718d..bcfba16a08 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -16,10 +16,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-omap2/utils.c b/arch/arm/mach-omap2/utils.c
index 0d5ca20e8e..6e6791fc65 100644
--- a/arch/arm/mach-omap2/utils.c
+++ b/arch/arm/mach-omap2/utils.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <env.h>
+#include <part.h>
 #include <asm/setup.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/omap_common.h>
@@ -90,7 +91,7 @@ static u32 omap_mmc_get_part_size(const char *part)
 {
 	int res;
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	u64 sz = 0;
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index 7644b8dc85..5baa6fb935 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -1,4 +1,4 @@
-if ORION5X
+if ARCH_ORION5X
 
 choice
 	prompt "Marvell Orion board select"
diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c
index 5a693e20bb..d9abcacbb4 100644
--- a/arch/arm/mach-orion5x/cpu.c
+++ b/arch/arm/mach-orion5x/cpu.c
@@ -10,6 +10,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/cache.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-orion5x/timer.c b/arch/arm/mach-orion5x/timer.c
index 077eb63e74..4926bb7779 100644
--- a/arch/arm/mach-orion5x/timer.c
+++ b/arch/arm/mach-orion5x/timer.c
@@ -8,8 +8,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define UBOOT_CNTR	0	/* counter to use for uboot timer */
 
diff --git a/arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds b/arch/arm/mach-orion5x/u-boot-spl.lds
index a537fe0295..a537fe0295 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds
+++ b/arch/arm/mach-orion5x/u-boot-spl.lds
diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c
index 409cbd319f..7d3f6f6285 100644
--- a/arch/arm/mach-owl/soc.c
+++ b/arch/arm/mach-owl/soc.c
@@ -6,6 +6,8 @@
  */
 
 #include <cpu_func.h>
+#include <init.h>
+#include <asm/cache.h>
 #include <linux/arm-smccc.h>
 #include <linux/psci.h>
 #include <common.h>
diff --git a/arch/arm/mach-rmobile/board.c b/arch/arm/mach-rmobile/board.c
index 8a2d3ce621..a10371f74e 100644
--- a/arch/arm/mach-rmobile/board.c
+++ b/arch/arm/mach-rmobile/board.c
@@ -4,6 +4,7 @@
  * (C) Copyright 2012 Renesas Solutions Corp.
  */
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 
 #ifdef CONFIG_ARCH_RMOBILE_BOARD_STRING
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 2cc701c4f5..fdbbd72e28 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -5,6 +5,8 @@
  */
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <env.h>
 #include <linux/ctype.h>
diff --git a/arch/arm/mach-rmobile/emac.c b/arch/arm/mach-rmobile/emac.c
index f9cd89a131..3211dfee02 100644
--- a/arch/arm/mach-rmobile/emac.c
+++ b/arch/arm/mach-rmobile/emac.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <linux/errno.h>
 #include <netdev.h>
 
diff --git a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
index ecd02b9be0..5cd8a8c787 100644
--- a/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
+++ b/arch/arm/mach-rmobile/include/mach/rcar-gen3-base.h
@@ -79,6 +79,7 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* RWDT */
 struct rcar_rwdt {
diff --git a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
index be9b233747..7741718be1 100644
--- a/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
+++ b/arch/arm/mach-rmobile/include/mach/sh_sdhi.h
@@ -11,6 +11,7 @@
 #ifndef _SH_SDHI_H
 #define _SH_SDHI_H
 
+#include <linux/bitops.h>
 #define SDHI_CMD			(0x0000 >> 1)
 #define SDHI_PORTSEL			(0x0004 >> 1)
 #define SDHI_ARG0			(0x0008 >> 1)
diff --git a/arch/arm/mach-rmobile/timer.c b/arch/arm/mach-rmobile/timer.c
index 9fcab446a5..ba06535e4c 100644
--- a/arch/arm/mach-rmobile/timer.c
+++ b/arch/arm/mach-rmobile/timer.c
@@ -6,10 +6,12 @@
 
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch-armv7/globaltimer.h>
 #include <asm/arch/rmobile.h>
+#include <linux/delay.h>
 
 static struct globaltimer *global_timer = \
 		(struct globaltimer *)GLOBAL_TIMER_BASE_ADDR;
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 14b9e89ea3..430c0cbf41 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -7,8 +7,10 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <syscon.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/boot_mode.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c
index 7598fe4c43..2158934159 100644
--- a/arch/arm/mach-rockchip/boot_mode.c
+++ b/arch/arm/mach-rockchip/boot_mode.c
@@ -5,6 +5,9 @@
 
 #include <common.h>
 #include <adc.h>
+#include <command.h>
+#include <env.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/boot_mode.h>
 #include <dm/device.h>
diff --git a/arch/arm/mach-rockchip/bootrom.c b/arch/arm/mach-rockchip/bootrom.c
index 1524eca272..b36e559e87 100644
--- a/arch/arm/mach-rockchip/bootrom.c
+++ b/arch/arm/mach-rockchip/bootrom.c
@@ -7,6 +7,7 @@
 #include <hang.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/boot_mode.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/setjmp.h>
 #include <asm/system.h>
diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c
index 4b0e99299a..21ca9dedce 100644
--- a/arch/arm/mach-rockchip/cpu-info.c
+++ b/arch/arm/mach-rockchip/cpu-info.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/cru.h>
diff --git a/arch/arm/mach-rockchip/misc.c b/arch/arm/mach-rockchip/misc.c
index 6dbb9bde48..28c7c7214c 100644
--- a/arch/arm/mach-rockchip/misc.c
+++ b/arch/arm/mach-rockchip/misc.c
@@ -12,6 +12,8 @@
 #include <common.h>
 #include <env.h>
 #include <dm.h>
+#include <hash.h>
+#include <log.h>
 #include <dm/uclass-internal.h>
 #include <misc.h>
 #include <u-boot/crc.h>
diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c
index 8c8976f61c..085e650620 100644
--- a/arch/arm/mach-rockchip/px30-board-tpl.c
+++ b/arch/arm/mach-rockchip/px30-board-tpl.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <dm.h>
+#include <init.h>
 #include <ram.h>
 #include <spl.h>
 #include <version.h>
diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c
index 5014ee83d7..6fcef63c1b 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -5,6 +5,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <init.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/grf_px30.h>
diff --git a/arch/arm/mach-rockchip/px30/syscon_px30.c b/arch/arm/mach-rockchip/px30/syscon_px30.c
index 0331491b40..4672bdbf00 100644
--- a/arch/arm/mach-rockchip/px30/syscon_px30.c
+++ b/arch/arm/mach-rockchip/px30/syscon_px30.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index fbc89b66c4..6eb89e15b8 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <debug_uart.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/sdram_rk3036.h>
diff --git a/arch/arm/mach-rockchip/rk3036/rk3036.c b/arch/arm/mach-rockchip/rk3036/rk3036.c
index e9ada6dea3..e9e020ff3f 100644
--- a/arch/arm/mach-rockchip/rk3036/rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/rk3036.c
@@ -2,6 +2,9 @@
 /*
  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  */
+
+#include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/grf_rk3036.h>
 #include <asm/arch-rockchip/hardware.h>
diff --git a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
index c39cbb8111..6ae254e99a 100644
--- a/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
+++ b/arch/arm/mach-rockchip/rk3036/sdram_rk3036.c
@@ -3,6 +3,7 @@
  * (C) Copyright 2015 Rockchip Electronics Co., Ltd
  */
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/types.h>
 #include <asm/arch-rockchip/cru_rk3036.h>
@@ -10,6 +11,7 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/sdram_rk3036.h>
 #include <asm/arch-rockchip/uart.h>
+#include <linux/delay.h>
 
 /*
  * we can not fit the code to access the device tree in SPL
diff --git a/arch/arm/mach-rockchip/rk3128/rk3128.c b/arch/arm/mach-rockchip/rk3128/rk3128.c
index ee176de80b..740bd2ba07 100644
--- a/arch/arm/mach-rockchip/rk3128/rk3128.c
+++ b/arch/arm/mach-rockchip/rk3128/rk3128.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2017 Rockchip Electronics Co., Ltd
  */
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-rockchip/rk3188/rk3188.c b/arch/arm/mach-rockchip/rk3188/rk3188.c
index e52466fb6f..ef57dfd761 100644
--- a/arch/arm/mach-rockchip/rk3188/rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/rk3188.c
@@ -5,6 +5,8 @@
 #include <common.h>
 #include <dm.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
diff --git a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
index 94f4ec7227..ea7d7b5b1a 100644
--- a/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
+++ b/arch/arm/mach-rockchip/rk3188/syscon_rk3188.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
index 562117e6c1..ad4ac62e51 100644
--- a/arch/arm/mach-rockchip/rk322x/rk322x.c
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -2,6 +2,7 @@
 /*
  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
  */
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/grf_rk322x.h>
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c
index 812f3bd5f3..804abe8a1b 100644
--- a/arch/arm/mach-rockchip/rk3288/rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/rk3288.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2016 Rockchip Electronics Co., Ltd
  */
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <env.h>
 #include <clk.h>
@@ -114,8 +115,8 @@ int rk_board_late_init(void)
 	return rk3288_board_late_init();
 }
 
-static int do_clock(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_clock(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	static const struct {
 		char *name;
diff --git a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
index dff2caa598..e3da0a0194 100644
--- a/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
+++ b/arch/arm/mach-rockchip/rk3288/syscon_rk3288.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
diff --git a/arch/arm/mach-rockchip/rk3308/rk3308.c b/arch/arm/mach-rockchip/rk3308/rk3308.c
index edf5994709..8e8214cf7e 100644
--- a/arch/arm/mach-rockchip/rk3308/rk3308.c
+++ b/arch/arm/mach-rockchip/rk3308/rk3308.c
@@ -3,12 +3,14 @@
  *Copyright (c) 2018 Rockchip Electronics Co., Ltd
  */
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/gpio.h>
 #include <debug_uart.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-rockchip/rk3328/rk3328.c b/arch/arm/mach-rockchip/rk3328/rk3328.c
index 8c81242e5d..7c85b2663c 100644
--- a/arch/arm/mach-rockchip/rk3328/rk3328.c
+++ b/arch/arm/mach-rockchip/rk3328/rk3328.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/grf_rk3328.h>
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 20ae797794..1c6d65a588 100644
--- a/arch/arm/mach-rockchip/rk3368/rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/rk3368.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <syscon.h>
 #include <asm/armv8/mmu.h>
 #include <asm/io.h>
@@ -13,6 +14,8 @@
 #include <asm/arch-rockchip/cru_rk3368.h>
 #include <asm/arch-rockchip/grf_rk3368.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
index 4ba94f2e80..cba0dda3e8 100644
--- a/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
+++ b/arch/arm/mach-rockchip/rk3368/syscon_rk3368.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig b/arch/arm/mach-rockchip/rk3399/Kconfig
index 927bb62a9f..254b9c5b4d 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -19,6 +19,13 @@ config TARGET_EVB_RK3399
 	  with full function and physical connectors support like Type-C ports,
 	  USB.0 host ports, LVDS, JTAG, MAC, SD card, HDMI, USB-to-serial...
 
+config TARGET_PINEBOOK_PRO_RK3399
+	bool "Pinebook Pro"
+	help
+	  Pinebook Pro is a laptop based on the Rockchip rk3399 SoC
+	  with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port,
+	  1920*1080 screen and all the usual laptop features.
+
 config TARGET_PUMA_RK3399
 	bool "Theobroma Systems RK3399-Q7 (Puma)"
 	help
@@ -144,6 +151,7 @@ endif # BOOTCOUNT_LIMIT
 
 source "board/firefly/roc-pc-rk3399/Kconfig"
 source "board/google/gru/Kconfig"
+source "board/pine64/pinebook-pro-rk3399/Kconfig"
 source "board/pine64/rockpro64_rk3399/Kconfig"
 source "board/rockchip/evb_rk3399/Kconfig"
 source "board/theobroma-systems/puma_rk3399/Kconfig"
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index dafa142824..4fda93b152 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -4,6 +4,9 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <spl_gpio.h>
 #include <syscon.h>
@@ -14,6 +17,7 @@
 #include <asm/arch-rockchip/gpio.h>
 #include <asm/arch-rockchip/grf_rk3399.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -24,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe330000",
 	[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d0000",
-	[BROM_BOOTSOURCE_SD] = "/dwmmc@fe320000",
+	[BROM_BOOTSOURCE_SD] = "/mmc@fe320000",
 };
 
 static struct mm_region rk3399_mem_map[] = {
@@ -172,7 +176,7 @@ const char *spl_decode_boot_device(u32 boot_device)
 		u32 boot_device;
 		const char *ofpath;
 	} spl_boot_devices_tbl[] = {
-		{ BOOT_DEVICE_MMC1, "/dwmmc@fe320000" },
+		{ BOOT_DEVICE_MMC1, "/mmc@fe320000" },
 		{ BOOT_DEVICE_MMC2, "/sdhci@fe330000" },
 		{ BOOT_DEVICE_SPI, "/spi@ff1d0000" },
 	};
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index 259ca44d68..690cbe7f27 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
 
@@ -20,6 +21,9 @@ static const struct udevice_id rk3399_syscon_ids[] = {
 U_BOOT_DRIVER(syscon_rk3399) = {
 	.name = "rk3399_syscon",
 	.id = UCLASS_SYSCON,
+#if !CONFIG_IS_ENABLED(OF_PLATDATA)
+	.bind = dm_scan_fdt_dev,
+#endif
 	.of_match = rk3399_syscon_ids,
 };
 
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 530644c043..24fe6cc8f0 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/sdram.h>
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index c147d5821e..94673f34c9 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mmc.h>
 #include <spl.h>
 
@@ -98,6 +99,12 @@ __weak const char *board_spl_was_booted_from(void)
 
 void board_boot_order(u32 *spl_boot_list)
 {
+	/* In case of no fdt (or only platdata), use spl_boot_device() */
+	if (!CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_PLATDATA)) {
+		spl_boot_list[0] = spl_boot_device();
+		return;
+	}
+
 	const void *blob = gd->fdt_blob;
 	int chosen_node = fdt_path_offset(blob, "/chosen");
 	int idx = 0;
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index 0b76af6080..cddf4fd3d5 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -7,10 +7,14 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <spl.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -49,7 +53,8 @@ u32 spl_boot_device(void)
 
 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
 		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
-		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
+		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) || \
+		defined(CONFIG_TARGET_CHROMEBOOK_SPEEDY)
 	return BOOT_DEVICE_SPI;
 #endif
 	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
@@ -103,9 +108,6 @@ __weak int arch_cpu_init(void)
 void board_init_f(ulong dummy)
 {
 	int ret;
-#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
-	struct udevice *dev;
-#endif
 
 #ifdef CONFIG_DEBUG_UART
 	/*
@@ -135,13 +137,15 @@ void board_init_f(ulong dummy)
 	/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
 	timer_init();
 #endif
-#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
+#if !defined(CONFIG_TPL) || defined(CONFIG_SPL_RAM)
 	debug("\nspl:init dram\n");
-	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
+	ret = dram_init();
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
 		return;
 	}
+	gd->ram_top = gd->ram_base + get_effective_memsize();
+	gd->ram_top = board_get_usable_ram_top(gd->ram_size);
 #endif
 	preloader_console_init();
 }
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index a2b8d31cbd..88f80b05a9 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -7,11 +7,14 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <spl.h>
 #include <version.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
+#include <linux/bitops.h>
 
 #define TIMER_LOAD_COUNT_L	0x00
 #define TIMER_LOAD_COUNT_H	0x04
diff --git a/arch/arm/mach-s5pc1xx/cache.c b/arch/arm/mach-s5pc1xx/cache.c
index 7816ba1177..b390bdf827 100644
--- a/arch/arm/mach-s5pc1xx/cache.c
+++ b/arch/arm/mach-s5pc1xx/cache.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 
 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 void enable_caches(void)
diff --git a/arch/arm/mach-snapdragon/dram.c b/arch/arm/mach-snapdragon/dram.c
index 79eb19992d..2a161be137 100644
--- a/arch/arm/mach-snapdragon/dram.c
+++ b/arch/arm/mach-snapdragon/dram.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <part.h>
 #include <smem.h>
 #include <fdt_support.h>
 #include <asm/arch/dram.h>
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
index 9ba8fdd729..442d236255 100644
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
+++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include "pinctrl-snapdragon.h"
 
 struct msm_pinctrl_priv {
diff --git a/arch/arm/mach-socfpga/board.c b/arch/arm/mach-socfpga/board.c
index 7c8c05cc31..340abf9305 100644
--- a/arch/arm/mach-socfpga/board.c
+++ b/arch/arm/mach-socfpga/board.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/clock_manager.h>
 #include <asm/arch/misc.h>
diff --git a/arch/arm/mach-socfpga/clock_manager.c b/arch/arm/mach-socfpga/clock_manager.c
index dbb10ecb68..a4a97b6a0f 100644
--- a/arch/arm/mach-socfpga/clock_manager.c
+++ b/arch/arm/mach-socfpga/clock_manager.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <init.h>
 #include <wait_bit.h>
 #include <asm/io.h>
 #include <asm/arch/clock_manager.h>
@@ -61,7 +63,8 @@ int set_cpu_clk_info(void)
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int do_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_showclocks(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	cm_print_clock_quick_summary();
 	return 0;
diff --git a/arch/arm/mach-socfpga/clock_manager_agilex.c b/arch/arm/mach-socfpga/clock_manager_agilex.c
index 4ee2b7b4bb..6188a8c3d2 100644
--- a/arch/arm/mach-socfpga/clock_manager_agilex.c
+++ b/arch/arm/mach-socfpga/clock_manager_agilex.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/clock_manager.h>
 #include <asm/arch/system_manager.h>
diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c b/arch/arm/mach-socfpga/clock_manager_arria10.c
index d7c8eaf47d..58d5d3fd8a 100644
--- a/arch/arm/mach-socfpga/clock_manager_arria10.c
+++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
@@ -11,6 +11,7 @@
 #include <clk.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock_manager.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_SPL_BUILD
 
diff --git a/arch/arm/mach-socfpga/freeze_controller.c b/arch/arm/mach-socfpga/freeze_controller.c
index d48aeec374..561d3408cd 100644
--- a/arch/arm/mach-socfpga/freeze_controller.c
+++ b/arch/arm/mach-socfpga/freeze_controller.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock_manager.h>
 #include <asm/arch/freeze_controller.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 
 static const struct socfpga_freeze_controller *freeze_controller_base =
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager.h b/arch/arm/mach-socfpga/include/mach/clock_manager.h
index c6830582a5..1f734bcd65 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager.h
@@ -8,7 +8,7 @@
 
 phys_addr_t socfpga_get_clkmgr_addr(void);
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 void cm_wait_for_lock(u32 mask);
 int cm_wait_for_fsm(void);
 void cm_print_clock_quick_summary(void);
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
index 23f280df1b..11ddee5cb6 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h
@@ -6,7 +6,9 @@
 #ifndef CLOCK_MANAGER_ARRIA10
 #define CLOCK_MANAGER_ARRIA10
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
 
 /* Clock manager group */
 #define CLKMGR_A10_CTRL				0x00
@@ -64,12 +66,13 @@
 int cm_basic_init(const void *blob);
 #endif
 
+#include <linux/bitops.h>
 unsigned int cm_get_l4_sp_clk_hz(void);
 unsigned long cm_get_mpu_clk_hz(void);
 
 unsigned int cm_get_qspi_controller_clk_hz(void);
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #define LOCKED_MASK	(CLKMGR_CLKMGR_STAT_MAINPLLLOCKED_SET_MSK | \
 			 CLKMGR_CLKMGR_STAT_PERPLLLOCKED_SET_MSK)
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
index 08655094ca..5c9abe619b 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h
@@ -6,7 +6,9 @@
 #ifndef _CLOCK_MANAGER_GEN5_H_
 #define _CLOCK_MANAGER_GEN5_H_
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
+
+#include <linux/bitops.h>
 
 struct cm_config {
 	/* main group */
@@ -107,8 +109,9 @@ const unsigned int cm_get_f2s_sdr_ref_clk_hz(void);
 /* Clock configuration accessors */
 int cm_basic_init(const struct cm_config * const cfg);
 const struct cm_config * const cm_get_default_config(void);
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
+#include <linux/bitops.h>
 #define LOCKED_MASK \
 	(CLKMGR_INTER_SDRPLLLOCKED_MASK  | \
 	CLKMGR_INTER_PERPLLLOCKED_MASK  | \
diff --git a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
index 9d2b3babab..cb7923baef 100644
--- a/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/clock_manager_s10.h
@@ -8,6 +8,7 @@
 #define	_CLOCK_MANAGER_S10_
 
 #include <asm/arch/clock_manager_soc64.h>
+#include <linux/bitops.h>
 
 /* Clock speed accessors */
 unsigned long cm_get_mpu_clk_hz(void);
diff --git a/arch/arm/mach-socfpga/include/mach/firewall.h b/arch/arm/mach-socfpga/include/mach/firewall.h
index 430341bea1..adab65bc96 100644
--- a/arch/arm/mach-socfpga/include/mach/firewall.h
+++ b/arch/arm/mach-socfpga/include/mach/firewall.h
@@ -7,6 +7,8 @@
 #ifndef	_FIREWALL_H_
 #define	_FIREWALL_H_
 
+#include <linux/bitops.h>
+
 struct socfpga_firwall_l4_per {
 	u32	nand;		/* 0x00 */
 	u32	nand_data;
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 62249b3695..048708202c 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -7,6 +7,7 @@
 #include <asm/cache.h>
 #include <altera.h>
 #include <image.h>
+#include <linux/bitops.h>
 
 #ifndef _FPGA_MANAGER_ARRIA10_H_
 #define _FPGA_MANAGER_ARRIA10_H_
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
index c8ec5d4c3c..e08c005628 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_gen5.h
@@ -7,6 +7,7 @@
 #ifndef _FPGA_MANAGER_GEN5_H_
 #define _FPGA_MANAGER_GEN5_H_
 
+#include <linux/bitops.h>
 #define FPGAMGRREGS_STAT_MODE_MASK		0x7
 #define FPGAMGRREGS_STAT_MSEL_MASK		0xf8
 #define FPGAMGRREGS_STAT_MSEL_LSB		3
diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
index ae728a5df5..55707ab9c5 100644
--- a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
+++ b/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
@@ -8,6 +8,7 @@
 #define _MAILBOX_S10_H_
 
 /* user define Uboot ID */
+#include <linux/bitops.h>
 #define MBOX_CLIENT_ID_UBOOT	0xB
 #define MBOX_ID_UBOOT		0x1
 
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
index 22e4eb33de..19507c292d 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_arria10.h
@@ -7,6 +7,7 @@
 #define _RESET_MANAGER_ARRIA10_H_
 
 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
+#include <linux/bitops.h>
 
 void socfpga_watchdog_disable(void);
 void socfpga_reset_deassert_noc_ddr_scheduler(void);
diff --git a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
index 25b82fb285..ff05994ccc 100644
--- a/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/sdram_arria10.h
@@ -7,6 +7,7 @@
 #define _SOCFPGA_SDRAM_ARRIA10_H_
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 int ddr_calibration_sequence(void);
 
 struct socfpga_ecc_hmc {
@@ -205,7 +206,7 @@ struct socfpga_io48_mmr {
 	u32 niosreserve2;
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 
 #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_MASK		0x1F000000
 #define IO48_MMR_CTRLCFG0_DB2_BURST_LENGTH_SHIFT	24
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager.h b/arch/arm/mach-socfpga/include/mach/system_manager.h
index 6de0a08131..f816954717 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager.h
@@ -94,5 +94,6 @@ phys_addr_t socfpga_get_sysmgr_addr(void);
 
 #define SYSMGR_GET_BOOTINFO_BSEL(bsel)		\
 		(((bsel) >> SYSMGR_BOOTINFO_BSEL_SHIFT) & 7)
+#include <linux/bitops.h>
 #endif
 #endif /* _SYSTEM_MANAGER_H_ */
diff --git a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
index 3a6c9515c6..c90f63a754 100644
--- a/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/system_manager_soc64.h
@@ -6,6 +6,7 @@
 #ifndef _SYSTEM_MANAGER_SOC64_H_
 #define _SYSTEM_MANAGER_SOC64_H_
 
+#include <linux/bitops.h>
 void sysmgr_pinmux_init(void);
 void populate_sysmgr_fpgaintf_module(void);
 void populate_sysmgr_pinmux(void);
diff --git a/arch/arm/mach-socfpga/misc.c b/arch/arm/mach-socfpga/misc.c
index 2901b7db68..ac2b891fad 100644
--- a/arch/arm/mach-socfpga/misc.c
+++ b/arch/arm/mach-socfpga/misc.c
@@ -4,8 +4,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <fdtdec.h>
@@ -176,7 +179,8 @@ int arch_cpu_init(void)
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int do_bridge(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bridge(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	unsigned int mask = ~0;
 
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index d56349b7f3..bf978053ca 100644
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <miiphy.h>
 #include <netdev.h>
 #include <ns16550.h>
diff --git a/arch/arm/mach-socfpga/misc_gen5.c b/arch/arm/mach-socfpga/misc_gen5.c
index 21eb934e56..7209e8d6db 100644
--- a/arch/arm/mach-socfpga/misc_gen5.c
+++ b/arch/arm/mach-socfpga/misc_gen5.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/io.h>
 #include <env.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <altera.h>
 #include <miiphy.h>
diff --git a/arch/arm/mach-socfpga/misc_s10.c b/arch/arm/mach-socfpga/misc_s10.c
index a3f5b4364e..ccff78a230 100644
--- a/arch/arm/mach-socfpga/misc_s10.c
+++ b/arch/arm/mach-socfpga/misc_s10.c
@@ -9,6 +9,8 @@
 #include <env.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <miiphy.h>
 #include <netdev.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-socfpga/pinmux_arria10.c b/arch/arm/mach-socfpga/pinmux_arria10.c
index 163bf278b1..f378fce7f0 100644
--- a/arch/arm/mach-socfpga/pinmux_arria10.c
+++ b/arch/arm/mach-socfpga/pinmux_arria10.c
@@ -3,6 +3,7 @@
  *  Copyright (C) 2016-2017 Intel Corporation <www.intel.com>
  */
 
+#include <log.h>
 #include <asm/arch/pinmux.h>
 #include <asm/io.h>
 #include <common.h>
diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c
index 1008a78dc8..a65860ef02 100644
--- a/arch/arm/mach-socfpga/reset_manager_gen5.c
+++ b/arch/arm/mach-socfpga/reset_manager_gen5.c
@@ -9,6 +9,7 @@
 #include <asm/arch/fpga_manager.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/system_manager.h>
+#include <linux/bitops.h>
 
 /* Assert or de-assert SoCFPGA reset manager reset. */
 void socfpga_per_reset(u32 reset, int set)
diff --git a/arch/arm/mach-socfpga/scan_manager.c b/arch/arm/mach-socfpga/scan_manager.c
index f7ee28915e..36d6880141 100644
--- a/arch/arm/mach-socfpga/scan_manager.c
+++ b/arch/arm/mach-socfpga/scan_manager.c
@@ -9,6 +9,7 @@
 #include <asm/arch/freeze_controller.h>
 #include <asm/arch/scan_manager.h>
 #include <asm/arch/system_manager.h>
+#include <linux/delay.h>
 
 /*
  * Maximum polling loop to wait for IO scan chain engine becomes idle
diff --git a/arch/arm/mach-socfpga/spl_a10.c b/arch/arm/mach-socfpga/spl_a10.c
index d2f52f2f2c..45aea4ab6c 100644
--- a/arch/arm/mach-socfpga/spl_a10.c
+++ b/arch/arm/mach-socfpga/spl_a10.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/pl310.h>
 #include <asm/u-boot.h>
diff --git a/arch/arm/mach-socfpga/spl_agilex.c b/arch/arm/mach-socfpga/spl_agilex.c
index aa9f3e646c..bd971ecbd1 100644
--- a/arch/arm/mach-socfpga/spl_agilex.c
+++ b/arch/arm/mach-socfpga/spl_agilex.c
@@ -4,6 +4,8 @@
  *
  */
 
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
diff --git a/arch/arm/mach-socfpga/spl_gen5.c b/arch/arm/mach-socfpga/spl_gen5.c
index e9967ac450..5a7c5ef76d 100644
--- a/arch/arm/mach-socfpga/spl_gen5.c
+++ b/arch/arm/mach-socfpga/spl_gen5.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
@@ -22,6 +24,7 @@
 #include <fdtdec.h>
 #include <watchdog.h>
 #include <dm/uclass.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-socfpga/spl_s10.c b/arch/arm/mach-socfpga/spl_s10.c
index 08427dd83e..b3c6f6afc4 100644
--- a/arch/arm/mach-socfpga/spl_s10.c
+++ b/arch/arm/mach-socfpga/spl_s10.c
@@ -5,6 +5,8 @@
  */
 
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/u-boot.h>
 #include <asm/utils.h>
diff --git a/arch/arm/mach-socfpga/timer.c b/arch/arm/mach-socfpga/timer.c
index f1c0262ae5..a58f1cf9d3 100644
--- a/arch/arm/mach-socfpga/timer.c
+++ b/arch/arm/mach-socfpga/timer.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/timer.h>
 
diff --git a/arch/arm/mach-socfpga/timer_s10.c b/arch/arm/mach-socfpga/timer_s10.c
index 57237892c3..3ad98bdb25 100644
--- a/arch/arm/mach-socfpga/timer_s10.c
+++ b/arch/arm/mach-socfpga/timer_s10.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/timer.h>
 
diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig
index cea5ee2ce5..b42b05669a 100644
--- a/arch/arm/mach-stm32/Kconfig
+++ b/arch/arm/mach-stm32/Kconfig
@@ -1,4 +1,4 @@
-if STM32
+if ARCH_STM32
 
 config STM32F4
 	bool "stm32f4 family"
diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
index 41338a1a33..1f12da401c 100644
--- a/arch/arm/mach-stm32/soc.c
+++ b/arch/arm/mach-stm32/soc.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/armv7_mpu.h>
 
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index ba965e7b3b..6c995ed8d8 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -86,16 +86,6 @@ config TARGET_DH_STM32MP1_PDK2
 
 endchoice
 
-config STM32MP1_OPTEE
-	bool "Support trusted boot with TF-A and OP-TEE"
-	depends on TFABOOT
-	default n
-	help
-		Say Y here to enable boot with TF-A and OP-TEE
-		Trusted boot chain is :
-		BootRom => TF-A.stm32 (clock & DDR) => OP-TEE => U-Boot.stm32
-		OP-TEE monitor provides ST SMC to access to secure resources
-
 config SYS_TEXT_BASE
 	default 0xC0100000
 
@@ -117,15 +107,30 @@ config STM32_ETZPC
 	help
 	  Say y to enable STM32 Extended TrustZone Protection
 
+config CMD_STM32PROG
+	bool "command stm32prog for STM32CudeProgrammer"
+	select DFU
+	select DFU_RAM
+	select DFU_VIRT
+	select PARTITION_TYPE_GUID
+	imply CMD_GPT if MMC
+	imply CMD_MTD if MTD
+	imply DFU_MMC if MMC
+	imply DFU_MTD if MTD
+	help
+		activate a specific command stm32prog for STM32MP soc family
+		witch update the device with the tools STM32CubeProgrammer,
+		using UART with STM32 protocol or USB with DFU protocol
+		NB: access to not volatile memory (NOR/NAND/SD/eMMC) is based
+		    on U-Boot DFU framework
+
 config CMD_STM32KEY
 	bool "command stm32key to fuse public key hash"
 	default y
-	depends on CMD_FUSE
 	help
 		fuse public key hash in corresponding fuse used to authenticate
 		binary.
 
-
 config PRE_CON_BUF_ADDR
 	default 0xC02FF000
 
diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile
index eee39c27c3..66bb8cf92f 100644
--- a/arch/arm/mach-stm32mp/Makefile
+++ b/arch/arm/mach-stm32mp/Makefile
@@ -10,9 +10,11 @@ obj-y += syscon.o
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
 else
+obj-$(CONFIG_CMD_STM32PROG) += cmd_stm32prog/
 obj-y += bsec.o
 obj-$(CONFIG_CMD_STM32KEY) += cmd_stm32key.o
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
+obj-$(CONFIG_TFABOOT) += boot_params.o
 endif
 
 obj-$(CONFIG_$(SPL_)DM_REGULATOR) += pwr_regulator.o
diff --git a/arch/arm/mach-stm32mp/boot_params.c b/arch/arm/mach-stm32mp/boot_params.c
new file mode 100644
index 0000000000..37ee9e1612
--- /dev/null
+++ b/arch/arm/mach-stm32mp/boot_params.c
@@ -0,0 +1,46 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2019, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <log.h>
+#include <asm/sections.h>
+#include <asm/system.h>
+
+/*
+ * Force data-section, as .bss will not be valid
+ * when save_boot_params is invoked.
+ */
+static unsigned long nt_fw_dtb __section(".data");
+
+/*
+ * Save the FDT address provided by TF-A in r2 at boot time
+ * This function is called from start.S
+ */
+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
+		      unsigned long r3)
+{
+	nt_fw_dtb = r2;
+
+	save_boot_params_ret();
+}
+
+/*
+ * Use the saved FDT address provided by TF-A at boot time (NT_FW_CONFIG =
+ * Non Trusted Firmware configuration file) when the pointer is valid
+ */
+void *board_fdt_blob_setup(void)
+{
+	debug("%s: nt_fw_dtb=%lx\n", __func__, nt_fw_dtb);
+
+	/* use external device tree only if address is valid */
+	if (nt_fw_dtb >= STM32_DDR_BASE) {
+		if (fdt_magic(nt_fw_dtb) == FDT_MAGIC)
+			return (void *)nt_fw_dtb;
+		debug("%s: DTB not found.\n", __func__);
+	}
+	debug("%s: fall back to builtin DTB, %p\n", __func__, &_end);
+
+	return (void *)&_end;
+}
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index 0d5850b4a9..fc39230113 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <misc.h>
 #include <asm/io.h>
 #include <asm/arch/stm32mp1_smc.h>
diff --git a/arch/arm/mach-stm32mp/cmd_stm32key.c b/arch/arm/mach-stm32mp/cmd_stm32key.c
index f1f26e7c94..f191085a12 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32key.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32key.c
@@ -66,8 +66,8 @@ static int confirm_prog(void)
 	return 0;
 }
 
-static int do_stm32key(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_stm32key(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	u32 addr;
 	const char *op = argc >= 2 ? argv[1] : NULL;
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Makefile b/arch/arm/mach-stm32mp/cmd_stm32prog/Makefile
new file mode 100644
index 0000000000..548a378921
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Makefile
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+#
+
+obj-y += cmd_stm32prog.o
+obj-y += stm32prog.o
+obj-y += stm32prog_serial.o
+obj-y += stm32prog_usb.o
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
new file mode 100644
index 0000000000..0722e4a891
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -0,0 +1,192 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <command.h>
+#include <dfu.h>
+#include <image.h>
+#include <asm/arch/stm32prog.h>
+#include "stm32prog.h"
+
+struct stm32prog_data *stm32prog_data;
+
+static void enable_vidconsole(void)
+{
+#ifdef CONFIG_DM_VIDEO
+	char *stdname;
+	char buf[64];
+
+	stdname = env_get("stdout");
+	if (!stdname || !strstr(stdname, "vidconsole")) {
+		if (!stdname)
+			snprintf(buf, sizeof(buf), "serial,vidconsole");
+		else
+			snprintf(buf, sizeof(buf), "%s,vidconsole", stdname);
+		env_set("stdout", buf);
+	}
+
+	stdname = env_get("stderr");
+	if (!stdname || !strstr(stdname, "vidconsole")) {
+		if (!stdname)
+			snprintf(buf, sizeof(buf), "serial,vidconsole");
+		else
+			snprintf(buf, sizeof(buf), "%s,vidconsole", stdname);
+		env_set("stderr", buf);
+	}
+#endif
+}
+
+static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, int argc,
+			char * const argv[])
+{
+	ulong	addr, size;
+	int dev, ret;
+	enum stm32prog_link_t link = LINK_UNDEFINED;
+	bool reset = false;
+	struct image_header_s header;
+	struct stm32prog_data *data;
+	u32 uimage, dtb;
+
+	if (argc < 3 ||  argc > 5)
+		return CMD_RET_USAGE;
+
+	if (!strcmp(argv[1], "usb"))
+		link = LINK_USB;
+	else if (!strcmp(argv[1], "serial"))
+		link = LINK_SERIAL;
+
+	if (link == LINK_UNDEFINED) {
+		pr_err("not supported link=%s\n", argv[1]);
+		return CMD_RET_USAGE;
+	}
+
+	dev = (int)simple_strtoul(argv[2], NULL, 10);
+
+	addr = STM32_DDR_BASE;
+	size = 0;
+	if (argc > 3) {
+		addr = simple_strtoul(argv[3], NULL, 16);
+		if (!addr)
+			return CMD_RET_FAILURE;
+	}
+	if (argc > 4)
+		size = simple_strtoul(argv[4], NULL, 16);
+
+	/* check STM32IMAGE presence */
+	if (size == 0 &&
+	    !stm32prog_header_check((struct raw_header_s *)addr, &header)) {
+		size = header.image_length + BL_HEADER_SIZE;
+
+		/* uImage detected in STM32IMAGE, execute the script */
+		if (IMAGE_FORMAT_LEGACY ==
+		    genimg_get_format((void *)(addr + BL_HEADER_SIZE)))
+			return image_source_script(addr + BL_HEADER_SIZE,
+						   "script@1");
+	}
+
+	enable_vidconsole();
+
+	data = (struct stm32prog_data *)malloc(sizeof(*data));
+
+	if (!data) {
+		pr_err("Alloc failed.");
+		return CMD_RET_FAILURE;
+	}
+	stm32prog_data = data;
+
+	ret = stm32prog_init(data, addr, size);
+	if (ret)
+		printf("Invalid or missing layout file.");
+
+	/* prepare DFU for device read/write */
+	ret = stm32prog_dfu_init(data);
+	if (ret)
+		goto cleanup;
+
+	switch (link) {
+	case LINK_SERIAL:
+		ret = stm32prog_serial_init(data, dev);
+		if (ret)
+			goto cleanup;
+		reset = stm32prog_serial_loop(data);
+		break;
+	case LINK_USB:
+		reset = stm32prog_usb_loop(data, dev);
+		break;
+	default:
+		goto cleanup;
+	}
+
+	uimage = data->uimage;
+	dtb = data->dtb;
+
+	stm32prog_clean(data);
+	free(stm32prog_data);
+	stm32prog_data = NULL;
+
+	puts("Download done\n");
+
+	if (uimage) {
+		char boot_addr_start[20];
+		char dtb_addr[20];
+		char *bootm_argv[5] = {
+			"bootm", boot_addr_start, "-", dtb_addr, NULL
+		};
+		if (!dtb)
+			bootm_argv[3] = env_get("fdtcontroladdr");
+		else
+			snprintf(dtb_addr, sizeof(dtb_addr) - 1,
+				 "0x%x", dtb);
+
+		snprintf(boot_addr_start, sizeof(boot_addr_start) - 1,
+			 "0x%x", uimage);
+		printf("Booting kernel at %s - %s...\n\n\n",
+		       boot_addr_start, bootm_argv[3]);
+		/* Try bootm for legacy and FIT format image */
+		if (genimg_get_format((void *)uimage) != IMAGE_FORMAT_INVALID)
+			do_bootm(cmdtp, 0, 4, bootm_argv);
+		else if CONFIG_IS_ENABLED(CMD_BOOTZ)
+			do_bootz(cmdtp, 0, 4, bootm_argv);
+	}
+
+	if (reset) {
+		puts("Reset...\n");
+		run_command("reset", 0);
+	}
+
+	return CMD_RET_SUCCESS;
+
+cleanup:
+	stm32prog_clean(data);
+	free(stm32prog_data);
+	stm32prog_data = NULL;
+
+	return CMD_RET_FAILURE;
+}
+
+U_BOOT_CMD(stm32prog, 5, 0, do_stm32prog,
+	   "<link> <dev> [<addr>] [<size>]\n"
+	   "start communication with tools STM32Cubeprogrammer on <link> with Flashlayout at <addr>",
+	   "<link> = serial|usb\n"
+	   "<dev>  = device instance\n"
+	   "<addr> = address of flashlayout\n"
+	   "<size> = size of flashlayout\n"
+);
+
+bool stm32prog_get_tee_partitions(void)
+{
+	if (stm32prog_data)
+		return stm32prog_data->tee_detected;
+
+	return false;
+}
+
+bool stm32prog_get_fsbl_nor(void)
+{
+	if (stm32prog_data)
+		return stm32prog_data->fsbl_nor_detected;
+
+	return false;
+}
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
new file mode 100644
index 0000000000..c5b8841b23
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.c
@@ -0,0 +1,1745 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <command.h>
+#include <console.h>
+#include <dfu.h>
+#include <malloc.h>
+#include <misc.h>
+#include <mmc.h>
+#include <part.h>
+#include <asm/arch/stm32mp1_smc.h>
+#include <dm/uclass.h>
+#include <jffs2/load_kernel.h>
+#include <linux/list.h>
+#include <linux/list_sort.h>
+#include <linux/mtd/mtd.h>
+#include <linux/sizes.h>
+
+#include "stm32prog.h"
+
+/* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
+#define GPT_HEADER_SZ	34
+
+#define OPT_SELECT	BIT(0)
+#define OPT_EMPTY	BIT(1)
+#define OPT_DELETE	BIT(2)
+
+#define IS_SELECT(part)	((part)->option & OPT_SELECT)
+#define IS_EMPTY(part)	((part)->option & OPT_EMPTY)
+#define IS_DELETE(part)	((part)->option & OPT_DELETE)
+
+#define ALT_BUF_LEN			SZ_1K
+
+#define ROOTFS_MMC0_UUID \
+	EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
+		 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
+
+#define ROOTFS_MMC1_UUID \
+	EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
+		 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
+
+#define ROOTFS_MMC2_UUID \
+	EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
+		 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
+
+/* RAW parttion (binary / bootloader) used Linux - reserved UUID */
+#define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
+
+/*
+ * unique partition guid (uuid) for partition named "rootfs"
+ * on each MMC instance = SD Card or eMMC
+ * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
+ */
+static const efi_guid_t uuid_mmc[3] = {
+	ROOTFS_MMC0_UUID,
+	ROOTFS_MMC1_UUID,
+	ROOTFS_MMC2_UUID
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* order of column in flash layout file */
+enum stm32prog_col_t {
+	COL_OPTION,
+	COL_ID,
+	COL_NAME,
+	COL_TYPE,
+	COL_IP,
+	COL_OFFSET,
+	COL_NB_STM32
+};
+
+/* partition handling routines : CONFIG_CMD_MTDPARTS */
+int mtdparts_init(void);
+int find_dev_and_part(const char *id, struct mtd_device **dev,
+		      u8 *part_num, struct part_info **part);
+
+char *stm32prog_get_error(struct stm32prog_data *data)
+{
+	static const char error_msg[] = "Unspecified";
+
+	if (strlen(data->error) == 0)
+		strcpy(data->error, error_msg);
+
+	return data->error;
+}
+
+u8 stm32prog_header_check(struct raw_header_s *raw_header,
+			  struct image_header_s *header)
+{
+	unsigned int i;
+
+	header->present = 0;
+	header->image_checksum = 0x0;
+	header->image_length = 0x0;
+
+	if (!raw_header || !header) {
+		pr_debug("%s:no header data\n", __func__);
+		return -1;
+	}
+	if (raw_header->magic_number !=
+		(('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
+		pr_debug("%s:invalid magic number : 0x%x\n",
+			 __func__, raw_header->magic_number);
+		return -2;
+	}
+	/* only header v1.0 supported */
+	if (raw_header->header_version != 0x00010000) {
+		pr_debug("%s:invalid header version : 0x%x\n",
+			 __func__, raw_header->header_version);
+		return -3;
+	}
+	if (raw_header->reserved1 != 0x0 || raw_header->reserved2) {
+		pr_debug("%s:invalid reserved field\n", __func__);
+		return -4;
+	}
+	for (i = 0; i < (sizeof(raw_header->padding) / 4); i++) {
+		if (raw_header->padding[i] != 0) {
+			pr_debug("%s:invalid padding field\n", __func__);
+			return -5;
+		}
+	}
+	header->present = 1;
+	header->image_checksum = le32_to_cpu(raw_header->image_checksum);
+	header->image_length = le32_to_cpu(raw_header->image_length);
+
+	return 0;
+}
+
+static u32 stm32prog_header_checksum(u32 addr, struct image_header_s *header)
+{
+	u32 i, checksum;
+	u8 *payload;
+
+	/* compute checksum on payload */
+	payload = (u8 *)addr;
+	checksum = 0;
+	for (i = header->image_length; i > 0; i--)
+		checksum += *(payload++);
+
+	return checksum;
+}
+
+/* FLASHLAYOUT PARSING *****************************************/
+static int parse_option(struct stm32prog_data *data,
+			int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+	char *c = p;
+
+	part->option = 0;
+	if (!strcmp(p, "-"))
+		return 0;
+
+	while (*c) {
+		switch (*c) {
+		case 'P':
+			part->option |= OPT_SELECT;
+			break;
+		case 'E':
+			part->option |= OPT_EMPTY;
+			break;
+		case 'D':
+			part->option |= OPT_DELETE;
+			break;
+		default:
+			result = -EINVAL;
+			stm32prog_err("Layout line %d: invalid option '%c' in %s)",
+				      i, *c, p);
+			return -EINVAL;
+		}
+		c++;
+	}
+	if (!(part->option & OPT_SELECT)) {
+		stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
+		return -EINVAL;
+	}
+
+	return result;
+}
+
+static int parse_id(struct stm32prog_data *data,
+		    int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+	unsigned long value;
+
+	result = strict_strtoul(p, 0, &value);
+	part->id = value;
+	if (result || value > PHASE_LAST_USER) {
+		stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
+		result = -EINVAL;
+	}
+
+	return result;
+}
+
+static int parse_name(struct stm32prog_data *data,
+		      int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+
+	if (strlen(p) < sizeof(part->name)) {
+		strcpy(part->name, p);
+	} else {
+		stm32prog_err("Layout line %d: partition name too long [%d]: %s",
+			      i, strlen(p), p);
+		result = -EINVAL;
+	}
+
+	return result;
+}
+
+static int parse_type(struct stm32prog_data *data,
+		      int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+	int len = 0;
+
+	part->bin_nb = 0;
+	if (!strncmp(p, "Binary", 6)) {
+		part->part_type = PART_BINARY;
+
+		/* search for Binary(X) case */
+		len = strlen(p);
+		part->bin_nb = 1;
+		if (len > 6) {
+			if (len < 8 ||
+			    (p[6] != '(') ||
+			    (p[len - 1] != ')'))
+				result = -EINVAL;
+			else
+				part->bin_nb =
+					simple_strtoul(&p[7], NULL, 10);
+		}
+	} else if (!strcmp(p, "System")) {
+		part->part_type = PART_SYSTEM;
+	} else if (!strcmp(p, "FileSystem")) {
+		part->part_type = PART_FILESYSTEM;
+	} else if (!strcmp(p, "RawImage")) {
+		part->part_type = RAW_IMAGE;
+	} else {
+		result = -EINVAL;
+	}
+	if (result)
+		stm32prog_err("Layout line %d: type parsing error : '%s'",
+			      i, p);
+
+	return result;
+}
+
+static int parse_ip(struct stm32prog_data *data,
+		    int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+	unsigned int len = 0;
+
+	part->dev_id = 0;
+	if (!strcmp(p, "none")) {
+		part->target = STM32PROG_NONE;
+	} else if (!strncmp(p, "mmc", 3)) {
+		part->target = STM32PROG_MMC;
+		len = 3;
+	} else if (!strncmp(p, "nor", 3)) {
+		part->target = STM32PROG_NOR;
+		len = 3;
+	} else if (!strncmp(p, "nand", 4)) {
+		part->target = STM32PROG_NAND;
+		len = 4;
+	} else if (!strncmp(p, "spi-nand", 8)) {
+		part->target = STM32PROG_SPI_NAND;
+		len = 8;
+	} else if (!strncmp(p, "ram", 3)) {
+		part->target = STM32PROG_RAM;
+		len = 0;
+	} else {
+		result = -EINVAL;
+	}
+	if (len) {
+		/* only one digit allowed for device id */
+		if (strlen(p) != len + 1) {
+			result = -EINVAL;
+		} else {
+			part->dev_id = p[len] - '0';
+			if (part->dev_id > 9)
+				result = -EINVAL;
+		}
+	}
+	if (result)
+		stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
+
+	return result;
+}
+
+static int parse_offset(struct stm32prog_data *data,
+			int i, char *p, struct stm32prog_part_t *part)
+{
+	int result = 0;
+	char *tail;
+
+	part->part_id = 0;
+	part->addr = 0;
+	part->size = 0;
+	/* eMMC boot parttion */
+	if (!strncmp(p, "boot", 4)) {
+		if (strlen(p) != 5) {
+			result = -EINVAL;
+		} else {
+			if (p[4] == '1')
+				part->part_id = -1;
+			else if (p[4] == '2')
+				part->part_id = -2;
+			else
+				result = -EINVAL;
+		}
+		if (result)
+			stm32prog_err("Layout line %d: invalid part '%s'",
+				      i, p);
+	} else {
+		part->addr = simple_strtoull(p, &tail, 0);
+		if (tail == p || *tail != '\0') {
+			stm32prog_err("Layout line %d: invalid offset '%s'",
+				      i, p);
+			result = -EINVAL;
+		}
+	}
+
+	return result;
+}
+
+static
+int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
+				  struct stm32prog_part_t *part) = {
+	[COL_OPTION] = parse_option,
+	[COL_ID] = parse_id,
+	[COL_NAME] =  parse_name,
+	[COL_TYPE] = parse_type,
+	[COL_IP] = parse_ip,
+	[COL_OFFSET] = parse_offset,
+};
+
+static int parse_flash_layout(struct stm32prog_data *data,
+			      ulong addr,
+			      ulong size)
+{
+	int column = 0, part_nb = 0, ret;
+	bool end_of_line, eof;
+	char *p, *start, *last, *col;
+	struct stm32prog_part_t *part;
+	int part_list_size;
+	int i;
+
+	data->part_nb = 0;
+
+	/* check if STM32image is detected */
+	if (!stm32prog_header_check((struct raw_header_s *)addr,
+				    &data->header)) {
+		u32 checksum;
+
+		addr = addr + BL_HEADER_SIZE;
+		size = data->header.image_length;
+
+		checksum = stm32prog_header_checksum(addr, &data->header);
+		if (checksum != data->header.image_checksum) {
+			stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
+				      checksum, data->header.image_checksum);
+			return -EIO;
+		}
+	}
+	if (!size)
+		return -EINVAL;
+
+	start = (char *)addr;
+	last = start + size;
+
+	*last = 0x0; /* force null terminated string */
+	pr_debug("flash layout =\n%s\n", start);
+
+	/* calculate expected number of partitions */
+	part_list_size = 1;
+	p = start;
+	while (*p && (p < last)) {
+		if (*p++ == '\n') {
+			part_list_size++;
+			if (p < last && *p == '#')
+				part_list_size--;
+		}
+	}
+	if (part_list_size > PHASE_LAST_USER) {
+		stm32prog_err("Layout: too many partition (%d)",
+			      part_list_size);
+		return -1;
+	}
+	part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
+	if (!part) {
+		stm32prog_err("Layout: alloc failed");
+		return -ENOMEM;
+	}
+	data->part_array = part;
+
+	/* main parsing loop */
+	i = 1;
+	eof = false;
+	p = start;
+	col = start; /* 1st column */
+	end_of_line = false;
+	while (!eof) {
+		switch (*p) {
+		/* CR is ignored and replaced by NULL character */
+		case '\r':
+			*p = '\0';
+			p++;
+			continue;
+		case '\0':
+			end_of_line = true;
+			eof = true;
+			break;
+		case '\n':
+			end_of_line = true;
+			break;
+		case '\t':
+			break;
+		case '#':
+			/* comment line is skipped */
+			if (column == 0 && p == col) {
+				while ((p < last) && *p)
+					if (*p++ == '\n')
+						break;
+				col = p;
+				i++;
+				if (p >= last || !*p) {
+					eof = true;
+					end_of_line = true;
+				}
+				continue;
+			}
+			/* fall through */
+		/* by default continue with the next character */
+		default:
+			p++;
+			continue;
+		}
+
+		/* replace by \0: allow string parsing for each column */
+		*p = '\0';
+		p++;
+		if (p >= last) {
+			eof = true;
+			end_of_line = true;
+		}
+
+		/* skip empty line and multiple TAB in tsv file */
+		if (strlen(col) == 0) {
+			col = p;
+			/* skip empty line */
+			if (column == 0 && end_of_line) {
+				end_of_line = false;
+				i++;
+			}
+			continue;
+		}
+
+		if (column < COL_NB_STM32) {
+			ret = parse[column](data, i, col, part);
+			if (ret)
+				return ret;
+		}
+
+		/* save the beginning of the next column */
+		column++;
+		col = p;
+
+		if (!end_of_line)
+			continue;
+
+		/* end of the line detected */
+		end_of_line = false;
+
+		if (column < COL_NB_STM32) {
+			stm32prog_err("Layout line %d: no enought column", i);
+			return -EINVAL;
+		}
+		column = 0;
+		part_nb++;
+		part++;
+		i++;
+		if (part_nb >= part_list_size) {
+			part = NULL;
+			if (!eof) {
+				stm32prog_err("Layout: no enought memory for %d part",
+					      part_nb);
+				return -EINVAL;
+			}
+		}
+	}
+	data->part_nb = part_nb;
+	if (data->part_nb == 0) {
+		stm32prog_err("Layout: no partition found");
+		return -ENODEV;
+	}
+
+	return 0;
+}
+
+static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
+{
+	struct stm32prog_part_t *parta, *partb;
+
+	parta = container_of(a, struct stm32prog_part_t, list);
+	partb = container_of(b, struct stm32prog_part_t, list);
+
+	if (parta->part_id != partb->part_id)
+		return parta->part_id - partb->part_id;
+	else
+		return parta->addr > partb->addr ? 1 : -1;
+}
+
+static void get_mtd_by_target(char *string, enum stm32prog_target target,
+			      int dev_id)
+{
+	const char *dev_str;
+
+	switch (target) {
+	case STM32PROG_NOR:
+		dev_str = "nor";
+		break;
+	case STM32PROG_NAND:
+		dev_str = "nand";
+		break;
+	case STM32PROG_SPI_NAND:
+		dev_str = "spi-nand";
+		break;
+	default:
+		dev_str = "invalid";
+		break;
+	}
+	sprintf(string, "%s%d", dev_str, dev_id);
+}
+
+static int init_device(struct stm32prog_data *data,
+		       struct stm32prog_dev_t *dev)
+{
+	struct mmc *mmc = NULL;
+	struct blk_desc *block_dev = NULL;
+#ifdef CONFIG_MTD
+	struct mtd_info *mtd = NULL;
+	char mtd_id[16];
+#endif
+	int part_id;
+	int ret;
+	u64 first_addr = 0, last_addr = 0;
+	struct stm32prog_part_t *part, *next_part;
+	u64 part_addr, part_size;
+	bool part_found;
+	const char *part_name;
+
+	switch (dev->target) {
+#ifdef CONFIG_MMC
+	case STM32PROG_MMC:
+		mmc = find_mmc_device(dev->dev_id);
+		if (mmc_init(mmc)) {
+			stm32prog_err("mmc device %d not found", dev->dev_id);
+			return -ENODEV;
+		}
+		block_dev = mmc_get_blk_desc(mmc);
+		if (!block_dev) {
+			stm32prog_err("mmc device %d not probed", dev->dev_id);
+			return -ENODEV;
+		}
+		dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
+		dev->mmc = mmc;
+
+		/* reserve a full erase group for each GTP headers */
+		if (mmc->erase_grp_size > GPT_HEADER_SZ) {
+			first_addr = dev->erase_size;
+			last_addr = (u64)(block_dev->lba -
+					  mmc->erase_grp_size) *
+				    block_dev->blksz;
+		} else {
+			first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
+			last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
+				    block_dev->blksz;
+		}
+		pr_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
+			 block_dev->lba, block_dev->blksz);
+		pr_debug(" available address = 0x%llx..0x%llx\n",
+			 first_addr, last_addr);
+		pr_debug(" full_update = %d\n", dev->full_update);
+		break;
+#endif
+#ifdef CONFIG_MTD
+	case STM32PROG_NOR:
+	case STM32PROG_NAND:
+	case STM32PROG_SPI_NAND:
+		get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
+		pr_debug("%s\n", mtd_id);
+
+		mtdparts_init();
+		mtd = get_mtd_device_nm(mtd_id);
+		if (IS_ERR(mtd)) {
+			stm32prog_err("MTD device %s not found", mtd_id);
+			return -ENODEV;
+		}
+		first_addr = 0;
+		last_addr = mtd->size;
+		dev->erase_size = mtd->erasesize;
+		pr_debug("MTD device %s: size=%lld erasesize=%d\n",
+			 mtd_id, mtd->size, mtd->erasesize);
+		pr_debug(" available address = 0x%llx..0x%llx\n",
+			 first_addr, last_addr);
+		dev->mtd = mtd;
+		break;
+#endif
+	case STM32PROG_RAM:
+		first_addr = gd->bd->bi_dram[0].start;
+		last_addr = first_addr + gd->bd->bi_dram[0].size;
+		dev->erase_size = 1;
+		break;
+	default:
+		stm32prog_err("unknown device type = %d", dev->target);
+		return -ENODEV;
+	}
+	pr_debug(" erase size = 0x%x\n", dev->erase_size);
+	pr_debug(" full_update = %d\n", dev->full_update);
+
+	/* order partition list in offset order */
+	list_sort(NULL, &dev->part_list, &part_cmp);
+	part_id = 1;
+	pr_debug("id : Opt Phase     Name target.n dev.n addr     size     part_off part_size\n");
+	list_for_each_entry(part, &dev->part_list, list) {
+		if (part->bin_nb > 1) {
+			if ((dev->target != STM32PROG_NAND &&
+			     dev->target != STM32PROG_SPI_NAND) ||
+			    part->id >= PHASE_FIRST_USER ||
+			    strncmp(part->name, "fsbl", 4)) {
+				stm32prog_err("%s (0x%x): multiple binary %d not supported",
+					      part->name, part->id,
+					      part->bin_nb);
+				return -EINVAL;
+			}
+		}
+		if (part->part_type == RAW_IMAGE) {
+			part->part_id = 0x0;
+			part->addr = 0x0;
+			if (block_dev)
+				part->size = block_dev->lba * block_dev->blksz;
+			else
+				part->size = last_addr;
+			pr_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
+				 part->option, part->id, part->name,
+				 part->part_type, part->bin_nb, part->target,
+				 part->dev_id, part->addr, part->size);
+			continue;
+		}
+		if (part->part_id < 0) { /* boot hw partition for eMMC */
+			if (mmc) {
+				part->size = mmc->capacity_boot;
+			} else {
+				stm32prog_err("%s (0x%x): hw partition not expected : %d",
+					      part->name, part->id,
+					      part->part_id);
+				return -ENODEV;
+			}
+		} else {
+			part->part_id = part_id++;
+
+			/* last partition : size to the end of the device */
+			if (part->list.next != &dev->part_list) {
+				next_part =
+					container_of(part->list.next,
+						     struct stm32prog_part_t,
+						     list);
+				if (part->addr < next_part->addr) {
+					part->size = next_part->addr -
+						     part->addr;
+				} else {
+					stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
+						      part->name, part->id,
+						      part->addr,
+						      next_part->name,
+						      next_part->id,
+						      next_part->addr);
+					return -EINVAL;
+				}
+			} else {
+				if (part->addr <= last_addr) {
+					part->size = last_addr - part->addr;
+				} else {
+					stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
+						      part->name, part->id,
+						      part->addr, last_addr);
+					return -EINVAL;
+				}
+			}
+			if (part->addr < first_addr) {
+				stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
+					      part->name, part->id,
+					      part->addr, first_addr);
+				return -EINVAL;
+			}
+		}
+		if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
+			stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
+				      part->name, part->id, part->addr,
+				      part->dev->erase_size);
+			return -EINVAL;
+		}
+		pr_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
+			 part->part_id, part->option, part->id, part->name,
+			 part->part_type, part->bin_nb, part->target,
+			 part->dev_id, part->addr, part->size);
+
+		part_addr = 0;
+		part_size = 0;
+		part_found = false;
+
+		/* check coherency with existing partition */
+		if (block_dev) {
+			/*
+			 * block devices with GPT: check user partition size
+			 * only for partial update, the GPT partions are be
+			 * created for full update
+			 */
+			if (dev->full_update || part->part_id < 0) {
+				pr_debug("\n");
+				continue;
+			}
+			struct disk_partition partinfo;
+
+			ret = part_get_info(block_dev, part->part_id,
+					    &partinfo);
+
+			if (ret) {
+				stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
+					      part->name, part->id,
+					      part_id, part->dev_id);
+				return -ENODEV;
+			}
+			part_addr = (u64)partinfo.start * partinfo.blksz;
+			part_size = (u64)partinfo.size * partinfo.blksz;
+			part_name = (char *)partinfo.name;
+			part_found = true;
+		}
+
+#ifdef CONFIG_MTD
+		if (mtd) {
+			char mtd_part_id[32];
+			struct part_info *mtd_part;
+			struct mtd_device *mtd_dev;
+			u8 part_num;
+
+			sprintf(mtd_part_id, "%s,%d", mtd_id,
+				part->part_id - 1);
+			ret = find_dev_and_part(mtd_part_id, &mtd_dev,
+						&part_num, &mtd_part);
+			if (ret != 0) {
+				stm32prog_err("%s (0x%x): Invalid MTD partition %s",
+					      part->name, part->id,
+					      mtd_part_id);
+				return -ENODEV;
+			}
+			part_addr = mtd_part->offset;
+			part_size = mtd_part->size;
+			part_name = mtd_part->name;
+			part_found = true;
+		}
+#endif
+		if (!part_found) {
+			stm32prog_err("%s (0x%x): Invalid partition",
+				      part->name, part->id);
+			pr_debug("\n");
+			continue;
+		}
+
+		pr_debug(" %08llx %08llx\n", part_addr, part_size);
+
+		if (part->addr != part_addr) {
+			stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
+				      part->name, part->id, part->part_id,
+				      part_name, part->addr, part_addr);
+			return -ENODEV;
+		}
+		if (part->size != part_size) {
+			stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
+				      part->name, part->id, part->part_id,
+				      part_name, part->addr, part->size,
+				      part_size);
+			return -ENODEV;
+		}
+	}
+	return 0;
+}
+
+static int treat_partition_list(struct stm32prog_data *data)
+{
+	int i, j;
+	struct stm32prog_part_t *part;
+
+	for (j = 0; j < STM32PROG_MAX_DEV; j++) {
+		data->dev[j].target = STM32PROG_NONE;
+		INIT_LIST_HEAD(&data->dev[j].part_list);
+	}
+
+	data->tee_detected = false;
+	data->fsbl_nor_detected = false;
+	for (i = 0; i < data->part_nb; i++) {
+		part = &data->part_array[i];
+		part->alt_id = -1;
+
+		/* skip partition with IP="none" */
+		if (part->target == STM32PROG_NONE) {
+			if (IS_SELECT(part)) {
+				stm32prog_err("Layout: selected none phase = 0x%x",
+					      part->id);
+				return -EINVAL;
+			}
+			continue;
+		}
+
+		if (part->id == PHASE_FLASHLAYOUT ||
+		    part->id > PHASE_LAST_USER) {
+			stm32prog_err("Layout: invalid phase = 0x%x",
+				      part->id);
+			return -EINVAL;
+		}
+		for (j = i + 1; j < data->part_nb; j++) {
+			if (part->id == data->part_array[j].id) {
+				stm32prog_err("Layout: duplicated phase 0x%x at line %d and %d",
+					      part->id, i, j);
+				return -EINVAL;
+			}
+		}
+		for (j = 0; j < STM32PROG_MAX_DEV; j++) {
+			if (data->dev[j].target == STM32PROG_NONE) {
+				/* new device found */
+				data->dev[j].target = part->target;
+				data->dev[j].dev_id = part->dev_id;
+				data->dev[j].full_update = true;
+				data->dev_nb++;
+				break;
+			} else if ((part->target == data->dev[j].target) &&
+				   (part->dev_id == data->dev[j].dev_id)) {
+				break;
+			}
+		}
+		if (j == STM32PROG_MAX_DEV) {
+			stm32prog_err("Layout: too many device");
+			return -EINVAL;
+		}
+		switch (part->target)  {
+		case STM32PROG_NOR:
+			if (!data->fsbl_nor_detected &&
+			    !strncmp(part->name, "fsbl", 4))
+				data->fsbl_nor_detected = true;
+			/* fallthrough */
+		case STM32PROG_NAND:
+		case STM32PROG_SPI_NAND:
+			if (!data->tee_detected &&
+			    !strncmp(part->name, "tee", 3))
+				data->tee_detected = true;
+			break;
+		default:
+			break;
+		}
+		part->dev = &data->dev[j];
+		if (!IS_SELECT(part))
+			part->dev->full_update = false;
+		list_add_tail(&part->list, &data->dev[j].part_list);
+	}
+
+	return 0;
+}
+
+static int create_partitions(struct stm32prog_data *data)
+{
+#ifdef CONFIG_MMC
+	int offset = 0;
+	const int buflen = SZ_8K;
+	char *buf;
+	char uuid[UUID_STR_LEN + 1];
+	unsigned char *uuid_bin;
+	unsigned int mmc_id;
+	int i;
+	bool rootfs_found;
+	struct stm32prog_part_t *part;
+
+	buf = malloc(buflen);
+	if (!buf)
+		return -ENOMEM;
+
+	puts("partitions : ");
+	/* initialize the selected device */
+	for (i = 0; i < data->dev_nb; i++) {
+		/* create gpt partition support only for full update on MMC */
+		if (data->dev[i].target != STM32PROG_MMC ||
+		    !data->dev[i].full_update)
+			continue;
+
+		offset = 0;
+		rootfs_found = false;
+		memset(buf, 0, buflen);
+
+		list_for_each_entry(part, &data->dev[i].part_list, list) {
+			/* skip eMMC boot partitions */
+			if (part->part_id < 0)
+				continue;
+			/* skip Raw Image */
+			if (part->part_type == RAW_IMAGE)
+				continue;
+
+			if (offset + 100 > buflen) {
+				pr_debug("\n%s: buffer too small, %s skippped",
+					 __func__, part->name);
+				continue;
+			}
+
+			if (!offset)
+				offset += sprintf(buf, "gpt write mmc %d \"",
+						  data->dev[i].dev_id);
+
+			offset += snprintf(buf + offset, buflen - offset,
+					   "name=%s,start=0x%llx,size=0x%llx",
+					   part->name,
+					   part->addr,
+					   part->size);
+
+			if (part->part_type == PART_BINARY)
+				offset += snprintf(buf + offset,
+						   buflen - offset,
+						   ",type="
+						   LINUX_RESERVED_UUID);
+			else
+				offset += snprintf(buf + offset,
+						   buflen - offset,
+						   ",type=linux");
+
+			if (part->part_type == PART_SYSTEM)
+				offset += snprintf(buf + offset,
+						   buflen - offset,
+						   ",bootable");
+
+			if (!rootfs_found && !strcmp(part->name, "rootfs")) {
+				mmc_id = part->dev_id;
+				rootfs_found = true;
+				if (mmc_id < ARRAY_SIZE(uuid_mmc)) {
+					uuid_bin =
+					  (unsigned char *)uuid_mmc[mmc_id].b;
+					uuid_bin_to_str(uuid_bin, uuid,
+							UUID_STR_FORMAT_GUID);
+					offset += snprintf(buf + offset,
+							   buflen - offset,
+							   ",uuid=%s", uuid);
+				}
+			}
+
+			offset += snprintf(buf + offset, buflen - offset, ";");
+		}
+
+		if (offset) {
+			offset += snprintf(buf + offset, buflen - offset, "\"");
+			pr_debug("\ncmd: %s\n", buf);
+			if (run_command(buf, 0)) {
+				stm32prog_err("GPT partitionning fail: %s",
+					      buf);
+				free(buf);
+
+				return -1;
+			}
+		}
+
+		if (data->dev[i].mmc)
+			part_init(mmc_get_blk_desc(data->dev[i].mmc));
+
+#ifdef DEBUG
+		sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
+		pr_debug("\ncmd: %s", buf);
+		if (run_command(buf, 0))
+			printf("fail !\n");
+		else
+			printf("OK\n");
+
+		sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
+		run_command(buf, 0);
+#endif
+	}
+	puts("done\n");
+
+#ifdef DEBUG
+	run_command("mtd list", 0);
+#endif
+	free(buf);
+#endif
+
+	return 0;
+}
+
+static int stm32prog_alt_add(struct stm32prog_data *data,
+			     struct dfu_entity *dfu,
+			     struct stm32prog_part_t *part)
+{
+	int ret = 0;
+	int offset = 0;
+	char devstr[10];
+	char dfustr[10];
+	char buf[ALT_BUF_LEN];
+	u32 size;
+	char multiplier,  type;
+
+	/* max 3 digit for sector size */
+	if (part->size > SZ_1M) {
+		size = (u32)(part->size / SZ_1M);
+		multiplier = 'M';
+	} else if (part->size > SZ_1K) {
+		size = (u32)(part->size / SZ_1K);
+		multiplier = 'K';
+	} else {
+		size = (u32)part->size;
+		multiplier = 'B';
+	}
+	if (IS_SELECT(part) && !IS_EMPTY(part))
+		type = 'e'; /*Readable and Writeable*/
+	else
+		type = 'a';/*Readable*/
+
+	memset(buf, 0, sizeof(buf));
+	offset = snprintf(buf, ALT_BUF_LEN - offset,
+			  "@%s/0x%02x/1*%d%c%c ",
+			  part->name, part->id,
+			  size, multiplier, type);
+
+	if (part->target == STM32PROG_RAM) {
+		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+				   "ram 0x%llx 0x%llx",
+				   part->addr, part->size);
+	} else if (part->part_type == RAW_IMAGE) {
+		u64 dfu_size;
+
+		if (part->dev->target == STM32PROG_MMC)
+			dfu_size = part->size / part->dev->mmc->read_bl_len;
+		else
+			dfu_size = part->size;
+		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+				   "raw 0x0 0x%llx", dfu_size);
+	} else if (part->part_id < 0) {
+		u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
+
+		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+				   "raw 0x%llx 0x%llx",
+				   part->addr, nb_blk);
+		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+				   " mmcpart %d;", -(part->part_id));
+	} else {
+		if (part->part_type == PART_SYSTEM &&
+		    (part->target == STM32PROG_NAND ||
+		     part->target == STM32PROG_NOR ||
+		     part->target == STM32PROG_SPI_NAND))
+			offset += snprintf(buf + offset,
+					   ALT_BUF_LEN - offset,
+					   "partubi");
+		else
+			offset += snprintf(buf + offset,
+					   ALT_BUF_LEN - offset,
+					   "part");
+		/* dev_id requested by DFU MMC */
+		if (part->target == STM32PROG_MMC)
+			offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+					   " %d", part->dev_id);
+		offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
+				   " %d;", part->part_id);
+	}
+	switch (part->target) {
+#ifdef CONFIG_MMC
+	case STM32PROG_MMC:
+		sprintf(dfustr, "mmc");
+		sprintf(devstr, "%d", part->dev_id);
+		break;
+#endif
+#ifdef CONFIG_MTD
+	case STM32PROG_NAND:
+	case STM32PROG_NOR:
+	case STM32PROG_SPI_NAND:
+		sprintf(dfustr, "mtd");
+		get_mtd_by_target(devstr, part->target, part->dev_id);
+		break;
+#endif
+	case STM32PROG_RAM:
+		sprintf(dfustr, "ram");
+		sprintf(devstr, "0");
+		break;
+	default:
+		stm32prog_err("invalid target: %d", part->target);
+		return -ENODEV;
+	}
+	pr_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
+	ret = dfu_alt_add(dfu, dfustr, devstr, buf);
+	pr_debug("dfu_alt_add(%s,%s,%s) result %d\n",
+		 dfustr, devstr, buf, ret);
+
+	return ret;
+}
+
+static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
+				  char *name, int phase, int size)
+{
+	int ret = 0;
+	char devstr[4];
+	char buf[ALT_BUF_LEN];
+
+	sprintf(devstr, "%d", phase);
+	sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
+	ret = dfu_alt_add(dfu, "virt", devstr, buf);
+	pr_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
+
+	return ret;
+}
+
+static int dfu_init_entities(struct stm32prog_data *data)
+{
+	int ret = 0;
+	int phase, i, alt_id;
+	struct stm32prog_part_t *part;
+	struct dfu_entity *dfu;
+	int alt_nb;
+
+	alt_nb = 3; /* number of virtual = CMD, OTP, PMIC*/
+	if (data->part_nb == 0)
+		alt_nb++;  /* +1 for FlashLayout */
+	else
+		for (i = 0; i < data->part_nb; i++) {
+			if (data->part_array[i].target != STM32PROG_NONE)
+				alt_nb++;
+		}
+
+	if (dfu_alt_init(alt_nb, &dfu))
+		return -ENODEV;
+
+	puts("DFU alt info setting: ");
+	if (data->part_nb) {
+		alt_id = 0;
+		for (phase = 1;
+		     (phase <= PHASE_LAST_USER) &&
+		     (alt_id < alt_nb) && !ret;
+		     phase++) {
+			/* ordering alt setting by phase id */
+			part = NULL;
+			for (i = 0; i < data->part_nb; i++) {
+				if (phase == data->part_array[i].id) {
+					part = &data->part_array[i];
+					break;
+				}
+			}
+			if (!part)
+				continue;
+			if (part->target == STM32PROG_NONE)
+				continue;
+			part->alt_id = alt_id;
+			alt_id++;
+
+			ret = stm32prog_alt_add(data, dfu, part);
+		}
+	} else {
+		char buf[ALT_BUF_LEN];
+
+		sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
+			PHASE_FLASHLAYOUT, STM32_DDR_BASE);
+		ret = dfu_alt_add(dfu, "ram", NULL, buf);
+		pr_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
+	}
+
+	if (!ret)
+		ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, 512);
+
+	if (!ret)
+		ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, 512);
+
+	if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
+		ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, 8);
+
+	if (ret)
+		stm32prog_err("dfu init failed: %d", ret);
+	puts("done\n");
+
+#ifdef DEBUG
+	dfu_show_entities();
+#endif
+	return ret;
+}
+
+int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
+			long *size)
+{
+	pr_debug("%s: %x %lx\n", __func__, offset, *size);
+
+	if (!data->otp_part) {
+		data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
+		if (!data->otp_part)
+			return -ENOMEM;
+	}
+
+	if (!offset)
+		memset(data->otp_part, 0, OTP_SIZE);
+
+	if (offset + *size > OTP_SIZE)
+		*size = OTP_SIZE - offset;
+
+	memcpy((void *)((u32)data->otp_part + offset), buffer, *size);
+
+	return 0;
+}
+
+int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
+		       long *size)
+{
+#ifndef CONFIG_ARM_SMCCC
+	stm32prog_err("OTP update not supported");
+
+	return -1;
+#else
+	int result = 0;
+
+	pr_debug("%s: %x %lx\n", __func__, offset, *size);
+	/* alway read for first packet */
+	if (!offset) {
+		if (!data->otp_part)
+			data->otp_part =
+				memalign(CONFIG_SYS_CACHELINE_SIZE, OTP_SIZE);
+
+		if (!data->otp_part) {
+			result = -ENOMEM;
+			goto end_otp_read;
+		}
+
+		/* init struct with 0 */
+		memset(data->otp_part, 0, OTP_SIZE);
+
+		/* call the service */
+		result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
+					(u32)data->otp_part, 0);
+		if (result)
+			goto end_otp_read;
+	}
+
+	if (!data->otp_part) {
+		result = -ENOMEM;
+		goto end_otp_read;
+	}
+
+	if (offset + *size > OTP_SIZE)
+		*size = OTP_SIZE - offset;
+	memcpy(buffer, (void *)((u32)data->otp_part + offset), *size);
+
+end_otp_read:
+	pr_debug("%s: result %i\n", __func__, result);
+
+	return result;
+#endif
+}
+
+int stm32prog_otp_start(struct stm32prog_data *data)
+{
+#ifndef CONFIG_ARM_SMCCC
+	stm32prog_err("OTP update not supported");
+
+	return -1;
+#else
+	int result = 0;
+	struct arm_smccc_res res;
+
+	if (!data->otp_part) {
+		stm32prog_err("start OTP without data");
+		return -1;
+	}
+
+	arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
+		      (u32)data->otp_part, 0, 0, 0, 0, 0, &res);
+
+	if (!res.a0) {
+		switch (res.a1) {
+		case 0:
+			result = 0;
+			break;
+		case 1:
+			stm32prog_err("Provisioning");
+			result = 0;
+			break;
+		default:
+			pr_err("%s: OTP incorrect value (err = %ld)\n",
+			       __func__, res.a1);
+			result = -EINVAL;
+			break;
+		}
+	} else {
+		pr_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
+		       __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
+		result = -EINVAL;
+	}
+
+	free(data->otp_part);
+	data->otp_part = NULL;
+	pr_debug("%s: result %i\n", __func__, result);
+
+	return result;
+#endif
+}
+
+int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
+			 long *size)
+{
+	pr_debug("%s: %x %lx\n", __func__, offset, *size);
+
+	if (!offset)
+		memset(data->pmic_part, 0, PMIC_SIZE);
+
+	if (offset + *size > PMIC_SIZE)
+		*size = PMIC_SIZE - offset;
+
+	memcpy(&data->pmic_part[offset], buffer, *size);
+
+	return 0;
+}
+
+int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
+			long *size)
+{
+	int result = 0, ret;
+	struct udevice *dev;
+
+	if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
+		stm32prog_err("PMIC update not supported");
+
+		return -EOPNOTSUPP;
+	}
+
+	pr_debug("%s: %x %lx\n", __func__, offset, *size);
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(stpmic1_nvm),
+					  &dev);
+	if (ret)
+		return ret;
+
+	/* alway request PMIC for first packet */
+	if (!offset) {
+		/* init struct with 0 */
+		memset(data->pmic_part, 0, PMIC_SIZE);
+
+		ret = uclass_get_device_by_driver(UCLASS_MISC,
+						  DM_GET_DRIVER(stpmic1_nvm),
+						  &dev);
+		if (ret)
+			return ret;
+
+		ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
+		if (ret < 0) {
+			result = ret;
+			goto end_pmic_read;
+		}
+		if (ret != PMIC_SIZE) {
+			result = -EACCES;
+			goto end_pmic_read;
+		}
+	}
+
+	if (offset + *size > PMIC_SIZE)
+		*size = PMIC_SIZE - offset;
+
+	memcpy(buffer, &data->pmic_part[offset], *size);
+
+end_pmic_read:
+	pr_debug("%s: result %i\n", __func__, result);
+	return result;
+}
+
+int stm32prog_pmic_start(struct stm32prog_data *data)
+{
+	int ret;
+	struct udevice *dev;
+
+	if (!CONFIG_IS_ENABLED(PMIC_STPMIC1)) {
+		stm32prog_err("PMIC update not supported");
+
+		return -EOPNOTSUPP;
+	}
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(stpmic1_nvm),
+					  &dev);
+	if (ret)
+		return ret;
+
+	return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
+}
+
+/* copy FSBL on NAND to improve reliability on NAND */
+static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
+{
+	int ret, i;
+	void *fsbl;
+	struct image_header_s header;
+	struct raw_header_s raw_header;
+	struct dfu_entity *dfu;
+	long size, offset;
+
+	if (part->target != STM32PROG_NAND &&
+	    part->target != STM32PROG_SPI_NAND)
+		return -1;
+
+	dfu = dfu_get_entity(part->alt_id);
+
+	/* read header */
+	dfu_transaction_cleanup(dfu);
+	size = BL_HEADER_SIZE;
+	ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
+	if (ret)
+		return ret;
+	if (stm32prog_header_check(&raw_header, &header))
+		return -1;
+
+	/* read header + payload */
+	size = header.image_length + BL_HEADER_SIZE;
+	size = round_up(size, part->dev->mtd->erasesize);
+	fsbl = calloc(1, size);
+	if (!fsbl)
+		return -ENOMEM;
+	ret = dfu->read_medium(dfu, 0, fsbl, &size);
+	pr_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
+	if (ret)
+		goto error;
+
+	dfu_transaction_cleanup(dfu);
+	offset = 0;
+	for (i = part->bin_nb - 1; i > 0; i--) {
+		offset += size;
+		/* write to the next erase block */
+		ret = dfu->write_medium(dfu, offset, fsbl, &size);
+		pr_debug("%s copy at ofset=%lx size=%lx ret=%d",
+			 __func__, offset, size, ret);
+		if (ret)
+			goto error;
+	}
+
+error:
+	free(fsbl);
+	return ret;
+}
+
+static void stm32prog_end_phase(struct stm32prog_data *data)
+{
+	if (data->phase == PHASE_FLASHLAYOUT) {
+		if (parse_flash_layout(data, STM32_DDR_BASE, 0))
+			stm32prog_err("Layout: invalid FlashLayout");
+		return;
+	}
+
+	if (!data->cur_part)
+		return;
+
+	if (data->cur_part->target == STM32PROG_RAM) {
+		if (data->cur_part->part_type == PART_SYSTEM)
+			data->uimage = data->cur_part->addr;
+		if (data->cur_part->part_type == PART_FILESYSTEM)
+			data->dtb = data->cur_part->addr;
+	}
+
+	if (CONFIG_IS_ENABLED(MMC) &&
+	    data->cur_part->part_id < 0) {
+		char cmdbuf[60];
+
+		sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
+			data->cur_part->dev_id, data->cur_part->dev_id,
+			-(data->cur_part->part_id));
+		if (run_command(cmdbuf, 0)) {
+			stm32prog_err("commands '%s' failed", cmdbuf);
+			return;
+		}
+	}
+
+	if (CONFIG_IS_ENABLED(MTD) &&
+	    data->cur_part->bin_nb > 1) {
+		if (stm32prog_copy_fsbl(data->cur_part)) {
+			stm32prog_err("%s (0x%x): copy of fsbl failed",
+				      data->cur_part->name, data->cur_part->id);
+			return;
+		}
+	}
+}
+
+void stm32prog_do_reset(struct stm32prog_data *data)
+{
+	if (data->phase == PHASE_RESET) {
+		data->phase = PHASE_DO_RESET;
+		puts("Reset requested\n");
+	}
+}
+
+void stm32prog_next_phase(struct stm32prog_data *data)
+{
+	int phase, i;
+	struct stm32prog_part_t *part;
+	bool found;
+
+	phase = data->phase;
+	switch (phase) {
+	case PHASE_RESET:
+	case PHASE_END:
+	case PHASE_DO_RESET:
+		return;
+	}
+
+	/* found next selected partition */
+	data->dfu_seq = 0;
+	data->cur_part = NULL;
+	data->phase = PHASE_END;
+	found = false;
+	do {
+		phase++;
+		if (phase > PHASE_LAST_USER)
+			break;
+		for (i = 0; i < data->part_nb; i++) {
+			part = &data->part_array[i];
+			if (part->id == phase) {
+				if (IS_SELECT(part) && !IS_EMPTY(part)) {
+					data->cur_part = part;
+					data->phase = phase;
+					found = true;
+				}
+				break;
+			}
+		}
+	} while (!found);
+
+	if (data->phase == PHASE_END)
+		puts("Phase=END\n");
+}
+
+static int part_delete(struct stm32prog_data *data,
+		       struct stm32prog_part_t *part)
+{
+	int ret = 0;
+#ifdef CONFIG_MMC
+	unsigned long blks, blks_offset, blks_size;
+	struct blk_desc *block_dev = NULL;
+ #endif
+#ifdef CONFIG_MTD
+	char cmdbuf[40];
+	char devstr[10];
+#endif
+
+	printf("Erasing %s ", part->name);
+	switch (part->target) {
+#ifdef CONFIG_MMC
+	case STM32PROG_MMC:
+		printf("on mmc %d: ", part->dev->dev_id);
+		block_dev = mmc_get_blk_desc(part->dev->mmc);
+		blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
+		blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
+		/* -1 or -2 : delete boot partition of MMC
+		 * need to switch to associated hwpart 1 or 2
+		 */
+		if (part->part_id < 0)
+			if (blk_select_hwpart_devnum(IF_TYPE_MMC,
+						     part->dev->dev_id,
+						     -part->part_id))
+				return -1;
+
+		blks = blk_derase(block_dev, blks_offset, blks_size);
+
+		/* return to user partition */
+		if (part->part_id < 0)
+			blk_select_hwpart_devnum(IF_TYPE_MMC,
+						 part->dev->dev_id, 0);
+		if (blks != blks_size) {
+			ret = -1;
+			stm32prog_err("%s (0x%x): MMC erase failed",
+				      part->name, part->id);
+		}
+		break;
+#endif
+#ifdef CONFIG_MTD
+	case STM32PROG_NOR:
+	case STM32PROG_NAND:
+	case STM32PROG_SPI_NAND:
+		get_mtd_by_target(devstr, part->target, part->dev->dev_id);
+		printf("on %s: ", devstr);
+		sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
+			devstr, part->addr, part->size);
+		if (run_command(cmdbuf, 0)) {
+			ret = -1;
+			stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
+				      part->name, part->id, cmdbuf);
+		}
+		break;
+#endif
+	case STM32PROG_RAM:
+		printf("on ram: ");
+		memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
+		break;
+	default:
+		ret = -1;
+		stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
+		break;
+	}
+	if (!ret)
+		printf("done\n");
+
+	return ret;
+}
+
+static void stm32prog_devices_init(struct stm32prog_data *data)
+{
+	int i;
+	int ret;
+	struct stm32prog_part_t *part;
+
+	ret = treat_partition_list(data);
+	if (ret)
+		goto error;
+
+	/* initialize the selected device */
+	for (i = 0; i < data->dev_nb; i++) {
+		ret = init_device(data, &data->dev[i]);
+		if (ret)
+			goto error;
+	}
+
+	/* delete RAW partition before create partition */
+	for (i = 0; i < data->part_nb; i++) {
+		part = &data->part_array[i];
+
+		if (part->part_type != RAW_IMAGE)
+			continue;
+
+		if (!IS_SELECT(part) || !IS_DELETE(part))
+			continue;
+
+		ret = part_delete(data, part);
+		if (ret)
+			goto error;
+	}
+
+	ret = create_partitions(data);
+	if (ret)
+		goto error;
+
+	/* delete partition GPT or MTD */
+	for (i = 0; i < data->part_nb; i++) {
+		part = &data->part_array[i];
+
+		if (part->part_type == RAW_IMAGE)
+			continue;
+
+		if (!IS_SELECT(part) || !IS_DELETE(part))
+			continue;
+
+		ret = part_delete(data, part);
+		if (ret)
+			goto error;
+	}
+
+	return;
+
+error:
+	data->part_nb = 0;
+}
+
+int stm32prog_dfu_init(struct stm32prog_data *data)
+{
+	/* init device if no error */
+	if (data->part_nb)
+		stm32prog_devices_init(data);
+
+	if (data->part_nb)
+		stm32prog_next_phase(data);
+
+	/* prepare DFU for device read/write */
+	dfu_free_entities();
+	return dfu_init_entities(data);
+}
+
+int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size)
+{
+	memset(data, 0x0, sizeof(*data));
+	data->read_phase = PHASE_RESET;
+	data->phase = PHASE_FLASHLAYOUT;
+
+	return parse_flash_layout(data, addr, size);
+}
+
+void stm32prog_clean(struct stm32prog_data *data)
+{
+	/* clean */
+	dfu_free_entities();
+	free(data->part_array);
+	free(data->otp_part);
+	free(data->buffer);
+	free(data->header_data);
+}
+
+/* DFU callback: used after serial and direct DFU USB access */
+void dfu_flush_callback(struct dfu_entity *dfu)
+{
+	if (!stm32prog_data)
+		return;
+
+	if (dfu->dev_type == DFU_DEV_VIRT) {
+		if (dfu->data.virt.dev_num == PHASE_OTP)
+			stm32prog_otp_start(stm32prog_data);
+		else if (dfu->data.virt.dev_num == PHASE_PMIC)
+			stm32prog_pmic_start(stm32prog_data);
+		return;
+	}
+
+	if (dfu->dev_type == DFU_DEV_RAM) {
+		if (dfu->alt == 0 &&
+		    stm32prog_data->phase == PHASE_FLASHLAYOUT) {
+			stm32prog_end_phase(stm32prog_data);
+			/* waiting DFU DETACH for reenumeration */
+		}
+	}
+
+	if (!stm32prog_data->cur_part)
+		return;
+
+	if (dfu->alt == stm32prog_data->cur_part->alt_id) {
+		stm32prog_end_phase(stm32prog_data);
+		stm32prog_next_phase(stm32prog_data);
+	}
+}
+
+void dfu_initiated_callback(struct dfu_entity *dfu)
+{
+	if (!stm32prog_data)
+		return;
+
+	if (!stm32prog_data->cur_part)
+		return;
+
+	/* force the saved offset for the current partition */
+	if (dfu->alt == stm32prog_data->cur_part->alt_id) {
+		dfu->offset = stm32prog_data->offset;
+		stm32prog_data->dfu_seq = 0;
+		pr_debug("dfu offset = 0x%llx\n", dfu->offset);
+	}
+}
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
new file mode 100644
index 0000000000..bae4e91c01
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog.h
@@ -0,0 +1,185 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#ifndef _STM32PROG_H_
+#define _STM32PROG_H_
+
+/* - phase defines ------------------------------------------------*/
+#define PHASE_FLASHLAYOUT	0x00
+#define PHASE_FIRST_USER	0x10
+#define PHASE_LAST_USER		0xF0
+#define PHASE_CMD		0xF1
+#define PHASE_OTP		0xF2
+#define PHASE_PMIC		0xF4
+#define PHASE_END		0xFE
+#define PHASE_RESET		0xFF
+#define PHASE_DO_RESET		0x1FF
+
+#define DEFAULT_ADDRESS		0xFFFFFFFF
+
+#define OTP_SIZE		1024
+#define PMIC_SIZE		8
+
+enum stm32prog_target {
+	STM32PROG_NONE,
+	STM32PROG_MMC,
+	STM32PROG_NAND,
+	STM32PROG_NOR,
+	STM32PROG_SPI_NAND,
+	STM32PROG_RAM
+};
+
+enum stm32prog_link_t {
+	LINK_SERIAL,
+	LINK_USB,
+	LINK_UNDEFINED,
+};
+
+struct image_header_s {
+	bool	present;
+	u32	image_checksum;
+	u32	image_length;
+};
+
+struct raw_header_s {
+	u32 magic_number;
+	u32 image_signature[64 / 4];
+	u32 image_checksum;
+	u32 header_version;
+	u32 image_length;
+	u32 image_entry_point;
+	u32 reserved1;
+	u32 load_address;
+	u32 reserved2;
+	u32 version_number;
+	u32 option_flags;
+	u32 ecdsa_algorithm;
+	u32 ecdsa_public_key[64 / 4];
+	u32 padding[83 / 4];
+	u32 binary_type;
+};
+
+#define BL_HEADER_SIZE	sizeof(struct raw_header_s)
+
+/* partition type in flashlayout file */
+enum stm32prog_part_type {
+	PART_BINARY,
+	PART_SYSTEM,
+	PART_FILESYSTEM,
+	RAW_IMAGE
+};
+
+/* device information */
+struct stm32prog_dev_t {
+	enum stm32prog_target	target;
+	char			dev_id;
+	u32			erase_size;
+	struct mmc		*mmc;
+	struct mtd_info		*mtd;
+	/* list of partition for this device / ordered in offset */
+	struct list_head	part_list;
+	bool			full_update;
+};
+
+/* partition information build from FlashLayout and device */
+struct stm32prog_part_t {
+	/* FlashLayout information */
+	int			option;
+	int			id;
+	enum stm32prog_part_type part_type;
+	enum stm32prog_target	target;
+	char			dev_id;
+
+	/* partition name
+	 * (16 char in gpt, + 1 for null terminated string
+	 */
+	char			name[16 + 1];
+	u64			addr;
+	u64			size;
+	enum stm32prog_part_type bin_nb;	/* SSBL repeatition */
+
+	/* information on associated device */
+	struct stm32prog_dev_t	*dev;		/* pointer to device */
+	s16			part_id;	/* partition id in device */
+	int			alt_id;		/* alt id in usb/dfu */
+
+	struct list_head	list;
+};
+
+#define STM32PROG_MAX_DEV 5
+struct stm32prog_data {
+	/* Layout information */
+	int			dev_nb;		/* device number*/
+	struct stm32prog_dev_t	dev[STM32PROG_MAX_DEV];	/* array of device */
+	int			part_nb;	/* nb of partition */
+	struct stm32prog_part_t	*part_array;	/* array of partition */
+	bool			tee_detected;
+	bool			fsbl_nor_detected;
+
+	/* command internal information */
+	unsigned int		phase;
+	u32			offset;
+	char			error[255];
+	struct stm32prog_part_t	*cur_part;
+	u32			*otp_part;
+	u8			pmic_part[PMIC_SIZE];
+
+	/* STM32 header information */
+	struct raw_header_s	*header_data;
+	struct image_header_s	header;
+
+	/* SERIAL information */
+	u32	cursor;
+	u32	packet_number;
+	u32	checksum;
+	u8	*buffer; /* size = USART_RAM_BUFFER_SIZE*/
+	int	dfu_seq;
+	u8	read_phase;
+
+	/* bootm information */
+	u32	uimage;
+	u32	dtb;
+};
+
+extern struct stm32prog_data *stm32prog_data;
+
+/* OTP access */
+int stm32prog_otp_write(struct stm32prog_data *data, u32 offset,
+			u8 *buffer, long *size);
+int stm32prog_otp_read(struct stm32prog_data *data, u32 offset,
+		       u8 *buffer, long *size);
+int stm32prog_otp_start(struct stm32prog_data *data);
+
+/* PMIC access */
+int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset,
+			 u8 *buffer, long *size);
+int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset,
+			u8 *buffer, long *size);
+int stm32prog_pmic_start(struct stm32prog_data *data);
+
+/* generic part*/
+u8 stm32prog_header_check(struct raw_header_s *raw_header,
+			  struct image_header_s *header);
+int stm32prog_dfu_init(struct stm32prog_data *data);
+void stm32prog_next_phase(struct stm32prog_data *data);
+void stm32prog_do_reset(struct stm32prog_data *data);
+
+char *stm32prog_get_error(struct stm32prog_data *data);
+
+#define stm32prog_err(args...) {\
+	if (data->phase != PHASE_RESET) { \
+		sprintf(data->error, args); \
+		data->phase = PHASE_RESET; \
+		pr_err("Error: %s\n", data->error); } \
+	}
+
+/* Main function */
+int stm32prog_init(struct stm32prog_data *data, ulong addr, ulong size);
+int stm32prog_serial_init(struct stm32prog_data *data, int link_dev);
+bool stm32prog_serial_loop(struct stm32prog_data *data);
+bool stm32prog_usb_loop(struct stm32prog_data *data, int dev);
+void stm32prog_clean(struct stm32prog_data *data);
+
+#endif
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
new file mode 100644
index 0000000000..70940f01f3
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_serial.c
@@ -0,0 +1,994 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <console.h>
+#include <dfu.h>
+#include <malloc.h>
+#include <serial.h>
+#include <watchdog.h>
+#include <dm/lists.h>
+#include <dm/device-internal.h>
+#include <linux/delay.h>
+#include "stm32prog.h"
+
+/* - configuration part -----------------------------*/
+#define USART_BL_VERSION	0x40	/* USART bootloader version V4.0*/
+#define UBOOT_BL_VERSION	0x03	/* bootloader version V0.3*/
+#define DEVICE_ID_BYTE1		0x05	/* MSB byte of device ID*/
+#define DEVICE_ID_BYTE2		0x00	/* LSB byte of device ID*/
+#define USART_RAM_BUFFER_SIZE	256	/* Size of USART_RAM_Buf buffer*/
+
+/* - Commands -----------------------------*/
+#define GET_CMD_COMMAND		0x00	/* Get CMD command*/
+#define GET_VER_COMMAND		0x01	/* Get Version command*/
+#define GET_ID_COMMAND		0x02	/* Get ID command*/
+#define GET_PHASE_COMMAND	0x03	/* Get Phase command*/
+#define RM_COMMAND		0x11	/* Read Memory command*/
+#define READ_PART_COMMAND	0x12	/* Read Partition command*/
+#define START_COMMAND		0x21	/* START command (Go)*/
+#define DOWNLOAD_COMMAND	0x31	/* Download command*/
+/* existing command for other STM32 but not used */
+/* ERASE			0x43 */
+/* EXTENDED_ERASE		0x44 */
+/* WRITE_UNPROTECTED		0x73 */
+/* READOUT_PROTECT		0x82 */
+/* READOUT_UNPROTECT		0x92 */
+
+/* - miscellaneous defines ----------------------------------------*/
+#define INIT_BYTE		0x7F	/*Init Byte ID*/
+#define ACK_BYTE		0x79	/*Acknowlede Byte ID*/
+#define NACK_BYTE		0x1F	/*No Acknowlede Byte ID*/
+#define ABORT_BYTE		0x5F	/*ABORT*/
+
+struct udevice *down_serial_dev;
+
+const u8 cmd_id[] = {
+	GET_CMD_COMMAND,
+	GET_VER_COMMAND,
+	GET_ID_COMMAND,
+	GET_PHASE_COMMAND,
+	RM_COMMAND,
+	READ_PART_COMMAND,
+	START_COMMAND,
+	DOWNLOAD_COMMAND
+};
+
+#define NB_CMD sizeof(cmd_id)
+
+/* DFU support for serial *********************************************/
+static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
+{
+	int alt_id;
+
+	if (!data->cur_part)
+		if (data->phase == PHASE_FLASHLAYOUT)
+			alt_id = 0;
+		else
+			return NULL;
+	else
+		alt_id = data->cur_part->alt_id;
+
+	return dfu_get_entity(alt_id);
+}
+
+static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
+			   u32 buffer_size)
+{
+	struct dfu_entity *dfu_entity;
+	u8 ret = 0;
+
+	dfu_entity = stm32prog_get_entity(data);
+	if (!dfu_entity)
+		return -ENODEV;
+
+	ret = dfu_write(dfu_entity,
+			buffer,
+			buffer_size,
+			data->dfu_seq);
+
+	if (ret) {
+		stm32prog_err("DFU write failed [%d] cnt: %d",
+			      ret, data->dfu_seq);
+	}
+	data->dfu_seq++;
+	/* handle rollover as in driver/dfu/dfu.c */
+	data->dfu_seq &= 0xffff;
+	if (buffer_size == 0)
+		data->dfu_seq = 0; /* flush done */
+
+	return ret;
+}
+
+static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
+			  u8 *buffer, u32 buffer_size)
+{
+	struct dfu_entity *dfu_entity;
+	struct stm32prog_part_t *part;
+	u32 size;
+	int ret, i;
+
+	if (data->dfu_seq) {
+		stm32prog_err("DFU write pending for phase %d, seq %d",
+			      data->phase, data->dfu_seq);
+		return -EINVAL;
+	}
+	if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
+		stm32prog_err("read failed : phase %d is invalid", phase);
+		return -EINVAL;
+	}
+	if (data->read_phase <= PHASE_LAST_USER &&
+	    phase != data->read_phase) {
+		/* clear previous read session */
+		dfu_entity = dfu_get_entity(data->read_phase - 1);
+		if (dfu_entity)
+			dfu_transaction_cleanup(dfu_entity);
+	}
+
+	dfu_entity = NULL;
+	/* found partition for the expected phase */
+	for (i = 0; i < data->part_nb; i++) {
+		part = &data->part_array[i];
+		if (part->id == phase)
+			dfu_entity = dfu_get_entity(part->alt_id);
+	}
+	if (!dfu_entity) {
+		stm32prog_err("read failed : phase %d is unknown", phase);
+		return -ENODEV;
+	}
+
+	/* clear pending read before to force offset */
+	if (dfu_entity->inited &&
+	    (data->read_phase != phase || data->offset != offset))
+		dfu_transaction_cleanup(dfu_entity);
+
+	/* initiate before to force offset */
+	if (!dfu_entity->inited) {
+		ret = dfu_transaction_initiate(dfu_entity, true);
+			if (ret < 0) {
+				stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
+					      ret, phase, offset);
+			return ret;
+		}
+	}
+	/* force new offset */
+	if (dfu_entity->offset != offset)
+		dfu_entity->offset = offset;
+	data->offset = offset;
+	data->read_phase = phase;
+	pr_debug("\nSTM32 download read %s offset=0x%x\n",
+		 dfu_entity->name, offset);
+	ret = dfu_read(dfu_entity, buffer, buffer_size,
+		       dfu_entity->i_blk_seq_num);
+	if (ret < 0) {
+		stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
+			      ret, phase, offset);
+		return ret;
+	}
+
+	size = ret;
+
+	if (size < buffer_size) {
+		data->offset = 0;
+		data->read_phase = PHASE_END;
+		memset(buffer + size, 0, buffer_size - size);
+	} else {
+		data->offset += size;
+	}
+
+	return ret;
+}
+
+/* UART access ***************************************************/
+int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
+{
+	struct udevice *dev = NULL;
+	int node;
+	char alias[10];
+	const char *path;
+	struct dm_serial_ops *ops;
+	/* no parity, 8 bits, 1 stop */
+	u32 serial_config = SERIAL_DEFAULT_CONFIG;
+
+	down_serial_dev = NULL;
+
+	sprintf(alias, "serial%d", link_dev);
+	path = fdt_get_alias(gd->fdt_blob, alias);
+	if (!path) {
+		pr_err("%s alias not found", alias);
+		return -ENODEV;
+	}
+	node = fdt_path_offset(gd->fdt_blob, path);
+	if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
+					    &dev)) {
+		down_serial_dev = dev;
+	} else if (node > 0 &&
+		   !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
+				   &dev, false)) {
+		if (!device_probe(dev))
+			down_serial_dev = dev;
+	}
+	if (!down_serial_dev) {
+		pr_err("%s = %s device not found", alias, path);
+		return -ENODEV;
+	}
+
+	/* force silent console on uart only when used */
+	if (gd->cur_serial_dev == down_serial_dev)
+		gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
+	else
+		gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
+
+	ops = serial_get_ops(down_serial_dev);
+
+	if (!ops) {
+		pr_err("%s = %s missing ops", alias, path);
+		return -ENODEV;
+	}
+	if (!ops->setconfig) {
+		pr_err("%s = %s missing setconfig", alias, path);
+		return -ENODEV;
+	}
+
+	clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
+
+	data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
+				USART_RAM_BUFFER_SIZE);
+
+	return ops->setconfig(down_serial_dev, serial_config);
+}
+
+static void stm32prog_serial_flush(void)
+{
+	struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
+	int err;
+
+	do {
+		err = ops->getc(down_serial_dev);
+	} while (err != -EAGAIN);
+}
+
+static int stm32prog_serial_getc_err(void)
+{
+	struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
+	int err;
+
+	do {
+		err = ops->getc(down_serial_dev);
+		if (err == -EAGAIN) {
+			ctrlc();
+			WATCHDOG_RESET();
+		}
+	} while ((err == -EAGAIN) && (!had_ctrlc()));
+
+	return err;
+}
+
+static u8 stm32prog_serial_getc(void)
+{
+	int err;
+
+	err = stm32prog_serial_getc_err();
+
+	return err >= 0 ? err : 0;
+}
+
+static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
+{
+	struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
+	int err;
+
+	do {
+		err = ops->getc(down_serial_dev);
+		if (err >= 0) {
+			*buffer++ = err;
+			*count -= 1;
+		} else if (err == -EAGAIN) {
+			ctrlc();
+			WATCHDOG_RESET();
+		} else {
+			break;
+		}
+	} while (*count && !had_ctrlc());
+
+	return !!(err < 0);
+}
+
+static void stm32prog_serial_putc(u8 w_byte)
+{
+	struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
+	int err;
+
+	do {
+		err = ops->putc(down_serial_dev, w_byte);
+	} while (err == -EAGAIN);
+}
+
+/* Helper function ************************************************/
+
+static u8 stm32prog_header(struct stm32prog_data *data)
+{
+	u8 ret;
+	u8 boot = 0;
+	struct dfu_entity *dfu_entity;
+	u64 size = 0;
+
+	dfu_entity = stm32prog_get_entity(data);
+	if (!dfu_entity)
+		return -ENODEV;
+
+	printf("\nSTM32 download write %s\n", dfu_entity->name);
+
+	/* force cleanup to avoid issue with previous read */
+	dfu_transaction_cleanup(dfu_entity);
+
+	ret = stm32prog_header_check(data->header_data,
+				     &data->header);
+
+	/* no header : max size is partition size */
+	if (ret) {
+		dfu_entity->get_medium_size(dfu_entity, &size);
+		data->header.image_length = size;
+	}
+
+	/**** Flash the header if necessary for boot partition */
+	if (data->phase < PHASE_FIRST_USER)
+		boot = 1;
+
+	/* write header if boot partition */
+	if (boot) {
+		if (ret) {
+			stm32prog_err("invalid header (error %d)", ret);
+		} else {
+			ret = stm32prog_write(data,
+					      (u8 *)data->header_data,
+					      BL_HEADER_SIZE);
+		}
+	} else {
+		if (ret)
+			printf("  partition without checksum\n");
+		ret = 0;
+	}
+
+	free(data->header_data);
+	data->header_data = NULL;
+
+	return ret;
+}
+
+static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
+{
+	u8 ret = 0;
+	struct dfu_entity *dfu_entity;
+
+	if (address < 0x100) {
+		if (address == PHASE_OTP)
+			return stm32prog_otp_start(data);
+
+		if (address == PHASE_PMIC)
+			return stm32prog_pmic_start(data);
+
+		if (address == PHASE_RESET || address == PHASE_END) {
+			data->cur_part = NULL;
+			data->dfu_seq = 0;
+			data->phase = address;
+			return 0;
+		}
+		if (address != data->phase) {
+			stm32prog_err("invalid received phase id %d, current phase is %d",
+				      (u8)address, (u8)data->phase);
+			return -EINVAL;
+		}
+	}
+	/* check the last loaded partition */
+	if (address == DEFAULT_ADDRESS || address == data->phase) {
+		switch (data->phase) {
+		case PHASE_END:
+		case PHASE_RESET:
+		case PHASE_DO_RESET:
+			data->cur_part = NULL;
+			data->phase = PHASE_DO_RESET;
+			return 0;
+		}
+		dfu_entity = stm32prog_get_entity(data);
+		if (!dfu_entity)
+			return -ENODEV;
+
+		if (data->dfu_seq) {
+			ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
+			data->dfu_seq = 0;
+			if (ret) {
+				stm32prog_err("DFU flush failed [%d]", ret);
+				return ret;
+			}
+		}
+		printf("\n  received length = 0x%x\n", data->cursor);
+		if (data->header.present) {
+			if (data->cursor !=
+			    (data->header.image_length + BL_HEADER_SIZE)) {
+				stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
+					      data->cursor,
+					      data->header.image_length +
+					      BL_HEADER_SIZE);
+				return -EIO;
+			}
+			if (data->header.image_checksum != data->checksum) {
+				stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
+					      data->checksum,
+					      data->header.image_checksum);
+				return -EIO;
+			}
+			printf("\n  checksum OK (0x%x)\n", data->checksum);
+		}
+
+		/* update DFU with received flashlayout */
+		if (data->phase == PHASE_FLASHLAYOUT)
+			stm32prog_dfu_init(data);
+	} else {
+		void (*entry)(void) = (void *)address;
+
+		printf("## Starting application at 0x%x ...\n", address);
+		(*entry)();
+		printf("## Application terminated\n");
+		ret = -ENOEXEC;
+	}
+
+	return ret;
+}
+
+/**
+ * get_address() - Get address if it is valid
+ *
+ * @tmp_xor:		Current xor value to update
+ * @return The address area
+ */
+static u32 get_address(u8 *tmp_xor)
+{
+	u32 address = 0x0;
+	u8 data;
+
+	data = stm32prog_serial_getc();
+	*tmp_xor ^= data;
+	address |= ((u32)data) << 24;
+
+	data = stm32prog_serial_getc();
+	address |= ((u32)data) << 16;
+	*tmp_xor ^= data;
+
+	data = stm32prog_serial_getc();
+	address |= ((u32)data) << 8;
+	*tmp_xor ^= data;
+
+	data = stm32prog_serial_getc();
+	address |= ((u32)data);
+	*tmp_xor ^= data;
+
+	return address;
+}
+
+static void stm32prog_serial_result(u8 result)
+{
+	/* always flush fifo before to send result */
+	stm32prog_serial_flush();
+	stm32prog_serial_putc(result);
+}
+
+/* Command -----------------------------------------------*/
+/**
+ * get_cmd_command() - Respond to Get command
+ *
+ * @data:		Current command context
+ */
+static void get_cmd_command(struct stm32prog_data *data)
+{
+	u32 counter = 0x0;
+
+	stm32prog_serial_putc(NB_CMD);
+	stm32prog_serial_putc(USART_BL_VERSION);
+
+	for (counter = 0; counter < NB_CMD; counter++)
+		stm32prog_serial_putc(cmd_id[counter]);
+
+	stm32prog_serial_result(ACK_BYTE);
+}
+
+/**
+ * get_version_command() - Respond to Get Version command
+ *
+ * @data:		Current command context
+ */
+static void get_version_command(struct stm32prog_data *data)
+{
+	stm32prog_serial_putc(UBOOT_BL_VERSION);
+	stm32prog_serial_result(ACK_BYTE);
+}
+
+/**
+ * get_id_command() - Respond to Get ID command
+ *
+ * @data:		Current command context
+ */
+static void get_id_command(struct stm32prog_data *data)
+{
+	/* Send Device IDCode */
+	stm32prog_serial_putc(0x1);
+	stm32prog_serial_putc(DEVICE_ID_BYTE1);
+	stm32prog_serial_putc(DEVICE_ID_BYTE2);
+	stm32prog_serial_result(ACK_BYTE);
+}
+
+/**
+ * get_phase_command() - Respond to Get phase
+ *
+ * @data:		Current command context
+ */
+static void get_phase_command(struct stm32prog_data *data)
+{
+	char *err_msg = NULL;
+	u8 i, length = 0;
+	u32 destination = DEFAULT_ADDRESS; /* destination address */
+	int phase = data->phase;
+
+	if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
+		err_msg = stm32prog_get_error(data);
+		length = strlen(err_msg);
+	}
+	if (phase == PHASE_FLASHLAYOUT)
+		destination = STM32_DDR_BASE;
+
+	stm32prog_serial_putc(length + 5);           /* Total length */
+	stm32prog_serial_putc(phase & 0xFF);         /* partition ID */
+	stm32prog_serial_putc(destination);          /* byte 1 of address */
+	stm32prog_serial_putc(destination >> 8);     /* byte 2 of address */
+	stm32prog_serial_putc(destination >> 16);    /* byte 3 of address */
+	stm32prog_serial_putc(destination >> 24);    /* byte 4 of address */
+
+	stm32prog_serial_putc(length);               /* Information length */
+	for (i = 0; i < length; i++)
+		stm32prog_serial_putc(err_msg[i]);
+	stm32prog_serial_result(ACK_BYTE);
+
+	if (phase == PHASE_RESET)
+		stm32prog_do_reset(data);
+}
+
+/**
+ * read_memory_command() - Read data from memory
+ *
+ * @data:		Current command context
+ */
+static void read_memory_command(struct stm32prog_data *data)
+{
+	u32 address = 0x0;
+	u8 rcv_data = 0x0, tmp_xor = 0x0;
+	u32 counter = 0x0;
+
+	/* Read memory address */
+	address = get_address(&tmp_xor);
+
+	/* If address memory is not received correctly */
+	rcv_data = stm32prog_serial_getc();
+	if (rcv_data != tmp_xor) {
+		stm32prog_serial_result(NACK_BYTE);
+		return;
+	}
+
+	stm32prog_serial_result(ACK_BYTE);
+
+	/* Read the number of bytes to be received:
+	 * Max NbrOfData = Data + 1 = 256
+	 */
+	rcv_data = stm32prog_serial_getc();
+	tmp_xor = ~rcv_data;
+	if (stm32prog_serial_getc() != tmp_xor) {
+		stm32prog_serial_result(NACK_BYTE);
+		return;
+	}
+
+	/* If checksum is correct send ACK */
+	stm32prog_serial_result(ACK_BYTE);
+
+	/* Send data to the host:
+	 * Number of data to read = data + 1
+	 */
+	for (counter = (rcv_data + 1); counter != 0; counter--)
+		stm32prog_serial_putc(*(u8 *)(address++));
+}
+
+/**
+ * start_command() - Respond to start command
+ *
+ * Jump to user application in RAM or partition check
+ *
+ * @data:		Current command context
+ */
+static void start_command(struct stm32prog_data *data)
+{
+	u32 address = 0;
+	u8 tmp_xor = 0x0;
+	u8 ret, rcv_data;
+
+	/* Read memory address */
+	address = get_address(&tmp_xor);
+
+	/* If address memory is not received correctly */
+	rcv_data = stm32prog_serial_getc();
+	if (rcv_data != tmp_xor) {
+		stm32prog_serial_result(NACK_BYTE);
+		return;
+	}
+	/* validate partition */
+	ret = stm32prog_start(data,
+			      address);
+
+	if (ret)
+		stm32prog_serial_result(ABORT_BYTE);
+	else
+		stm32prog_serial_result(ACK_BYTE);
+}
+
+/**
+ * download_command() - Respond to download command
+ *
+ * Write data to not volatile memory, Flash
+ *
+ * @data:		Current command context
+ */
+static void download_command(struct stm32prog_data *data)
+{
+	u32 address = 0x0;
+	u8 my_xor = 0x0;
+	u8 rcv_xor;
+	u32 counter = 0x0, codesize = 0x0;
+	u8 *ramaddress = 0;
+	u8 rcv_data = 0x0;
+	struct image_header_s *image_header = &data->header;
+	u32 cursor = data->cursor;
+	long size = 0;
+	u8 operation;
+	u32 packet_number;
+	u32 result = ACK_BYTE;
+	u8 ret;
+	unsigned int i;
+	bool error;
+	int rcv;
+
+	address = get_address(&my_xor);
+
+	/* If address memory is not received correctly */
+	rcv_xor = stm32prog_serial_getc();
+	if (rcv_xor != my_xor) {
+		result = NACK_BYTE;
+		goto end;
+	}
+
+	/* If address valid send ACK */
+	stm32prog_serial_result(ACK_BYTE);
+
+	/* get packet number and operation type */
+	operation = (u8)((u32)address >> 24);
+	packet_number = ((u32)(((u32)address << 8))) >> 8;
+
+	switch (operation) {
+	/* supported operation */
+	case PHASE_FLASHLAYOUT:
+	case PHASE_OTP:
+	case PHASE_PMIC:
+		break;
+	default:
+		result = NACK_BYTE;
+		goto end;
+	}
+	/* check the packet number */
+	if (packet_number == 0) {
+		/* erase: re-initialize the image_header struct */
+		data->packet_number = 0;
+		if (data->header_data)
+			memset(data->header_data, 0, BL_HEADER_SIZE);
+		else
+			data->header_data = calloc(1, BL_HEADER_SIZE);
+		cursor = 0;
+		data->cursor = 0;
+		data->checksum = 0;
+		/*idx = cursor;*/
+	} else {
+		data->packet_number++;
+	}
+
+	/* Check with the number of current packet if the device receive
+	 * the true packet
+	 */
+	if (packet_number != data->packet_number) {
+		data->packet_number--;
+		result = NACK_BYTE;
+		goto end;
+	}
+
+	/*-- Read number of bytes to be written and data -----------*/
+
+	/* Read the number of bytes to be written:
+	 * Max NbrOfData = data + 1 <= 256
+	 */
+	rcv_data = stm32prog_serial_getc();
+
+	/* NbrOfData to write = data + 1 */
+	codesize = rcv_data + 0x01;
+
+	if (codesize > USART_RAM_BUFFER_SIZE) {
+		result = NACK_BYTE;
+		goto end;
+	}
+
+	/* Checksum Initialization */
+	my_xor = rcv_data;
+
+	/* UART receive data and send to Buffer */
+	counter = codesize;
+	error = stm32prog_serial_get_buffer(data->buffer, &counter);
+
+	/* read checksum */
+	if (!error) {
+		rcv = stm32prog_serial_getc_err();
+		error = !!(rcv < 0);
+		rcv_xor = rcv;
+	}
+
+	if (error) {
+		printf("transmission error on packet %d, byte %d\n",
+		       packet_number, codesize - counter);
+		/* waiting end of packet before flush & NACK */
+		mdelay(30);
+		data->packet_number--;
+		result = NACK_BYTE;
+		goto end;
+	}
+
+	/* Compute Checksum */
+	ramaddress = data->buffer;
+	for (counter = codesize; counter != 0; counter--)
+		my_xor ^= *(ramaddress++);
+
+	/* If Checksum is incorrect */
+	if (rcv_xor != my_xor) {
+		printf("checksum error on packet %d\n",
+		       packet_number);
+		/* wait to be sure that all data are received
+		 * in the FIFO before flush
+		 */
+		mdelay(30);
+		data->packet_number--;
+		result = NACK_BYTE;
+		goto end;
+	}
+
+	/* Update current position in buffer */
+	data->cursor += codesize;
+
+	if (operation == PHASE_OTP) {
+		size = data->cursor - cursor;
+		/* no header for OTP */
+		if (stm32prog_otp_write(data, cursor,
+					data->buffer, &size))
+			result = ABORT_BYTE;
+		goto end;
+	}
+
+	if (operation == PHASE_PMIC) {
+		size = data->cursor - cursor;
+		/* no header for PMIC */
+		if (stm32prog_pmic_write(data, cursor,
+					 data->buffer, &size))
+			result = ABORT_BYTE;
+		goto end;
+	}
+
+	if (cursor < BL_HEADER_SIZE) {
+		/* size = portion of header in this chunck */
+		if (data->cursor >= BL_HEADER_SIZE)
+			size = BL_HEADER_SIZE - cursor;
+		else
+			size = data->cursor - cursor;
+		memcpy((void *)((u32)(data->header_data) + cursor),
+		       data->buffer, size);
+		cursor += size;
+
+		if (cursor == BL_HEADER_SIZE) {
+			/* Check and Write the header */
+			if (stm32prog_header(data)) {
+				result = ABORT_BYTE;
+				goto end;
+			}
+		} else {
+			goto end;
+		}
+	}
+
+	if (image_header->present) {
+		if (data->cursor <= BL_HEADER_SIZE)
+			goto end;
+		/* compute checksum on payload */
+		for (i = (unsigned long)size; i < codesize; i++)
+			data->checksum += data->buffer[i];
+
+		if (data->cursor >
+		    image_header->image_length + BL_HEADER_SIZE) {
+			pr_err("expected size exceeded\n");
+			result = ABORT_BYTE;
+			goto end;
+		}
+
+		/* write data (payload) */
+		ret = stm32prog_write(data,
+				      &data->buffer[size],
+				      codesize - size);
+	} else {
+		/* write all */
+		ret = stm32prog_write(data,
+				      data->buffer,
+				      codesize);
+	}
+	if (ret)
+		result = ABORT_BYTE;
+
+end:
+	stm32prog_serial_result(result);
+}
+
+/**
+ * read_partition() - Respond to read command
+ *
+ * Read data from not volatile memory, Flash
+ *
+ * @data:		Current command context
+ */
+static void read_partition_command(struct stm32prog_data *data)
+{
+	u32 i, part_id, codesize, offset = 0, rcv_data;
+	long size;
+	u8 tmp_xor;
+	int res;
+	u8 buffer[256];
+
+	part_id = stm32prog_serial_getc();
+	tmp_xor = part_id;
+
+	offset = get_address(&tmp_xor);
+
+	rcv_data = stm32prog_serial_getc();
+	if (rcv_data != tmp_xor) {
+		pr_debug("1st checksum received = %x, computed %x\n",
+			 rcv_data, tmp_xor);
+		goto error;
+	}
+	stm32prog_serial_putc(ACK_BYTE);
+
+	/* NbrOfData to read = data + 1 */
+	rcv_data = stm32prog_serial_getc();
+	codesize = rcv_data + 0x01;
+	tmp_xor = rcv_data;
+
+	rcv_data = stm32prog_serial_getc();
+	if ((rcv_data ^ tmp_xor) != 0xFF) {
+		pr_debug("2nd checksum received = %x, computed %x\n",
+			 rcv_data, tmp_xor);
+		goto error;
+	}
+
+	pr_debug("%s : %x\n", __func__, part_id);
+	rcv_data = 0;
+	switch (part_id) {
+	case PHASE_OTP:
+		size = codesize;
+		if (!stm32prog_otp_read(data, offset, buffer, &size))
+			rcv_data = size;
+		break;
+	case PHASE_PMIC:
+		size = codesize;
+		if (!stm32prog_pmic_read(data, offset, buffer, &size))
+			rcv_data = size;
+		break;
+	default:
+		res = stm32prog_read(data, part_id, offset,
+				     buffer, codesize);
+		if (res > 0)
+			rcv_data = res;
+		break;
+	}
+	if (rcv_data > 0) {
+		stm32prog_serial_putc(ACK_BYTE);
+		/*----------- Send data to the host -----------*/
+		for (i = 0; i < rcv_data; i++)
+			stm32prog_serial_putc(buffer[i]);
+		/*----------- Send filler to the host -----------*/
+		for (; i < codesize; i++)
+			stm32prog_serial_putc(0x0);
+		return;
+	}
+	stm32prog_serial_result(ABORT_BYTE);
+	return;
+
+error:
+	stm32prog_serial_result(NACK_BYTE);
+}
+
+/* MAIN function = SERIAL LOOP ***********************************************/
+
+/**
+ * stm32prog_serial_loop() - USART bootloader Loop routine
+ *
+ * @data:		Current command context
+ * @return true if reset is needed after loop
+ */
+bool stm32prog_serial_loop(struct stm32prog_data *data)
+{
+	u32 counter = 0x0;
+	u8 command = 0x0;
+	u8 found;
+	int phase = data->phase;
+
+	/* element of cmd_func need to aligned with cmd_id[]*/
+	void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
+		/* GET_CMD_COMMAND */	get_cmd_command,
+		/* GET_VER_COMMAND */	get_version_command,
+		/* GET_ID_COMMAND */	get_id_command,
+		/* GET_PHASE_COMMAND */	get_phase_command,
+		/* RM_COMMAND */	read_memory_command,
+		/* READ_PART_COMMAND */	read_partition_command,
+		/* START_COMMAND */	start_command,
+		/* DOWNLOAD_COMMAND */	download_command
+	};
+
+	/* flush and NACK pending command received during u-boot init
+	 * request command reemit
+	 */
+	stm32prog_serial_result(NACK_BYTE);
+
+	clear_ctrlc(); /* forget any previous Control C */
+	while (!had_ctrlc()) {
+		phase = data->phase;
+
+		if (phase == PHASE_DO_RESET)
+			return true;
+
+		/* Get the user command: read first byte */
+		command = stm32prog_serial_getc();
+
+		if (command == INIT_BYTE) {
+			puts("\nConnected\n");
+			stm32prog_serial_result(ACK_BYTE);
+			continue;
+		}
+
+		found = 0;
+		for (counter = 0; counter < NB_CMD; counter++)
+			if (cmd_id[counter] == command) {
+				found = 1;
+				break;
+			}
+		if (found)
+			if ((command ^ stm32prog_serial_getc()) != 0xFF)
+				found = 0;
+		if (!found) {
+			/* wait to be sure that all data are received
+			 * in the FIFO before flush (CMD and XOR)
+			 */
+			mdelay(3);
+			stm32prog_serial_result(NACK_BYTE);
+		} else {
+			stm32prog_serial_result(ACK_BYTE);
+			cmd_func[counter](data);
+		}
+		WATCHDOG_RESET();
+	}
+
+	/* clean device */
+	if (gd->cur_serial_dev == down_serial_dev) {
+		/* restore console on uart */
+		gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
+	}
+	down_serial_dev = NULL;
+
+	return false; /* no reset after ctrlc */
+}
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
new file mode 100644
index 0000000000..969245e199
--- /dev/null
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/stm32prog_usb.c
@@ -0,0 +1,230 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <dfu.h>
+#include <g_dnl.h>
+#include <usb.h>
+#include <asm/arch/stm32prog.h>
+#include <asm/arch/sys_proto.h>
+#include "stm32prog.h"
+
+static int stm32prog_set_phase(struct stm32prog_data *data, u8 phase,
+			       u32 offset)
+{
+	struct stm32prog_part_t *part;
+	int i;
+
+	if (phase == data->phase) {
+		data->offset = offset;
+		data->dfu_seq = 0;
+		return 0;
+	}
+
+	/* found partition for phase */
+	for (i = 0; i < data->part_nb; i++) {
+		part = &data->part_array[i];
+		if (part->id == phase) {
+			data->cur_part = part;
+			data->phase = phase;
+			data->offset = offset;
+			data->dfu_seq = 0;
+			return 0;
+		}
+	}
+
+	return  -EINVAL;
+}
+
+static int stm32prog_cmd_write(u64 offset, void *buf, long *len)
+{
+	u8 phase;
+	u32 address;
+	u8 *pt = buf;
+	void (*entry)(void);
+	int ret;
+
+	if (*len < 5) {
+		pr_err("size not allowed\n");
+		return  -EINVAL;
+	}
+	if (offset) {
+		pr_err("invalid offset\n");
+		return  -EINVAL;
+	}
+	phase = pt[0];
+	address = (pt[1] << 24) | (pt[2] << 16) | (pt[3] << 8) | pt[4];
+	if (phase == PHASE_RESET) {
+		entry = (void *)address;
+		printf("## Starting application at 0x%x ...\n", address);
+		(*entry)();
+		printf("## Application terminated\n");
+		return 0;
+	}
+	/* set phase and offset */
+	ret = stm32prog_set_phase(stm32prog_data, phase, address);
+	if (ret)
+		pr_err("failed: %d\n", ret);
+	return ret;
+}
+
+#define PHASE_MIN_SIZE	9
+static int stm32prog_cmd_read(u64 offset, void *buf, long *len)
+{
+	u32 destination = DEFAULT_ADDRESS; /* destination address */
+	u32 dfu_offset;
+	u8 *pt_buf = buf;
+	int phase;
+	char *err_msg;
+	int length;
+
+	if (*len < PHASE_MIN_SIZE) {
+		pr_err("request exceeds allowed area\n");
+		return  -EINVAL;
+	}
+	if (offset) {
+		*len = 0; /* EOF for second request */
+		return 0;
+	}
+	phase = stm32prog_data->phase;
+	if (phase == PHASE_FLASHLAYOUT)
+		destination = STM32_DDR_BASE;
+	dfu_offset = stm32prog_data->offset;
+
+	/* mandatory header, size = PHASE_MIN_SIZE */
+	*pt_buf++ = (u8)(phase & 0xFF);
+	*pt_buf++ = (u8)(destination);
+	*pt_buf++ = (u8)(destination >> 8);
+	*pt_buf++ = (u8)(destination >> 16);
+	*pt_buf++ = (u8)(destination >> 24);
+	*pt_buf++ = (u8)(dfu_offset);
+	*pt_buf++ = (u8)(dfu_offset >> 8);
+	*pt_buf++ = (u8)(dfu_offset >> 16);
+	*pt_buf++ = (u8)(dfu_offset >> 24);
+
+	if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
+		err_msg = stm32prog_get_error(stm32prog_data);
+		length = strlen(err_msg);
+		if (length + PHASE_MIN_SIZE > *len)
+			length = *len - PHASE_MIN_SIZE;
+
+		memcpy(pt_buf, err_msg, length);
+		*len = PHASE_MIN_SIZE + length;
+		stm32prog_do_reset(stm32prog_data);
+	} else if (phase == PHASE_FLASHLAYOUT) {
+		*pt_buf++ = stm32prog_data->part_nb ? 1 : 0;
+		*len = PHASE_MIN_SIZE + 1;
+	} else {
+		*len = PHASE_MIN_SIZE;
+	}
+
+	return 0;
+}
+
+int stm32prog_write_medium_virt(struct dfu_entity *dfu, u64 offset,
+				void *buf, long *len)
+{
+	if (dfu->dev_type != DFU_DEV_VIRT)
+		return -EINVAL;
+
+	switch (dfu->data.virt.dev_num) {
+	case PHASE_CMD:
+		return stm32prog_cmd_write(offset, buf, len);
+
+	case PHASE_OTP:
+		return stm32prog_otp_write(stm32prog_data, (u32)offset,
+					   buf, len);
+
+	case PHASE_PMIC:
+		return stm32prog_pmic_write(stm32prog_data, (u32)offset,
+					    buf, len);
+	}
+	*len = 0;
+	return 0;
+}
+
+int stm32prog_read_medium_virt(struct dfu_entity *dfu, u64 offset,
+			       void *buf, long *len)
+{
+	if (dfu->dev_type != DFU_DEV_VIRT)
+		return -EINVAL;
+
+	switch (dfu->data.virt.dev_num) {
+	case PHASE_CMD:
+		return stm32prog_cmd_read(offset, buf, len);
+
+	case PHASE_OTP:
+		return stm32prog_otp_read(stm32prog_data, (u32)offset,
+					  buf, len);
+
+	case PHASE_PMIC:
+		return stm32prog_pmic_read(stm32prog_data, (u32)offset,
+					   buf, len);
+	}
+	*len = 0;
+	return 0;
+}
+
+int stm32prog_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
+{
+	if (dfu->dev_type != DFU_DEV_VIRT) {
+		*size = 0;
+		pr_debug("%s, invalid dev_type = %d\n",
+			 __func__, dfu->dev_type);
+		return -EINVAL;
+	}
+
+	switch (dfu->data.virt.dev_num) {
+	case PHASE_CMD:
+		*size = 512;
+		break;
+	case PHASE_OTP:
+		*size = OTP_SIZE;
+		break;
+	case PHASE_PMIC:
+		*size = PMIC_SIZE;
+		break;
+	}
+
+	return 0;
+}
+
+bool stm32prog_usb_loop(struct stm32prog_data *data, int dev)
+{
+	int ret;
+	bool result;
+	/* USB download gadget for STM32 Programmer */
+	char product[128];
+
+	snprintf(product, sizeof(product),
+		 "USB download gadget@Device ID /0x%03X, @Revision ID /0x%04X",
+		 get_cpu_dev(), get_cpu_rev());
+	g_dnl_set_product(product);
+
+	if (stm32prog_data->phase == PHASE_FLASHLAYOUT) {
+		ret = run_usb_dnl_gadget(dev, "usb_dnl_dfu");
+		if (ret || stm32prog_data->phase == PHASE_DO_RESET)
+			return ret;
+		/* prepare the second enumeration with the FlashLayout */
+		if (stm32prog_data->phase == PHASE_FLASHLAYOUT)
+			stm32prog_dfu_init(data);
+		/* found next selected partition */
+		stm32prog_next_phase(data);
+	}
+
+	ret = run_usb_dnl_gadget(dev, "usb_dnl_dfu");
+
+	result = !!(ret) || (stm32prog_data->phase == PHASE_DO_RESET);
+
+	g_dnl_set_product(NULL);
+
+	return result;
+}
+
+int g_dnl_get_board_bcd_device_number(int gcnum)
+{
+	pr_debug("%s\n", __func__);
+	return 0x200;
+}
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 74d03fa7dd..472b140321 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -7,12 +7,16 @@
 #include <cpu_func.h>
 #include <debug_uart.h>
 #include <env.h>
+#include <init.h>
+#include <log.h>
 #include <misc.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/sys_proto.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
+#include <linux/bitops.h>
 
 /* RCC register */
 #define RCC_TZCR		(STM32_RCC_BASE + 0x00)
@@ -75,6 +79,12 @@
 #define PKG_SHIFT	27
 #define PKG_MASK	GENMASK(2, 0)
 
+/*
+ * early TLB into the .data section so that it not get cleared
+ * with 16kB allignment (see TTBR0_BASE_ADDR_MASK)
+ */
+u8 early_tlb[PGTABLE_SIZE] __section(".data") __aligned(0x4000);
+
 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
 #ifndef CONFIG_TFABOOT
 static void security_init(void)
@@ -187,12 +197,40 @@ u32 get_bootmode(void)
 }
 
 /*
+ * initialize the MMU and activate cache in SPL or in U-Boot pre-reloc stage
+ * MMU/TLB is updated in enable_caches() for U-Boot after relocation
+ * or is deactivated in U-Boot entry function start.S::cpu_init_cp15
+ */
+static void early_enable_caches(void)
+{
+	/* I-cache is already enabled in start.S: cpu_init_cp15 */
+
+	if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+		return;
+
+	gd->arch.tlb_size = PGTABLE_SIZE;
+	gd->arch.tlb_addr = (unsigned long)&early_tlb;
+
+	dcache_enable();
+
+	if (IS_ENABLED(CONFIG_SPL_BUILD))
+		mmu_set_region_dcache_behaviour(STM32_SYSRAM_BASE,
+						STM32_SYSRAM_SIZE,
+						DCACHE_DEFAULT_OPTION);
+	else
+		mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
+						DCACHE_DEFAULT_OPTION);
+}
+
+/*
  * Early system init
  */
 int arch_cpu_init(void)
 {
 	u32 boot_mode;
 
+	early_enable_caches();
+
 	/* early armv7 timer init: needed for polling */
 	timer_init();
 
@@ -225,7 +263,14 @@ int arch_cpu_init(void)
 
 void enable_caches(void)
 {
-	/* Enable D-cache. I-cache is already enabled in start.S */
+	/* I-cache is already enabled in start.S: icache_enable() not needed */
+
+	/* deactivate the data cache, early enabled in arch_cpu_init() */
+	dcache_disable();
+	/*
+	 * update MMU after relocation and enable the data cache
+	 * warning: the TLB location udpated in board_f.c::reserve_mmu
+	 */
 	dcache_enable();
 }
 
@@ -236,6 +281,11 @@ static u32 read_idc(void)
 	return readl(DBGMCU_IDC);
 }
 
+u32 get_cpu_dev(void)
+{
+	return (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
+}
+
 u32 get_cpu_rev(void)
 {
 	return (read_idc() & DBGMCU_IDC_REV_ID_MASK) >> DBGMCU_IDC_REV_ID_SHIFT;
@@ -266,11 +316,7 @@ static u32 get_cpu_rpn(void)
 
 u32 get_cpu_type(void)
 {
-	u32 id;
-
-	id = (read_idc() & DBGMCU_IDC_DEV_ID_MASK) >> DBGMCU_IDC_DEV_ID_SHIFT;
-
-	return (id << 16) | get_cpu_rpn();
+	return (get_cpu_dev() << 16) | get_cpu_rpn();
 }
 
 /* Get Package options from OTP */
@@ -435,6 +481,10 @@ static void setup_boot_mode(void)
 		env_set("boot_device", "nand");
 		env_set("boot_instance", "0");
 		break;
+	case BOOT_FLASH_SPINAND:
+		env_set("boot_device", "spi-nand");
+		env_set("boot_instance", "0");
+		break;
 	case BOOT_FLASH_NOR:
 		env_set("boot_device", "nor");
 		env_set("boot_instance", "0");
diff --git a/arch/arm/mach-stm32mp/dram_init.c b/arch/arm/mach-stm32mp/dram_init.c
index 7688b3e315..0e8ce63f4a 100644
--- a/arch/arm/mach-stm32mp/dram_init.c
+++ b/arch/arm/mach-stm32mp/dram_init.c
@@ -5,6 +5,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <image.h>
+#include <init.h>
+#include <lmb.h>
+#include <log.h>
 #include <ram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -31,3 +35,20 @@ int dram_init(void)
 
 	return 0;
 }
+
+ulong board_get_usable_ram_top(ulong total_size)
+{
+	phys_addr_t reg;
+	struct lmb lmb;
+
+	/* found enough not-reserved memory to relocated U-Boot */
+	lmb_init(&lmb);
+	lmb_add(&lmb, gd->ram_base, gd->ram_size);
+	boot_fdt_add_mem_rsv_regions(&lmb, (void *)gd->fdt_blob);
+	reg = lmb_alloc(&lmb, CONFIG_SYS_MALLOC_LEN + total_size, SZ_4K);
+
+	if (reg)
+		return ALIGN(reg + CONFIG_SYS_MALLOC_LEN + total_size, SZ_4K);
+
+	return gd->ram_top;
+}
diff --git a/arch/arm/mach-stm32mp/fdt.c b/arch/arm/mach-stm32mp/fdt.c
index 3ee7d6a833..c723b223e0 100644
--- a/arch/arm/mach-stm32mp/fdt.c
+++ b/arch/arm/mach-stm32mp/fdt.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <log.h>
+#include <tee.h>
 #include <asm/arch/sys_proto.h>
 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
 #include <linux/io.h>
@@ -218,6 +220,26 @@ static void stm32_fdt_disable(void *fdt, int offset, u32 addr,
 		       string, addr, name);
 }
 
+static void stm32_fdt_disable_optee(void *blob)
+{
+	int off, node;
+
+	off = fdt_node_offset_by_compatible(blob, -1, "linaro,optee-tz");
+	if (off >= 0 && fdtdec_get_is_enabled(blob, off))
+		fdt_status_disabled(blob, off);
+
+	/* Disabled "optee@..." reserved-memory node */
+	off = fdt_path_offset(blob, "/reserved-memory/");
+	if (off < 0)
+		return;
+	for (node = fdt_first_subnode(blob, off);
+	     node >= 0;
+	     node = fdt_next_subnode(blob, node)) {
+		if (!strncmp(fdt_get_name(blob, node, NULL), "optee@", 6))
+			fdt_status_disabled(blob, node);
+	}
+}
+
 /*
  * This function is called right before the kernel is booted. "blob" is the
  * device tree that will be passed to the kernel.
@@ -302,5 +324,9 @@ int ft_system_setup(void *blob, bd_t *bd)
 				       "st,package", pkg, false);
 	}
 
+	if (!CONFIG_IS_ENABLED(OPTEE) ||
+	    !tee_find_device(NULL, NULL, NULL, NULL))
+		stm32_fdt_disable_optee(blob);
+
 	return ret;
 }
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32.h b/arch/arm/mach-stm32mp/include/mach/stm32.h
index 76d593d785..5fdb893b0e 100644
--- a/arch/arm/mach-stm32mp/include/mach/stm32.h
+++ b/arch/arm/mach-stm32mp/include/mach/stm32.h
@@ -6,6 +6,10 @@
 #ifndef _MACH_STM32_H_
 #define _MACH_STM32_H_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /*
  * Peripheral memory map
  * only address used before device tree parsing
@@ -80,6 +84,9 @@ enum boot_device {
 
 	BOOT_SERIAL_USB = 0x60,
 	BOOT_SERIAL_USB_OTG = 0x62,
+
+	BOOT_FLASH_SPINAND = 0x70,
+	BOOT_FLASH_SPINAND_1 = 0x71,
 };
 
 /* TAMP registers */
@@ -130,5 +137,5 @@ enum forced_boot_mode {
 #define BSEC_OTP_MAC	57
 #define BSEC_OTP_BOARD	59
 
-#endif /* __ASSEMBLY__*/
+#endif /* __ASSEMBLY__ */
 #endif /* _MACH_STM32_H_ */
diff --git a/arch/arm/mach-stm32mp/include/mach/stm32prog.h b/arch/arm/mach-stm32mp/include/mach/stm32prog.h
new file mode 100644
index 0000000000..c080b9cc42
--- /dev/null
+++ b/arch/arm/mach-stm32mp/include/mach/stm32prog.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#define STM32PROG_VIRT_FIRST_DEV_NUM		0xF1
+
+int stm32prog_write_medium_virt(struct dfu_entity *dfu, u64 offset,
+				void *buf, long *len);
+int stm32prog_read_medium_virt(struct dfu_entity *dfu, u64 offset,
+			       void *buf, long *len);
+int stm32prog_get_medium_size_virt(struct dfu_entity *dfu, u64 *size);
+
+bool stm32prog_get_tee_partitions(void);
+
+bool stm32prog_get_fsbl_nor(void);
diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 1617126bea..4b6c7b8bdd 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -20,6 +20,11 @@
 /* return CPU_STMP32MP...Xxx constants */
 u32 get_cpu_type(void);
 
+#define CPU_DEV_STM32MP15	0x500
+
+/* return CPU_DEV constants */
+u32 get_cpu_dev(void);
+
 #define CPU_REVA	0x1000
 #define CPU_REVB	0x2000
 #define CPU_REVZ	0x2001
diff --git a/arch/arm/mach-stm32mp/psci.c b/arch/arm/mach-stm32mp/psci.c
index 3fb038d3e7..155aa79cd5 100644
--- a/arch/arm/mach-stm32mp/psci.c
+++ b/arch/arm/mach-stm32mp/psci.c
@@ -6,10 +6,12 @@
 #include <config.h>
 #include <common.h>
 #include <asm/armv7.h>
+#include <asm/cache.h>
 #include <asm/gic.h>
 #include <asm/io.h>
 #include <asm/psci.h>
 #include <asm/secure.h>
+#include <linux/bitops.h>
 
 #define BOOT_API_A7_CORE0_MAGIC_NUMBER	0xCA7FACE0
 #define BOOT_API_A7_CORE1_MAGIC_NUMBER	0xCA7FACE1
diff --git a/arch/arm/mach-stm32mp/pwr_regulator.c b/arch/arm/mach-stm32mp/pwr_regulator.c
index b52e1e85d5..900dee4c38 100644
--- a/arch/arm/mach-stm32mp/pwr_regulator.c
+++ b/arch/arm/mach-stm32mp/pwr_regulator.c
@@ -9,6 +9,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/arch/arm/mach-stm32mp/spl.c b/arch/arm/mach-stm32mp/spl.c
index f85391c6af..39413e9a0e 100644
--- a/arch/arm/mach-stm32mp/spl.c
+++ b/arch/arm/mach-stm32mp/spl.c
@@ -4,9 +4,13 @@
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <dm.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <linux/libfdt.h>
@@ -39,6 +43,8 @@ u32 spl_boot_device(void)
 		return BOOT_DEVICE_NAND;
 	case BOOT_FLASH_NOR_QSPI:
 		return BOOT_DEVICE_SPI;
+	case BOOT_FLASH_SPINAND_1:
+		return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
 	}
 
 	return BOOT_DEVICE_MMC1;
@@ -76,6 +82,11 @@ void spl_display_print(void)
 }
 #endif
 
+__weak int board_early_init_f(void)
+{
+	return 0;
+}
+
 void board_init_f(ulong dummy)
 {
 	struct udevice *dev;
@@ -92,27 +103,51 @@ void board_init_f(ulong dummy)
 	ret = uclass_get_device(UCLASS_CLK, 0, &dev);
 	if (ret) {
 		debug("Clock init failed: %d\n", ret);
-		return;
+		hang();
 	}
 
 	ret = uclass_get_device(UCLASS_RESET, 0, &dev);
 	if (ret) {
 		debug("Reset init failed: %d\n", ret);
-		return;
+		hang();
 	}
 
 	ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
 	if (ret) {
 		debug("%s: Cannot find pinctrl device\n", __func__);
-		return;
+		hang();
 	}
 
 	/* enable console uart printing */
 	preloader_console_init();
 
+	ret = board_early_init_f();
+	if (ret) {
+		debug("board_early_init_f() failed: %d\n", ret);
+		hang();
+	}
+
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret) {
 		printf("DRAM init failed: %d\n", ret);
 		hang();
 	}
+
+	/*
+	 * activate cache on DDR only when DDR is fully initialized
+	 * to avoid speculative access and issue in get_ram_size()
+	 */
+	if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+		mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
+						DCACHE_DEFAULT_OPTION);
+}
+
+void spl_board_prepare_for_boot(void)
+{
+	dcache_disable();
+}
+
+void spl_board_prepare_for_boot_linux(void)
+{
+	dcache_disable();
 }
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index b487b265af..f40fccd8f8 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -11,10 +11,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <log.h>
 #include <mmc.h>
 #include <i2c.h>
 #include <serial.h>
 #include <spl.h>
+#include <asm/cache.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/mach-sunxi/clock_sun6i.c b/arch/arm/mach-sunxi/clock_sun6i.c
index 6ca38f73d9..8e84062bd7 100644
--- a/arch/arm/mach-sunxi/clock_sun6i.c
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
@@ -14,6 +14,8 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/prcm.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_SPL_BUILD
 void clock_init_safe(void)
diff --git a/arch/arm/mach-sunxi/clock_sun8i_a83t.c b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
index a55a6162d4..31e4281529 100644
--- a/arch/arm/mach-sunxi/clock_sun8i_a83t.c
+++ b/arch/arm/mach-sunxi/clock_sun8i_a83t.c
@@ -14,6 +14,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/prcm.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_SPL_BUILD
 void clock_init_safe(void)
diff --git a/arch/arm/mach-sunxi/cpu_info.c b/arch/arm/mach-sunxi/cpu_info.c
index ae4745bfec..875e5a1a8a 100644
--- a/arch/arm/mach-sunxi/cpu_info.c
+++ b/arch/arm/mach-sunxi/cpu_info.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/mach-sunxi/dram_sun4i.c b/arch/arm/mach-sunxi/dram_sun4i.c
index 72de807a47..76d698214d 100644
--- a/arch/arm/mach-sunxi/dram_sun4i.c
+++ b/arch/arm/mach-sunxi/dram_sun4i.c
@@ -27,6 +27,7 @@
 #include <asm/arch/dram.h>
 #include <asm/arch/timer.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 #define CPU_CFG_CHIP_VER(n) ((n) << 6)
 #define CPU_CFG_CHIP_VER_MASK CPU_CFG_CHIP_VER(0x3)
diff --git a/arch/arm/mach-sunxi/dram_sun50i_h6.c b/arch/arm/mach-sunxi/dram_sun50i_h6.c
index 9375db76a1..9e34da4747 100644
--- a/arch/arm/mach-sunxi/dram_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/dram_sun50i_h6.c
@@ -1,16 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * sun50i H6 platform dram controller init
  *
  * (C) Copyright 2017      Icenowy Zheng <icenowy@aosc.io>
  *
- * SPDX-License-Identifier:	GPL-2.0+
  */
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/cpu.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/kconfig.h>
 
 /*
diff --git a/arch/arm/mach-sunxi/dram_sun6i.c b/arch/arm/mach-sunxi/dram_sun6i.c
index f473230bb5..0590110d4a 100644
--- a/arch/arm/mach-sunxi/dram_sun6i.c
+++ b/arch/arm/mach-sunxi/dram_sun6i.c
@@ -11,10 +11,12 @@
  */
 #include <common.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/prcm.h>
+#include <linux/delay.h>
 
 #define DRAM_CLK (CONFIG_DRAM_CLK * 1000000)
 
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a23.c b/arch/arm/mach-sunxi/dram_sun8i_a23.c
index 9f00fefb77..3ed97b59a3 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a23.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a23.c
@@ -21,10 +21,12 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/prcm.h>
+#include <linux/delay.h>
 
 static const struct dram_para dram_para = {
 	.clock = CONFIG_DRAM_CLK,
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c
index 5da01922bf..d99a38b10a 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a33.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c
@@ -9,10 +9,12 @@
  */
 #include <common.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/prcm.h>
+#include <linux/delay.h>
 
 /* PLL runs at 2x dram-clk, controller runs at PLL / 4 (dram-clk / 2) */
 #define DRAM_CLK_MUL 2
diff --git a/arch/arm/mach-sunxi/dram_sun8i_a83t.c b/arch/arm/mach-sunxi/dram_sun8i_a83t.c
index 2c43b3ceba..a3f833dd34 100644
--- a/arch/arm/mach-sunxi/dram_sun8i_a83t.c
+++ b/arch/arm/mach-sunxi/dram_sun8i_a83t.c
@@ -9,10 +9,12 @@
  */
 #include <common.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/prcm.h>
+#include <linux/delay.h>
 
 #define DRAM_CLK_MUL 2
 #define DRAM_CLK_DIV 1
diff --git a/arch/arm/mach-sunxi/dram_sun9i.c b/arch/arm/mach-sunxi/dram_sun9i.c
index 77cc60623e..14be212e89 100644
--- a/arch/arm/mach-sunxi/dram_sun9i.c
+++ b/arch/arm/mach-sunxi/dram_sun9i.c
@@ -13,6 +13,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 85e7a1874e..a462538521 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -9,10 +9,13 @@
  * (C) Copyright 2015      Jens Kuske <jenskuske@gmail.com>
  */
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/cpu.h>
+#include <linux/delay.h>
 #include <linux/kconfig.h>
 
 static void mctl_phy_init(u32 val)
@@ -76,15 +79,15 @@ enum {
 	MBUS_QOS_HIGHEST
 };
 
-inline void mbus_configure_port(u8 port,
-				bool bwlimit,
-				bool priority,
-				u8 qos,         /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */
-				u8 waittime,    /* 0 .. 0xf */
-				u8 acs,         /* 0 .. 0xff */
-				u16 bwl0,       /* 0 .. 0xffff, bandwidth limit in MB/s */
-				u16 bwl1,
-				u16 bwl2)
+static inline void mbus_configure_port(u8 port,
+				       bool bwlimit,
+				       bool priority,
+				       u8 qos,         /* MBUS_QOS_LOWEST .. MBUS_QOS_HIGEST */
+				       u8 waittime,    /* 0 .. 0xf */
+				       u8 acs,         /* 0 .. 0xff */
+				       u16 bwl0,       /* 0 .. 0xffff, bandwidth limit in MB/s */
+				       u16 bwl1,
+				       u16 bwl2)
 {
 	struct sunxi_mctl_com_reg * const mctl_com =
 			(struct sunxi_mctl_com_reg *)SUNXI_DRAM_COM_BASE;
diff --git a/arch/arm/mach-sunxi/spl_spi_sunxi.c b/arch/arm/mach-sunxi/spl_spi_sunxi.c
index a3997b2590..15e86cbac8 100644
--- a/arch/arm/mach-sunxi/spl_spi_sunxi.c
+++ b/arch/arm/mach-sunxi/spl_spi_sunxi.c
@@ -4,9 +4,13 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 
 #ifdef CONFIG_SPL_OS_BOOT
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index ff9f29f2d5..00facf492e 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -1,4 +1,4 @@
-if TEGRA
+if ARCH_TEGRA
 
 config SPL_GPIO_SUPPORT
 	default y
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 84c20a48ad..532730fe72 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -7,6 +7,7 @@
 /* Tegra AP (Application Processor) code */
 
 #include <common.h>
+#include <log.h>
 #include <linux/bug.h>
 #include <asm/io.h>
 #include <asm/arch/gp_padctrl.h>
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 31c49a7c84..03faacbd57 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -8,8 +8,10 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <ns16550.h>
 #include <spl.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #if IS_ENABLED(CONFIG_TEGRA_CLKRST)
 #include <asm/arch/clock.h>
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 224efc97c5..48c4f32d6f 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -9,6 +9,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <ns16550.h>
 #include <usb.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index 390229436e..16c4cf306e 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -8,7 +8,10 @@
 #include <fdt_support.h>
 #include <fdtdec.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
+#include <net.h>
 #include <stdlib.h>
 #include <string.h>
 
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 31b6aa2cfc..18c19dbf60 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -9,6 +9,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
@@ -17,6 +18,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
 #include <asm/arch-tegra/timer.h>
+#include <linux/delay.h>
 
 /*
  * This is our record of the current clock rate of each clock. We don't
diff --git a/arch/arm/mach-tegra/cmd_enterrcm.c b/arch/arm/mach-tegra/cmd_enterrcm.c
index b2252f3621..25df31a3b8 100644
--- a/arch/arm/mach-tegra/cmd_enterrcm.c
+++ b/arch/arm/mach-tegra/cmd_enterrcm.c
@@ -25,13 +25,15 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <irq_func.h>
 #include <asm/arch/tegra.h>
 #include <asm/arch-tegra/pmc.h>
+#include <linux/delay.h>
 
-static int do_enterrcm(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_enterrcm(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	puts("Entering RCM...\n");
 	udelay(50000);
diff --git a/arch/arm/mach-tegra/cpu.c b/arch/arm/mach-tegra/cpu.c
index 3d140760e6..65b15b79fe 100644
--- a/arch/arm/mach-tegra/cpu.c
+++ b/arch/arm/mach-tegra/cpu.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gp_padctrl.h>
@@ -12,6 +13,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
 #include <asm/arch-tegra/scu.h>
+#include <linux/delay.h>
 #include "cpu.h"
 
 int get_num_cpus(void)
diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c
index e047f67821..13ffade040 100644
--- a/arch/arm/mach-tegra/gpu.c
+++ b/arch/arm/mach-tegra/gpu.c
@@ -6,6 +6,7 @@
 /* Tegra vpr routines */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/tegra.h>
 #include <asm/arch/mc.h>
diff --git a/arch/arm/mach-tegra/ivc.c b/arch/arm/mach-tegra/ivc.c
index a448f2df30..e7c6d78744 100644
--- a/arch/arm/mach-tegra/ivc.c
+++ b/arch/arm/mach-tegra/ivc.c
@@ -7,6 +7,7 @@
 #include <cpu_func.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/ivc.h>
+#include <linux/bug.h>
 
 #define TEGRA_IVC_ALIGN 64
 
diff --git a/arch/arm/mach-tegra/pinmux-common.c b/arch/arm/mach-tegra/pinmux-common.c
index 1771991fbb..16b03bfe7b 100644
--- a/arch/arm/mach-tegra/pinmux-common.c
+++ b/arch/arm/mach-tegra/pinmux-common.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
 
diff --git a/arch/arm/mach-tegra/pmc.c b/arch/arm/mach-tegra/pmc.c
index 68a211286f..cdc8493efd 100644
--- a/arch/arm/mach-tegra/pmc.c
+++ b/arch/arm/mach-tegra/pmc.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 
 #include <linux/arm-smccc.h>
 
diff --git a/arch/arm/mach-tegra/powergate.c b/arch/arm/mach-tegra/powergate.c
index 761c9ef19e..631bc04e95 100644
--- a/arch/arm/mach-tegra/powergate.c
+++ b/arch/arm/mach-tegra/powergate.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/types.h>
diff --git a/arch/arm/mach-tegra/spl.c b/arch/arm/mach-tegra/spl.c
index 13ddbc3b81..ed897efc5f 100644
--- a/arch/arm/mach-tegra/spl.c
+++ b/arch/arm/mach-tegra/spl.c
@@ -7,6 +7,7 @@
  */
 #include <common.h>
 #include <debug_uart.h>
+#include <log.h>
 #include <spl.h>
 
 #include <asm/io.h>
diff --git a/arch/arm/mach-tegra/sys_info.c b/arch/arm/mach-tegra/sys_info.c
index 5dc998a52b..5ad586ac17 100644
--- a/arch/arm/mach-tegra/sys_info.c
+++ b/arch/arm/mach-tegra/sys_info.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <linux/ctype.h>
 #if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
 #include <asm/arch-tegra/pmc.h>
diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c
index ad09cc52eb..167589d1bb 100644
--- a/arch/arm/mach-tegra/tegra114/clock.c
+++ b/arch/arm/mach-tegra/tegra114/clock.c
@@ -7,6 +7,8 @@
 /* Tegra114 Clock control functions */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sysctr.h>
@@ -15,6 +17,7 @@
 #include <asm/arch-tegra/timer.h>
 #include <div64.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 
 /*
  * Clock types that we can use as a source. The Tegra114 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra114/cpu.c b/arch/arm/mach-tegra/tegra114/cpu.c
index 09b52f559f..62c1053630 100644
--- a/arch/arm/mach-tegra/tegra114/cpu.c
+++ b/arch/arm/mach-tegra/tegra114/cpu.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/flow.h>
@@ -12,6 +13,7 @@
 #include <asm/arch/tegra.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
+#include <linux/delay.h>
 #include "../cpu.h"
 
 /* Tegra114-specific CPU init code */
diff --git a/arch/arm/mach-tegra/tegra114/funcmux.c b/arch/arm/mach-tegra/tegra114/funcmux.c
index 8fe5e9e357..23a27c8688 100644
--- a/arch/arm/mach-tegra/tegra114/funcmux.c
+++ b/arch/arm/mach-tegra/tegra114/funcmux.c
@@ -6,6 +6,7 @@
 /* Tegra114 high-level function multiplexing */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c
index 70916ea3c1..79e67f5194 100644
--- a/arch/arm/mach-tegra/tegra124/clock.c
+++ b/arch/arm/mach-tegra/tegra124/clock.c
@@ -7,6 +7,8 @@
 /* Tegra124 Clock control functions */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sysctr.h>
@@ -15,6 +17,7 @@
 #include <asm/arch-tegra/timer.h>
 #include <div64.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 
 /*
  * Clock types that we can use as a source. The Tegra124 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c
index abc050c27b..d5f2683b26 100644
--- a/arch/arm/mach-tegra/tegra124/cpu.c
+++ b/arch/arm/mach-tegra/tegra124/cpu.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/ahb.h>
 #include <asm/arch/clock.h>
@@ -14,6 +15,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
 #include <asm/arch-tegra/ap.h>
+#include <linux/delay.h>
 #include "../cpu.h"
 
 /* Tegra124-specific CPU init code */
diff --git a/arch/arm/mach-tegra/tegra124/funcmux.c b/arch/arm/mach-tegra/tegra124/funcmux.c
index a8fcac6038..e7ad85fde2 100644
--- a/arch/arm/mach-tegra/tegra124/funcmux.c
+++ b/arch/arm/mach-tegra/tegra124/funcmux.c
@@ -7,6 +7,7 @@
 /* Tegra124 high-level function multiplexing */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-tegra/tegra124/xusb-padctl.c b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
index 09ab8c78cf..38afc3cbe6 100644
--- a/arch/arm/mach-tegra/tegra124/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra124/xusb-padctl.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
+#include <linux/delay.h>
 
 #include "../xusb-padctl-common.h"
 
diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c
index 8f1bb4f069..24e8a13b1f 100644
--- a/arch/arm/mach-tegra/tegra20/clock.c
+++ b/arch/arm/mach-tegra/tegra20/clock.c
@@ -9,6 +9,8 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/tegra.h>
@@ -16,6 +18,7 @@
 #include <asm/arch-tegra/timer.h>
 #include <div64.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 
 /*
  * Clock types that we can use as a source. The Tegra20 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra20/cpu.c b/arch/arm/mach-tegra/tegra20/cpu.c
index 2d14ac9d95..e5b60598f7 100644
--- a/arch/arm/mach-tegra/tegra20/cpu.c
+++ b/arch/arm/mach-tegra/tegra20/cpu.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/arch/tegra.h>
 #include <asm/arch-tegra/pmc.h>
+#include <linux/delay.h>
 #include "../cpu.h"
 
 static void enable_cpu_power_rail(void)
diff --git a/arch/arm/mach-tegra/tegra20/crypto.c b/arch/arm/mach-tegra/tegra20/crypto.c
index b91191eba3..1efaa5c3ec 100644
--- a/arch/arm/mach-tegra/tegra20/crypto.c
+++ b/arch/arm/mach-tegra/tegra20/crypto.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/errno.h>
 #include "crypto.h"
 #include "uboot_aes.h"
diff --git a/arch/arm/mach-tegra/tegra20/emc.c b/arch/arm/mach-tegra/tegra20/emc.c
index dff9ac0a4d..d55b09b4ac 100644
--- a/arch/arm/mach-tegra/tegra20/emc.c
+++ b/arch/arm/mach-tegra/tegra20/emc.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/ap.h>
 #include <asm/arch-tegra/apb_misc.h>
diff --git a/arch/arm/mach-tegra/tegra20/funcmux.c b/arch/arm/mach-tegra/tegra20/funcmux.c
index 2ee0f6ea76..90fe0cba8e 100644
--- a/arch/arm/mach-tegra/tegra20/funcmux.c
+++ b/arch/arm/mach-tegra/tegra20/funcmux.c
@@ -5,6 +5,7 @@
 
 /* Tegra20 high-level function multiplexing */
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-tegra/tegra20/pmu.c b/arch/arm/mach-tegra/tegra20/pmu.c
index d63db8afa0..05d0668cdb 100644
--- a/arch/arm/mach-tegra/tegra20/pmu.c
+++ b/arch/arm/mach-tegra/tegra20/pmu.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <tps6586x.h>
 #include <asm/io.h>
 #include <asm/arch/tegra.h>
diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c
index 00c65c281f..ccc64eb77b 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -8,6 +8,9 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sysctr.h>
@@ -16,6 +19,8 @@
 #include <asm/arch-tegra/timer.h>
 #include <div64.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /*
  * Clock types that we can use as a source. The Tegra210 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra210/funcmux.c b/arch/arm/mach-tegra/tegra210/funcmux.c
index 7f00d7b604..30d994a17f 100644
--- a/arch/arm/mach-tegra/tegra210/funcmux.c
+++ b/arch/arm/mach-tegra/tegra210/funcmux.c
@@ -7,6 +7,7 @@
 /* Tegra210 high-level function multiplexing */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
index 64dc297ae2..d160ce4c99 100644
--- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c
+++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <dm/of_access.h>
 #include <dm/ofnode.h>
+#include <linux/delay.h>
 
 #include "../xusb-padctl-common.h"
 
diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c
index dd1193be14..b0641c6a41 100644
--- a/arch/arm/mach-tegra/tegra30/clock.c
+++ b/arch/arm/mach-tegra/tegra30/clock.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/tegra.h>
@@ -15,6 +17,7 @@
 #include <asm/arch-tegra/timer.h>
 #include <div64.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 
 /*
  * Clock types that we can use as a source. The Tegra30 has muxes for the
diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c
index 45a5c091ec..651edd27ee 100644
--- a/arch/arm/mach-tegra/tegra30/cpu.c
+++ b/arch/arm/mach-tegra/tegra30/cpu.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/flow.h>
@@ -11,6 +12,7 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
 #include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
 #include "../cpu.h"
 
 /* Tegra30-specific CPU init code */
diff --git a/arch/arm/mach-tegra/tegra30/funcmux.c b/arch/arm/mach-tegra/tegra30/funcmux.c
index b3de980ad3..c3ee787f33 100644
--- a/arch/arm/mach-tegra/tegra30/funcmux.c
+++ b/arch/arm/mach-tegra/tegra30/funcmux.c
@@ -6,6 +6,7 @@
 /* Tegra30 high-level function multiplexing */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
diff --git a/arch/arm/mach-tegra/xusb-padctl-common.c b/arch/arm/mach-tegra/xusb-padctl-common.c
index c3fb30e24d..e56e27c8b6 100644
--- a/arch/arm/mach-tegra/xusb-padctl-common.c
+++ b/arch/arm/mach-tegra/xusb-padctl-common.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 
 #include "xusb-padctl-common.h"
 
diff --git a/arch/arm/mach-u8500/cache.c b/arch/arm/mach-u8500/cache.c
index 3d96d09f31..f9fd4fe7d3 100644
--- a/arch/arm/mach-u8500/cache.c
+++ b/arch/arm/mach-u8500/cache.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <asm/armv7.h>
+#include <asm/cache.h>
 #include <asm/pl310.h>
 
 #define PL310_WAY_MASK	0xff
diff --git a/arch/arm/mach-u8500/cpuinfo.c b/arch/arm/mach-u8500/cpuinfo.c
index 20f5ff3398..ab05b8a51b 100644
--- a/arch/arm/mach-u8500/cpuinfo.c
+++ b/arch/arm/mach-u8500/cpuinfo.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 
 #define U8500_BOOTROM_BASE	0x90000000
diff --git a/arch/arm/mach-uniphier/arm32/cache-uniphier.c b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
index b6e4abbad0..cde2a8124f 100644
--- a/arch/arm/mach-uniphier/arm32/cache-uniphier.c
+++ b/arch/arm/mach-uniphier/arm32/cache-uniphier.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <cpu_func.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-uniphier/arm32/psci.c b/arch/arm/mach-uniphier/arm32/psci.c
index 9a3793316a..a4d260aece 100644
--- a/arch/arm/mach-uniphier/arm32/psci.c
+++ b/arch/arm/mach-uniphier/arm32/psci.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <cpu_func.h>
 #include <linux/bitops.h>
 #include <linux/delay.h>
@@ -16,6 +15,7 @@
 #include <asm/processor.h>
 #include <asm/psci.h>
 #include <asm/secure.h>
+#include <asm/system.h>
 
 #include "../debug.h"
 #include "../soc-info.h"
diff --git a/arch/arm/mach-uniphier/arm32/timer.c b/arch/arm/mach-uniphier/arm32/timer.c
index 899b539104..a40bdf1705 100644
--- a/arch/arm/mach-uniphier/arm32/timer.c
+++ b/arch/arm/mach-uniphier/arm32/timer.c
@@ -3,7 +3,8 @@
  * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <config.h>
+#include <init.h>
 #include <linux/io.h>
 
 #include "arm-mpcore.h"
diff --git a/arch/arm/mach-uniphier/arm64/mem_map.c b/arch/arm/mach-uniphier/arm64/mem_map.c
index 7653bd2d3c..a8bd4eee89 100644
--- a/arch/arm/mach-uniphier/arm64/mem_map.c
+++ b/arch/arm/mach-uniphier/arm64/mem_map.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/types.h>
 #include <asm/armv8/mmu.h>
 
diff --git a/arch/arm/mach-uniphier/base-address.c b/arch/arm/mach-uniphier/base-address.c
index 5ee742e363..d7456f8df6 100644
--- a/arch/arm/mach-uniphier/base-address.c
+++ b/arch/arm/mach-uniphier/base-address.c
@@ -3,9 +3,9 @@
 // Copyright (C) 2019 Socionext Inc.
 //   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 
-#include <common.h>
 #include <dm/of.h>
 #include <fdt_support.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/libfdt.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c
index 378aad0c9c..b800e8b8c6 100644
--- a/arch/arm/mach-uniphier/board_late_init.c
+++ b/arch/arm/mach-uniphier/board_late_init.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <env.h>
 #include <init.h>
 #include <spl.h>
diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c
index d9a8d2f28a..3e2ec9b26a 100644
--- a/arch/arm/mach-uniphier/boards.c
+++ b/arch/arm/mach-uniphier/boards.c
@@ -4,9 +4,9 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/libfdt.h>
 #include <linux/kernel.h>
+#include <asm/global_data.h>
 
 #include "init.h"
 
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c
index 11e70a926f..4689ed79fd 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device-ld11.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c b/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c
index 02b239475f..c6aef18c19 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device-ld4.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c b/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c
index 55452484d9..efd07a3296 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device-pro5.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c b/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c
index 49c5da1469..677470cdc6 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device-pxs2.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c
index 2edf66d5c1..6888099312 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device-pxs3.c
@@ -4,8 +4,8 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <spl.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 
diff --git a/arch/arm/mach-uniphier/boot-device/boot-device.c b/arch/arm/mach-uniphier/boot-device/boot-device.c
index 83f8c6a428..69a35f5fb8 100644
--- a/arch/arm/mach-uniphier/boot-device/boot-device.c
+++ b/arch/arm/mach-uniphier/boot-device/boot-device.c
@@ -4,9 +4,12 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <command.h>
 #include <spl.h>
 #include <stdio.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/log2.h>
 
@@ -205,7 +208,8 @@ int uniphier_boot_from_backend(void)
 
 #ifndef CONFIG_SPL_BUILD
 
-static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_pinmon(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	const struct uniphier_boot_device_info *info;
 	u32 pinmon;
diff --git a/arch/arm/mach-uniphier/clk/clk-dram-ld4.c b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c
index c796d364bb..3b721eaf23 100644
--- a/arch/arm/mach-uniphier/clk/clk-dram-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-ld4.c
@@ -4,7 +4,6 @@
  * Copyright (C) 2015-2017 Socionext Inc.
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
index b78bd01672..75d3e70d6a 100644
--- a/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
+++ b/arch/arm/mach-uniphier/clk/clk-dram-pxs2.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2016-2017 Socionext Inc.
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/clk/clk-early-ld4.c b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
index 0f9ce65097..25b72d8926 100644
--- a/arch/arm/mach-uniphier/clk/clk-early-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-early-ld4.c
@@ -4,7 +4,6 @@
  * Copyright (C) 2015-2017 Socionext Inc.
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c
index 0917b33c25..d241a65382 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -3,9 +3,9 @@
  * Copyright (C) 2016 Socionext Inc.
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include "../init.h"
diff --git a/arch/arm/mach-uniphier/clk/dpll-ld4.c b/arch/arm/mach-uniphier/clk/dpll-ld4.c
index 72fe8db8dd..3ccaf02242 100644
--- a/arch/arm/mach-uniphier/clk/dpll-ld4.c
+++ b/arch/arm/mach-uniphier/clk/dpll-ld4.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2015-2016 Socionext Inc.
  */
 
-#include <common.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/clk/dpll-pro4.c b/arch/arm/mach-uniphier/clk/dpll-pro4.c
index 6259495484..44006ae6dc 100644
--- a/arch/arm/mach-uniphier/clk/dpll-pro4.c
+++ b/arch/arm/mach-uniphier/clk/dpll-pro4.c
@@ -4,7 +4,7 @@
  * Copyright (C) 2015-2016 Socionext Inc.
  */
 
-#include <common.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/cpu-info.c b/arch/arm/mach-uniphier/cpu-info.c
index 6a7b203a44..1ede50771e 100644
--- a/arch/arm/mach-uniphier/cpu-info.c
+++ b/arch/arm/mach-uniphier/cpu-info.c
@@ -5,6 +5,7 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
+#include <init.h>
 #include <stdio.h>
 #include <linux/errno.h>
 #include <linux/io.h>
diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
index a70ce59acc..d116d46812 100644
--- a/arch/arm/mach-uniphier/debug-uart/debug-uart.c
+++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <debug_uart.h>
 #include <linux/io.h>
 #include <linux/serial_reg.h>
diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
index 9a25bba599..629f8b90c9 100644
--- a/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
+++ b/arch/arm/mach-uniphier/dram/cmd_ddrmphy.c
@@ -4,7 +4,7 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <command.h>
 #include <stdio.h>
 #include <linux/io.h>
 #include <linux/printk.h>
@@ -291,7 +291,8 @@ static void reg_dump(const struct uniphier_ddrmphy_param *param)
 	}
 }
 
-static int do_ddrm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ddrm(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	const struct uniphier_ddrmphy_param *param;
 	char *cmd;
diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
index a616a2aafb..ca519d1c7e 100644
--- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
+++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c
@@ -5,7 +5,7 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <command.h>
 #include <stdio.h>
 #include <linux/io.h>
 #include <linux/printk.h>
@@ -261,7 +261,8 @@ static void reg_dump(const struct uniphier_ddrphy_param *param)
 	}
 }
 
-static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ddr(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	const struct uniphier_ddrphy_param *param;
 	char *cmd;
diff --git a/arch/arm/mach-uniphier/dram/ddrphy-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-regs.h
index 6a041c500b..8b342921bf 100644
--- a/arch/arm/mach-uniphier/dram/ddrphy-regs.h
+++ b/arch/arm/mach-uniphier/dram/ddrphy-regs.h
@@ -9,6 +9,7 @@
 #ifndef ARCH_DDRPHY_REGS_H
 #define ARCH_DDRPHY_REGS_H
 
+#include <linux/bitops.h>
 #define PHY_REG_SHIFT		2
 
 #define PHY_RIDR		(0x000 << PHY_REG_SHIFT)
diff --git a/arch/arm/mach-uniphier/dram/umc-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c
index 2d1f3e3dc0..96acca2562 100644
--- a/arch/arm/mach-uniphier/dram/umc-ld4.c
+++ b/arch/arm/mach-uniphier/dram/umc-ld4.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c
index 012e5f869b..cde39b499b 100644
--- a/arch/arm/mach-uniphier/dram/umc-pro4.c
+++ b/arch/arm/mach-uniphier/dram/umc-pro4.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-pxs2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c
index 5392ffa603..73574201e3 100644
--- a/arch/arm/mach-uniphier/dram/umc-pxs2.c
+++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c
@@ -7,6 +7,7 @@
  * Copyright (C) 2015 Socionext Inc.
  */
 
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
diff --git a/arch/arm/mach-uniphier/dram/umc-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c
index b55b04415c..a11586952d 100644
--- a/arch/arm/mach-uniphier/dram/umc-sld8.c
+++ b/arch/arm/mach-uniphier/dram/umc-sld8.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-uniphier/dram_init.c b/arch/arm/mach-uniphier/dram_init.c
index 5f9d90fe6d..7f2753190c 100644
--- a/arch/arm/mach-uniphier/dram_init.c
+++ b/arch/arm/mach-uniphier/dram_init.c
@@ -5,13 +5,14 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <init.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/printk.h>
 #include <linux/sizes.h>
 #include <asm/global_data.h>
+#include <asm/u-boot.h>
 
 #include "init.h"
 #include "sg-regs.h"
diff --git a/arch/arm/mach-uniphier/fdt-fixup.c b/arch/arm/mach-uniphier/fdt-fixup.c
index 6f3c29d8c0..980c260f4c 100644
--- a/arch/arm/mach-uniphier/fdt-fixup.c
+++ b/arch/arm/mach-uniphier/fdt-fixup.c
@@ -4,11 +4,11 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <fdt_support.h>
 #include <fdtdec.h>
 #include <jffs2/load_kernel.h>
 #include <mtd_node.h>
+#include <linux/errno.h>
 #include <linux/kernel.h>
 #include <linux/printk.h>
 
diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h
index 3c77f48853..622303786c 100644
--- a/arch/arm/mach-uniphier/init.h
+++ b/arch/arm/mach-uniphier/init.h
@@ -7,6 +7,7 @@
 #ifndef __MACH_INIT_H
 #define __MACH_INIT_H
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 
 #define UNIPHIER_MAX_NR_DRAM_CH		3
diff --git a/arch/arm/mach-uniphier/memconf.c b/arch/arm/mach-uniphier/memconf.c
index f69b489b76..57192f0154 100644
--- a/arch/arm/mach-uniphier/memconf.c
+++ b/arch/arm/mach-uniphier/memconf.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c
index c71470a204..b09ec54e1f 100644
--- a/arch/arm/mach-uniphier/micro-support-card.c
+++ b/arch/arm/mach-uniphier/micro-support-card.c
@@ -5,11 +5,13 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <config.h>
 #include <dm/of.h>
 #include <fdt_support.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <linux/io.h>
+#include <asm/global_data.h>
 
 #include "micro-support-card.h"
 
@@ -105,18 +107,6 @@ void support_card_init(void)
 	support_card_show_revision();
 }
 
-#if defined(CONFIG_SMC911X)
-#include <netdev.h>
-
-int board_eth_init(bd_t *bis)
-{
-	if (!support_card_found)
-		return 0;
-
-	return smc911x_initialize(0, (unsigned long)support_card_base + SMC911X_OFFSET);
-}
-#endif
-
 #if defined(CONFIG_MTD_NOR_FLASH)
 
 #include <mtd/cfi_flash.h>
diff --git a/arch/arm/mach-uniphier/mmc-boot-mode.c b/arch/arm/mach-uniphier/mmc-boot-mode.c
index b48495365c..e47e5df648 100644
--- a/arch/arm/mach-uniphier/mmc-boot-mode.c
+++ b/arch/arm/mach-uniphier/mmc-boot-mode.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <mmc.h>
 #include <spl.h>
 
diff --git a/arch/arm/mach-uniphier/mmc-first-dev.c b/arch/arm/mach-uniphier/mmc-first-dev.c
index e2f4f4eb5c..45bb10f8eb 100644
--- a/arch/arm/mach-uniphier/mmc-first-dev.c
+++ b/arch/arm/mach-uniphier/mmc-first-dev.c
@@ -4,7 +4,7 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
+#include <command.h>
 #include <env.h>
 #include <mmc.h>
 #include <linux/errno.h>
@@ -28,7 +28,8 @@ int mmc_get_env_dev(void)
 	return find_first_mmc_device(false);
 }
 
-static int do_mmcsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mmcsetn(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int dev;
 
@@ -46,7 +47,8 @@ U_BOOT_CMD(
 	""
 );
 
-static int do_sdsetn(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sdsetn(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	int dev;
 
diff --git a/arch/arm/mach-uniphier/pinctrl-glue.c b/arch/arm/mach-uniphier/pinctrl-glue.c
index b45f72f59a..2e07264695 100644
--- a/arch/arm/mach-uniphier/pinctrl-glue.c
+++ b/arch/arm/mach-uniphier/pinctrl-glue.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/errno.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
diff --git a/arch/arm/mach-uniphier/reset.c b/arch/arm/mach-uniphier/reset.c
index 92a8b92547..5fffd23e9a 100644
--- a/arch/arm/mach-uniphier/reset.c
+++ b/arch/arm/mach-uniphier/reset.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <cpu_func.h>
 #include <linux/io.h>
 #include <asm/secure.h>
diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld11.c b/arch/arm/mach-uniphier/sbc/sbc-ld11.c
index 21972ac949..a0162e1cc8 100644
--- a/arch/arm/mach-uniphier/sbc/sbc-ld11.c
+++ b/arch/arm/mach-uniphier/sbc/sbc-ld11.c
@@ -3,7 +3,6 @@
  * Copyright (C) 2016-2017 Socionext Inc.
  */
 
-#include <common.h>
 #include <spl.h>
 #include <linux/io.h>
 
diff --git a/arch/arm/mach-uniphier/sbc/sbc.c b/arch/arm/mach-uniphier/sbc/sbc.c
index af8d6f4f9d..2100f49a08 100644
--- a/arch/arm/mach-uniphier/sbc/sbc.c
+++ b/arch/arm/mach-uniphier/sbc/sbc.c
@@ -5,7 +5,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <linux/io.h>
 #include <asm/global_data.h>
 
diff --git a/arch/arm/mach-uniphier/spl_board_init.c b/arch/arm/mach-uniphier/spl_board_init.c
index c7262d70a5..a93b8cdc04 100644
--- a/arch/arm/mach-uniphier/spl_board_init.c
+++ b/arch/arm/mach-uniphier/spl_board_init.c
@@ -4,7 +4,6 @@
  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  */
 
-#include <common.h>
 #include <debug_uart.h>
 #include <hang.h>
 #include <spl.h>
@@ -112,9 +111,7 @@ void spl_board_init(void)
 
 	initdata->early_clk_init();
 
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
 	preloader_console_init();
-#endif
 
 	ret = initdata->dpll_init(bd);
 	if (ret) {
diff --git a/arch/arm/mach-versal/clk.c b/arch/arm/mach-versal/clk.c
index 9184714e47..b1e34796d0 100644
--- a/arch/arm/mach-versal/clk.c
+++ b/arch/arm/mach-versal/clk.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-versal/cpu.c b/arch/arm/mach-versal/cpu.c
index 1b760ba5de..61c0b663fc 100644
--- a/arch/arm/mach-versal/cpu.c
+++ b/arch/arm/mach-versal/cpu.c
@@ -5,7 +5,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
diff --git a/arch/arm/mach-versal/include/mach/hardware.h b/arch/arm/mach-versal/include/mach/hardware.h
index e26beab2e9..9af5afd3f3 100644
--- a/arch/arm/mach-versal/include/mach/hardware.h
+++ b/arch/arm/mach-versal/include/mach/hardware.h
@@ -3,6 +3,10 @@
  * Copyright 2016 - 2018 Xilinx, Inc.
  */
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define VERSAL_CRL_APB_BASEADDR	0xFF5E0000
 
 #define CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT	BIT(25)
diff --git a/arch/arm/mach-zynq/clk.c b/arch/arm/mach-zynq/clk.c
index b578f6538a..1ace117fc8 100644
--- a/arch/arm/mach-zynq/clk.c
+++ b/arch/arm/mach-zynq/clk.c
@@ -6,6 +6,7 @@
 #include <clk.h>
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <malloc.h>
 #include <asm/arch/clk.h>
 
diff --git a/arch/arm/mach-zynq/cpu.c b/arch/arm/mach-zynq/cpu.c
index aca44dfe67..77b7cb1307 100644
--- a/arch/arm/mach-zynq/cpu.c
+++ b/arch/arm/mach-zynq/cpu.c
@@ -5,7 +5,9 @@
  */
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <zynqpl.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-zynq/spl.c b/arch/arm/mach-zynq/spl.c
index 02a7dc9854..239ce3436a 100644
--- a/arch/arm/mach-zynq/spl.c
+++ b/arch/arm/mach-zynq/spl.c
@@ -5,6 +5,9 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <generated/dt.h>
 
diff --git a/arch/arm/mach-zynq/timer.c b/arch/arm/mach-zynq/timer.c
index d822e20d2b..cc0e24cbfe 100644
--- a/arch/arm/mach-zynq/timer.c
+++ b/arch/arm/mach-zynq/timer.c
@@ -31,6 +31,7 @@
 #include <common.h>
 #include <div64.h>
 #include <dm.h>
+#include <init.h>
 #include <time.h>
 #include <malloc.h>
 #include <asm/io.h>
diff --git a/arch/arm/mach-zynqmp-r5/cpu.c b/arch/arm/mach-zynqmp-r5/cpu.c
index aa5de863eb..b3402d7189 100644
--- a/arch/arm/mach-zynqmp-r5/cpu.c
+++ b/arch/arm/mach-zynqmp-r5/cpu.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/armv7_mpu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/arm/mach-zynqmp/clk.c b/arch/arm/mach-zynqmp/clk.c
index db2b4a8be2..5067b339c2 100644
--- a/arch/arm/mach-zynqmp/clk.c
+++ b/arch/arm/mach-zynqmp/clk.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/hardware.h>
diff --git a/arch/arm/mach-zynqmp/cpu.c b/arch/arm/mach-zynqmp/cpu.c
index 811684a9f8..3eb8e8f448 100644
--- a/arch/arm/mach-zynqmp/cpu.c
+++ b/arch/arm/mach-zynqmp/cpu.c
@@ -5,10 +5,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <zynqmp_firmware.h>
 #include <asm/cache.h>
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index a0acfa2ff1..c5ba42124b 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -7,6 +7,10 @@
 #ifndef _ASM_ARCH_HARDWARE_H
 #define _ASM_ARCH_HARDWARE_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define ZYNQMP_TCM_BASE_ADDR	0xFFE00000
 #define ZYNQMP_TCM_SIZE		0x40000
 
diff --git a/arch/arm/mach-zynqmp/mp.c b/arch/arm/mach-zynqmp/mp.c
index fbb551151a..656678a155 100644
--- a/arch/arm/mach-zynqmp/mp.c
+++ b/arch/arm/mach-zynqmp/mp.c
@@ -6,9 +6,11 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define LOCK		0
 #define SPLIT		1
@@ -221,7 +223,7 @@ void initialize_tcm(bool mode)
 	}
 }
 
-int cpu_release(u32 nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char *const argv[])
 {
 	if (nr >= ZYNQMP_CORE_APU0 && nr <= ZYNQMP_CORE_APU3) {
 		u64 boot_addr = simple_strtoull(argv[0], NULL, 16);
diff --git a/arch/arm/mach-zynqmp/psu_spl_init.c b/arch/arm/mach-zynqmp/psu_spl_init.c
index b6abdfd608..5c5c7d136e 100644
--- a/arch/arm/mach-zynqmp/psu_spl_init.c
+++ b/arch/arm/mach-zynqmp/psu_spl_init.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/psu_init_gpl.h>
+#include <linux/delay.h>
 
 #define PSU_MASK_POLL_TIME 1100000
 
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index 68df0a79c4..9dd61e25f6 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -6,8 +6,11 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/spl.h>
diff --git a/arch/m68k/cpu/mcf5227x/cpu.c b/arch/m68k/cpu/mcf5227x/cpu.c
index 34534d876b..5ea6158c80 100644
--- a/arch/m68k/cpu/mcf5227x/cpu.c
+++ b/arch/m68k/cpu/mcf5227x/cpu.c
@@ -9,16 +9,18 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
+#include <linux/delay.h>
 
 #include <asm/immap.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 	udelay(1000);
diff --git a/arch/m68k/cpu/mcf5227x/cpu_init.c b/arch/m68k/cpu/mcf5227x/cpu_init.c
index 7cde4c6105..4ab13b4d8e 100644
--- a/arch/m68k/cpu/mcf5227x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5227x/cpu_init.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 
 #include <asm/immap.h>
diff --git a/arch/m68k/cpu/mcf523x/cpu.c b/arch/m68k/cpu/mcf523x/cpu.c
index 429781945b..d521a8a2e4 100644
--- a/arch/m68k/cpu/mcf523x/cpu.c
+++ b/arch/m68k/cpu/mcf523x/cpu.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
@@ -19,7 +21,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ccm_t *ccm = (ccm_t *) MMAP_CCM;
 
diff --git a/arch/m68k/cpu/mcf523x/cpu_init.c b/arch/m68k/cpu/mcf523x/cpu_init.c
index 8c6e12d548..87effa71dc 100644
--- a/arch/m68k/cpu/mcf523x/cpu_init.c
+++ b/arch/m68k/cpu/mcf523x/cpu_init.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 #include <asm/immap.h>
 #include <asm/io.h>
diff --git a/arch/m68k/cpu/mcf52x2/cpu.c b/arch/m68k/cpu/mcf52x2/cpu.c
index b48a753f9b..d3d4e30ad5 100644
--- a/arch/m68k/cpu/mcf52x2/cpu.c
+++ b/arch/m68k/cpu/mcf52x2/cpu.c
@@ -14,18 +14,21 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
 #include <asm/immap.h>
 #include <asm/io.h>
 #include <netdev.h>
+#include <linux/delay.h>
 #include "cpu.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef	CONFIG_M5208
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 
@@ -138,7 +141,7 @@ int print_cpuinfo(void)
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* Call the board specific reset actions first. */
 	if(board_reset) {
@@ -173,7 +176,7 @@ int watchdog_init(void)
 #endif
 
 #ifdef	CONFIG_M5272
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 
@@ -262,7 +265,7 @@ int watchdog_init(void)
 #endif				/* #ifdef CONFIG_M5272 */
 
 #ifdef	CONFIG_M5275
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	rcm_t *rcm = (rcm_t *)(MMAP_RCM);
 
@@ -352,7 +355,7 @@ int print_cpuinfo(void)
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
 	return 0;
@@ -371,7 +374,7 @@ int print_cpuinfo(void)
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* enable watchdog, set timeout to 0 and wait */
 	mbar_writeByte(MCFSIM_SYPCR, 0xc0);
@@ -403,7 +406,7 @@ int print_cpuinfo(void)
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* enable watchdog, set timeout to 0 and wait */
 	mbar_writeByte(SIM_SYPCR, 0xc0);
diff --git a/arch/m68k/cpu/mcf52x2/cpu_init.c b/arch/m68k/cpu/mcf52x2/cpu_init.c
index f39fe19baf..9d4a10f028 100644
--- a/arch/m68k/cpu/mcf52x2/cpu_init.c
+++ b/arch/m68k/cpu/mcf52x2/cpu_init.c
@@ -19,6 +19,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 #include <asm/immap.h>
 #include <asm/io.h>
diff --git a/arch/m68k/cpu/mcf52x2/speed.c b/arch/m68k/cpu/mcf52x2/speed.c
index 02ef5d87aa..751c83a4fc 100644
--- a/arch/m68k/cpu/mcf52x2/speed.c
+++ b/arch/m68k/cpu/mcf52x2/speed.c
@@ -12,6 +12,7 @@
 #include <asm/processor.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/m68k/cpu/mcf530x/cpu.c b/arch/m68k/cpu/mcf530x/cpu.c
index a76deebc68..0659bf6558 100644
--- a/arch/m68k/cpu/mcf530x/cpu.c
+++ b/arch/m68k/cpu/mcf530x/cpu.c
@@ -5,12 +5,14 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <init.h>
 #include <vsprintf.h>
 #include <asm/immap.h>
 #include <asm/io.h>
 
 #ifdef CONFIG_M5307
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	sim_t *sim = (sim_t *)(MMAP_SIM);
 
diff --git a/arch/m68k/cpu/mcf530x/cpu_init.c b/arch/m68k/cpu/mcf530x/cpu_init.c
index 166720aef5..83529408eb 100644
--- a/arch/m68k/cpu/mcf530x/cpu_init.c
+++ b/arch/m68k/cpu/mcf530x/cpu_init.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 #include <asm/immap.h>
 #include <asm/io.h>
diff --git a/arch/m68k/cpu/mcf532x/cpu.c b/arch/m68k/cpu/mcf532x/cpu.c
index 6807992de5..72bfdf056b 100644
--- a/arch/m68k/cpu/mcf532x/cpu.c
+++ b/arch/m68k/cpu/mcf532x/cpu.c
@@ -9,17 +9,20 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
 #include <netdev.h>
+#include <linux/delay.h>
 
 #include <asm/immap.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 
diff --git a/arch/m68k/cpu/mcf532x/cpu_init.c b/arch/m68k/cpu/mcf532x/cpu_init.c
index bd130c1b0c..1311f3967c 100644
--- a/arch/m68k/cpu/mcf532x/cpu_init.c
+++ b/arch/m68k/cpu/mcf532x/cpu_init.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 #include <asm/immap.h>
 #include <asm/io.h>
diff --git a/arch/m68k/cpu/mcf5445x/cpu.c b/arch/m68k/cpu/mcf5445x/cpu.c
index 2f79380c8b..886f29d1b6 100644
--- a/arch/m68k/cpu/mcf5445x/cpu.c
+++ b/arch/m68k/cpu/mcf5445x/cpu.c
@@ -9,17 +9,20 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
 #include <netdev.h>
+#include <linux/delay.h>
 
 #include <asm/immap.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	rcm_t *rcm = (rcm_t *) (MMAP_RCM);
 	udelay(1000);
diff --git a/arch/m68k/cpu/mcf5445x/cpu_init.c b/arch/m68k/cpu/mcf5445x/cpu_init.c
index 6ee23f0db2..9deab51d07 100644
--- a/arch/m68k/cpu/mcf5445x/cpu_init.c
+++ b/arch/m68k/cpu/mcf5445x/cpu_init.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <watchdog.h>
 #include <asm/immap.h>
 #include <asm/processor.h>
diff --git a/arch/m68k/cpu/mcf5445x/pci.c b/arch/m68k/cpu/mcf5445x/pci.c
index 09bd745569..af02c4934c 100644
--- a/arch/m68k/cpu/mcf5445x/pci.c
+++ b/arch/m68k/cpu/mcf5445x/pci.c
@@ -11,6 +11,7 @@
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/immap.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_PCI)
 /* System RAM mapped over PCI */
diff --git a/arch/m68k/cpu/mcf547x_8x/cpu.c b/arch/m68k/cpu/mcf547x_8x/cpu.c
index dc5ed1aa79..59cdfe70e4 100644
--- a/arch/m68k/cpu/mcf547x_8x/cpu.c
+++ b/arch/m68k/cpu/mcf547x_8x/cpu.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
@@ -19,7 +21,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR);
 
diff --git a/arch/m68k/cpu/mcf547x_8x/cpu_init.c b/arch/m68k/cpu/mcf547x_8x/cpu_init.c
index 8779384c0a..8e42b63141 100644
--- a/arch/m68k/cpu/mcf547x_8x/cpu_init.c
+++ b/arch/m68k/cpu/mcf547x_8x/cpu_init.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <MCD_dma.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
 
diff --git a/arch/m68k/cpu/mcf547x_8x/pci.c b/arch/m68k/cpu/mcf547x_8x/pci.c
index ac42cca2ef..74ba68124f 100644
--- a/arch/m68k/cpu/mcf547x_8x/pci.c
+++ b/arch/m68k/cpu/mcf547x_8x/pci.c
@@ -11,6 +11,7 @@
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/immap.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_PCI)
 /* System RAM mapped over PCI */
diff --git a/arch/m68k/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
index 885659e342..33b4cff4ec 100644
--- a/arch/m68k/cpu/mcf547x_8x/slicetimer.c
+++ b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
@@ -5,7 +5,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <irq_func.h>
+#include <linux/delay.h>
 
 #include <asm/timer.h>
 #include <asm/immap.h>
diff --git a/arch/m68k/lib/bootm.c b/arch/m68k/lib/bootm.c
index 19445b3fc7..aa17929b9e 100644
--- a/arch/m68k/lib/bootm.c
+++ b/arch/m68k/lib/bootm.c
@@ -5,9 +5,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
 #include <image.h>
+#include <lmb.h>
+#include <log.h>
 #include <u-boot/zlib.h>
 #include <bzlib.h>
 #include <watchdog.h>
@@ -47,7 +50,8 @@ void arch_lmb_reserve(struct lmb *lmb)
 	lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+		   bootm_headers_t *images)
 {
 	int ret;
 	bd_t  *kbd;
diff --git a/arch/m68k/lib/interrupts.c b/arch/m68k/lib/interrupts.c
index ddc91993a1..1caef61d20 100644
--- a/arch/m68k/lib/interrupts.c
+++ b/arch/m68k/lib/interrupts.c
@@ -12,6 +12,7 @@
 #include <watchdog.h>
 #include <asm/processor.h>
 #include <asm/immap.h>
+#include <asm/ptrace.h>
 
 #define	NR_IRQS		(CONFIG_SYS_NUM_IRQS)
 
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index bde1f4c228..a3eb6db54b 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -7,8 +7,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <irq_func.h>
 #include <time.h>
+#include <linux/delay.h>
 
 #include <asm/timer.h>
 #include <asm/immap.h>
diff --git a/arch/m68k/lib/traps.c b/arch/m68k/lib/traps.c
index 2ccd55add0..c49141f376 100644
--- a/arch/m68k/lib/traps.c
+++ b/arch/m68k/lib/traps.c
@@ -12,6 +12,7 @@
 #include <watchdog.h>
 #include <command.h>
 #include <asm/processor.h>
+#include <asm/ptrace.h>
 
 
 extern void _exc_handler(void);
diff --git a/arch/microblaze/cpu/cache.c b/arch/microblaze/cpu/cache.c
index 02f66f9087..aa832d6be6 100644
--- a/arch/microblaze/cpu/cache.c
+++ b/arch/microblaze/cpu/cache.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <asm/asm.h>
+#include <asm/cache.h>
 
 int dcache_status(void)
 {
diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c
index 910c596884..829ae26ad2 100644
--- a/arch/microblaze/cpu/interrupts.c
+++ b/arch/microblaze/cpu/interrupts.c
@@ -11,6 +11,7 @@
 #include <command.h>
 #include <fdtdec.h>
 #include <irq_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/microblaze_intc.h>
 #include <asm/asm.h>
@@ -187,7 +188,7 @@ void interrupt_handler(void)
 }
 
 #if defined(CONFIG_CMD_IRQ)
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, const char *argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[])
 {
 	int i;
 	struct irq_action *act = vecs;
diff --git a/arch/microblaze/cpu/spl.c b/arch/microblaze/cpu/spl.c
index 070c12cce9..86522f8447 100644
--- a/arch/microblaze/cpu/spl.c
+++ b/arch/microblaze/cpu/spl.c
@@ -6,7 +6,9 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/u-boot.h>
@@ -48,7 +50,7 @@ int spl_start_uboot(void)
 	return 1;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	__asm__ __volatile__ ("mts rmsr, r0;" \
 			      "bra r0");
diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c
index 805eac7fa3..1b4617311c 100644
--- a/arch/microblaze/cpu/timer.c
+++ b/arch/microblaze/cpu/timer.c
@@ -7,9 +7,12 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <time.h>
 #include <asm/microblaze_timer.h>
 #include <asm/microblaze_intc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 2d6a41be2f..d2ea1453be 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -8,12 +8,16 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <fdt_support.h>
 #include <hang.h>
 #include <image.h>
+#include <lmb.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <u-boot/zlib.h>
 #include <asm/byteorder.h>
 
@@ -105,7 +109,7 @@ static void boot_prep_linux(bootm_headers_t *images)
 	}
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[],
+int do_bootm_linux(int flag, int argc, char *const argv[],
 		   bootm_headers_t *images)
 {
 	images->cmdline_start = (ulong)env_get("bootargs");
diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c
index a403ff729b..7d5c9fd83a 100644
--- a/arch/mips/cpu/cpu.c
+++ b/arch/mips/cpu/cpu.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <init.h>
 #include <linux/compiler.h>
 #include <asm/cache.h>
 #include <asm/mipsregs.h>
@@ -20,7 +21,7 @@ void __weak _machine_restart(void)
 		/* NOP */;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	_machine_restart();
 
diff --git a/arch/mips/include/asm/cacheops.h b/arch/mips/include/asm/cacheops.h
index 98b67ccc8e..641e2ad58d 100644
--- a/arch/mips/include/asm/cacheops.h
+++ b/arch/mips/include/asm/cacheops.h
@@ -8,6 +8,8 @@
 #ifndef	__ASM_CACHEOPS_H
 #define	__ASM_CACHEOPS_H
 
+#include <asm/cache.h>
+
 #ifndef __ASSEMBLY__
 
 static inline void mips_cache(int op, const volatile void *addr)
diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 8f37471f81..3878171607 100644
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -39,6 +39,7 @@
 #ifndef __ASSEMBLY__
 
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 static inline void *mips_cm_base(void)
 {
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index f80311e64e..7538e6b2e0 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -27,6 +27,7 @@
 #ifdef __ASSEMBLY__
 #define _ULCAST_
 #else
+#include <linux/bitops.h>
 #define _ULCAST_ (unsigned long)
 #endif
 
diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index f1db6d23b8..82f986cb81 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -5,9 +5,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <env.h>
 #include <image.h>
 #include <fdt_support.h>
+#include <lmb.h>
+#include <log.h>
 #include <asm/addrspace.h>
 #include <asm/io.h>
 
@@ -304,8 +307,8 @@ static void boot_jump_linux(bootm_headers_t *images)
 			linux_extra);
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[],
-			bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+		   bootm_headers_t *images)
 {
 	/* No need for those on MIPS */
 	if (flag & BOOTM_STATE_OS_BD_T)
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 1a8c87d094..24f115ebc9 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <asm/cacheops.h>
 #ifdef CONFIG_MIPS_L2_CACHE
 #include <asm/cm.h>
@@ -13,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/mipsregs.h>
 #include <asm/system.h>
+#include <linux/bug.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/mips/lib/reloc.c b/arch/mips/lib/reloc.c
index 1e3cfadd2d..ffc8c7a1b7 100644
--- a/arch/mips/lib/reloc.c
+++ b/arch/mips/lib/reloc.c
@@ -31,6 +31,7 @@
 #include <init.h>
 #include <asm/relocs.h>
 #include <asm/sections.h>
+#include <linux/bitops.h>
 
 /**
  * read_uint() - Read an unsigned integer from the buffer
diff --git a/arch/mips/lib/spl.c b/arch/mips/lib/spl.c
index 7ba3e53f6d..f96fda5b2d 100644
--- a/arch/mips/lib/spl.c
+++ b/arch/mips/lib/spl.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <spl.h>
 
 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
diff --git a/arch/mips/lib/stack.c b/arch/mips/lib/stack.c
index 99fd056905..8f523fd6fb 100644
--- a/arch/mips/lib/stack.c
+++ b/arch/mips/lib/stack.c
@@ -1,6 +1,8 @@
 // SPDX-License-Identifier: GPL-2.0+
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/mips/lib/traps.c b/arch/mips/lib/traps.c
index 8fff7541e3..b1ae02fcab 100644
--- a/arch/mips/lib/traps.c
+++ b/arch/mips/lib/traps.c
@@ -11,9 +11,11 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <cpu_func.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <asm/mipsregs.h>
 #include <asm/addrspace.h>
 #include <asm/system.h>
diff --git a/arch/mips/mach-ath79/ar933x/ddr.c b/arch/mips/mach-ath79/ar933x/ddr.c
index 2cf0b2cb1f..09166ecf8f 100644
--- a/arch/mips/mach-ath79/ar933x/ddr.c
+++ b/arch/mips/mach-ath79/ar933x/ddr.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ath79.h>
 
diff --git a/arch/mips/mach-ath79/ar934x/clk.c b/arch/mips/mach-ath79/ar934x/clk.c
index 09bdc253ae..9fa2225ed2 100644
--- a/arch/mips/mach-ath79/ar934x/clk.c
+++ b/arch/mips/mach-ath79/ar934x/clk.c
@@ -5,10 +5,13 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <hang.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ath79.h>
 #include <wait_bit.h>
@@ -319,7 +322,8 @@ ulong get_ddr_freq(ulong dummy)
 	return gd->mem_clk;
 }
 
-int do_ar934x_showclk(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ar934x_showclk(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	ar934x_update_clock();
 	printf("CPU:       %8ld MHz\n", gd->cpu_clk / 1000000);
diff --git a/arch/mips/mach-ath79/ar934x/ddr.c b/arch/mips/mach-ath79/ar934x/ddr.c
index 289973ec95..218f60a96c 100644
--- a/arch/mips/mach-ath79/ar934x/ddr.c
+++ b/arch/mips/mach-ath79/ar934x/ddr.c
@@ -9,6 +9,8 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ath79.h>
 
diff --git a/arch/mips/mach-ath79/cpu.c b/arch/mips/mach-ath79/cpu.c
index 9afc672602..31e87d6206 100644
--- a/arch/mips/mach-ath79/cpu.c
+++ b/arch/mips/mach-ath79/cpu.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
diff --git a/arch/mips/mach-ath79/qca953x/ddr.c b/arch/mips/mach-ath79/qca953x/ddr.c
index 268da7336b..78f2370e09 100644
--- a/arch/mips/mach-ath79/qca953x/ddr.c
+++ b/arch/mips/mach-ath79/qca953x/ddr.c
@@ -8,6 +8,8 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ath79.h>
 
diff --git a/arch/mips/mach-ath79/qca956x/clk.c b/arch/mips/mach-ath79/qca956x/clk.c
index d71c94e171..5adf6cd815 100644
--- a/arch/mips/mach-ath79/qca956x/clk.c
+++ b/arch/mips/mach-ath79/qca956x/clk.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
diff --git a/arch/mips/mach-ath79/qca956x/ddr.c b/arch/mips/mach-ath79/qca956x/ddr.c
index fb2230430c..e61a368141 100644
--- a/arch/mips/mach-ath79/qca956x/ddr.c
+++ b/arch/mips/mach-ath79/qca956x/ddr.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/delay.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ath79.h>
 
diff --git a/arch/mips/mach-ath79/reset.c b/arch/mips/mach-ath79/reset.c
index 0ab3ab6383..6cd5e77fd1 100644
--- a/arch/mips/mach-ath79/reset.c
+++ b/arch/mips/mach-ath79/reset.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
diff --git a/arch/mips/mach-bmips/dram.c b/arch/mips/mach-bmips/dram.c
index 87ced7c5d5..a772a655d9 100644
--- a/arch/mips/mach-bmips/dram.c
+++ b/arch/mips/mach-bmips/dram.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <dm.h>
 
diff --git a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
index 92d431bd04..61cc148988 100644
--- a/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
+++ b/arch/mips/mach-jz47xx/include/mach/jz4780_dram.h
@@ -12,6 +12,7 @@
 /*
  * DDR
  */
+#include <linux/bitops.h>
 #define DDRC_ST				0x0
 #define DDRC_CFG			0x4
 #define DDRC_CTRL			0x8
diff --git a/arch/mips/mach-jz47xx/jz4780/gpio.c b/arch/mips/mach-jz47xx/jz4780/gpio.c
index cee2328ab1..d4884e7fa9 100644
--- a/arch/mips/mach-jz47xx/jz4780/gpio.c
+++ b/arch/mips/mach-jz47xx/jz4780/gpio.c
@@ -3,6 +3,7 @@
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <mach/jz4780.h>
 
 int jz47xx_gpio_get_value(unsigned int gpio)
diff --git a/arch/mips/mach-jz47xx/jz4780/jz4780.c b/arch/mips/mach-jz47xx/jz4780/jz4780.c
index 015840de25..26fcfc842c 100644
--- a/arch/mips/mach-jz47xx/jz4780/jz4780.c
+++ b/arch/mips/mach-jz47xx/jz4780/jz4780.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <image.h>
 #include <init.h>
 #include <asm/io.h>
 #include <asm/sections.h>
diff --git a/arch/mips/mach-jz47xx/jz4780/pll.c b/arch/mips/mach-jz47xx/jz4780/pll.c
index 9a46198f36..323c634fb3 100644
--- a/arch/mips/mach-jz47xx/jz4780/pll.c
+++ b/arch/mips/mach-jz47xx/jz4780/pll.c
@@ -9,6 +9,8 @@
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/jz4780.h>
 
 #define CPM_CPCCR		0x00
diff --git a/arch/mips/mach-jz47xx/jz4780/reset.c b/arch/mips/mach-jz47xx/jz4780/reset.c
index 73af34721f..bf6addccb5 100644
--- a/arch/mips/mach-jz47xx/jz4780/reset.c
+++ b/arch/mips/mach-jz47xx/jz4780/reset.c
@@ -9,6 +9,7 @@
 #include <config.h>
 #include <common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <mach/jz4780.h>
 
 /* WDT */
diff --git a/arch/mips/mach-jz47xx/jz4780/sdram.c b/arch/mips/mach-jz47xx/jz4780/sdram.c
index 65afefe53e..690f3c5601 100644
--- a/arch/mips/mach-jz47xx/jz4780/sdram.c
+++ b/arch/mips/mach-jz47xx/jz4780/sdram.c
@@ -11,7 +11,10 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/jz4780.h>
 #include <mach/jz4780_dram.h>
 
diff --git a/arch/mips/mach-jz47xx/jz4780/timer.c b/arch/mips/mach-jz47xx/jz4780/timer.c
index b32a2f5643..82bb9e8c3b 100644
--- a/arch/mips/mach-jz47xx/jz4780/timer.c
+++ b/arch/mips/mach-jz47xx/jz4780/timer.c
@@ -9,10 +9,13 @@
 #include <config.h>
 #include <common.h>
 #include <div64.h>
+#include <init.h>
 #include <irq_func.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/mipsregs.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/jz4780.h>
 
 #define TCU_TSR		0x1C	/* Timer Stop Register */
diff --git a/arch/mips/mach-mscc/cpu.c b/arch/mips/mach-mscc/cpu.c
index 3ee589891b..b4ffd44ea4 100644
--- a/arch/mips/mach-mscc/cpu.c
+++ b/arch/mips/mach-mscc/cpu.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <linux/bitops.h>
 
 #include <asm/io.h>
 #include <asm/types.h>
diff --git a/arch/mips/mach-mscc/dram.c b/arch/mips/mach-mscc/dram.c
index 72c70c9e84..b12bac63c2 100644
--- a/arch/mips/mach-mscc/dram.c
+++ b/arch/mips/mach-mscc/dram.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 
 #include <asm/io.h>
 #include <asm/types.h>
diff --git a/arch/mips/mach-mscc/gpio.c b/arch/mips/mach-mscc/gpio.c
index 5e3a53372d..d6b4c5d768 100644
--- a/arch/mips/mach-mscc/gpio.c
+++ b/arch/mips/mach-mscc/gpio.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 void mscc_gpio_set_alternate(int gpio, int mode)
 {
diff --git a/arch/mips/mach-mscc/include/mach/ddr.h b/arch/mips/mach-mscc/include/mach/ddr.h
index bf75e52ec3..d52eabbd2b 100644
--- a/arch/mips/mach-mscc/include/mach/ddr.h
+++ b/arch/mips/mach-mscc/include/mach/ddr.h
@@ -9,6 +9,7 @@
 #include <asm/cacheops.h>
 #include <asm/io.h>
 #include <asm/reboot.h>
+#include <linux/bitops.h>
 #include <mach/common.h>
 
 #define MIPS_VCOREIII_MEMORY_DDR3
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
index 4a1228d29f..8d1d21b9b1 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb.h
@@ -6,6 +6,8 @@
 #ifndef _MSCC_JR2_DEVCPU_GCB_H_
 #define _MSCC_JR2_DEVCPU_GCB_H_
 
+#include <linux/bitops.h>
+
 #define PERF_GPR                                          0x4
 
 #define PERF_SOFT_RST                                     0x8
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
index 3c84edc18a..e11ad8788f 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_devcpu_gcb_miim_regs.h
@@ -6,6 +6,8 @@
 #ifndef _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
 #define _MSCC_JR2_DEVCPU_GCB_MIIM_REGS_H_
 
+#include <linux/bitops.h>
+
 #define MIIM_MII_STATUS(gi)  (0xc8 + (gi * 36))
 #define MIIM_MII_CMD(gi)     (0xd0 + (gi * 36))
 #define MIIM_MII_DATA(gi)    (0xd4 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
index 6e0bbe2746..151bb3e6d4 100644
--- a/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/jr2/jr2_icpu_cfg.h
@@ -6,6 +6,8 @@
 #ifndef _MSCC_JR2_ICPU_CFG_H_
 #define _MSCC_JR2_ICPU_CFG_H_
 
+#include <linux/bitops.h>
+
 #define ICPU_GPR(x)                                       (0x4 * (x))
 #define ICPU_GPR_RSZ                                      0x4
 
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
index a74a68593d..750a8013d1 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
 #define _MSCC_OCELOT_DEVCPU_GCB_H_
 
+#include <linux/bitops.h>
 #define PERF_SOFT_RST                                     0x90
 
 #define PERF_SOFT_RST_SOFT_SWC_RST                        BIT(1)
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
index 2303734894..07c4f9aeb6 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_devcpu_gcb_miim_regs.h
@@ -8,6 +8,7 @@
 #ifndef _MSCC_LUTON_MIIM_REGS_H_
 #define _MSCC_LUTON_MIIM_REGS_H_
 
+#include <linux/bitops.h>
 #define MIIM_MII_STATUS(gi) (0xa0 + (gi * 36))
 #define MIIM_MII_CMD(gi)    (0xa8 + (gi * 36))
 #define MIIM_MII_DATA(gi)   (0xac + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
index 9233f037bb..ded7c5fa77 100644
--- a/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/luton/luton_icpu_cfg.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_OCELOT_ICPU_CFG_H_
 #define _MSCC_OCELOT_ICPU_CFG_H_
 
+#include <linux/bitops.h>
 #define ICPU_GPR(x) (0x4 * (x))
 #define ICPU_GPR_RSZ                                      0x4
 
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
index b2a4203644..5715ec164c 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_OCELOT_DEVCPU_GCB_H_
 #define _MSCC_OCELOT_DEVCPU_GCB_H_
 
+#include <linux/bitops.h>
 #define PERF_SOFT_RST                                     0x8
 
 #define PERF_SOFT_RST_SOFT_NON_CFG_RST                    BIT(2)
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
index 4ad92214a3..50cf073eab 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
 #define _MSCC_OCELOT_DEVCPU_GCB_MIIM_REGS_H_
 
+#include <linux/bitops.h>
 #define MIIM_MII_STATUS(gi) (0x9c + (gi * 36))
 #define MIIM_MII_CMD(gi)    (0xa4 + (gi * 36))
 #define MIIM_MII_DATA(gi)   (0xa8 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
index 04cf70bec3..fb10bf2c26 100644
--- a/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/ocelot/ocelot_icpu_cfg.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_OCELOT_ICPU_CFG_H_
 #define _MSCC_OCELOT_ICPU_CFG_H_
 
+#include <linux/bitops.h>
 #define ICPU_GPR(x) (0x4 * (x))
 #define ICPU_GPR_RSZ                                      0x4
 
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
index 9b80fdb574..43d40be716 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVAL_DEVCPU_GCB_H_
 #define _MSCC_SERVAL_DEVCPU_GCB_H_
 
+#include <linux/bitops.h>
 #define CHIP_ID                                           0x0
 
 #define PERF_GPR                                          0x4
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
index a3abbc4015..e8cb1dcf9a 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
 #define _MSCC_SERVAL_DEVCPU_GCB_MIIM_REGS_H_
 
+#include <linux/bitops.h>
 #define MIIM_MII_STATUS(gi)  (0x5c + (gi * 36))
 #define MIIM_MII_CMD(gi)     (0x64 + (gi * 36))
 #define MIIM_MII_DATA(gi)    (0x68 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
index b8c9d5ca49..4d4151b3d5 100644
--- a/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/serval/serval_icpu_cfg.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVAL_ICPU_CFG_H_
 #define _MSCC_SERVAL_ICPU_CFG_H_
 
+#include <linux/bitops.h>
 #define ICPU_GPR(x)                                       (0x4 * (x))
 #define ICPU_GPR_RSZ                                      0x8
 
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
index 493eaad1df..7d6c64f316 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVALT_DEVCPU_GCB_H_
 #define _MSCC_SERVALT_DEVCPU_GCB_H_
 
+#include <linux/bitops.h>
 #define PERF_GPR                                          0x4
 
 #define PERF_SOFT_RST                                     0x8
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
index 8c67190ecb..72d7c4d08d 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_devcpu_gcb_miim_regs.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
 #define _MSCC_SERVALT_DEVCPU_GCB_MIIM_REGS_H_
 
+#include <linux/bitops.h>
 #define MIIM_MII_STATUS(gi)  (0xc4 + (gi * 36))
 #define MIIM_MII_CMD(gi)     (0xcc + (gi * 36))
 #define MIIM_MII_DATA(gi)    (0xd0 + (gi * 36))
diff --git a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
index 491ead169f..13967f66b0 100644
--- a/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
+++ b/arch/mips/mach-mscc/include/mach/servalt/servalt_icpu_cfg.h
@@ -6,6 +6,7 @@
 #ifndef _MSCC_SERVALT_ICPU_CFG_H_
 #define _MSCC_SERVALT_ICPU_CFG_H_
 
+#include <linux/bitops.h>
 #define ICPU_GPR(x)                                       (0x4 * (x))
 #define ICPU_GPR_RSZ                                      0x8
 
diff --git a/arch/mips/mach-mscc/include/mach/tlb.h b/arch/mips/mach-mscc/include/mach/tlb.h
index fdb554f551..ebd8ad0dc1 100644
--- a/arch/mips/mach-mscc/include/mach/tlb.h
+++ b/arch/mips/mach-mscc/include/mach/tlb.h
@@ -7,6 +7,7 @@
 #define __ASM_MACH_TLB_H
 
 #include <asm/mipsregs.h>
+#include <linux/bitops.h>
 #include <mach/common.h>
 #include <linux/sizes.h>
 
diff --git a/arch/mips/mach-mscc/phy.c b/arch/mips/mach-mscc/phy.c
index add6280e38..83d3e5bdd2 100644
--- a/arch/mips/mach-mscc/phy.c
+++ b/arch/mips/mach-mscc/phy.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 
 int mscc_phy_rd_wr(u8 read,
diff --git a/arch/mips/mach-mtmips/cpu.c b/arch/mips/mach-mtmips/cpu.c
index 459a9673eb..2ddf8cb096 100644
--- a/arch/mips/mach-mtmips/cpu.c
+++ b/arch/mips/mach-mtmips/cpu.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 
diff --git a/arch/mips/mach-mtmips/ddr_init.c b/arch/mips/mach-mtmips/ddr_init.c
index cd355cc840..6c6d0933f2 100644
--- a/arch/mips/mach-mtmips/ddr_init.c
+++ b/arch/mips/mach-mtmips/ddr_init.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 #include <mach/ddr.h>
diff --git a/arch/mips/mach-mtmips/mt7628/ddr.c b/arch/mips/mach-mtmips/mt7628/ddr.c
index 06c0ca6854..3df85cd144 100644
--- a/arch/mips/mach-mtmips/mt7628/ddr.c
+++ b/arch/mips/mach-mtmips/mt7628/ddr.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <asm/addrspace.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <linux/io.h>
 #include <mach/ddr.h>
diff --git a/arch/mips/mach-mtmips/spl.c b/arch/mips/mach-mtmips/spl.c
index 2a24af70c3..38d9e9160d 100644
--- a/arch/mips/mach-mtmips/spl.c
+++ b/arch/mips/mach-mtmips/spl.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <fdt.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/sections.h>
 #include <linux/sizes.h>
diff --git a/arch/mips/mach-pic32/cpu.c b/arch/mips/mach-pic32/cpu.c
index 8075d93d41..1d8c397144 100644
--- a/arch/mips/mach-pic32/cpu.c
+++ b/arch/mips/mach-pic32/cpu.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <init.h>
 #include <malloc.h>
 #include <mach/pic32.h>
 #include <mach/ddr.h>
diff --git a/arch/nds32/cpu/n1213/ae3xx/cpu.c b/arch/nds32/cpu/n1213/ae3xx/cpu.c
index 0660fffa45..c3efa31f59 100644
--- a/arch/nds32/cpu/n1213/ae3xx/cpu.c
+++ b/arch/nds32/cpu/n1213/ae3xx/cpu.c
@@ -39,7 +39,7 @@ int cleanup_before_linux(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	disable_interrupts();
 	panic("AE3XX wdt not support yet.\n");
diff --git a/arch/nds32/cpu/n1213/ag101/cpu.c b/arch/nds32/cpu/n1213/ag101/cpu.c
index 3ae87a21bb..9d99c83bf3 100644
--- a/arch/nds32/cpu/n1213/ag101/cpu.c
+++ b/arch/nds32/cpu/n1213/ag101/cpu.c
@@ -39,7 +39,7 @@ int cleanup_before_linux(void)
 	return 0;
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	disable_interrupts();
 
diff --git a/arch/nds32/cpu/n1213/ag101/timer.c b/arch/nds32/cpu/n1213/ag101/timer.c
index f2e362102e..394fc10ec3 100644
--- a/arch/nds32/cpu/n1213/ag101/timer.c
+++ b/arch/nds32/cpu/n1213/ag101/timer.c
@@ -9,10 +9,13 @@
  */
 #ifndef CONFIG_TIMER
 #include <common.h>
+#include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <faraday/fttmr010.h>
+#include <linux/delay.h>
 
 static ulong timestamp;
 static ulong lastdec;
diff --git a/arch/nds32/include/asm/u-boot-nds32.h b/arch/nds32/include/asm/u-boot-nds32.h
index 7d39320c15..f086f34729 100644
--- a/arch/nds32/include/asm/u-boot-nds32.h
+++ b/arch/nds32/include/asm/u-boot-nds32.h
@@ -12,6 +12,8 @@
 #ifndef _U_BOOT_NDS32_H_
 #define _U_BOOT_NDS32_H_	1
 
+#include <linux/types.h>
+
 /* for the following variables, see start.S */
 extern ulong IRQ_STACK_START;	/* top of IRQ stack */
 extern ulong FIQ_STACK_START;	/* top of FIQ stack */
diff --git a/arch/nds32/lib/boot.c b/arch/nds32/lib/boot.c
index c50e8e5168..da2fd36a16 100644
--- a/arch/nds32/lib/boot.c
+++ b/arch/nds32/lib/boot.c
@@ -9,7 +9,7 @@
 #include <command.h>
 
 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
-			 int argc, char * const argv[])
+			 int argc, char *const argv[])
 {
 	cleanup_before_linux();
 
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index 1003bc87b9..ab539f4036 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -6,10 +6,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
 #include <hang.h>
 #include <image.h>
+#include <log.h>
 #include <u-boot/zlib.h>
 #include <asm/byteorder.h>
 #include <asm/bootm.h>
diff --git a/arch/nds32/lib/cache.c b/arch/nds32/lib/cache.c
index e11d300b6d..21917e5da5 100644
--- a/arch/nds32/lib/cache.c
+++ b/arch/nds32/lib/cache.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+#include <asm/cache.h>
 static inline unsigned long CACHE_SET(unsigned char cache)
 {
 	if (cache == ICACHE)
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu/cpu.c
index 37ffa8f4a4..7f5e731a0f 100644
--- a/arch/nios2/cpu/cpu.c
+++ b/arch/nios2/cpu/cpu.c
@@ -5,12 +5,15 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <irq_func.h>
 #include <asm/cache.h>
+#include <asm/system.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -30,7 +33,7 @@ int checkboard(void)
 }
 #endif
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	disable_interrupts();
 	/* indirect call to go beyond 256MB limitation of toolchain */
diff --git a/arch/nios2/cpu/interrupts.c b/arch/nios2/cpu/interrupts.c
index e9d1ff911b..90cabb6757 100644
--- a/arch/nios2/cpu/interrupts.c
+++ b/arch/nios2/cpu/interrupts.c
@@ -118,7 +118,7 @@ int interrupt_init(void)
 
 /*************************************************************************/
 #if defined(CONFIG_CMD_IRQ)
-int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i;
 	struct irq_action *act = vecs;
diff --git a/arch/nios2/lib/bootm.c b/arch/nios2/lib/bootm.c
index e1891617c7..2c8f9731c7 100644
--- a/arch/nios2/lib/bootm.c
+++ b/arch/nios2/lib/bootm.c
@@ -6,11 +6,15 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <env.h>
+#include <image.h>
 #include <irq_func.h>
+#include <log.h>
 
 #define NIOS_MAGIC 0x534f494e /* enable command line and initrd passing */
 
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+		   bootm_headers_t *images)
 {
 	void (*kernel)(int, int, int, char *) = (void *)images->ep;
 	char *commandline = env_get("bootargs");
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 5d7650294d..18808da37d 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -106,10 +106,6 @@ config TARGET_KMCOGE5NE
 	bool "Support kmcoge5ne"
 	select VENDOR_KM
 
-config TARGET_SUVD3
-	bool "Support suvd3"
-	select VENDOR_KM
-
 config TARGET_KMTEGR1
 	bool "Support kmtegr1"
 	select VENDOR_KM
diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index f4e25f1f59..49c75a0e50 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -12,12 +12,14 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <net.h>
 #include <time.h>
 #include <vsprintf.h>
 #include <watchdog.h>
 #include <command.h>
 #include <mpc83xx.h>
 #include <asm/processor.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <tsec.h>
 #include <netdev.h>
@@ -122,20 +124,13 @@ int checkcpu(void)
 #endif
 
 #ifndef CONFIG_SYSRESET
-int
-do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong msr;
-#ifndef MPC83xx_RESET
-	ulong addr;
-#endif
-
 	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 
 	puts("Resetting the board.\n");
 
-#ifdef MPC83xx_RESET
-
 	/* Interrupts and MMU off */
 	msr = mfmsr();
 	msr &= ~(MSR_EE | MSR_IR | MSR_DR);
@@ -155,24 +150,6 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	/* perform reset, only one bit */
 	immap->reset.rcr = RCR_SWHR;
 
-#else	/* ! MPC83xx_RESET */
-
-	immap->reset.rmr = RMR_CSRE;    /* Checkstop Reset enable */
-
-	/* Interrupts and MMU off */
-	msr = mfmsr();
-	msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
-	mtmsr(msr);
-
-	/*
-	 * Trying to execute the next instruction at a non-existing address
-	 * should cause a machine check, resulting in reset
-	 */
-	addr = CONFIG_SYS_RESET_ADDRESS;
-
-	((void (*)(void)) addr) ();
-#endif	/* MPC83xx_RESET */
-
 	return 1;
 }
 #endif
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index af8facad53..438b14b162 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm-offsets.h>
 #include <mpc83xx.h>
 #include <ioports.h>
 #include <asm/io.h>
@@ -11,6 +12,7 @@
 #ifdef CONFIG_USB_EHCI_FSL
 #include <usb/ehci-ci.h>
 #endif
+#include <linux/delay.h>
 
 #include "lblaw/lblaw.h"
 #include "elbc/elbc.h"
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index a6eb7cb97c..1343dd3d3a 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -96,7 +96,7 @@ void ecc_print_status(void)
 	       ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
 }
 
-int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_ecc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 #ifdef CONFIG_SYS_FSL_DDR2
diff --git a/arch/powerpc/cpu/mpc83xx/interrupts.c b/arch/powerpc/cpu/mpc83xx/interrupts.c
index e83895deab..d04f31df50 100644
--- a/arch/powerpc/cpu/mpc83xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc83xx/interrupts.c
@@ -11,6 +11,7 @@
 #include <irq_func.h>
 #include <mpc83xx.h>
 #include <asm/processor.h>
+#include <asm/ptrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -71,8 +72,8 @@ void timer_interrupt_cpu (struct pt_regs *regs)
  * irqinfo - print information about PCI devices
  */
 
-void
-do_irqinfo(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char * const argv[])
+void do_irqinfo(struct cmd_tbl *cmdtp, bd_t *bd, int flag, int argc,
+		char *const argv[])
 {
 }
 
diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c
index c49b4f784b..5e02f4094b 100644
--- a/arch/powerpc/cpu/mpc83xx/law.c
+++ b/arch/powerpc/cpu/mpc83xx/law.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/fsl_law.h>
 #include <asm/mmu.h>
 #include <linux/log2.h>
diff --git a/arch/powerpc/cpu/mpc83xx/pci.c b/arch/powerpc/cpu/mpc83xx/pci.c
index 665ac378c8..f017985ae9 100644
--- a/arch/powerpc/cpu/mpc83xx/pci.c
+++ b/arch/powerpc/cpu/mpc83xx/pci.c
@@ -7,7 +7,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <pci.h>
+#include <asm/bitops.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_OF_LIBFDT)
 #include <linux/libfdt.h>
diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c
index b500ddd3f3..785d4805a4 100644
--- a/arch/powerpc/cpu/mpc83xx/pcie.c
+++ b/arch/powerpc/cpu/mpc83xx/pcie.c
@@ -11,6 +11,7 @@
 #include <pci.h>
 #include <mpc83xx.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc83xx/serdes.c b/arch/powerpc/cpu/mpc83xx/serdes.c
index 8242f95265..bb963ee5e2 100644
--- a/arch/powerpc/cpu/mpc83xx/serdes.c
+++ b/arch/powerpc/cpu/mpc83xx/serdes.c
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/fsl_mpc83xx_serdes.h>
+#include <linux/delay.h>
 
 /* SerDes registers */
 #define FSL_SRDSCR0_OFFS		0x0
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index 22506a5be5..aeff007fb0 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -14,6 +14,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <time.h>
 #include <vsprintf.h>
 #include <asm/processor.h>
@@ -22,6 +23,8 @@
 #include <spd.h>
 #include <asm/mmu.h>
 #include <spd_sdram.h>
+#include <asm/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index e2fc0b1e8a..5c14aa1f32 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -523,7 +523,8 @@ int get_serial_clock(void)
 	return get_bus_freq(0);
 }
 
-static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_clocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	char buf[32];
 
diff --git a/arch/powerpc/cpu/mpc83xx/spl_minimal.c b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
index 34c8187259..2c61f2b81d 100644
--- a/arch/powerpc/cpu/mpc83xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc83xx/spl_minimal.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm-offsets.h>
 #include <clock_legacy.h>
 #include <mpc83xx.h>
 #include <time.h>
diff --git a/arch/powerpc/cpu/mpc83xx/traps.c b/arch/powerpc/cpu/mpc83xx/traps.c
index 1c6c38b15f..c3cc119d65 100644
--- a/arch/powerpc/cpu/mpc83xx/traps.c
+++ b/arch/powerpc/cpu/mpc83xx/traps.c
@@ -12,6 +12,7 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <command.h>
 #include <kgdb.h>
 #include <asm/processor.h>
diff --git a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
index 8604f4a8e8..b972cf3b5e 100644
--- a/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/bsc9132_serdes.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
index 97eeb489cb..34b58bb7f9 100644
--- a/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/c29x_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index e455d8baf5..ff73596ba9 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <init.h>
 #include <linux/compiler.h>
 #include <fsl_errata.h>
 #include <asm/processor.h>
@@ -128,7 +129,8 @@ static void check_erratum_a007212(void)
 }
 #endif
 
-static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_errata(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
 	extern int enable_cpu_a011_workaround;
diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c
index 37e706238b..95215a0b82 100644
--- a/arch/powerpc/cpu/mpc85xx/commproc.c
+++ b/arch/powerpc/cpu/mpc85xx/commproc.c
@@ -22,6 +22,7 @@
  * currently no deallocator for this memory.
  */
 #include <common.h>
+#include <asm-offsets.h>
 #include <asm/cpm_85xx.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 9f9eed165b..9bd573dbd6 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -11,7 +11,9 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <time.h>
 #include <vsprintf.h>
 #include <watchdog.h>
@@ -27,6 +29,7 @@
 #include <asm/processor.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/ppc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -294,7 +297,7 @@ int checkcpu (void)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 /* Everything after the first generation of PQ3 parts has RSTCR */
 #if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index a9f39dc583..4bca2671d5 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <watchdog.h>
 #include <asm/processor.h>
 #include <ioports.h>
@@ -32,6 +33,7 @@
 #include <fsl_usb.h>
 #include <hwconfig.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include "mp.h"
 #ifdef CONFIG_CHAIN_OF_TRUST
 #include <fsl_validate.h>
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
index 40cb24dd54..c519e8bd4b 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init_early.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <asm-offsets.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 65f909fd1e..55f191f202 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <env.h>
+#include <log.h>
 #include <time.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index d7a633ddf2..ee5015ec8f 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/fsl_serdes.h>
 #include <asm/immap_85xx.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/fsl_law.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <fsl_errata.h>
 #include "fsl_corenet2_serdes.h"
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index ebdcd29c13..f5126e2c8a 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <time.h>
 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES8
 #include <hwconfig.h>
@@ -14,6 +15,7 @@
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/fsl_law.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include "fsl_corenet_serdes.h"
 
diff --git a/arch/powerpc/cpu/mpc85xx/interrupts.c b/arch/powerpc/cpu/mpc85xx/interrupts.c
index 6f539d2677..4ad762683f 100644
--- a/arch/powerpc/cpu/mpc85xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc85xx/interrupts.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <irq_func.h>
+#include <log.h>
 #include <time.h>
 #include <watchdog.h>
 #include <command.h>
@@ -20,6 +21,7 @@
 #ifdef CONFIG_POST
 #include <post.h>
 #endif
+#include <asm/ptrace.h>
 
 void interrupt_init_cpu(unsigned *decrementer_count)
 {
@@ -102,7 +104,7 @@ void timer_interrupt_cpu(struct pt_regs *regs)
 
 #if defined(CONFIG_CMD_IRQ)
 /* irqinfo - print information about PCI devices,not implemented. */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc85xx/liodn.c b/arch/powerpc/cpu/mpc85xx/liodn.c
index e7703b8a49..e552378e78 100644
--- a/arch/powerpc/cpu/mpc85xx/liodn.c
+++ b/arch/powerpc/cpu/mpc85xx/liodn.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/arch/powerpc/cpu/mpc85xx/mp.c b/arch/powerpc/cpu/mpc85xx/mp.c
index 9757bffe02..8822cf29fe 100644
--- a/arch/powerpc/cpu/mpc85xx/mp.c
+++ b/arch/powerpc/cpu/mpc85xx/mp.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <log.h>
 #include <asm/processor.h>
 #include <env.h>
 #include <ioports.h>
@@ -14,6 +15,7 @@
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 #include "mp.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -140,7 +142,7 @@ static u8 boot_entry_map[4] = {
 	BOOT_ENTRY_R3_LOWER,
 };
 
-int cpu_release(u32 nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char *const argv[])
 {
 	u32 i, val, *table = (u32 *)&__spin_table + nr * NUM_BOOT_ENTRY;
 	u64 boot_addr;
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
index c4c4154ac3..111692f15d 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8536_serdes.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
index bdcf46ed11..f3b5450ad5 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8544_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
index 99bab9e8ef..2a5c3e3200 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8548_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
index 414c05868f..81b66c3fa6 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8568_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
index 637522861e..eb54b8252b 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8569_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
index 0e0c63a14f..1b4e614918 100644
--- a/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/mpc8572_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
index cc907c5894..8cba4222c4 100644
--- a/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1010_serdes.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
index 509051047b..6b8e447e94 100644
--- a/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1021_serdes.c
@@ -5,9 +5,11 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
+#include <linux/delay.h>
 
 typedef struct serdes_85xx {
 	u32	srdscr0;	/* 0x00 - SRDS Control Register 0 */
diff --git a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
index 4c51a72630..719cb4f3d4 100644
--- a/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1022_serdes.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
index 482172d4e0..bf5cac6199 100644
--- a/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p1023_serdes.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
index 1e7ed43957..f36b1b64ed 100644
--- a/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p2020_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_85xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c
index 1d0213a513..9a6fc13b73 100644
--- a/arch/powerpc/cpu/mpc85xx/pci.c
+++ b/arch/powerpc/cpu/mpc85xx/pci.c
@@ -9,6 +9,7 @@
  * PCI Configuration space access support for MPC85xx PCI Bridge
  */
 #include <common.h>
+#include <asm/bitops.h>
 #include <asm/cpm_85xx.h>
 #include <pci.h>
 
diff --git a/arch/powerpc/cpu/mpc85xx/spl_minimal.c b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
index 972049b8e9..21b35db08d 100644
--- a/arch/powerpc/cpu/mpc85xx/spl_minimal.c
+++ b/arch/powerpc/cpu/mpc85xx/spl_minimal.c
@@ -8,6 +8,7 @@
 #include <asm/global_data.h>
 #include <fsl_ifc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c
index 808d953c52..4465ae7565 100644
--- a/arch/powerpc/cpu/mpc85xx/tlb.c
+++ b/arch/powerpc/cpu/mpc85xx/tlb.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <asm/bitops.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #ifdef CONFIG_ADDR_MAP
diff --git a/arch/powerpc/cpu/mpc85xx/traps.c b/arch/powerpc/cpu/mpc85xx/traps.c
index bc2fc93e11..f37a45e269 100644
--- a/arch/powerpc/cpu/mpc85xx/traps.c
+++ b/arch/powerpc/cpu/mpc85xx/traps.c
@@ -20,6 +20,7 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <command.h>
 #include <init.h>
 #include <irq_func.h>
diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index 97b93f0213..9f5bce3992 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <time.h>
 #include <vsprintf.h>
 #include <watchdog.h>
@@ -107,7 +108,7 @@ checkcpu(void)
 }
 
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
 	volatile ccsr_gur_t *gur = &immap->im_gur;
diff --git a/arch/powerpc/cpu/mpc86xx/cpu_init.c b/arch/powerpc/cpu/mpc86xx/cpu_init.c
index 89add62dc1..a17091d2ff 100644
--- a/arch/powerpc/cpu/mpc86xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu_init.c
@@ -9,8 +9,10 @@
  * cpu_init.c - low level cpu init
  */
 
+#include <asm-offsets.h>
 #include <config.h>
 #include <common.h>
+#include <init.h>
 #include <mpc86xx.h>
 #include <asm/mmu.h>
 #include <asm/fsl_law.h>
diff --git a/arch/powerpc/cpu/mpc86xx/interrupts.c b/arch/powerpc/cpu/mpc86xx/interrupts.c
index eb8e73e41c..5a916600ed 100644
--- a/arch/powerpc/cpu/mpc86xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc86xx/interrupts.c
@@ -16,6 +16,7 @@
 
 #include <common.h>
 #include <irq_func.h>
+#include <log.h>
 #include <mpc86xx.h>
 #include <command.h>
 #include <time.h>
@@ -23,6 +24,7 @@
 #ifdef CONFIG_POST
 #include <post.h>
 #endif
+#include <asm/ptrace.h>
 
 void interrupt_init_cpu(unsigned *decrementer_count)
 {
@@ -100,7 +102,7 @@ void irq_free_handler(int vec)
 /*
  * irqinfo - print information about PCI devices,not implemented.
  */
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return 0;
 }
diff --git a/arch/powerpc/cpu/mpc86xx/mp.c b/arch/powerpc/cpu/mpc86xx/mp.c
index 07c4c079df..08d11ad4f2 100644
--- a/arch/powerpc/cpu/mpc86xx/mp.c
+++ b/arch/powerpc/cpu/mpc86xx/mp.c
@@ -67,7 +67,7 @@ int is_core_disabled(int nr) {
 	return 0;
 }
 
-int cpu_release(u32 nr, int argc, char * const argv[])
+int cpu_release(u32 nr, int argc, char *const argv[])
 {
 	/* dummy function so common/cmd_mp.c will build
 	 * should be implemented in the future */
diff --git a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
index 0e0a90eb7b..ecc88ba437 100644
--- a/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
+++ b/arch/powerpc/cpu/mpc86xx/mpc8610_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
index d272d4ba29..4df446618c 100644
--- a/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
+++ b/arch/powerpc/cpu/mpc86xx/mpc8641_serdes.c
@@ -5,6 +5,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_serdes.h>
diff --git a/arch/powerpc/cpu/mpc86xx/traps.c b/arch/powerpc/cpu/mpc86xx/traps.c
index 79bab91367..c0161e3379 100644
--- a/arch/powerpc/cpu/mpc86xx/traps.c
+++ b/arch/powerpc/cpu/mpc86xx/traps.c
@@ -14,6 +14,7 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <command.h>
 #include <init.h>
 #include <kgdb.h>
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 4a1698d3bc..1b7c7fa01b 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -18,6 +18,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <net.h>
 #include <time.h>
 #include <vsprintf.h>
 #include <watchdog.h>
@@ -194,7 +195,7 @@ void upmconfig(uint upm, uint *table, uint size)
 
 /* ------------------------------------------------------------------------- */
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong msr, addr;
 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index 8bd6d0fbcf..c8d06b0508 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <watchdog.h>
 
 #include <mpc8xx.h>
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index 442c01ac6f..e5b62e9f4a 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -18,7 +18,8 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int do_siuinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_siuinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	sysconf8xx_t __iomem *sc = &immap->im_siu_conf;
@@ -35,8 +36,8 @@ static int do_siuinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static int do_memcinfo(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_memcinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	memctl8xx_t __iomem *memctl = &immap->im_memctl;
@@ -58,7 +59,8 @@ static int do_memcinfo(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_carinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_carinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	car8xx_t __iomem *car = &immap->im_clkrst;
@@ -119,7 +121,8 @@ static void binary(char *label, uint value, int nbits)
 #define PC_NBITS	12
 #define PD_NBITS	13
 
-static int do_iopinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_iopinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	iop8xx_t __iomem *iop = &immap->im_ioport;
@@ -172,7 +175,8 @@ static int do_iopinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * this needs a clean up for smaller tighter code
  * use *uint and set the address based on cmd + port
  */
-static int do_iopset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_iopset(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	uint rcode = 0;
 	iopin_t iopin;
@@ -328,7 +332,8 @@ static void prbrg(int n, uint val)
 	putc('\n');
 }
 
-static int do_brginfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_brginfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 	cpm8xx_t __iomem *cp = &immap->im_cpm;
diff --git a/arch/powerpc/cpu/mpc8xx/interrupts.c b/arch/powerpc/cpu/mpc8xx/interrupts.c
index 3efe8956ec..eef1951f2f 100644
--- a/arch/powerpc/cpu/mpc8xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc8xx/interrupts.c
@@ -12,6 +12,7 @@
 #include <asm/cpm_8xx.h>
 #include <asm/processor.h>
 #include <asm/io.h>
+#include <asm/ptrace.h>
 
 /************************************************************************/
 
diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index 899bcd8618..56794b08a1 100644
--- a/arch/powerpc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -16,6 +16,7 @@
  */
 
 #include <common.h>
+#include <asm/ptrace.h>
 #include <command.h>
 #include <asm/processor.h>
 
diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c
index ed482a9c09..da0a80e6fc 100644
--- a/arch/powerpc/cpu/mpc8xxx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xxx/cpu.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <tsec.h>
 #include <fm_eth.h>
 #include <netdev.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
index afcb75ba17..29489b46e6 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <hang.h>
+#include <init.h>
 #include <asm/fsl_lbc.h>
 
 #ifdef CONFIG_MPC83xx
diff --git a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
index d81af70f44..2c378b7615 100644
--- a/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
+++ b/arch/powerpc/cpu/mpc8xxx/fsl_pamu.c
@@ -6,6 +6,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/bitops.h>
 #include <linux/log2.h>
 #include <malloc.h>
 #include <asm/fsl_pamu.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c
index ca9e6aa8eb..e388386ad4 100644
--- a/arch/powerpc/cpu/mpc8xxx/law.c
+++ b/arch/powerpc/cpu/mpc8xxx/law.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <asm/bitops.h>
 #include <linux/compiler.h>
 #include <asm/fsl_law.h>
 #include <asm/io.h>
diff --git a/arch/powerpc/cpu/mpc8xxx/pamu_table.c b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
index 7b4690abc9..7dd71d2e0c 100644
--- a/arch/powerpc/cpu/mpc8xxx/pamu_table.c
+++ b/arch/powerpc/cpu/mpc8xxx/pamu_table.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/fsl_pamu.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/powerpc/cpu/mpc8xxx/srio.c b/arch/powerpc/cpu/mpc8xxx/srio.c
index a1f9403559..c73cf9319c 100644
--- a/arch/powerpc/cpu/mpc8xxx/srio.c
+++ b/arch/powerpc/cpu/mpc8xxx/srio.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <config.h>
+#include <log.h>
 #include <time.h>
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_srio.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 
 #ifdef CONFIG_SRIO_PCIE_BOOT_MASTER
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 3195351c9c..7eb005f450 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -1,6 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 dtb-$(CONFIG_TARGET_MPC8548CDS) += mpc8548cds.dtb mpc8548cds_36b.dtb
+dtb-$(CONFIG_TARGET_P1010RDB_PA) += p1010rdb-pa.dtb p1010rdb-pa_36b.dtb
+dtb-$(CONFIG_TARGET_P1010RDB_PB) += p1010rdb-pb.dtb p1010rdb-pb_36b.dtb
 dtb-$(CONFIG_TARGET_P1020RDB_PC) += p1020rdb-pc.dtb p1020rdb-pc_36b.dtb
 dtb-$(CONFIG_TARGET_P1020RDB_PD) += p1020rdb-pd.dtb
 dtb-$(CONFIG_TARGET_P2020RDB) += p2020rdb-pc.dtb p2020rdb-pc_36b.dtb
diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts
new file mode 100644
index 0000000000..c66c4923ac
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb-pa.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010 RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+/include/ "p1010si-pre.dtsi"
+
+/ {
+	model = "fsl,P1010RDB";
+	compatible = "fsl,P1010RDB";
+
+	/include/ "p1010rdb_32b.dtsi"
+};
+
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts b/arch/powerpc/dts/p1010rdb-pa_36b.dts
new file mode 100644
index 0000000000..b943de7cbb
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2020 NXP
+ */
+
+/include/ "p1010si-pre.dtsi"
+
+/ {
+	model = "fsl,P1010RDB";
+	compatible = "fsl,P1010RDB";
+
+	/include/ "p1010rdb_36b.dtsi"
+};
+
+/include/ "p1010si-post.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb-pb.dts b/arch/powerpc/dts/p1010rdb-pb.dts
new file mode 100644
index 0000000000..9ca562534f
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb-pb.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+/include/ "p1010si-pre.dtsi"
+
+/ {
+	model = "fsl,P1010RDB-PB";
+	compatible = "fsl,P1010RDB-PB";
+
+	/include/ "p1010rdb_32b.dtsi"
+};
+
+/include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb-pb_36b.dts b/arch/powerpc/dts/p1010rdb-pb_36b.dts
new file mode 100644
index 0000000000..eeff2a8704
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb-pb_36b.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2020 NXP
+ */
+
+/include/ "p1010si-pre.dtsi"
+
+/ {
+	model = "fsl,P1010RDB-PB";
+	compatible = "fsl,P1010RDB-PB";
+
+	/include/ "p1010rdb_36b.dtsi"
+};
+
+/include/ "p1010si-post.dtsi"
+/include/ "p1010rdb.dtsi"
diff --git a/arch/powerpc/dts/p1010rdb.dtsi b/arch/powerpc/dts/p1010rdb.dtsi
new file mode 100644
index 0000000000..4f58ee2446
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+&soc {
+	i2c@3000 {
+		rtc@68 {
+			compatible = "pericom,pt7c4338";
+			reg = <0x68>;
+		};
+	};
+};
diff --git a/arch/powerpc/dts/p1010rdb_32b.dtsi b/arch/powerpc/dts/p1010rdb_32b.dtsi
new file mode 100644
index 0000000000..5da790da5e
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb_32b.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010RDB Device Tree Source
+ *
+ * Copyright 2020 NXP
+ */
+
+soc: soc@ffe00000 {
+	ranges = <0x0 0x0 0xffe00000 0x100000>;
+};
+
+pci1: pcie@ffe09000 {
+	reg = <0 0xffe09000 0 0x1000>;
+	ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+		  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+};
+
+pci0: pcie@ffe0a000 {
+	reg = <0 0xffe0a000 0 0x1000>;
+	ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+		  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+};
diff --git a/arch/powerpc/dts/p1010rdb_36b.dtsi b/arch/powerpc/dts/p1010rdb_36b.dtsi
new file mode 100644
index 0000000000..54dd16e43b
--- /dev/null
+++ b/arch/powerpc/dts/p1010rdb_36b.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2020 NXP
+ */
+
+soc: soc@fffe00000 {
+	ranges = <0x0 0xf 0xffe00000 0x100000>;
+};
+
+pci1: pcie@fffe09000 {
+	reg = <0xf 0xffe09000 0 0x1000>;
+	ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+		  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+};
+
+pci0: pcie@fffe0a000 {
+	reg = <0xf 0xffe0a000 0 0x1000>;
+	ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
+		  0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+};
diff --git a/arch/powerpc/dts/p1010si-post.dtsi b/arch/powerpc/dts/p1010si-post.dtsi
new file mode 100644
index 0000000000..0289441381
--- /dev/null
+++ b/arch/powerpc/dts/p1010si-post.dtsi
@@ -0,0 +1,48 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2020 NXP
+ */
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	device_type = "soc";
+	compatible = "fsl,p1010-immr", "simple-bus";
+	bus-frequency = <0>;
+
+	mpic: pic@40000 {
+		interrupt-controller;
+		#address-cells = <0>;
+		#interrupt-cells = <4>;
+		reg = <0x40000 0x40000>;
+		compatible = "fsl,mpic";
+		device_type = "open-pic";
+		big-endian;
+		single-cpu-affinity;
+		last-interrupt-source = <255>;
+	};
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+};
+
+/* controller at 0x9000 */
+&pci1 {
+	compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
+	law_trgt_if = <1>;
+	#address-cells = <3>;
+	#size-cells = <2>;
+	device_type = "pci";
+	bus-range = <0x0 0xff>;
+};
+
+/* controller at 0xa000 */
+&pci0 {
+	compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq";
+	law_trgt_if = <2>;
+	#address-cells = <3>;
+	#size-cells = <2>;
+	device_type = "pci";
+	bus-range = <0x0 0xff>;
+};
diff --git a/arch/powerpc/dts/p1010si-pre.dtsi b/arch/powerpc/dts/p1010si-pre.dtsi
new file mode 100644
index 0000000000..9d7bb6c95d
--- /dev/null
+++ b/arch/powerpc/dts/p1010si-pre.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * P1010 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2020 NXP
+ */
+
+/dts-v1/;
+
+/include/ "e500v2_power_isa.dtsi"
+
+/ {
+	compatible = "fsl,P1010";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,P1010@0 {
+			device_type = "cpu";
+			reg = <0x0>;
+		};
+	};
+};
diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi
index 1c77702f01..1dce8e86e9 100644
--- a/arch/powerpc/dts/p1020-post.dtsi
+++ b/arch/powerpc/dts/p1020-post.dtsi
@@ -44,6 +44,8 @@
 		clock-frequency = <0>;
 	};
 
+	/include/ "pq3-i2c-0.dtsi"
+	/include/ "pq3-i2c-1.dtsi"
 };
 
 /* PCIe controller base address 0x9000 */
diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi
index 5bbd5c5468..4ed093dad4 100644
--- a/arch/powerpc/dts/p2020-post.dtsi
+++ b/arch/powerpc/dts/p2020-post.dtsi
@@ -37,6 +37,9 @@
 		/* Filled in by U-Boot */
 		clock-frequency = <0>;
 	};
+
+	/include/ "pq3-i2c-0.dtsi"
+	/include/ "pq3-i2c-1.dtsi"
 };
 
 /* PCIe controller base address 0x8000 */
diff --git a/arch/powerpc/dts/p2041.dtsi b/arch/powerpc/dts/p2041.dtsi
index 0f5e7dbdc8..95931e299d 100644
--- a/arch/powerpc/dts/p2041.dtsi
+++ b/arch/powerpc/dts/p2041.dtsi
@@ -3,7 +3,7 @@
  * P2041 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2011 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -86,6 +86,9 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe200000 {
diff --git a/arch/powerpc/dts/p3041.dtsi b/arch/powerpc/dts/p3041.dtsi
index 6736d00035..3152683b84 100644
--- a/arch/powerpc/dts/p3041.dtsi
+++ b/arch/powerpc/dts/p3041.dtsi
@@ -3,7 +3,7 @@
  * P3041 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2010 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -86,6 +86,8 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe200000 {
diff --git a/arch/powerpc/dts/p4080.dtsi b/arch/powerpc/dts/p4080.dtsi
index 02f39fbfcb..4a80561e18 100644
--- a/arch/powerpc/dts/p4080.dtsi
+++ b/arch/powerpc/dts/p4080.dtsi
@@ -3,7 +3,7 @@
  * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2011 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -97,6 +97,8 @@
 			reg = <0x211000 0x1000>;
 			phy_type = "ulpi";
 		};
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe200000 {
diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi
index 67a62a7725..45988574a2 100644
--- a/arch/powerpc/dts/p5040.dtsi
+++ b/arch/powerpc/dts/p5040.dtsi
@@ -3,7 +3,7 @@
  * P5040 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2012 - 2015 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -85,6 +85,9 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe200000 {
diff --git a/arch/powerpc/dts/pq3-i2c-0.dtsi b/arch/powerpc/dts/pq3-i2c-0.dtsi
new file mode 100644
index 0000000000..86a91e6336
--- /dev/null
+++ b/arch/powerpc/dts/pq3-i2c-0.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c@3000 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <0>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x3000 0x100>;
+	interrupts = <43 2 0 0>;
+};
diff --git a/arch/powerpc/dts/pq3-i2c-1.dtsi b/arch/powerpc/dts/pq3-i2c-1.dtsi
new file mode 100644
index 0000000000..5d79b1fb4c
--- /dev/null
+++ b/arch/powerpc/dts/pq3-i2c-1.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * PQ3 I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c@3100 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <1>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x3100 0x100>;
+	interrupts = <43 2 0 0>;
+};
diff --git a/arch/powerpc/dts/qoriq-i2c-0.dtsi b/arch/powerpc/dts/qoriq-i2c-0.dtsi
new file mode 100644
index 0000000000..9d0ab886e7
--- /dev/null
+++ b/arch/powerpc/dts/qoriq-i2c-0.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * QorIQ I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c0: i2c@118000 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <0>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x118000 0x100>;
+	interrupts = <38 2 0 0>;
+};
+
+i2c1: i2c@118100 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <1>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x118100 0x100>;
+	interrupts = <38 2 0 0>;
+};
diff --git a/arch/powerpc/dts/qoriq-i2c-1.dtsi b/arch/powerpc/dts/qoriq-i2c-1.dtsi
new file mode 100644
index 0000000000..de0a22e3e0
--- /dev/null
+++ b/arch/powerpc/dts/qoriq-i2c-1.dtsi
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * QorIQ I2C Device Tree stub
+ *
+ * Copyright 2020 NXP
+ */
+i2c2: i2c@119000 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <2>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x119000 0x100>;
+	interrupts = <39 2 0 0>;
+};
+
+i2c3: i2c@119100 {
+	#address-cells = <1>;
+	#size-cells = <0>;
+	cell-index = <3>;
+	compatible = "fsl-i2c";
+	u-boot,dm-pre-reloc;
+	reg = <0x119100 0x100>;
+	interrupts = <39 2 0 0>;
+};
diff --git a/arch/powerpc/dts/t102x.dtsi b/arch/powerpc/dts/t102x.dtsi
index a6b821a76a..521825d85a 100644
--- a/arch/powerpc/dts/t102x.dtsi
+++ b/arch/powerpc/dts/t102x.dtsi
@@ -3,7 +3,7 @@
  * T102X Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -75,6 +75,8 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe240000 {
diff --git a/arch/powerpc/dts/t104x.dtsi b/arch/powerpc/dts/t104x.dtsi
index 093aaab834..0a08a69f31 100644
--- a/arch/powerpc/dts/t104x.dtsi
+++ b/arch/powerpc/dts/t104x.dtsi
@@ -3,7 +3,7 @@
  * T104X Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -85,6 +85,8 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe240000 {
diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi
index 458019ae92..a9e9b404f6 100644
--- a/arch/powerpc/dts/t2080.dtsi
+++ b/arch/powerpc/dts/t2080.dtsi
@@ -3,7 +3,7 @@
  * T2080/T2081 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2018 NXP
+ * Copyright 2018,2020 NXP
  */
 
 /dts-v1/;
@@ -96,6 +96,8 @@
 			sata-number = <2>;
 			sata-fpdma = <0>;
 		};
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe240000 {
diff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi
index 43f98cd9e1..9b5902fe9e 100644
--- a/arch/powerpc/dts/t4240.dtsi
+++ b/arch/powerpc/dts/t4240.dtsi
@@ -3,7 +3,7 @@
  * T4240 Silicon/SoC Device Tree Source (pre include)
  *
  * Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 /dts-v1/;
@@ -125,6 +125,9 @@
 			reg = <0x114000 0x1000>;
 			clock-frequency = <0>;
 		};
+
+		/include/ "qoriq-i2c-0.dtsi"
+		/include/ "qoriq-i2c-1.dtsi"
 	};
 
 	pcie@ffe240000 {
diff --git a/arch/powerpc/include/asm/fsl_i2c.h b/arch/powerpc/include/asm/fsl_i2c.h
index fbf32b9a07..73105fa8e4 100644
--- a/arch/powerpc/include/asm/fsl_i2c.h
+++ b/arch/powerpc/include/asm/fsl_i2c.h
@@ -14,6 +14,7 @@
 #define _ASM_FSL_I2C_H_
 
 #include <asm/types.h>
+#include <linux/compiler.h>
 
 typedef struct fsl_i2c_base {
 
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 82e5f9ffc7..353dc4e874 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -7,6 +7,7 @@
 
 #ifndef __ASSEMBLY__
 /* Hardware Page Table Entry */
+#include <linux/bitops.h>
 typedef struct _PTE {
 #ifdef CONFIG_PPC64BRIDGE
 	unsigned long long vsid:52;
diff --git a/arch/powerpc/include/asm/u-boot.h b/arch/powerpc/include/asm/u-boot.h
index 1841565d0a..19b3c0db5f 100644
--- a/arch/powerpc/include/asm/u-boot.h
+++ b/arch/powerpc/include/asm/u-boot.h
@@ -13,6 +13,8 @@
 #ifndef __U_BOOT_H__
 #define __U_BOOT_H__
 
+#include <config.h>
+
 /* For image.h:image_check_target_arch() */
 #define IH_ARCH_DEFAULT IH_ARCH_PPC
 
diff --git a/arch/powerpc/lib/bootm.c b/arch/powerpc/lib/bootm.c
index 390e8c0673..cd92db0a92 100644
--- a/arch/powerpc/lib/bootm.c
+++ b/arch/powerpc/lib/bootm.c
@@ -8,9 +8,12 @@
 
 
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <init.h>
+#include <lmb.h>
+#include <log.h>
 #include <watchdog.h>
 #include <command.h>
 #include <image.h>
@@ -51,8 +54,8 @@ static void boot_jump_linux(bootm_headers_t *images)
 
 	kernel = (void (*)(bd_t *, ulong, ulong, ulong,
 			   ulong, ulong, ulong))images->ep;
-	debug ("## Transferring control to Linux (at address %08lx) ...\n",
-		(ulong)kernel);
+	debug("## Transferring control to Linux (at address %08lx) ...\n",
+	      (ulong)kernel);
 
 	bootstage_mark(BOOTSTAGE_ID_RUN_OS);
 
@@ -79,7 +82,7 @@ static void boot_jump_linux(bootm_headers_t *images)
 		 *   r8: 0
 		 *   r9: 0
 		 */
-		debug ("   Booting using OF flat tree...\n");
+		debug("   Booting using OF flat tree...\n");
 		WATCHDOG_RESET ();
 		(*kernel) ((bd_t *)of_flat_tree, 0, 0, EPAPR_MAGIC,
 			   env_get_bootm_mapsize(), 0, 0);
@@ -103,7 +106,7 @@ static void boot_jump_linux(bootm_headers_t *images)
 		ulong initrd_end = images->initrd_end;
 		bd_t *kbd = images->kbd;
 
-		debug ("   Booting using board info...\n");
+		debug("   Booting using board info...\n");
 		WATCHDOG_RESET ();
 		(*kernel) (kbd, initrd_start, initrd_end,
 			   cmd_start, cmd_end, 0, 0);
@@ -147,7 +150,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 	 * pointer.
 	 */
 	sp = get_sp();
-	debug ("## Current stack ends at 0x%08lx\n", sp);
+	debug("## Current stack ends at 0x%08lx\n", sp);
 
 	/* adjust sp by 4K to be safe */
 	sp -= 4096;
@@ -230,8 +233,8 @@ static int boot_body_linux(bootm_headers_t *images)
 	return 0;
 }
 
-noinline
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+noinline int do_bootm_linux(int flag, int argc, char *const argv[],
+			    bootm_headers_t *images)
 {
 	int	ret;
 
diff --git a/arch/powerpc/lib/extable.c b/arch/powerpc/lib/extable.c
index 683fd53b6a..7e9d4f22f3 100644
--- a/arch/powerpc/lib/extable.c
+++ b/arch/powerpc/lib/extable.c
@@ -6,6 +6,7 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  */
 #include <common.h>
+#include <log.h>
 
 /*
  * The exception table consists of pairs of addresses: the first is the
diff --git a/arch/powerpc/lib/interrupts.c b/arch/powerpc/lib/interrupts.c
index 64ee0cc210..73f270002c 100644
--- a/arch/powerpc/lib/interrupts.c
+++ b/arch/powerpc/lib/interrupts.c
@@ -14,6 +14,7 @@
 #ifdef CONFIG_LED_STATUS
 #include <status_led.h>
 #endif
+#include <asm/ptrace.h>
 
 #ifndef CONFIG_MPC83XX_TIMER
 #ifndef CONFIG_SYS_WATCHDOG_FREQ
diff --git a/arch/powerpc/lib/kgdb.c b/arch/powerpc/lib/kgdb.c
index f580c023e5..8727d18884 100644
--- a/arch/powerpc/lib/kgdb.c
+++ b/arch/powerpc/lib/kgdb.c
@@ -1,6 +1,7 @@
 #include <common.h>
 #include <command.h>
 #include <kgdb.h>
+#include <asm/ptrace.h>
 #include <asm/signal.h>
 #include <asm/processor.h>
 
@@ -252,7 +253,7 @@ kgdb_putregs(struct pt_regs *regs, char *buf, int length)
    the debugger. */
 
 void
-kgdb_breakpoint(int argc, char * const argv[])
+kgdb_breakpoint(int argc, char *const argv[])
 {
 	asm("	.globl breakinst\n\
 	     breakinst: .long 0x7d821008\n\
diff --git a/arch/powerpc/lib/spl.c b/arch/powerpc/lib/spl.c
index d90a6e27b9..d4a6057527 100644
--- a/arch/powerpc/lib/spl.c
+++ b/arch/powerpc/lib/spl.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <config.h>
+#include <log.h>
 #include <spl.h>
 #include <image.h>
 #include <linux/compiler.h>
diff --git a/arch/powerpc/lib/stack.c b/arch/powerpc/lib/stack.c
index 9a956c221d..5840fe6349 100644
--- a/arch/powerpc/lib/stack.c
+++ b/arch/powerpc/lib/stack.c
@@ -11,6 +11,7 @@
  * Marius Groeger <mgroeger@sysgo.de>
  */
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/lib/time.c b/arch/powerpc/lib/time.c
index e1494fa129..8d6babfb83 100644
--- a/arch/powerpc/lib/time.c
+++ b/arch/powerpc/lib/time.c
@@ -5,8 +5,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 /* ------------------------------------------------------------------------- */
 
diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c
index 9df629d23c..35f23c748d 100644
--- a/arch/riscv/cpu/ax25/cache.c
+++ b/arch/riscv/cpu/ax25/cache.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <asm/cache.h>
 #include <dm/uclass-internal.h>
 #include <cache.h>
 #include <asm/csr.h>
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index e457f6acbf..5804aa8e73 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -6,9 +6,11 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <init.h>
 #include <log.h>
 #include <asm/encoding.h>
 #include <dm/uclass-internal.h>
+#include <linux/bitops.h>
 
 /*
  * The variables here must be stored in the data section since they are used
diff --git a/arch/riscv/cpu/generic/cpu.c b/arch/riscv/cpu/generic/cpu.c
index 13a69ef0cc..d78e1a3453 100644
--- a/arch/riscv/cpu/generic/cpu.c
+++ b/arch/riscv/cpu/generic/cpu.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <irq_func.h>
+#include <asm/cache.h>
 
 /*
  * cleanup_before_linux() is called just before we call linux
diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
new file mode 100644
index 0000000000..2aebfab646
--- /dev/null
+++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
+ */
+
+/ {
+	aliases {
+		spi0 = &qspi0;
+		spi2 = &qspi2;
+	};
+};
diff --git a/arch/riscv/include/asm/encoding.h b/arch/riscv/include/asm/encoding.h
index a0695da936..edafad36b3 100644
--- a/arch/riscv/include/asm/encoding.h
+++ b/arch/riscv/include/asm/encoding.h
@@ -8,6 +8,9 @@
 #define RISCV_CSR_ENCODING_H
 
 #include <asm/csr.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 #if CONFIG_IS_ENABLED(RISCV_SMODE)
 #define MODE_PREFIX(__suffix)	s##__suffix
diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
index 3595ee8bf7..453cb5cec5 100644
--- a/arch/riscv/include/asm/sbi.h
+++ b/arch/riscv/include/asm/sbi.h
@@ -106,8 +106,6 @@ void sbi_console_putchar(int ch);
 int sbi_console_getchar(void);
 void sbi_clear_ipi(void);
 void sbi_shutdown(void);
-#endif
-void sbi_set_timer(uint64_t stime_value);
 void sbi_send_ipi(const unsigned long *hart_mask);
 void sbi_remote_fence_i(const unsigned long *hart_mask);
 void sbi_remote_sfence_vma(const unsigned long *hart_mask,
@@ -117,7 +115,8 @@ void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
 				unsigned long start,
 				unsigned long size,
 				unsigned long asid);
-
+#endif
+void sbi_set_timer(uint64_t stime_value);
 int sbi_probe_extension(int ext);
 
 #endif
diff --git a/arch/riscv/lib/boot.c b/arch/riscv/lib/boot.c
index 42b15a13a2..778d011f7c 100644
--- a/arch/riscv/lib/boot.c
+++ b/arch/riscv/lib/boot.c
@@ -8,7 +8,7 @@
 #include <command.h>
 
 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
-			 int argc, char * const argv[])
+			 int argc, char *const argv[])
 {
 	cleanup_before_linux();
 
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index 0d06095da1..c4137ded83 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -7,10 +7,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <dm.h>
 #include <fdt_support.h>
 #include <hang.h>
+#include <log.h>
 #include <dm/root.h>
 #include <image.h>
 #include <asm/byteorder.h>
@@ -105,7 +107,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
 	}
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[],
+int do_bootm_linux(int flag, int argc, char *const argv[],
 		   bootm_headers_t *images)
 {
 	/* No need for those on RISC-V */
@@ -127,7 +129,7 @@ int do_bootm_linux(int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_bootm_vxworks(int flag, int argc, char * const argv[],
+int do_bootm_vxworks(int flag, int argc, char *const argv[],
 		     bootm_headers_t *images)
 {
 	return do_bootm_linux(flag, argc, argv, images);
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index 20e0759f13..6db48ad04a 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <mapmem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/riscv/lib/image.c b/arch/riscv/lib/image.c
index 7357d3b07d..91b7f1624e 100644
--- a/arch/riscv/lib/image.c
+++ b/arch/riscv/lib/image.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <mapmem.h>
 #include <errno.h>
 #include <linux/sizes.h>
diff --git a/arch/riscv/lib/reset.c b/arch/riscv/lib/reset.c
index ce3c1cf872..8779c619cc 100644
--- a/arch/riscv/lib/reset.c
+++ b/arch/riscv/lib/reset.c
@@ -7,7 +7,7 @@
 #include <command.h>
 #include <hang.h>
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	printf("resetting ...\n");
 
diff --git a/arch/riscv/lib/sbi.c b/arch/riscv/lib/sbi.c
index 7bdf071dbb..993597e33d 100644
--- a/arch/riscv/lib/sbi.c
+++ b/arch/riscv/lib/sbi.c
@@ -39,6 +39,23 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
 	return ret;
 }
 
+/**
+ * sbi_set_timer() - Program the timer for next timer event.
+ * @stime_value: The value after which next timer event should fire.
+ *
+ * Return: None
+ */
+void sbi_set_timer(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+		  stime_value >> 32, 0, 0, 0, 0);
+#else
+	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
+		  0, 0, 0, 0, 0);
+#endif
+}
+
 #ifdef CONFIG_SBI_V01
 
 /**
@@ -86,25 +103,6 @@ void sbi_shutdown(void)
 	sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
 }
 
-#endif /* CONFIG_SBI_V01 */
-
-/**
- * sbi_set_timer() - Program the timer for next timer event.
- * @stime_value: The value after which next timer event should fire.
- *
- * Return: None
- */
-void sbi_set_timer(uint64_t stime_value)
-{
-#if __riscv_xlen == 32
-	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
-		  stime_value >> 32, 0, 0, 0, 0);
-#else
-	sbi_ecall(SBI_EXT_SET_TIMER, SBI_FID_SET_TIMER, stime_value,
-		  0, 0, 0, 0, 0);
-#endif
-}
-
 /**
  * sbi_send_ipi() - Send an IPI to any hart.
  * @hart_mask: A cpu mask containing all the target harts.
@@ -185,3 +183,4 @@ int sbi_probe_extension(int extid)
 
 	return -ENOTSUPP;
 }
+#endif /* CONFIG_SBI_V01 */
diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
index 4ca038b148..c47dcd46ce 100644
--- a/arch/riscv/lib/spl.c
+++ b/arch/riscv/lib/spl.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/smp.h>
 
diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 56ee3f5826..fb857e53d5 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -4,9 +4,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <os.h>
 #include <asm/io.h>
diff --git a/arch/sandbox/cpu/spl.c b/arch/sandbox/cpu/spl.c
index d5f683bbaa..7ab8919eb9 100644
--- a/arch/sandbox/cpu/spl.c
+++ b/arch/sandbox/cpu/spl.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <os.h>
 #include <spl.h>
 #include <asm/spl.h>
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index b6ff5c3d64..c6a2bbe468 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <errno.h>
+#include <init.h>
 #include <os.h>
 #include <cli.h>
 #include <sort.h>
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c
index a347cec528..1f794123b3 100644
--- a/arch/sandbox/cpu/state.c
+++ b/arch/sandbox/cpu/state.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <os.h>
 #include <asm/malloc.h>
 #include <asm/state.h>
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index df9f1835c9..5ce5e28476 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -104,7 +104,9 @@
 			<&gpio_c 2 GPIO_OUT>,
 			<&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
 			<&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
-			<&gpio_c 5 GPIO_IN>;
+			<&gpio_c 5 GPIO_IN>,
+			<&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
+			<&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
 		int-value = <1234>;
 		uint-value = <(-1234)>;
 		int64-value = /bits/ 64 <0x1111222233334444>;
@@ -159,12 +161,23 @@
 		broken;
 	};
 
+	phy_provider2: gen_phy@2 {
+		compatible = "sandbox,phy";
+		#phy-cells = <0>;
+	};
+
 	gen_phy_user: gen_phy_user {
 		compatible = "simple-bus";
 		phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
 		phy-names = "phy1", "phy2", "phy3";
 	};
 
+	gen_phy_user1: gen_phy_user1 {
+		compatible = "simple-bus";
+		phys = <&phy_provider0 0>, <&phy_provider2>;
+		phy-names = "phy1", "phy2";
+	};
+
 	some-bus {
 		#address-cells = <1>;
 		#size-cells = <0>;
@@ -218,6 +231,24 @@
 		compatible = "denx,u-boot-fdt-test1";
 	};
 
+	i-test {
+		compatible = "mediatek,u-boot-fdt-test";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		subnode@0 {
+			reg = <0>;
+		};
+
+		subnode@1 {
+			reg = <1>;
+		};
+
+		subnode@2 {
+			reg = <2>;
+		};
+	};
+
 	devres-test {
 		compatible = "denx,u-boot-devres-test";
 	};
@@ -226,6 +257,10 @@
 		compatible = "denx,u-boot-acpi-test";
 	};
 
+	acpi-test2 {
+		compatible = "denx,u-boot-acpi-test";
+	};
+
 	clocks {
 		clk_fixed: clk-fixed {
 			compatible = "fixed-clock";
diff --git a/arch/sandbox/include/asm/eth.h b/arch/sandbox/include/asm/eth.h
index 477fa00fad..b313bf57c6 100644
--- a/arch/sandbox/include/asm/eth.h
+++ b/arch/sandbox/include/asm/eth.h
@@ -9,6 +9,8 @@
 #ifndef __ETH_H
 #define __ETH_H
 
+#include <net.h>
+
 void sandbox_eth_disable_response(int index, bool disable);
 
 void sandbox_eth_skip_timeout(void);
diff --git a/arch/sandbox/include/asm/global_data.h b/arch/sandbox/include/asm/global_data.h
index f4ce72d566..f95ddb058a 100644
--- a/arch/sandbox/include/asm/global_data.h
+++ b/arch/sandbox/include/asm/global_data.h
@@ -13,6 +13,7 @@
 struct arch_global_data {
 	uint8_t		*ram_buf;	/* emulated RAM buffer */
 	void		*text_base;	/* pointer to base of text region */
+	ulong acpi_start;		/* Start address of ACPI tables */
 };
 
 #include <asm-generic/global_data.h>
diff --git a/arch/sandbox/lib/bootm.c b/arch/sandbox/lib/bootm.c
index 2de03fb8e0..d1d460b84a 100644
--- a/arch/sandbox/lib/bootm.c
+++ b/arch/sandbox/lib/bootm.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <image.h>
 #include <asm/io.h>
 
 #define	LINUX_ARM_ZIMAGE_MAGIC	0x016f2818
diff --git a/arch/sandbox/lib/pci_io.c b/arch/sandbox/lib/pci_io.c
index f22e47c7f6..2038141947 100644
--- a/arch/sandbox/lib/pci_io.c
+++ b/arch/sandbox/lib/pci_io.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/io.h>
 
 int pci_map_physmem(phys_addr_t paddr, unsigned long *lenp,
diff --git a/arch/sh/config.mk b/arch/sh/config.mk
index 6ef44638ab..85dab383e7 100644
--- a/arch/sh/config.mk
+++ b/arch/sh/config.mk
@@ -13,6 +13,6 @@ LDFLAGS_STANDALONE += -EB
 endif
 
 PLATFORM_CPPFLAGS += -DCONFIG_SH -D__SH__
-PLATFORM_RELFLAGS += -fpic
+PLATFORM_RELFLAGS += -fpic -ffunction-sections -fdata-sections
 LDFLAGS_FINAL = --gc-sections
 PLATFORM_RELFLAGS += -ffixed-r13
diff --git a/arch/sh/cpu/sh4/cache.c b/arch/sh/cpu/sh4/cache.c
index 2f49ce8681..0f7dfdd3cf 100644
--- a/arch/sh/cpu/sh4/cache.c
+++ b/arch/sh/cpu/sh4/cache.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/system.h>
diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index a8d0590d51..f032d88159 100644
--- a/arch/sh/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <irq_func.h>
 #include <cpu_func.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/processor.h>
 
@@ -28,7 +29,7 @@ int cleanup_before_linux (void)
 	return 0;
 }
 
-int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	disable_interrupts();
 	reset_cpu(0);
diff --git a/arch/sh/lib/bootm.c b/arch/sh/lib/bootm.c
index 2896e45f0d..dc94f83785 100644
--- a/arch/sh/lib/bootm.c
+++ b/arch/sh/lib/bootm.c
@@ -9,6 +9,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <env.h>
+#include <image.h>
 #include <asm/byteorder.h>
 #include <asm/zimage.h>
 
@@ -49,7 +51,8 @@ static unsigned long sh_check_cmd_arg(char *cmdline, char *key, int base)
 	return val;
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[], bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+		   bootm_headers_t *images)
 {
 	/* Linux kernel load address */
 	void (*kernel) (void) = (void (*)(void))images->ep;
diff --git a/arch/sh/lib/time.c b/arch/sh/lib/time.c
index 51e1cc1181..f951544728 100644
--- a/arch/sh/lib/time.c
+++ b/arch/sh/lib/time.c
@@ -11,8 +11,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/processor.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #if defined(CONFIG_CPU_SH4) || defined(CONFIG_ARCH_RMOBILE)
 #define TSTR	0x4
diff --git a/arch/sh/lib/time_sh2.c b/arch/sh/lib/time_sh2.c
index d82c1d2feb..5484c543c6 100644
--- a/arch/sh/lib/time_sh2.c
+++ b/arch/sh/lib/time_sh2.c
@@ -8,9 +8,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/processor.h>
+#include <linux/delay.h>
 
 #define CMT_CMCSR_INIT	0x0001	/* PCLK/32 */
 #define CMT_CMCSR_CALIB 0x0000
diff --git a/arch/sh/lib/zimageboot.c b/arch/sh/lib/zimageboot.c
index 602776a474..c38f0933f8 100644
--- a/arch/sh/lib/zimageboot.c
+++ b/arch/sh/lib/zimageboot.c
@@ -10,11 +10,14 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <env.h>
 #include <irq_func.h>
 #include <asm/io.h>
 #include <asm/zimage.h>
 
-int do_sh_zimageboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_sh_zimageboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	ulong (*zboot_entry)(int, char * const []) = NULL;
 	char *s0, *s1;
diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile
index 307267a8fb..ee0499f5d7 100644
--- a/arch/x86/cpu/Makefile
+++ b/arch/x86/cpu/Makefile
@@ -54,9 +54,11 @@ obj-$(CONFIG_INTEL_QUARK) += quark/
 obj-$(CONFIG_INTEL_QUEENSBAY) += queensbay/
 obj-$(CONFIG_INTEL_TANGIER) += tangier/
 obj-$(CONFIG_APIC) += lapic.o ioapic.o
-obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += irq.o
 obj-$(CONFIG_$(SPL_TPL_)ACPI_GPE) += acpi_gpe.o
 obj-$(CONFIG_QFW) += qfw_cpu.o
+ifndef CONFIG_SYS_COREBOOT
+obj-$(CONFIG_$(SPL_TPL_)X86_32BIT_INIT) += irq.o
+endif
 ifndef CONFIG_$(SPL_)X86_64
 obj-$(CONFIG_SMP) += mp_init.o
 endif
diff --git a/arch/x86/cpu/acpi_gpe.c b/arch/x86/cpu/acpi_gpe.c
index 55005455c0..8aa2009bd6 100644
--- a/arch/x86/cpu/acpi_gpe.c
+++ b/arch/x86/cpu/acpi_gpe.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <irq.h>
+#include <log.h>
 #include <asm/io.h>
 
 /**
diff --git a/arch/x86/cpu/apollolake/Makefile b/arch/x86/cpu/apollolake/Makefile
index 578e15c4bf..3aa2a55676 100644
--- a/arch/x86/cpu/apollolake/Makefile
+++ b/arch/x86/cpu/apollolake/Makefile
@@ -10,6 +10,7 @@ obj-y += cpu_common.o
 ifndef CONFIG_TPL_BUILD
 obj-y += cpu.o
 obj-y += punit.o
+obj-y += fsp_bindings.o
 ifdef CONFIG_SPL_BUILD
 obj-y += fsp_m.o
 endif
diff --git a/arch/x86/cpu/apollolake/cpu_spl.c b/arch/x86/cpu/apollolake/cpu_spl.c
index e2509e391f..707ceb3e64 100644
--- a/arch/x86/cpu/apollolake/cpu_spl.c
+++ b/arch/x86/cpu/apollolake/cpu_spl.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ec_commands.h>
+#include <init.h>
 #include <log.h>
 #include <spi_flash.h>
 #include <spl.h>
diff --git a/arch/x86/cpu/apollolake/fsp_bindings.c b/arch/x86/cpu/apollolake/fsp_bindings.c
new file mode 100644
index 0000000000..9130af9ce0
--- /dev/null
+++ b/arch/x86/cpu/apollolake/fsp_bindings.c
@@ -0,0 +1,1805 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <log.h>
+#include <asm/arch/fsp_bindings.h>
+
+/**
+ * read_u8_prop() - Read an u8 property from devicetree (scalar or array)
+ * @node:  Valid node reference to read property from
+ * @name:  Name of the property to read from
+ * @count: If the property is expected to be an array, this is the
+ *         number of expected elements
+ *         Set to 0 if the property is expected to be a scalar
+ * @dst:   Pointer to destination of where to save the value(s) read
+ *         from devicetree
+ */
+static void read_u8_prop(ofnode node, char *name, size_t count, u8 *dst)
+{
+	u32 tmp;
+	const u8 *buf;
+	int ret;
+
+	if (count == 0) {
+		ret = ofnode_read_u32(node, name, &tmp);
+		if (ret == 0)
+			*dst = tmp;
+	} else {
+		buf = ofnode_read_u8_array_ptr(node, name, count);
+		if (buf)
+			memcpy(dst, buf, count);
+	}
+}
+
+/**
+ * read_u16_prop() - Read an u16 property from devicetree (scalar or array)
+ * @node:  Valid node reference to read property from
+ * @name:  Name of the property to read from
+ * @count: If the property is expected to be an array, this is the
+ *         number of expected elements
+ *         Set to 0 if the property is expected to be a scalar
+ * @dst:   Pointer to destination of where to save the value(s) read
+ *         from devicetree
+ * @return 0 on success, -ve on error
+ */
+static int read_u16_prop(ofnode node, char *name, size_t count, u16 *dst)
+{
+	u32 tmp;
+	u32 buf[32];
+	int ret;
+
+	if (ARRAY_SIZE(buf) < count) {
+		debug("ERROR: %s buffer to small!\n", __func__);
+		return -ENOSPC;
+	}
+
+	if (count == 0) {
+		ret = ofnode_read_u32(node, name, &tmp);
+		if (ret == 0)
+			*dst = tmp;
+	} else {
+		ret = ofnode_read_u32_array(node, name, buf, count);
+		if (ret == 0)
+			for (int i = 0; i < count; i++)
+				dst[i] = buf[i];
+	}
+
+	return 0;
+}
+
+/**
+ * read_u32_prop() - Read an u32 property from devicetree (scalar or array)
+ * @node:  Valid node reference to read property from
+ * @name:  Name of the property to read from
+ * @count: If the property is expected to be an array, this is the
+ *         number of expected elements
+ *         set to 0 if the property is expected to be a scalar
+ * @dst:   Pointer to destination of where to save the value(s) read
+ *         from devicetree
+ */
+static void read_u32_prop(ofnode node, char *name, size_t count, u32 *dst)
+{
+	if (count == 0)
+		ofnode_read_u32(node, name, dst);
+	else
+		ofnode_read_u32_array(node, name, dst, count);
+}
+
+/**
+ * read_string_prop() - Read a string property from devicetree
+ * @node:  Valid node reference to read property from
+ * @name:  Name of the property to read from
+ * @count: Size of the destination buffer
+ * @dst:   Pointer to destination of where to save the values read
+ *         from devicetree
+ */
+static void read_string_prop(ofnode node, char *name, size_t count, char *dst)
+{
+	const char *string_buf;
+
+	if (count > 0) {
+		string_buf = ofnode_read_string(node, name);
+		if (string_buf)
+			strlcpy(dst, string_buf, count);
+	}
+}
+
+/**
+ * read_swizzle_prop() - Read a swizzle property from devicetree
+ * @node:  Valid node reference to read property from
+ * @name:  Name of the property to read from
+ * @count: Number of elements in the swizzle configuration
+ * @dst:   pointer to destination of where to save the values read
+ *         from devicetree
+ */
+static void read_swizzle_prop(ofnode node, char *name, size_t count, u8 *dst)
+{
+	const struct lpddr4_chan_swizzle_cfg *sch;
+	/* Number of bytes to copy per DQS */
+	const size_t sz = DQ_BITS_PER_DQS;
+	const struct lpddr4_swizzle_cfg *swizzle_cfg;
+
+	swizzle_cfg = (const struct lpddr4_swizzle_cfg *)
+			ofnode_read_u8_array_ptr(node, name, count);
+
+	if (!swizzle_cfg)
+		return;
+	/*
+	 * CH0_DQB byte lanes in the bit swizzle configuration field are
+	 * not 1:1. The mapping within the swizzling field is:
+	 *   indices [0:7]   - byte lane 1 (DQS1) DQ[8:15]
+	 *   indices [8:15]  - byte lane 0 (DQS0) DQ[0:7]
+	 *   indices [16:23] - byte lane 3 (DQS3) DQ[24:31]
+	 *   indices [24:31] - byte lane 2 (DQS2) DQ[16:23]
+	 */
+	sch = &swizzle_cfg->phys[LP4_PHYS_CH0B];
+	memcpy(&dst[0 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
+	memcpy(&dst[1 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
+	memcpy(&dst[2 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
+	memcpy(&dst[3 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
+
+	/*
+	 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
+	 */
+	sch = &swizzle_cfg->phys[LP4_PHYS_CH0A];
+	memcpy(&dst[4 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
+	memcpy(&dst[5 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
+	memcpy(&dst[6 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
+	memcpy(&dst[7 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
+
+	sch = &swizzle_cfg->phys[LP4_PHYS_CH1B];
+	memcpy(&dst[8 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
+	memcpy(&dst[9 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
+	memcpy(&dst[10 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
+	memcpy(&dst[11 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
+
+	/*
+	 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
+	 */
+	sch = &swizzle_cfg->phys[LP4_PHYS_CH1A];
+	memcpy(&dst[12 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS0], sz);
+	memcpy(&dst[13 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS1], sz);
+	memcpy(&dst[14 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS2], sz);
+	memcpy(&dst[15 * DQ_BITS_PER_DQS], &sch->dqs[LP4_DQS3], sz);
+}
+
+/**
+ * fsp_update_config_from_dtb() - Read FSP config from devicetree node
+ * @node: Valid node reference to read property from
+ * @cfg:  Pointer to FSP config structure
+ * @fsp_bindings: Binding describing which devicetree properties should
+ *                be stored where in the FSP configuration structure
+ *                The end of the list is declared by a NULL pointer in propname
+ * @return 0 on success, -ve on error
+ *
+ * This function reads the configuration for FSP from the provided
+ * devicetree node and saves it in the FSP configuration structure.
+ * Configuration options that are not present in the devicetree are
+ * left at their current value.
+ */
+__maybe_unused
+static int fsp_update_config_from_dtb(ofnode node, u8 *cfg,
+				      const struct fsp_binding *fsp_bindings)
+{
+	const struct fsp_binding *fspb;
+	int ret;
+
+	for (int i = 0; fsp_bindings[i].propname; i++) {
+		fspb = &fsp_bindings[i];
+
+		switch (fspb->type) {
+		case FSP_UINT8:
+			read_u8_prop(node, fspb->propname, fspb->count,
+				     &cfg[fspb->offset]);
+		break;
+		case FSP_UINT16:
+			ret = read_u16_prop(node, fspb->propname, fspb->count,
+					    (u16 *)&cfg[fspb->offset]);
+			if (ret)
+				return ret;
+		break;
+		case FSP_UINT32:
+			read_u32_prop(node, fspb->propname, fspb->count,
+				      (u32 *)&cfg[fspb->offset]);
+		break;
+		case FSP_STRING:
+			read_string_prop(node, fspb->propname, fspb->count,
+					 (char *)&cfg[fspb->offset]);
+		break;
+		case FSP_LPDDR4_SWIZZLE:
+			read_swizzle_prop(node, fspb->propname, fspb->count,
+					  &cfg[fspb->offset]);
+		break;
+		}
+	}
+
+	return 0;
+}
+
+#if defined(CONFIG_SPL_BUILD)
+const struct fsp_binding fsp_m_bindings[] = {
+	{
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, serial_debug_port_address),
+	.propname = "fspm,serial-debug-port-address",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, serial_debug_port_type),
+	.propname = "fspm,serial-debug-port-type",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, serial_debug_port_device),
+	.propname = "fspm,serial-debug-port-device",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, serial_debug_port_stride_size),
+	.propname = "fspm,serial-debug-port-stride-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, mrc_fast_boot),
+	.propname = "fspm,mrc-fast-boot",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, igd),
+	.propname = "fspm,igd",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, igd_dvmt50_pre_alloc),
+	.propname = "fspm,igd-dvmt50-pre-alloc",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, igd_aperture_size),
+	.propname = "fspm,igd-aperture-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, gtt_size),
+	.propname = "fspm,gtt-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, primary_video_adaptor),
+	.propname = "fspm,primary-video-adaptor",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, package),
+	.propname = "fspm,package",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, profile),
+	.propname = "fspm,profile",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, memory_down),
+	.propname = "fspm,memory-down",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, ddr3_l_page_size),
+	.propname = "fspm,ddr3-l-page-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, ddr3_lasr),
+	.propname = "fspm,ddr3-lasr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, scrambler_support),
+	.propname = "fspm,scrambler-support",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, interleaved_mode),
+	.propname = "fspm,interleaved-mode",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config, channel_hash_mask),
+	.propname = "fspm,channel-hash-mask",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config, slice_hash_mask),
+	.propname = "fspm,slice-hash-mask",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, channels_slices_enable),
+	.propname = "fspm,channels-slices-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, min_ref_rate2x_enable),
+	.propname = "fspm,min-ref-rate2x-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, dual_rank_support_enable),
+	.propname = "fspm,dual-rank-support-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, rmt_mode),
+	.propname = "fspm,rmt-mode",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config, memory_size_limit),
+	.propname = "fspm,memory-size-limit",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config, low_memory_max_value),
+	.propname = "fspm,low-memory-max-value",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config, high_memory_max_value),
+	.propname = "fspm,high-memory-max-value",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, disable_fast_boot),
+	.propname = "fspm,disable-fast-boot",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, dimm0_spd_address),
+	.propname = "fspm,dimm0-spd-address",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, dimm1_spd_address),
+	.propname = "fspm,dimm1-spd-address",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].rank_enable),
+	.propname = "fspm,ch0-rank-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].device_width),
+	.propname = "fspm,ch0-device-width",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].dram_density),
+	.propname = "fspm,ch0-dram-density",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].option),
+	.propname = "fspm,ch0-option",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].odt_config),
+	.propname = "fspm,ch0-odt-config",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].tristate_clk1),
+	.propname = "fspm,ch0-tristate-clk1",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].mode2_n),
+	.propname = "fspm,ch0-mode2-n",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[0].odt_levels),
+	.propname = "fspm,ch0-odt-levels",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].rank_enable),
+	.propname = "fspm,ch1-rank-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].device_width),
+	.propname = "fspm,ch1-device-width",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].dram_density),
+	.propname = "fspm,ch1-dram-density",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].option),
+	.propname = "fspm,ch1-option",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].odt_config),
+	.propname = "fspm,ch1-odt-config",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].tristate_clk1),
+	.propname = "fspm,ch1-tristate-clk1",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].mode2_n),
+	.propname = "fspm,ch1-mode2-n",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[1].odt_levels),
+	.propname = "fspm,ch1-odt-levels",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].rank_enable),
+	.propname = "fspm,ch2-rank-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].device_width),
+	.propname = "fspm,ch2-device-width",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].dram_density),
+	.propname = "fspm,ch2-dram-density",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].option),
+	.propname = "fspm,ch2-option",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].odt_config),
+	.propname = "fspm,ch2-odt-config",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].tristate_clk1),
+	.propname = "fspm,ch2-tristate-clk1",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].mode2_n),
+	.propname = "fspm,ch2-mode2-n",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[2].odt_levels),
+	.propname = "fspm,ch2-odt-levels",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].rank_enable),
+	.propname = "fspm,ch3-rank-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].device_width),
+	.propname = "fspm,ch3-device-width",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].dram_density),
+	.propname = "fspm,ch3-dram-density",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].option),
+	.propname = "fspm,ch3-option",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].odt_config),
+	.propname = "fspm,ch3-odt-config",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].tristate_clk1),
+	.propname = "fspm,ch3-tristate-clk1",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].mode2_n),
+	.propname = "fspm,ch3-mode2-n",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, chan[3].odt_levels),
+	.propname = "fspm,ch3-odt-levels",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, rmt_check_run),
+	.propname = "fspm,rmt-check-run",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_m_config,
+			   rmt_margin_check_scale_high_threshold),
+	.propname = "fspm,rmt-margin-check-scale-high-threshold",
+	}, {
+	.type = FSP_LPDDR4_SWIZZLE,
+	.offset = offsetof(struct fsp_m_config, ch_bit_swizzling),
+	.propname = "fspm,ch-bit-swizzling",
+	.count = SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling) /
+		 SIZE_OF_MEMBER(struct fsp_m_config, ch_bit_swizzling[0][0])
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, msg_level_mask),
+	.propname = "fspm,msg-level-mask",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_pin_num),
+	.propname = "fspm,pre-mem-gpio-table-pin-num",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config,
+				      pre_mem_gpio_table_pin_num),
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_ptr),
+	.propname = "fspm,pre-mem-gpio-table-ptr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pre_mem_gpio_table_entry_num),
+	.propname = "fspm,pre-mem-gpio-table-entry-num",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, enhance_port8xh_decoding),
+	.propname = "fspm,enhance-port8xh-decoding",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, spd_write_enable),
+	.propname = "fspm,spd-write-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, mrc_data_saving),
+	.propname = "fspm,mrc-data-saving",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, oem_loading_base),
+	.propname = "fspm,oem-loading-base",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, oem_file_name),
+	.propname = "fspm,oem-file-name",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_m_config, oem_file_name),
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, mrc_boot_data_ptr),
+	.propname = "fspm,mrc-boot-data-ptr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, e_mmc_trace_len),
+	.propname = "fspm,e-mmc-trace-len",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, skip_cse_rbp),
+	.propname = "fspm,skip-cse-rbp",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, npk_en),
+	.propname = "fspm,npk-en",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, fw_trace_en),
+	.propname = "fspm,fw-trace-en",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, fw_trace_destination),
+	.propname = "fspm,fw-trace-destination",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, recover_dump),
+	.propname = "fspm,recover-dump",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, msc0_wrap),
+	.propname = "fspm,msc0-wrap",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, msc1_wrap),
+	.propname = "fspm,msc1-wrap",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, msc0_size),
+	.propname = "fspm,msc0-size",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, msc1_size),
+	.propname = "fspm,msc1-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pti_mode),
+	.propname = "fspm,pti-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pti_training),
+	.propname = "fspm,pti-training",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pti_speed),
+	.propname = "fspm,pti-speed",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, punit_mlvl),
+	.propname = "fspm,punit-mlvl",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, pmc_mlvl),
+	.propname = "fspm,pmc-mlvl",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, sw_trace_en),
+	.propname = "fspm,sw-trace-en",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, periodic_retraining_disable),
+	.propname = "fspm,periodic-retraining-disable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, enable_reset_system),
+	.propname = "fspm,enable-reset-system",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_m_config, enable_s3_heci2),
+	.propname = "fspm,enable-s3-heci2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_m_config, variable_nvs_buffer_ptr),
+	.propname = "fspm,variable-nvs-buffer-ptr",
+	}, {
+	.propname = NULL
+	}
+};
+
+int fsp_m_update_config_from_dtb(ofnode node, struct fsp_m_config *cfg)
+{
+	return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_m_bindings);
+}
+#endif
+
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const struct fsp_binding fsp_s_bindings[] = {
+	{
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, active_processor_cores),
+	.propname = "fsps,active-processor-cores",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, disable_core1),
+	.propname = "fsps,disable-core1",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, disable_core2),
+	.propname = "fsps,disable-core2",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, disable_core3),
+	.propname = "fsps,disable-core3",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, vmx_enable),
+	.propname = "fsps,vmx-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, proc_trace_mem_size),
+	.propname = "fsps,proc-trace-mem-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, proc_trace_enable),
+	.propname = "fsps,proc-trace-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, eist),
+	.propname = "fsps,eist",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, boot_p_state),
+	.propname = "fsps,boot-p-state",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, enable_cx),
+	.propname = "fsps,enable-cx",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, c1e),
+	.propname = "fsps,c1e",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, bi_proc_hot),
+	.propname = "fsps,bi-proc-hot",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pkg_c_state_limit),
+	.propname = "fsps,pkg-c-state-limit",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, c_state_auto_demotion),
+	.propname = "fsps,c-state-auto-demotion",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, c_state_un_demotion),
+	.propname = "fsps,c-state-un-demotion",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, max_core_c_state),
+	.propname = "fsps,max-core-c-state",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pkg_c_state_demotion),
+	.propname = "fsps,pkg-c-state-demotion",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pkg_c_state_un_demotion),
+	.propname = "fsps,pkg-c-state-un-demotion",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, turbo_mode),
+	.propname = "fsps,turbo-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hda_verb_table_entry_num),
+	.propname = "fsps,hda-verb-table-entry-num",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, hda_verb_table_ptr),
+	.propname = "fsps,hda-verb-table-ptr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, p2sb_unhide),
+	.propname = "fsps,p2sb-unhide",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ipu_en),
+	.propname = "fsps,ipu-en",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ipu_acpi_mode),
+	.propname = "fsps,ipu-acpi-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, force_wake),
+	.propname = "fsps,force-wake",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, gtt_mm_adr),
+	.propname = "fsps,gtt-mm-adr",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, gm_adr),
+	.propname = "fsps,gm-adr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pavp_lock),
+	.propname = "fsps,pavp-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, graphics_freq_modify),
+	.propname = "fsps,graphics-freq-modify",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, graphics_freq_req),
+	.propname = "fsps,graphics-freq-req",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, graphics_video_freq),
+	.propname = "fsps,graphics-video-freq",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pm_lock),
+	.propname = "fsps,pm-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dop_clock_gating),
+	.propname = "fsps,dop-clock-gating",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, unsolicited_attack_override),
+	.propname = "fsps,unsolicited-attack-override",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, wopcm_support),
+	.propname = "fsps,wopcm-support",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, wopcm_size),
+	.propname = "fsps,wopcm-size",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, power_gating),
+	.propname = "fsps,power-gating",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, unit_level_clock_gating),
+	.propname = "fsps,unit-level-clock-gating",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, fast_boot),
+	.propname = "fsps,fast-boot",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dyn_sr),
+	.propname = "fsps,dyn-sr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sa_ipu_enable),
+	.propname = "fsps,sa-ipu-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pm_support),
+	.propname = "fsps,pm-support",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, enable_render_standby),
+	.propname = "fsps,enable-render-standby",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, logo_size),
+	.propname = "fsps,logo-size",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, logo_ptr),
+	.propname = "fsps,logo-ptr",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, graphics_config_ptr),
+	.propname = "fsps,graphics-config-ptr",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pavp_enable),
+	.propname = "fsps,pavp-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pavp_pr3),
+	.propname = "fsps,pavp-pr3",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, cd_clock),
+	.propname = "fsps,cd-clock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pei_graphics_peim_init),
+	.propname = "fsps,pei-graphics-peim-init",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, write_protection_enable),
+	.propname = "fsps,write-protection-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      write_protection_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, read_protection_enable),
+	.propname = "fsps,read-protection-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      read_protection_enable),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, protected_range_limit),
+	.propname = "fsps,protected-range-limit",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      protected_range_limit),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, protected_range_base),
+	.propname = "fsps,protected-range-base",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      protected_range_base),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, gmm),
+	.propname = "fsps,gmm",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_pgcb_clk_trunk),
+	.propname = "fsps,clk-gating-pgcb-clk-trunk",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_sb),
+	.propname = "fsps,clk-gating-sb",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_trunk),
+	.propname = "fsps,clk-gating-sb-clk-trunk",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_sb_clk_partition),
+	.propname = "fsps,clk-gating-sb-clk-partition",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_core),
+	.propname = "fsps,clk-gating-core",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_dma),
+	.propname = "fsps,clk-gating-dma",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_reg_access),
+	.propname = "fsps,clk-gating-reg-access",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_host),
+	.propname = "fsps,clk-gating-host",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_partition),
+	.propname = "fsps,clk-gating-partition",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, clk_gating_trunk),
+	.propname = "fsps,clk-gating-trunk",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hda_enable),
+	.propname = "fsps,hda-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dsp_enable),
+	.propname = "fsps,dsp-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pme),
+	.propname = "fsps,pme",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_ownership),
+	.propname = "fsps,hd-audio-io-buffer-ownership",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_io_buffer_voltage),
+	.propname = "fsps,hd-audio-io-buffer-voltage",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_vc_type),
+	.propname = "fsps,hd-audio-vc-type",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_link_frequency),
+	.propname = "fsps,hd-audio-link-frequency",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_frequency),
+	.propname = "fsps,hd-audio-i-disp-link-frequency",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_i_disp_link_tmode),
+	.propname = "fsps,hd-audio-i-disp-link-tmode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dsp_endpoint_dmic),
+	.propname = "fsps,dsp-endpoint-dmic",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dsp_endpoint_bluetooth),
+	.propname = "fsps,dsp-endpoint-bluetooth",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_skp),
+	.propname = "fsps,dsp-endpoint-i2s-skp",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dsp_endpoint_i2s_hp),
+	.propname = "fsps,dsp-endpoint-i2s-hp",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, audio_ctl_pwr_gate),
+	.propname = "fsps,audio-ctl-pwr-gate",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, audio_dsp_pwr_gate),
+	.propname = "fsps,audio-dsp-pwr-gate",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, mmt),
+	.propname = "fsps,mmt",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hmt),
+	.propname = "fsps,hmt",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_pwr_gate),
+	.propname = "fsps,hd-audio-pwr-gate",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_clk_gate),
+	.propname = "fsps,hd-audio-clk-gate",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, dsp_feature_mask),
+	.propname = "fsps,dsp-feature-mask",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, dsp_pp_module_mask),
+	.propname = "fsps,dsp-pp-module-mask",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, bios_cfg_lock_down),
+	.propname = "fsps,bios-cfg-lock-down",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hpet),
+	.propname = "fsps,hpet",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hpet_bdf_valid),
+	.propname = "fsps,hpet-bdf-valid",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hpet_bus_number),
+	.propname = "fsps,hpet-bus-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hpet_device_number),
+	.propname = "fsps,hpet-device-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hpet_function_number),
+	.propname = "fsps,hpet-function-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_bdf_valid),
+	.propname = "fsps,io-apic-bdf-valid",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_bus_number),
+	.propname = "fsps,io-apic-bus-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_device_number),
+	.propname = "fsps,io-apic-device-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_function_number),
+	.propname = "fsps,io-apic-function-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_entry24_119),
+	.propname = "fsps,io-apic-entry24-119",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_id),
+	.propname = "fsps,io-apic-id",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, io_apic_range_select),
+	.propname = "fsps,io-apic-range-select",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ish_enable),
+	.propname = "fsps,ish-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, bios_interface),
+	.propname = "fsps,bios-interface",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, bios_lock),
+	.propname = "fsps,bios-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, spi_eiss),
+	.propname = "fsps,spi-eiss",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, bios_lock_sw_smi_number),
+	.propname = "fsps,bios-lock-sw-smi-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, lpss_s0ix_enable),
+	.propname = "fsps,lpss-s0ix-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c_clk_gate_cfg),
+	.propname = "fsps,i2c-clk-gate-cfg",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, i2c_clk_gate_cfg),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsuart_clk_gate_cfg),
+	.propname = "fsps,hsuart-clk-gate-cfg",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, hsuart_clk_gate_cfg),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, spi_clk_gate_cfg),
+	.propname = "fsps,spi-clk-gate-cfg",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, spi_clk_gate_cfg),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c0_enable),
+	.propname = "fsps,i2c0-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c1_enable),
+	.propname = "fsps,i2c1-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c2_enable),
+	.propname = "fsps,i2c2-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c3_enable),
+	.propname = "fsps,i2c3-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c4_enable),
+	.propname = "fsps,i2c4-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c5_enable),
+	.propname = "fsps,i2c5-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c6_enable),
+	.propname = "fsps,i2c6-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, i2c7_enable),
+	.propname = "fsps,i2c7-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsuart0_enable),
+	.propname = "fsps,hsuart0-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsuart1_enable),
+	.propname = "fsps,hsuart1-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsuart2_enable),
+	.propname = "fsps,hsuart2-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsuart3_enable),
+	.propname = "fsps,hsuart3-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, spi0_enable),
+	.propname = "fsps,spi0-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, spi1_enable),
+	.propname = "fsps,spi1-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, spi2_enable),
+	.propname = "fsps,spi2-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, os_dbg_enable),
+	.propname = "fsps,os-dbg-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dci_en),
+	.propname = "fsps,dci-en",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config,
+			   uart2_kernel_debug_base_address),
+	.propname = "fsps,uart2-kernel-debug-base-address",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_clock_gating_disabled),
+	.propname = "fsps,pcie-clock-gating-disabled",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_root_port8xh_decode),
+	.propname = "fsps,pcie-root-port8xh-decode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie8xh_decode_port_index),
+	.propname = "fsps,pcie8xh-decode-port-index",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_root_port_peer_memory_write_enable),
+	.propname = "fsps,pcie-root-port-peer-memory-write-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_aspm_sw_smi_number),
+	.propname = "fsps,pcie-aspm-sw-smi-number",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_root_port_en),
+	.propname = "fsps,pcie-root-port-en",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_root_port_en),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_hide),
+	.propname = "fsps,pcie-rp-hide",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hide),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_slot_implemented),
+	.propname = "fsps,pcie-rp-slot-implemented",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_slot_implemented),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_hot_plug),
+	.propname = "fsps,pcie-rp-hot-plug",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_hot_plug),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_pm_sci),
+	.propname = "fsps,pcie-rp-pm-sci",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_pm_sci),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_ext_sync),
+	.propname = "fsps,pcie-rp-ext-sync",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ext_sync),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_transmitter_half_swing),
+	.propname = "fsps,pcie-rp-transmitter-half-swing",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_transmitter_half_swing),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_acs_enabled),
+	.propname = "fsps,pcie-rp-acs-enabled",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_acs_enabled),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_supported),
+	.propname = "fsps,pcie-rp-clk-req-supported",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_clk_req_supported),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_number),
+	.propname = "fsps,pcie-rp-clk-req-number",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_clk_req_number),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_clk_req_detect),
+	.propname = "fsps,pcie-rp-clk-req-detect",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_clk_req_detect),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, advanced_error_reporting),
+	.propname = "fsps,advanced-error-reporting",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      advanced_error_reporting),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pme_interrupt),
+	.propname = "fsps,pme-interrupt",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pme_interrupt),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, unsupported_request_report),
+	.propname = "fsps,unsupported-request-report",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      unsupported_request_report),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, fatal_error_report),
+	.propname = "fsps,fatal-error-report",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, fatal_error_report),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, no_fatal_error_report),
+	.propname = "fsps,no-fatal-error-report",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      no_fatal_error_report),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, correctable_error_report),
+	.propname = "fsps,correctable-error-report",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      correctable_error_report),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   system_error_on_fatal_error),
+	.propname = "fsps,system-error-on-fatal-error",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      system_error_on_fatal_error),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   system_error_on_non_fatal_error),
+	.propname = "fsps,system-error-on-non-fatal-error",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      system_error_on_non_fatal_error),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   system_error_on_correctable_error),
+	.propname = "fsps,system-error-on-correctable-error",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      system_error_on_correctable_error),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_speed),
+	.propname = "fsps,pcie-rp-speed",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_speed),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, physical_slot_number),
+	.propname = "fsps,physical-slot-number",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      physical_slot_number),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_completion_timeout),
+	.propname = "fsps,pcie-rp-completion-timeout",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_completion_timeout),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ptm_enable),
+	.propname = "fsps,ptm-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ptm_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_aspm),
+	.propname = "fsps,pcie-rp-aspm",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_aspm),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_l1_substates),
+	.propname = "fsps,pcie-rp-l1-substates",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_l1_substates),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_ltr_enable),
+	.propname = "fsps,pcie-rp-ltr-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, pcie_rp_ltr_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_ltr_config_lock),
+	.propname = "fsps,pcie-rp-ltr-config-lock",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_ltr_config_lock),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pme_b0_s5_dis),
+	.propname = "fsps,pme-b0-s5-dis",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pci_clock_run),
+	.propname = "fsps,pci-clock-run",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, timer8254_clk_setting),
+	.propname = "fsps,timer8254-clk-setting",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, enable_sata),
+	.propname = "fsps,enable-sata",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_mode),
+	.propname = "fsps,sata-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_salp_support),
+	.propname = "fsps,sata-salp-support",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_pwr_opt_enable),
+	.propname = "fsps,sata-pwr-opt-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, e_sata_speed_limit),
+	.propname = "fsps,e-sata-speed-limit",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, speed_limit),
+	.propname = "fsps,speed-limit",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_enable),
+	.propname = "fsps,sata-ports-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_dev_slp),
+	.propname = "fsps,sata-ports-dev-slp",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dev_slp),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_hot_plug),
+	.propname = "fsps,sata-ports-hot-plug",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_hot_plug),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_interlock_sw),
+	.propname = "fsps,sata-ports-interlock-sw",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      sata_ports_interlock_sw),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_external),
+	.propname = "fsps,sata-ports-external",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_external),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_spin_up),
+	.propname = "fsps,sata-ports-spin-up",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_spin_up),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_solid_state_drive),
+	.propname = "fsps,sata-ports-solid-state-drive",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      sata_ports_solid_state_drive),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_enable_dito_config),
+	.propname = "fsps,sata-ports-enable-dito-config",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      sata_ports_enable_dito_config),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_dm_val),
+	.propname = "fsps,sata-ports-dm-val",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dm_val),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, sata_ports_dito_val),
+	.propname = "fsps,sata-ports-dito-val",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, sata_ports_dito_val),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, sub_system_vendor_id),
+	.propname = "fsps,sub-system-vendor-id",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, sub_system_id),
+	.propname = "fsps,sub-system-id",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, crid_settings),
+	.propname = "fsps,crid-settings",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, reset_select),
+	.propname = "fsps,reset-select",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sdcard_enabled),
+	.propname = "fsps,sdcard-enabled",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, e_mmc_enabled),
+	.propname = "fsps,e-mmc-enabled",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, e_mmc_host_max_speed),
+	.propname = "fsps,e-mmc-host-max-speed",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ufs_enabled),
+	.propname = "fsps,ufs-enabled",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sdio_enabled),
+	.propname = "fsps,sdio-enabled",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, gpp_lock),
+	.propname = "fsps,gpp-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sirq_enable),
+	.propname = "fsps,sirq-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sirq_mode),
+	.propname = "fsps,sirq-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, start_frame_pulse),
+	.propname = "fsps,start-frame-pulse",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, smbus_enable),
+	.propname = "fsps,smbus-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, arp_enable),
+	.propname = "fsps,arp-enable",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, num_rsvd_smbus_addresses),
+	.propname = "fsps,num-rsvd-smbus-addresses",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, rsvd_smbus_address_table),
+	.propname = "fsps,rsvd-smbus-address-table",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      rsvd_smbus_address_table),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, disable_compliance_mode),
+	.propname = "fsps,disable-compliance-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, usb_per_port_ctl),
+	.propname = "fsps,usb-per-port-ctl",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, usb30_mode),
+	.propname = "fsps,usb30-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_enable),
+	.propname = "fsps,port-usb20-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb20_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_us20b_over_current_pin),
+	.propname = "fsps,port-us20b-over-current-pin",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_us20b_over_current_pin),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, usb_otg),
+	.propname = "fsps,usb-otg",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hsic_support_enable),
+	.propname = "fsps,hsic-support-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb30_enable),
+	.propname = "fsps,port-usb30-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, port_usb30_enable),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_us30b_over_current_pin),
+	.propname = "fsps,port-us30b-over-current-pin",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_us30b_over_current_pin),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ssic_port_enable),
+	.propname = "fsps,ssic-port-enable",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_port_enable),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, dlane_pwr_gating),
+	.propname = "fsps,dlane-pwr-gating",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, vtd_enable),
+	.propname = "fsps,vtd-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, lock_down_global_smi),
+	.propname = "fsps,lock-down-global-smi",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, reset_wait_timer),
+	.propname = "fsps,reset-wait-timer",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, rtc_lock),
+	.propname = "fsps,rtc-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_test_mode),
+	.propname = "fsps,sata-test-mode",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, ssic_rate),
+	.propname = "fsps,ssic-rate",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ssic_rate),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, dynamic_power_gating),
+	.propname = "fsps,dynamic-power-gating",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_ltr_max_snoop_latency),
+	.propname = "fsps,pcie-rp-ltr-max-snoop-latency",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_ltr_max_snoop_latency),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_snoop_latency_override_mode),
+	.propname = "fsps,pcie-rp-snoop-latency-override-mode",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_snoop_latency_override_mode),
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_snoop_latency_override_value),
+	.propname = "fsps,pcie-rp-snoop-latency-override-value",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_snoop_latency_override_value),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_snoop_latency_override_multiplier),
+	.propname = "fsps,pcie-rp-snoop-latency-override-multiplier",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_snoop_latency_override_multiplier),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, skip_mp_init),
+	.propname = "fsps,skip-mp-init",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, dci_auto_detect),
+	.propname = "fsps,dci-auto-detect",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_ltr_max_non_snoop_latency),
+	.propname = "fsps,pcie-rp-ltr-max-non-snoop-latency",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_ltr_max_non_snoop_latency),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_non_snoop_latency_override_mode),
+	.propname = "fsps,pcie-rp-non-snoop-latency-override-mode",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_non_snoop_latency_override_mode),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, tco_timer_halt_lock),
+	.propname = "fsps,tco-timer-halt-lock",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pwr_btn_override_period),
+	.propname = "fsps,pwr-btn-override-period",
+	}, {
+	.type = FSP_UINT16,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_non_snoop_latency_override_value),
+	.propname = "fsps,pcie-rp-non-snoop-latency-override-value",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_non_snoop_latency_override_value),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   pcie_rp_non_snoop_latency_override_multiplier),
+	.propname = "fsps,pcie-rp-non-snoop-latency-override-multiplier",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				pcie_rp_non_snoop_latency_override_multiplier),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_scale),
+	.propname = "fsps,pcie-rp-slot-power-limit-scale",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_slot_power_limit_scale),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_slot_power_limit_value),
+	.propname = "fsps,pcie-rp-slot-power-limit-value",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_slot_power_limit_value),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, disable_native_power_button),
+	.propname = "fsps,disable-native-power-button",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, power_butter_debounce_mode),
+	.propname = "fsps,power-butter-debounce-mode",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdio_tx_cmd_cntl),
+	.propname = "fsps,sdio-tx-cmd-cntl",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl1),
+	.propname = "fsps,sdio-tx-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdio_tx_data_cntl2),
+	.propname = "fsps,sdio-tx-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl1),
+	.propname = "fsps,sdio-rx-cmd-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdio_rx_cmd_data_cntl2),
+	.propname = "fsps,sdio-rx-cmd-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_tx_cmd_cntl),
+	.propname = "fsps,sdcard-tx-cmd-cntl",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl1),
+	.propname = "fsps,sdcard-tx-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_tx_data_cntl2),
+	.propname = "fsps,sdcard-tx-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl1),
+	.propname = "fsps,sdcard-rx-cmd-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_rx_strobe_cntl),
+	.propname = "fsps,sdcard-rx-strobe-cntl",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, sdcard_rx_cmd_data_cntl2),
+	.propname = "fsps,sdcard-rx-cmd-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_tx_cmd_cntl),
+	.propname = "fsps,emmc-tx-cmd-cntl",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl1),
+	.propname = "fsps,emmc-tx-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_tx_data_cntl2),
+	.propname = "fsps,emmc-tx-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl1),
+	.propname = "fsps,emmc-rx-cmd-data-cntl1",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_rx_strobe_cntl),
+	.propname = "fsps,emmc-rx-strobe-cntl",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_rx_cmd_data_cntl2),
+	.propname = "fsps,emmc-rx-cmd-data-cntl2",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, emmc_master_sw_cntl),
+	.propname = "fsps,emmc-master-sw-cntl",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, pcie_rp_selectable_deemphasis),
+	.propname = "fsps,pcie-rp-selectable-deemphasis",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      pcie_rp_selectable_deemphasis),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, monitor_mwait_enable),
+	.propname = "fsps,monitor-mwait-enable",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, hd_audio_dsp_uaa_compliance),
+	.propname = "fsps,hd-audio-dsp-uaa-compliance",
+	}, {
+	.type = FSP_UINT32,
+	.offset = offsetof(struct fsp_s_config, ipc),
+	.propname = "fsps,ipc",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config, ipc),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, sata_ports_disable_dynamic_pg),
+	.propname = "fsps,sata-ports-disable-dynamic-pg",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      sata_ports_disable_dynamic_pg),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, init_s3_cpu),
+	.propname = "fsps,init-s3-cpu",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, skip_punit_init),
+	.propname = "fsps,skip-punit-init",
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_per_port_tx_pe_half),
+	.propname = "fsps,port-usb20-per-port-tx-pe-half",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_per_port_tx_pe_half),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_per_port_pe_txi_set),
+	.propname = "fsps,port-usb20-per-port-pe-txi-set",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_per_port_pe_txi_set),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_per_port_txi_set),
+	.propname = "fsps,port-usb20-per-port-txi-set",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_per_port_txi_set),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_hs_skew_sel),
+	.propname = "fsps,port-usb20-hs-skew-sel",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_hs_skew_sel),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   port_usb20_i_usb_tx_emphasis_en),
+	.propname = "fsps,port-usb20-i-usb-tx-emphasis-en",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_i_usb_tx_emphasis_en),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config,
+			   port_usb20_per_port_rxi_set),
+	.propname = "fsps,port-usb20-per-port-rxi-set",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_per_port_rxi_set),
+	}, {
+	.type = FSP_UINT8,
+	.offset = offsetof(struct fsp_s_config, port_usb20_hs_npre_drv_sel),
+	.propname = "fsps,port-usb20-hs-npre-drv-sel",
+	.count = ARRAY_SIZE_OF_MEMBER(struct fsp_s_config,
+				      port_usb20_hs_npre_drv_sel),
+	}, {
+	.propname = NULL
+	}
+};
+
+int fsp_s_update_config_from_dtb(ofnode node, struct fsp_s_config *cfg)
+{
+	return fsp_update_config_from_dtb(node, (u8 *)cfg, fsp_s_bindings);
+}
+#endif
diff --git a/arch/x86/cpu/apollolake/fsp_m.c b/arch/x86/cpu/apollolake/fsp_m.c
index 5308af8ed4..1301100cd5 100644
--- a/arch/x86/cpu/apollolake/fsp_m.c
+++ b/arch/x86/cpu/apollolake/fsp_m.c
@@ -6,185 +6,29 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/iomap.h>
-#include <asm/arch/fsp/fsp_configs.h>
-#include <asm/arch/fsp/fsp_m_upd.h>
+#include <asm/arch/fsp_bindings.h>
 #include <asm/fsp2/fsp_internal.h>
 #include <dm/uclass-internal.h>
 
-/*
- * ODT settings:
- * If ODT PIN to LP4 DRAM is pulled HIGH for ODT_A and HIGH for ODT_B,
- * choose ODT_A_B_HIGH_HIGH. If ODT PIN to LP4 DRAM is pulled HIGH for ODT_A
- * and LOW for ODT_B, choose ODT_A_B_HIGH_LOW.
- *
- * Note that the enum values correspond to the interpreted UPD fields
- * within Ch[3:0]_OdtConfig parameters.
- */
-enum {
-	ODT_A_B_HIGH_LOW	= 0 << 1,
-	ODT_A_B_HIGH_HIGH	= 1 << 1,
-	N_WR_24			= 1 << 5,
-};
-
-/*
- * LPDDR4 helper routines for configuring the memory UPD for LPDDR4 operation.
- * There are four physical LPDDR4 channels, each 32-bits wide. There are two
- * logical channels using two physical channels together to form a 64-bit
- * interface to memory for each logical channel.
- */
-
-enum {
-	LP4_PHYS_CH0A,
-	LP4_PHYS_CH0B,
-	LP4_PHYS_CH1A,
-	LP4_PHYS_CH1B,
-
-	LP4_NUM_PHYS_CHANNELS,
-};
-
-/*
- * The DQs within a physical channel can be bit-swizzled within each byte.
- * Within a channel the bytes can be swapped, but the DQs need to be routed
- * with the corresponding DQS (strobe).
- */
-enum {
-	LP4_DQS0,
-	LP4_DQS1,
-	LP4_DQS2,
-	LP4_DQS3,
-
-	LP4_NUM_BYTE_LANES,
-	DQ_BITS_PER_DQS		= 8,
-};
-
-/* Provide bit swizzling per DQS and byte swapping within a channel */
-struct lpddr4_chan_swizzle_cfg {
-	u8 dqs[LP4_NUM_BYTE_LANES][DQ_BITS_PER_DQS];
-};
-
-struct lpddr4_swizzle_cfg {
-	struct lpddr4_chan_swizzle_cfg phys[LP4_NUM_PHYS_CHANNELS];
-};
-
-static void setup_sdram(struct fsp_m_config *cfg,
-			const struct lpddr4_swizzle_cfg *swizzle_cfg)
-{
-	const struct lpddr4_chan_swizzle_cfg *sch;
-	/* Number of bytes to copy per DQS */
-	const size_t sz = DQ_BITS_PER_DQS;
-	int chan;
-
-	cfg->memory_down = 1;
-	cfg->scrambler_support = 1;
-	cfg->channel_hash_mask = 0x36;
-	cfg->slice_hash_mask = 9;
-	cfg->interleaved_mode = 2;
-	cfg->channels_slices_enable = 0;
-	cfg->min_ref_rate2x_enable = 0;
-	cfg->dual_rank_support_enable = 1;
-
-	/* LPDDR4 is memory down so no SPD addresses */
-	cfg->dimm0_spd_address = 0;
-	cfg->dimm1_spd_address = 0;
-
-	for (chan = 0; chan < 4; chan++) {
-		struct fsp_ram_channel *ch = &cfg->chan[chan];
-
-		ch->rank_enable = 1;
-		ch->device_width = 1;
-		ch->dram_density = 2;
-		ch->option = 3;
-		ch->odt_config = ODT_A_B_HIGH_HIGH;
-	}
-
-	/*
-	 * CH0_DQB byte lanes in the bit swizzle configuration field are
-	 * not 1:1. The mapping within the swizzling field is:
-	 *   indices [0:7]   - byte lane 1 (DQS1) DQ[8:15]
-	 *   indices [8:15]  - byte lane 0 (DQS0) DQ[0:7]
-	 *   indices [16:23] - byte lane 3 (DQS3) DQ[24:31]
-	 *   indices [24:31] - byte lane 2 (DQS2) DQ[16:23]
-	 */
-	sch = &swizzle_cfg->phys[LP4_PHYS_CH0B];
-	memcpy(&cfg->ch_bit_swizzling[0][0], &sch->dqs[LP4_DQS1], sz);
-	memcpy(&cfg->ch_bit_swizzling[0][8], &sch->dqs[LP4_DQS0], sz);
-	memcpy(&cfg->ch_bit_swizzling[0][16], &sch->dqs[LP4_DQS3], sz);
-	memcpy(&cfg->ch_bit_swizzling[0][24], &sch->dqs[LP4_DQS2], sz);
-
-	/*
-	 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
-	 */
-	sch = &swizzle_cfg->phys[LP4_PHYS_CH0A];
-	memcpy(&cfg->ch_bit_swizzling[1][0], &sch->dqs[LP4_DQS0], sz);
-	memcpy(&cfg->ch_bit_swizzling[1][8], &sch->dqs[LP4_DQS1], sz);
-	memcpy(&cfg->ch_bit_swizzling[1][16], &sch->dqs[LP4_DQS2], sz);
-	memcpy(&cfg->ch_bit_swizzling[1][24], &sch->dqs[LP4_DQS3], sz);
-
-	sch = &swizzle_cfg->phys[LP4_PHYS_CH1B];
-	memcpy(&cfg->ch_bit_swizzling[2][0], &sch->dqs[LP4_DQS1], sz);
-	memcpy(&cfg->ch_bit_swizzling[2][8], &sch->dqs[LP4_DQS0], sz);
-	memcpy(&cfg->ch_bit_swizzling[2][16], &sch->dqs[LP4_DQS3], sz);
-	memcpy(&cfg->ch_bit_swizzling[2][24], &sch->dqs[LP4_DQS2], sz);
-
-	/*
-	 * CH0_DQA byte lanes in the bit swizzle configuration field are 1:1.
-	 */
-	sch = &swizzle_cfg->phys[LP4_PHYS_CH1A];
-	memcpy(&cfg->ch_bit_swizzling[3][0], &sch->dqs[LP4_DQS0], sz);
-	memcpy(&cfg->ch_bit_swizzling[3][8], &sch->dqs[LP4_DQS1], sz);
-	memcpy(&cfg->ch_bit_swizzling[3][16], &sch->dqs[LP4_DQS2], sz);
-	memcpy(&cfg->ch_bit_swizzling[3][24], &sch->dqs[LP4_DQS3], sz);
-}
-
 int fspm_update_config(struct udevice *dev, struct fspm_upd *upd)
 {
 	struct fsp_m_config *cfg = &upd->config;
 	struct fspm_arch_upd *arch = &upd->arch;
+	ofnode node;
 
 	arch->nvs_buffer_ptr = NULL;
 	prepare_mrc_cache(upd);
 	arch->stack_base = (void *)0xfef96000;
 	arch->boot_loader_tolum_size = 0;
-
 	arch->boot_mode = FSP_BOOT_WITH_FULL_CONFIGURATION;
-	cfg->serial_debug_port_type = 2;
-	cfg->serial_debug_port_device = 2;
-	cfg->serial_debug_port_stride_size = 2;
-	cfg->serial_debug_port_address = 0;
 
-	cfg->package = 1;
-	/* Don't enforce a memory size limit */
-	cfg->memory_size_limit = 0;
-	cfg->low_memory_max_value = 2048;  /* 2 GB */
-	/* No restrictions on memory above 4GiB */
-	cfg->high_memory_max_value = 0;
+	node = dev_ofnode(dev);
+	if (!ofnode_valid(node))
+		return log_msg_ret("fsp-m settings", -ENOENT);
 
-	/* Always default to attempt to use saved training data */
-	cfg->disable_fast_boot = 0;
-
-	const u8 *swizzle_data;
-
-	swizzle_data = dev_read_u8_array_ptr(dev, "lpddr4-swizzle",
-					     LP4_NUM_BYTE_LANES *
-					     DQ_BITS_PER_DQS *
-					     LP4_NUM_PHYS_CHANNELS);
-	if (!swizzle_data)
-		return log_msg_ret("Cannot read swizzel data", -EINVAL);
-
-	setup_sdram(cfg, (struct lpddr4_swizzle_cfg *)swizzle_data);
-
-	cfg->pre_mem_gpio_table_ptr = 0;
-
-	cfg->profile = 0xb;
-	cfg->msg_level_mask = 0;
-
-	/* other */
-	cfg->skip_cse_rbp = 1;
-	cfg->periodic_retraining_disable = 0;
-	cfg->enable_s3_heci2 = 0;
-
-	return 0;
+	return fsp_m_update_config_from_dtb(node, cfg);
 }
 
 /*
diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
index 17cf1682ad..767ddfe680 100644
--- a/arch/x86/cpu/apollolake/fsp_s.c
+++ b/arch/x86/cpu/apollolake/fsp_s.c
@@ -6,8 +6,11 @@
 
 #include <common.h>
 #include <binman.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <init.h>
 #include <irq.h>
+#include <log.h>
 #include <malloc.h>
 #include <acpi/acpi_s3.h>
 #include <asm/intel_pinctrl.h>
@@ -20,418 +23,49 @@
 #include <asm/arch/systemagent.h>
 #include <asm/arch/fsp/fsp_configs.h>
 #include <asm/arch/fsp/fsp_s_upd.h>
+#include <linux/bitops.h>
+#include <asm/arch/fsp_bindings.h>
 
 #define PCH_P2SB_E0		0xe0
 #define HIDE_BIT		BIT(0)
 
-#define INTEL_GSPI_MAX		3
-#define MAX_USB2_PORTS		8
-
-enum {
-	CHIPSET_LOCKDOWN_FSP = 0, /* FSP handles locking per UPDs */
-	CHIPSET_LOCKDOWN_COREBOOT, /* coreboot handles locking */
-};
-
-/* Serial IRQ control. SERIRQ_QUIET is the default (0) */
-enum serirq_mode {
-	SERIRQ_QUIET,
-	SERIRQ_CONTINUOUS,
-	SERIRQ_OFF,
-};
-
-struct gspi_cfg {
-	/* Bus speed in MHz */
-	u32 speed_mhz;
-	/* Bus should be enabled prior to ramstage with temporary base */
-	u8 early_init;
-};
-
-/*
- * This structure will hold data required by common blocks.
- * These are soc specific configurations which will be filled by soc.
- * We'll fill this structure once during init and use the data in common block.
- */
-struct soc_intel_common_config {
-	int chipset_lockdown;
-	struct gspi_cfg gspi[INTEL_GSPI_MAX];
-};
-
-enum pnp_settings {
-	PNP_PERF,
-	PNP_POWER,
-	PNP_PERF_POWER,
-};
-
-struct usb2_eye_per_port {
-	u8 per_port_tx_pe_half;
-	u8 per_port_pe_txi_set;
-	u8 per_port_txi_set;
-	u8 hs_skew_sel;
-	u8 usb_tx_emphasis_en;
-	u8 per_port_rxi_set;
-	u8 hs_npre_drv_sel;
-	u8 override_en;
-};
-
-struct apl_config {
-	/* Common structure containing soc config data required by common code*/
-	struct soc_intel_common_config common_soc_config;
-
-	/*
-	 * Mapping from PCIe root port to CLKREQ input on the SOC. The SOC has
-	 * four CLKREQ inputs, but six root ports. Root ports without an
-	 * associated CLKREQ signal must be marked with "CLKREQ_DISABLED"
-	 */
-	u8 pcie_rp_clkreq_pin[MAX_PCIE_PORTS];
-
-	/* Enable/disable hot-plug for root ports (0 = disable, 1 = enable) */
-	u8 pcie_rp_hotplug_enable[MAX_PCIE_PORTS];
-
-	/* De-emphasis enable configuration for each PCIe root port */
-	u8 pcie_rp_deemphasis_enable[MAX_PCIE_PORTS];
-
-	/*
-	 * [14:8] DDR mode Number of dealy elements.Each = 125pSec.
-	 * [6:0] SDR mode Number of dealy elements.Each = 125pSec.
-	 */
-	u32 emmc_tx_cmd_cntl;
-
-	/*
-	 * [14:8] HS400 mode Number of dealy elements.Each = 125pSec.
-	 * [6:0] SDR104/HS200 mode Number of dealy elements.Each = 125pSec.
-	 */
-	u32 emmc_tx_data_cntl1;
-
-	/*
-	 * [30:24] SDR50 mode Number of dealy elements.Each = 125pSec.
-	 * [22:16] DDR50 mode Number of dealy elements.Each = 125pSec.
-	 * [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec.
-	 * [6:0] SDR12/Compatibility mode Number of dealy elements.
-	 *       Each = 125pSec.
-	 */
-	u32 emmc_tx_data_cntl2;
-
-	/*
-	 * [30:24] SDR50 mode Number of dealy elements.Each = 125pSec.
-	 * [22:16] DDR50 mode Number of dealy elements.Each = 125pSec.
-	 * [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec.
-	 * [6:0] SDR12/Compatibility mode Number of dealy elements.
-	 *       Each = 125pSec.
-	 */
-	u32 emmc_rx_cmd_data_cntl1;
-
-	/*
-	 * [14:8] HS400 mode 1 Number of dealy elements.Each = 125pSec.
-	 * [6:0] HS400 mode 2 Number of dealy elements.Each = 125pSec.
-	 */
-	u32 emmc_rx_strobe_cntl;
-
-	/*
-	 * [13:8] Auto Tuning mode Number of dealy elements.Each = 125pSec.
-	 * [6:0] SDR104/HS200 Number of dealy elements.Each = 125pSec.
-	 */
-	u32 emmc_rx_cmd_data_cntl2;
-
-	/* Select the eMMC max speed allowed */
-	u32 emmc_host_max_speed;
-
-	/* Specifies on which IRQ the SCI will internally appear */
-	u32 sci_irq;
-
-	/* Configure serial IRQ (SERIRQ) line */
-	enum serirq_mode serirq_mode;
-
-	/* Configure LPSS S0ix Enable */
-	bool lpss_s0ix_enable;
-
-	/* Enable DPTF support */
-	bool dptf_enable;
-
-	/* TCC activation offset value in degrees Celsius */
-	int tcc_offset;
-
-	/*
-	 * Configure Audio clk gate and power gate
-	 * IOSF-SB port ID 92 offset 0x530 [5] and [3]
-	 */
-	bool hdaudio_clk_gate_enable;
-	bool hdaudio_pwr_gate_enable;
-	bool hdaudio_bios_config_lockdown;
-
-	/* SLP S3 minimum assertion width */
-	int slp_s3_assertion_width_usecs;
-
-	/* GPIO pin for PERST_0 */
-	u32 prt0_gpio;
-
-	/* USB2 eye diagram settings per port */
-	struct usb2_eye_per_port usb2eye[MAX_USB2_PORTS];
-
-	/* GPIO SD card detect pin */
-	unsigned int sdcard_cd_gpio;
-
-	/*
-	 * PRMRR size setting with three options
-	 *  0x02000000 - 32MiB
-	 *  0x04000000 - 64MiB
-	 *  0x08000000 - 128MiB
-	 */
-	u32 PrmrrSize;
-
-	/*
-	 * Enable SGX feature.
-	 * Enabling SGX feature is 2 step process,
-	 * (1) set sgx_enable = 1
-	 * (2) set PrmrrSize to supported size
-	 */
-	bool sgx_enable;
-
-	/*
-	 * Select PNP Settings.
-	 * (0) Performance,
-	 * (1) Power
-	 * (2) Power & Performance
-	 */
-	enum pnp_settings pnp_settings;
-
-	/*
-	 * PMIC PCH_PWROK delay configuration - IPC Configuration
-	 * Upd for changing PCH_PWROK delay configuration : I2C_Slave_Address
-	 * (31:24) + Register_Offset (23:16) + OR Value (15:8) + AND Value (7:0)
-	 */
-	u32 pmic_pmc_ipc_ctrl;
-
-	/*
-	 * Options to disable XHCI Link Compliance Mode. Default is FALSE to not
-	 * disable Compliance Mode. Set TRUE to disable Compliance Mode.
-	 * 0:FALSE(Default), 1:True.
-	 */
-	bool disable_compliance_mode;
-
-	/*
-	 * Options to change USB3 ModPhy setting for the Integrated Filter (IF)
-	 * value. Default is 0 to not changing default IF value (0x12). Set
-	 * value with the range from 0x01 to 0xff to change IF value.
-	 */
-	u32 mod_phy_if_value;
-
-	/*
-	 * Options to bump USB3 LDO voltage. Default is FALSE to not increasing
-	 * LDO voltage. Set TRUE to increase LDO voltage with 40mV.
-	 * 0:FALSE (default), 1:True.
-	 */
-	bool mod_phy_voltage_bump;
-
-	/*
-	 * Options to adjust PMIC Vdd2 voltage. Default is 0 to not adjusting
-	 * the PMIC Vdd2 default voltage 1.20v. Upd for changing Vdd2 Voltage
-	 * configuration: I2C_Slave_Address (31:23) + Register_Offset (23:16)
-	 * + OR Value (15:8) + AND Value (7:0) through BUCK5_VID[3:2]:
-	 * 00=1.10v, 01=1.15v, 10=1.24v, 11=1.20v (default).
-	 */
-	u32 pmic_vdd2_voltage;
-
-	/* Option to enable VTD feature */
-	bool enable_vtd;
-};
-
-static int get_config(struct udevice *dev, struct apl_config *apl)
-{
-	const u8 *ptr;
-	ofnode node;
-	u32 emmc[4];
-	int ret;
-
-	memset(apl, '\0', sizeof(*apl));
-
-	node = dev_read_subnode(dev, "fsp-s");
-	if (!ofnode_valid(node))
-		return log_msg_ret("fsp-s settings", -ENOENT);
-
-	ptr = ofnode_read_u8_array_ptr(node, "pcie-rp-clkreq-pin",
-				       MAX_PCIE_PORTS);
-	if (!ptr)
-		return log_msg_ret("pcie-rp-clkreq-pin", -EINVAL);
-	memcpy(apl->pcie_rp_clkreq_pin, ptr, MAX_PCIE_PORTS);
-
-	ret = ofnode_read_u32(node, "prt0-gpio", &apl->prt0_gpio);
-	if (ret)
-		return log_msg_ret("prt0-gpio", ret);
-	ret = ofnode_read_u32(node, "sdcard-cd-gpio", &apl->sdcard_cd_gpio);
-	if (ret)
-		return log_msg_ret("sdcard-cd-gpio", ret);
-
-	ret = ofnode_read_u32_array(node, "emmc", emmc, ARRAY_SIZE(emmc));
-	if (ret)
-		return log_msg_ret("emmc", ret);
-	apl->emmc_tx_data_cntl1 = emmc[0];
-	apl->emmc_tx_data_cntl2 = emmc[1];
-	apl->emmc_rx_cmd_data_cntl1 = emmc[2];
-	apl->emmc_rx_cmd_data_cntl2 = emmc[3];
-
-	apl->dptf_enable = ofnode_read_bool(node, "dptf-enable");
-
-	apl->hdaudio_clk_gate_enable = ofnode_read_bool(node,
-						"hdaudio-clk-gate-enable");
-	apl->hdaudio_pwr_gate_enable = ofnode_read_bool(node,
-						"hdaudio-pwr-gate-enable");
-	apl->hdaudio_bios_config_lockdown = ofnode_read_bool(node,
-					     "hdaudio-bios-config-lockdown");
-	apl->lpss_s0ix_enable = ofnode_read_bool(node, "lpss-s0ix-enable");
-
-	/* Santa */
-	apl->usb2eye[1].per_port_pe_txi_set = 7;
-	apl->usb2eye[1].per_port_txi_set = 2;
-
-	return 0;
-}
-
-static void apl_fsp_silicon_init_params_cb(struct apl_config *apl,
-					   struct fsp_s_config *cfg)
-{
-	u8 port;
-
-	for (port = 0; port < MAX_USB2_PORTS; port++) {
-		if (apl->usb2eye[port].per_port_tx_pe_half)
-			cfg->port_usb20_per_port_tx_pe_half[port] =
-				apl->usb2eye[port].per_port_tx_pe_half;
-
-		if (apl->usb2eye[port].per_port_pe_txi_set)
-			cfg->port_usb20_per_port_pe_txi_set[port] =
-				apl->usb2eye[port].per_port_pe_txi_set;
-
-		if (apl->usb2eye[port].per_port_txi_set)
-			cfg->port_usb20_per_port_txi_set[port] =
-				apl->usb2eye[port].per_port_txi_set;
-
-		if (apl->usb2eye[port].hs_skew_sel)
-			cfg->port_usb20_hs_skew_sel[port] =
-				apl->usb2eye[port].hs_skew_sel;
-
-		if (apl->usb2eye[port].usb_tx_emphasis_en)
-			cfg->port_usb20_i_usb_tx_emphasis_en[port] =
-				apl->usb2eye[port].usb_tx_emphasis_en;
-
-		if (apl->usb2eye[port].per_port_rxi_set)
-			cfg->port_usb20_per_port_rxi_set[port] =
-				apl->usb2eye[port].per_port_rxi_set;
-
-		if (apl->usb2eye[port].hs_npre_drv_sel)
-			cfg->port_usb20_hs_npre_drv_sel[port] =
-				apl->usb2eye[port].hs_npre_drv_sel;
-	}
-}
-
 int fsps_update_config(struct udevice *dev, ulong rom_offset,
 		       struct fsps_upd *upd)
 {
 	struct fsp_s_config *cfg = &upd->config;
-	struct apl_config *apl;
-	struct binman_entry vbt;
-	void *buf;
-	int ret;
-
-	ret = binman_entry_find("intel-vbt", &vbt);
-	if (ret)
-		return log_msg_ret("Cannot find VBT", ret);
-	vbt.image_pos += rom_offset;
-	buf = malloc(vbt.size);
-	if (!buf)
-		return log_msg_ret("Alloc VBT", -ENOMEM);
+	ofnode node;
 
-	/*
-	 * Load VBT before devicetree-specific config. This only supports
-	 * memory-mapped SPI at present.
-	 */
-	bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
-	memcpy(buf, (void *)vbt.image_pos, vbt.size);
-	bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
-	if (*(u32 *)buf != VBT_SIGNATURE)
-		return log_msg_ret("VBT signature", -EINVAL);
-	cfg->graphics_config_ptr = (ulong)buf;
-
-	apl = malloc(sizeof(*apl));
-	if (!apl)
-		return log_msg_ret("config", -ENOMEM);
-	get_config(dev, apl);
-
-	cfg->ish_enable = 0;
-	cfg->enable_sata = 0;
-	cfg->pcie_root_port_en[2] = 0;
-	cfg->pcie_rp_hot_plug[2] = 0;
-	cfg->pcie_root_port_en[3] = 0;
-	cfg->pcie_rp_hot_plug[3] = 0;
-	cfg->pcie_root_port_en[4] = 0;
-	cfg->pcie_rp_hot_plug[4] = 0;
-	cfg->pcie_root_port_en[5] = 0;
-	cfg->pcie_rp_hot_plug[5] = 0;
-	cfg->pcie_root_port_en[1] = 0;
-	cfg->pcie_rp_hot_plug[1] = 0;
-	cfg->usb_otg = 0;
-	cfg->i2c6_enable = 0;
-	cfg->i2c7_enable = 0;
-	cfg->hsuart3_enable = 0;
-	cfg->spi1_enable = 0;
-	cfg->spi2_enable = 0;
-	cfg->sdio_enabled = 0;
-
-	memcpy(cfg->pcie_rp_clk_req_number, apl->pcie_rp_clkreq_pin,
-	       sizeof(cfg->pcie_rp_clk_req_number));
-
-	memcpy(cfg->pcie_rp_hot_plug, apl->pcie_rp_hotplug_enable,
-	       sizeof(cfg->pcie_rp_hot_plug));
-
-	switch (apl->serirq_mode) {
-	case SERIRQ_QUIET:
-		cfg->sirq_enable = 1;
-		cfg->sirq_mode = 0;
-		break;
-	case SERIRQ_CONTINUOUS:
-		cfg->sirq_enable = 1;
-		cfg->sirq_mode = 1;
-		break;
-	case SERIRQ_OFF:
-	default:
-		cfg->sirq_enable = 0;
-		break;
+	if (IS_ENABLED(CONFIG_HAVE_VBT)) {
+		struct binman_entry vbt;
+		void *vbt_buf;
+		int ret;
+
+		ret = binman_entry_find("intel-vbt", &vbt);
+		if (ret)
+			return log_msg_ret("Cannot find VBT", ret);
+		vbt.image_pos += rom_offset;
+		vbt_buf = malloc(vbt.size);
+		if (!vbt_buf)
+			return log_msg_ret("Alloc VBT", -ENOMEM);
+
+		/*
+		 * Load VBT before devicetree-specific config. This only
+		 * supports memory-mapped SPI at present.
+		 */
+		bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
+		memcpy(vbt_buf, (void *)vbt.image_pos, vbt.size);
+		bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
+		if (*(u32 *)vbt_buf != VBT_SIGNATURE)
+			return log_msg_ret("VBT signature", -EINVAL);
+
+		cfg->graphics_config_ptr = (ulong)vbt_buf;
 	}
 
-	if (apl->emmc_tx_cmd_cntl)
-		cfg->emmc_tx_cmd_cntl = apl->emmc_tx_cmd_cntl;
-	if (apl->emmc_tx_data_cntl1)
-		cfg->emmc_tx_data_cntl1 = apl->emmc_tx_data_cntl1;
-	if (apl->emmc_tx_data_cntl2)
-		cfg->emmc_tx_data_cntl2 = apl->emmc_tx_data_cntl2;
-	if (apl->emmc_rx_cmd_data_cntl1)
-		cfg->emmc_rx_cmd_data_cntl1 = apl->emmc_rx_cmd_data_cntl1;
-	if (apl->emmc_rx_strobe_cntl)
-		cfg->emmc_rx_strobe_cntl = apl->emmc_rx_strobe_cntl;
-	if (apl->emmc_rx_cmd_data_cntl2)
-		cfg->emmc_rx_cmd_data_cntl2 = apl->emmc_rx_cmd_data_cntl2;
-	if (apl->emmc_host_max_speed)
-		cfg->e_mmc_host_max_speed = apl->emmc_host_max_speed;
-
-	cfg->lpss_s0ix_enable = apl->lpss_s0ix_enable;
-
-	cfg->skip_mp_init = true;
-
-	/* Disable setting of EISS bit in FSP */
-	cfg->spi_eiss = 0;
-
-	/* Disable FSP from locking access to the RTC NVRAM */
-	cfg->rtc_lock = 0;
-
-	/* Enable Audio clk gate and power gate */
-	cfg->hd_audio_clk_gate = apl->hdaudio_clk_gate_enable;
-	cfg->hd_audio_pwr_gate = apl->hdaudio_pwr_gate_enable;
-	/* Bios config lockdown Audio clk and power gate */
-	cfg->bios_cfg_lock_down = apl->hdaudio_bios_config_lockdown;
-	apl_fsp_silicon_init_params_cb(apl, cfg);
-
-	cfg->usb_otg = true;
-	cfg->vtd_enable = apl->enable_vtd;
+	node = dev_read_subnode(dev, "fsp-s");
+	if (!ofnode_valid(node))
+		return log_msg_ret("fsp-s settings", -ENOENT);
 
-	return 0;
+	return fsp_s_update_config_from_dtb(node, cfg);
 }
 
 static void p2sb_set_hide_bit(pci_dev_t dev, int hide)
@@ -566,6 +200,8 @@ int arch_fsp_init_r(void)
 	struct udevice *dev, *itss;
 	int ret;
 
+	if (!ll_boot_init())
+		return 0;
 	/*
 	 * This must be called before any devices are probed. Put any probing
 	 * into arch_fsps_preinit() above.
diff --git a/arch/x86/cpu/apollolake/hostbridge.c b/arch/x86/cpu/apollolake/hostbridge.c
index 793853d5b5..cb46ec6c0b 100644
--- a/arch/x86/cpu/apollolake/hostbridge.c
+++ b/arch/x86/cpu/apollolake/hostbridge.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/intel_pinctrl.h>
 #include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/apollolake/lpc.c b/arch/x86/cpu/apollolake/lpc.c
index 45b2144fc6..b81a458f2e 100644
--- a/arch/x86/cpu/apollolake/lpc.c
+++ b/arch/x86/cpu/apollolake/lpc.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/lpc_common.h>
 #include <asm/pci.h>
diff --git a/arch/x86/cpu/apollolake/pmc.c b/arch/x86/cpu/apollolake/pmc.c
index 4ea7c7447b..192dec7109 100644
--- a/arch/x86/cpu/apollolake/pmc.c
+++ b/arch/x86/cpu/apollolake/pmc.c
@@ -11,10 +11,12 @@
 #include <common.h>
 #include <dt-structs.h>
 #include <dm.h>
+#include <log.h>
 #include <spl.h>
 #include <acpi/acpi_s3.h>
 #include <asm/io.h>
 #include <asm/pci.h>
+#include <linux/bitops.h>
 #include <power/acpi_pmc.h>
 
 #define GPIO_GPE_CFG		0x1050
diff --git a/arch/x86/cpu/apollolake/punit.c b/arch/x86/cpu/apollolake/punit.c
index 1a131fb0b1..e76f2805d7 100644
--- a/arch/x86/cpu/apollolake/punit.c
+++ b/arch/x86/cpu/apollolake/punit.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/cpu.h>
 #include <asm/cpu_common.h>
@@ -12,6 +13,7 @@
 #include <asm/io.h>
 #include <asm/pci.h>
 #include <asm/arch/systemagent.h>
+#include <linux/delay.h>
 
 /*
  * Punit Initialisation code. This all isn't documented, but
diff --git a/arch/x86/cpu/apollolake/spl.c b/arch/x86/cpu/apollolake/spl.c
index d32f2a9898..5a53831dc6 100644
--- a/arch/x86/cpu/apollolake/spl.c
+++ b/arch/x86/cpu/apollolake/spl.c
@@ -5,7 +5,10 @@
 
 #include <common.h>
 #include <binman_sym.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spl.h>
diff --git a/arch/x86/cpu/baytrail/acpi.c b/arch/x86/cpu/baytrail/acpi.c
index 5772310979..65f2006a0a 100644
--- a/arch/x86/cpu/baytrail/acpi.c
+++ b/arch/x86/cpu/baytrail/acpi.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <log.h>
 #include <acpi/acpi_s3.h>
 #include <acpi/acpi_table.h>
 #include <asm/io.h>
diff --git a/arch/x86/cpu/baytrail/cpu.c b/arch/x86/cpu/baytrail/cpu.c
index a9cfcedd81..18e48ffa53 100644
--- a/arch/x86/cpu/baytrail/cpu.c
+++ b/arch/x86/cpu/baytrail/cpu.c
@@ -9,6 +9,7 @@
 #include <cpu.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/cpu.h>
 #include <asm/cpu_x86.h>
diff --git a/arch/x86/cpu/baytrail/fsp_configs.c b/arch/x86/cpu/baytrail/fsp_configs.c
index 1d1948c91a..21816ce5b8 100644
--- a/arch/x86/cpu/baytrail/fsp_configs.c
+++ b/arch/x86/cpu/baytrail/fsp_configs.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index f2e48f401f..f73738ce5c 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -11,6 +11,7 @@
 #include <asm/mrccache.h>
 #include <asm/post.h>
 #include <asm/arch/iomap.h>
+#include <linux/bitops.h>
 
 /* GPIO SUS */
 #define GPIO_SUS_PAD_BASE	(IO_BASE_ADDRESS + IO_BASE_OFFSET_GPSSUS)
diff --git a/arch/x86/cpu/braswell/braswell.c b/arch/x86/cpu/braswell/braswell.c
index 7a83b06005..3345049993 100644
--- a/arch/x86/cpu/braswell/braswell.c
+++ b/arch/x86/cpu/braswell/braswell.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/mrccache.h>
 #include <asm/post.h>
 
diff --git a/arch/x86/cpu/braswell/fsp_configs.c b/arch/x86/cpu/braswell/fsp_configs.c
index 60101d742d..9e710a940c 100644
--- a/arch/x86/cpu/braswell/fsp_configs.c
+++ b/arch/x86/cpu/braswell/fsp_configs.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/broadwell/adsp.c b/arch/x86/cpu/broadwell/adsp.c
index 2ac8cea7c3..41f7d5d4d1 100644
--- a/arch/x86/cpu/broadwell/adsp.c
+++ b/arch/x86/cpu/broadwell/adsp.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/cpu.h>
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 55a7439f1c..b77301118c 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -8,6 +8,8 @@
 #include <common.h>
 #include <dm.h>
 #include <cpu.h>
+#include <init.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/cpu_x86.h>
 #include <asm/cpu_common.h>
diff --git a/arch/x86/cpu/broadwell/cpu_from_spl.c b/arch/x86/cpu/broadwell/cpu_from_spl.c
index 2aa6f245e7..6567d50653 100644
--- a/arch/x86/cpu/broadwell/cpu_from_spl.c
+++ b/arch/x86/cpu/broadwell/cpu_from_spl.c
@@ -9,6 +9,8 @@
 #include <cpu_func.h>
 #include <debug_uart.h>
 #include <handoff.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mtrr.h>
 
 int misc_init_r(void)
diff --git a/arch/x86/cpu/broadwell/cpu_full.c b/arch/x86/cpu/broadwell/cpu_full.c
index 895edeb4bc..64a1cd414f 100644
--- a/arch/x86/cpu/broadwell/cpu_full.c
+++ b/arch/x86/cpu/broadwell/cpu_full.c
@@ -8,6 +8,8 @@
 #include <common.h>
 #include <dm.h>
 #include <cpu.h>
+#include <init.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/cpu_x86.h>
 #include <asm/cpu_common.h>
@@ -18,6 +20,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/pch.h>
 #include <asm/arch/rcb.h>
+#include <linux/delay.h>
 
 struct cpu_broadwell_priv {
 	bool ht_disabled;
diff --git a/arch/x86/cpu/broadwell/iobp.c b/arch/x86/cpu/broadwell/iobp.c
index 8a3ca6cde7..cb5595c930 100644
--- a/arch/x86/cpu/broadwell/iobp.c
+++ b/arch/x86/cpu/broadwell/iobp.c
@@ -10,6 +10,7 @@
 #include <asm/intel_regs.h>
 #include <asm/io.h>
 #include <asm/arch/pch.h>
+#include <linux/delay.h>
 
 #define IOBP_RETRY 1000
 
diff --git a/arch/x86/cpu/broadwell/lpc.c b/arch/x86/cpu/broadwell/lpc.c
index 9dc9b63db6..5669a028cf 100644
--- a/arch/x86/cpu/broadwell/lpc.c
+++ b/arch/x86/cpu/broadwell/lpc.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pch.h>
 #include <asm/intel_regs.h>
 #include <asm/io.h>
diff --git a/arch/x86/cpu/broadwell/me.c b/arch/x86/cpu/broadwell/me.c
index adc656c07a..ae16ce2649 100644
--- a/arch/x86/cpu/broadwell/me.c
+++ b/arch/x86/cpu/broadwell/me.c
@@ -7,7 +7,9 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/arch/me.h>
+#include <linux/delay.h>
 
 static inline void me_read_dword_ptr(struct udevice *dev, void *ptr, int offset)
 {
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index a48945adf1..9bcf211af9 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pch.h>
 #include <asm/cpu.h>
 #include <asm/gpio.h>
@@ -23,6 +24,7 @@
 #include <asm/arch/serialio.h>
 #include <asm/arch/spi.h>
 #include <dm/uclass-internal.h>
+#include <linux/delay.h>
 
 #define BIOS_CTRL	0xdc
 
diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
index aa83abbf85..0ead13af62 100644
--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c
+++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pch.h>
 #include <pci.h>
 #include <asm/cpu.h>
diff --git a/arch/x86/cpu/broadwell/power_state.c b/arch/x86/cpu/broadwell/power_state.c
index 09fda487d0..99d6f72cf6 100644
--- a/arch/x86/cpu/broadwell/power_state.c
+++ b/arch/x86/cpu/broadwell/power_state.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/broadwell/refcode.c b/arch/x86/cpu/broadwell/refcode.c
index f016489185..6c04dde992 100644
--- a/arch/x86/cpu/broadwell/refcode.c
+++ b/arch/x86/cpu/broadwell/refcode.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/pei_data.h>
 
 #define RMODULE_MAGIC		0xf8fe
diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c
index d89e0a1c9b..641da515c8 100644
--- a/arch/x86/cpu/broadwell/sata.c
+++ b/arch/x86/cpu/broadwell/sata.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/intel_regs.h>
@@ -14,6 +15,7 @@
 #include <asm/pch_common.h>
 #include <asm/pch_common.h>
 #include <asm/arch/pch.h>
+#include <linux/delay.h>
 
 struct sata_platdata {
 	int port_map;
diff --git a/arch/x86/cpu/broadwell/sdram.c b/arch/x86/cpu/broadwell/sdram.c
index 15bfc5811c..72f59a0a57 100644
--- a/arch/x86/cpu/broadwell/sdram.c
+++ b/arch/x86/cpu/broadwell/sdram.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <syscon.h>
 #include <asm/cpu.h>
diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig
index c8e6a889d0..497d6284ac 100644
--- a/arch/x86/cpu/coreboot/Kconfig
+++ b/arch/x86/cpu/coreboot/Kconfig
@@ -25,5 +25,6 @@ config SYS_COREBOOT
 	imply FS_CBFS
 	imply CBMEM_CONSOLE
 	imply X86_TSC_READ_BASE
+	select BINMAN if X86_64
 
 endif
diff --git a/arch/x86/cpu/coreboot/Makefile b/arch/x86/cpu/coreboot/Makefile
index 35b15bb1da..605f90304e 100644
--- a/arch/x86/cpu/coreboot/Makefile
+++ b/arch/x86/cpu/coreboot/Makefile
@@ -11,8 +11,14 @@
 # (C) Copyright 2002
 # Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
 
+ifndef CONFIG_SPL
 obj-y += car.o
+endif
+ifdef CONFIG_SPL_BUILD
+obj-y += coreboot_spl.o
+else
+obj-y += sdram.o
+endif
 obj-y += coreboot.o
 obj-y += tables.o
-obj-y += sdram.o
 obj-y += timestamp.o
diff --git a/arch/x86/cpu/coreboot/coreboot.c b/arch/x86/cpu/coreboot/coreboot.c
index 0c4c6348d1..d44db1347b 100644
--- a/arch/x86/cpu/coreboot/coreboot.c
+++ b/arch/x86/cpu/coreboot/coreboot.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <asm/msr.h>
@@ -27,7 +28,8 @@ int arch_cpu_init(void)
 
 	timestamp_init();
 
-	return x86_cpu_init_f();
+	return IS_ENABLED(CONFIG_X86_RUN_64BIT) ? x86_cpu_reinit_f() :
+		 x86_cpu_init_f();
 }
 
 int checkcpu(void)
diff --git a/arch/x86/cpu/coreboot/coreboot_spl.c b/arch/x86/cpu/coreboot/coreboot_spl.c
new file mode 100644
index 0000000000..36661871e9
--- /dev/null
+++ b/arch/x86/cpu/coreboot/coreboot_spl.c
@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ */
+
+#include <common.h>
+#include <init.h>
+
+int dram_init(void)
+{
+	return 0;
+}
diff --git a/arch/x86/cpu/coreboot/tables.c b/arch/x86/cpu/coreboot/tables.c
index 37e0424b5e..a5d31d1dea 100644
--- a/arch/x86/cpu/coreboot/tables.c
+++ b/arch/x86/cpu/coreboot/tables.c
@@ -69,6 +69,17 @@ static void cb_parse_vbnv(unsigned char *ptr, struct sysinfo_t *info)
 	info->vbnv_size = vbnv->vbnv_size;
 }
 
+static void cb_parse_cbmem_entry(unsigned char *ptr, struct sysinfo_t *info)
+{
+	struct cb_cbmem_entry *entry = (struct cb_cbmem_entry *)ptr;
+
+	if (entry->id != CBMEM_ID_SMBIOS)
+		return;
+
+	info->smbios_start = entry->address;
+	info->smbios_size = entry->entry_size;
+}
+
 static void cb_parse_gpios(unsigned char *ptr, struct sysinfo_t *info)
 {
 	int i;
@@ -115,20 +126,11 @@ __weak void cb_parse_unhandled(u32 tag, unsigned char *ptr)
 
 static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 {
+	unsigned char *ptr = addr;
 	struct cb_header *header;
-	unsigned char *ptr = (unsigned char *)addr;
 	int i;
 
-	for (i = 0; i < len; i += 16, ptr += 16) {
-		header = (struct cb_header *)ptr;
-		if (!strncmp((const char *)header->signature, "LBIO", 4))
-			break;
-	}
-
-	/* We walked the entire space and didn't find anything. */
-	if (i >= len)
-		return -1;
-
+	header = (struct cb_header *)ptr;
 	if (!header->table_bytes)
 		return 0;
 
@@ -215,6 +217,9 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 		case CB_TAG_VBNV:
 			cb_parse_vbnv(ptr, info);
 			break;
+		case CB_TAG_CBMEM_ENTRY:
+			cb_parse_cbmem_entry(ptr, info);
+			break;
 		default:
 			cb_parse_unhandled(rec->tag, ptr);
 			break;
@@ -231,10 +236,13 @@ static int cb_parse_header(void *addr, int len, struct sysinfo_t *info)
 
 int get_coreboot_info(struct sysinfo_t *info)
 {
-	int ret = cb_parse_header((void *)0x00000000, 0x1000, info);
+	long addr;
+	int ret;
 
-	if (ret != 1)
-		ret = cb_parse_header((void *)0x000f0000, 0x1000, info);
+	addr = locate_coreboot_table();
+	if (addr < 0)
+		return addr;
+	ret = cb_parse_header((void *)addr, 0x1000, info);
 
-	return (ret == 1) ? 0 : -1;
+	return ret == 1 ? 0 : -ENOENT;
 }
diff --git a/arch/x86/cpu/coreboot/timestamp.c b/arch/x86/cpu/coreboot/timestamp.c
index e8ccaf2212..0162597809 100644
--- a/arch/x86/cpu/coreboot/timestamp.c
+++ b/arch/x86/cpu/coreboot/timestamp.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <asm/arch/timestamp.h>
 #include <asm/arch/sysinfo.h>
 #include <linux/compiler.h>
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index cec04b481b..a814e7d7a6 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -19,11 +19,13 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <acpi/acpi_s3.h>
@@ -239,8 +241,10 @@ int cpu_init_r(void)
 	struct udevice *dev;
 	int ret;
 
-	if (!ll_boot_init())
+	if (!ll_boot_init()) {
+		uclass_first_device(UCLASS_PCI, &dev);
 		return 0;
+	}
 
 	ret = x86_init_cpus();
 	if (ret)
@@ -288,3 +292,28 @@ int reserve_arch(void)
 	return 0;
 }
 #endif
+
+long detect_coreboot_table_at(ulong start, ulong size)
+{
+	u32 *ptr, *end;
+
+	size /= 4;
+	for (ptr = (void *)start, end = ptr + size; ptr < end; ptr += 4) {
+		if (*ptr == 0x4f49424c) /* "LBIO" */
+			return (long)ptr;
+	}
+
+	return -ENOENT;
+}
+
+long locate_coreboot_table(void)
+{
+	long addr;
+
+	/* We look for LBIO in the first 4K of RAM and again at 960KB */
+	addr = detect_coreboot_table_at(0x0, 0x1000);
+	if (addr < 0)
+		addr = detect_coreboot_table_at(0xf0000, 0x1000);
+
+	return addr;
+}
diff --git a/arch/x86/cpu/efi/app.c b/arch/x86/cpu/efi/app.c
index 13077411dc..10677ecbc2 100644
--- a/arch/x86/cpu/efi/app.c
+++ b/arch/x86/cpu/efi/app.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <netdev.h>
 
 int arch_cpu_init(void)
diff --git a/arch/x86/cpu/efi/payload.c b/arch/x86/cpu/efi/payload.c
index 66df128787..71619f6f01 100644
--- a/arch/x86/cpu/efi/payload.c
+++ b/arch/x86/cpu/efi/payload.c
@@ -9,6 +9,7 @@
 #include <efi.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <usb.h>
 #include <asm/bootparam.h>
 #include <asm/e820.h>
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c
index c8da7f10e9..435e50edad 100644
--- a/arch/x86/cpu/i386/cpu.c
+++ b/arch/x86/cpu/i386/cpu.c
@@ -24,6 +24,7 @@
 #include <malloc.h>
 #include <spl.h>
 #include <asm/control_regs.h>
+#include <asm/coreboot_tables.h>
 #include <asm/cpu.h>
 #include <asm/mp.h>
 #include <asm/msr.h>
@@ -451,6 +452,8 @@ int x86_cpu_reinit_f(void)
 {
 	setup_identity();
 	setup_pci_ram_top();
+	if (locate_coreboot_table() >= 0)
+		gd->flags |= GD_FLG_SKIP_LL_INIT;
 
 	return 0;
 }
@@ -611,16 +614,6 @@ int cpu_jump_to_64bit_uboot(ulong target)
 
 	func = (func_t)ptr;
 
-	/*
-	 * Copy U-Boot from ROM
-	 * TODO(sjg@chromium.org): Figure out a way to get the text base
-	 * correctly here, and in the device-tree binman definition.
-	 *
-	 * Also consider using FIT so we get the correct image length and
-	 * parameters.
-	 */
-	memcpy((char *)target, (char *)0xfff00000, 0x100000);
-
 	/* Jump to U-Boot */
 	func((ulong)pgtable, 0, (ulong)target);
 
diff --git a/arch/x86/cpu/i386/interrupt.c b/arch/x86/cpu/i386/interrupt.c
index 4c7e9ea215..c0c4bc95fd 100644
--- a/arch/x86/cpu/i386/interrupt.c
+++ b/arch/x86/cpu/i386/interrupt.c
@@ -23,6 +23,7 @@
 #include <asm/io.h>
 #include <asm/lapic.h>
 #include <asm/processor-flags.h>
+#include <asm/ptrace.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -264,6 +265,9 @@ int interrupt_init(void)
 	struct udevice *dev;
 	int ret;
 
+	if (!ll_boot_init())
+		return 0;
+
 	/* Try to set up the interrupt router, but don't require one */
 	ret = irq_first_device_type(X86_IRQT_BASE, &dev);
 	if (ret && ret != -ENODEV)
@@ -295,8 +299,7 @@ int interrupt_init(void)
 	 * TODO(sjg@chromium.org): But we don't handle these correctly when
 	 * booted from EFI.
 	 */
-	if (ll_boot_init())
-		enable_interrupts();
+	enable_interrupts();
 #endif
 
 	return 0;
diff --git a/arch/x86/cpu/intel_common/Makefile b/arch/x86/cpu/intel_common/Makefile
index 1736bd2b53..374803b876 100644
--- a/arch/x86/cpu/intel_common/Makefile
+++ b/arch/x86/cpu/intel_common/Makefile
@@ -32,6 +32,8 @@ obj-$(CONFIG_HAVE_P2SB) += p2sb.o
 
 ifdef CONFIG_SPL
 ifndef CONFIG_SPL_BUILD
+ifndef CONFIG_SYS_COREBOOT
 obj-y += cpu_from_spl.o
 endif
 endif
+endif
diff --git a/arch/x86/cpu/intel_common/cpu.c b/arch/x86/cpu/intel_common/cpu.c
index 4d093a5391..509730aea9 100644
--- a/arch/x86/cpu/intel_common/cpu.c
+++ b/arch/x86/cpu/intel_common/cpu.c
@@ -11,6 +11,7 @@
 #include <cpu.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/cpu_common.h>
 #include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/intel_common/cpu_from_spl.c b/arch/x86/cpu/intel_common/cpu_from_spl.c
index b7bb524162..e4157c5734 100644
--- a/arch/x86/cpu/intel_common/cpu_from_spl.c
+++ b/arch/x86/cpu/intel_common/cpu_from_spl.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <handoff.h>
+#include <init.h>
 #include <asm/cpu_common.h>
 #include <asm/intel_regs.h>
 #include <asm/lapic.h>
diff --git a/arch/x86/cpu/intel_common/fast_spi.c b/arch/x86/cpu/intel_common/fast_spi.c
index a6e3d0a5bf..5d3944dee2 100644
--- a/arch/x86/cpu/intel_common/fast_spi.c
+++ b/arch/x86/cpu/intel_common/fast_spi.c
@@ -31,21 +31,30 @@ static ulong fast_spi_get_bios_region(struct fast_spi_regs *regs,
 	return bios_start;
 }
 
+int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep,
+				uint *map_sizep, uint *offsetp)
+{
+	ulong base;
+
+	base = fast_spi_get_bios_region(regs, map_sizep);
+	*map_basep = (u32)-*map_sizep - base;
+	*offsetp = base;
+
+	return 0;
+}
+
 int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep,
 			   uint *offsetp)
 {
 	struct fast_spi_regs *regs;
-	ulong bar, base, mmio_base;
+	ulong bar, mmio_base;
 
 	/* Special case to find mapping without probing the device */
 	pci_x86_read_config(pdev, PCI_BASE_ADDRESS_0, &bar, PCI_SIZE_32);
 	mmio_base = bar & PCI_BASE_ADDRESS_MEM_MASK;
 	regs = (struct fast_spi_regs *)mmio_base;
-	base = fast_spi_get_bios_region(regs, map_sizep);
-	*map_basep = (u32)-*map_sizep - base;
-	*offsetp = base;
 
-	return 0;
+	return fast_spi_get_bios_mmap_regs(regs, map_basep, map_sizep, offsetp);
 }
 
 int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base)
diff --git a/arch/x86/cpu/intel_common/itss.c b/arch/x86/cpu/intel_common/itss.c
index e4f785ce89..963afa8f5b 100644
--- a/arch/x86/cpu/intel_common/itss.c
+++ b/arch/x86/cpu/intel_common/itss.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <irq.h>
+#include <log.h>
 #include <malloc.h>
 #include <p2sb.h>
 #include <spl.h>
diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c
index 2a538cf12e..3420f03cca 100644
--- a/arch/x86/cpu/intel_common/lpc.c
+++ b/arch/x86/cpu/intel_common/lpc.c
@@ -12,6 +12,7 @@
 #include <asm/intel_regs.h>
 #include <asm/io.h>
 #include <asm/lpc_common.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/intel_common/me_status.c b/arch/x86/cpu/intel_common/me_status.c
index fc9efbf3a9..abc5f6fbc7 100644
--- a/arch/x86/cpu/intel_common/me_status.c
+++ b/arch/x86/cpu/intel_common/me_status.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/me.h>
 
 /* HFS1[3:0] Current Working State Values */
diff --git a/arch/x86/cpu/intel_common/microcode.c b/arch/x86/cpu/intel_common/microcode.c
index c7a539d281..0355d3c1da 100644
--- a/arch/x86/cpu/intel_common/microcode.c
+++ b/arch/x86/cpu/intel_common/microcode.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <asm/cpu.h>
 #include <asm/microcode.h>
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index 755670a847..73bfd12332 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/gpio.h>
diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c
index 6f3c441618..ec35d04ae5 100644
--- a/arch/x86/cpu/intel_common/p2sb.c
+++ b/arch/x86/cpu/intel_common/p2sb.c
@@ -10,9 +10,11 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <log.h>
 #include <p2sb.h>
 #include <spl.h>
 #include <asm/pci.h>
+#include <linux/bitops.h>
 
 struct p2sb_platdata {
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
diff --git a/arch/x86/cpu/intel_common/report_platform.c b/arch/x86/cpu/intel_common/report_platform.c
index 0f217c1497..a3612817c4 100644
--- a/arch/x86/cpu/intel_common/report_platform.c
+++ b/arch/x86/cpu/intel_common/report_platform.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/pci.h>
 #include <asm/report_platform.h>
diff --git a/arch/x86/cpu/ioapic.c b/arch/x86/cpu/ioapic.c
index 01ade76a58..4f99de6ece 100644
--- a/arch/x86/cpu/ioapic.c
+++ b/arch/x86/cpu/ioapic.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/ioapic.h>
 #include <asm/lapic.h>
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index bafa031082..836a0e8b86 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -8,6 +8,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <irq.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/irq.h>
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 1cb6cecda9..5448f064fc 100644
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -6,6 +6,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <pch.h>
 #include <asm/cpu.h>
@@ -17,6 +18,8 @@
 #include <asm/arch/model_206ax.h>
 #include <asm/arch/pch.h>
 #include <asm/arch/sandybridge.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/ivybridge/cpu.c b/arch/x86/cpu/ivybridge/cpu.c
index 8f30cdbe24..cb6eded9c9 100644
--- a/arch/x86/cpu/ivybridge/cpu.c
+++ b/arch/x86/cpu/ivybridge/cpu.c
@@ -15,6 +15,8 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <pch.h>
 #include <asm/cpu.h>
 #include <asm/cpu_common.h>
diff --git a/arch/x86/cpu/ivybridge/early_me.c b/arch/x86/cpu/ivybridge/early_me.c
index 219d5be399..bee1671baf 100644
--- a/arch/x86/cpu/ivybridge/early_me.c
+++ b/arch/x86/cpu/ivybridge/early_me.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <sysreset.h>
 #include <asm/pci.h>
 #include <asm/cpu.h>
@@ -15,6 +16,7 @@
 #include <asm/arch/me.h>
 #include <asm/arch/pch.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static const char *const me_ack_values[] = {
 	[ME_HFS_ACK_NO_DID]	= "No DID Ack received",
diff --git a/arch/x86/cpu/ivybridge/fsp_configs.c b/arch/x86/cpu/ivybridge/fsp_configs.c
index 0e6453c847..41d7d2a2b4 100644
--- a/arch/x86/cpu/ivybridge/fsp_configs.c
+++ b/arch/x86/cpu/ivybridge/fsp_configs.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/fsp1/fsp_support.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/ivybridge/ivybridge.c b/arch/x86/cpu/ivybridge/ivybridge.c
index 8d10fd6c54..eb3f362e4e 100644
--- a/arch/x86/cpu/ivybridge/ivybridge.c
+++ b/arch/x86/cpu/ivybridge/ivybridge.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/post.h>
 #include <asm/processor.h>
 
diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index d9ddcdc840..85fd2a965a 100644
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <rtc.h>
 #include <pci.h>
 #include <asm/intel_regs.h>
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index 56ab6bf4ac..5954a24873 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -10,6 +10,7 @@
 #include <cpu.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/cpu.h>
 #include <asm/cpu_common.h>
diff --git a/arch/x86/cpu/ivybridge/northbridge.c b/arch/x86/cpu/ivybridge/northbridge.c
index 0f427afcb8..b713fcb1cf 100644
--- a/arch/x86/cpu/ivybridge/northbridge.c
+++ b/arch/x86/cpu/ivybridge/northbridge.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/msr.h>
 #include <asm/cpu.h>
 #include <asm/intel_regs.h>
@@ -17,6 +18,7 @@
 #include <asm/arch/pch.h>
 #include <asm/arch/model_206ax.h>
 #include <asm/arch/sandybridge.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index fc6c427430..025b20be31 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -8,6 +8,7 @@
 #include <ahci.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/pch_common.h>
 #include <asm/pci.h>
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index cf34f94a91..99bc48021e 100644
--- a/arch/x86/cpu/ivybridge/sdram.c
+++ b/arch/x86/cpu/ivybridge/sdram.c
@@ -13,6 +13,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <rtc.h>
diff --git a/arch/x86/cpu/ivybridge/sdram_nop.c b/arch/x86/cpu/ivybridge/sdram_nop.c
index c55213ca2d..54e6acf262 100644
--- a/arch/x86/cpu/ivybridge/sdram_nop.c
+++ b/arch/x86/cpu/ivybridge/sdram_nop.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/x86/cpu/lapic.c b/arch/x86/cpu/lapic.c
index 44ed446784..c0691454f1 100644
--- a/arch/x86/cpu/lapic.c
+++ b/arch/x86/cpu/lapic.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/lapic.h>
 #include <asm/msr.h>
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 7b09f90cd5..7fde4ff7e1 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -9,6 +9,7 @@
 #include <cpu.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <qfw.h>
 #include <asm/atomic.h>
@@ -25,6 +26,7 @@
 #include <dm/uclass-internal.h>
 #include <dm/lists.h>
 #include <dm/root.h>
+#include <linux/delay.h>
 #include <linux/linkage.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/mtrr.c b/arch/x86/cpu/mtrr.c
index a43cb7fc15..7ec0733337 100644
--- a/arch/x86/cpu/mtrr.c
+++ b/arch/x86/cpu/mtrr.c
@@ -18,6 +18,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/msr.h>
 #include <asm/mtrr.h>
diff --git a/arch/x86/cpu/pci.c b/arch/x86/cpu/pci.c
index e1aae158ce..d4f9290ca7 100644
--- a/arch/x86/cpu/pci.c
+++ b/arch/x86/cpu/pci.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <asm/io.h>
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qemu.c
index 716351ad7f..044a429c13 100644
--- a/arch/x86/cpu/qemu/qemu.c
+++ b/arch/x86/cpu/qemu/qemu.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <pci.h>
 #include <qfw.h>
 #include <asm/irq.h>
diff --git a/arch/x86/cpu/quark/dram.c b/arch/x86/cpu/quark/dram.c
index 2bf90dcfc6..72937139ed 100644
--- a/arch/x86/cpu/quark/dram.c
+++ b/arch/x86/cpu/quark/dram.c
@@ -8,7 +8,9 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <asm/mrccache.h>
 #include <asm/mtrr.h>
 #include <asm/post.h>
diff --git a/arch/x86/cpu/quark/mrc_util.h b/arch/x86/cpu/quark/mrc_util.h
index 4a760a9f59..e6e69c49d0 100644
--- a/arch/x86/cpu/quark/mrc_util.h
+++ b/arch/x86/cpu/quark/mrc_util.h
@@ -10,6 +10,8 @@
 #ifndef _MRC_UTIL_H_
 #define _MRC_UTIL_H_
 
+#include <log.h>
+
 /* Turn on this macro to enable MRC debugging output */
 #undef  MRC_DEBUG
 
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index d6611eea5d..ddad02e375 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <mmc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/ioapic.h>
 #include <asm/irq.h>
@@ -16,6 +18,7 @@
 #include <asm/arch/device.h>
 #include <asm/arch/msg_port.h>
 #include <asm/arch/quark.h>
+#include <linux/delay.h>
 
 static void quark_setup_mtrr(void)
 {
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 66737e655b..782ed863fe 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <dm/device-internal.h>
 #include <pci.h>
 #include <asm/io.h>
diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c
index bab54b18df..9813f7977b 100644
--- a/arch/x86/cpu/slimbootloader/serial.c
+++ b/arch/x86/cpu/slimbootloader/serial.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <ns16550.h>
 #include <serial.h>
 #include <asm/arch/slimbootloader.h>
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
index 21dcfb2142..f61fe814e9 100644
--- a/arch/x86/cpu/slimbootloader/slimbootloader.c
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/slimbootloader.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/arch/x86/cpu/start_from_spl.S b/arch/x86/cpu/start_from_spl.S
index 22cab2dd6c..905c825cdc 100644
--- a/arch/x86/cpu/start_from_spl.S
+++ b/arch/x86/cpu/start_from_spl.S
@@ -14,18 +14,30 @@
 .globl _start
 .type _start, @function
 _start:
-	/* Set up memory using the existing stack */
+	/*
+	 * If running from coreboot, CAR is no-longer available. Use the
+	 * existing stack, which is large enough.
+	 */
+	call	locate_coreboot_table
+	cmp	$0, %eax
+	jge	use_existing_stack
+
 	movl	$(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %eax
 #ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
 	subl	$CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %eax
 #endif
+	jmp	2f
 	/*
-	 * We don't subject CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is
+	 * We don't subtract CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is
 	 * already set up. This has the happy side-effect of putting gd in a
 	 * new place separate from SPL, so the memset() in
 	 * board_init_f_init_reserve() does not cause any problems (otherwise
 	 * it would zero out the gd and crash)
 	 */
+	/* Set up memory using the existing stack */
+use_existing_stack:
+	mov	%esp, %eax
+2:
 	call	board_init_f_alloc_reserve
 	mov	%eax, %esp
 
diff --git a/arch/x86/cpu/tangier/pinmux.c b/arch/x86/cpu/tangier/pinmux.c
index fdd653026b..5b0e106011 100644
--- a/arch/x86/cpu/tangier/pinmux.c
+++ b/arch/x86/cpu/tangier/pinmux.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <dm/read.h>
 #include <regmap.h>
diff --git a/arch/x86/cpu/tangier/sdram.c b/arch/x86/cpu/tangier/sdram.c
index 8c7e1c10c2..df3b9e4ec9 100644
--- a/arch/x86/cpu/tangier/sdram.c
+++ b/arch/x86/cpu/tangier/sdram.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <asm/e820.h>
 #include <asm/global_data.h>
 #include <asm/sfi.h>
diff --git a/arch/x86/cpu/tangier/tangier.c b/arch/x86/cpu/tangier/tangier.c
index 43bee1fb70..1e2f6cc8b7 100644
--- a/arch/x86/cpu/tangier/tangier.c
+++ b/arch/x86/cpu/tangier/tangier.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/u-boot-x86.h>
 
 /*
diff --git a/arch/x86/cpu/turbo.c b/arch/x86/cpu/turbo.c
index be468d2b2c..f8d85d5a33 100644
--- a/arch/x86/cpu/turbo.c
+++ b/arch/x86/cpu/turbo.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
index 90925e46ea..1b4d3971b0 100644
--- a/arch/x86/cpu/x86_64/cpu.c
+++ b/arch/x86/cpu/x86_64/cpu.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <debug_uart.h>
+#include <init.h>
 
 /*
  * Global declaration of gd.
@@ -53,6 +54,7 @@ int misc_init_r(void)
 	return 0;
 }
 
+#ifndef CONFIG_SYS_COREBOOT
 int checkcpu(void)
 {
 	return 0;
@@ -62,6 +64,7 @@ int print_cpuinfo(void)
 {
 	return 0;
 }
+#endif
 
 int x86_cpu_reinit_f(void)
 {
diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index d48ef3573e..965d9f387d 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -21,6 +21,8 @@
 #include <asm/arch-apollolake/iomap.h>
 #include <asm/arch-apollolake/pm.h>
 #include <dt-bindings/clock/intel-clock.h>
+#include <asm/arch-apollolake/fsp/fsp_m_upd.h>
+#include <asm/arch-apollolake/fsp/fsp_s_upd.h>
 
 / {
 	model = "Google Coral";
@@ -436,7 +438,42 @@
 		PAD_CFG_NF(LPC_FRAMEB, NATIVE, DEEP, NF1) /* LPC_FRAME_N */
 		>;
 
-	lpddr4-swizzle = /bits/ 8 <
+	fspm,package = <PACKAGE_BGA>;
+	fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>;
+	fspm,memory-down = <MEMORY_DOWN_YES>;
+	fspm,scrambler-support = <1>;
+	fspm,interleaved-mode = <INTERLEAVED_MODE_ENABLE>;
+	fspm,channel-hash-mask = <0x36>;
+	fspm,slice-hash-mask = <0x9>;
+	fspm,dual-rank-support-enable = <1>;
+	fspm,low-memory-max-value = <2048>;
+	fspm,ch0-rank-enable = <1>;
+	fspm,ch0-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch0-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch0-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch0-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch1-rank-enable = <1>;
+	fspm,ch1-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch1-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch1-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch1-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch2-rank-enable = <1>;
+	fspm,ch2-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch2-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch2-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch2-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch3-rank-enable = <1>;
+	fspm,ch3-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch3-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch3-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch3-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,fspm,skip-cse-rbp = <1>;
+
+	fspm,ch-bit-swizzling = /bits/ 8 <
 		/* LP4_PHYS_CH0A */
 
 		/* DQA[0:7] pins of LPDDR4 module */
@@ -479,13 +516,29 @@
 		20 23 22 21 18 19 16 17
 		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
 		25 28 30 31 26 27 24 29>;
+
+	fspm,dimm0-spd-address = <0>;
+	fspm,dimm1-spd-address = <0>;
+	fspm,skip-cse-rbp = <1>;
+	fspm,enable-s3-heci2 = <0>;
 };
 
 &fsp_s {
 	u-boot,dm-pre-proper;
 
+	fsps,ish-enable = <0>;
+	fsps,enable-sata = <0>;
+	fsps,pcie-root-port-en = [00 00 00 00 00 01];
+	fsps,pcie-rp-hot-plug = [00 00 00 00 00 01];
+	fsps,i2c6-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,i2c7-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,hsuart3-enable = <HSUARTX_ENABLE_DISABLED>;
+	fsps,spi1-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,spi2-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,sdio-enabled = <0>;
+
 	/* Disable unused clkreq of PCIe root ports */
-	pcie-rp-clkreq-pin = /bits/ 8 <0 /* wifi/bt */
+	fsps,pcie-rp-clk-req-number = /bits/ 8 <0 /* wifi/bt */
 		CLKREQ_DISABLED
 		CLKREQ_DISABLED
 		CLKREQ_DISABLED
@@ -539,18 +592,23 @@
 	 * [14:8] steps of delay for Auto Tuning Mode, each 125ps
 	 * [6:0] steps of delay for HS200, each 125ps
 	 */
-	emmc = <0x0c16 0x28162828 0x00181717 0x10008>;
-
 	/* Enable DPTF */
 	dptf-enable;
+	fsps,emmc-tx-data-cntl1 = <0x0c16>;
+	fsps,emmc-tx-data-cntl2 = <0x28162828>;
+	fsps,emmc-rx-cmd-data-cntl1 = <0x00181717>;
+	fsps,emmc-rx-cmd-data-cntl2 = <0x10008>;
+
+	/* Enable WiFi */
+	fsps,pcie-root-port-en = [01 00 00 00 00 00];
+	fsps,pcie-rp-hot-plug = [00 00 00 00 00 00];
 
-	/* Enable Audio Clock and Power gating */
-	hdaudio-clk-gate-enable;
-	hdaudio-pwr-gate-enable;
-	hdaudio-bios-config-lockdown;
+	fsps,skip-mp-init = <1>;
+	fsps,spi-eiss = <0>;
+	fsps,rtc-lock = <0>;
 
-	/* Enable lpss s0ix */
-	lpss-s0ix-enable;
+	fsps,port-usb20-per-port-pe-txi-set = [07 07 06 06 07 07 07 01];
+	fsps,port-usb20-per-port-txi-set = [00 02 00 00 00 00 00 03];
 
 	/*
 	 * TODO(sjg@chromium.org): Move this to the I2C nodes
diff --git a/arch/x86/dts/coreboot-u-boot.dtsi b/arch/x86/dts/coreboot-u-boot.dtsi
new file mode 100644
index 0000000000..38efc48d83
--- /dev/null
+++ b/arch/x86/dts/coreboot-u-boot.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <config.h>
+
+/ {
+	binman {
+		filename = "u-boot-x86-with-spl.bin";
+		u-boot-spl {
+		};
+		u-boot {
+			offset = <0x10000>;
+		};
+	};
+};
diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
index 93bee5b2d1..5275b75f3b 100644
--- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
+++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_m_upd.h
@@ -7,6 +7,7 @@
 #ifndef	__ASM_ARCH_FSP_M_UDP_H
 #define	__ASM_ARCH_FSP_M_UDP_H
 
+#ifndef __ASSEMBLY__
 #include <asm/fsp2/fsp_api.h>
 
 #define FSP_DRAM_CHANNELS	4
@@ -33,7 +34,15 @@ struct __packed fsp_ram_channel {
 	u8	odt_levels;
 };
 
+/**
+ * struct fsp_m_config - FSP-M configuration
+ *
+ * Note that headers precede this and are 64 bytes long. The hex offsets
+ * mentioned in this file are relative to the start of the header, the same
+ * convention used in Intel's APL FSP header file.
+ */
 struct __packed fsp_m_config {
+	/* 0x40 */
 	u32	serial_debug_port_address;
 	u8	serial_debug_port_type;
 	u8	serial_debug_port_device;
@@ -48,6 +57,7 @@ struct __packed fsp_m_config {
 	u8	profile;
 	u8	memory_down;
 
+	/* 0x50 */
 	u8	ddr3_l_page_size;
 	u8	ddr3_lasr;
 	u8	scrambler_support;
@@ -61,6 +71,7 @@ struct __packed fsp_m_config {
 	u16	memory_size_limit;
 	u16	low_memory_max_value;
 
+	/* 0x60 */
 	u16	high_memory_max_value;
 	u8	disable_fast_boot;
 	u8	dimm0_spd_address;
@@ -72,6 +83,7 @@ struct __packed fsp_m_config {
 	u32	msg_level_mask;
 	u8	unused_upd_space0[4];
 
+	/* 0x110 */
 	u8	pre_mem_gpio_table_pin_num[4];
 	u32	pre_mem_gpio_table_ptr;
 	u8	pre_mem_gpio_table_entry_num;
@@ -80,8 +92,10 @@ struct __packed fsp_m_config {
 	u8	mrc_data_saving;
 	u32	oem_loading_base;
 
+	/* 0x120 */
 	u8	oem_file_name[16];
 
+	/* 0x130 */
 	void	*mrc_boot_data_ptr;
 	u8	e_mmc_trace_len;
 	u8	skip_cse_rbp;
@@ -93,20 +107,20 @@ struct __packed fsp_m_config {
 	u8	msc1_wrap;
 	u32	msc0_size;
 
+	/* 0x140 */
 	u32	msc1_size;
 	u8	pti_mode;
 	u8	pti_training;
 	u8	pti_speed;
 	u8	punit_mlvl;
-
 	u8	pmc_mlvl;
 	u8	sw_trace_en;
 	u8	periodic_retraining_disable;
 	u8	enable_reset_system;
-
 	u8	enable_s3_heci2;
 	u8	unused_upd_space1[3];
 
+	/* 0x150 */
 	void	*variable_nvs_buffer_ptr;
 	u8	reserved_fspm_upd[12];
 };
@@ -119,5 +133,172 @@ struct __packed fspm_upd {
 	u8 unused_upd_space2[158];
 	u16 upd_terminator;
 };
+#endif
+
+#define SERIAL_DEBUG_PORT_TYPE_NONE 0
+#define SERIAL_DEBUG_PORT_TYPE_IO 1
+#define SERIAL_DEBUG_PORT_TYPE_MMIO 2
+
+#define SERIAL_DEBUG_PORT_DEVICE_UART0 0
+#define SERIAL_DEBUG_PORT_DEVICE_UART1 1
+#define SERIAL_DEBUG_PORT_DEVICE_UART2 2
+#define SERIAL_DEBUG_PORT_DEVICE_EXTERNAL 3
+
+#define SERIAL_DEBUG_PORT_STRIDE_SIZE_1 0
+#define SERIAL_DEBUG_PORT_STRIDE_SIZE_4 2
+
+#define IGD_DVMT_50_PRE_ALLOC_64M 0x02
+#define IGD_DVMT_50_PRE_ALLOC_96M 0x03
+#define IGD_DVMT_50_PRE_ALLOC_128M 0x04
+#define IGD_DVMT_50_PRE_ALLOC_160M 0x05
+#define IGD_DVMT_50_PRE_ALLOC_192M 0x06
+#define IGD_DVMT_50_PRE_ALLOC_224M 0x07
+#define IGD_DVMT_50_PRE_ALLOC_256M 0x08
+#define IGD_DVMT_50_PRE_ALLOC_288M 0x09
+#define IGD_DVMT_50_PRE_ALLOC_320M 0x0a
+#define IGD_DVMT_50_PRE_ALLOC_352M 0x0b
+#define IGD_DVMT_50_PRE_ALLOC_384M 0x0c
+#define IGD_DVMT_50_PRE_ALLOC_416M 0x0d
+#define IGD_DVMT_50_PRE_ALLOC_448M 0x0e
+#define IGD_DVMT_50_PRE_ALLOC_480M 0x0f
+#define IGD_DVMT_50_PRE_ALLOC_512M 0x10
+
+#define IGD_APERTURE_SIZE_128M 0x1
+#define IGD_APERTURE_SIZE_256M 0x2
+#define IGD_APERTURE_SIZE_512M 0x3
+
+#define GTT_SIZE_2M 1
+#define GTT_SIZE_4M 2
+#define GTT_SIZE_8M 3
+
+#define PRIMARY_VIDEO_ADAPTER_AUTO 0
+#define PRIMARY_VIDEO_ADAPTER_IGD 2
+#define PRIMARY_VIDEO_ADAPTER_PCI 3
+
+#define PACKAGE_SODIMM 0
+#define PACKAGE_BGA 1
+#define PACKAGE_BGA_MIRRORED 2
+#define PACKAGE_SODIMM_UDIMM_RANK_MIRRORED 3
+
+#define PROFILE_WIO2_800_7_8_8 0x1
+#define PROFILE_WIO2_1066_9_10_10 0x2
+#define PROFILE_LPDDR3_1066_8_10_10 0x3
+#define PROFILE_LPDDR3_1333_10_12_12 0x4
+#define PROFILE_LPDDR3_1600_12_15_15 0x5
+#define PROFILE_LPDDR3_1866_14_17_17 0x6
+#define PROFILE_LPDDR3_2133_16_20_20 0x7
+#define PROFILE_LPDDR4_1066_10_10_10 0x8
+#define PROFILE_LPDDR4_1600_14_15_15 0x9
+#define PROFILE_LPDDR4_2133_20_20_20 0xa
+#define PROFILE_LPDDR4_2400_24_22_22 0xb
+#define PROFILE_LPDDR4_2666_24_24_24 0xc
+#define PROFILE_LPDDR4_2933_28_27_27 0xd
+#define PROFILE_LPDDR4_3200_28_29_29 0xe
+#define PROFILE_DDR3_1066_6_6_6 0xf
+#define PROFILE_DDR3_1066_7_7_7 0x10
+#define PROFILE_DDR3_1066_8_8_8 0x11
+#define PROFILE_DDR3_1333_7_7_7 0x12
+#define PROFILE_DDR3_1333_8_8_8 0x13
+#define PROFILE_DDR3_1333_9_9_9 0x14
+#define PROFILE_DDR3_1333_10_10_10 0x15
+#define PROFILE_DDR3_1600_8_8_8 0x16
+#define PROFILE_DDR3_1600_9_9_9 0x17
+#define PROFILE_DDR3_1600_10_10_10 0x18
+#define PROFILE_DDR3_1600_11_11_11 0x19
+#define PROFILE_DDR3_1866_10_10_10 0x1a
+#define PROFILE_DDR3_1866_11_11_11 0x1b
+#define PROFILE_DDR3_1866_12_12_12 0x1c
+#define PROFILE_DDR3_1866_13_13_13 0x1d
+#define PROFILE_DDR3_2133_11_11_11 0x1e
+#define PROFILE_DDR3_2133_12_12_12 0x1f
+#define PROFILE_DDR3_2133_13_13_13 0x20
+#define PROFILE_DDR3_2133_14_14_14 0x21
+#define PROFILE_DDR4_1333_10_10_10 0x22
+#define PROFILE_DDR4_1600_10_10_10 0x23
+#define PROFILE_DDR4_1600_11_11_11 0x24
+#define PROFILE_DDR4_1600_12_12_12 0x25
+#define PROFILE_DDR4_1866_12_12_12 0x26
+#define PROFILE_DDR4_1866_13_13_13 0x27
+#define PROFILE_DDR4_1866_14_14_14 0x28
+#define PROFILE_DDR4_2133_14_14_14 0x29
+#define PROFILE_DDR4_2133_15_15_15 0x2a
+#define PROFILE_DDR4_2133_16_16_16 0x2b
+#define PROFILE_DDR4_2400_15_15_15 0x2c
+#define PROFILE_DDR4_2400_16_16_16 0x2d
+#define PROFILE_DDR4_2400_17_17_17 0x2e
+#define PROFILE_DDR4_2400_18_18_18 0x2f
+
+#define MEMORY_DOWN_NO 0
+#define MEMORY_DOWN_YES 1
+#define MEMORY_DOWN_MD_SODIMM 2
+#define MEMORY_DOWN_LPDDR4 3
+
+#define DDR3L_PAGE_SIZE_1KB 1
+#define DDR3L_PAGE_SIZE_2KB 2
+
+#define INTERLEAVED_MODE_DISABLE 0
+#define INTERLEAVED_MODE_ENABLE 2
+
+#define RMT_MODE_DISABLE 0
+#define RMT_MODE_ENABLE 3
+
+#define CHX_DEVICE_WIDTH_X8 0
+#define CHX_DEVICE_WIDTH_X16 1
+#define CHX_DEVICE_WIDTH_X32 2
+#define CHX_DEVICE_WIDTH_X64 3
+
+#define CHX_DEVICE_DENSITY_4GB 0
+#define CHX_DEVICE_DENSITY_6GB 1
+#define CHX_DEVICE_DENSITY_8GB 2
+#define CHX_DEVICE_DENSITY_12GB 3
+#define CHX_DEVICE_DENSITY_16GB 4
+#define CHX_DEVICE_DENSITY_2GB 5
+
+#define CHX_OPTION_RANK_INTERLEAVING 0x1
+#define CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE 0x2
+#define CHX_OPTION_CH1_CLK_DISABLE 0x4
+#define CHX_OPTION_ADDRESS_MAP_2KB 0x10
+
+#define CHX_ODT_CONFIG_DDR3_RX_ODT 0x1
+#define CHX_ODT_CONFIG_DDR4_CA_ODT 0x2
+#define CHX_ODT_CONFIG_DDR3L_TX_ODT 0x10
+
+#define CHX_MODE2N_AUTO 0
+#define CHX_MODE2N_FORCE 1
+
+#define CHX_ODT_LEVELS_CONNECTED_TO_SOC 0x0
+#define CHX_ODT_LEVELS_HELD_HIGH 0x1
+
+#define NPK_EN_DISABLE 0
+#define NPK_EN_ENABLE 1
+#define NPK_EN_DEBUGGER 2
+#define NPK_EN_AUTO 3
+
+#define FW_TRACE_DESTINATION_NPK_TRACE_TO_MEMORY 1
+#define FW_TRACE_DESTINATION_NPK_TRACE_TO_DCI 2
+#define FW_TRACE_DESTINATION_NPK_NPK_TRACE_TO_BSSB 3
+#define FW_TRACE_DESTINATION_NPK_TRACE_TO_PTI 4
+
+#define MSC_X_WRAP_0 0
+#define MSC_X_WRAP_1 1
+
+#define MSC_X_SIZE_0M 0
+#define MSC_X_SIZE_1M 1
+#define MSC_X_SIZE_8M 2
+#define MSC_X_SIZE_64M 3
+#define MSC_X_SIZE_128M 4
+#define MSC_X_SIZE_256M 5
+#define MSC_X_SIZE_512M 6
+#define MSC_X_SIZE_1GB 7
+
+#define PTI_MODE_0 0
+#define PTI_MODE_x4 1
+#define PTI_MODE_x8 2
+#define PTI_MODE_x12 3
+#define PTI_MODE_x16 4
+
+#define PTI_SPEED_FULL 0
+#define PTI_SPEED_HALF 1
+#define PTI_SPEED_QUARTER 2
 
 #endif
diff --git a/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h b/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
index 4a868e80ba..451a7a254a 100644
--- a/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
+++ b/arch/x86/include/asm/arch-apollolake/fsp/fsp_s_upd.h
@@ -6,9 +6,18 @@
 #ifndef __ASM_ARCH_FSP_S_UDP_H
 #define __ASM_ARCH_FSP_S_UDP_H
 
+#ifndef __ASSEMBLY__
 #include <asm/fsp2/fsp_api.h>
 
+/**
+ * struct fsp_s_config - FSP-S configuration
+ *
+ * Note that struct fsp_upd_header preceeds this and is 32 bytes long. The
+ * hex offsets mentioned in this file are relative to the start of the header,
+ * the same convention used in Intel's APL FSP header file.
+ */
 struct __packed fsp_s_config {
+	/* 0x20 */
 	u8	active_processor_cores;
 	u8	disable_core1;
 	u8	disable_core2;
@@ -25,6 +34,8 @@ struct __packed fsp_s_config {
 	u8	c_state_auto_demotion;
 	u8	c_state_un_demotion;
 	u8	max_core_c_state;
+
+	/* 0x30 */
 	u8	pkg_c_state_demotion;
 	u8	pkg_c_state_un_demotion;
 	u8	turbo_mode;
@@ -35,6 +46,8 @@ struct __packed fsp_s_config {
 	u8	ipu_acpi_mode;
 	u8	force_wake;
 	u32	gtt_mm_adr;
+
+	/* 0x40 */
 	u32	gm_adr;
 	u8	pavp_lock;
 	u8	graphics_freq_modify;
@@ -48,6 +61,8 @@ struct __packed fsp_s_config {
 	u8	power_gating;
 	u8	unit_level_clock_gating;
 	u8	fast_boot;
+
+	/* 0x50 */
 	u8	dyn_sr;
 	u8	sa_ipu_enable;
 	u8	pm_support;
@@ -55,6 +70,8 @@ struct __packed fsp_s_config {
 	u32	logo_size;
 	u32	logo_ptr;
 	u32	graphics_config_ptr;
+
+	/* 0x60 */
 	u8	pavp_enable;
 	u8	pavp_pr3;
 	u8	cd_clock;
@@ -77,6 +94,8 @@ struct __packed fsp_s_config {
 	u8	hda_enable;
 	u8	dsp_enable;
 	u8	pme;
+
+	/* 0x90 */
 	u8	hd_audio_io_buffer_ownership;
 	u8	hd_audio_io_buffer_voltage;
 	u8	hd_audio_vc_type;
@@ -93,6 +112,8 @@ struct __packed fsp_s_config {
 	u8	hmt;
 	u8	hd_audio_pwr_gate;
 	u8	hd_audio_clk_gate;
+
+	/* 0xa0 */
 	u32	dsp_feature_mask;
 	u32	dsp_pp_module_mask;
 	u8	bios_cfg_lock_down;
@@ -103,6 +124,8 @@ struct __packed fsp_s_config {
 	u8	hpet_function_number;
 	u8	io_apic_bdf_valid;
 	u8	io_apic_bus_number;
+
+	/* 0xb0 */
 	u8	io_apic_device_number;
 	u8	io_apic_function_number;
 	u8	io_apic_entry24_119;
@@ -123,6 +146,8 @@ struct __packed fsp_s_config {
 	u8	i2c2_enable;
 	u8	i2c3_enable;
 	u8	i2c4_enable;
+
+	/* 0xd0 */
 	u8	i2c5_enable;
 	u8	i2c6_enable;
 	u8	i2c7_enable;
@@ -136,6 +161,8 @@ struct __packed fsp_s_config {
 	u8	os_dbg_enable;
 	u8	dci_en;
 	u32	uart2_kernel_debug_base_address;
+
+	/* 0xe0 */
 	u8	pcie_clock_gating_disabled;
 	u8	pcie_root_port8xh_decode;
 	u8	pcie8xh_decode_port_index;
@@ -149,6 +176,8 @@ struct __packed fsp_s_config {
 	u8	pcie_rp_pm_sci[6];
 	u8	pcie_rp_ext_sync[6];
 	u8	pcie_rp_transmitter_half_swing[6];
+
+	/* 0x110 */
 	u8	pcie_rp_acs_enabled[6];
 	u8	pcie_rp_clk_req_supported[6];
 	u8	pcie_rp_clk_req_number[6];
@@ -157,6 +186,8 @@ struct __packed fsp_s_config {
 	u8	pme_interrupt[6];
 	u8	unsupported_request_report[6];
 	u8	fatal_error_report[6];
+
+	/* 0x140 */
 	u8	no_fatal_error_report[6];
 	u8	correctable_error_report[6];
 	u8	system_error_on_fatal_error[6];
@@ -165,6 +196,8 @@ struct __packed fsp_s_config {
 	u8	pcie_rp_speed[6];
 	u8	physical_slot_number[6];
 	u8	pcie_rp_completion_timeout[6];
+
+	/* 0x170 */
 	u8	ptm_enable[6];
 	u8	pcie_rp_aspm[6];
 	u8	pcie_rp_l1_substates[6];
@@ -172,6 +205,8 @@ struct __packed fsp_s_config {
 	u8	pcie_rp_ltr_config_lock[6];
 	u8	pme_b0_s5_dis;
 	u8	pci_clock_run;
+
+	/* 0x190 */
 	u8	timer8254_clk_setting;
 	u8	enable_sata;
 	u8	sata_mode;
@@ -184,6 +219,8 @@ struct __packed fsp_s_config {
 	u8	sata_ports_dev_slp[2];
 	u8	sata_ports_hot_plug[2];
 	u8	sata_ports_interlock_sw[2];
+
+	/* 0x1a0 */
 	u8	sata_ports_external[2];
 	u8	sata_ports_spin_up[2];
 	u8	sata_ports_solid_state_drive[2];
@@ -191,6 +228,8 @@ struct __packed fsp_s_config {
 	u8	sata_ports_dm_val[2];
 	u8	unused_upd_space3[2];
 	u16	sata_ports_dito_val[2];
+
+	/* 0x1b0 */
 	u16	sub_system_vendor_id;
 	u16	sub_system_id;
 	u8	crid_settings;
@@ -205,6 +244,8 @@ struct __packed fsp_s_config {
 	u8	sirq_mode;
 	u8	start_frame_pulse;
 	u8	smbus_enable;
+
+	/* 0x1c0 */
 	u8	arp_enable;
 	u8	unused_upd_space4;
 	u16	num_rsvd_smbus_addresses;
@@ -214,10 +255,14 @@ struct __packed fsp_s_config {
 	u8	usb30_mode;
 	u8	unused_upd_space5[1];
 	u8	port_usb20_enable[8];
+
+	/* 0x250 */
 	u8	port_us20b_over_current_pin[8];
 	u8	usb_otg;
 	u8	hsic_support_enable;
 	u8	port_usb30_enable[6];
+
+	/* 0x260 */
 	u8	port_us30b_over_current_pin[6];
 	u8	ssic_port_enable[2];
 	u16	dlane_pwr_gating;
@@ -226,9 +271,13 @@ struct __packed fsp_s_config {
 	u16	reset_wait_timer;
 	u8	rtc_lock;
 	u8	sata_test_mode;
+
+	/* 0x270 */
 	u8	ssic_rate[2];
 	u16	dynamic_power_gating;
 	u16	pcie_rp_ltr_max_snoop_latency[6];
+
+	/* 0x280 */
 	u8	pcie_rp_snoop_latency_override_mode[6];
 	u8	unused_upd_space6[2];
 	u16	pcie_rp_snoop_latency_override_value[6];
@@ -239,45 +288,69 @@ struct __packed fsp_s_config {
 	u8	pcie_rp_non_snoop_latency_override_mode[6];
 	u8	tco_timer_halt_lock;
 	u8	pwr_btn_override_period;
+
+	/* 0x2b0 */
 	u16	pcie_rp_non_snoop_latency_override_value[6];
 	u8	pcie_rp_non_snoop_latency_override_multiplier[6];
 	u8	pcie_rp_slot_power_limit_scale[6];
 	u8	pcie_rp_slot_power_limit_value[6];
 	u8	disable_native_power_button;
 	u8	power_butter_debounce_mode;
+
+	/* 0x2d0 */
 	u32	sdio_tx_cmd_cntl;
 	u32	sdio_tx_data_cntl1;
 	u32	sdio_tx_data_cntl2;
 	u32	sdio_rx_cmd_data_cntl1;
+
+	/* 0x2e0 */
 	u32	sdio_rx_cmd_data_cntl2;
 	u32	sdcard_tx_cmd_cntl;
 	u32	sdcard_tx_data_cntl1;
 	u32	sdcard_tx_data_cntl2;
+
+	/* 0x2f0 */
 	u32	sdcard_rx_cmd_data_cntl1;
 	u32	sdcard_rx_strobe_cntl;
 	u32	sdcard_rx_cmd_data_cntl2;
 	u32	emmc_tx_cmd_cntl;
+
+	/* 0x300 */
 	u32	emmc_tx_data_cntl1;
 	u32	emmc_tx_data_cntl2;
 	u32	emmc_rx_cmd_data_cntl1;
 	u32	emmc_rx_strobe_cntl;
+
+	/* 0x310 */
 	u32	emmc_rx_cmd_data_cntl2;
 	u32	emmc_master_sw_cntl;
 	u8	pcie_rp_selectable_deemphasis[6];
 	u8	monitor_mwait_enable;
 	u8	hd_audio_dsp_uaa_compliance;
+
+	/* 0x320 */
 	u32	ipc[4];
+
+	/* 0x330 */
 	u8	sata_ports_disable_dynamic_pg[2];
 	u8	init_s3_cpu;
 	u8	skip_punit_init;
 	u8	unused_upd_space7[4];
 	u8	port_usb20_per_port_tx_pe_half[8];
+
+	/* 0x340 */
 	u8	port_usb20_per_port_pe_txi_set[8];
 	u8	port_usb20_per_port_txi_set[8];
+
+	/* 0x350 */
 	u8	port_usb20_hs_skew_sel[8];
 	u8	port_usb20_i_usb_tx_emphasis_en[8];
+
+	/* 0x360 */
 	u8	port_usb20_per_port_rxi_set[8];
 	u8	port_usb20_hs_npre_drv_sel[8];
+
+	/* 0x370 */
 	u8	reserved_fsps_upd[16];
 };
 
@@ -288,5 +361,206 @@ struct __packed fsps_upd {
 	u8 unused_upd_space2[46];
 	u16 upd_terminator;
 };
+#endif
+
+#define PROC_TRACE_MEM_SIZE_DISABLE 0xff
+
+#define BOOT_P_STATE_HFM 0
+#define BOOT_P_STATE_LFM 1
+
+#define PKG_C_STATE_LIMIT_C0_C1 0
+#define PKG_C_STATE_LIMIT_C2 1
+#define PKG_C_STATE_LIMIT_C3 2
+#define PKG_C_STATE_LIMIT_C6 3
+#define PKG_C_STATE_LIMIT_C7 4
+#define PKG_C_STATE_LIMIT_C7S 5
+#define PKG_C_STATE_LIMIT_C8 6
+#define PKG_C_STATE_LIMIT_C9 7
+#define PKG_C_STATE_LIMIT_C10 8
+#define PKG_C_STATE_LIMIT_CMAX 9
+#define PKG_C_STATE_LIMIT_CPU_DEFAULT 254
+#define PKG_C_STATE_LIMIT_AUTO 255
+
+#define C_STATE_AUTO_DEMOTION_DISABLE_C1_C3 0
+#define C_STATE_AUTO_DEMOTION_ENABLE_C3_C6_C7_TO_C1 1
+#define C_STATE_AUTO_DEMOTION_ENABLE_C6_C7_TO_C3 2
+#define C_STATE_AUTO_DEMOTION_ENABLE_C6_C7_TO_C1_C3 3
+
+#define C_STATE_UN_DEMOTION_DISABLE_C1_C3 0
+#define C_STATE_UN_DEMOTION_ENABLE_C1 1
+#define C_STATE_UN_DEMOTION_ENABLE_C3 2
+#define C_STATE_UN_DEMOTION_ENABLE_C1_C3 3
+
+#define MAX_CORE_C_STATE_UNLIMITED 0
+#define MAX_CORE_C_STATE_C1 1
+#define MAX_CORE_C_STATE_C3 2
+#define MAX_CORE_C_STATE_C6 3
+#define MAX_CORE_C_STATE_C7 4
+#define MAX_CORE_C_STATE_C8 5
+#define MAX_CORE_C_STATE_C9 6
+#define MAX_CORE_C_STATE_C10 7
+#define MAX_CORE_C_STATE_CCX 8
+
+#define IPU_ACPI_MODE_DISABLE 0
+#define IPU_ACPI_MODE_IGFX_CHILD_DEVICE 1
+#define IPU_ACPI_MODE_ACPI_DEVICE 1
+
+#define CD_CLOCK_FREQ_144MHZ 0
+#define CD_CLOCK_FREQ_288MHZ 1
+#define CD_CLOCK_FREQ_384MHZ 2
+#define CD_CLOCK_FREQ_576MHZ 3
+#define CD_CLOCK_FREQ_624MHZ 4
+
+#define HDA_IO_BUFFER_OWNERSHIP_HDA_ALL_IO 0
+#define HDA_IO_BUFFER_OWNERSHIP_HDA_I2S_SPLIT 1
+#define HDA_IO_BUFFER_OWNERSHIP_I2S_ALL_IO 2
+
+#define HDA_IO_BUFFER_VOLTAGE_3V3 0
+#define HDA_IO_BUFFER_VOLTAGE_1V8 1
+
+#define HDA_VC_TYPE_VC0 0
+#define HDA_VC_TYPE_VC1 1
+
+#define HDA_LINK_FREQ_6MHZ 0
+#define HDA_LINK_FREQ_12MHZ 1
+#define HDA_LINK_FREQ_24MHZ 2
+#define HDA_LINK_FREQ_48MHZ 3
+#define HDA_LINK_FREQ_96MHZ 4
+#define HDA_LINK_FREQ_INVALID 5
+
+#define HDA_I_DISP_LINK_FREQ_6MHZ 0
+#define HDA_I_DISP_LINK_FREQ_12MHZ 1
+#define HDA_I_DISP_LINK_FREQ_24MHZ 2
+#define HDA_I_DISP_LINK_FREQ_48MHZ 3
+#define HDA_I_DISP_LINK_FREQ_96MHZ 4
+#define HDA_I_DISP_LINK_FREQ_INVALID 5
+
+#define HDA_I_DISP_LINK_T_MODE_2T 0
+#define HDA_I_DISP_LINK_T_MODE_1T 1
+
+#define HDA_DISP_DMIC_DISABLE 0
+#define HDA_DISP_DMIC_2CH_ARRAY 1
+#define HDA_DISP_DMIC_4CH_ARRAY 2
+
+#define HDA_CSE_MEM_TRANSFERS_VC0 0
+#define HDA_CSE_MEM_TRANSFERS_VC2 1
+
+#define HDA_HOST_MEM_TRANSFERS_VC0 0
+#define HDA_HOST_MEM_TRANSFERS_VC2 1
+
+#define HDA_DSP_FEATURE_MASK_WOV 0x1
+#define HDA_DSP_FEATURE_MASK_BT_SIDEBAND 0x2
+#define HDA_DSP_FEATURE_MASK_CODEC_VAD 0x4
+#define HDA_DSP_FEATURE_MASK_BT_INTEL_HFP 0x20
+#define HDA_DSP_FEATURE_MASK_BT_INTEL_A2DP 0x40
+#define HDA_DSP_FEATURE_MASK_DSP_BASED_PRE_PROC_DISABLE 0x80
+
+#define HDA_DSP_PP_MODULE_MASK_WOV 0x1
+#define HDA_DSP_PP_MODULE_MASK_BT_SIDEBAND 0x2
+#define HDA_DSP_PP_MODULE_MASK_CODEC_VAD 0x4
+#define HDA_DSP_PP_MODULE_MASK_BT_INTEL_HFP 0x20
+#define HDA_DSP_PP_MODULE_MASK_BT_INTEL_A2DP 0x40
+#define HDA_DSP_PP_MODULE_MASK_DSP_BASED_PRE_PROC_DISABLE 0x80
+
+#define I2CX_ENABLE_DISABLED 0
+#define I2CX_ENABLE_PCI_MODE 1
+#define I2CX_ENABLE_ACPI_MODE 2
+
+#define HSUARTX_ENABLE_DISABLED 0
+#define HSUARTX_ENABLE_PCI_MODE 1
+#define HSUARTX_ENABLE_ACPI_MODE 2
+
+#define SPIX_ENABLE_DISABLED 0
+#define SPIX_ENABLE_PCI_MODE 1
+#define SPIX_ENABLE_ACPI_MODE 2
+
+#define PCIE_RP_SPEED_AUTO 0
+#define PCIE_RP_SPEED_GEN1 1
+#define PCIE_RP_SPEED_GEN2 2
+#define PCIE_RP_SPEED_GEN3 3
+
+#define PCIE_RP_ASPM_DISABLE 0
+#define PCIE_RP_ASPM_L0S 1
+#define PCIE_RP_ASPM_L1 2
+#define PCIE_RP_ASPM_L0S_L1 3
+#define PCIE_RP_ASPM_AUTO 4
+
+#define PCIE_RP_L1_SUBSTATES_DISABLE 0
+#define PCIE_RP_L1_SUBSTATES_L1_1 1
+#define PCIE_RP_L1_SUBSTATES_L1_2 2
+#define PCIE_RP_L1_SUBSTATES_L1_1_L1_2 3
+
+#define SATA_MODE_AHCI 0
+#define SATA_MODE_RAID 1
+
+#define SATA_SPEED_LIMIT_SC_SATA_SPEED 0
+#define SATA_SPEED_LIMIT_1_5GBS 1
+#define SATA_SPEED_LIMIT_3GBS 2
+#define SATA_SPEED_LIMIT_6GBS 3
+
+#define SATA_PORT_SOLID_STATE_DRIVE_HARD_DISK_DRIVE 0
+#define SATA_PORT_SOLID_STATE_DRIVE_SOLID_STATE_DRIVE 1
+
+#define CRID_SETTING_DISABLE 0
+#define CRID_SETTING_CRID_1 1
+#define CRID_SETTING_CRID_2 2
+#define CRID_SETTING_CRID_3 3
+
+#define RESET_SELECT_WARM_RESET 0x6
+#define RESET_SELECT_COLD_RESET 0xe
+
+#define EMMC_HOST_SPEED_MAX_HS400 0
+#define EMMC_HOST_SPEED_MAX_HS200 1
+#define EMMC_HOST_SPEED_MAX_DDR50 2
+
+#define SERIAL_IRQ_MODE_QUIET_MODE 0
+#define SERIAL_IRQ_MODE_CONTINUOUS_MODE 1
+
+#define START_FRAME_PULSE_WIDTH_SCSFPW4CLK 0
+#define START_FRAME_PULSE_WIDTH_SCSFPW6CLK 1
+#define START_FRAME_PULSE_WIDTH_SCSFPW8CLK 1
+
+#define USB30_MODE_DISABLE 0
+#define USB30_MODE_ENABLE 1
+#define USB30_MODE_AUTO 2
+
+#define USB_OTG_DISABLE 0
+#define USB_OTG_PCI_MODE 1
+#define USB_OTG_ACPI_MODE 2
+
+#define SSIC_RATE_A_SERIES 1
+#define SSIC_RATE_B_SERIES 2
+
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MODE_DISABLE 0
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MODE_ENABLE 1
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MODE_AUTO 2
+
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1NS 0
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_32NS 1
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1024NS 2
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_32768NS 3
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1048576NS 4
+#define PCIE_RP_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_33554432NS 5
+
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MODE_DISABLE 0
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MODE_ENABLE 1
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MODE_AUTO 2
+
+#define PWR_BTN_OVERRIDE_PERIOD_4S 0
+#define PWR_BTN_OVERRIDE_PERIOD_6S 1
+#define PWR_BTN_OVERRIDE_PERIOD_8S 2
+#define PWR_BTN_OVERRIDE_PERIOD_10S 3
+#define PWR_BTN_OVERRIDE_PERIOD_12S 4
+#define PWR_BTN_OVERRIDE_PERIOD_14S 5
+
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1NS 0
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_32NS 1
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1024NS 2
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_32768NS 3
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_1048576NS 4
+#define PCIE_RP_NON_SNOOP_LATENCY_OVERRIDE_MULTIPLIER_33554432NS 5
+
+#define PCIE_RP_SELECTABLE_DEEMPHASIS_6_DB 0
+#define PCIE_RP_SELECTABLE_DEEMPHASIS_3_5_DB 1
 
 #endif
diff --git a/arch/x86/include/asm/arch-apollolake/fsp_bindings.h b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h
new file mode 100644
index 0000000000..b4939519ce
--- /dev/null
+++ b/arch/x86/include/asm/arch-apollolake/fsp_bindings.h
@@ -0,0 +1,110 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ * Copyright 2020 B&R Industrial Automation GmbH - http://www.br-automation.com
+ */
+
+#ifndef __ASM_ARCH_FSP_BINDINGS_H
+#define __ASM_ARCH_FSP_BINDINGS_H
+
+#include <asm/arch/fsp/fsp_m_upd.h>
+#include <asm/arch/fsp/fsp_s_upd.h>
+
+#define ARRAY_SIZE_OF_MEMBER(s, m) (ARRAY_SIZE((((s *)0)->m)))
+#define SIZE_OF_MEMBER(s, m) (sizeof((((s *)0)->m)))
+
+enum conf_type {
+	FSP_UINT8,
+	FSP_UINT16,
+	FSP_UINT32,
+	FSP_STRING,
+	FSP_LPDDR4_SWIZZLE,
+};
+
+/**
+ * struct fsp_binding - Binding describing devicetree/FSP relationships
+ * @offset:   Offset within the FSP config structure
+ * @propname: Name of property to read
+ * @type:     Type of the property to read
+ * @count:    If the property is expected to be an array, this is the
+ *            number of expected elements
+ *            Set to 0 if the property is expected to be a scalar
+ *
+ * The struct fsp_binding is used to describe the relationship between
+ * values stored in devicetree and where they are placed in the FSP
+ * configuration structure.
+ */
+struct fsp_binding {
+	size_t offset;
+	char *propname;
+	enum conf_type type;
+	size_t count;
+};
+
+/*
+ * LPDDR4 helper routines for configuring the memory UPD for LPDDR4 operation.
+ * There are four physical LPDDR4 channels, each 32-bits wide. There are two
+ * logical channels using two physical channels together to form a 64-bit
+ * interface to memory for each logical channel.
+ */
+
+enum {
+	LP4_PHYS_CH0A,
+	LP4_PHYS_CH0B,
+	LP4_PHYS_CH1A,
+	LP4_PHYS_CH1B,
+
+	LP4_NUM_PHYS_CHANNELS,
+};
+
+/*
+ * The DQs within a physical channel can be bit-swizzled within each byte.
+ * Within a channel the bytes can be swapped, but the DQs need to be routed
+ * with the corresponding DQS (strobe).
+ */
+enum {
+	LP4_DQS0,
+	LP4_DQS1,
+	LP4_DQS2,
+	LP4_DQS3,
+
+	LP4_NUM_BYTE_LANES,
+	DQ_BITS_PER_DQS		= 8,
+};
+
+/* Provide bit swizzling per DQS and byte swapping within a channel */
+struct lpddr4_chan_swizzle_cfg {
+	u8 dqs[LP4_NUM_BYTE_LANES][DQ_BITS_PER_DQS];
+};
+
+struct lpddr4_swizzle_cfg {
+	struct lpddr4_chan_swizzle_cfg phys[LP4_NUM_PHYS_CHANNELS];
+};
+
+/**
+ * fsp_m_update_config_from_dtb() - Read FSP-M config from devicetree node
+ * @node: Valid node reference to read property from
+ * @cfg:  Pointer to FSP-M config structure
+ * @return 0 on success, -ve on error
+ *
+ * This function reads the configuration for FSP-M from the provided
+ * devicetree node and saves it in the FSP-M configuration structure.
+ * Configuration options that are not present in the devicetree are
+ * left at their current value.
+ */
+int fsp_m_update_config_from_dtb(ofnode node, struct fsp_m_config *cfg);
+
+/**
+ * fsp_s_update_config_from_dtb() - Read FSP-S config from devicetree node
+ * @node: Valid node reference to read property from
+ * @cfg:  Pointer to FSP-S config structure
+ * @return 0 on success, -ve on error
+ *
+ * This function reads the configuration for FSP-S from the provided
+ * devicetree node and saves it in the FSP-S configuration structure.
+ * Configuration options that are not present in the devicetree are
+ * left at their current value.
+ */
+int fsp_s_update_config_from_dtb(ofnode node, struct fsp_s_config *cfg);
+
+#endif
diff --git a/arch/x86/include/asm/arch-apollolake/lpc.h b/arch/x86/include/asm/arch-apollolake/lpc.h
index 5d2adad319..977b7eccd8 100644
--- a/arch/x86/include/asm/arch-apollolake/lpc.h
+++ b/arch/x86/include/asm/arch-apollolake/lpc.h
@@ -7,6 +7,7 @@
 #ifndef _ASM_ARCH_LPC_H
 #define _ASM_ARCH_LPC_H
 
+#include <linux/bitops.h>
 #define LPC_SERIRQ_CTL			0x64
 #define  LPC_SCNT_EN			BIT(7)
 #define  LPC_SCNT_MODE			BIT(6)
diff --git a/arch/x86/include/asm/arch-apollolake/systemagent.h b/arch/x86/include/asm/arch-apollolake/systemagent.h
index 206d8903fa..9e7bd62751 100644
--- a/arch/x86/include/asm/arch-apollolake/systemagent.h
+++ b/arch/x86/include/asm/arch-apollolake/systemagent.h
@@ -8,6 +8,7 @@
 #define _ASM_ARCH_SYSTEMAGENT_H
 
 /* Device 0:0.0 PCI configuration space */
+#include <linux/bitops.h>
 #define MCHBAR		0x48
 
 /* RAPL Package Power Limit register under MCHBAR */
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
index 08b2f53132..69455d90da 100644
--- a/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
+++ b/arch/x86/include/asm/arch-baytrail/acpi/lpc.asl
@@ -136,20 +136,20 @@ Device (LPCB)
 			Store(0, C1EN)
 		}
 
-		Method(_CRS, 0, Serialized)
+		Name(BUF0, ResourceTemplate()
 		{
-			Name(BUF0, ResourceTemplate()
-			{
-				IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
-				IRQNoFlags() { 3 }
-			})
-
-			Name(BUF1, ResourceTemplate()
-			{
-				IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
-				IRQNoFlags() { 4 }
-			})
+			IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
+			IRQNoFlags() { 3 }
+		})
 
+		Name(BUF1, ResourceTemplate()
+		{
+			IO(Decode16, 0x03f8, 0x03f8, 0x01, 0x08)
+			IRQNoFlags() { 4 }
+		})
+
+		Method(_CRS, 0, Serialized)
+		{
 			If (LLessEqual(SRID, 0x04)) {
 				Return (BUF0)
 			} Else {
diff --git a/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl b/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
index 2a1c31cdc4..3b220c7ac2 100644
--- a/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-baytrail/acpi/southcluster.asl
@@ -11,7 +11,7 @@ Device (PCI0)
 	Name(_HID, EISAID("PNP0A08"))	/* PCIe */
 	Name(_CID, EISAID("PNP0A03"))	/* PCI */
 
-	Name(_ADR, 0)
+	Name(_UID, 0)
 	Name(_BBN, 0)
 
 	Name(MCRS, ResourceTemplate()
diff --git a/arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h
index a3bde3d8e7..f2260ae90e 100644
--- a/arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h
+++ b/arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h
@@ -7,6 +7,8 @@
 #ifndef __FSP_VPD_H__
 #define __FSP_VPD_H__
 
+#include <stddef.h>
+
 struct __packed memory_upd {
 	u64 signature;				/* Offset 0x0020 */
 	u8 revision;				/* Offset 0x0028 */
diff --git a/arch/x86/include/asm/arch-broadwell/adsp.h b/arch/x86/include/asm/arch-broadwell/adsp.h
index eb825ce1c0..a5a1f73bf4 100644
--- a/arch/x86/include/asm/arch-broadwell/adsp.h
+++ b/arch/x86/include/asm/arch-broadwell/adsp.h
@@ -10,6 +10,7 @@
 #ifndef __ASM_ARCH_BROADWELL_ADSP_H
 #define __ASM_ARCH_BROADWELL_ADSP_H
 
+#include <linux/bitops.h>
 #define ADSP_PCI_IRQ			23
 #define ADSP_ACPI_IRQ			3
 #define  ADSP_ACPI_IRQEN		BIT(3)
diff --git a/arch/x86/include/asm/arch-broadwell/serialio.h b/arch/x86/include/asm/arch-broadwell/serialio.h
index 5e98eaf53f..ff09278b96 100644
--- a/arch/x86/include/asm/arch-broadwell/serialio.h
+++ b/arch/x86/include/asm/arch-broadwell/serialio.h
@@ -9,6 +9,7 @@
 #define __ARCH_BROADWELL_SERIALIO_H_
 
 /* Serial IO IOBP Registers */
+#include <linux/bitops.h>
 #define SIO_IOBP_PORTCTRL0	0xcb000000	/* SDIO D23:F0 */
 #define  SIO_IOBP_PORTCTRL0_ACPI_IRQ_EN		BIT(5)
 #define  SIO_IOBP_PORTCTRL0_PCI_CONF_DIS	BIT(4)
diff --git a/arch/x86/include/asm/arch-coreboot/sysinfo.h b/arch/x86/include/asm/arch-coreboot/sysinfo.h
index dd8d1cba92..419ec52933 100644
--- a/arch/x86/include/asm/arch-coreboot/sysinfo.h
+++ b/arch/x86/include/asm/arch-coreboot/sysinfo.h
@@ -49,6 +49,8 @@ struct sysinfo_t {
 	u32	vdat_size;
 	void	*tstamp_table;
 	void	*cbmem_cons;
+	u64 smbios_start;
+	u32 smbios_size;
 
 	struct cb_serial *serial;
 };
diff --git a/arch/x86/include/asm/arch-quark/acpi/southcluster.asl b/arch/x86/include/asm/arch-quark/acpi/southcluster.asl
index fe9edc1a87..384dab25bd 100644
--- a/arch/x86/include/asm/arch-quark/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-quark/acpi/southcluster.asl
@@ -8,7 +8,7 @@ Device (PCI0)
 	Name(_HID, EISAID("PNP0A08"))	/* PCIe */
 	Name(_CID, EISAID("PNP0A03"))	/* PCI */
 
-	Name(_ADR, 0)
+	Name(_UID, 0)
 	Name(_BBN, 0)
 
 	Name(MCRS, ResourceTemplate()
diff --git a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
index f088fe3cf5..df66625930 100644
--- a/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
+++ b/arch/x86/include/asm/arch-tangier/acpi/southcluster.asl
@@ -10,7 +10,7 @@ Device (PCI0)
     Name (_HID, EISAID("PNP0A08"))    /* PCIe */
     Name (_CID, EISAID("PNP0A03"))    /* PCI */
 
-    Name (_ADR, Zero)
+    Name (_UID, Zero)
     Name (_BBN, Zero)
 
     Name (MCRS, ResourceTemplate()
@@ -338,12 +338,12 @@ Device (PCI0)
         {
             Name (_ADR, Zero)
 
+            Name (PCKG, Package () {
+                Buffer (0x14) {}
+            })
+
             /* GPLD: Generate Port Location Data (PLD) */
             Method (GPLD, 1, Serialized) {
-                Name (PCKG, Package () {
-                    Buffer (0x14) {}
-                })
-
                 /* REV: Revision 0x02 for ACPI 5.0 */
                 CreateField (DerefOf (Index (PCKG, Zero)), Zero, 0x07, REV)
                 Store (0x0002, REV)
@@ -401,20 +401,21 @@ Device (PCI0)
                 Return (STA_VISIBLE)
             }
 
+            Name (RBUF, ResourceTemplate()
+            {
+                UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne,
+                    0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
+                    0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
+                GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0,
+                    "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
+                GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
+                    "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
+                GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
+                    "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
+            })
+
             Method (_CRS, 0, Serialized)
             {
-                Name (RBUF, ResourceTemplate()
-                {
-                    UartSerialBus(0x0001C200, DataBitsEight, StopBitsOne,
-                        0xFC, LittleEndian, ParityTypeNone, FlowControlHardware,
-                        0x20, 0x20, "\\_SB.PCI0.HSU0", 0, ResourceConsumer, , )
-                    GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0,
-                        "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 185 }
-                    GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
-                        "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 184 }
-                    GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly,
-                        "\\_SB.PCI0.GPIO", 0, ResourceConsumer, , ) { 71 }
-                })
                 Return (RBUF)
             }
 
@@ -440,7 +441,6 @@ Device (PCI0)
 
         Device (PMIC)
         {
-            Name (_ADR, Zero)
             Name (_HID, "INTC100E")
             Name (_CID, "INTC100E")
             Name (_DDN, "Basin Cove PMIC")
@@ -454,33 +454,34 @@ Device (PCI0)
                 Return (STA_VISIBLE)
             }
 
+            Name (RBUF, ResourceTemplate()
+            {
+                /*
+                 * Shadow registers in SRAM for PMIC:
+                 *   SRAM    PMIC register
+                 *   --------------------
+                 *   0x00-    Unknown
+                 *   0x03    THRMIRQ (0x04)
+                 *   0x04    BCUIRQ (0x05)
+                 *   0x05    ADCIRQ (0x06)
+                 *   0x06    CHGRIRQ0 (0x07)
+                 *   0x07    CHGRIRQ1 (0x08)
+                 *   0x08-    Unknown
+                 *   0x0a    PBSTATUS (0x27)
+                 *   0x0b-    Unknown
+                 */
+                Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
+            })
+
             Method (_CRS, 0, Serialized)
             {
-                Name (RBUF, ResourceTemplate()
-                {
-                    /*
-                     * Shadow registers in SRAM for PMIC:
-                     *   SRAM    PMIC register
-                     *   --------------------
-                     *   0x00-    Unknown
-                     *   0x03    THRMIRQ (0x04)
-                     *   0x04    BCUIRQ (0x05)
-                     *   0x05    ADCIRQ (0x06)
-                     *   0x06    CHGRIRQ0 (0x07)
-                     *   0x07    CHGRIRQ1 (0x08)
-                     *   0x08-    Unknown
-                     *   0x0a    PBSTATUS (0x27)
-                     *   0x0b-    Unknown
-                     */
-                    Memory32Fixed(ReadWrite, 0xFFFFF610, 0x00000010)
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 30 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 23 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 52 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 51 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 50 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 27 }
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 49 }
-                })
                 Return (RBUF)
             }
 
@@ -519,7 +520,6 @@ Device (PCI0)
     Device (GDMA)
     {
         Name (_ADR, 0x00150000)
-        Name (_HID, "808611A2")
         Name (_UID, Zero)
 
         Method (_STA, 0, NotSerialized)
@@ -527,13 +527,14 @@ Device (PCI0)
             Return (STA_VISIBLE)
         }
 
+        Name (RBUF, ResourceTemplate ()
+        {
+                Memory32Fixed(ReadWrite, 0xFF192000, 0x00001000)
+                Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 32 }
+        })
+
         Method (_CRS, 0, Serialized)
         {
-            Name (RBUF, ResourceTemplate ()
-            {
-                    Memory32Fixed(ReadWrite, 0xFF192000, 0x00001000)
-                    Interrupt(ResourceConsumer, Level, ActiveHigh, Shared, ,, ) { 32 }
-            })
             Return (RBUF)
         }
     }
diff --git a/arch/x86/include/asm/atomic.h b/arch/x86/include/asm/atomic.h
index 806f787381..4ca0f79bff 100644
--- a/arch/x86/include/asm/atomic.h
+++ b/arch/x86/include/asm/atomic.h
@@ -1,6 +1,7 @@
 #ifndef _ASM_X86_ATOMIC_H
 #define _ASM_X86_ATOMIC_H
 
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <asm/processor.h>
diff --git a/arch/x86/include/asm/coreboot_tables.h b/arch/x86/include/asm/coreboot_tables.h
index 61de0077d7..7e1576768b 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -214,6 +214,17 @@ struct cb_vbnv {
 	uint32_t vbnv_size;
 };
 
+#define CB_TAG_CBMEM_ENTRY 0x0031
+#define CBMEM_ID_SMBIOS    0x534d4254
+
+struct cb_cbmem_entry {
+	uint32_t tag;
+	uint32_t size;
+	uint64_t address;
+	uint32_t entry_size;
+	uint32_t id;
+};
+
 #define CB_TAG_CMOS_OPTION_TABLE	0x00c8
 
 struct cb_cmos_option_table {
@@ -343,4 +354,11 @@ void *high_table_malloc(size_t bytes);
  */
 void write_coreboot_table(u32 addr, struct memory_area *cfg_tables);
 
+/**
+ * locate_coreboot_table() - Try to find coreboot tables at standard locations
+ *
+ * @return address of table that was found, or -ve error number
+ */
+long locate_coreboot_table(void);
+
 #endif
diff --git a/arch/x86/include/asm/fast_spi.h b/arch/x86/include/asm/fast_spi.h
index 6894298526..7a81d4f05c 100644
--- a/arch/x86/include/asm/fast_spi.h
+++ b/arch/x86/include/asm/fast_spi.h
@@ -7,6 +7,7 @@
 #define ASM_FAST_SPI_H
 
 /* Register offsets from the MMIO region base (PCI_BASE_ADDRESS_0) */
+#include <linux/bitops.h>
 struct fast_spi_regs {
 	u32 bfp;
 	u32 hsfsts_ctl;
@@ -63,6 +64,25 @@ check_member(fast_spi_regs, ptdata, 0xd0);
 int fast_spi_get_bios_mmap(pci_dev_t pdev, ulong *map_basep, uint *map_sizep,
 			   uint *offsetp);
 
+/**
+ * fast_spi_get_bios_mmap_regs() - Get memory map for SPI flash given regs
+ *
+ * @regs:	SPI registers to use
+ * @map_basep:	Returns base memory address for mapped SPI
+ * @map_sizep:	Returns size of mapped SPI
+ * @offsetp:	Returns start offset of SPI flash where the map works
+ *	correctly (offsets before this are not visible)
+ * @return 0 (always)
+ */
+int fast_spi_get_bios_mmap_regs(struct fast_spi_regs *regs, ulong *map_basep,
+				uint *map_sizep, uint *offsetp);
+
+/**
+ * fast_spi_early_init() - Set up a BAR to use SPI early in U-Boot
+ *
+ * @pdev:	PCI device to use (this is the Fast SPI device)
+ * @mmio_base:	MMIO base to use to access registers
+ */
 int fast_spi_early_init(pci_dev_t pdev, ulong mmio_base);
 
 #endif	/* ASM_FAST_SPI_H */
diff --git a/arch/x86/include/asm/fsp/fsp_api.h b/arch/x86/include/asm/fsp/fsp_api.h
index e9ac86b2da..4941e2d74f 100644
--- a/arch/x86/include/asm/fsp/fsp_api.h
+++ b/arch/x86/include/asm/fsp/fsp_api.h
@@ -6,6 +6,8 @@
 #ifndef __ASM_FSP_API_H
 #define __ASM_FSP_API_H
 
+#include <linux/linkage.h>
+
 enum fsp_phase {
 	/* Notification code for post PCI enuermation */
 	INIT_PHASE_PCI	= 0x20,
diff --git a/arch/x86/include/asm/fsp/fsp_fv.h b/arch/x86/include/asm/fsp/fsp_fv.h
index 511dfb78b8..7492c87c34 100644
--- a/arch/x86/include/asm/fsp/fsp_fv.h
+++ b/arch/x86/include/asm/fsp/fsp_fv.h
@@ -7,6 +7,8 @@
 #ifndef __FSP_FV___
 #define __FSP_FV___
 
+#include <efi.h>
+
 /* Value of EFI_FV_FILE_ATTRIBUTES */
 #define EFI_FV_FILE_ATTR_ALIGNMENT	0x0000001F
 #define EFI_FV_FILE_ATTR_FIXED		0x00000100
diff --git a/arch/x86/include/asm/global_data.h b/arch/x86/include/asm/global_data.h
index f4c1839104..4aee2f3e8c 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -123,6 +123,7 @@ struct arch_global_data {
 #ifdef CONFIG_FSP_VERSION2
 	struct fsp_header *fsp_s_hdr;	/* Pointer to FSP-S header */
 #endif
+	ulong acpi_start;		/* Start address of ACPI tables */
 };
 
 #endif
diff --git a/arch/x86/include/asm/intel_pinctrl.h b/arch/x86/include/asm/intel_pinctrl.h
index 72fd9246cb..e2524b089d 100644
--- a/arch/x86/include/asm/intel_pinctrl.h
+++ b/arch/x86/include/asm/intel_pinctrl.h
@@ -10,6 +10,7 @@
 #define __ASM_INTEL_PINCTRL_H
 
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 
 /**
  * struct pad_config - config for a pad
diff --git a/arch/x86/include/asm/mp.h b/arch/x86/include/asm/mp.h
index fb59e2f67d..9dddf88b5a 100644
--- a/arch/x86/include/asm/mp.h
+++ b/arch/x86/include/asm/mp.h
@@ -9,6 +9,7 @@
 #define _X86_MP_H_
 
 #include <asm/atomic.h>
+#include <asm/cache.h>
 
 typedef int (*mp_callback_t)(struct udevice *cpu, void *arg);
 
diff --git a/arch/x86/include/asm/mrccache.h b/arch/x86/include/asm/mrccache.h
index d6b7529073..b60d1171f7 100644
--- a/arch/x86/include/asm/mrccache.h
+++ b/arch/x86/include/asm/mrccache.h
@@ -66,19 +66,12 @@ int mrccache_reserve(void);
  * mrccache_get_region() - get MRC region on the SPI flash
  *
  * This gets MRC region whose offset and size are described in the device tree
- * as a subnode to the SPI flash. If a non-NULL device pointer is supplied,
- * this also probes the SPI flash device and returns its device pointer for
- * the caller to use later.
- *
- * Be careful when calling this routine with a non-NULL device pointer:
- * - driver model initialization must be complete
- * - calling in the pre-relocation phase may bring some side effects during
- *   the SPI flash device probe (eg: for SPI controllers on a PCI bus, it
- *   triggers PCI bus enumeration during which insufficient memory issue
- *   might be exposed and it causes subsequent SPI flash probe fails).
+ * as a subnode to the SPI flash. This tries to find the SPI flash device
+ * (without probing it), falling back to looking for the devicetree node if
+ * driver model is not inited or the SPI flash is not found.
  *
  * @type:	Type of MRC data to use
- * @devp:	Returns pointer to the SPI flash device
+ * @devp:	Returns pointer to the SPI flash device, if found
  * @entry:	Position and size of MRC cache in SPI flash
  * @return 0 if success, -ENOENT if SPI flash node does not exist in the
  * device tree, -EPERM if MRC region subnode does not exist in the device
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 246c14f815..94e6b18e21 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -9,6 +9,10 @@
 #ifndef _ASM_X86_MSR_INDEX_H
 #define _ASM_X86_MSR_INDEX_H
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* CPU model specific register (MSR) numbers */
 
 /* x86-64 specific MSRs */
diff --git a/arch/x86/include/asm/mtrr.h b/arch/x86/include/asm/mtrr.h
index 672617256e..212a699c1b 100644
--- a/arch/x86/include/asm/mtrr.h
+++ b/arch/x86/include/asm/mtrr.h
@@ -57,7 +57,7 @@
 
 #define MTRR_FIX_TYPE(t)	((t << 24) | (t << 16) | (t << 8) | t)
 
-#if !defined(__ASSEMBLER__)
+#if !defined(__ASSEMBLY__)
 
 /**
  * Information about the previous MTRR state, set up by mtrr_open()
diff --git a/arch/x86/include/asm/sipi.h b/arch/x86/include/asm/sipi.h
index 1ab6c2874a..2483422528 100644
--- a/arch/x86/include/asm/sipi.h
+++ b/arch/x86/include/asm/sipi.h
@@ -10,7 +10,7 @@
 #define AP_DEFAULT_BASE 0x30000
 #define AP_DEFAULT_SIZE 0x10000
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 
 /**
  * struct sipi_params_16bit - 16-bit SIPI entry-point parameters
@@ -81,6 +81,6 @@ void ap_start(void);
 extern char sipi_params_16bit[];
 extern char sipi_params[];
 
-#endif /* __ASSEMBLER__ */
+#endif /* __ASSEMBLY__ */
 
 #endif
diff --git a/arch/x86/lib/acpi.c b/arch/x86/lib/acpi.c
index 7431458dcf..155fffabf0 100644
--- a/arch/x86/lib/acpi.c
+++ b/arch/x86/lib/acpi.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <acpi/acpi_table.h>
 #include <asm/io.h>
 #include <asm/tables.h>
diff --git a/arch/x86/lib/acpi_table.c b/arch/x86/lib/acpi_table.c
index 9346e165d8..6985ef4ba5 100644
--- a/arch/x86/lib/acpi_table.c
+++ b/arch/x86/lib/acpi_table.c
@@ -9,7 +9,9 @@
 #include <common.h>
 #include <cpu.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/uclass-internal.h>
+#include <mapmem.h>
 #include <serial.h>
 #include <version.h>
 #include <acpi/acpi_table.h>
@@ -19,6 +21,7 @@
 #include <asm/mpspec.h>
 #include <asm/tables.h>
 #include <asm/arch/global_nvs.h>
+#include <dm/acpi.h>
 
 /*
  * IASL compiles the dsdt entries and writes the hex values
@@ -29,139 +32,6 @@ extern const unsigned char AmlCode[];
 /* ACPI RSDP address to be used in boot parameters */
 static ulong acpi_rsdp_addr;
 
-static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
-			    struct acpi_xsdt *xsdt)
-{
-	memset(rsdp, 0, sizeof(struct acpi_rsdp));
-
-	memcpy(rsdp->signature, RSDP_SIG, 8);
-	memcpy(rsdp->oem_id, OEM_ID, 6);
-
-	rsdp->length = sizeof(struct acpi_rsdp);
-	rsdp->rsdt_address = (u32)rsdt;
-
-	/*
-	 * Revision: ACPI 1.0: 0, ACPI 2.0/3.0/4.0: 2
-	 *
-	 * Some OSes expect an XSDT to be present for RSD PTR revisions >= 2.
-	 * If we don't have an ACPI XSDT, force ACPI 1.0 (and thus RSD PTR
-	 * revision 0)
-	 */
-	if (xsdt == NULL) {
-		rsdp->revision = ACPI_RSDP_REV_ACPI_1_0;
-	} else {
-		rsdp->xsdt_address = (u64)(u32)xsdt;
-		rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
-	}
-
-	/* Calculate checksums */
-	rsdp->checksum = table_compute_checksum((void *)rsdp, 20);
-	rsdp->ext_checksum = table_compute_checksum((void *)rsdp,
-			sizeof(struct acpi_rsdp));
-}
-
-void acpi_fill_header(struct acpi_table_header *header, char *signature)
-{
-	memcpy(header->signature, signature, 4);
-	memcpy(header->oem_id, OEM_ID, 6);
-	memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
-	header->oem_revision = U_BOOT_BUILD_DATE;
-	memcpy(header->aslc_id, ASLC_ID, 4);
-}
-
-static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
-{
-	struct acpi_table_header *header = &(rsdt->header);
-
-	/* Fill out header fields */
-	acpi_fill_header(header, "RSDT");
-	header->length = sizeof(struct acpi_rsdt);
-	header->revision = 1;
-
-	/* Entries are filled in later, we come with an empty set */
-
-	/* Fix checksum */
-	header->checksum = table_compute_checksum((void *)rsdt,
-			sizeof(struct acpi_rsdt));
-}
-
-static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
-{
-	struct acpi_table_header *header = &(xsdt->header);
-
-	/* Fill out header fields */
-	acpi_fill_header(header, "XSDT");
-	header->length = sizeof(struct acpi_xsdt);
-	header->revision = 1;
-
-	/* Entries are filled in later, we come with an empty set */
-
-	/* Fix checksum */
-	header->checksum = table_compute_checksum((void *)xsdt,
-			sizeof(struct acpi_xsdt));
-}
-
-/**
- * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
- * and checksum.
- */
-static void acpi_add_table(struct acpi_rsdp *rsdp, void *table)
-{
-	int i, entries_num;
-	struct acpi_rsdt *rsdt;
-	struct acpi_xsdt *xsdt;
-
-	/* The RSDT is mandatory while the XSDT is not */
-	rsdt = (struct acpi_rsdt *)rsdp->rsdt_address;
-
-	/* This should always be MAX_ACPI_TABLES */
-	entries_num = ARRAY_SIZE(rsdt->entry);
-
-	for (i = 0; i < entries_num; i++) {
-		if (rsdt->entry[i] == 0)
-			break;
-	}
-
-	if (i >= entries_num) {
-		debug("ACPI: Error: too many tables\n");
-		return;
-	}
-
-	/* Add table to the RSDT */
-	rsdt->entry[i] = (u32)table;
-
-	/* Fix RSDT length or the kernel will assume invalid entries */
-	rsdt->header.length = sizeof(struct acpi_table_header) +
-				sizeof(u32) * (i + 1);
-
-	/* Re-calculate checksum */
-	rsdt->header.checksum = 0;
-	rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
-			rsdt->header.length);
-
-	/* The RSDT is mandatory while the XSDT is not */
-	if (!rsdp->xsdt_address)
-		return;
-
-	/*
-	 * And now the same thing for the XSDT. We use the same index as for
-	 * now we want the XSDT and RSDT to always be in sync in U-Boot
-	 */
-	xsdt = (struct acpi_xsdt *)((u32)rsdp->xsdt_address);
-
-	/* Add table to the XSDT */
-	xsdt->entry[i] = (u64)(u32)table;
-
-	/* Fix XSDT length */
-	xsdt->header.length = sizeof(struct acpi_table_header) +
-				sizeof(u64) * (i + 1);
-
-	/* Re-calculate checksum */
-	xsdt->header.checksum = 0;
-	xsdt->header.checksum = table_compute_checksum((u8 *)xsdt,
-			xsdt->header.length);
-}
-
 static void acpi_create_facs(struct acpi_facs *facs)
 {
 	memset((void *)facs, 0, sizeof(struct acpi_facs));
@@ -487,12 +357,9 @@ static void acpi_create_spcr(struct acpi_spcr *spcr)
 /*
  * QEMU's version of write_acpi_tables is defined in drivers/misc/qfw.c
  */
-ulong write_acpi_tables(ulong start)
+ulong write_acpi_tables(ulong start_addr)
 {
-	u32 current;
-	struct acpi_rsdp *rsdp;
-	struct acpi_rsdt *rsdt;
-	struct acpi_xsdt *xsdt;
+	struct acpi_ctx sctx, *ctx = &sctx;
 	struct acpi_facs *facs;
 	struct acpi_table_header *dsdt;
 	struct acpi_fadt *fadt;
@@ -500,60 +367,39 @@ ulong write_acpi_tables(ulong start)
 	struct acpi_madt *madt;
 	struct acpi_csrt *csrt;
 	struct acpi_spcr *spcr;
+	void *start;
+	ulong addr;
 	int i;
 
-	current = start;
+	start = map_sysmem(start_addr, 0);
 
-	/* Align ACPI tables to 16 byte */
-	current = ALIGN(current, 16);
+	debug("ACPI: Writing ACPI tables at %lx\n", start_addr);
 
-	debug("ACPI: Writing ACPI tables at %lx\n", start);
-
-	/* We need at least an RSDP and an RSDT Table */
-	rsdp = (struct acpi_rsdp *)current;
-	current += sizeof(struct acpi_rsdp);
-	current = ALIGN(current, 16);
-	rsdt = (struct acpi_rsdt *)current;
-	current += sizeof(struct acpi_rsdt);
-	current = ALIGN(current, 16);
-	xsdt = (struct acpi_xsdt *)current;
-	current += sizeof(struct acpi_xsdt);
-	/*
-	 * Per ACPI spec, the FACS table address must be aligned to a 64 byte
-	 * boundary (Windows checks this, but Linux does not).
-	 */
-	current = ALIGN(current, 64);
-
-	/* clear all table memory */
-	memset((void *)start, 0, current - start);
-
-	acpi_write_rsdp(rsdp, rsdt, xsdt);
-	acpi_write_rsdt(rsdt);
-	acpi_write_xsdt(xsdt);
+	acpi_setup_base_tables(ctx, start);
 
 	debug("ACPI:    * FACS\n");
-	facs = (struct acpi_facs *)current;
-	current += sizeof(struct acpi_facs);
-	current = ALIGN(current, 16);
+	facs = ctx->current;
+	acpi_inc_align(ctx, sizeof(struct acpi_facs));
 
 	acpi_create_facs(facs);
 
 	debug("ACPI:    * DSDT\n");
-	dsdt = (struct acpi_table_header *)current;
+	dsdt = ctx->current;
 	memcpy(dsdt, &AmlCode, sizeof(struct acpi_table_header));
-	current += sizeof(struct acpi_table_header);
-	memcpy((char *)current,
+	acpi_inc(ctx, sizeof(struct acpi_table_header));
+	memcpy(ctx->current,
 	       (char *)&AmlCode + sizeof(struct acpi_table_header),
 	       dsdt->length - sizeof(struct acpi_table_header));
-	current += dsdt->length - sizeof(struct acpi_table_header);
-	current = ALIGN(current, 16);
+	acpi_inc_align(ctx, dsdt->length - sizeof(struct acpi_table_header));
 
 	/* Pack GNVS into the ACPI table area */
 	for (i = 0; i < dsdt->length; i++) {
 		u32 *gnvs = (u32 *)((u32)dsdt + i);
 		if (*gnvs == ACPI_GNVS_ADDR) {
-			debug("Fix up global NVS in DSDT to 0x%08x\n", current);
-			*gnvs = current;
+			ulong addr = (ulong)map_to_sysmem(ctx->current);
+
+			debug("Fix up global NVS in DSDT to %#08lx\n", addr);
+			*gnvs = addr;
 			break;
 		}
 	}
@@ -563,51 +409,48 @@ ulong write_acpi_tables(ulong start)
 	dsdt->checksum = table_compute_checksum((void *)dsdt, dsdt->length);
 
 	/* Fill in platform-specific global NVS variables */
-	acpi_create_gnvs((struct acpi_global_nvs *)current);
-	current += sizeof(struct acpi_global_nvs);
-	current = ALIGN(current, 16);
+	acpi_create_gnvs(ctx->current);
+	acpi_inc_align(ctx, sizeof(struct acpi_global_nvs));
 
 	debug("ACPI:    * FADT\n");
-	fadt = (struct acpi_fadt *)current;
-	current += sizeof(struct acpi_fadt);
-	current = ALIGN(current, 16);
+	fadt = ctx->current;
+	acpi_inc_align(ctx, sizeof(struct acpi_fadt));
 	acpi_create_fadt(fadt, facs, dsdt);
-	acpi_add_table(rsdp, fadt);
+	acpi_add_table(ctx, fadt);
 
 	debug("ACPI:    * MADT\n");
-	madt = (struct acpi_madt *)current;
+	madt = ctx->current;
 	acpi_create_madt(madt);
-	current += madt->header.length;
-	acpi_add_table(rsdp, madt);
-	current = ALIGN(current, 16);
+	acpi_inc_align(ctx, madt->header.length);
+	acpi_add_table(ctx, madt);
 
 	debug("ACPI:    * MCFG\n");
-	mcfg = (struct acpi_mcfg *)current;
+	mcfg = ctx->current;
 	acpi_create_mcfg(mcfg);
-	current += mcfg->header.length;
-	acpi_add_table(rsdp, mcfg);
-	current = ALIGN(current, 16);
+	acpi_inc_align(ctx, mcfg->header.length);
+	acpi_add_table(ctx, mcfg);
 
 	debug("ACPI:    * CSRT\n");
-	csrt = (struct acpi_csrt *)current;
+	csrt = ctx->current;
 	acpi_create_csrt(csrt);
-	current += csrt->header.length;
-	acpi_add_table(rsdp, csrt);
-	current = ALIGN(current, 16);
+	acpi_inc_align(ctx, csrt->header.length);
+	acpi_add_table(ctx, csrt);
 
 	debug("ACPI:    * SPCR\n");
-	spcr = (struct acpi_spcr *)current;
+	spcr = ctx->current;
 	acpi_create_spcr(spcr);
-	current += spcr->header.length;
-	acpi_add_table(rsdp, spcr);
-	current = ALIGN(current, 16);
+	acpi_inc_align(ctx, spcr->header.length);
+	acpi_add_table(ctx, spcr);
+
+	acpi_write_dev_tables(ctx);
 
-	debug("current = %x\n", current);
+	addr = map_to_sysmem(ctx->current);
+	debug("current = %lx\n", addr);
 
-	acpi_rsdp_addr = (unsigned long)rsdp;
+	acpi_rsdp_addr = (unsigned long)ctx->rsdp;
 	debug("ACPI: done\n");
 
-	return current;
+	return addr;
 }
 
 ulong acpi_get_rsdp_addr(void)
diff --git a/arch/x86/lib/bios.c b/arch/x86/lib/bios.c
index 30c0997fd0..3ab432e262 100644
--- a/arch/x86/lib/bios.c
+++ b/arch/x86/lib/bios.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <bios_emul.h>
 #include <irq_func.h>
+#include <log.h>
 #include <vbe.h>
 #include <linux/linkage.h>
 #include <asm/cache.h>
diff --git a/arch/x86/lib/bios_interrupts.c b/arch/x86/lib/bios_interrupts.c
index fdd966b2c8..d6b4da7e25 100644
--- a/arch/x86/lib/bios_interrupts.c
+++ b/arch/x86/lib/bios_interrupts.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/pci.h>
 #include "bios_emul.h"
 
diff --git a/arch/x86/lib/bootm.c b/arch/x86/lib/bootm.c
index 07d8f1f279..acc15cf2e0 100644
--- a/arch/x86/lib/bootm.c
+++ b/arch/x86/lib/bootm.c
@@ -8,8 +8,10 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <hang.h>
+#include <log.h>
 #include <dm/device.h>
 #include <dm/root.h>
 #include <errno.h>
@@ -205,8 +207,8 @@ static int boot_jump_linux(bootm_headers_t *images)
 				 images->os.arch == IH_ARCH_X86_64);
 }
 
-int do_bootm_linux(int flag, int argc, char * const argv[],
-		bootm_headers_t *images)
+int do_bootm_linux(int flag, int argc, char *const argv[],
+		   bootm_headers_t *images)
 {
 	/* No need for those on x86 */
 	if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE)
diff --git a/arch/x86/lib/cmd_boot.c b/arch/x86/lib/cmd_boot.c
index 9fce021c79..baaf3d13ad 100644
--- a/arch/x86/lib/cmd_boot.c
+++ b/arch/x86/lib/cmd_boot.c
@@ -22,7 +22,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 unsigned long do_go_exec(ulong (*entry)(int, char * const []),
-			 int argc, char * const argv[])
+			 int argc, char *const argv[])
 {
 	unsigned long ret = 0;
 	char **argv_tmp;
diff --git a/arch/x86/lib/coreboot_table.c b/arch/x86/lib/coreboot_table.c
index c996fc588d..331c1b7e5a 100644
--- a/arch/x86/lib/coreboot_table.c
+++ b/arch/x86/lib/coreboot_table.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <net.h>
 #include <vbe.h>
 #include <acpi/acpi_s3.h>
 #include <asm/coreboot_tables.h>
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 26da4d2f27..1f20c5c8c6 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -41,7 +41,7 @@ void efi_add_known_memory(void)
 {
 	struct e820_entry e820[E820MAX];
 	unsigned int i, num;
-	u64 start, pages, ram_top;
+	u64 start, ram_top;
 	int type;
 
 	num = install_e820_map(ARRAY_SIZE(e820), e820);
@@ -77,9 +77,7 @@ void efi_add_known_memory(void)
 							start + e820[i].size,
 							ram_top);
 		} else {
-			pages = ALIGN(e820[i].size, EFI_PAGE_SIZE)
-				>> EFI_PAGE_SHIFT;
-			efi_add_memory_map(start, pages, type, false);
+			efi_add_memory_map(start, e820[i].size, type);
 		}
 	}
 }
diff --git a/arch/x86/lib/fsp/fsp_common.c b/arch/x86/lib/fsp/fsp_common.c
index 267527eb34..cf32b3e512 100644
--- a/arch/x86/lib/fsp/fsp_common.c
+++ b/arch/x86/lib/fsp/fsp_common.c
@@ -7,6 +7,8 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <rtc.h>
 #include <acpi/acpi_s3.h>
 #include <asm/cmos_layout.h>
diff --git a/arch/x86/lib/fsp/fsp_dram.c b/arch/x86/lib/fsp/fsp_dram.c
index 9ce0ddf0d3..ad5a0f79ad 100644
--- a/arch/x86/lib/fsp/fsp_dram.c
+++ b/arch/x86/lib/fsp/fsp_dram.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <handoff.h>
 #include <init.h>
+#include <log.h>
 #include <asm/fsp/fsp_support.h>
 #include <asm/e820.h>
 #include <asm/mrccache.h>
@@ -44,6 +45,14 @@ int dram_init_banksize(void)
 	phys_addr_t low_end;
 	uint bank;
 
+	if (!ll_boot_init()) {
+		gd->bd->bi_dram[0].start = 0;
+		gd->bd->bi_dram[0].size = gd->ram_size;
+
+		mtrr_add_request(MTRR_TYPE_WRBACK, 0, gd->ram_size);
+		return 0;
+	}
+
 	low_end = 0;
 	for (bank = 1, hdr = gd->arch.hob_list;
 	     bank < CONFIG_NR_DRAM_BANKS && !end_of_hob(hdr);
diff --git a/arch/x86/lib/fsp/fsp_graphics.c b/arch/x86/lib/fsp/fsp_graphics.c
index 226c7e66b3..70224c1a48 100644
--- a/arch/x86/lib/fsp/fsp_graphics.c
+++ b/arch/x86/lib/fsp/fsp_graphics.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <vbe.h>
 #include <video.h>
 #include <asm/fsp/fsp_support.h>
@@ -78,6 +80,9 @@ static int fsp_video_probe(struct udevice *dev)
 	struct vesa_mode_info *vesa = &mode_info.vesa;
 	int ret;
 
+	if (!ll_boot_init())
+		return 0;
+
 	printf("Video: ");
 
 	/* Initialize vesa_mode_info structure */
diff --git a/arch/x86/lib/fsp/fsp_support.c b/arch/x86/lib/fsp/fsp_support.c
index ee228117d1..fd4d98ef62 100644
--- a/arch/x86/lib/fsp/fsp_support.c
+++ b/arch/x86/lib/fsp/fsp_support.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/fsp/fsp_support.h>
 #include <asm/post.h>
 
diff --git a/arch/x86/lib/fsp1/fsp_common.c b/arch/x86/lib/fsp1/fsp_common.c
index 0a726807c2..43d32b7abe 100644
--- a/arch/x86/lib/fsp1/fsp_common.c
+++ b/arch/x86/lib/fsp1/fsp_common.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <rtc.h>
 #include <acpi/acpi_s3.h>
diff --git a/arch/x86/lib/fsp1/fsp_dram.c b/arch/x86/lib/fsp1/fsp_dram.c
index 5ef89744b9..e3f9e30f6a 100644
--- a/arch/x86/lib/fsp1/fsp_dram.c
+++ b/arch/x86/lib/fsp1/fsp_dram.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/fsp/fsp_support.h>
 
 int dram_init(void)
diff --git a/arch/x86/lib/fsp1/fsp_support.c b/arch/x86/lib/fsp1/fsp_support.c
index c7a2c73846..d84c632f14 100644
--- a/arch/x86/lib/fsp1/fsp_support.c
+++ b/arch/x86/lib/fsp1/fsp_support.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/fsp1/fsp_support.h>
 #include <asm/post.h>
 
diff --git a/arch/x86/lib/fsp2/fsp_dram.c b/arch/x86/lib/fsp2/fsp_dram.c
index c8f2c09b6a..1c82b81831 100644
--- a/arch/x86/lib/fsp2/fsp_dram.c
+++ b/arch/x86/lib/fsp2/fsp_dram.c
@@ -6,17 +6,26 @@
 
 #include <common.h>
 #include <handoff.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <acpi/acpi_s3.h>
 #include <asm/arch/cpu.h>
 #include <asm/fsp/fsp_support.h>
 #include <asm/fsp2/fsp_api.h>
 #include <asm/fsp2/fsp_internal.h>
+#include <linux/sizes.h>
 
 int dram_init(void)
 {
 	int ret;
 
+	if (!ll_boot_init()) {
+		/* Use a small and safe amount of 1GB */
+		gd->ram_size = SZ_1G;
+
+		return 0;
+	}
 	if (spl_phase() == PHASE_SPL) {
 #ifdef CONFIG_HAVE_ACPI_RESUME
 		bool s3wake = gd->arch.prev_sleep_state == ACPI_S3;
@@ -68,6 +77,9 @@ int dram_init(void)
 
 ulong board_get_usable_ram_top(ulong total_size)
 {
+	if (!ll_boot_init())
+		return gd->ram_size;
+
 #if CONFIG_IS_ENABLED(HANDOFF)
 	struct spl_handoff *ho = gd->spl_handoff;
 
diff --git a/arch/x86/lib/fsp2/fsp_init.c b/arch/x86/lib/fsp2/fsp_init.c
index da9bd6b45c..85cae54a0c 100644
--- a/arch/x86/lib/fsp2/fsp_init.c
+++ b/arch/x86/lib/fsp2/fsp_init.c
@@ -6,9 +6,11 @@
 #include <common.h>
 #include <binman.h>
 #include <binman_sym.h>
+#include <bootstage.h>
 #include <cbfs.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <spi.h>
 #include <spl.h>
 #include <spi_flash.h>
@@ -23,7 +25,7 @@ int arch_cpu_init_dm(void)
 	int ret;
 
 	/* Make sure pads are set up early in U-Boot */
-	if (spl_phase() != PHASE_BOARD_F)
+	if (!ll_boot_init() || spl_phase() != PHASE_BOARD_F)
 		return 0;
 
 	/* Probe all pinctrl devices to set up the pads */
@@ -79,11 +81,10 @@ static int get_cbfs_fsp(enum fsp_type_t type, ulong map_base,
 	 * 'COREBOOT' (CBFS, size 1814528, offset 2117632).
 	 */
 	ulong cbfs_base = 0x205000;
-	ulong cbfs_size = 0x1bb000;
 	struct cbfs_priv *cbfs;
 	int ret;
 
-	ret = cbfs_init_mem(map_base + cbfs_base, cbfs_size, &cbfs);
+	ret = cbfs_init_mem(map_base + cbfs_base, &cbfs);
 	if (ret)
 		return ret;
 	if (!ret) {
diff --git a/arch/x86/lib/fsp2/fsp_meminit.c b/arch/x86/lib/fsp2/fsp_meminit.c
index bf30c47989..1a758147b0 100644
--- a/arch/x86/lib/fsp2/fsp_meminit.c
+++ b/arch/x86/lib/fsp2/fsp_meminit.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <binman.h>
+#include <bootstage.h>
+#include <log.h>
 #include <asm/mrccache.h>
 #include <asm/fsp/fsp_infoheader.h>
 #include <asm/fsp2/fsp_api.h>
@@ -79,10 +81,10 @@ int fsp_memory_init(bool s3wake, bool use_spi_flash)
 		return log_msg_ret("Could not setup config", ret);
 
 	debug("SDRAM init...");
-	bootstage_start(BOOTSTATE_ID_ACCUM_FSP_M, "fsp-m");
+	bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_M, "fsp-m");
 	func = (fsp_memory_init_func)(hdr->img_base + hdr->fsp_mem_init);
 	ret = func(&upd, &hob);
-	bootstage_accum(BOOTSTATE_ID_ACCUM_FSP_M);
+	bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_M);
 	if (ret)
 		return log_msg_ret("SDRAM init fail\n", ret);
 
diff --git a/arch/x86/lib/fsp2/fsp_silicon_init.c b/arch/x86/lib/fsp2/fsp_silicon_init.c
index d7ce43e1eb..45c0c7d90b 100644
--- a/arch/x86/lib/fsp2/fsp_silicon_init.c
+++ b/arch/x86/lib/fsp2/fsp_silicon_init.c
@@ -10,7 +10,9 @@
 
 #include <common.h>
 #include <binman.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/fsp/fsp_configs.h>
 #include <asm/arch/fsp/fsp_s_upd.h>
 #include <asm/fsp/fsp_infoheader.h>
@@ -42,10 +44,10 @@ int fsp_silicon_init(bool s3wake, bool use_spi_flash)
 	if (ret)
 		return log_msg_ret("Could not setup config", ret);
 	log_debug("Silicon init...");
-	bootstage_start(BOOTSTATE_ID_ACCUM_FSP_S, "fsp-s");
+	bootstage_start(BOOTSTAGE_ID_ACCUM_FSP_S, "fsp-s");
 	func = (fsp_silicon_init_func)(hdr->img_base + hdr->fsp_silicon_init);
 	ret = func(&upd);
-	bootstage_accum(BOOTSTATE_ID_ACCUM_FSP_S);
+	bootstage_accum(BOOTSTAGE_ID_ACCUM_FSP_S);
 	if (ret)
 		return log_msg_ret("Silicon init fail\n", ret);
 	log_debug("done\n");
diff --git a/arch/x86/lib/fsp2/fsp_support.c b/arch/x86/lib/fsp2/fsp_support.c
index 0a04b443f7..3f2ca840dc 100644
--- a/arch/x86/lib/fsp2/fsp_support.c
+++ b/arch/x86/lib/fsp2/fsp_support.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <spi_flash.h>
 #include <asm/fsp/fsp_support.h>
 #include <asm/fsp2/fsp_internal.h>
diff --git a/arch/x86/lib/i8259.c b/arch/x86/lib/i8259.c
index 358cd1e70d..a0e3c09257 100644
--- a/arch/x86/lib/i8259.c
+++ b/arch/x86/lib/i8259.c
@@ -14,6 +14,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/i8259.h>
 #include <asm/ibmpc.h>
diff --git a/arch/x86/lib/init_helpers.c b/arch/x86/lib/init_helpers.c
index 5bb55e256f..d906b528b3 100644
--- a/arch/x86/lib/init_helpers.c
+++ b/arch/x86/lib/init_helpers.c
@@ -30,6 +30,9 @@ int init_cache_f_r(void)
 			return ret;
 	}
 
+	if (!ll_boot_init())
+		return 0;
+
 	/* Initialise the CPU cache(s) */
 	return init_cache();
 }
diff --git a/arch/x86/lib/interrupts.c b/arch/x86/lib/interrupts.c
index b23b8fd402..a81e429110 100644
--- a/arch/x86/lib/interrupts.c
+++ b/arch/x86/lib/interrupts.c
@@ -30,6 +30,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <irq_func.h>
 #include <asm/interrupt.h>
 
@@ -127,7 +128,7 @@ void do_irq(int hw_irq)
 #endif
 
 #if defined(CONFIG_CMD_IRQ)
-int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 #if !CONFIG_IS_ENABLED(X86_64)
 	int irq;
diff --git a/arch/x86/lib/mpspec.c b/arch/x86/lib/mpspec.c
index b5ad1135a6..1c49c41b31 100644
--- a/arch/x86/lib/mpspec.c
+++ b/arch/x86/lib/mpspec.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/cpu.h>
 #include <asm/irq.h>
 #include <asm/ioapic.h>
diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c
index d1c44f290c..f181e8100c 100644
--- a/arch/x86/lib/mrccache.c
+++ b/arch/x86/lib/mrccache.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <spi.h>
@@ -232,6 +233,7 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
 	ulong map_base;
 	uint map_size;
 	uint offset;
+	ofnode node;
 	u32 reg[2];
 	int ret;
 
@@ -241,23 +243,36 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
 	 * memory map cannot be read.
 	 */
 	ret = uclass_find_first_device(UCLASS_SPI_FLASH, &dev);
-	if (!ret && !dev)
+	if (ret || !dev) {
+		/*
+		 * Fall back to searching the device tree since driver model
+		 * may not be ready yet (e.g. with FSPv1)
+		 */
+		node = ofnode_by_compatible(ofnode_null(), "jedec,spi-nor");
+		if (!ofnode_valid(node))
+			return log_msg_ret("Cannot find SPI flash\n", -ENOENT);
 		ret = -ENODEV;
-	if (ret)
-		return log_msg_ret("Cannot find SPI flash\n", ret);
-	ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
-	if (!ret) {
-		entry->base = map_base;
 	} else {
-		ret = dev_read_u32_array(dev, "memory-map", reg, 2);
+		ret = dm_spi_get_mmap(dev, &map_base, &map_size, &offset);
+		if (!ret)
+			entry->base = map_base;
+		node = dev_ofnode(dev);
+	}
+
+	/*
+	 * At this point we have entry->base if ret == 0. If not, then we have
+	 * the node and can look for memory-map
+	 */
+	if (ret) {
+		ret = ofnode_read_u32_array(node, "memory-map", reg, 2);
 		if (ret)
 			return log_msg_ret("Cannot find memory map\n", ret);
 		entry->base = reg[0];
 	}
 
 	/* Find the place where we put the MRC cache */
-	mrc_node = dev_read_subnode(dev, type == MRC_TYPE_NORMAL ?
-				    "rw-mrc-cache" : "rw-var-mrc-cache");
+	mrc_node = ofnode_find_subnode(node, type == MRC_TYPE_NORMAL ?
+				       "rw-mrc-cache" : "rw-var-mrc-cache");
 	if (!ofnode_valid(mrc_node))
 		return log_msg_ret("Cannot find node", -EPERM);
 
@@ -270,7 +285,8 @@ int mrccache_get_region(enum mrc_type_t type, struct udevice **devp,
 	if (devp)
 		*devp = dev;
 	debug("MRC cache type %d in '%s', offset %x, len %x, base %x\n",
-	      type, dev->name, entry->offset, entry->length, entry->base);
+	      type, dev ? dev->name : ofnode_get_name(node), entry->offset,
+	      entry->length, entry->base);
 
 	return 0;
 }
diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c
index c3c709ec07..4578046169 100644
--- a/arch/x86/lib/physmem.c
+++ b/arch/x86/lib/physmem.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <physmem.h>
 #include <asm/cpu.h>
 #include <linux/compiler.h>
diff --git a/arch/x86/lib/pinctrl_ich6.c b/arch/x86/lib/pinctrl_ich6.c
index 5868d5b60a..482599478b 100644
--- a/arch/x86/lib/pinctrl_ich6.c
+++ b/arch/x86/lib/pinctrl_ich6.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pch.h>
 #include <pci.h>
 #include <asm/cpu.h>
diff --git a/arch/x86/lib/pirq_routing.c b/arch/x86/lib/pirq_routing.c
index 17bd2fcb9b..eb6a7d96de 100644
--- a/arch/x86/lib/pirq_routing.c
+++ b/arch/x86/lib/pirq_routing.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/pci.h>
 #include <asm/pirq_routing.h>
diff --git a/arch/x86/lib/pmu.c b/arch/x86/lib/pmu.c
index 08fbe99039..3cd7b1f536 100644
--- a/arch/x86/lib/pmu.c
+++ b/arch/x86/lib/pmu.c
@@ -8,6 +8,7 @@
 #include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/pmu.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 
diff --git a/arch/x86/lib/relocate.c b/arch/x86/lib/relocate.c
index 4d09e4de42..ecbd0927e0 100644
--- a/arch/x86/lib/relocate.c
+++ b/arch/x86/lib/relocate.c
@@ -15,6 +15,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <relocate.h>
 #include <asm/u-boot-x86.h>
 #include <asm/sections.h>
diff --git a/arch/x86/lib/scu.c b/arch/x86/lib/scu.c
index a6f8297e72..d29d701631 100644
--- a/arch/x86/lib/scu.c
+++ b/arch/x86/lib/scu.c
@@ -15,6 +15,8 @@
 #include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/scu.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
diff --git a/arch/x86/lib/spl.c b/arch/x86/lib/spl.c
index 90baec2a17..cf22fa2d7b 100644
--- a/arch/x86/lib/spl.c
+++ b/arch/x86/lib/spl.c
@@ -8,7 +8,10 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <spl.h>
 #include <syscon.h>
@@ -63,7 +66,7 @@ static int x86_spl_init(void)
 	 * is not needed. We could make this a CONFIG option or perhaps
 	 * place it immediately below CONFIG_SYS_TEXT_BASE.
 	 */
-	char *ptr = (char *)0x110000;
+	__maybe_unused char *ptr = (char *)0x110000;
 #else
 	struct udevice *punit;
 #endif
@@ -111,7 +114,8 @@ static int x86_spl_init(void)
 			      __func__, ret);
 	}
 
-#ifndef CONFIG_TPL
+#ifndef CONFIG_SYS_COREBOOT
+# ifndef CONFIG_TPL
 	memset(&__bss_start, 0, (ulong)&__bss_end - (ulong)&__bss_start);
 
 	/* TODO(sjg@chromium.org): Consider calling cpu_init_r() here */
@@ -140,7 +144,7 @@ static int x86_spl_init(void)
 		return ret;
 	}
 	mtrr_commit(true);
-#else
+# else
 	ret = syscon_get_by_driver_data(X86_SYSCON_PUNIT, &punit);
 	if (ret)
 		debug("Could not find PUNIT (err=%d)\n", ret);
@@ -148,6 +152,7 @@ static int x86_spl_init(void)
 	ret = set_max_freq();
 	if (ret)
 		debug("Failed to set CPU frequency (err=%d)\n", ret);
+# endif
 #endif
 
 	return 0;
@@ -159,10 +164,10 @@ void board_init_f(ulong flags)
 
 	ret = x86_spl_init();
 	if (ret) {
-		debug("Error %d\n", ret);
-		panic("x86_spl_init fail");
+		printf("x86_spl_init: error %d\n", ret);
+		hang();
 	}
-#ifdef CONFIG_TPL
+#if IS_ENABLED(CONFIG_TPL) || IS_ENABLED(CONFIG_SYS_COREBOOT)
 	gd->bd = malloc(sizeof(*gd->bd));
 	if (!gd->bd) {
 		printf("Out of memory for bd_info size %x\n", sizeof(*gd->bd));
@@ -207,6 +212,19 @@ static int spl_board_load_image(struct spl_image_info *spl_image,
 	spl_image->os = IH_OS_U_BOOT;
 	spl_image->name = "U-Boot";
 
+	if (!IS_ENABLED(CONFIG_SYS_COREBOOT)) {
+		/*
+		 * Copy U-Boot from ROM
+		 * TODO(sjg@chromium.org): Figure out a way to get the text base
+		 * correctly here, and in the device-tree binman definition.
+		 *
+		 * Also consider using FIT so we get the correct image length
+		 * and parameters.
+		 */
+		memcpy((char *)spl_image->load_addr, (char *)0xfff00000,
+		       0x100000);
+	}
+
 	debug("Loading to %lx\n", spl_image->load_addr);
 
 	return 0;
diff --git a/arch/x86/lib/tpl.c b/arch/x86/lib/tpl.c
index 34804b53cc..6f7eb43a17 100644
--- a/arch/x86/lib/tpl.c
+++ b/arch/x86/lib/tpl.c
@@ -7,6 +7,9 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/cpu.h>
 #include <asm/mtrr.h>
diff --git a/arch/x86/lib/zimage.c b/arch/x86/lib/zimage.c
index ffc09630b7..64d14e8911 100644
--- a/arch/x86/lib/zimage.c
+++ b/arch/x86/lib/zimage.c
@@ -13,6 +13,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <irq_func.h>
 #include <malloc.h>
@@ -310,7 +311,7 @@ void __setup_pcat_compatibility(void)
 {
 }
 
-int do_zboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_zboot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct boot_params *base_ptr;
 	void *bzImage_addr = NULL;
diff --git a/arch/xtensa/cpu/cpu.c b/arch/xtensa/cpu/cpu.c
index 6f4b88f88e..85d3464607 100644
--- a/arch/xtensa/cpu/cpu.c
+++ b/arch/xtensa/cpu/cpu.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <init.h>
 #include <vsprintf.h>
 #include <linux/stringify.h>
 #include <asm/global_data.h>
diff --git a/arch/xtensa/cpu/exceptions.c b/arch/xtensa/cpu/exceptions.c
index 3b8f4a36d3..cf9af4326a 100644
--- a/arch/xtensa/cpu/exceptions.c
+++ b/arch/xtensa/cpu/exceptions.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <command.h>
 #include <irq_func.h>
+#include <asm/ptrace.h>
 #include <asm/string.h>
 #include <asm/regs.h>
 
diff --git a/arch/xtensa/lib/bootm.c b/arch/xtensa/lib/bootm.c
index 057b229433..458eaf95c0 100644
--- a/arch/xtensa/lib/bootm.c
+++ b/arch/xtensa/lib/bootm.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <env.h>
diff --git a/arch/xtensa/lib/time.c b/arch/xtensa/lib/time.c
index 62bbe37b80..3a02c38493 100644
--- a/arch/xtensa/lib/time.c
+++ b/arch/xtensa/lib/time.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <time.h>
 #include <asm/global_data.h>
+#include <linux/delay.h>
 #include <linux/stringify.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/AndesTech/adp-ae3xx/adp-ae3xx.c b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
index a04415deca..54f7178b36 100644
--- a/board/AndesTech/adp-ae3xx/adp-ae3xx.c
+++ b/board/AndesTech/adp-ae3xx/adp-ae3xx.c
@@ -6,8 +6,10 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/mach-types.h>
 #include <common.h>
+#include <flash.h>
 #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
 #include <netdev.h>
 #endif
diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c
index faf39b4ba6..23cdf4f578 100644
--- a/board/AndesTech/adp-ag101p/adp-ag101p.c
+++ b/board/AndesTech/adp-ag101p/adp-ag101p.c
@@ -6,7 +6,9 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <init.h>
+#include <net.h>
 #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
 #include <netdev.h>
 #endif
diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c
index f164073000..da5bc5b1f1 100644
--- a/board/AndesTech/ax25-ae350/ax25-ae350.c
+++ b/board/AndesTech/ax25-ae350/ax25-ae350.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <flash.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH)
 #include <netdev.h>
 #endif
diff --git a/board/Arcturus/ucp1020/cmd_arc.c b/board/Arcturus/ucp1020/cmd_arc.c
index b50de63c5e..4b30b66e20 100644
--- a/board/Arcturus/ucp1020/cmd_arc.c
+++ b/board/Arcturus/ucp1020/cmd_arc.c
@@ -9,14 +9,17 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <div64.h>
 #include <env.h>
+#include <flash.h>
 #include <malloc.h>
 #include <spi_flash.h>
 #include <mmc.h>
 #include <version.h>
 #include <asm/io.h>
+#include <linux/stringify.h>
 
 static ulong fwenv_addr[MAX_FWENV_ADDR];
 const char mystrerr[] = "ERROR: Failed to save factory info";
@@ -375,7 +378,8 @@ void get_arc_info(void)
 		do_get_arc_info();
 }
 
-static int do_arc_cmd(cmd_tbl_t * cmdtp, int flag, int argc, char *const argv[])
+static int do_arc_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	const char *cmd;
 	int ret = -1;
diff --git a/board/Arcturus/ucp1020/ucp1020.c b/board/Arcturus/ucp1020/ucp1020.c
index b641b72aaa..240e804137 100644
--- a/board/Arcturus/ucp1020/ucp1020.c
+++ b/board/Arcturus/ucp1020/ucp1020.c
@@ -12,7 +12,9 @@
 #include <command.h>
 #include <env.h>
 #include <hwconfig.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <i2c.h>
 #include <miiphy.h>
diff --git a/board/BuR/brppt2/board.c b/board/BuR/brppt2/board.c
index c91d2f9494..f156b552a7 100644
--- a/board/BuR/brppt2/board.c
+++ b/board/BuR/brppt2/board.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <spl.h>
 #include <dm.h>
 #include <miiphy.h>
diff --git a/board/BuR/common/br_resetc.c b/board/BuR/common/br_resetc.c
index 70ad8322ef..5006687fbf 100644
--- a/board/BuR/common/br_resetc.c
+++ b/board/BuR/common/br_resetc.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <i2c.h>
 #include <dm/uclass.h>
+#include <linux/delay.h>
 #include "br_resetc.h"
 
 /* I2C Address of controller */
diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c
index de8d455c27..3bc1d064ca 100644
--- a/board/BuR/common/common.c
+++ b/board/BuR/common/common.c
@@ -8,12 +8,14 @@
  * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
  *
  */
+#include <log.h>
 #include <version.h>
 #include <common.h>
 #include <env.h>
 #include <fdtdec.h>
 #include <i2c.h>
 #include <lcd.h>
+#include <linux/delay.h>
 #include "bur_common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/BuS/eb_cpu5282/eb_cpu5282.c b/board/BuS/eb_cpu5282/eb_cpu5282.c
index a667413bfc..1d05e40c20 100644
--- a/board/BuS/eb_cpu5282/eb_cpu5282.c
+++ b/board/BuS/eb_cpu5282/eb_cpu5282.c
@@ -226,7 +226,7 @@ int drv_video_init(void)
 /*---------------------------------------------------------------------------*/
 
 #ifdef CONFIG_VIDEO
-int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_brightness(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rcode = 0;
 	ulong side;
diff --git a/board/CZ.NIC/turris_mox/mox_sp.c b/board/CZ.NIC/turris_mox/mox_sp.c
index 3c23471e65..cc57b9f095 100644
--- a/board/CZ.NIC/turris_mox/mox_sp.c
+++ b/board/CZ.NIC/turris_mox/mox_sp.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <asm/arch/soc.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define RWTM_BASE		(MVEBU_REGISTER(0xb0000))
 #define RWTM_CMD_PARAM(i)	(size_t)(RWTM_BASE + (i) * 4)
diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c
index 470ea32f9c..f3c3996e32 100644
--- a/board/CZ.NIC/turris_mox/turris_mox.c
+++ b/board/CZ.NIC/turris_mox/turris_mox.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <clk.h>
@@ -13,6 +14,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <linux/string.h>
 #include <miiphy.h>
diff --git a/board/CZ.NIC/turris_omnia/turris_omnia.c b/board/CZ.NIC/turris_omnia/turris_omnia.c
index e1775d3004..2da878d364 100644
--- a/board/CZ.NIC/turris_omnia/turris_omnia.c
+++ b/board/CZ.NIC/turris_omnia/turris_omnia.c
@@ -11,7 +11,9 @@
 #include <env.h>
 #include <i2c.h>
 #include <init.h>
+#include <log.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
@@ -19,6 +21,7 @@
 #include <dm/uclass.h>
 #include <fdt_support.h>
 #include <time.h>
+#include <linux/bitops.h>
 #include <u-boot/crc.h>
 # include <atsha204a-i2c.h>
 
diff --git a/board/CarMediaLab/flea3/flea3.c b/board/CarMediaLab/flea3/flea3.c
index fb66c9ecc7..61d965f5f6 100644
--- a/board/CarMediaLab/flea3/flea3.c
+++ b/board/CarMediaLab/flea3/flea3.c
@@ -11,6 +11,7 @@
 #include <init.h>
 #include <asm/io.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/LaCie/net2big_v2/net2big_v2.c b/board/LaCie/net2big_v2/net2big_v2.c
index 50305656e8..dbd8b5755d 100644
--- a/board/LaCie/net2big_v2/net2big_v2.c
+++ b/board/LaCie/net2big_v2/net2big_v2.c
@@ -12,6 +12,7 @@
 #include <command.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <net.h>
 #include <asm/mach-types.h>
 #include <asm/arch/cpu.h>
@@ -245,7 +246,8 @@ void reset_phy(void)
 #if defined(CONFIG_KIRKWOOD_GPIO)
 /* Return GPIO push button status */
 static int
-do_read_push_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_read_push_button(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	return !kw_gpio_get_value(NET2BIG_V2_GPIO_PUSH_BUTTON);
 }
diff --git a/board/LaCie/netspace_v2/netspace_v2.c b/board/LaCie/netspace_v2/netspace_v2.c
index b7ae58c645..011cc563d1 100644
--- a/board/LaCie/netspace_v2/netspace_v2.c
+++ b/board/LaCie/netspace_v2/netspace_v2.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <init.h>
 #include <net.h>
 #include <asm/mach-types.h>
 #include <asm/arch/cpu.h>
@@ -109,7 +110,7 @@ void reset_phy(void)
 #if defined(CONFIG_KIRKWOOD_GPIO)
 /* Return GPIO button status */
 static int
-do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_read_button(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
 }
diff --git a/board/Marvell/aspenite/aspenite.c b/board/Marvell/aspenite/aspenite.c
index c4e506ff3b..c1406d7489 100644
--- a/board/Marvell/aspenite/aspenite.c
+++ b/board/Marvell/aspenite/aspenite.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <mvmfp.h>
 #include <asm/mach-types.h>
 #include <asm/arch/cpu.h>
diff --git a/board/Marvell/db-88f6281-bp/db-88f6281-bp.c b/board/Marvell/db-88f6281-bp/db-88f6281-bp.c
index 729516d9e1..62027bd638 100644
--- a/board/Marvell/db-88f6281-bp/db-88f6281-bp.c
+++ b/board/Marvell/db-88f6281-bp/db-88f6281-bp.c
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0+
 
 #include <common.h>
+#include <init.h>
 #include <net.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/Marvell/db-88f6720/db-88f6720.c b/board/Marvell/db-88f6720/db-88f6720.c
index 94306b3d8e..e9897b3976 100644
--- a/board/Marvell/db-88f6720/db-88f6720.c
+++ b/board/Marvell/db-88f6720/db-88f6720.c
@@ -4,11 +4,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
index 922576e9d5..60ce940e1d 100644
--- a/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
+++ b/board/Marvell/db-88f6820-amc/db-88f6820-amc.c
@@ -5,11 +5,14 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
 #include <../serdes/a38x/high_speed_env_spec.h>
diff --git a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
index 1a0746b9d3..08a3c1cc80 100644
--- a/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
+++ b/board/Marvell/db-88f6820-gp/db-88f6820-gp.c
@@ -5,11 +5,14 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
 #include <../serdes/a38x/high_speed_env_spec.h>
diff --git a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
index 604e8c1670..63bb771ab3 100644
--- a/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
+++ b/board/Marvell/db-mv784mp-gp/db-mv784mp-gp.c
@@ -4,11 +4,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
index cae428ffd0..5f12a27002 100644
--- a/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
+++ b/board/Marvell/db-xc3-24g4xg/db-xc3-24g4xg.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/Marvell/dreamplug/dreamplug.c b/board/Marvell/dreamplug/dreamplug.c
index 887dd1ed74..7d188c3279 100644
--- a/board/Marvell/dreamplug/dreamplug.c
+++ b/board/Marvell/dreamplug/dreamplug.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/arch/cpu.h>
diff --git a/board/Marvell/gplugd/gplugd.c b/board/Marvell/gplugd/gplugd.c
index fc2bc85f00..1e2f22735e 100644
--- a/board/Marvell/gplugd/gplugd.c
+++ b/board/Marvell/gplugd/gplugd.c
@@ -12,6 +12,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <mvmfp.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/mfp.h>
@@ -19,6 +21,7 @@
 #include <asm/gpio.h>
 #include <miiphy.h>
 #include <asm/mach-types.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_ARMADA100_FEC
 #include <net.h>
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
index 71bee76bdc..f3981c66d2 100644
--- a/board/Marvell/guruplug/guruplug.c
+++ b/board/Marvell/guruplug/guruplug.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/mach-types.h>
diff --git a/board/Marvell/mvebu_armada-37xx/board.c b/board/Marvell/mvebu_armada-37xx/board.c
index bef4e1767c..9bea1986d4 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -6,10 +6,12 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <init.h>
 #include <phy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/Marvell/mvebu_armada-8k/board.c b/board/Marvell/mvebu_armada-8k/board.c
index 499e89367f..60b0024630 100644
--- a/board/Marvell/mvebu_armada-8k/board.c
+++ b/board/Marvell/mvebu_armada-8k/board.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index ae9202895d..d9b5b213fe 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/mach-types.h>
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c
index 6c6106c23c..6311ed3b2e 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/mach-types.h>
diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c
index 5a8c6e282b..85dd10e55a 100644
--- a/board/Seagate/dockstar/dockstar.c
+++ b/board/Seagate/dockstar/dockstar.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/arch/soc.h>
diff --git a/board/Seagate/goflexhome/goflexhome.c b/board/Seagate/goflexhome/goflexhome.c
index 1e4477aa5f..de1ec54466 100644
--- a/board/Seagate/goflexhome/goflexhome.c
+++ b/board/Seagate/goflexhome/goflexhome.c
@@ -12,6 +12,8 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/mach-types.h>
diff --git a/board/Seagate/nas220/nas220.c b/board/Seagate/nas220/nas220.c
index 99462052f0..3a027d083a 100644
--- a/board/Seagate/nas220/nas220.c
+++ b/board/Seagate/nas220/nas220.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/mach-types.h>
diff --git a/board/Synology/ds109/ds109.c b/board/Synology/ds109/ds109.c
index f2031ef3bb..aa2987d924 100644
--- a/board/Synology/ds109/ds109.c
+++ b/board/Synology/ds109/ds109.c
@@ -6,12 +6,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/setup.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
+#include <linux/delay.h>
 #include "ds109.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/Synology/ds414/cmd_syno.c b/board/Synology/ds414/cmd_syno.c
index 777948f90f..a120c3123f 100644
--- a/board/Synology/ds414/cmd_syno.c
+++ b/board/Synology/ds414/cmd_syno.c
@@ -6,8 +6,10 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <div64.h>
 #include <env.h>
+#include <net.h>
 #include <spi.h>
 #include <spi_flash.h>
 #include <linux/mtd/mtd.h>
@@ -20,7 +22,7 @@
 #define SYNO_CHKSUM_TAG		"CHK="
 
 
-static int do_syno_populate(int argc, char * const argv[])
+static int do_syno_populate(int argc, char *const argv[])
 {
 	unsigned int bus = CONFIG_SF_DEFAULT_BUS;
 	unsigned int cs = CONFIG_SF_DEFAULT_CS;
@@ -151,7 +153,7 @@ static const char * const pwr_mng_bit_func[] = {
 	NULL,
 };
 
-static int do_syno_clk_gate(int argc, char * const argv[])
+static int do_syno_clk_gate(int argc, char *const argv[])
 {
 	u32 pwr_mng_ctrl_reg = reg_read(POWER_MNG_CTRL_REG);
 	const char *func, *state;
@@ -194,8 +196,8 @@ static int do_syno_clk_gate(int argc, char * const argv[])
 	return 0;
 }
 
-static int do_syno(cmd_tbl_t *cmdtp, int flag,
-                   int argc, char * const argv[])
+static int do_syno(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	const char *cmd;
 	int ret = 0;
diff --git a/board/Synology/ds414/ds414.c b/board/Synology/ds414/ds414.c
index d23e97c9b9..632205164e 100644
--- a/board/Synology/ds414/ds414.c
+++ b/board/Synology/ds414/ds414.c
@@ -5,10 +5,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 #include <linux/mbus.h>
 
 #include "../drivers/ddr/marvell/axp/ddr3_hw_training.h"
diff --git a/board/abilis/tb100/tb100.c b/board/abilis/tb100/tb100.c
index e3fbbbaa8a..47eb64dd1f 100644
--- a/board/abilis/tb100/tb100.c
+++ b/board/abilis/tb100/tb100.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 
diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c
index 299f2f102d..28e505e6c5 100644
--- a/board/advantech/dms-ba16/dms-ba16.c
+++ b/board/advantech/dms-ba16/dms-ba16.c
@@ -6,10 +6,12 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/mxc_i2c.h>
diff --git a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
index bb7913025d..ea057d27cf 100644
--- a/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
+++ b/board/advantech/imx8qm_rom7720_a1/imx8qm_rom7720_a1.c
@@ -6,7 +6,10 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/board/advantech/imx8qm_rom7720_a1/spl.c b/board/advantech/imx8qm_rom7720_a1/spl.c
index 3f31a8f9c3..54f48b9ba8 100644
--- a/board/advantech/imx8qm_rom7720_a1/spl.c
+++ b/board/advantech/imx8qm_rom7720_a1/spl.c
@@ -4,6 +4,9 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <fsl_esdhc.h>
 
diff --git a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
index 8f4c587371..8499fc541f 100644
--- a/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
+++ b/board/advantech/som-db5800-som-6867/som-db5800-som-6867.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/fsp1/fsp_support.h>
 
 /* ALC262 Verb Table - 10EC0262 */
diff --git a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
index 1f3f293bd9..668484b71b 100644
--- a/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
+++ b/board/alliedtelesis/SBx81LIFKW/sbx81lifkw.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <net.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
index 889ce70d75..e4bf507cc3 100644
--- a/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
+++ b/board/alliedtelesis/SBx81LIFXCAT/sbx81lifxcat.c
@@ -5,10 +5,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <netdev.h>
 #include <led.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
diff --git a/board/alliedtelesis/x530/x530.c b/board/alliedtelesis/x530/x530.c
index 04b053dc20..c7438aeaf1 100644
--- a/board/alliedtelesis/x530/x530.c
+++ b/board/alliedtelesis/x530/x530.c
@@ -8,8 +8,10 @@
 #include <dm.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <wdt.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/amazon/kc1/kc1.c b/board/amazon/kc1/kc1.c
index 9034c4fbff..fb1828ff44 100644
--- a/board/amazon/kc1/kc1.c
+++ b/board/amazon/kc1/kc1.c
@@ -8,6 +8,7 @@
 #include <config.h>
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <linux/ctype.h>
 #include <linux/usb/musb.h>
 #include <asm/omap_musb.h>
diff --git a/board/amlogic/p200/README.nanopi-k2 b/board/amlogic/p200/README.nanopi-k2
index d450d3c2b2..c8dec3569b 100644
--- a/board/amlogic/p200/README.nanopi-k2
+++ b/board/amlogic/p200/README.nanopi-k2
@@ -24,7 +24,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make nanopi-k2_defconfig
  > make
diff --git a/board/amlogic/p200/README.odroid-c2 b/board/amlogic/p200/README.odroid-c2
index bed48c5728..3b9f80df29 100644
--- a/board/amlogic/p200/README.odroid-c2
+++ b/board/amlogic/p200/README.odroid-c2
@@ -29,7 +29,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make odroid-c2_defconfig
  > make
diff --git a/board/amlogic/p200/README.p200 b/board/amlogic/p200/README.p200
index 01d82d1e79..84d5ca5356 100644
--- a/board/amlogic/p200/README.p200
+++ b/board/amlogic/p200/README.p200
@@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make p200_defconfig
  > make
diff --git a/board/amlogic/p200/p200.c b/board/amlogic/p200/p200.c
index 41d331dda2..8f1bf8bfda 100644
--- a/board/amlogic/p200/p200.c
+++ b/board/amlogic/p200/p200.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/gx.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/p201/README.p201 b/board/amlogic/p201/README.p201
index c251096ce1..4bb5e95905 100644
--- a/board/amlogic/p201/README.p201
+++ b/board/amlogic/p201/README.p201
@@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make p201_defconfig
  > make
diff --git a/board/amlogic/p201/p201.c b/board/amlogic/p201/p201.c
index e46fcaea6d..597bb71cbf 100644
--- a/board/amlogic/p201/p201.c
+++ b/board/amlogic/p201/p201.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/gx.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/p212/README.khadas-vim b/board/amlogic/p212/README.khadas-vim
index a2c7606454..ccf933861b 100644
--- a/board/amlogic/p212/README.khadas-vim
+++ b/board/amlogic/p212/README.khadas-vim
@@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices:
 U-Boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make khadas-vim_defconfig
  > make
diff --git a/board/amlogic/p212/README.libretech-ac b/board/amlogic/p212/README.libretech-ac
index 538604261b..3f713ec326 100644
--- a/board/amlogic/p212/README.libretech-ac
+++ b/board/amlogic/p212/README.libretech-ac
@@ -25,7 +25,6 @@ Currently the U-Boot port supports the following devices:
 U-Boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make libretech-ac_defconfig
  > make
diff --git a/board/amlogic/p212/README.libretech-cc b/board/amlogic/p212/README.libretech-cc
index 6af7de3cfa..74434d4435 100644
--- a/board/amlogic/p212/README.libretech-cc
+++ b/board/amlogic/p212/README.libretech-cc
@@ -30,7 +30,6 @@ Currently the U-Boot port supports the following devices:
 U-Boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make libretech-cc_defconfig
  > make
diff --git a/board/amlogic/p212/README.p212 b/board/amlogic/p212/README.p212
index ef5370c763..3776f24493 100644
--- a/board/amlogic/p212/README.p212
+++ b/board/amlogic/p212/README.p212
@@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make p212_defconfig
  > make
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index 094ab5478d..fbc49e9565 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/gx.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/q200/README.khadas-vim2 b/board/amlogic/q200/README.khadas-vim2
index 8bcfc296f3..595998c4fa 100644
--- a/board/amlogic/q200/README.khadas-vim2
+++ b/board/amlogic/q200/README.khadas-vim2
@@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices:
 U-Boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make khadas-vim2_defconfig
  > make
diff --git a/board/amlogic/q200/README.q200 b/board/amlogic/q200/README.q200
index 55d730a0d2..d4142c88bd 100644
--- a/board/amlogic/q200/README.q200
+++ b/board/amlogic/q200/README.q200
@@ -30,7 +30,6 @@ Currently the u-boot port supports the following devices:
 U-Boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make khadas-vim2_defconfig
  > make
diff --git a/board/amlogic/q200/q200.c b/board/amlogic/q200/q200.c
index f1faa7418e..62e6fa3d19 100644
--- a/board/amlogic/q200/q200.c
+++ b/board/amlogic/q200/q200.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/gx.h>
 #include <asm/arch/mem.h>
diff --git a/board/amlogic/s400/README b/board/amlogic/s400/README
index ab21998dc8..a48db22a42 100644
--- a/board/amlogic/s400/README
+++ b/board/amlogic/s400/README
@@ -31,7 +31,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make s400_defconfig
  > make
diff --git a/board/amlogic/s400/s400.c b/board/amlogic/s400/s400.c
index bdb4eca883..7e2f0cdae3 100644
--- a/board/amlogic/s400/s400.c
+++ b/board/amlogic/s400/s400.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/axg.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/sei510/README b/board/amlogic/sei510/README
index e47ebc7b3a..d9358aa501 100644
--- a/board/amlogic/sei510/README
+++ b/board/amlogic/sei510/README
@@ -22,7 +22,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make sei510_defconfig
  > make
diff --git a/board/amlogic/sei510/sei510.c b/board/amlogic/sei510/sei510.c
index 5de610d85f..5a5148ea68 100644
--- a/board/amlogic/sei510/sei510.c
+++ b/board/amlogic/sei510/sei510.c
@@ -6,7 +6,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
 #include <env_internal.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/axg.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/sei610/README b/board/amlogic/sei610/README
index 1cc2b3c2a4..d96a94b5e9 100644
--- a/board/amlogic/sei610/README
+++ b/board/amlogic/sei610/README
@@ -18,7 +18,6 @@ specifications:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make sei610_defconfig
  > make
diff --git a/board/amlogic/sei610/sei610.c b/board/amlogic/sei610/sei610.c
index b17eb9ef55..27dba93582 100644
--- a/board/amlogic/sei610/sei610.c
+++ b/board/amlogic/sei610/sei610.c
@@ -6,7 +6,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
 #include <env_internal.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/axg.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/u200/README b/board/amlogic/u200/README
index bffac5e7ae..a4080eb299 100644
--- a/board/amlogic/u200/README
+++ b/board/amlogic/u200/README
@@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make u200_defconfig
  > make
diff --git a/board/amlogic/u200/u200.c b/board/amlogic/u200/u200.c
index 69fd29d4fe..373235d77a 100644
--- a/board/amlogic/u200/u200.c
+++ b/board/amlogic/u200/u200.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/axg.h>
 #include <asm/arch/sm.h>
diff --git a/board/amlogic/w400/README.khadas-vim3 b/board/amlogic/w400/README.khadas-vim3
index 45ef90c1b0..399bf49295 100644
--- a/board/amlogic/w400/README.khadas-vim3
+++ b/board/amlogic/w400/README.khadas-vim3
@@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make khadas-vim3_defconfig
  > make
diff --git a/board/amlogic/w400/README.khadas-vim3l b/board/amlogic/w400/README.khadas-vim3l
index 0afff16c0c..b2d9abbfd9 100644
--- a/board/amlogic/w400/README.khadas-vim3l
+++ b/board/amlogic/w400/README.khadas-vim3l
@@ -29,7 +29,6 @@ Currently the U-Boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make khadas-vim3l_defconfig
  > make
diff --git a/board/amlogic/w400/README.odroid-n2 b/board/amlogic/w400/README.odroid-n2
index a8f2c3d7da..8142eebea0 100644
--- a/board/amlogic/w400/README.odroid-n2
+++ b/board/amlogic/w400/README.odroid-n2
@@ -28,7 +28,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make odroid-n2_defconfig
  > make
diff --git a/board/amlogic/w400/README.w400 b/board/amlogic/w400/README.w400
index 25b786d817..c129717a11 100644
--- a/board/amlogic/w400/README.w400
+++ b/board/amlogic/w400/README.w400
@@ -27,7 +27,6 @@ Currently the u-boot port supports the following devices:
 u-boot compilation
 ==================
 
- > export ARCH=arm
  > export CROSS_COMPILE=aarch64-none-elf-
  > make w400_defconfig
  > make
diff --git a/board/amlogic/w400/w400.c b/board/amlogic/w400/w400.c
index e60dc3a622..47a51710dc 100644
--- a/board/amlogic/w400/w400.c
+++ b/board/amlogic/w400/w400.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env_internal.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/eth.h>
 
diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c
index 70671039c2..14931120f6 100644
--- a/board/aristainetos/aristainetos.c
+++ b/board/aristainetos/aristainetos.c
@@ -9,6 +9,9 @@
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  */
 
+#include <command.h>
+#include <image.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
diff --git a/board/armadeus/apf27/fpga.c b/board/armadeus/apf27/fpga.c
index e9af8ddd01..9e2f39f981 100644
--- a/board/armadeus/apf27/fpga.c
+++ b/board/armadeus/apf27/fpga.c
@@ -9,6 +9,8 @@
  * Keith Outwater, keith_outwater@mvis.com
  */
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 
 #include <asm/arch/imx-regs.h>
 #include <asm/gpio.h>
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index 1a472f50d3..ac6462d7ff 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -17,10 +17,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <dm/platform_data/serial_pl01x.h>
diff --git a/board/armltd/integrator/pci.c b/board/armltd/integrator/pci.c
index c189d23eec..28efc33f1f 100644
--- a/board/armltd/integrator/pci.c
+++ b/board/armltd/integrator/pci.c
@@ -21,8 +21,11 @@
  */
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/io.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include "integrator-sc.h"
 #include "pci_v3.h"
 
diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c
index d701669be0..d220b877d6 100644
--- a/board/armltd/integrator/timer.c
+++ b/board/armltd/integrator/timer.c
@@ -19,6 +19,7 @@
 #include <common.h>
 #include <div64.h>
 #include <time.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_ARCH_CINTEGRATOR
 #define DIV_CLOCK_INIT	1
@@ -124,7 +125,7 @@ ulong get_timer (ulong base_ticks)
 }
 
 /* delay usec useconds */
-void __udelay (unsigned long usec)
+void __udelay(unsigned long usec)
 {
 	ulong tmo, tmp;
 
diff --git a/board/armltd/vexpress/vexpress_common.c b/board/armltd/vexpress/vexpress_common.c
index 14626c1f55..9dc26b949e 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -16,10 +16,12 @@
  * Philippe Robin, <philippe.robin@arm.com>
  */
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <init.h>
 #include <malloc.h>
 #include <errno.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig
index 9014418433..1d13f542e6 100644
--- a/board/armltd/vexpress64/Kconfig
+++ b/board/armltd/vexpress64/Kconfig
@@ -9,4 +9,11 @@ config SYS_VENDOR
 config SYS_CONFIG_NAME
 	default "vexpress_aemv8a"
 
+config JUNO_DTB_PART
+	string "NOR flash partition holding DTB"
+	default "board.dtb"
+	help
+	  The ARM partition name in the NOR flash memory holding the
+	  device tree blob to configure U-Boot.
+
 endif
diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c
index 21156a4ca9..02de58b360 100644
--- a/board/armltd/vexpress64/pcie.c
+++ b/board/armltd/vexpress64/pcie.c
@@ -6,9 +6,12 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
 #include <pci_ids.h>
+#include <linux/delay.h>
 #include "pcie.h"
 
 /* XpressRICH3 support */
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c
index dd0ebdd303..fbfa7a18f1 100644
--- a/board/armltd/vexpress64/vexpress64.c
+++ b/board/armltd/vexpress64/vexpress64.c
@@ -7,8 +7,10 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
@@ -82,9 +84,64 @@ int dram_init_banksize(void)
 	return 0;
 }
 
-/*
- * Board specific reset that is system reset.
- */
+#ifdef CONFIG_OF_BOARD
+#define JUNO_FLASH_SEC_SIZE	(256 * 1024)
+static phys_addr_t find_dtb_in_nor_flash(const char *partname)
+{
+	phys_addr_t sector = CONFIG_SYS_FLASH_BASE;
+	int i;
+
+	for (i = 0;
+	     i < CONFIG_SYS_MAX_FLASH_SECT;
+	     i++, sector += JUNO_FLASH_SEC_SIZE) {
+		int len = strlen(partname) + 1;
+		int offs;
+		phys_addr_t imginfo;
+		u32 reg;
+
+		reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x04);
+                /* This makes up the string "HSLFTOOF" flash footer */
+		if (reg != 0x464F4F54U)
+			continue;
+		reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x08);
+                if (reg != 0x464C5348U)
+			continue;
+
+		for (offs = 0; offs < 32; offs += 4, len -= 4) {
+			reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x30 + offs);
+			if (strncmp(partname + offs, (char *)&reg,
+			            len > 4 ? 4 : len))
+				break;
+
+			if (len > 4)
+				continue;
+
+			reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x10);
+			imginfo = sector + JUNO_FLASH_SEC_SIZE - 0x30 - reg;
+			reg = readl(imginfo + 0x54);
+
+			return CONFIG_SYS_FLASH_BASE +
+			       reg * JUNO_FLASH_SEC_SIZE;
+		}
+	}
+
+	printf("No DTB found\n");
+
+	return ~0;
+}
+
+void *board_fdt_blob_setup(void)
+{
+	phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
+
+	if (fdt_rom_addr == ~0UL)
+		return NULL;
+
+	return (void *)fdt_rom_addr;
+}
+#endif
+
+/* Actual reset is done via PSCI. */
 void reset_cpu(ulong addr)
 {
 }
diff --git a/board/astro/mcf5373l/mcf5373l.c b/board/astro/mcf5373l/mcf5373l.c
index 9adf58eb8a..e7c2b90930 100644
--- a/board/astro/mcf5373l/mcf5373l.c
+++ b/board/astro/mcf5373l/mcf5373l.c
@@ -13,6 +13,7 @@
 #include <asm/m5329.h>
 #include <asm/immap_5329.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 /* needed for astro bus: */
 #include <asm/uart.h>
diff --git a/board/atmel/at91rm9200ek/at91rm9200ek.c b/board/atmel/at91rm9200ek/at91rm9200ek.c
index e75d5b182f..e4a6776f96 100644
--- a/board/atmel/at91rm9200ek/at91rm9200ek.c
+++ b/board/atmel/at91rm9200ek/at91rm9200ek.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mach-types.h>
 #include <asm/arch/hardware.h>
diff --git a/board/atmel/at91sam9260ek/led.c b/board/atmel/at91sam9260ek/led.c
index 2ea66b9b15..cc6d5d7a05 100644
--- a/board/atmel/at91sam9260ek/led.c
+++ b/board/atmel/at91sam9260ek/led.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <status_led.h>
diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c
index b811d931c4..be132bc185 100644
--- a/board/atmel/at91sam9263ek/at91sam9263ek.c
+++ b/board/atmel/at91sam9263ek/at91sam9263ek.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <debug_uart.h>
+#include <flash.h>
 #include <init.h>
 #include <net.h>
 #include <vsprintf.h>
diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
index 90d32353e9..f16c137565 100644
--- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c
+++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9x5_matrix.h>
diff --git a/board/atmel/common/mac-spi-nor.c b/board/atmel/common/mac-spi-nor.c
index 96343678e0..ced27b65e6 100644
--- a/board/atmel/common/mac-spi-nor.c
+++ b/board/atmel/common/mac-spi-nor.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <net.h>
 #include <linux/mtd/spi-nor.h>
 #include <netdev.h>
 
diff --git a/board/atmel/common/mac_eeprom.c b/board/atmel/common/mac_eeprom.c
index 050aa51ee1..2205dd30f8 100644
--- a/board/atmel/common/mac_eeprom.c
+++ b/board/atmel/common/mac_eeprom.c
@@ -9,6 +9,7 @@
 #include <eeprom.h>
 #include <env.h>
 #include <i2c_eeprom.h>
+#include <net.h>
 #include <netdev.h>
 
 int at91_set_ethaddr(int offset)
diff --git a/board/atmel/common/video_display.c b/board/atmel/common/video_display.c
index 5cc52139a7..2666b0b3cd 100644
--- a/board/atmel/common/video_display.c
+++ b/board/atmel/common/video_display.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <atmel_lcd.h>
 #include <dm.h>
+#include <init.h>
 #include <nand.h>
 #include <version.h>
 #include <video.h>
diff --git a/board/avionic-design/common/tamonten-ng.c b/board/avionic-design/common/tamonten-ng.c
index 10278de3c7..29bde60228 100644
--- a/board/avionic-design/common/tamonten-ng.c
+++ b/board/avionic-design/common/tamonten-ng.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/gp_padctrl.h>
 #include <asm/arch/gpio.h>
diff --git a/board/bachmann/ot1200/ot1200.c b/board/bachmann/ot1200/ot1200.c
index 36f37084b3..db0da0ca2f 100644
--- a/board/bachmann/ot1200/ot1200.c
+++ b/board/bachmann/ot1200/ot1200.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/bachmann/ot1200/ot1200_spl.c b/board/bachmann/ot1200/ot1200_spl.c
index a3a822f65a..7fbd6f2c5d 100644
--- a/board/bachmann/ot1200/ot1200_spl.c
+++ b/board/bachmann/ot1200/ot1200_spl.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/barco/platinum/platinum.c b/board/barco/platinum/platinum.c
index c2c7c09553..7984647e3a 100644
--- a/board/barco/platinum/platinum.c
+++ b/board/barco/platinum/platinum.c
@@ -9,6 +9,7 @@
 #include <mmc.h>
 #include <fsl_esdhc_imx.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/board/barco/platinum/platinum_picon.c b/board/barco/platinum/platinum_picon.c
index 7d99b1694d..3fc29f9e08 100644
--- a/board/barco/platinum/platinum_picon.c
+++ b/board/barco/platinum/platinum_picon.c
@@ -14,6 +14,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <i2c.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 
 #include "platinum.h"
 
diff --git a/board/barco/platinum/platinum_titanium.c b/board/barco/platinum/platinum_titanium.c
index 5758c147ed..9f7c93b4d5 100644
--- a/board/barco/platinum/platinum_titanium.c
+++ b/board/barco/platinum/platinum_titanium.c
@@ -12,6 +12,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <miiphy.h>
 #include <micrel.h>
+#include <linux/delay.h>
 
 #include "platinum.h"
 
diff --git a/board/barco/platinum/spl_picon.c b/board/barco/platinum/spl_picon.c
index ec6de460c1..253a64d28e 100644
--- a/board/barco/platinum/spl_picon.c
+++ b/board/barco/platinum/spl_picon.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-ddr.h>
diff --git a/board/barco/platinum/spl_titanium.c b/board/barco/platinum/spl_titanium.c
index 263371a2b2..8c91b752ff 100644
--- a/board/barco/platinum/spl_titanium.c
+++ b/board/barco/platinum/spl_titanium.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-ddr.h>
diff --git a/board/barco/titanium/titanium.c b/board/barco/titanium/titanium.c
index 6348f123ad..91c70a8473 100644
--- a/board/barco/titanium/titanium.c
+++ b/board/barco/titanium/titanium.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -21,6 +22,7 @@
 #include <micrel.h>
 #include <miiphy.h>
 #include <netdev.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/beacon/imx8mm/Kconfig b/board/beacon/imx8mm/Kconfig
new file mode 100644
index 0000000000..df3125eae9
--- /dev/null
+++ b/board/beacon/imx8mm/Kconfig
@@ -0,0 +1,14 @@
+if TARGET_IMX8MM_BEACON
+
+config SYS_BOARD
+	default "imx8mm"
+
+config SYS_VENDOR
+	default "beacon"
+
+config SYS_CONFIG_NAME
+	default "imx8mm_beacon"
+
+source "board/freescale/common/Kconfig"
+
+endif
diff --git a/board/beacon/imx8mm/MAINTAINERS b/board/beacon/imx8mm/MAINTAINERS
new file mode 100644
index 0000000000..e887db20a2
--- /dev/null
+++ b/board/beacon/imx8mm/MAINTAINERS
@@ -0,0 +1,7 @@
+i.MX8MM Beacon EmbeddedWorks Devkit
+
+M:	Adam Ford <aford173@gmail.com>
+S:	Maintained
+F:	board/beacon/imx8mm/
+F:	include/configs/imx8mm_beacon.h
+F:	configs/imx8mm_beacon_defconfig
diff --git a/board/beacon/imx8mm/Makefile b/board/beacon/imx8mm/Makefile
new file mode 100644
index 0000000000..7d3bd3112c
--- /dev/null
+++ b/board/beacon/imx8mm/Makefile
@@ -0,0 +1,13 @@
+#
+# Copyright 2020 Compass Electronics Group, LLC
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y += imx8mm_beacon.o
+obj-y += ../../freescale/common/
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-y += lpddr4_timing.o
+endif
diff --git a/board/beacon/imx8mm/README b/board/beacon/imx8mm/README
new file mode 100644
index 0000000000..dce176fa0b
--- /dev/null
+++ b/board/beacon/imx8mm/README
@@ -0,0 +1,37 @@
+U-Boot for the Beacon EmbeddedWorks Devkit
+
+Quick Start
+===========
+- Build the ARM Trusted firmware binary
+- Get ddr firmware
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+======================================
+Note: $(srctree) is U-Boot source directory
+
+$ git clone https://source.codeaurora.org/external/imx/imx-atf
+$ git checkout imx_4.19.35_1.0.0
+$ make PLAT=imx8mm bl31 ARCH=arm CROSS_COMPILE=aarch64-linux-gnu-
+$ cp build/imx8mm/release/bl31.bin $(srctree)
+
+Get the DDR firmware
+====================
+$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.5.bin
+$ chmod +x firmware-imx-8.5.bin
+$ ./firmware-imx-8.5
+$ cp firmware-imx-8.5/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
+
+Build U-Boot
+============
+$ make imx8mm_beacon_defconfig
+$ make flash.bin CROSS_COMPILE=aarch64-linux-gnu- ATF_LOAD_ADDR=0x920000
+
+Burn U-Boot to microSD Card
+===========================
+$ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33
+
+Boot
+====
+Set Boot switch to SD boot
diff --git a/board/beacon/imx8mm/imx8mm_beacon.c b/board/beacon/imx8mm/imx8mm_beacon.c
new file mode 100644
index 0000000000..e82e8b78d8
--- /dev/null
+++ b/board/beacon/imx8mm/imx8mm_beacon.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <netdev.h>
+
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+	/* rom_pointer[1] contains the size of TEE occupies */
+	if (rom_pointer[1])
+		gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
+	else
+		gd->ram_size = PHYS_SDRAM_SIZE;
+
+	return 0;
+}
+
+#if IS_ENABLED(CONFIG_FEC_MXC)
+static int setup_fec(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
+	clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
+
+	return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+	/* enable rgmii rxc skew and phy mode select to RGMII copper */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+	if (IS_ENABLED(CONFIG_FEC_MXC))
+		setup_fec();
+
+	return 0;
+}
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
diff --git a/board/beacon/imx8mm/lpddr4_timing.c b/board/beacon/imx8mm/lpddr4_timing.c
new file mode 100644
index 0000000000..8e48b9d81b
--- /dev/null
+++ b/board/beacon/imx8mm/lpddr4_timing.c
@@ -0,0 +1,1980 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 NXP
+ */
+
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+struct dram_cfg_param lpddr4_ddrc_cfg[] = {
+	/* Start to config, default 3200mbps */
+	{ DDRC_DBG1(0),	0x00000001 },
+	{ DDRC_PWRCTL(0), 0x00000001 },
+	{ DDRC_MSTR(0),	0xa1080020 },
+	{ DDRC_RFSHTMG(0), 0x005b00d2 },
+	{ DDRC_INIT0(0), 0xC003061B },
+	{ DDRC_INIT1(0), 0x009D0000 },
+	{ DDRC_INIT3(0), 0x00D4002D },
+	{ DDRC_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
+	{ DDRC_INIT6(0), 0x0066004a },
+	{ DDRC_INIT7(0), 0x0006004a },
+
+	{ DDRC_DRAMTMG0(0), 0x1A201B22 },
+	{ DDRC_DRAMTMG1(0), 0x00060633 },
+	{ DDRC_DRAMTMG3(0), 0x00C0C000 },
+	{ DDRC_DRAMTMG4(0), 0x0F04080F },
+	{ DDRC_DRAMTMG5(0), 0x02040C0C },
+	{ DDRC_DRAMTMG6(0), 0x01010007 },
+	{ DDRC_DRAMTMG7(0), 0x00000401 },
+	{ DDRC_DRAMTMG12(0), 0x00020600 },
+	{ DDRC_DRAMTMG13(0), 0x0C100002 },
+	{ DDRC_DRAMTMG14(0), 0x000000E6 },
+	{ DDRC_DRAMTMG17(0), 0x00A00050 },
+
+	{ DDRC_ZQCTL0(0), 0x03200018 },
+	{ DDRC_ZQCTL1(0), 0x028061A8 },
+	{ DDRC_ZQCTL2(0), 0x00000000 },
+
+	{ DDRC_DFITMG0(0), 0x0497820A },
+	{ DDRC_DFITMG2(0), 0x0000170A },
+	{ DDRC_DRAMTMG2(0), 0x070E171a },
+	{ DDRC_DBICTL(0), 0x00000001 },
+
+	{ DDRC_DFITMG1(0), 0x00080303 },
+	{ DDRC_DFIUPD0(0), 0xE0400018 },
+	{ DDRC_DFIUPD1(0), 0x00DF00E4 },
+	{ DDRC_DFIUPD2(0), 0x80000000 },
+	{ DDRC_DFIMISC(0), 0x00000011 },
+
+	{ DDRC_DFIPHYMSTR(0), 0x00000000 },
+	{ DDRC_RANKCTL(0), 0x00000c99 },
+
+	/* address mapping */
+	{ DDRC_ADDRMAP0(0), 0x0000001f },
+	{ DDRC_ADDRMAP1(0), 0x00080808 },
+	{ DDRC_ADDRMAP2(0), 0x00000000 },
+	{ DDRC_ADDRMAP3(0), 0x00000000 },
+	{ DDRC_ADDRMAP4(0), 0x00001f1f },
+	{ DDRC_ADDRMAP5(0), 0x07070707 },
+	{ DDRC_ADDRMAP6(0), 0x07070707 },
+	{ DDRC_ADDRMAP7(0), 0x00000f0f },
+
+	/* performance setting */
+	{ DDRC_SCHED(0), 0x29001701 },
+	{ DDRC_SCHED1(0), 0x0000002c },
+	{ DDRC_PERFHPR1(0), 0x04000030 },
+	{ DDRC_PERFLPR1(0), 0x900093e7 },
+	{ DDRC_PERFWR1(0), 0x20005574 },
+	{ DDRC_PCCFG(0), 0x00000111 },
+	{ DDRC_PCFGW_0(0), 0x000072ff },
+	{ DDRC_PCFGQOS0_0(0), 0x02100e07 },
+	{ DDRC_PCFGQOS1_0(0), 0x00620096 },
+	{ DDRC_PCFGWQOS0_0(0), 0x01100e07 },
+	{ DDRC_PCFGWQOS1_0(0), 0x00c8012c },
+
+	/* frequency P1&P2 */
+	/* Frequency 1: 400mbps */
+	{ DDRC_FREQ1_DRAMTMG0(0), 0x0d0b010c },
+	{ DDRC_FREQ1_DRAMTMG1(0), 0x00030410 },
+	{ DDRC_FREQ1_DRAMTMG2(0), 0x0203090c },
+	{ DDRC_FREQ1_DRAMTMG3(0), 0x00505006 },
+	{ DDRC_FREQ1_DRAMTMG4(0), 0x05040305 },
+	{ DDRC_FREQ1_DRAMTMG5(0), 0x0d0e0504 },
+	{ DDRC_FREQ1_DRAMTMG6(0), 0x0a060004 },
+	{ DDRC_FREQ1_DRAMTMG7(0), 0x0000090e },
+	{ DDRC_FREQ1_DRAMTMG14(0), 0x00000032 },
+	{ DDRC_FREQ1_DRAMTMG15(0), 0x00000000 },
+	{ DDRC_FREQ1_DRAMTMG17(0), 0x0036001b },
+	{ DDRC_FREQ1_DERATEINT(0), 0x7e9fbeb1 },
+	{ DDRC_FREQ1_DFITMG0(0), 0x03818200 },
+	{ DDRC_FREQ1_DFITMG2(0), 0x00000000 },
+	{ DDRC_FREQ1_RFSHTMG(0), 0x000C001c },
+	{ DDRC_FREQ1_INIT3(0), 0x00840000 },
+	{ DDRC_FREQ1_INIT4(0), 0x00310000 },
+	{ DDRC_FREQ1_INIT6(0), 0x0066004a },
+	{ DDRC_FREQ1_INIT7(0), 0x0006004a },
+
+	/* Frequency 2: 100mbps */
+	{ DDRC_FREQ2_DRAMTMG0(0), 0x0d0b010c },
+	{ DDRC_FREQ2_DRAMTMG1(0), 0x00030410 },
+	{ DDRC_FREQ2_DRAMTMG2(0), 0x0203090c },
+	{ DDRC_FREQ2_DRAMTMG3(0), 0x00505006 },
+	{ DDRC_FREQ2_DRAMTMG4(0), 0x05040305 },
+	{ DDRC_FREQ2_DRAMTMG5(0), 0x0d0e0504 },
+	{ DDRC_FREQ2_DRAMTMG6(0), 0x0a060004 },
+	{ DDRC_FREQ2_DRAMTMG7(0), 0x0000090e },
+	{ DDRC_FREQ2_DRAMTMG14(0), 0x00000032 },
+	{ DDRC_FREQ2_DRAMTMG17(0), 0x0036001b },
+	{ DDRC_FREQ2_DERATEINT(0), 0x7e9fbeb1 },
+	{ DDRC_FREQ2_DFITMG0(0), 0x03818200 },
+	{ DDRC_FREQ2_DFITMG2(0), 0x00000000 },
+	{ DDRC_FREQ2_RFSHTMG(0), 0x0003800c },
+	{ DDRC_FREQ2_RFSHTMG(0), 0x00030007 },
+	{ DDRC_FREQ2_INIT3(0), 0x00840000 },
+	{ DDRC_FREQ2_INIT4(0), 0x00310008 },
+	{ DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
+	{ DDRC_FREQ2_INIT6(0), 0x0066004a },
+	{ DDRC_FREQ2_INIT7(0), 0x0006004a },
+
+	/* boot start point */
+	{ DDRC_MSTR2(0), 0x2 }, //DDRC_MSTR2
+};
+
+/* PHY Initialize Configuration */
+struct dram_cfg_param lpddr4_ddrphy_cfg[] = {
+	{ 0x1005f, 0x1ff },
+	{ 0x1015f, 0x1ff },
+	{ 0x1105f, 0x1ff },
+	{ 0x1115f, 0x1ff },
+	{ 0x1205f, 0x1ff },
+	{ 0x1215f, 0x1ff },
+	{ 0x1305f, 0x1ff },
+	{ 0x1315f, 0x1ff },
+
+	{ 0x11005f, 0x1ff },
+	{ 0x11015f, 0x1ff },
+	{ 0x11105f, 0x1ff },
+	{ 0x11115f, 0x1ff },
+	{ 0x11205f, 0x1ff },
+	{ 0x11215f, 0x1ff },
+	{ 0x11305f, 0x1ff },
+	{ 0x11315f, 0x1ff },
+
+	{ 0x21005f, 0x1ff },
+	{ 0x21015f, 0x1ff },
+	{ 0x21105f, 0x1ff },
+	{ 0x21115f, 0x1ff },
+	{ 0x21205f, 0x1ff },
+	{ 0x21215f, 0x1ff },
+	{ 0x21305f, 0x1ff },
+	{ 0x21315f, 0x1ff },
+
+	{ 0x55, 0x1ff },
+	{ 0x1055, 0x1ff },
+	{ 0x2055, 0x1ff },
+	{ 0x3055, 0x1ff },
+	{ 0x4055, 0x1ff },
+	{ 0x5055, 0x1ff },
+	{ 0x6055, 0x1ff },
+	{ 0x7055, 0x1ff },
+	{ 0x8055, 0x1ff },
+	{ 0x9055, 0x1ff },
+
+	{ 0x200c5, 0x19 },
+	{ 0x1200c5, 0x7 },
+	{ 0x2200c5, 0x7 },
+
+	{ 0x2002e, 0x2 },
+	{ 0x12002e, 0x2 },
+	{ 0x22002e, 0x2 },
+
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+
+	{ 0x20024, 0xab },
+	{ 0x2003a, 0x0 },
+
+	{ 0x120024, 0xab },
+	{ 0x2003a, 0x0 },
+
+	{ 0x220024, 0xab },
+	{ 0x2003a, 0x0 },
+
+	{ 0x20056, 0x3 },
+	{ 0x120056, 0xa },
+	{ 0x220056, 0xa },
+
+	{ 0x1004d, 0xe00 },
+	{ 0x1014d, 0xe00 },
+	{ 0x1104d, 0xe00 },
+	{ 0x1114d, 0xe00 },
+	{ 0x1204d, 0xe00 },
+	{ 0x1214d, 0xe00 },
+	{ 0x1304d, 0xe00 },
+	{ 0x1314d, 0xe00 },
+
+	{ 0x11004d, 0xe00 },
+	{ 0x11014d, 0xe00 },
+	{ 0x11104d, 0xe00 },
+	{ 0x11114d, 0xe00 },
+	{ 0x11204d, 0xe00 },
+	{ 0x11214d, 0xe00 },
+	{ 0x11304d, 0xe00 },
+	{ 0x11314d, 0xe00 },
+
+	{ 0x21004d, 0xe00 },
+	{ 0x21014d, 0xe00 },
+	{ 0x21104d, 0xe00 },
+	{ 0x21114d, 0xe00 },
+	{ 0x21204d, 0xe00 },
+	{ 0x21214d, 0xe00 },
+	{ 0x21304d, 0xe00 },
+	{ 0x21314d, 0xe00 },
+
+	{ 0x10049, 0xfbe },
+	{ 0x10149, 0xfbe },
+	{ 0x11049, 0xfbe },
+	{ 0x11149, 0xfbe },
+	{ 0x12049, 0xfbe },
+	{ 0x12149, 0xfbe },
+	{ 0x13049, 0xfbe },
+	{ 0x13149, 0xfbe },
+
+	{ 0x110049, 0xfbe },
+	{ 0x110149, 0xfbe },
+	{ 0x111049, 0xfbe },
+	{ 0x111149, 0xfbe },
+	{ 0x112049, 0xfbe },
+	{ 0x112149, 0xfbe },
+	{ 0x113049, 0xfbe },
+	{ 0x113149, 0xfbe },
+
+	{ 0x210049, 0xfbe },
+	{ 0x210149, 0xfbe },
+	{ 0x211049, 0xfbe },
+	{ 0x211149, 0xfbe },
+	{ 0x212049, 0xfbe },
+	{ 0x212149, 0xfbe },
+	{ 0x213049, 0xfbe },
+	{ 0x213149, 0xfbe },
+
+	{ 0x43, 0x63 },
+	{ 0x1043, 0x63 },
+	{ 0x2043, 0x63 },
+	{ 0x3043, 0x63 },
+	{ 0x4043, 0x63 },
+	{ 0x5043, 0x63 },
+	{ 0x6043, 0x63 },
+	{ 0x7043, 0x63 },
+	{ 0x8043, 0x63 },
+	{ 0x9043, 0x63 },
+
+	{ 0x20018, 0x3 },
+	{ 0x20075, 0x4 },
+	{ 0x20050, 0x0 },
+	{ 0x20008, 0x2ee },
+	{ 0x120008, 0x64 },
+	{ 0x220008, 0x19 },
+	{ 0x20088, 0x9 },
+
+	{ 0x200b2, 0x1d4 },
+	{ 0x10043, 0x5a1 },
+	{ 0x10143, 0x5a1 },
+	{ 0x11043, 0x5a1 },
+	{ 0x11143, 0x5a1 },
+	{ 0x12043, 0x5a1 },
+	{ 0x12143, 0x5a1 },
+	{ 0x13043, 0x5a1 },
+	{ 0x13143, 0x5a1 },
+
+	{ 0x1200b2, 0xdc },
+	{ 0x110043, 0x5a1 },
+	{ 0x110143, 0x5a1 },
+	{ 0x111043, 0x5a1 },
+	{ 0x111143, 0x5a1 },
+	{ 0x112043, 0x5a1 },
+	{ 0x112143, 0x5a1 },
+	{ 0x113043, 0x5a1 },
+	{ 0x113143, 0x5a1 },
+
+	{ 0x2200b2, 0xdc },
+	{ 0x210043, 0x5a1 },
+	{ 0x210143, 0x5a1 },
+	{ 0x211043, 0x5a1 },
+	{ 0x211143, 0x5a1 },
+	{ 0x212043, 0x5a1 },
+	{ 0x212143, 0x5a1 },
+	{ 0x213043, 0x5a1 },
+	{ 0x213143, 0x5a1 },
+
+	{ 0x200fa, 0x1 },
+	{ 0x1200fa, 0x1 },
+	{ 0x2200fa, 0x1 },
+
+	{ 0x20019, 0x1 },
+	{ 0x120019, 0x1 },
+	{ 0x220019, 0x1 },
+
+	{ 0x200f0, 0x660 },
+	{ 0x200f1, 0x0 },
+	{ 0x200f2, 0x4444 },
+	{ 0x200f3, 0x8888 },
+	{ 0x200f4, 0x5665 },
+	{ 0x200f5, 0x0 },
+	{ 0x200f6, 0x0 },
+	{ 0x200f7, 0xf000 },
+
+	{ 0x20025, 0x0 },
+	{ 0x2002d, LPDDR4_PHY_DMIPinPresent },
+	{ 0x12002d, LPDDR4_PHY_DMIPinPresent },
+	{ 0x22002d, LPDDR4_PHY_DMIPinPresent },
+	{ 0x200c7, 0x21 },
+	{ 0x200ca, 0x24 },
+	{ 0x1200c7, 0x21 },
+	{ 0x1200ca, 0x24 },
+	{ 0x2200c7, 0x21 },
+	{ 0x2200ca, 0x24 },
+};
+
+/* ddr phy trained csr */
+struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
+	{ 0x12180, 0x0 },
+	{ 0x112180, 0x0 },
+	{ 0x212180, 0x0 },
+	{ 0x13080, 0x0 },
+	{ 0x113080, 0x0 },
+	{ 0x213080, 0x0 },
+	{ 0x13180, 0x0 },
+	{ 0x113180, 0x0 },
+	{ 0x213180, 0x0 },
+	{ 0x10081, 0x0 },
+	{ 0x110081, 0x0 },
+	{ 0x210081, 0x0 },
+	{ 0x10181, 0x0 },
+	{ 0x110181, 0x0 },
+	{ 0x210181, 0x0 },
+	{ 0x11081, 0x0 },
+	{ 0x111081, 0x0 },
+	{ 0x211081, 0x0 },
+	{ 0x11181, 0x0 },
+	{ 0x111181, 0x0 },
+	{ 0x211181, 0x0 },
+	{ 0x12081, 0x0 },
+	{ 0x112081, 0x0 },
+	{ 0x212081, 0x0 },
+	{ 0x12181, 0x0 },
+	{ 0x112181, 0x0 },
+	{ 0x212181, 0x0 },
+	{ 0x13081, 0x0 },
+	{ 0x113081, 0x0 },
+	{ 0x213081, 0x0 },
+	{ 0x13181, 0x0 },
+	{ 0x113181, 0x0 },
+	{ 0x213181, 0x0 },
+	{ 0x100d0, 0x0 },
+	{ 0x1100d0, 0x0 },
+	{ 0x2100d0, 0x0 },
+	{ 0x101d0, 0x0 },
+	{ 0x1101d0, 0x0 },
+	{ 0x2101d0, 0x0 },
+	{ 0x110d0, 0x0 },
+	{ 0x1110d0, 0x0 },
+	{ 0x2110d0, 0x0 },
+	{ 0x111d0, 0x0 },
+	{ 0x1111d0, 0x0 },
+	{ 0x2111d0, 0x0 },
+	{ 0x120d0, 0x0 },
+	{ 0x1120d0, 0x0 },
+	{ 0x2120d0, 0x0 },
+	{ 0x121d0, 0x0 },
+	{ 0x1121d0, 0x0 },
+	{ 0x2121d0, 0x0 },
+	{ 0x130d0, 0x0 },
+	{ 0x1130d0, 0x0 },
+	{ 0x2130d0, 0x0 },
+	{ 0x131d0, 0x0 },
+	{ 0x1131d0, 0x0 },
+	{ 0x2131d0, 0x0 },
+	{ 0x100d1, 0x0 },
+	{ 0x1100d1, 0x0 },
+	{ 0x2100d1, 0x0 },
+	{ 0x101d1, 0x0 },
+	{ 0x1101d1, 0x0 },
+	{ 0x2101d1, 0x0 },
+	{ 0x110d1, 0x0 },
+	{ 0x1110d1, 0x0 },
+	{ 0x2110d1, 0x0 },
+	{ 0x111d1, 0x0 },
+	{ 0x1111d1, 0x0 },
+	{ 0x2111d1, 0x0 },
+	{ 0x120d1, 0x0 },
+	{ 0x1120d1, 0x0 },
+	{ 0x2120d1, 0x0 },
+	{ 0x121d1, 0x0 },
+	{ 0x1121d1, 0x0 },
+	{ 0x2121d1, 0x0 },
+	{ 0x130d1, 0x0 },
+	{ 0x1130d1, 0x0 },
+	{ 0x2130d1, 0x0 },
+	{ 0x131d1, 0x0 },
+	{ 0x1131d1, 0x0 },
+	{ 0x2131d1, 0x0 },
+	{ 0x10068, 0x0 },
+	{ 0x10168, 0x0 },
+	{ 0x10268, 0x0 },
+	{ 0x10368, 0x0 },
+	{ 0x10468, 0x0 },
+	{ 0x10568, 0x0 },
+	{ 0x10668, 0x0 },
+	{ 0x10768, 0x0 },
+	{ 0x10868, 0x0 },
+	{ 0x11068, 0x0 },
+	{ 0x11168, 0x0 },
+	{ 0x11268, 0x0 },
+	{ 0x11368, 0x0 },
+	{ 0x11468, 0x0 },
+	{ 0x11568, 0x0 },
+	{ 0x11668, 0x0 },
+	{ 0x11768, 0x0 },
+	{ 0x11868, 0x0 },
+	{ 0x12068, 0x0 },
+	{ 0x12168, 0x0 },
+	{ 0x12268, 0x0 },
+	{ 0x12368, 0x0 },
+	{ 0x12468, 0x0 },
+	{ 0x12568, 0x0 },
+	{ 0x12668, 0x0 },
+	{ 0x12768, 0x0 },
+	{ 0x12868, 0x0 },
+	{ 0x13068, 0x0 },
+	{ 0x13168, 0x0 },
+	{ 0x13268, 0x0 },
+	{ 0x13368, 0x0 },
+	{ 0x13468, 0x0 },
+	{ 0x13568, 0x0 },
+	{ 0x13668, 0x0 },
+	{ 0x13768, 0x0 },
+	{ 0x13868, 0x0 },
+	{ 0x10069, 0x0 },
+	{ 0x10169, 0x0 },
+	{ 0x10269, 0x0 },
+	{ 0x10369, 0x0 },
+	{ 0x10469, 0x0 },
+	{ 0x10569, 0x0 },
+	{ 0x10669, 0x0 },
+	{ 0x10769, 0x0 },
+	{ 0x10869, 0x0 },
+	{ 0x11069, 0x0 },
+	{ 0x11169, 0x0 },
+	{ 0x11269, 0x0 },
+	{ 0x11369, 0x0 },
+	{ 0x11469, 0x0 },
+	{ 0x11569, 0x0 },
+	{ 0x11669, 0x0 },
+	{ 0x11769, 0x0 },
+	{ 0x11869, 0x0 },
+	{ 0x12069, 0x0 },
+	{ 0x12169, 0x0 },
+	{ 0x12269, 0x0 },
+	{ 0x12369, 0x0 },
+	{ 0x12469, 0x0 },
+	{ 0x12569, 0x0 },
+	{ 0x12669, 0x0 },
+	{ 0x12769, 0x0 },
+	{ 0x12869, 0x0 },
+	{ 0x13069, 0x0 },
+	{ 0x13169, 0x0 },
+	{ 0x13269, 0x0 },
+	{ 0x13369, 0x0 },
+	{ 0x13469, 0x0 },
+	{ 0x13569, 0x0 },
+	{ 0x13669, 0x0 },
+	{ 0x13769, 0x0 },
+	{ 0x13869, 0x0 },
+	{ 0x1008c, 0x0 },
+	{ 0x11008c, 0x0 },
+	{ 0x21008c, 0x0 },
+	{ 0x1018c, 0x0 },
+	{ 0x11018c, 0x0 },
+	{ 0x21018c, 0x0 },
+	{ 0x1108c, 0x0 },
+	{ 0x11108c, 0x0 },
+	{ 0x21108c, 0x0 },
+	{ 0x1118c, 0x0 },
+	{ 0x11118c, 0x0 },
+	{ 0x21118c, 0x0 },
+	{ 0x1208c, 0x0 },
+	{ 0x11208c, 0x0 },
+	{ 0x21208c, 0x0 },
+	{ 0x1218c, 0x0 },
+	{ 0x11218c, 0x0 },
+	{ 0x21218c, 0x0 },
+	{ 0x1308c, 0x0 },
+	{ 0x11308c, 0x0 },
+	{ 0x21308c, 0x0 },
+	{ 0x1318c, 0x0 },
+	{ 0x11318c, 0x0 },
+	{ 0x21318c, 0x0 },
+	{ 0x1008d, 0x0 },
+	{ 0x11008d, 0x0 },
+	{ 0x21008d, 0x0 },
+	{ 0x1018d, 0x0 },
+	{ 0x11018d, 0x0 },
+	{ 0x21018d, 0x0 },
+	{ 0x1108d, 0x0 },
+	{ 0x11108d, 0x0 },
+	{ 0x21108d, 0x0 },
+	{ 0x1118d, 0x0 },
+	{ 0x11118d, 0x0 },
+	{ 0x21118d, 0x0 },
+	{ 0x1208d, 0x0 },
+	{ 0x11208d, 0x0 },
+	{ 0x21208d, 0x0 },
+	{ 0x1218d, 0x0 },
+	{ 0x11218d, 0x0 },
+	{ 0x21218d, 0x0 },
+	{ 0x1308d, 0x0 },
+	{ 0x11308d, 0x0 },
+	{ 0x21308d, 0x0 },
+	{ 0x1318d, 0x0 },
+	{ 0x11318d, 0x0 },
+	{ 0x21318d, 0x0 },
+	{ 0x100c0, 0x0 },
+	{ 0x1100c0, 0x0 },
+	{ 0x2100c0, 0x0 },
+	{ 0x101c0, 0x0 },
+	{ 0x1101c0, 0x0 },
+	{ 0x2101c0, 0x0 },
+	{ 0x102c0, 0x0 },
+	{ 0x1102c0, 0x0 },
+	{ 0x2102c0, 0x0 },
+	{ 0x103c0, 0x0 },
+	{ 0x1103c0, 0x0 },
+	{ 0x2103c0, 0x0 },
+	{ 0x104c0, 0x0 },
+	{ 0x1104c0, 0x0 },
+	{ 0x2104c0, 0x0 },
+	{ 0x105c0, 0x0 },
+	{ 0x1105c0, 0x0 },
+	{ 0x2105c0, 0x0 },
+	{ 0x106c0, 0x0 },
+	{ 0x1106c0, 0x0 },
+	{ 0x2106c0, 0x0 },
+	{ 0x107c0, 0x0 },
+	{ 0x1107c0, 0x0 },
+	{ 0x2107c0, 0x0 },
+	{ 0x108c0, 0x0 },
+	{ 0x1108c0, 0x0 },
+	{ 0x2108c0, 0x0 },
+	{ 0x110c0, 0x0 },
+	{ 0x1110c0, 0x0 },
+	{ 0x2110c0, 0x0 },
+	{ 0x111c0, 0x0 },
+	{ 0x1111c0, 0x0 },
+	{ 0x2111c0, 0x0 },
+	{ 0x112c0, 0x0 },
+	{ 0x1112c0, 0x0 },
+	{ 0x2112c0, 0x0 },
+	{ 0x113c0, 0x0 },
+	{ 0x1113c0, 0x0 },
+	{ 0x2113c0, 0x0 },
+	{ 0x114c0, 0x0 },
+	{ 0x1114c0, 0x0 },
+	{ 0x2114c0, 0x0 },
+	{ 0x115c0, 0x0 },
+	{ 0x1115c0, 0x0 },
+	{ 0x2115c0, 0x0 },
+	{ 0x116c0, 0x0 },
+	{ 0x1116c0, 0x0 },
+	{ 0x2116c0, 0x0 },
+	{ 0x117c0, 0x0 },
+	{ 0x1117c0, 0x0 },
+	{ 0x2117c0, 0x0 },
+	{ 0x118c0, 0x0 },
+	{ 0x1118c0, 0x0 },
+	{ 0x2118c0, 0x0 },
+	{ 0x120c0, 0x0 },
+	{ 0x1120c0, 0x0 },
+	{ 0x2120c0, 0x0 },
+	{ 0x121c0, 0x0 },
+	{ 0x1121c0, 0x0 },
+	{ 0x2121c0, 0x0 },
+	{ 0x122c0, 0x0 },
+	{ 0x1122c0, 0x0 },
+	{ 0x2122c0, 0x0 },
+	{ 0x123c0, 0x0 },
+	{ 0x1123c0, 0x0 },
+	{ 0x2123c0, 0x0 },
+	{ 0x124c0, 0x0 },
+	{ 0x1124c0, 0x0 },
+	{ 0x2124c0, 0x0 },
+	{ 0x125c0, 0x0 },
+	{ 0x1125c0, 0x0 },
+	{ 0x2125c0, 0x0 },
+	{ 0x126c0, 0x0 },
+	{ 0x1126c0, 0x0 },
+	{ 0x2126c0, 0x0 },
+	{ 0x127c0, 0x0 },
+	{ 0x1127c0, 0x0 },
+	{ 0x2127c0, 0x0 },
+	{ 0x128c0, 0x0 },
+	{ 0x1128c0, 0x0 },
+	{ 0x2128c0, 0x0 },
+	{ 0x130c0, 0x0 },
+	{ 0x1130c0, 0x0 },
+	{ 0x2130c0, 0x0 },
+	{ 0x131c0, 0x0 },
+	{ 0x1131c0, 0x0 },
+	{ 0x2131c0, 0x0 },
+	{ 0x132c0, 0x0 },
+	{ 0x1132c0, 0x0 },
+	{ 0x2132c0, 0x0 },
+	{ 0x133c0, 0x0 },
+	{ 0x1133c0, 0x0 },
+	{ 0x2133c0, 0x0 },
+	{ 0x134c0, 0x0 },
+	{ 0x1134c0, 0x0 },
+	{ 0x2134c0, 0x0 },
+	{ 0x135c0, 0x0 },
+	{ 0x1135c0, 0x0 },
+	{ 0x2135c0, 0x0 },
+	{ 0x136c0, 0x0 },
+	{ 0x1136c0, 0x0 },
+	{ 0x2136c0, 0x0 },
+	{ 0x137c0, 0x0 },
+	{ 0x1137c0, 0x0 },
+	{ 0x2137c0, 0x0 },
+	{ 0x138c0, 0x0 },
+	{ 0x1138c0, 0x0 },
+	{ 0x2138c0, 0x0 },
+	{ 0x100c1, 0x0 },
+	{ 0x1100c1, 0x0 },
+	{ 0x2100c1, 0x0 },
+	{ 0x101c1, 0x0 },
+	{ 0x1101c1, 0x0 },
+	{ 0x2101c1, 0x0 },
+	{ 0x102c1, 0x0 },
+	{ 0x1102c1, 0x0 },
+	{ 0x2102c1, 0x0 },
+	{ 0x103c1, 0x0 },
+	{ 0x1103c1, 0x0 },
+	{ 0x2103c1, 0x0 },
+	{ 0x104c1, 0x0 },
+	{ 0x1104c1, 0x0 },
+	{ 0x2104c1, 0x0 },
+	{ 0x105c1, 0x0 },
+	{ 0x1105c1, 0x0 },
+	{ 0x2105c1, 0x0 },
+	{ 0x106c1, 0x0 },
+	{ 0x1106c1, 0x0 },
+	{ 0x2106c1, 0x0 },
+	{ 0x107c1, 0x0 },
+	{ 0x1107c1, 0x0 },
+	{ 0x2107c1, 0x0 },
+	{ 0x108c1, 0x0 },
+	{ 0x1108c1, 0x0 },
+	{ 0x2108c1, 0x0 },
+	{ 0x110c1, 0x0 },
+	{ 0x1110c1, 0x0 },
+	{ 0x2110c1, 0x0 },
+	{ 0x111c1, 0x0 },
+	{ 0x1111c1, 0x0 },
+	{ 0x2111c1, 0x0 },
+	{ 0x112c1, 0x0 },
+	{ 0x1112c1, 0x0 },
+	{ 0x2112c1, 0x0 },
+	{ 0x113c1, 0x0 },
+	{ 0x1113c1, 0x0 },
+	{ 0x2113c1, 0x0 },
+	{ 0x114c1, 0x0 },
+	{ 0x1114c1, 0x0 },
+	{ 0x2114c1, 0x0 },
+	{ 0x115c1, 0x0 },
+	{ 0x1115c1, 0x0 },
+	{ 0x2115c1, 0x0 },
+	{ 0x116c1, 0x0 },
+	{ 0x1116c1, 0x0 },
+	{ 0x2116c1, 0x0 },
+	{ 0x117c1, 0x0 },
+	{ 0x1117c1, 0x0 },
+	{ 0x2117c1, 0x0 },
+	{ 0x118c1, 0x0 },
+	{ 0x1118c1, 0x0 },
+	{ 0x2118c1, 0x0 },
+	{ 0x120c1, 0x0 },
+	{ 0x1120c1, 0x0 },
+	{ 0x2120c1, 0x0 },
+	{ 0x121c1, 0x0 },
+	{ 0x1121c1, 0x0 },
+	{ 0x2121c1, 0x0 },
+	{ 0x122c1, 0x0 },
+	{ 0x1122c1, 0x0 },
+	{ 0x2122c1, 0x0 },
+	{ 0x123c1, 0x0 },
+	{ 0x1123c1, 0x0 },
+	{ 0x2123c1, 0x0 },
+	{ 0x124c1, 0x0 },
+	{ 0x1124c1, 0x0 },
+	{ 0x2124c1, 0x0 },
+	{ 0x125c1, 0x0 },
+	{ 0x1125c1, 0x0 },
+	{ 0x2125c1, 0x0 },
+	{ 0x126c1, 0x0 },
+	{ 0x1126c1, 0x0 },
+	{ 0x2126c1, 0x0 },
+	{ 0x127c1, 0x0 },
+	{ 0x1127c1, 0x0 },
+	{ 0x2127c1, 0x0 },
+	{ 0x128c1, 0x0 },
+	{ 0x1128c1, 0x0 },
+	{ 0x2128c1, 0x0 },
+	{ 0x130c1, 0x0 },
+	{ 0x1130c1, 0x0 },
+	{ 0x2130c1, 0x0 },
+	{ 0x131c1, 0x0 },
+	{ 0x1131c1, 0x0 },
+	{ 0x2131c1, 0x0 },
+	{ 0x132c1, 0x0 },
+	{ 0x1132c1, 0x0 },
+	{ 0x2132c1, 0x0 },
+	{ 0x133c1, 0x0 },
+	{ 0x1133c1, 0x0 },
+	{ 0x2133c1, 0x0 },
+	{ 0x134c1, 0x0 },
+	{ 0x1134c1, 0x0 },
+	{ 0x2134c1, 0x0 },
+	{ 0x135c1, 0x0 },
+	{ 0x1135c1, 0x0 },
+	{ 0x2135c1, 0x0 },
+	{ 0x136c1, 0x0 },
+	{ 0x1136c1, 0x0 },
+	{ 0x2136c1, 0x0 },
+	{ 0x137c1, 0x0 },
+	{ 0x1137c1, 0x0 },
+	{ 0x2137c1, 0x0 },
+	{ 0x138c1, 0x0 },
+	{ 0x1138c1, 0x0 },
+	{ 0x2138c1, 0x0 },
+	{ 0x10020, 0x0 },
+	{ 0x110020, 0x0 },
+	{ 0x210020, 0x0 },
+	{ 0x11020, 0x0 },
+	{ 0x111020, 0x0 },
+	{ 0x211020, 0x0 },
+	{ 0x12020, 0x0 },
+	{ 0x112020, 0x0 },
+	{ 0x212020, 0x0 },
+	{ 0x13020, 0x0 },
+	{ 0x113020, 0x0 },
+	{ 0x213020, 0x0 },
+	{ 0x20072, 0x0 },
+	{ 0x20073, 0x0 },
+	{ 0x20074, 0x0 },
+	{ 0x100aa, 0x0 },
+	{ 0x110aa, 0x0 },
+	{ 0x120aa, 0x0 },
+	{ 0x130aa, 0x0 },
+	{ 0x20010, 0x0 },
+	{ 0x120010, 0x0 },
+	{ 0x220010, 0x0 },
+	{ 0x20011, 0x0 },
+	{ 0x120011, 0x0 },
+	{ 0x220011, 0x0 },
+	{ 0x100ae, 0x0 },
+	{ 0x1100ae, 0x0 },
+	{ 0x2100ae, 0x0 },
+	{ 0x100af, 0x0 },
+	{ 0x1100af, 0x0 },
+	{ 0x2100af, 0x0 },
+	{ 0x110ae, 0x0 },
+	{ 0x1110ae, 0x0 },
+	{ 0x2110ae, 0x0 },
+	{ 0x110af, 0x0 },
+	{ 0x1110af, 0x0 },
+	{ 0x2110af, 0x0 },
+	{ 0x120ae, 0x0 },
+	{ 0x1120ae, 0x0 },
+	{ 0x2120ae, 0x0 },
+	{ 0x120af, 0x0 },
+	{ 0x1120af, 0x0 },
+	{ 0x2120af, 0x0 },
+	{ 0x130ae, 0x0 },
+	{ 0x1130ae, 0x0 },
+	{ 0x2130ae, 0x0 },
+	{ 0x130af, 0x0 },
+	{ 0x1130af, 0x0 },
+	{ 0x2130af, 0x0 },
+	{ 0x20020, 0x0 },
+	{ 0x120020, 0x0 },
+	{ 0x220020, 0x0 },
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x0 },
+	{ 0x100a2, 0x0 },
+	{ 0x100a3, 0x0 },
+	{ 0x100a4, 0x0 },
+	{ 0x100a5, 0x0 },
+	{ 0x100a6, 0x0 },
+	{ 0x100a7, 0x0 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x0 },
+	{ 0x110a2, 0x0 },
+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+struct dram_cfg_param lpddr4_fsp0_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54000, 0x0 },
+	{ 0x54001, 0x0 },
+	{ 0x54002, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt
+	{ 0x54006, LPDDR4_PHY_VREF_VALUE },
+	{ 0x54007, 0x0 },
+	{ 0x54008, 0x131f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400a, 0x0 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400c, 0x0 },
+	{ 0x5400d, 0x0 },
+	{ 0x5400e, 0x0 },
+	{ 0x5400f, 0x0 },
+	{ 0x54010, 0x0 },
+	{ 0x54011, 0x0 },
+	{ 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) },
+	{ 0x54013, 0x0 },
+	{ 0x54014, 0x0 },
+	{ 0x54015, 0x0 },
+	{ 0x54016, 0x0 },
+	{ 0x54017, 0x0 },
+	{ 0x54018, 0x0 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x5401b, 0x4d66 },
+	{ 0x5401c, 0x4d08 },
+	{ 0x5401d, 0x0 },
+	{ 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x54021, 0x4d66 },
+	{ 0x54022, 0x4d08 },
+	{ 0x54023, 0x0 },
+	{ 0x54024, LPDDR4_MR22_RANK1/*0x16*/ },
+	{ 0x54025, 0x0 },
+	{ 0x54026, 0x0 },
+	{ 0x54027, 0x0 },
+	{ 0x54028, 0x0 },
+	{ 0x54029, 0x0 },
+	{ 0x5402a, 0x0 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, LPDDR4_CS },
+	{ 0x5402d, 0x0 },
+	{ 0x5402e, 0x0 },
+	{ 0x5402f, 0x0 },
+	{ 0x54030, 0x0 },
+	{ 0x54031, 0x0 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x84d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x84d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ },
+	{ 0x5403e, 0x0 },
+	{ 0x5403f, 0x0 },
+	{ 0x54040, 0x0 },
+	{ 0x54041, 0x0 },
+	{ 0x54042, 0x0 },
+	{ 0x54043, 0x0 },
+	{ 0x54044, 0x0 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P1 message block paremeter for training firmware */
+struct dram_cfg_param lpddr4_fsp1_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54000, 0x0 },
+	{ 0x54001, 0x0 },
+	{ 0x54002, 0x101 },
+	{ 0x54003, 0x190 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },/* PHY Ron/Rtt */
+	{ 0x54006, LPDDR4_PHY_VREF_VALUE },
+	{ 0x54007, 0x0 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400a, 0x0 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400c, 0x0 },
+	{ 0x5400d, 0x0 },
+	{ 0x5400e, 0x0 },
+	{ 0x5400f, 0x0 },
+	{ 0x54010, 0x0 },
+	{ 0x54011, 0x0 },
+	{ 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) },
+	{ 0x54013, 0x0 },
+	{ 0x54014, 0x0 },
+	{ 0x54015, 0x0 },
+	{ 0x54016, 0x0 },
+	{ 0x54017, 0x0 },
+	{ 0x54018, 0x0 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x5401b, 0x4d66 },
+	{ 0x5401c, 0x4d08 },
+	{ 0x5401d, 0x0 },
+	{ 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x54021, 0x4d66 },
+	{ 0x54022, 0x4d08 },
+	{ 0x54023, 0x0 },
+	{ 0x54024, LPDDR4_MR22_RANK1/*0x16*/ },
+	{ 0x54025, 0x0 },
+	{ 0x54026, 0x0 },
+	{ 0x54027, 0x0 },
+	{ 0x54028, 0x0 },
+	{ 0x54029, 0x0 },
+	{ 0x5402a, 0x0 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, LPDDR4_CS },
+	{ 0x5402d, 0x0 },
+	{ 0x5402e, 0x0 },
+	{ 0x5402f, 0x0 },
+	{ 0x54030, 0x0 },
+	{ 0x54031, 0x0 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x84d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x84d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ },
+	{ 0x5403e, 0x0 },
+	{ 0x5403f, 0x0 },
+	{ 0x54040, 0x0 },
+	{ 0x54041, 0x0 },
+	{ 0x54042, 0x0 },
+	{ 0x54043, 0x0 },
+	{ 0x54044, 0x0 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P1 message block paremeter for training firmware */
+struct dram_cfg_param lpddr4_fsp2_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54000, 0x0 },
+	{ 0x54001, 0x0 },
+	{ 0x54002, 0x102 },
+	{ 0x54003, 0x64 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt
+	{ 0x54006, LPDDR4_PHY_VREF_VALUE },
+	{ 0x54007, 0x0 },
+	{ 0x54008, 0x121f },
+	{ 0x54009, 0xc8 },
+	{ 0x5400a, 0x0 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400c, 0x0 },
+	{ 0x5400d, 0x0 },
+	{ 0x5400e, 0x0 },
+	{ 0x5400f, 0x0 },
+	{ 0x54010, 0x0 },
+	{ 0x54011, 0x0 },
+	{ 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) },
+	{ 0x54013, 0x0 },
+	{ 0x54014, 0x0 },
+	{ 0x54015, 0x0 },
+	{ 0x54016, 0x0 },
+	{ 0x54017, 0x0 },
+	{ 0x54018, 0x0 },
+	{ 0x54019, 0x84 },
+	{ 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x5401b, 0x4d66 },
+	{ 0x5401c, 0x4d08 },
+	{ 0x5401d, 0x0 },
+	{ 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ },
+	{ 0x5401f, 0x84 },
+	{ 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x54021, 0x4d66 },
+	{ 0x54022, 0x4d08 },
+	{ 0x54023, 0x0 },
+	{ 0x54024, LPDDR4_MR22_RANK1/*0x16*/ },
+	{ 0x54025, 0x0 },
+	{ 0x54026, 0x0 },
+	{ 0x54027, 0x0 },
+	{ 0x54028, 0x0 },
+	{ 0x54029, 0x0 },
+	{ 0x5402a, 0x0 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, LPDDR4_CS },
+	{ 0x5402d, 0x0 },
+	{ 0x5402e, 0x0 },
+	{ 0x5402f, 0x0 },
+	{ 0x54030, 0x0 },
+	{ 0x54031, 0x0 },
+	{ 0x54032, 0x8400 },
+	{ 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x84d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ },
+	{ 0x54038, 0x8400 },
+	{ 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x84d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ },
+	{ 0x5403e, 0x0 },
+	{ 0x5403f, 0x0 },
+	{ 0x54040, 0x0 },
+	{ 0x54041, 0x0 },
+	{ 0x54042, 0x0 },
+	{ 0x54043, 0x0 },
+	{ 0x54044, 0x0 },
+	{ 0xd0000, 0x1 },
+};
+
+/* P0 2D message block paremeter for training firmware */
+struct dram_cfg_param lpddr4_fsp0_2d_cfg[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x54000, 0x0 },
+	{ 0x54001, 0x0 },
+	{ 0x54002, 0x0 },
+	{ 0x54003, 0xbb8 },
+	{ 0x54004, 0x2 },
+	{ 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt
+	{ 0x54006, LPDDR4_PHY_VREF_VALUE },
+	{ 0x54007, 0x0 },
+	{ 0x54008, 0x61 },
+	{ 0x54009, 0xc8 },
+	{ 0x5400a, 0x0 },
+	{ 0x5400b, 0x2 },
+	{ 0x5400c, 0x0 },
+	{ 0x5400d, 0x0 },
+	{ 0x5400e, 0x0 },
+	{ 0x5400f, 0x100 },
+	{ 0x54010, 0x1f7f },
+	{ 0x54011, 0x0 },
+	{ 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) },
+	{ 0x54013, 0x0 },
+	{ 0x54014, 0x0 },
+	{ 0x54015, 0x0 },
+	{ 0x54016, 0x0 },
+	{ 0x54017, 0x0 },
+	{ 0x54018, 0x0 },
+	{ 0x54019, 0x2dd4 },
+	{ 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x5401b, 0x4d66 },
+	{ 0x5401c, 0x4d08 },
+	{ 0x5401d, 0x0 },
+	{ 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ },
+	{ 0x5401f, 0x2dd4 },
+	{ 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 },
+	{ 0x54021, 0x4d66 },
+	{ 0x54022, 0x4d08 },
+	{ 0x54023, 0x0 },
+	{ 0x54024, LPDDR4_MR22_RANK1/*0x16*/ },
+	{ 0x54025, 0x0 },
+	{ 0x54026, 0x0 },
+	{ 0x54027, 0x0 },
+	{ 0x54028, 0x0 },
+	{ 0x54029, 0x0 },
+	{ 0x5402a, 0x0 },
+	{ 0x5402b, 0x1000 },
+	{ 0x5402c, LPDDR4_CS },
+	{ 0x5402d, 0x0 },
+	{ 0x5402e, 0x0 },
+	{ 0x5402f, 0x0 },
+	{ 0x54030, 0x0 },
+	{ 0x54031, 0x0 },
+	{ 0x54032, 0xd400 },
+	{ 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) },
+	{ 0x54034, 0x6600 },
+	{ 0x54035, 0x84d },
+	{ 0x54036, 0x4d },
+	{ 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ },
+	{ 0x54038, 0xd400 },
+	{ 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) },
+	{ 0x5403a, 0x6600 },
+	{ 0x5403b, 0x84d },
+	{ 0x5403c, 0x4d },
+	{ 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ },
+	{ 0x5403e, 0x0 },
+	{ 0x5403f, 0x0 },
+	{ 0x54040, 0x0 },
+	{ 0x54041, 0x0 },
+	{ 0x54042, 0x0 },
+	{ 0x54043, 0x0 },
+	{ 0x54044, 0x0 },
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+struct dram_cfg_param lpddr4_phy_pie[] = {
+	{ 0xd0000, 0x0 },
+	{ 0x90000, 0x10 },
+	{ 0x90001, 0x400 },
+	{ 0x90002, 0x10e },
+	{ 0x90003, 0x0 },
+	{ 0x90004, 0x0 },
+	{ 0x90005, 0x8 },
+	{ 0x90029, 0xb },
+	{ 0x9002a, 0x480 },
+	{ 0x9002b, 0x109 },
+	{ 0x9002c, 0x8 },
+	{ 0x9002d, 0x448 },
+	{ 0x9002e, 0x139 },
+	{ 0x9002f, 0x8 },
+	{ 0x90030, 0x478 },
+	{ 0x90031, 0x109 },
+	{ 0x90032, 0x0 },
+	{ 0x90033, 0xe8 },
+	{ 0x90034, 0x109 },
+	{ 0x90035, 0x2 },
+	{ 0x90036, 0x10 },
+	{ 0x90037, 0x139 },
+	{ 0x90038, 0xf },
+	{ 0x90039, 0x7c0 },
+	{ 0x9003a, 0x139 },
+	{ 0x9003b, 0x44 },
+	{ 0x9003c, 0x630 },
+	{ 0x9003d, 0x159 },
+	{ 0x9003e, 0x14f },
+	{ 0x9003f, 0x630 },
+	{ 0x90040, 0x159 },
+	{ 0x90041, 0x47 },
+	{ 0x90042, 0x630 },
+	{ 0x90043, 0x149 },
+	{ 0x90044, 0x4f },
+	{ 0x90045, 0x630 },
+	{ 0x90046, 0x179 },
+	{ 0x90047, 0x8 },
+	{ 0x90048, 0xe0 },
+	{ 0x90049, 0x109 },
+	{ 0x9004a, 0x0 },
+	{ 0x9004b, 0x7c8 },
+	{ 0x9004c, 0x109 },
+	{ 0x9004d, 0x0 },
+	{ 0x9004e, 0x1 },
+	{ 0x9004f, 0x8 },
+	{ 0x90050, 0x0 },
+	{ 0x90051, 0x45a },
+	{ 0x90052, 0x9 },
+	{ 0x90053, 0x0 },
+	{ 0x90054, 0x448 },
+	{ 0x90055, 0x109 },
+	{ 0x90056, 0x40 },
+	{ 0x90057, 0x630 },
+	{ 0x90058, 0x179 },
+	{ 0x90059, 0x1 },
+	{ 0x9005a, 0x618 },
+	{ 0x9005b, 0x109 },
+	{ 0x9005c, 0x40c0 },
+	{ 0x9005d, 0x630 },
+	{ 0x9005e, 0x149 },
+	{ 0x9005f, 0x8 },
+	{ 0x90060, 0x4 },
+	{ 0x90061, 0x48 },
+	{ 0x90062, 0x4040 },
+	{ 0x90063, 0x630 },
+	{ 0x90064, 0x149 },
+	{ 0x90065, 0x0 },
+	{ 0x90066, 0x4 },
+	{ 0x90067, 0x48 },
+	{ 0x90068, 0x40 },
+	{ 0x90069, 0x630 },
+	{ 0x9006a, 0x149 },
+	{ 0x9006b, 0x10 },
+	{ 0x9006c, 0x4 },
+	{ 0x9006d, 0x18 },
+	{ 0x9006e, 0x0 },
+	{ 0x9006f, 0x4 },
+	{ 0x90070, 0x78 },
+	{ 0x90071, 0x549 },
+	{ 0x90072, 0x630 },
+	{ 0x90073, 0x159 },
+	{ 0x90074, 0xd49 },
+	{ 0x90075, 0x630 },
+	{ 0x90076, 0x159 },
+	{ 0x90077, 0x94a },
+	{ 0x90078, 0x630 },
+	{ 0x90079, 0x159 },
+	{ 0x9007a, 0x441 },
+	{ 0x9007b, 0x630 },
+	{ 0x9007c, 0x149 },
+	{ 0x9007d, 0x42 },
+	{ 0x9007e, 0x630 },
+	{ 0x9007f, 0x149 },
+	{ 0x90080, 0x1 },
+	{ 0x90081, 0x630 },
+	{ 0x90082, 0x149 },
+	{ 0x90083, 0x0 },
+	{ 0x90084, 0xe0 },
+	{ 0x90085, 0x109 },
+	{ 0x90086, 0xa },
+	{ 0x90087, 0x10 },
+	{ 0x90088, 0x109 },
+	{ 0x90089, 0x9 },
+	{ 0x9008a, 0x3c0 },
+	{ 0x9008b, 0x149 },
+	{ 0x9008c, 0x9 },
+	{ 0x9008d, 0x3c0 },
+	{ 0x9008e, 0x159 },
+	{ 0x9008f, 0x18 },
+	{ 0x90090, 0x10 },
+	{ 0x90091, 0x109 },
+	{ 0x90092, 0x0 },
+	{ 0x90093, 0x3c0 },
+	{ 0x90094, 0x109 },
+	{ 0x90095, 0x18 },
+	{ 0x90096, 0x4 },
+	{ 0x90097, 0x48 },
+	{ 0x90098, 0x18 },
+	{ 0x90099, 0x4 },
+	{ 0x9009a, 0x58 },
+	{ 0x9009b, 0xa },
+	{ 0x9009c, 0x10 },
+	{ 0x9009d, 0x109 },
+	{ 0x9009e, 0x2 },
+	{ 0x9009f, 0x10 },
+	{ 0x900a0, 0x109 },
+	{ 0x900a1, 0x5 },
+	{ 0x900a2, 0x7c0 },
+	{ 0x900a3, 0x109 },
+	{ 0x900a4, 0x10 },
+	{ 0x900a5, 0x10 },
+	{ 0x900a6, 0x109 },
+	{ 0x40000, 0x811 },
+	{ 0x40020, 0x880 },
+	{ 0x40040, 0x0 },
+	{ 0x40060, 0x0 },
+	{ 0x40001, 0x4008 },
+	{ 0x40021, 0x83 },
+	{ 0x40041, 0x4f },
+	{ 0x40061, 0x0 },
+	{ 0x40002, 0x4040 },
+	{ 0x40022, 0x83 },
+	{ 0x40042, 0x51 },
+	{ 0x40062, 0x0 },
+	{ 0x40003, 0x811 },
+	{ 0x40023, 0x880 },
+	{ 0x40043, 0x0 },
+	{ 0x40063, 0x0 },
+	{ 0x40004, 0x720 },
+	{ 0x40024, 0xf },
+	{ 0x40044, 0x1740 },
+	{ 0x40064, 0x0 },
+	{ 0x40005, 0x16 },
+	{ 0x40025, 0x83 },
+	{ 0x40045, 0x4b },
+	{ 0x40065, 0x0 },
+	{ 0x40006, 0x716 },
+	{ 0x40026, 0xf },
+	{ 0x40046, 0x2001 },
+	{ 0x40066, 0x0 },
+	{ 0x40007, 0x716 },
+	{ 0x40027, 0xf },
+	{ 0x40047, 0x2800 },
+	{ 0x40067, 0x0 },
+	{ 0x40008, 0x716 },
+	{ 0x40028, 0xf },
+	{ 0x40048, 0xf00 },
+	{ 0x40068, 0x0 },
+	{ 0x40009, 0x720 },
+	{ 0x40029, 0xf },
+	{ 0x40049, 0x1400 },
+	{ 0x40069, 0x0 },
+	{ 0x4000a, 0xe08 },
+	{ 0x4002a, 0xc15 },
+	{ 0x4004a, 0x0 },
+	{ 0x4006a, 0x0 },
+	{ 0x4000b, 0x623 },
+	{ 0x4002b, 0x15 },
+	{ 0x4004b, 0x0 },
+	{ 0x4006b, 0x0 },
+	{ 0x4000c, 0x4028 },
+	{ 0x4002c, 0x80 },
+	{ 0x4004c, 0x0 },
+	{ 0x4006c, 0x0 },
+	{ 0x4000d, 0xe08 },
+	{ 0x4002d, 0xc1a },
+	{ 0x4004d, 0x0 },
+	{ 0x4006d, 0x0 },
+	{ 0x4000e, 0x623 },
+	{ 0x4002e, 0x1a },
+	{ 0x4004e, 0x0 },
+	{ 0x4006e, 0x0 },
+	{ 0x4000f, 0x4040 },
+	{ 0x4002f, 0x80 },
+	{ 0x4004f, 0x0 },
+	{ 0x4006f, 0x0 },
+	{ 0x40010, 0x2604 },
+	{ 0x40030, 0x15 },
+	{ 0x40050, 0x0 },
+	{ 0x40070, 0x0 },
+	{ 0x40011, 0x708 },
+	{ 0x40031, 0x5 },
+	{ 0x40051, 0x0 },
+	{ 0x40071, 0x2002 },
+	{ 0x40012, 0x8 },
+	{ 0x40032, 0x80 },
+	{ 0x40052, 0x0 },
+	{ 0x40072, 0x0 },
+	{ 0x40013, 0x2604 },
+	{ 0x40033, 0x1a },
+	{ 0x40053, 0x0 },
+	{ 0x40073, 0x0 },
+	{ 0x40014, 0x708 },
+	{ 0x40034, 0xa },
+	{ 0x40054, 0x0 },
+	{ 0x40074, 0x2002 },
+	{ 0x40015, 0x4040 },
+	{ 0x40035, 0x80 },
+	{ 0x40055, 0x0 },
+	{ 0x40075, 0x0 },
+	{ 0x40016, 0x60a },
+	{ 0x40036, 0x15 },
+	{ 0x40056, 0x1200 },
+	{ 0x40076, 0x0 },
+	{ 0x40017, 0x61a },
+	{ 0x40037, 0x15 },
+	{ 0x40057, 0x1300 },
+	{ 0x40077, 0x0 },
+	{ 0x40018, 0x60a },
+	{ 0x40038, 0x1a },
+	{ 0x40058, 0x1200 },
+	{ 0x40078, 0x0 },
+	{ 0x40019, 0x642 },
+	{ 0x40039, 0x1a },
+	{ 0x40059, 0x1300 },
+	{ 0x40079, 0x0 },
+	{ 0x4001a, 0x4808 },
+	{ 0x4003a, 0x880 },
+	{ 0x4005a, 0x0 },
+	{ 0x4007a, 0x0 },
+	{ 0x900a7, 0x0 },
+	{ 0x900a8, 0x790 },
+	{ 0x900a9, 0x11a },
+	{ 0x900aa, 0x8 },
+	{ 0x900ab, 0x7aa },
+	{ 0x900ac, 0x2a },
+	{ 0x900ad, 0x10 },
+	{ 0x900ae, 0x7b2 },
+	{ 0x900af, 0x2a },
+	{ 0x900b0, 0x0 },
+	{ 0x900b1, 0x7c8 },
+	{ 0x900b2, 0x109 },
+	{ 0x900b3, 0x10 },
+	{ 0x900b4, 0x2a8 },
+	{ 0x900b5, 0x129 },
+	{ 0x900b6, 0x8 },
+	{ 0x900b7, 0x370 },
+	{ 0x900b8, 0x129 },
+	{ 0x900b9, 0xa },
+	{ 0x900ba, 0x3c8 },
+	{ 0x900bb, 0x1a9 },
+	{ 0x900bc, 0xc },
+	{ 0x900bd, 0x408 },
+	{ 0x900be, 0x199 },
+	{ 0x900bf, 0x14 },
+	{ 0x900c0, 0x790 },
+	{ 0x900c1, 0x11a },
+	{ 0x900c2, 0x8 },
+	{ 0x900c3, 0x4 },
+	{ 0x900c4, 0x18 },
+	{ 0x900c5, 0xe },
+	{ 0x900c6, 0x408 },
+	{ 0x900c7, 0x199 },
+	{ 0x900c8, 0x8 },
+	{ 0x900c9, 0x8568 },
+	{ 0x900ca, 0x108 },
+	{ 0x900cb, 0x18 },
+	{ 0x900cc, 0x790 },
+	{ 0x900cd, 0x16a },
+	{ 0x900ce, 0x8 },
+	{ 0x900cf, 0x1d8 },
+	{ 0x900d0, 0x169 },
+	{ 0x900d1, 0x10 },
+	{ 0x900d2, 0x8558 },
+	{ 0x900d3, 0x168 },
+	{ 0x900d4, 0x70 },
+	{ 0x900d5, 0x788 },
+	{ 0x900d6, 0x16a },
+	{ 0x900d7, 0x1ff8 },
+	{ 0x900d8, 0x85a8 },
+	{ 0x900d9, 0x1e8 },
+	{ 0x900da, 0x50 },
+	{ 0x900db, 0x798 },
+	{ 0x900dc, 0x16a },
+	{ 0x900dd, 0x60 },
+	{ 0x900de, 0x7a0 },
+	{ 0x900df, 0x16a },
+	{ 0x900e0, 0x8 },
+	{ 0x900e1, 0x8310 },
+	{ 0x900e2, 0x168 },
+	{ 0x900e3, 0x8 },
+	{ 0x900e4, 0xa310 },
+	{ 0x900e5, 0x168 },
+	{ 0x900e6, 0xa },
+	{ 0x900e7, 0x408 },
+	{ 0x900e8, 0x169 },
+	{ 0x900e9, 0x6e },
+	{ 0x900ea, 0x0 },
+	{ 0x900eb, 0x68 },
+	{ 0x900ec, 0x0 },
+	{ 0x900ed, 0x408 },
+	{ 0x900ee, 0x169 },
+	{ 0x900ef, 0x0 },
+	{ 0x900f0, 0x8310 },
+	{ 0x900f1, 0x168 },
+	{ 0x900f2, 0x0 },
+	{ 0x900f3, 0xa310 },
+	{ 0x900f4, 0x168 },
+	{ 0x900f5, 0x1ff8 },
+	{ 0x900f6, 0x85a8 },
+	{ 0x900f7, 0x1e8 },
+	{ 0x900f8, 0x68 },
+	{ 0x900f9, 0x798 },
+	{ 0x900fa, 0x16a },
+	{ 0x900fb, 0x78 },
+	{ 0x900fc, 0x7a0 },
+	{ 0x900fd, 0x16a },
+	{ 0x900fe, 0x68 },
+	{ 0x900ff, 0x790 },
+	{ 0x90100, 0x16a },
+	{ 0x90101, 0x8 },
+	{ 0x90102, 0x8b10 },
+	{ 0x90103, 0x168 },
+	{ 0x90104, 0x8 },
+	{ 0x90105, 0xab10 },
+	{ 0x90106, 0x168 },
+	{ 0x90107, 0xa },
+	{ 0x90108, 0x408 },
+	{ 0x90109, 0x169 },
+	{ 0x9010a, 0x58 },
+	{ 0x9010b, 0x0 },
+	{ 0x9010c, 0x68 },
+	{ 0x9010d, 0x0 },
+	{ 0x9010e, 0x408 },
+	{ 0x9010f, 0x169 },
+	{ 0x90110, 0x0 },
+	{ 0x90111, 0x8b10 },
+	{ 0x90112, 0x168 },
+	{ 0x90113, 0x0 },
+	{ 0x90114, 0xab10 },
+	{ 0x90115, 0x168 },
+	{ 0x90116, 0x0 },
+	{ 0x90117, 0x1d8 },
+	{ 0x90118, 0x169 },
+	{ 0x90119, 0x80 },
+	{ 0x9011a, 0x790 },
+	{ 0x9011b, 0x16a },
+	{ 0x9011c, 0x18 },
+	{ 0x9011d, 0x7aa },
+	{ 0x9011e, 0x6a },
+	{ 0x9011f, 0xa },
+	{ 0x90120, 0x0 },
+	{ 0x90121, 0x1e9 },
+	{ 0x90122, 0x8 },
+	{ 0x90123, 0x8080 },
+	{ 0x90124, 0x108 },
+	{ 0x90125, 0xf },
+	{ 0x90126, 0x408 },
+	{ 0x90127, 0x169 },
+	{ 0x90128, 0xc },
+	{ 0x90129, 0x0 },
+	{ 0x9012a, 0x68 },
+	{ 0x9012b, 0x9 },
+	{ 0x9012c, 0x0 },
+	{ 0x9012d, 0x1a9 },
+	{ 0x9012e, 0x0 },
+	{ 0x9012f, 0x408 },
+	{ 0x90130, 0x169 },
+	{ 0x90131, 0x0 },
+	{ 0x90132, 0x8080 },
+	{ 0x90133, 0x108 },
+	{ 0x90134, 0x8 },
+	{ 0x90135, 0x7aa },
+	{ 0x90136, 0x6a },
+	{ 0x90137, 0x0 },
+	{ 0x90138, 0x8568 },
+	{ 0x90139, 0x108 },
+	{ 0x9013a, 0xb7 },
+	{ 0x9013b, 0x790 },
+	{ 0x9013c, 0x16a },
+	{ 0x9013d, 0x1f },
+	{ 0x9013e, 0x0 },
+	{ 0x9013f, 0x68 },
+	{ 0x90140, 0x8 },
+	{ 0x90141, 0x8558 },
+	{ 0x90142, 0x168 },
+	{ 0x90143, 0xf },
+	{ 0x90144, 0x408 },
+	{ 0x90145, 0x169 },
+	{ 0x90146, 0xc },
+	{ 0x90147, 0x0 },
+	{ 0x90148, 0x68 },
+	{ 0x90149, 0x0 },
+	{ 0x9014a, 0x408 },
+	{ 0x9014b, 0x169 },
+	{ 0x9014c, 0x0 },
+	{ 0x9014d, 0x8558 },
+	{ 0x9014e, 0x168 },
+	{ 0x9014f, 0x8 },
+	{ 0x90150, 0x3c8 },
+	{ 0x90151, 0x1a9 },
+	{ 0x90152, 0x3 },
+	{ 0x90153, 0x370 },
+	{ 0x90154, 0x129 },
+	{ 0x90155, 0x20 },
+	{ 0x90156, 0x2aa },
+	{ 0x90157, 0x9 },
+	{ 0x90158, 0x0 },
+	{ 0x90159, 0x400 },
+	{ 0x9015a, 0x10e },
+	{ 0x9015b, 0x8 },
+	{ 0x9015c, 0xe8 },
+	{ 0x9015d, 0x109 },
+	{ 0x9015e, 0x0 },
+	{ 0x9015f, 0x8140 },
+	{ 0x90160, 0x10c },
+	{ 0x90161, 0x10 },
+	{ 0x90162, 0x8138 },
+	{ 0x90163, 0x10c },
+	{ 0x90164, 0x8 },
+	{ 0x90165, 0x7c8 },
+	{ 0x90166, 0x101 },
+	{ 0x90167, 0x8 },
+	{ 0x90168, 0x0 },
+	{ 0x90169, 0x8 },
+	{ 0x9016a, 0x8 },
+	{ 0x9016b, 0x448 },
+	{ 0x9016c, 0x109 },
+	{ 0x9016d, 0xf },
+	{ 0x9016e, 0x7c0 },
+	{ 0x9016f, 0x109 },
+	{ 0x90170, 0x0 },
+	{ 0x90171, 0xe8 },
+	{ 0x90172, 0x109 },
+	{ 0x90173, 0x47 },
+	{ 0x90174, 0x630 },
+	{ 0x90175, 0x109 },
+	{ 0x90176, 0x8 },
+	{ 0x90177, 0x618 },
+	{ 0x90178, 0x109 },
+	{ 0x90179, 0x8 },
+	{ 0x9017a, 0xe0 },
+	{ 0x9017b, 0x109 },
+	{ 0x9017c, 0x0 },
+	{ 0x9017d, 0x7c8 },
+	{ 0x9017e, 0x109 },
+	{ 0x9017f, 0x8 },
+	{ 0x90180, 0x8140 },
+	{ 0x90181, 0x10c },
+	{ 0x90182, 0x0 },
+	{ 0x90183, 0x1 },
+	{ 0x90184, 0x8 },
+	{ 0x90185, 0x8 },
+	{ 0x90186, 0x4 },
+	{ 0x90187, 0x8 },
+	{ 0x90188, 0x8 },
+	{ 0x90189, 0x7c8 },
+	{ 0x9018a, 0x101 },
+	{ 0x90006, 0x0 },
+	{ 0x90007, 0x0 },
+	{ 0x90008, 0x8 },
+	{ 0x90009, 0x0 },
+	{ 0x9000a, 0x0 },
+	{ 0x9000b, 0x0 },
+	{ 0xd00e7, 0x400 },
+	{ 0x90017, 0x0 },
+	{ 0x9001f, 0x2a },
+	{ 0x90026, 0x6a },
+	{ 0x400d0, 0x0 },
+	{ 0x400d1, 0x101 },
+	{ 0x400d2, 0x105 },
+	{ 0x400d3, 0x107 },
+	{ 0x400d4, 0x10f },
+	{ 0x400d5, 0x202 },
+	{ 0x400d6, 0x20a },
+	{ 0x400d7, 0x20b },
+	{ 0x2003a, 0x2 },
+	{ 0x2000b, 0x5d },
+	{ 0x2000c, 0xbb },
+	{ 0x2000d, 0x753 },
+	{ 0x2000e, 0x2c },
+	{ 0x12000b, 0xc },
+	{ 0x12000c, 0x19 },
+	{ 0x12000d, 0xfa },
+	{ 0x12000e, 0x10 },
+	{ 0x22000b, 0x3 },
+	{ 0x22000c, 0x6 },
+	{ 0x22000d, 0x3e },
+	{ 0x22000e, 0x10 },
+	{ 0x9000c, 0x0 },
+	{ 0x9000d, 0x173 },
+	{ 0x9000e, 0x60 },
+	{ 0x9000f, 0x6110 },
+	{ 0x90010, 0x2152 },
+	{ 0x90011, 0xdfbd },
+	{ 0x90012, 0x60 },
+	{ 0x90013, 0x6152 },
+	{ 0x20010, 0x5a },
+	{ 0x20011, 0x3 },
+	{ 0x40080, 0xe0 },
+	{ 0x40081, 0x12 },
+	{ 0x40082, 0xe0 },
+	{ 0x40083, 0x12 },
+	{ 0x40084, 0xe0 },
+	{ 0x40085, 0x12 },
+	{ 0x140080, 0xe0 },
+	{ 0x140081, 0x12 },
+	{ 0x140082, 0xe0 },
+	{ 0x140083, 0x12 },
+	{ 0x140084, 0xe0 },
+	{ 0x140085, 0x12 },
+	{ 0x240080, 0xe0 },
+	{ 0x240081, 0x12 },
+	{ 0x240082, 0xe0 },
+	{ 0x240083, 0x12 },
+	{ 0x240084, 0xe0 },
+	{ 0x240085, 0x12 },
+	{ 0x400fd, 0xf },
+	{ 0x10011, 0x1 },
+	{ 0x10012, 0x1 },
+	{ 0x10013, 0x180 },
+	{ 0x10018, 0x1 },
+	{ 0x10002, 0x6209 },
+	{ 0x100b2, 0x1 },
+	{ 0x101b4, 0x1 },
+	{ 0x102b4, 0x1 },
+	{ 0x103b4, 0x1 },
+	{ 0x104b4, 0x1 },
+	{ 0x105b4, 0x1 },
+	{ 0x106b4, 0x1 },
+	{ 0x107b4, 0x1 },
+	{ 0x108b4, 0x1 },
+	{ 0x11011, 0x1 },
+	{ 0x11012, 0x1 },
+	{ 0x11013, 0x180 },
+	{ 0x11018, 0x1 },
+	{ 0x11002, 0x6209 },
+	{ 0x110b2, 0x1 },
+	{ 0x111b4, 0x1 },
+	{ 0x112b4, 0x1 },
+	{ 0x113b4, 0x1 },
+	{ 0x114b4, 0x1 },
+	{ 0x115b4, 0x1 },
+	{ 0x116b4, 0x1 },
+	{ 0x117b4, 0x1 },
+	{ 0x118b4, 0x1 },
+	{ 0x12011, 0x1 },
+	{ 0x12012, 0x1 },
+	{ 0x12013, 0x180 },
+	{ 0x12018, 0x1 },
+	{ 0x12002, 0x6209 },
+	{ 0x120b2, 0x1 },
+	{ 0x121b4, 0x1 },
+	{ 0x122b4, 0x1 },
+	{ 0x123b4, 0x1 },
+	{ 0x124b4, 0x1 },
+	{ 0x125b4, 0x1 },
+	{ 0x126b4, 0x1 },
+	{ 0x127b4, 0x1 },
+	{ 0x128b4, 0x1 },
+	{ 0x13011, 0x1 },
+	{ 0x13012, 0x1 },
+	{ 0x13013, 0x180 },
+	{ 0x13018, 0x1 },
+	{ 0x13002, 0x6209 },
+	{ 0x130b2, 0x1 },
+	{ 0x131b4, 0x1 },
+	{ 0x132b4, 0x1 },
+	{ 0x133b4, 0x1 },
+	{ 0x134b4, 0x1 },
+	{ 0x135b4, 0x1 },
+	{ 0x136b4, 0x1 },
+	{ 0x137b4, 0x1 },
+	{ 0x138b4, 0x1 },
+	{ 0x2003a, 0x2 },
+	{ 0xc0080, 0x2 },
+	{ 0xd0000, 0x1 },
+};
+
+struct dram_fsp_msg lpddr4_dram_fsp_msg[] = {
+	{
+		/* P0 3000mts 1D */
+		.drate = 3000,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = lpddr4_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg),
+	},
+	{
+		/* P0 3000mts 2D */
+		.drate = 3000,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = lpddr4_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg),
+	},
+	{
+		/* P1 400mts 1D */
+		.drate = 400,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = lpddr4_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg),
+	},
+	{
+		/* P1 100mts 1D */
+		.drate = 100,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = lpddr4_fsp2_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg),
+	},
+};
+
+/* lpddr4 timing config params on EVK board */
+struct dram_timing_info dram_timing = {
+	.ddrc_cfg = lpddr4_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg),
+	.ddrphy_cfg = lpddr4_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg),
+	.fsp_msg = lpddr4_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg),
+	.ddrphy_trained_csr = lpddr4_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr),
+	.ddrphy_pie = lpddr4_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie),
+};
diff --git a/board/beacon/imx8mm/spl.c b/board/beacon/imx8mm/spl.c
new file mode 100644
index 0000000000..4ee10cf855
--- /dev/null
+++ b/board/beacon/imx8mm/spl.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <common.h>
+#include <cpu_func.h>
+#include <hang.h>
+#include <init.h>
+#include <log.h>
+#include <spl.h>
+#include <asm/io.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/imx8mm_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/boot_mode.h>
+#include <asm/arch/ddr.h>
+
+#include <dm/uclass.h>
+#include <dm/device.h>
+#include <dm/uclass-internal.h>
+#include <dm/device-internal.h>
+
+#include <power/pmic.h>
+#include <power/bd71837.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spl_board_boot_device(enum boot_device boot_dev_spl)
+{
+	switch (boot_dev_spl) {
+	case SD2_BOOT:
+	case MMC2_BOOT:
+		return BOOT_DEVICE_MMC1;
+	case SD3_BOOT:
+	case MMC3_BOOT:
+		return BOOT_DEVICE_MMC2;
+	default:
+		return BOOT_DEVICE_NONE;
+	}
+}
+
+static void spl_dram_init(void)
+{
+	ddr_init(&dram_timing);
+}
+
+void spl_board_init(void)
+{
+	debug("Normal Boot\n");
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
+
+static iomux_v3_cfg_t const uart_pads[] = {
+	IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+	IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B  | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+};
+
+int board_early_init_f(void)
+{
+	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+
+	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+
+	set_wdog_reset(wdog);
+
+	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+
+	return 0;
+}
+
+static int power_init_board(void)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = pmic_get("pmic@4b", &dev);
+	if (ret == -ENODEV) {
+		puts("No pmic\n");
+		return 0;
+	}
+	if (ret != 0)
+		return ret;
+
+	/* decrease RESET key long push time from the default 10s to 10ms */
+	pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0);
+
+	/* unlock the PMIC regs */
+	pmic_reg_write(dev, BD718XX_REGLOCK, 0x1);
+
+	/* increase VDD_SOC to typical value 0.85v before first DRAM access */
+	pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f);
+
+	/* increase VDD_DRAM to 0.975v for 3Ghz DDR */
+	pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83);
+
+	/* lock the PMIC regs */
+	pmic_reg_write(dev, BD718XX_REGLOCK, 0x11);
+
+	return 0;
+}
+
+void board_init_f(ulong dummy)
+{
+	struct udevice *dev;
+	int ret;
+
+	arch_cpu_init();
+
+	init_uart_clk(1);
+
+	board_early_init_f();
+
+	timer_init();
+
+	preloader_console_init();
+
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	ret = spl_early_init();
+	if (ret) {
+		debug("spl_early_init() failed: %d\n", ret);
+		hang();
+	}
+
+	ret = uclass_get_device_by_name(UCLASS_CLK,
+					"clock-controller@30380000",
+					&dev);
+	if (ret < 0) {
+		printf("Failed to find clock node. Check device tree\n");
+		hang();
+	}
+
+	enable_tzc380();
+
+	power_init_board();
+
+	/* DDR initialization */
+	spl_dram_init();
+
+	board_init_r(NULL, 0);
+}
diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c
index 398e4ed720..617b545232 100644
--- a/board/beckhoff/mx53cx9020/mx53cx9020.c
+++ b/board/beckhoff/mx53cx9020/mx53cx9020.c
@@ -16,6 +16,7 @@
 #include <asm/mach-imx/mx5_video.h>
 #include <ACEX1K.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 enum LED_GPIOS {
 	GPIO_SD1_CD = IMX_GPIO_NR(1, 1),
diff --git a/board/birdland/bav335x/board.c b/board/birdland/bav335x/board.c
index 9eb851c397..5900e65466 100644
--- a/board/birdland/bav335x/board.c
+++ b/board/birdland/bav335x/board.c
@@ -11,6 +11,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
diff --git a/board/bitmain/antminer_s9/Makefile b/board/bitmain/antminer_s9/Makefile
index 93a1e77f72..1af01d6d80 100644
--- a/board/bitmain/antminer_s9/Makefile
+++ b/board/bitmain/antminer_s9/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 
 obj-y	:= board.o
+obj-y	+= ../../xilinx/common/board.o
 
 # Remove quotes
 hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
diff --git a/board/bluegiga/apx4devkit/apx4devkit.c b/board/bluegiga/apx4devkit/apx4devkit.c
index 9268aa0daa..be8eefb365 100644
--- a/board/bluegiga/apx4devkit/apx4devkit.c
+++ b/board/bluegiga/apx4devkit/apx4devkit.c
@@ -14,6 +14,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/setup.h>
diff --git a/board/bluewater/gurnard/gurnard.c b/board/bluewater/gurnard/gurnard.c
index 4ae70e1aa5..2bbb203548 100644
--- a/board/bluewater/gurnard/gurnard.c
+++ b/board/bluewater/gurnard/gurnard.c
@@ -33,6 +33,7 @@
 #include <asm/arch/clk.h>
 #include <asm/arch/gpio.h>
 #include <dm/uclass-internal.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_GURNARD_SPLASH
 #include "splash_logo.h"
diff --git a/board/bluewater/snapper9260/snapper9260.c b/board/bluewater/snapper9260/snapper9260.c
index 47ce307880..8e2b7e000f 100644
--- a/board/bluewater/snapper9260/snapper9260.c
+++ b/board/bluewater/snapper9260/snapper9260.c
@@ -23,6 +23,7 @@
 #include <netdev.h>
 #include <i2c.h>
 #include <pca953x.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/bosch/guardian/board.c b/board/bosch/guardian/board.c
index 03ba9e8c5e..1d8fa78154 100644
--- a/board/bosch/guardian/board.c
+++ b/board/bosch/guardian/board.c
@@ -11,9 +11,11 @@
 #include <common.h>
 #include <cpsw.h>
 #include <dm.h>
+#include <env.h>
 #include <env_internal.h>
 #include <errno.h>
 #include <i2c.h>
+#include <init.h>
 #include <led.h>
 #include <miiphy.h>
 #include <panel.h>
diff --git a/board/bosch/shc/board.c b/board/bosch/shc/board.c
index d34f3ba007..6a102d3853 100644
--- a/board/bosch/shc/board.c
+++ b/board/bosch/shc/board.c
@@ -12,11 +12,13 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <errno.h>
 #include <init.h>
 #include <irq_func.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -33,6 +35,7 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
+#include <linux/delay.h>
 #include <power/tps65217.h>
 #include <env_internal.h>
 #include <watchdog.h>
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 5018167fcf..d49725daa8 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -13,6 +16,7 @@
 #include <asm/arch/sys_proto.h>
 #include <malloc.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
@@ -986,7 +990,7 @@ static int read_keys(char *buf)
 	return numpressed;
 }
 
-static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_kbd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char envvalue[ARRAY_SIZE(buttons)+1];
 	int numpressed = read_keys(envvalue);
diff --git a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
index d83eb9bd52..cff9a6840c 100644
--- a/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
+++ b/board/broadcom/bcm23550_w1d/bcm23550_w1d.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
 #include <env.h>
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c b/board/broadcom/bcm28155_ap/bcm28155_ap.c
index 40ced1a87c..e3bf808d7e 100644
--- a/board/broadcom/bcm28155_ap/bcm28155_ap.c
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/mach-types.h>
 #include <env.h>
diff --git a/board/broadcom/bcm963158/bcm963158.c b/board/broadcom/bcm963158/bcm963158.c
index db82cd570d..9feaee3c0f 100644
--- a/board/broadcom/bcm963158/bcm963158.c
+++ b/board/broadcom/bcm963158/bcm963158.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <linux/io.h>
 
 #ifdef CONFIG_ARM64
diff --git a/board/broadcom/bcm968360bg/bcm968360bg.c b/board/broadcom/bcm968360bg/bcm968360bg.c
index a5fbc1d297..90af6b88bd 100644
--- a/board/broadcom/bcm968360bg/bcm968360bg.c
+++ b/board/broadcom/bcm968360bg/bcm968360bg.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <linux/io.h>
 
 #ifdef CONFIG_ARM64
diff --git a/board/broadcom/bcm968580xref/bcm968580xref.c b/board/broadcom/bcm968580xref/bcm968580xref.c
index 2e547f5170..1bd723d49e 100644
--- a/board/broadcom/bcm968580xref/bcm968580xref.c
+++ b/board/broadcom/bcm968580xref/bcm968580xref.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 #include <linux/io.h>
 
 #ifdef CONFIG_ARM64
diff --git a/board/broadcom/bcm_ep/board.c b/board/broadcom/bcm_ep/board.c
index e4dbe42649..31cae47028 100644
--- a/board/broadcom/bcm_ep/board.c
+++ b/board/broadcom/bcm_ep/board.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <net.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <config.h>
 #include <netdev.h>
diff --git a/board/broadcom/bcmns2/northstar2.c b/board/broadcom/bcmns2/northstar2.c
index 6cbad9c1f0..91f489aad3 100644
--- a/board/broadcom/bcmns2/northstar2.c
+++ b/board/broadcom/bcmns2/northstar2.c
@@ -5,6 +5,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/armv8/mmu.h>
 
diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c
index ee0cf8f9e2..add4285db3 100644
--- a/board/broadcom/bcmstb/bcmstb.c
+++ b/board/broadcom/bcmstb/bcmstb.c
@@ -8,6 +8,7 @@
 
 #include <cpu_func.h>
 #include <init.h>
+#include <log.h>
 #include <time.h>
 #include <linux/types.h>
 #include <common.h>
diff --git a/board/bticino/mamoj/mamoj.c b/board/bticino/mamoj/mamoj.c
index 6ad7e31092..b7d37b7004 100644
--- a/board/bticino/mamoj/mamoj.c
+++ b/board/bticino/mamoj/mamoj.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/bticino/mamoj/spl.c b/board/bticino/mamoj/spl.c
index 620e4d1de0..a9bb2a55e5 100644
--- a/board/bticino/mamoj/spl.c
+++ b/board/bticino/mamoj/spl.c
@@ -6,8 +6,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <serial.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <linux/sizes.h>
diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
index 95d3a5e1f5..64daa456b3 100644
--- a/board/buffalo/lsxl/lsxl.c
+++ b/board/buffalo/lsxl/lsxl.c
@@ -8,8 +8,12 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <command.h>
 #include <env.h>
 #include <env_internal.h>
+#include <flash.h>
+#include <init.h>
 #include <net.h>
 #include <malloc.h>
 #include <netdev.h>
@@ -20,6 +24,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/gpio.h>
+#include <linux/delay.h>
 
 #include "lsxl.h"
 
diff --git a/board/cavium/thunderx/atf.c b/board/cavium/thunderx/atf.c
index 2e7ba69d76..64aa198765 100644
--- a/board/cavium/thunderx/atf.c
+++ b/board/cavium/thunderx/atf.c
@@ -4,7 +4,10 @@
 **/
 
 #include <common.h>
+#include <command.h>
+#include <asm/cache.h>
 #include <asm/io.h>
+#include <asm/ptrace.h>
 
 #include <asm/system.h>
 #include <cavium/thunderx_svc.h>
@@ -223,7 +226,7 @@ static void atf_print_part_table(void)
 	}
 }
 
-int do_atf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_atf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ssize_t ret;
 	size_t size, offset;
diff --git a/board/cavium/thunderx/thunderx.c b/board/cavium/thunderx/thunderx.c
index 687ade544a..1b1b9d513c 100644
--- a/board/cavium/thunderx/thunderx.c
+++ b/board/cavium/thunderx/thunderx.c
@@ -9,6 +9,7 @@
 #include <init.h>
 #include <malloc.h>
 #include <errno.h>
+#include <net.h>
 #include <linux/compiler.h>
 
 #include <cavium/atf.h>
diff --git a/board/ccv/xpress/spl.c b/board/ccv/xpress/spl.c
index 90f655ab2e..38bda8d184 100644
--- a/board/ccv/xpress/spl.c
+++ b/board/ccv/xpress/spl.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/mx6-ddr.h>
diff --git a/board/ccv/xpress/xpress.c b/board/ccv/xpress/xpress.c
index 0caeea5885..e41f0639ea 100644
--- a/board/ccv/xpress/xpress.c
+++ b/board/ccv/xpress/xpress.c
@@ -4,6 +4,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
@@ -24,6 +25,7 @@
 #include <mmc.h>
 #include <netdev.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/cirrus/edb93xx/edb93xx.c b/board/cirrus/edb93xx/edb93xx.c
index dfebb7c1c1..0318bf18cf 100644
--- a/board/cirrus/edb93xx/edb93xx.c
+++ b/board/cirrus/edb93xx/edb93xx.c
@@ -16,7 +16,9 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <irq_func.h>
+#include <net.h>
 #include <netdev.h>
 #include <status_led.h>
 #include <asm/io.h>
diff --git a/board/cloudengines/pogo_e02/pogo_e02.c b/board/cloudengines/pogo_e02/pogo_e02.c
index 835c3279be..8df039168c 100644
--- a/board/cloudengines/pogo_e02/pogo_e02.c
+++ b/board/cloudengines/pogo_e02/pogo_e02.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/arch/cpu.h>
diff --git a/board/cobra5272/flash.c b/board/cobra5272/flash.c
index 1d3c5acddf..4337f4879d 100644
--- a/board/cobra5272/flash.c
+++ b/board/cobra5272/flash.c
@@ -7,14 +7,17 @@
 #include <common.h>
 #include <console.h>
 #include <cpu_func.h>
+#include <flash.h>
 #include <irq_func.h>
+#include <uuid.h>
+#include <linux/delay.h>
 
 #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
 #define FLASH_BANK_SIZE 0x200000
 
 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
-void flash_print_info (flash_info_t * info)
+void flash_print_info(flash_info_t *info)
 {
 	int i;
 
@@ -55,7 +58,7 @@ Done:
 }
 
 
-unsigned long flash_init (void)
+unsigned long flash_init(void)
 {
 	int i, j;
 	ulong size = 0;
@@ -98,9 +101,9 @@ unsigned long flash_init (void)
 		size += flash_info[i].size;
 	}
 
-	flash_protect (FLAG_PROTECT_SET,
-		       CONFIG_SYS_FLASH_BASE,
-		       CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
+	flash_protect(FLAG_PROTECT_SET,
+		      CONFIG_SYS_FLASH_BASE,
+		      CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
 
 	return size;
 }
@@ -127,7 +130,7 @@ unsigned long flash_init (void)
 #define TMO   4
 
 
-int flash_erase (flash_info_t * info, int s_first, int s_last)
+int flash_erase(flash_info_t *info, int s_first, int s_last)
 {
 	ulong result;
 	int iflag, cflag, prot, sect;
@@ -233,7 +236,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 
       outahere:
 	/* allow flash to settle - wait 10 ms */
-	udelay (10000);
+	mdelay(10);
 
 	if (iflag)
 		enable_interrupts();
@@ -244,7 +247,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	return rc;
 }
 
-static int write_word (flash_info_t * info, ulong dest, ulong data)
+static int write_word(flash_info_t *info, ulong dest, ulong data)
 {
 	volatile u16 *addr = (volatile u16 *) dest;
 	ulong result;
@@ -311,7 +314,7 @@ static int write_word (flash_info_t * info, ulong dest, ulong data)
 }
 
 
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
 {
 	ulong wp, data;
 	int rc;
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index a7a1be3c05..64d0860d21 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/tegra.h>
 #include <asm/arch/pinmux.h>
diff --git a/board/compulab/cl-som-imx7/cl-som-imx7.c b/board/compulab/cl-som-imx7/cl-som-imx7.c
index 9277094e44..8b3bd5e5f6 100644
--- a/board/compulab/cl-som-imx7/cl-som-imx7.c
+++ b/board/compulab/cl-som-imx7/cl-som-imx7.c
@@ -11,9 +11,11 @@
 #include <env.h>
 #include <init.h>
 #include <mmc.h>
+#include <net.h>
 #include <phy.h>
 #include <netdev.h>
 #include <fsl_esdhc_imx.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/pfuze3000_pmic.h>
 #include <asm/mach-imx/mxc_i2c.h>
diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index 3e185ad82a..4d71bedfb9 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -16,6 +16,7 @@
 #include <init.h>
 #include <miiphy.h>
 #include <mtd_node.h>
+#include <net.h>
 #include <netdev.h>
 #include <errno.h>
 #include <usb.h>
@@ -34,6 +35,7 @@
 #include <dm/platform_data/serial_mxc.h>
 #include <dm/device-internal.h>
 #include <jffs2/load_kernel.h>
+#include <linux/delay.h>
 #include "common.h"
 #include "../common/eeprom.h"
 #include "../common/common.h"
diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c
index 592d741095..7d8243563a 100644
--- a/board/compulab/cm_fx6/spl.c
+++ b/board/compulab/cm_fx6/spl.c
@@ -20,6 +20,7 @@
 #include <asm/arch/crm_regs.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <fsl_esdhc_imx.h>
+#include <linux/delay.h>
 #include "common.h"
 
 enum ddr_config {
diff --git a/board/compulab/cm_t335/cm_t335.c b/board/compulab/cm_t335/cm_t335.c
index 561f2f30bb..75b56f7eee 100644
--- a/board/compulab/cm_t335/cm_t335.c
+++ b/board/compulab/cm_t335/cm_t335.c
@@ -11,8 +11,10 @@
 #include <env.h>
 #include <errno.h>
 #include <miiphy.h>
+#include <net.h>
 #include <status_led.h>
 #include <cpsw.h>
+#include <linux/delay.h>
 
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/hardware_am33xx.h>
diff --git a/board/compulab/cm_t335/spl.c b/board/compulab/cm_t335/spl.c
index 39ca535d11..8662632a7e 100644
--- a/board/compulab/cm_t335/spl.c
+++ b/board/compulab/cm_t335/spl.c
@@ -13,6 +13,7 @@
 #include <cpu_func.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
diff --git a/board/compulab/cm_t35/cm_t35.c b/board/compulab/cm_t35/cm_t35.c
index b52358baac..4b67df4f1a 100644
--- a/board/compulab/cm_t35/cm_t35.c
+++ b/board/compulab/cm_t35/cm_t35.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <status_led.h>
 #include <netdev.h>
 #include <net.h>
@@ -22,6 +23,7 @@
 #include <splash.h>
 #include <twl4030.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <linux/errno.h>
diff --git a/board/compulab/cm_t43/cm_t43.c b/board/compulab/cm_t43/cm_t43.c
index 2aa453471d..f26e42b263 100644
--- a/board/compulab/cm_t43/cm_t43.c
+++ b/board/compulab/cm_t43/cm_t43.c
@@ -7,9 +7,11 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/emif.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/tps65218.h>
 #include "board.h"
diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
index 811bbb528a..413f3c9c8f 100644
--- a/board/compulab/cm_t54/cm_t54.c
+++ b/board/compulab/cm_t54/cm_t54.c
@@ -10,10 +10,12 @@
 #include <common.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <net.h>
 #include <usb.h>
 #include <mmc.h>
 #include <palmas.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/gpio.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/compulab/cm_t54/mux.c b/board/compulab/cm_t54/mux.c
index 50d58217e4..ea90bc6e34 100644
--- a/board/compulab/cm_t54/mux.c
+++ b/board/compulab/cm_t54/mux.c
@@ -10,6 +10,7 @@
 #ifndef _CM_T54_MUX_DATA_H
 #define _CM_T54_MUX_DATA_H
 
+#include <common.h>
 #include <asm/arch/mux_omap5.h>
 #include <asm/arch/sys_proto.h>
 
diff --git a/board/compulab/common/common.c b/board/compulab/common/common.c
index 2f92c6564d..528c97df19 100644
--- a/board/compulab/common/common.c
+++ b/board/compulab/common/common.c
@@ -10,6 +10,7 @@
 #include <asm/bootm.h>
 #include <asm/gpio.h>
 #include <asm/setup.h>
+#include <linux/delay.h>
 
 #include "common.h"
 #include "eeprom.h"
diff --git a/board/compulab/common/omap3_smc911x.c b/board/compulab/common/omap3_smc911x.c
index 4b869ec3af..f0d365272c 100644
--- a/board/compulab/common/omap3_smc911x.c
+++ b/board/compulab/common/omap3_smc911x.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <netdev.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <linux/errno.h>
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
index 49c731f891..044cefd979 100644
--- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
+++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -26,6 +27,7 @@
 #include <fsl_esdhc_imx.h>
 #include <i2c.h>
 #include <input.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include <linux/fb.h>
diff --git a/board/coreboot/coreboot/MAINTAINERS b/board/coreboot/coreboot/MAINTAINERS
index 188906b080..a05673bb0b 100644
--- a/board/coreboot/coreboot/MAINTAINERS
+++ b/board/coreboot/coreboot/MAINTAINERS
@@ -4,3 +4,10 @@ S:	Maintained
 F:	board/coreboot/coreboot/
 F:	include/configs/chromebook_link.h
 F:	configs/coreboot_defconfig
+
+COREBOOT64 BOARD
+M:	Simon Glass <sjg@chromium.org>
+S:	Maintained
+F:	board/coreboot/coreboot/
+F:	include/configs/chromebook_link.h
+F:	configs/coreboot64_defconfig
diff --git a/board/corscience/tricorder/tricorder-eeprom.c b/board/corscience/tricorder/tricorder-eeprom.c
index 23c2ea9186..192af304d9 100644
--- a/board/corscience/tricorder/tricorder-eeprom.c
+++ b/board/corscience/tricorder/tricorder-eeprom.c
@@ -5,6 +5,7 @@
  * Andreas Bießmann <andreas.biessmann@corscience.de>
  */
 #include <common.h>
+#include <command.h>
 #include <eeprom.h>
 #include <i2c.h>
 #include <u-boot/crc.h>
@@ -186,7 +187,7 @@ int tricorder_eeprom_write(unsigned devaddr, const char *name,
 	return ret;
 }
 
-int do_tricorder_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+int do_tricorder_eeprom(struct cmd_tbl *cmdtp, int flag, int argc, char *argv[])
 {
 	if (argc == 3) {
 		ulong dev_addr = simple_strtoul(argv[2], NULL, 16);
diff --git a/board/corscience/tricorder/tricorder.c b/board/corscience/tricorder/tricorder.c
index cec819b36f..30974e8d92 100644
--- a/board/corscience/tricorder/tricorder.c
+++ b/board/corscience/tricorder/tricorder.c
@@ -10,6 +10,7 @@
  * Frederik Kriewitz <frederik@kriewitz.eu>
  */
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <twl4030.h>
 #include <status_led.h>
diff --git a/board/cortina/presidio-asic/presidio.c b/board/cortina/presidio-asic/presidio.c
index b4fa01f368..3c132f1271 100644
--- a/board/cortina/presidio-asic/presidio.c
+++ b/board/cortina/presidio-asic/presidio.c
@@ -4,10 +4,12 @@
  *
  */
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <configs/presidio_asic.h>
 #include <linux/psci.h>
diff --git a/board/creative/xfi3/xfi3.c b/board/creative/xfi3/xfi3.c
index 228a3943c0..adc908143d 100644
--- a/board/creative/xfi3/xfi3.c
+++ b/board/creative/xfi3/xfi3.c
@@ -11,12 +11,15 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/iomux-mx23.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/cssi/MCR3000/MCR3000.c b/board/cssi/MCR3000/MCR3000.c
index 138d0c61f1..570e846a21 100644
--- a/board/cssi/MCR3000/MCR3000.c
+++ b/board/cssi/MCR3000/MCR3000.c
@@ -17,6 +17,7 @@
 #include <asm/io.h>
 #include <dm/uclass.h>
 #include <wdt.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/d-link/dns325/dns325.c b/board/d-link/dns325/dns325.c
index dfdc683683..0ae2e7d88c 100644
--- a/board/d-link/dns325/dns325.c
+++ b/board/d-link/dns325/dns325.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <miiphy.h>
 #include <net.h>
 #include <netdev.h>
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index d9019de6e0..a3b0f8bf09 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <net.h>
 #include <spi.h>
 #include <spi_flash.h>
diff --git a/board/davinci/da8xxevm/omapl138_lcdk.c b/board/davinci/da8xxevm/omapl138_lcdk.c
index 608a7f28eb..adb56c6c87 100644
--- a/board/davinci/da8xxevm/omapl138_lcdk.c
+++ b/board/davinci/da8xxevm/omapl138_lcdk.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <net.h>
 #include <asm/arch/hardware.h>
 #include <asm/ti-common/davinci_nand.h>
diff --git a/board/dfi/dfi-bt700/dfi-bt700.c b/board/dfi/dfi-bt700/dfi-bt700.c
index f4c4b1d663..87506a77a1 100644
--- a/board/dfi/dfi-bt700/dfi-bt700.c
+++ b/board/dfi/dfi-bt700/dfi-bt700.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <nuvoton_nct6102d.h>
 #include <asm/gpio.h>
 #include <asm/ibmpc.h>
 #include <asm/pnp_def.h>
+#include <linux/delay.h>
 
 int board_early_init_f(void)
 {
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c b/board/dhelectronics/dh_imx6/dh_imx6.c
index b6f8b11a10..8f50433f17 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -8,7 +8,9 @@
 #include <common.h>
 #include <dm.h>
 #include <eeprom.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <dm/device-internal.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
@@ -30,6 +32,7 @@
 #include <i2c_eeprom.h>
 #include <mmc.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
index f2c3ac3e28..ed4dea45ea 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
@@ -24,6 +25,7 @@
 #include <i2c.h>
 #include <mmc.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #define ENET_PAD_CTRL							\
 	(PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |	\
diff --git a/board/dhelectronics/dh_stm32mp1/Kconfig b/board/dhelectronics/dh_stm32mp1/Kconfig
index 8eab986640..1fc792c9d1 100644
--- a/board/dhelectronics/dh_stm32mp1/Kconfig
+++ b/board/dhelectronics/dh_stm32mp1/Kconfig
@@ -7,7 +7,7 @@ config SYS_VENDOR
 	default "dhelectronics"
 
 config SYS_CONFIG_NAME
-	default "stm32mp1"
+	default "dh_stm32mp1"
 
 config ENV_SECT_SIZE
 	default 0x10000 if ENV_IS_IN_SPI_FLASH
@@ -18,4 +18,5 @@ config ENV_OFFSET
 config ENV_OFFSET_REDUND
 	default 0x1F0000 if ENV_IS_IN_SPI_FLASH
 
+source "board/st/common/Kconfig"
 endif
diff --git a/board/dhelectronics/dh_stm32mp1/MAINTAINERS b/board/dhelectronics/dh_stm32mp1/MAINTAINERS
index 1511ecb65d..fd70131f9e 100644
--- a/board/dhelectronics/dh_stm32mp1/MAINTAINERS
+++ b/board/dhelectronics/dh_stm32mp1/MAINTAINERS
@@ -4,4 +4,5 @@ S:	Maintained
 F:	arch/arm/dts/stm32mp15xx-dhcom*
 F:	board/dhelectronics/dh_stm32mp1/
 F:	configs/stm32mp15_dhcom_basic_defconfig
+F:	configs/stm32mp15_dhcor_basic_defconfig
 F:	include/configs/stm32mp1.h
diff --git a/board/dhelectronics/dh_stm32mp1/Makefile b/board/dhelectronics/dh_stm32mp1/Makefile
index b42c4e4c04..e8f218da08 100644
--- a/board/dhelectronics/dh_stm32mp1/Makefile
+++ b/board/dhelectronics/dh_stm32mp1/Makefile
@@ -8,3 +8,6 @@ obj-y += ../../st/stm32mp1/spl.o
 endif
 
 obj-y += ../../st/stm32mp1/board.o board.o
+
+obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += ../../st/common/stm32mp_mtdparts.o
+obj-$(CONFIG_SET_DFU_ALT_INFO) += ../../st/common/stm32mp_dfu.o
diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c
index 322558157e..26e827bc38 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <adc.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -30,6 +32,8 @@
 #include <mtd_node.h>
 #include <netdev.h>
 #include <phy.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 #include <remoteproc.h>
 #include <reset.h>
@@ -116,9 +120,7 @@ int checkboard(void)
 	const char *fdt_compat;
 	int fdt_compat_len;
 
-	if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
-		mode = "trusted with OP-TEE";
-	else if (IS_ENABLED(CONFIG_TFABOOT))
+	if (IS_ENABLED(CONFIG_TFABOOT))
 		mode = "trusted";
 	else
 		mode = "basic";
@@ -133,6 +135,89 @@ int checkboard(void)
 	return 0;
 }
 
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+static u8 brdcode __section("data");
+static u8 ddr3code __section("data");
+static u8 somcode __section("data");
+
+static void board_get_coding_straps(void)
+{
+	struct gpio_desc gpio[4];
+	ofnode node;
+	int i, ret;
+
+	node = ofnode_path("/config");
+	if (!ofnode_valid(node)) {
+		printf("%s: no /config node?\n", __func__);
+		return;
+	}
+
+	brdcode = 0;
+	ddr3code = 0;
+	somcode = 0;
+
+	ret = gpio_request_list_by_name_nodev(node, "dh,som-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		somcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
+	ret = gpio_request_list_by_name_nodev(node, "dh,ddr3-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		ddr3code |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
+	ret = gpio_request_list_by_name_nodev(node, "dh,board-coding-gpios",
+					      gpio, ARRAY_SIZE(gpio),
+					      GPIOD_IS_IN);
+	for (i = 0; i < ret; i++)
+		brdcode |= !!dm_gpio_get_value(&(gpio[i])) << i;
+
+	printf("Code:  SoM:rev=%d,ddr3=%d Board:rev=%d\n",
+		somcode, ddr3code, brdcode);
+}
+
+int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
+					 const char *name)
+{
+	if (ddr3code == 1 &&
+	    !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x1gb-533mhz"))
+		return 0;
+
+	if (ddr3code == 2 &&
+	    !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x2gb-533mhz"))
+		return 0;
+
+	if (ddr3code == 3 &&
+	    !strcmp(name, "st,ddr3l-dhsom-1066-888-bin-g-2x4gb-533mhz"))
+		return 0;
+
+	return -EINVAL;
+}
+
+int board_early_init_f(void)
+{
+	board_get_coding_straps();
+
+	return 0;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	char test[20];
+
+	snprintf(test, sizeof(test), "somrev%d_boardrev%d", somcode, brdcode);
+
+	if (!strcmp(name, test))
+		return 0;
+
+	return -EINVAL;
+}
+#endif
+#endif
+
 static void board_key_check(void)
 {
 #if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
@@ -478,6 +563,12 @@ int board_late_init(void)
 	if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
 		env_set("bootdelay", "0");
 
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+	env_set_ulong("dh_som_rev", somcode);
+	env_set_ulong("dh_board_rev", brdcode);
+	env_set_ulong("dh_ddr3_code", ddr3code);
+#endif
+
 	return 0;
 }
 
@@ -570,95 +661,6 @@ enum env_location env_get_location(enum env_operation op, int prio)
 #endif
 }
 
-#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
-
-#define MTDPARTS_LEN		256
-#define MTDIDS_LEN		128
-
-/**
- * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
- * If we need to access it before the env is relocated, then we need
- * to use our own stack buffer. gd->env_buf will be too small.
- *
- * @param buf temporary buffer pointer MTDPARTS_LEN long
- * @return mtdparts variable string, NULL if not found
- */
-static const char *env_get_mtdparts(const char *str, char *buf)
-{
-	if (gd->flags & GD_FLG_ENV_READY)
-		return env_get(str);
-	if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
-		return buf;
-
-	return NULL;
-}
-
-/**
- * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
- */
-static void board_get_mtdparts(const char *dev,
-			       char *mtdids,
-			       char *mtdparts)
-{
-	char env_name[32] = "mtdparts_";
-	char tmp_mtdparts[MTDPARTS_LEN];
-	const char *tmp;
-
-	/* name of env variable to read = mtdparts_<dev> */
-	strcat(env_name, dev);
-	tmp = env_get_mtdparts(env_name, tmp_mtdparts);
-	if (tmp) {
-		/* mtdids: "<dev>=<dev>, ...." */
-		if (mtdids[0] != '\0')
-			strcat(mtdids, ",");
-		strcat(mtdids, dev);
-		strcat(mtdids, "=");
-		strcat(mtdids, dev);
-
-		/* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
-		if (mtdparts[0] != '\0')
-			strncat(mtdparts, ";", MTDPARTS_LEN);
-		else
-			strcat(mtdparts, "mtdparts=");
-		strncat(mtdparts, dev, MTDPARTS_LEN);
-		strncat(mtdparts, ":", MTDPARTS_LEN);
-		strncat(mtdparts, tmp, MTDPARTS_LEN);
-	}
-}
-
-void board_mtdparts_default(const char **mtdids, const char **mtdparts)
-{
-	struct udevice *dev;
-	static char parts[3 * MTDPARTS_LEN + 1];
-	static char ids[MTDIDS_LEN + 1];
-	static bool mtd_initialized;
-
-	if (mtd_initialized) {
-		*mtdids = ids;
-		*mtdparts = parts;
-		return;
-	}
-
-	memset(parts, 0, sizeof(parts));
-	memset(ids, 0, sizeof(ids));
-
-	/* probe all MTD devices */
-	for (uclass_first_device(UCLASS_MTD, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		pr_debug("mtd device = %s\n", dev->name);
-	}
-
-	if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
-		board_get_mtdparts("nor0", ids, parts);
-
-	mtd_initialized = true;
-	*mtdids = ids;
-	*mtdparts = parts;
-	debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
-}
-#endif
-
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -666,56 +668,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 }
 #endif
 
-#ifdef CONFIG_SET_DFU_ALT_INFO
-#define DFU_ALT_BUF_LEN SZ_1K
-
-static void board_get_alt_info(const char *dev, char *buff)
-{
-	char var_name[32] = "dfu_alt_info_";
-	int ret;
-
-	ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
-
-	/* name of env variable to read = dfu_alt_info_<dev> */
-	strcat(var_name, dev);
-	ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
-	if (ret) {
-		if (buff[0] != '\0')
-			strcat(buff, "&");
-		strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
-	}
-}
-
-void set_dfu_alt_info(char *interface, char *devstr)
-{
-	struct udevice *dev;
-
-	ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
-
-	if (env_get("dfu_alt_info"))
-		return;
-
-	memset(buf, 0, sizeof(buf));
-
-	/* probe all MTD devices */
-	mtd_probe_devices();
-
-	board_get_alt_info("ram", buf);
-
-	if (!uclass_get_device(UCLASS_MMC, 0, &dev))
-		board_get_alt_info("mmc0", buf);
-
-	if (!uclass_get_device(UCLASS_MMC, 1, &dev))
-		board_get_alt_info("mmc1", buf);
-
-	if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
-		board_get_alt_info("nor0", buf);
-
-	env_set("dfu_alt_info", buf);
-	puts("DFU alt info setting: done\n");
-}
-#endif
-
 static void board_copro_image_process(ulong fw_image, size_t fw_size)
 {
 	int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its
new file mode 100644
index 0000000000..2776c41af1
--- /dev/null
+++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		uboot {
+			description = "U-Boot (32-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0xc0100000>;
+			entry = <0xc0100000>;
+		};
+
+		fdt-1 {
+			description = ".dtb";
+			data = /incbin/("arch/arm/dts/stm32mp15xx-dhcom-pdk2.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+
+		config-1 {
+			description = "somrev0_boardrev0"; /* SoM+board model */
+			loadables = "uboot";
+			fdt = "fdt-1";
+		};
+
+		/* Add 587-100..587-400 with fdt-2..fdt-4 here */
+	};
+};
diff --git a/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
new file mode 100644
index 0000000000..8844508f1a
--- /dev/null
+++ b/board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its
@@ -0,0 +1,39 @@
+/dts-v1/;
+
+/ {
+	description = "U-Boot mainline";
+	#address-cells = <1>;
+
+	images {
+		uboot {
+			description = "U-Boot (32-bit)";
+			data = /incbin/("u-boot-nodtb.bin");
+			type = "standalone";
+			os = "U-Boot";
+			arch = "arm";
+			compression = "none";
+			load = <0xc0100000>;
+			entry = <0xc0100000>;
+		};
+
+		fdt-1 {
+			description = ".dtb";
+			data = /incbin/("arch/arm/dts/stm32mp15xx-dhcor-avenger96.dtb");
+			type = "flat_dt";
+			arch = "arm";
+			compression = "none";
+		};
+	};
+
+	configurations {
+		default = "config-1";
+
+		config-1 {
+			description = "somrev0_boardrev1"; /* SoM+board model */
+			loadables = "uboot";
+			fdt = "fdt-1";
+		};
+
+		/* Add 586-200..586-400 with fdt-2..fdt-4 here */
+	};
+};
diff --git a/board/ea/mx7ulp_com/mx7ulp_com.c b/board/ea/mx7ulp_com/mx7ulp_com.c
index 6fc1631bf7..a9b8a32108 100644
--- a/board/ea/mx7ulp_com/mx7ulp_com.c
+++ b/board/ea/mx7ulp_com/mx7ulp_com.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mx7ulp-pins.h>
diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c
index fc4587ed0d..a602b623ad 100644
--- a/board/eets/pdu001/board.c
+++ b/board/eets/pdu001/board.c
@@ -13,6 +13,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <i2c.h>
 #include <watchdog.h>
diff --git a/board/egnite/ethernut5/ethernut5_pwrman.c b/board/egnite/ethernut5/ethernut5_pwrman.c
index aa99d29c21..81f1abf2fa 100644
--- a/board/egnite/ethernut5/ethernut5_pwrman.c
+++ b/board/egnite/ethernut5/ethernut5_pwrman.c
@@ -32,11 +32,13 @@
  * http://www.ethernut.de/
  */
 #include <common.h>
+#include <command.h>
 #include <asm/arch/at91sam9260.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/gpio.h>
 #include <asm/io.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 #include "ethernut5_pwrman.h"
 
@@ -215,7 +217,7 @@ void ethernut5_print_voltage(void)
 /*
  * Process the board specific 'pwrman' command.
  */
-int do_pwrman(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_pwrman(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	u8 val;
 	int i;
diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c
index 9aa71b9941..d3e2981fa8 100644
--- a/board/el/el6x/el6x.c
+++ b/board/el/el6x/el6x.c
@@ -5,12 +5,15 @@
  * Based on other i.MX6 boards
  */
 
+#include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/mxc_i2c.h>
diff --git a/board/elgin/elgin_rv1108/elgin_rv1108.c b/board/elgin/elgin_rv1108/elgin_rv1108.c
index c5a1cc95e4..5d8f62244b 100644
--- a/board/elgin/elgin_rv1108/elgin_rv1108.c
+++ b/board/elgin/elgin_rv1108/elgin_rv1108.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c
index bf5c020af1..e0834f03c7 100644
--- a/board/embest/mx6boards/mx6boards.c
+++ b/board/embest/mx6boards/mx6boards.c
@@ -12,12 +12,15 @@
  * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>.
  */
 
+#include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/emulation/qemu-arm/qemu-arm.c b/board/emulation/qemu-arm/qemu-arm.c
index 4e18733001..69e8ef46f1 100644
--- a/board/emulation/qemu-arm/qemu-arm.c
+++ b/board/emulation/qemu-arm/qemu-arm.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <virtio_types.h>
 #include <virtio.h>
 
diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c
index c3f96988b1..dcfd3f20be 100644
--- a/board/emulation/qemu-riscv/qemu-riscv.c
+++ b/board/emulation/qemu-riscv/qemu-riscv.c
@@ -7,6 +7,8 @@
 #include <dm.h>
 #include <env.h>
 #include <fdtdec.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <init.h>
 #include <virtio_types.h>
diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c
index 9483516ca0..5a2003d509 100644
--- a/board/engicam/common/board.c
+++ b/board/engicam/common/board.c
@@ -10,6 +10,7 @@
 #include <env.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <mmc.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c
index a9820a9028..6a0612481a 100644
--- a/board/engicam/common/spl.c
+++ b/board/engicam/common/spl.c
@@ -6,8 +6,11 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <serial.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 6c5992733c..fd7d6db9bc 100644
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <vsprintf.h>
 #include <asm/io.h>
diff --git a/board/esd/vme8349/caddy.c b/board/esd/vme8349/caddy.c
index db8d7bfe9b..ba91f4b3c8 100644
--- a/board/esd/vme8349/caddy.c
+++ b/board/esd/vme8349/caddy.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <console.h>
 #include <ioports.h>
 #include <mpc83xx.h>
@@ -36,7 +37,7 @@ void generate_answer(struct caddy_cmd *cmd, uint32_t status, uint32_t *result)
 		caddy_interface->answer_in = ptr;
 }
 
-int do_caddy(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_caddy(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long base_addr;
 	uint32_t ptr;
diff --git a/board/esd/vme8349/pci.c b/board/esd/vme8349/pci.c
index 349e7b567c..bf51d39b67 100644
--- a/board/esd/vme8349/pci.c
+++ b/board/esd/vme8349/pci.c
@@ -18,6 +18,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <asm/fsl_i2c.h>
+#include <linux/delay.h>
 #include "vme8349pin.h"
 
 static struct pci_region pci1_regions[] = {
diff --git a/board/esd/vme8349/vme8349.c b/board/esd/vme8349/vme8349.c
index ff811643a6..f54c89d154 100644
--- a/board/esd/vme8349/vme8349.c
+++ b/board/esd/vme8349/vme8349.c
@@ -16,6 +16,7 @@
 #include <init.h>
 #include <ioports.h>
 #include <mpc83xx.h>
+#include <net.h>
 #include <asm/mpc8349_pci.h>
 #if defined(CONFIG_OF_LIBFDT)
 #include <linux/libfdt.h>
diff --git a/board/firefly/firefly-rk3288/firefly-rk3288.c b/board/firefly/firefly-rk3288/firefly-rk3288.c
index a2b0eb5a99..1965985a0f 100644
--- a/board/firefly/firefly-rk3288/firefly-rk3288.c
+++ b/board/firefly/firefly-rk3288/firefly-rk3288.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <hang.h>
+#include <log.h>
 
 #ifdef CONFIG_SPL_BUILD
 static int setup_led(void)
diff --git a/board/firefly/firefly-rk3308/roc_cc_rk3308.c b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
index 5f0a6594b6..28dcc2a690 100644
--- a/board/firefly/firefly-rk3308/roc_cc_rk3308.c
+++ b/board/firefly/firefly-rk3308/roc_cc_rk3308.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/grf_rk3308.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
 
 #if defined(CONFIG_DEBUG_UART)
 #define GRF_BASE	0xff000000
diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS b/board/firefly/roc-pc-rk3399/MAINTAINERS
index 7564dd252d..68a5b757d1 100644
--- a/board/firefly/roc-pc-rk3399/MAINTAINERS
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -1,6 +1,8 @@
 ROC-RK3399-PC
 M:	Levin Du <djw@t-chip.com.cn>
+M:	Suniel Mahesh <sunil@amarulasolutions.com>
 S:	Maintained
 F:	board/firefly/roc-pc-rk3399
 F:	include/configs/roc-pc-rk3399.h
 F:	configs/roc-pc-rk3399_defconfig
+F:	configs/roc-pc-mezzanine-rk3399_defconfig
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index de9185a7ce..7c3a803654 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -5,12 +5,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch-rockchip/periph.h>
 #include <power/regulator.h>
 #include <spl_gpio.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/gpio.h>
-#include <asm/arch-rockchip/grf_rk3399.h>
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -34,26 +34,13 @@ out:
 
 #if defined(CONFIG_TPL_BUILD)
 
-#define PMUGRF_BASE     0xff320000
 #define GPIO0_BASE      0xff720000
 
 int board_early_init_f(void)
 {
 	struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
-	struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
 
-	/**
-	 * 1. Glow yellow LED, termed as low power
-	 * 2. Poll for on board power key press
-	 * 3. Once 2 done, off yellow and glow red LED, termed as full power
-	 * 4. Continue booting...
-	 */
-	spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
-
-	spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
-	while (readl(&gpio0->ext_port) & 0x20);
-
-	spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+	/* Turn on red LED, indicating full power mode */
 	spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
 
 	return 0;
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index e7f684bfb3..e10f948ae5 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -8,12 +8,15 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/cache.h>
 #include <asm/immap_85xx.h>
diff --git a/board/freescale/b4860qds/ddr.c b/board/freescale/b4860qds/ddr.c
index de9f5f5f8b..d3aa349ddf 100644
--- a/board/freescale/b4860qds/ddr.c
+++ b/board/freescale/b4860qds/ddr.c
@@ -7,6 +7,8 @@
 #include <i2c.h>
 #include <hwconfig.h>
 #include <fsl_ddr.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/b4860qds/eth_b4860qds.c b/board/freescale/b4860qds/eth_b4860qds.c
index 67fb1b9b2b..6d5f3d1fda 100644
--- a/board/freescale/b4860qds/eth_b4860qds.c
+++ b/board/freescale/b4860qds/eth_b4860qds.c
@@ -19,6 +19,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
diff --git a/board/freescale/bsc9131rdb/bsc9131rdb.c b/board/freescale/bsc9131rdb/bsc9131rdb.c
index 30e7a1f7ed..75c2aec75d 100644
--- a/board/freescale/bsc9131rdb/bsc9131rdb.c
+++ b/board/freescale/bsc9131rdb/bsc9131rdb.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/cache.h>
diff --git a/board/freescale/bsc9131rdb/spl_minimal.c b/board/freescale/bsc9131rdb/spl_minimal.c
index 79df0f3cbd..4ae9ba06c8 100644
--- a/board/freescale/bsc9131rdb/spl_minimal.c
+++ b/board/freescale/bsc9131rdb/spl_minimal.c
@@ -12,6 +12,7 @@
 #include <asm/fsl_law.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/bsc9132qds/bsc9132qds.c b/board/freescale/bsc9132qds/bsc9132qds.c
index ab05d84190..6870674f7a 100644
--- a/board/freescale/bsc9132qds/bsc9132qds.c
+++ b/board/freescale/bsc9132qds/bsc9132qds.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/cache.h>
diff --git a/board/freescale/bsc9132qds/spl_minimal.c b/board/freescale/bsc9132qds/spl_minimal.c
index dc72b2e2f2..dd56ad6b2b 100644
--- a/board/freescale/bsc9132qds/spl_minimal.c
+++ b/board/freescale/bsc9132qds/spl_minimal.c
@@ -12,6 +12,7 @@
 #include <asm/fsl_law.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/global_data.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/c29xpcie/README b/board/freescale/c29xpcie/README
index 2e249cbb3a..a6120f1845 100644
--- a/board/freescale/c29xpcie/README
+++ b/board/freescale/c29xpcie/README
@@ -56,7 +56,6 @@ Note: 1 stands for 'off', 0 stands for 'on'
 Build and program U-Boot to NOR flash
 ==================================
 1. Build u-boot.bin image example:
-	export ARCH=powerpc
 	export CROSS_COMPILE=/your_path/powerpc-linux-gnu-
 	make C293PCIE
 
diff --git a/board/freescale/c29xpcie/c29xpcie.c b/board/freescale/c29xpcie/c29xpcie.c
index a9ea986579..74502c6d18 100644
--- a/board/freescale/c29xpcie/c29xpcie.c
+++ b/board/freescale/c29xpcie/c29xpcie.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/cache.h>
diff --git a/board/freescale/c29xpcie/cpld.c b/board/freescale/c29xpcie/cpld.c
index f57047d1d3..826af428ce 100644
--- a/board/freescale/c29xpcie/cpld.c
+++ b/board/freescale/c29xpcie/cpld.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #include "cpld.h"
 /**
@@ -89,7 +90,7 @@ static void cpld_dump_regs(void)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int cpld_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 	unsigned char value;
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c
index d18b4fc24b..bb1ef99792 100644
--- a/board/freescale/common/arm_sleep.c
+++ b/board/freescale/common/arm_sleep.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #ifndef CONFIG_ARMV7_NONSEC
 #error " Deep sleep needs non-secure mode support. "
diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c
index 36b620ca23..638aa3c19a 100644
--- a/board/freescale/common/cmd_esbc_validate.c
+++ b/board/freescale/common/cmd_esbc_validate.c
@@ -8,8 +8,8 @@
 #include <env.h>
 #include <fsl_validate.h>
 
-int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+int do_esbc_halt(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	if (fsl_check_boot_mode_secure() == 0) {
 		printf("Boot Mode is Non-Secure. Not entering spin loop.\n");
@@ -24,8 +24,8 @@ loop:
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_esbc_validate(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	char *hash_str = NULL;
 	uintptr_t haddr;
diff --git a/board/freescale/common/diu_ch7301.c b/board/freescale/common/diu_ch7301.c
index 7f11123e6f..02a271895b 100644
--- a/board/freescale/common/diu_ch7301.c
+++ b/board/freescale/common/diu_ch7301.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <stdio_dev.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 #define I2C_DVI_INPUT_DATA_FORMAT_REG		0x1F
 #define I2C_DVI_PLL_CHARGE_CNTL_REG		0x33
diff --git a/board/freescale/common/fsl_chain_of_trust.c b/board/freescale/common/fsl_chain_of_trust.c
index a024e7239e..cafb24971b 100644
--- a/board/freescale/common/fsl_chain_of_trust.c
+++ b/board/freescale/common/fsl_chain_of_trust.c
@@ -9,6 +9,7 @@
 #include <fsl_validate.h>
 #include <fsl_secboot_err.h>
 #include <fsl_sfp.h>
+#include <log.h>
 #include <dm/root.h>
 
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index 2bf9d58746..564a8b3b54 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -5,11 +5,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <flash.h>
 #include <fsl_validate.h>
 #include <fsl_secboot_err.h>
 #include <fsl_sfp.h>
 #include <fsl_sec.h>
 #include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <u-boot/rsa-mod-exp.h>
 #include <hash.h>
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c
index f1e60cf277..2143395781 100644
--- a/board/freescale/common/ics307_clk.c
+++ b/board/freescale/common/ics307_clk.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 
 #include "ics307_clk.h"
diff --git a/board/freescale/common/idt8t49n222a_serdes_clk.c b/board/freescale/common/idt8t49n222a_serdes_clk.c
index 4f8e8b7d42..bb3cdac841 100644
--- a/board/freescale/common/idt8t49n222a_serdes_clk.c
+++ b/board/freescale/common/idt8t49n222a_serdes_clk.c
@@ -5,6 +5,8 @@
  */
 
 #include "idt8t49n222a_serdes_clk.h"
+#include <log.h>
+#include <linux/delay.h>
 
 #define DEVICE_ID_REG		0x00
 
diff --git a/board/freescale/common/mc34vr500.c b/board/freescale/common/mc34vr500.c
index d4f0f0c652..d6b4c65a3c 100644
--- a/board/freescale/common/mc34vr500.c
+++ b/board/freescale/common/mc34vr500.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/mc34vr500_pmic.h>
 
diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c
index 739a416730..6f6f4d40fc 100644
--- a/board/freescale/common/mpc85xx_sleep.c
+++ b/board/freescale/common/mpc85xx_sleep.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/immap_85xx.h>
 #include "sleep.h"
 #ifdef CONFIG_U_QE
diff --git a/board/freescale/common/ngpixis.c b/board/freescale/common/ngpixis.c
index d7254010bf..37a6f775a0 100644
--- a/board/freescale/common/ngpixis.c
+++ b/board/freescale/common/ngpixis.c
@@ -171,7 +171,8 @@ void pixis_sysclk_set(unsigned long sysclk)
 	PIXIS_WRITE(sclk[2], sclk2);
 }
 
-int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int pixis_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	unsigned int i;
 	unsigned long sysclk;
diff --git a/board/freescale/common/ns_access.c b/board/freescale/common/ns_access.c
index 0e6f2135b4..ee8ed616cb 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <fsl_csu.h>
 #include <asm/arch/ns_access.h>
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index e9b7127833..4127fbc139 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -266,8 +266,8 @@ static void set_px_go_with_watchdog(void)
 /* Disable the watchdog
  *
  */
-static int pixis_disable_watchdog_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-				      char * const argv[])
+static int pixis_disable_watchdog_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+				      char *const argv[])
 {
 	/* Disable the VELA sequencer and the watchdog */
 	clrbits_8(pixis_base + PIXIS_VCTL, 9);
@@ -285,7 +285,8 @@ U_BOOT_CMD(
 
 /* Enable or disable SGMII mode for a TSEC
  */
-static int pixis_set_sgmii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int pixis_set_sgmii(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	int which_tsec = -1;
 	unsigned char mask;
@@ -411,7 +412,8 @@ static unsigned long strfractoint(char *strptr)
 	return intval + decval;
 }
 
-static int pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int pixis_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	unsigned int i;
 	char *p_cf = NULL;
diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c
index dd1ee90b3c..591203132f 100644
--- a/board/freescale/common/qixis.c
+++ b/board/freescale/common/qixis.c
@@ -233,7 +233,8 @@ void __weak qixis_dump_switch(void)
 	puts("Reverse engineering switch is not implemented for this board\n");
 }
 
-static int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int qixis_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	int i;
 
diff --git a/board/freescale/common/sgmii_riser.c b/board/freescale/common/sgmii_riser.c
index f3e0fb2cd5..2315793010 100644
--- a/board/freescale/common/sgmii_riser.c
+++ b/board/freescale/common/sgmii_riser.c
@@ -14,6 +14,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <linux/libfdt.h>
 #include <tsec.h>
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
index 6f151b0f71..728245d81c 100644
--- a/board/freescale/common/sys_eeprom.c
+++ b/board/freescale/common/sys_eeprom.c
@@ -10,7 +10,9 @@
 #include <command.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 
 #ifdef CONFIG_SYS_I2C_EEPROM_CCID
@@ -382,7 +384,7 @@ static void set_mac_address(unsigned int index, const char *string)
 	update_crc();
 }
 
-int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char cmd;
 
@@ -595,6 +597,7 @@ unsigned int get_cpu_board_revision(void)
 		(void *)&be, sizeof(be));
 #else
 	struct udevice *dev;
+	int ret;
 #ifdef CONFIG_SYS_EEPROM_BUS_NUM
 	ret = i2c_get_chip_for_busnum(CONFIG_SYS_EEPROM_BUS_NUM,
 				      CONFIG_SYS_I2C_EEPROM_ADDR,
@@ -603,7 +606,7 @@ unsigned int get_cpu_board_revision(void)
 #else
 	ret = i2c_get_chip_for_busnum(0, CONFIG_SYS_I2C_EEPROM_ADDR,
 				      CONFIG_SYS_I2C_EEPROM_ADDR_LEN,
-				      &dev)
+				      &dev);
 #endif
 	if (!ret)
 		dm_i2c_read(dev, 0, (void *)&be, sizeof(be));
diff --git a/board/freescale/common/vid.c b/board/freescale/common/vid.c
index 20852476dd..ed0d9b471c 100644
--- a/board/freescale/common/vid.c
+++ b/board/freescale/common/vid.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <i2c.h>
 #include <irq_func.h>
+#include <log.h>
 #include <asm/io.h>
 #ifdef CONFIG_FSL_LSCH2
 #include <asm/arch/immap_lsch2.h>
@@ -16,6 +17,7 @@
 #else
 #include <asm/immap_85xx.h>
 #endif
+#include <linux/delay.h>
 #include "vid.h"
 
 int __weak i2c_multiplexer_select_vid_channel(u8 channel)
@@ -925,9 +927,9 @@ exit:
 
 }
 
-static int do_vdd_override(cmd_tbl_t *cmdtp,
+static int do_vdd_override(struct cmd_tbl *cmdtp,
 			   int flag, int argc,
-			   char * const argv[])
+			   char *const argv[])
 {
 	ulong override;
 
@@ -941,9 +943,8 @@ static int do_vdd_override(cmd_tbl_t *cmdtp,
 	return 0;
 }
 
-static int do_vdd_read(cmd_tbl_t *cmdtp,
-			 int flag, int argc,
-			 char * const argv[])
+static int do_vdd_read(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (argc < 1)
 		return CMD_RET_USAGE;
diff --git a/board/freescale/common/vsc3316_3308.c b/board/freescale/common/vsc3316_3308.c
index 033fae020f..8aceb8ef17 100644
--- a/board/freescale/common/vsc3316_3308.c
+++ b/board/freescale/common/vsc3316_3308.c
@@ -1,9 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include "vsc3316_3308.h"
+#include <log.h>
 
 #define REVISION_ID_REG		0x7E
 #define INTERFACE_MODE_REG		0x79
@@ -32,7 +34,22 @@ int vsc_if_enable(unsigned int vsc_addr)
 
 	/* enable 2-wire Serial InterFace (I2C) */
 	data = 0x02;
+#ifdef CONFIG_DM_I2C
+	int ret, bus_num = 0;
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	return dm_i2c_write(dev, INTERFACE_MODE_REG, &data, 1);
+#else
 	return i2c_write(vsc_addr, INTERFACE_MODE_REG, 1, &data, 1);
+#endif
 }
 
 int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
@@ -45,6 +62,66 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
 	debug("VSC:Initializing VSC3316 at I2C address 0x%2x"
 		" for Tx\n", vsc_addr);
 
+#ifdef CONFIG_DM_I2C
+	int bus_num = 0;
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
+	if (ret < 0) {
+		printf("VSC:0x%x could not read REV_ID from device.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	if (rev_id != 0xab) {
+		printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
+		       vsc_addr);
+		return -ENODEV;
+	}
+
+	ret = vsc_if_enable(vsc_addr);
+	if (ret) {
+		printf("VSC:0x%x could not configured for 2-wire I/F.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	/* config connections - page 0x00 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
+
+	/* Making crosspoint connections, by connecting required
+	 * input to output
+	 */
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
+
+	/* input state - page 0x13 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
+	/* Configuring the required input of the switch */
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev, con_arr[i][0], 0x80);
+
+	/* Setting Global Input LOS threshold value */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60);
+
+	/* config output mode - page 0x23 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
+	/* Turn ON the Output driver correspond to required output*/
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev,  con_arr[i][1], 0);
+
+	/* configure global core control register, Turn on Global core power */
+	dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
+
+#else
 	ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
 	if (ret < 0) {
 		printf("VSC:0x%x could not read REV_ID from device.\n",
@@ -90,6 +167,7 @@ int vsc3316_config(unsigned int vsc_addr, int8_t con_arr[][2],
 
 	/* configure global core control register, Turn on Global core power */
 	i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
+#endif
 
 	vsc_wp_config(vsc_addr);
 
@@ -107,6 +185,105 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],
 	debug("VSC:Initializing VSC3308 at I2C address 0x%x for Tx\n",
 	      vsc_addr);
 
+#ifdef CONFIG_DM_I2C
+	int bus_num = 0;
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
+	if (ret < 0) {
+		printf("VSC:0x%x could not read REV_ID from device.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	if (rev_id != 0xab) {
+		printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
+		       vsc_addr);
+		return -ENODEV;
+	}
+
+	ret = vsc_if_enable(vsc_addr);
+	if (ret) {
+		printf("VSC:0x%x could not configured for 2-wire I/F.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	/* config connections - page 0x00 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
+
+	/* Configure Global Input ISE */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0);
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0);
+
+	/* Configure Tx/Rx Global Output PE1 */
+	dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE1, 0);
+
+	/* Configure Tx/Rx Global Output PE2 */
+	dm_i2c_reg_write(dev, GLOBAL_OUTPUT_PE2, 0);
+
+	/* Configure Tx/Rx Global Input GAIN */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_GAIN, 0x3F);
+
+	/* Setting Global Input LOS threshold value */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0xE0);
+
+	/* Setting Global output termination */
+	dm_i2c_reg_write(dev, GLOBAL_OUTPUT_TERMINATION, 0);
+
+	/* Configure Tx/Rx Global Output level */
+	if (vsc_addr == VSC3308_TX_ADDRESS)
+		dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 4);
+	else
+		dm_i2c_reg_write(dev, GLOBAL_OUTPUT_LEVEL, 2);
+
+	/* Making crosspoint connections, by connecting required
+	 * input to output
+	 */
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
+
+	/* input state - page 0x13 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
+	/* Turning off all the required input of the switch */
+	for (i = 0; i < num_con; i++)
+		dm_i2c_reg_write(dev, con_arr[i][0], 1);
+
+	/* only turn on specific Tx/Rx requested by the XFI erratum */
+	if (vsc_addr == VSC3308_TX_ADDRESS) {
+		dm_i2c_reg_write(dev, 2, 0);
+		dm_i2c_reg_write(dev, 3, 0);
+	} else {
+		dm_i2c_reg_write(dev, 0, 0);
+		dm_i2c_reg_write(dev, 1, 0);
+	}
+
+	/* config output mode - page 0x23 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
+	/* Turn off the Output driver correspond to required output*/
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev,  con_arr[i][1], 1);
+
+	/* only turn on specific Tx/Rx requested by the XFI erratum */
+	if (vsc_addr == VSC3308_TX_ADDRESS) {
+		dm_i2c_reg_write(dev, 0, 0);
+		dm_i2c_reg_write(dev, 1, 0);
+	} else {
+		dm_i2c_reg_write(dev, 3, 0);
+		dm_i2c_reg_write(dev, 4, 0);
+	}
+
+	/* configure global core control register, Turn on Global core power */
+	dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
+#else
 	ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
 	if (ret < 0) {
 		printf("VSC:0x%x could not read REV_ID from device.\n",
@@ -192,7 +369,7 @@ int vsc3308_config_adjust(unsigned int vsc_addr, const int8_t con_arr[][2],
 
 	/* configure global core control register, Turn on Global core power */
 	i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
-
+#endif
 	vsc_wp_config(vsc_addr);
 
 	return 0;
@@ -208,7 +385,69 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],
 
 	debug("VSC:Initializing VSC3308 at I2C address 0x%x"
 		" for Tx\n", vsc_addr);
+#ifdef CONFIG_DM_I2C
+	int bus_num = 0;
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
 
+	ret = dm_i2c_read(dev, REVISION_ID_REG, &rev_id, 1);
+	if (ret < 0) {
+		printf("VSC:0x%x could not read REV_ID from device.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	if (rev_id != 0xab) {
+		printf("VSC: device at address 0x%x is not VSC3316/3308.\n",
+		       vsc_addr);
+		return -ENODEV;
+	}
+
+	ret = vsc_if_enable(vsc_addr);
+	if (ret) {
+		printf("VSC:0x%x could not configured for 2-wire I/F.\n",
+		       vsc_addr);
+		return ret;
+	}
+
+	/* config connections - page 0x00 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, CONNECTION_CONFIG_PAGE);
+
+	/* Making crosspoint connections, by connecting required
+	 * input to output
+	 */
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev, con_arr[i][1], con_arr[i][0]);
+
+	/*Configure Global Input ISE and gain */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE1, 0x12);
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_ISE2, 0x12);
+
+	/* input state - page 0x13 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, INPUT_STATE_REG);
+	/* Turning ON the required input of the switch */
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev, con_arr[i][0], 0);
+
+	/* Setting Global Input LOS threshold value */
+	dm_i2c_reg_write(dev, GLOBAL_INPUT_LOS, 0x60);
+
+	/* config output mode - page 0x23 */
+	dm_i2c_reg_write(dev, CURRENT_PAGE_REGISTER, OUTPUT_MODE_PAGE);
+	/* Turn ON the Output driver correspond to required output*/
+	for (i = 0; i < num_con ; i++)
+		dm_i2c_reg_write(dev,  con_arr[i][1], 0);
+
+	/* configure global core control register, Turn on Global core power */
+	dm_i2c_reg_write(dev, GLOBAL_CORE_CNTRL, 0);
+#else
 	ret = i2c_read(vsc_addr, REVISION_ID_REG, 1, &rev_id, 1);
 	if (ret < 0) {
 		printf("VSC:0x%x could not read REV_ID from device.\n",
@@ -258,7 +497,7 @@ int vsc3308_config(unsigned int vsc_addr, const int8_t con_arr[][2],
 
 	/* configure global core control register, Turn on Global core power */
 	i2c_reg_write(vsc_addr, GLOBAL_CORE_CNTRL, 0);
-
+#endif
 	vsc_wp_config(vsc_addr);
 
 	return 0;
@@ -270,6 +509,22 @@ void vsc_wp_config(unsigned int vsc_addr)
 
 	/* For new crosspoint configuration to occur, WP bit of
 	 * CORE_CONFIG_REG should be set 1 and then reset to 0 */
+#ifdef CONFIG_DM_I2C
+	int ret, bus_num = 0;
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, vsc_addr,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return;
+	}
+
+	dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x01);
+	dm_i2c_reg_write(dev, CORE_CONFIG_REG, 0x0);
+#else
 	i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x01);
 	i2c_reg_write(vsc_addr, CORE_CONFIG_REG, 0x0);
+#endif
 }
diff --git a/board/freescale/common/zm7300.c b/board/freescale/common/zm7300.c
index acd5343b21..03679e723f 100644
--- a/board/freescale/common/zm7300.c
+++ b/board/freescale/common/zm7300.c
@@ -5,6 +5,7 @@
 
 /* Power-One ZM7300 DPM */
 #include "zm7300.h"
+#include <log.h>
 
 #define DPM_WP 0x96
 #define WRP_OPCODE 0x01
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 66eea32e07..f0c7bed68f 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -7,6 +7,7 @@
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/freescale/corenet_ds/ddr.c b/board/freescale/corenet_ds/ddr.c
index 9c8731ce78..19f6e8700d 100644
--- a/board/freescale/corenet_ds/ddr.c
+++ b/board/freescale/corenet_ds/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <vsprintf.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
diff --git a/board/freescale/corenet_ds/eth_hydra.c b/board/freescale/corenet_ds/eth_hydra.c
index 45c23df27e..a17ca7ac60 100644
--- a/board/freescale/corenet_ds/eth_hydra.c
+++ b/board/freescale/corenet_ds/eth_hydra.c
@@ -48,6 +48,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c
index 0979c5f489..801a6f44f0 100644
--- a/board/freescale/corenet_ds/eth_p4080.c
+++ b/board/freescale/corenet_ds/eth_p4080.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
@@ -20,6 +22,7 @@
 #include <fsl_mdio.h>
 #include <miiphy.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 #include "../common/ngpixis.h"
 #include "../common/fman.h"
diff --git a/board/freescale/corenet_ds/eth_superhydra.c b/board/freescale/corenet_ds/eth_superhydra.c
index 1962b7e3c7..8ca220b840 100644
--- a/board/freescale/corenet_ds/eth_superhydra.c
+++ b/board/freescale/corenet_ds/eth_superhydra.c
@@ -48,6 +48,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
diff --git a/board/freescale/imx8mm_evk/imx8mm_evk.c b/board/freescale/imx8mm_evk/imx8mm_evk.c
index 53ebb949df..c43af9bc48 100644
--- a/board/freescale/imx8mm_evk/imx8mm_evk.c
+++ b/board/freescale/imx8mm_evk/imx8mm_evk.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <init.h>
 #include <miiphy.h>
 #include <netdev.h>
 
diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c
index 5d17f397cb..19c8a5aa23 100644
--- a/board/freescale/imx8mm_evk/spl.c
+++ b/board/freescale/imx8mm_evk/spl.c
@@ -4,8 +4,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/mach-imx/iomux-v3.h>
@@ -161,12 +165,3 @@ void board_init_f(ulong dummy)
 
 	board_init_r(NULL, 0);
 }
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	puts ("resetting ...\n");
-
-	reset_cpu(WDOG1_BASE_ADDR);
-
-	return 0;
-}
diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c b/board/freescale/imx8mn_evk/imx8mn_evk.c
index 4f33c0e7c9..ea02bb75f4 100644
--- a/board/freescale/imx8mn_evk/imx8mn_evk.c
+++ b/board/freescale/imx8mn_evk/imx8mn_evk.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
index 7aed14c52b..dd38c1015c 100644
--- a/board/freescale/imx8mn_evk/spl.c
+++ b/board/freescale/imx8mn_evk/spl.c
@@ -5,8 +5,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/mach-imx/iomux-v3.h>
@@ -114,12 +118,3 @@ void board_init_f(ulong dummy)
 
 	board_init_r(NULL, 0);
 }
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	puts("resetting ...\n");
-
-	reset_cpu(WDOG1_BASE_ADDR);
-
-	return 0;
-}
diff --git a/board/freescale/imx8mp_evk/imx8mp_evk.c b/board/freescale/imx8mp_evk/imx8mp_evk.c
index f004af681b..97ba15645a 100644
--- a/board/freescale/imx8mp_evk/imx8mp_evk.c
+++ b/board/freescale/imx8mp_evk/imx8mp_evk.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <env.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm-generic/gpio.h>
 #include <asm/arch/imx8mp_pins.h>
diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c
index 0b20668e2b..cd5b32c3f8 100644
--- a/board/freescale/imx8mp_evk/spl.c
+++ b/board/freescale/imx8mp_evk/spl.c
@@ -5,8 +5,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <errno.h>
@@ -139,7 +143,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	/* Adjust pmic voltage to 1.0V for 800M */
 	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 
 	power_init_board();
@@ -149,12 +152,3 @@ void board_init_f(ulong dummy)
 
 	board_init_r(NULL, 0);
 }
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	puts("resetting ...\n");
-
-	reset_cpu(WDOG1_BASE_ADDR);
-
-	return 0;
-}
diff --git a/board/freescale/imx8mq_evk/imx8mq_evk.c b/board/freescale/imx8mq_evk/imx8mq_evk.c
index b2f464abb1..ae3be5785c 100644
--- a/board/freescale/imx8mq_evk/imx8mq_evk.c
+++ b/board/freescale/imx8mq_evk/imx8mq_evk.c
@@ -21,6 +21,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/arch/clock.h>
 #include <spl.h>
+#include <linux/bitops.h>
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include "../common/pfuze.h"
diff --git a/board/freescale/imx8mq_evk/spl.c b/board/freescale/imx8mq_evk/spl.c
index e442510f44..2c6ae48da7 100644
--- a/board/freescale/imx8mq_evk/spl.c
+++ b/board/freescale/imx8mq_evk/spl.c
@@ -7,6 +7,9 @@
 
 #include <common.h>
 #include <hang.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <asm/io.h>
@@ -19,6 +22,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <fsl_esdhc_imx.h>
 #include <mmc.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/pfuze100_pmic.h>
 #include <spl.h>
@@ -235,7 +239,6 @@ void board_init_f(ulong dummy)
 
 	enable_tzc380();
 
-	/* Adjust pmic voltage to 1.0V for 800M */
 	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 
 	power_init_board();
diff --git a/board/freescale/imx8qm_mek/imx8qm_mek.c b/board/freescale/imx8qm_mek/imx8qm_mek.c
index c9b9b2547e..c0cae3540f 100644
--- a/board/freescale/imx8qm_mek/imx8qm_mek.c
+++ b/board/freescale/imx8qm_mek/imx8qm_mek.c
@@ -123,10 +123,23 @@ int board_mmc_get_env_dev(int devno)
 
 int board_late_init(void)
 {
+	char *fdt_file;
+	bool m4_booted;
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	env_set("board_name", "MEK");
 	env_set("board_rev", "iMX8QM");
 #endif
 
+	fdt_file = env_get("fdt_file");
+	m4_booted = m4_parts_booted();
+
+	if (fdt_file && !strcmp(fdt_file, "undefined")) {
+		if (m4_booted)
+			env_set("fdt_file", "imx8qm-mek-rpmsg.dtb");
+		else
+			env_set("fdt_file", "imx8qm-mek.dtb");
+	}
+
 	return 0;
 }
diff --git a/board/freescale/imx8qm_mek/spl.c b/board/freescale/imx8qm_mek/spl.c
index cb4006eb2a..9dee12a2c6 100644
--- a/board/freescale/imx8qm_mek/spl.c
+++ b/board/freescale/imx8qm_mek/spl.c
@@ -6,12 +6,16 @@
 
 #include <common.h>
 #include <dm.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <dm/uclass.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -37,6 +41,11 @@ void spl_board_init(void)
 	puts("Normal Boot\n");
 }
 
+void spl_board_prepare_for_boot(void)
+{
+	imx8_power_off_pd_devices(NULL, 0);
+}
+
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
index b96f0da21e..8b8a3c6300 100644
--- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c
+++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fsl_esdhc_imx.h>
 #include <fdt_support.h>
@@ -16,6 +17,7 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/imx8-pins.h>
+#include <asm/arch/snvs_security_sc.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/sys_proto.h>
 
@@ -111,6 +113,15 @@ int board_init(void)
 {
 	board_gpio_init();
 
+#ifdef CONFIG_IMX_SNVS_SEC_SC_AUTO
+	{
+		int ret = snvs_security_sc_init();
+
+		if (ret)
+			return ret;
+	}
+#endif
+
 	return 0;
 }
 
@@ -136,10 +147,23 @@ int board_mmc_get_env_dev(int devno)
 
 int board_late_init(void)
 {
+	char *fdt_file;
+	bool m4_booted;
+
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	env_set("board_name", "MEK");
 	env_set("board_rev", "iMX8QXP");
 #endif
 
+	fdt_file = env_get("fdt_file");
+	m4_booted = m4_parts_booted();
+
+	if (fdt_file && !strcmp(fdt_file, "undefined")) {
+		if (m4_booted)
+			env_set("fdt_file", "imx8qxp-mek-rpmsg.dtb");
+		else
+			env_set("fdt_file", "imx8qxp-mek.dtb");
+	}
+
 	return 0;
 }
diff --git a/board/freescale/imx8qxp_mek/spl.c b/board/freescale/imx8qxp_mek/spl.c
index e4e4cbe716..881d297cf1 100644
--- a/board/freescale/imx8qxp_mek/spl.c
+++ b/board/freescale/imx8qxp_mek/spl.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <spl.h>
 #include <dm/uclass.h>
 #include <dm/device.h>
@@ -17,6 +20,7 @@
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/imx8-pins.h>
 #include <asm/arch/iomux.h>
+#include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -55,6 +59,11 @@ void spl_board_init(void)
 	puts("Normal Boot\n");
 }
 
+void spl_board_prepare_for_boot(void)
+{
+	imx8_power_off_pd_devices(NULL, 0);
+}
+
 #ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
diff --git a/board/freescale/imxrt1020-evk/README b/board/freescale/imxrt1020-evk/README
index 3da72fdad2..abee7ca5f3 100644
--- a/board/freescale/imxrt1020-evk/README
+++ b/board/freescale/imxrt1020-evk/README
@@ -11,11 +11,11 @@ This will generate the SPL image called SPL and the u-boot.img.
 
 - Flash the SPL image into the micro SD card:
 
-sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
+sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync
 
 - Flash the u-boot.img image into the micro SD card:
 
-sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=128; sync
+sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128; sync
 
 - Jumper settings:
 
diff --git a/board/freescale/imxrt1020-evk/imxrt1020-evk.c b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
index 06ad524d5d..0cef6071fe 100644
--- a/board/freescale/imxrt1020-evk/imxrt1020-evk.c
+++ b/board/freescale/imxrt1020-evk/imxrt1020-evk.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <spl.h>
 #include <asm/io.h>
diff --git a/board/freescale/imxrt1050-evk/README b/board/freescale/imxrt1050-evk/README
index f7e2894025..a7e68fa9b3 100644
--- a/board/freescale/imxrt1050-evk/README
+++ b/board/freescale/imxrt1050-evk/README
@@ -11,11 +11,11 @@ This will generate the SPL image called SPL and the u-boot.img.
 
 - Flash the SPL image into the micro SD card:
 
-sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync
+sudo dd if=SPL of=/dev/sdX bs=1k seek=1; sync
 
 - Flash the u-boot.img image into the micro SD card:
 
-sudo dd if=u-boot.img of=/dev/sdb bs=1k seek=128; sync
+sudo dd if=u-boot.img of=/dev/sdX bs=1k seek=128; sync
 
 - Jumper settings:
 
diff --git a/board/freescale/imxrt1050-evk/imxrt1050-evk.c b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
index bda03b5ea5..edc7fb176b 100644
--- a/board/freescale/imxrt1050-evk/imxrt1050-evk.c
+++ b/board/freescale/imxrt1050-evk/imxrt1050-evk.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <spl.h>
 #include <asm/io.h>
diff --git a/board/freescale/ls1012afrdm/eth.c b/board/freescale/ls1012afrdm/eth.c
index bd1df092f9..eaea1c46e4 100644
--- a/board/freescale/ls1012afrdm/eth.c
+++ b/board/freescale/ls1012afrdm/eth.c
@@ -18,6 +18,7 @@
 #include <asm/arch-fsl-layerscape/config.h>
 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
 #include <asm/arch/fsl_serdes.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <dm/platform_data/pfe_dm_eth.h>
 
diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c
index d138c9384e..f63377fdd6 100644
--- a/board/freescale/ls1012afrdm/ls1012afrdm.c
+++ b/board/freescale/ls1012afrdm/ls1012afrdm.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
diff --git a/board/freescale/ls1012aqds/eth.c b/board/freescale/ls1012aqds/eth.c
index b9018444aa..b4ef60738e 100644
--- a/board/freescale/ls1012aqds/eth.c
+++ b/board/freescale/ls1012aqds/eth.c
@@ -17,6 +17,7 @@
 #include <asm/arch-fsl-layerscape/config.h>
 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
 #include <asm/arch/fsl_serdes.h>
+#include <linux/delay.h>
 #include "../common/qixis.h"
 #include <net/pfe_eth/pfe_eth.h>
 #include <dm/platform_data/pfe_dm_eth.h>
diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 30bf1047d5..24978314a1 100644
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
diff --git a/board/freescale/ls1012ardb/eth.c b/board/freescale/ls1012ardb/eth.c
index 5edcfcf1ce..63d40de2a3 100644
--- a/board/freescale/ls1012ardb/eth.c
+++ b/board/freescale/ls1012ardb/eth.c
@@ -18,6 +18,7 @@
 #include <asm/arch-fsl-layerscape/config.h>
 #include <asm/arch-fsl-layerscape/immap_lsch2.h>
 #include <asm/arch/fsl_serdes.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <dm/platform_data/pfe_dm_eth.h>
 #include <i2c.h>
diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index ab83ef11a0..5b814f7abf 100644
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -4,9 +4,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <fdt_support.h>
 #include <hang.h>
 #include <i2c.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -392,8 +395,8 @@ static int convert_flash_bank(int bank)
 	return ret;
 }
 
-static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int flash_bank_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	if (argc != 2)
 		return CMD_RET_USAGE;
diff --git a/board/freescale/ls1021aiot/ls1021aiot.c b/board/freescale/ls1021aiot/ls1021aiot.c
index b4201e76d1..fe97b82983 100644
--- a/board/freescale/ls1021aiot/ls1021aiot.c
+++ b/board/freescale/ls1021aiot/ls1021aiot.c
@@ -7,10 +7,12 @@
 #include <clock_legacy.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/arch/ls102xa_stream_id.h>
+#include <linux/delay.h>
 
 #include <asm/arch/ls102xa_devdis.h>
 #include <asm/arch/ls102xa_soc.h>
diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c
index d3e2e53321..f84bce95a8 100644
--- a/board/freescale/ls1021aqds/ddr.c
+++ b/board/freescale/ls1021aqds/ddr.c
@@ -6,8 +6,11 @@
 #include <common.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/ls1021aqds/eth.c b/board/freescale/ls1021aqds/eth.c
index d0a98836e2..2de62cf095 100644
--- a/board/freescale/ls1021aqds/eth.c
+++ b/board/freescale/ls1021aqds/eth.c
@@ -14,6 +14,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/arch/fsl_serdes.h>
 #include <fsl_mdio.h>
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 1ae822e510..c03e96b493 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -9,6 +9,7 @@
 #include <fdt_support.h>
 #include <i2c.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
diff --git a/board/freescale/ls1021atsn/ls1021atsn.c b/board/freescale/ls1021atsn/ls1021atsn.c
index 3876910cbb..b05037d023 100644
--- a/board/freescale/ls1021atsn/ls1021atsn.c
+++ b/board/freescale/ls1021atsn/ls1021atsn.c
@@ -5,11 +5,13 @@
 #include <clock_legacy.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch-ls102xa/ls102xa_soc.h>
 #include <asm/arch/ls102xa_devdis.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/fsl_serdes.h>
+#include <linux/delay.h>
 #include "../common/sleep.h"
 #include <fsl_validate.h>
 #include <fsl_immap.h>
diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index d1ff7b8ba6..6208a38f16 100644
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -6,9 +6,11 @@
 
 #include <common.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <fdt_support.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/clock.h>
@@ -26,6 +28,7 @@
 #include <fsl_sec.h>
 #include <fsl_devdis.h>
 #include <spl.h>
+#include <linux/delay.h>
 #include "../common/sleep.h"
 #ifdef CONFIG_U_QE
 #include <fsl_qe.h>
@@ -611,8 +614,8 @@ static void convert_flash_bank(char bank)
 	cpld_data->system_rst = CONFIG_RESET;
 }
 
-static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int flash_bank_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -632,8 +635,8 @@ U_BOOT_CMD(
 	"bank[0-upper bank/1-lower bank] (e.g. boot_bank 0)"
 );
 
-static int cpld_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int cpld_reset_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
 
@@ -691,8 +694,8 @@ static void print_serdes_mux(void)
 		printf("B.\n");
 }
 
-static int serdes_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int serdes_mux_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	if (argc != 2)
 		return CMD_RET_USAGE;
diff --git a/board/freescale/ls1028a/MAINTAINERS b/board/freescale/ls1028a/MAINTAINERS
index 2c28825698..5b7a8db2fa 100644
--- a/board/freescale/ls1028a/MAINTAINERS
+++ b/board/freescale/ls1028a/MAINTAINERS
@@ -8,6 +8,7 @@ F:	board/freescale/ls1028a/
 F:	include/configs/ls1028a_common.h
 F:	include/configs/ls1028aqds.h
 F:	configs/ls1028aqds_tfa_defconfig
+F:	configs/ls1028aqds_tfa_lpuart_defconfig
 
 LS1028ARDB BOARD
 M:	Sudhanshu Gupta <sudhanshu.gupta@nxp.com>
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c
index 0b7504aea1..fd7815e128 100644
--- a/board/freescale/ls1028a/ls1028a.c
+++ b/board/freescale/ls1028a/ls1028a.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
 #include <fsl_ddr.h>
+#include <net.h>
 #include <asm/io.h>
 #include <hwconfig.h>
 #include <fdt_support.h>
@@ -31,6 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int config_board_mux(void)
 {
+#ifndef CONFIG_LPUART
 #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)
 	u8 reg;
 
@@ -55,9 +58,18 @@ int config_board_mux(void)
 	reg &= ~(0xc0);
 	QIXIS_WRITE(brdcfg[15], reg);
 #endif
+#endif
+
 	return 0;
 }
 
+#ifdef CONFIG_LPUART
+u32 get_lpuart_clk(void)
+{
+	return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV;
+}
+#endif
+
 int board_init(void)
 {
 #ifdef CONFIG_ENV_IS_NOWHERE
@@ -120,11 +132,33 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
+#ifdef CONFIG_LPUART
+	u8 uart;
+#endif
+
 #ifdef CONFIG_SYS_I2C_EARLY_INIT
 	i2c_early_init_f();
 #endif
 
 	fsl_lsch3_early_init_f();
+
+#ifdef CONFIG_LPUART
+	/*
+	 * Field| Function
+	 * --------------------------------------------------------------
+	 * 7-6  | Controls I2C3 routing (net CFG_MUX_I2C3):
+	 * I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}.
+	 * --------------------------------------------------------------
+	 * 5-4  | Controls I2C4 routing (net CFG_MUX_I2C4):
+	 * I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}.
+	 */
+	/* use lpuart0 as system console */
+	uart = QIXIS_READ(brdcfg[13]);
+	uart &= ~CFG_LPUART_MUX_MASK;
+	uart |= CFG_LPUART_EN;
+	QIXIS_WRITE(brdcfg[13], uart);
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index d29a3ad797..c0fc9aadf0 100644
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -9,6 +9,7 @@
 #ifdef CONFIG_FSL_DEEP_SLEEP
 #include <fsl_sleep.h>
 #endif
+#include <log.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
 
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c
index e1919d2988..0012572862 100644
--- a/board/freescale/ls1043aqds/eth.c
+++ b/board/freescale/ls1043aqds/eth.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <net.h>
 #include <asm/io.h>
 #include <netdev.h>
 #include <fdt_support.h>
diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 2d4b18cdbc..6d923cc6e8 100644
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -8,6 +8,8 @@
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_ddr_sdram.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
diff --git a/board/freescale/ls1043ardb/cpld.c b/board/freescale/ls1043ardb/cpld.c
index 00c70b1e49..5d2e8015a0 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -133,7 +133,7 @@ void cpld_rev_bit(unsigned char *value)
 	*value = rev_val;
 }
 
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/ls1043ardb/ddr.c b/board/freescale/ls1043ardb/ddr.c
index 2677b7928f..f16e036d0e 100644
--- a/board/freescale/ls1043ardb/ddr.c
+++ b/board/freescale/ls1043ardb/ddr.c
@@ -7,6 +7,7 @@
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include "ddr.h"
+#include <log.h>
 #include <vsprintf.h>
 #ifdef CONFIG_FSL_DEEP_SLEEP
 #include <fsl_sleep.h>
diff --git a/board/freescale/ls1043ardb/eth.c b/board/freescale/ls1043ardb/eth.c
index a8d0c1109b..4b9f94a0a5 100644
--- a/board/freescale/ls1043ardb/eth.c
+++ b/board/freescale/ls1043ardb/eth.c
@@ -3,6 +3,7 @@
  * Copyright 2015 Freescale Semiconductor, Inc.
  */
 #include <common.h>
+#include <net.h>
 #include <asm/io.h>
 #include <netdev.h>
 #include <fm_eth.h>
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 9bc78d6543..0b5f26515a 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -285,8 +286,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1046afrwy/eth.c b/board/freescale/ls1046afrwy/eth.c
index d38e4d7ac7..09a692be1d 100644
--- a/board/freescale/ls1046afrwy/eth.c
+++ b/board/freescale/ls1046afrwy/eth.c
@@ -3,6 +3,8 @@
  * Copyright 2019 NXP
  */
 #include <common.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <asm/io.h>
 #include <netdev.h>
 #include <fm_eth.h>
diff --git a/board/freescale/ls1046afrwy/ls1046afrwy.c b/board/freescale/ls1046afrwy/ls1046afrwy.c
index 8c0abb63a9..e815bf84fb 100644
--- a/board/freescale/ls1046afrwy/ls1046afrwy.c
+++ b/board/freescale/ls1046afrwy/ls1046afrwy.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -232,8 +233,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1046aqds/ddr.c b/board/freescale/ls1046aqds/ddr.c
index 45b1f373a7..f3cfbc4c39 100644
--- a/board/freescale/ls1046aqds/ddr.c
+++ b/board/freescale/ls1046aqds/ddr.c
@@ -9,6 +9,7 @@
 #ifdef CONFIG_FSL_DEEP_SLEEP
 #include <fsl_sleep.h>
 #endif
+#include <log.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
 
diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c
index 1d40e8bd17..579e2da6d8 100644
--- a/board/freescale/ls1046aqds/eth.c
+++ b/board/freescale/ls1046aqds/eth.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <net.h>
 #include <asm/io.h>
 #include <netdev.h>
 #include <fdt_support.h>
diff --git a/board/freescale/ls1046aqds/ls1046aqds.c b/board/freescale/ls1046aqds/ls1046aqds.c
index cabd7ee648..b77b2ed40e 100644
--- a/board/freescale/ls1046aqds/ls1046aqds.c
+++ b/board/freescale/ls1046aqds/ls1046aqds.c
@@ -8,6 +8,7 @@
 #include <i2c.h>
 #include <fdt_support.h>
 #include <fsl_ddr_sdram.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -462,7 +463,9 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
+#endif
 	fdt_fixup_board_enet(blob);
 #endif
 
diff --git a/board/freescale/ls1046ardb/cpld.c b/board/freescale/ls1046ardb/cpld.c
index a65751986a..548601a5ae 100644
--- a/board/freescale/ls1046ardb/cpld.c
+++ b/board/freescale/ls1046ardb/cpld.c
@@ -129,7 +129,7 @@ void cpld_rev_bit(unsigned char *value)
 	*value = rev_val;
 }
 
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/ls1046ardb/ddr.c b/board/freescale/ls1046ardb/ddr.c
index 321222d68d..0e07df5211 100644
--- a/board/freescale/ls1046ardb/ddr.c
+++ b/board/freescale/ls1046ardb/ddr.c
@@ -10,6 +10,7 @@
 #ifdef CONFIG_FSL_DEEP_SLEEP
 #include <fsl_sleep.h>
 #endif
+#include <log.h>
 #include <asm/arch/clock.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/ls1046ardb/ddr.h b/board/freescale/ls1046ardb/ddr.h
index 3b4d44d465..05baef232a 100644
--- a/board/freescale/ls1046ardb/ddr.h
+++ b/board/freescale/ls1046ardb/ddr.h
@@ -32,7 +32,7 @@ static const struct board_specific_parameters udimm0[] = {
 	{2,  1350, 0, 8,     6, 0x0708090B, 0x0C0D0E09,},
 	{2,  1666, 0, 8,     7, 0x08090A0C, 0x0D0F100B,},
 	{2,  1900, 0, 8,     7, 0x09090B0D, 0x0E10120B,},
-	{2,  2300, 0, 8,     9, 0x0A0B0C10, 0x1213140E,},
+	{2,  2300, 0, 8,     7, 0x08090A0E, 0x1011120C,},
 	{}
 };
 
diff --git a/board/freescale/ls1046ardb/eth.c b/board/freescale/ls1046ardb/eth.c
index 7dbfcac307..f3b1dcd306 100644
--- a/board/freescale/ls1046ardb/eth.c
+++ b/board/freescale/ls1046ardb/eth.c
@@ -3,6 +3,8 @@
  * Copyright 2016 Freescale Semiconductor, Inc.
  */
 #include <common.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <asm/io.h>
 #include <netdev.h>
 #include <fm_eth.h>
diff --git a/board/freescale/ls1046ardb/ls1046ardb.c b/board/freescale/ls1046ardb/ls1046ardb.c
index cc6bd883c3..27e213f796 100644
--- a/board/freescale/ls1046ardb/ls1046ardb.c
+++ b/board/freescale/ls1046ardb/ls1046ardb.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/fsl_serdes.h>
@@ -172,8 +173,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 	ft_cpu_setup(blob, bd);
 
 #ifdef CONFIG_SYS_DPAA_FMAN
+#ifndef CONFIG_DM_ETH
 	fdt_fixup_fman_ethernet(blob);
 #endif
+#endif
 
 	fdt_fixup_icid(blob);
 
diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c
index c21a2ce059..fd9549bfbc 100644
--- a/board/freescale/ls1088a/ddr.c
+++ b/board/freescale/ls1088a/ddr.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <log.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index 54ef75347f..e5d9d946cb 100644
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
@@ -19,11 +20,13 @@
 #include <miiphy.h>
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
+#include <linux/delay.h>
 
 #include "../common/qixis.h"
 
 #include "ls1088a_qixis.h"
 
+#ifndef CONFIG_DM_ETH
 #ifdef CONFIG_FSL_MC_ENET
 
 #define SFP_TX		0
@@ -735,6 +738,7 @@ int board_eth_init(bd_t *bis)
 	error = pci_eth_init(bis);
 	return error;
 }
+#endif // !CONFIG_DM_ETH
 
 #if defined(CONFIG_RESET_PHY_R)
 void reset_phy(void)
@@ -742,3 +746,90 @@ void reset_phy(void)
 	mc_env_boot();
 }
 #endif /* CONFIG_RESET_PHY_R */
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+	u8 serdes_block;
+	u32 serdes_protocol;
+	bool dts_needed;
+} supported_protocols[] = {
+	/* Serdes block #1 */
+	{1, 21, true},
+	{1, 29, true},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol)
+			return true;
+	}
+
+	return false;
+}
+
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol) {
+			if (serdes_conf.dts_needed == true)
+				sprintf(str, "%u", protocol);
+			else
+				sprintf(str, "x");
+			return;
+		}
+	}
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	char expected_dts[100];
+	char srds_s1_str[2];
+	u32 srds_s1, cfg;
+
+	cfg = in_le32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]) &
+		      FSL_CHASSIS3_SRDS1_PRTCL_MASK;
+	cfg >>= FSL_CHASSIS3_SRDS1_PRTCL_SHIFT;
+	srds_s1 = serdes_get_number(FSL_SRDS_1, cfg);
+
+	/* Check for supported protocols. The default DTS will be used
+	 * in this case
+	 */
+	if (!protocol_supported(1, srds_s1))
+		return -1;
+
+	get_str_protocol(1, srds_s1, srds_s1_str);
+
+	sprintf(expected_dts, "fsl-ls1088a-qds-%s-x", srds_s1_str);
+
+	if (!strcmp(name, expected_dts))
+		return 0;
+
+	return -1;
+}
+#endif
diff --git a/board/freescale/ls1088a/eth_ls1088ardb.c b/board/freescale/ls1088a/eth_ls1088ardb.c
index 01f56db0a1..f56ce7d9ae 100644
--- a/board/freescale/ls1088a/eth_ls1088ardb.c
+++ b/board/freescale/ls1088a/eth_ls1088ardb.c
@@ -18,6 +18,7 @@
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
 
+#ifndef CONFIG_DM_ETH
 int board_eth_init(bd_t *bis)
 {
 #if defined(CONFIG_FSL_MC_ENET)
@@ -95,6 +96,7 @@ int board_eth_init(bd_t *bis)
 
 	return pci_eth_init(bis);
 }
+#endif
 
 #if defined(CONFIG_RESET_PHY_R)
 void reset_phy(void)
diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c
index 0bd397a0be..3f758cef2f 100644
--- a/board/freescale/ls1088a/ls1088a.c
+++ b/board/freescale/ls1088a/ls1088a.c
@@ -5,6 +5,8 @@
 #include <common.h>
 #include <env.h>
 #include <i2c.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <netdev.h>
@@ -13,6 +15,7 @@
 #include <fsl_sec.h>
 #include <asm/io.h>
 #include <fdt_support.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
@@ -801,6 +804,11 @@ int board_init(void)
 #ifdef CONFIG_FSL_LS_PPA
 	ppa_init();
 #endif
+
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/ls2080a/ddr.c b/board/freescale/ls2080a/ddr.c
index 26eada9b49..229fc9cc30 100644
--- a/board/freescale/ls2080a/ddr.c
+++ b/board/freescale/ls2080a/ddr.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <log.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
diff --git a/board/freescale/ls2080a/ls2080a.c b/board/freescale/ls2080a/ls2080a.c
index f144bf6b37..95e99eabd7 100644
--- a/board/freescale/ls2080a/ls2080a.c
+++ b/board/freescale/ls2080a/ls2080a.c
@@ -3,6 +3,7 @@
  * Copyright 2014 Freescale Semiconductor
  */
 #include <common.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
 #include <net.h>
diff --git a/board/freescale/ls2080aqds/ddr.c b/board/freescale/ls2080aqds/ddr.c
index fffe78c301..3fb2c4448c 100644
--- a/board/freescale/ls2080aqds/ddr.c
+++ b/board/freescale/ls2080aqds/ddr.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <log.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
diff --git a/board/freescale/ls2080aqds/eth.c b/board/freescale/ls2080aqds/eth.c
index bbb70a859a..9171cb2b6c 100644
--- a/board/freescale/ls2080aqds/eth.c
+++ b/board/freescale/ls2080aqds/eth.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
@@ -17,6 +18,7 @@
 #include <miiphy.h>
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
+#include <linux/delay.h>
 
 #include "../common/qixis.h"
 
@@ -24,6 +26,8 @@
 
 #define MC_BOOT_ENV_VAR "mcinitcmd"
 
+#ifndef CONFIG_DM_ETH
+
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
  /* - In LS2080A there are only 16 SERDES lanes, spread across 2 SERDES banks.
  *   Bank 1 -> Lanes A, B, C, D, E, F, G, H
@@ -889,10 +893,11 @@ void ls2080a_handle_phy_interface_xsgmii(int i)
 	}
 }
 #endif
+#endif // !CONFIG_DM_ETH
 
 int board_eth_init(bd_t *bis)
 {
-	int error;
+#ifndef CONFIG_DM_ETH
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 	struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR;
 	int serdes1_prtcl = (in_le32(&gur->rcwsr[28]) &
@@ -906,6 +911,7 @@ int board_eth_init(bd_t *bis)
 	struct memac_mdio_info *memac_mdio1_info;
 	unsigned int i;
 	char *env_hwconfig;
+	int error;
 
 	env_hwconfig = env_get("hwconfig");
 
@@ -970,8 +976,13 @@ int board_eth_init(bd_t *bis)
 			sgmii_configure_repeater(2);
 	}
 #endif
-	error = pci_eth_init(bis);
-	return error;
+#endif // !CONFIG_DM_ETH
+
+#ifdef CONFIG_DM_ETH
+	return 0;
+#else
+	return pci_eth_init(bis);
+#endif
 }
 
 #if defined(CONFIG_RESET_PHY_R)
@@ -980,3 +991,100 @@ void reset_phy(void)
 	mc_env_boot();
 }
 #endif /* CONFIG_RESET_PHY_R */
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+	u8 serdes_block;
+	u32 serdes_protocol;
+	bool dts_needed;
+} supported_protocols[] = {
+	/* Serdes block #1 */
+	{1, 42, true},
+
+	/* Serdes block #2 */
+	{2, 65, false},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol)
+			return true;
+	}
+
+	return false;
+}
+
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol) {
+			if (serdes_conf.dts_needed == true)
+				sprintf(str, "%u", protocol);
+			else
+				sprintf(str, "x");
+			return;
+		}
+	}
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	u32 rcw_status = in_le32(&gur->rcwsr[28]);
+	char srds_s1_str[2], srds_s2_str[2];
+	u32 srds_s1, srds_s2;
+	char expected_dts[100];
+
+	srds_s1 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
+	srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
+
+	srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK;
+	srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
+
+	/* Check for supported protocols. The default DTS will be used
+	 * in this case
+	 */
+	if (!protocol_supported(1, srds_s1) ||
+	    !protocol_supported(2, srds_s2))
+		return -1;
+
+	get_str_protocol(1, srds_s1, srds_s1_str);
+	get_str_protocol(2, srds_s2, srds_s2_str);
+
+	printf("expected_dts %s\n", expected_dts);
+	sprintf(expected_dts, "fsl-ls2080a-qds-%s-%s",
+		srds_s1_str, srds_s2_str);
+
+	if (!strcmp(name, expected_dts))
+		return 0;
+
+	printf("this is not!\n");
+	return -1;
+}
+
+#endif
diff --git a/board/freescale/ls2080aqds/ls2080aqds.c b/board/freescale/ls2080aqds/ls2080aqds.c
index 4034bdee28..b9754f9e2e 100644
--- a/board/freescale/ls2080aqds/ls2080aqds.c
+++ b/board/freescale/ls2080aqds/ls2080aqds.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
 #include <netdev.h>
@@ -251,6 +252,10 @@ int board_init(void)
 	ppa_init();
 #endif
 
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/ls2080ardb/ddr.c b/board/freescale/ls2080ardb/ddr.c
index 72ce872c75..4571a228c5 100644
--- a/board/freescale/ls2080ardb/ddr.c
+++ b/board/freescale/ls2080ardb/ddr.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <log.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/clock.h>
 #include "ddr.h"
diff --git a/board/freescale/ls2080ardb/eth_ls2080rdb.c b/board/freescale/ls2080ardb/eth_ls2080rdb.c
index b0f276e839..f0f6ca53cb 100644
--- a/board/freescale/ls2080ardb/eth_ls2080rdb.c
+++ b/board/freescale/ls2080ardb/eth_ls2080rdb.c
@@ -23,6 +23,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int board_eth_init(bd_t *bis)
 {
+#ifndef CONFIG_DM_ETH
 #if defined(CONFIG_FSL_MC_ENET)
 	int i, interface;
 	struct memac_mdio_info mdio_info;
@@ -99,6 +100,7 @@ int board_eth_init(bd_t *bis)
 
 	cpu_eth_init(bis);
 #endif /* CONFIG_FSL_MC_ENET */
+#endif /* !CONFIG_DM_ETH */
 
 #ifdef CONFIG_PHY_AQUANTIA
 	/*
@@ -112,7 +114,12 @@ int board_eth_init(bd_t *bis)
 	gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname;
 	gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
 #endif
+
+#ifdef CONFIG_DM_ETH
+	return 0;
+#else
 	return pci_eth_init(bis);
+#endif
 }
 
 #if defined(CONFIG_RESET_PHY_R)
diff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c
index 282aaf47fb..b1fa3297a3 100644
--- a/board/freescale/ls2080ardb/ls2080ardb.c
+++ b/board/freescale/ls2080ardb/ls2080ardb.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
 #include <errno.h>
 #include <netdev.h>
@@ -244,6 +245,10 @@ int board_init(void)
 	sec_init();
 #endif
 
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
+
 	return 0;
 }
 
diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS
index 47ae04c91a..9fe79c0ef7 100644
--- a/board/freescale/lx2160a/MAINTAINERS
+++ b/board/freescale/lx2160a/MAINTAINERS
@@ -5,6 +5,7 @@ F:	board/freescale/lx2160a/
 F:	include/configs/lx2160a_common.h
 F:	include/configs/lx2160ardb.h
 F:	configs/lx2160ardb_tfa_defconfig
+F:	configs/lx2160ardb_tfa_stmm_defconfig
 F:	arch/arm/dts/fsl-lx2160a-rdb.dts
 
 LX2160ARDB_SECURE_BOOT BOARD
diff --git a/board/freescale/lx2160a/eth_lx2160aqds.c b/board/freescale/lx2160a/eth_lx2160aqds.c
index 0e928ebd86..7794495df7 100644
--- a/board/freescale/lx2160a/eth_lx2160aqds.c
+++ b/board/freescale/lx2160a/eth_lx2160aqds.c
@@ -6,8 +6,10 @@
 
 #include <common.h>
 #include <env.h>
+#include <fdt_support.h>
 #include <hwconfig.h>
 #include <command.h>
+#include <log.h>
 #include <net.h>
 #include <netdev.h>
 #include <malloc.h>
@@ -20,11 +22,13 @@
 #include <asm/arch/fsl_serdes.h>
 #include <fsl-mc/fsl_mc.h>
 #include <fsl-mc/ldpaa_wriop.h>
+#include <linux/libfdt.h>
 
 #include "../common/qixis.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifndef CONFIG_DM_ETH
 #define EMI_NONE	0
 #define EMI1		1 /* Mdio Bus 1 */
 #define EMI2		2 /* Mdio Bus 2 */
@@ -439,9 +443,11 @@ static inline void do_dpmac_config(int dpmac, const char *arg_dpmacid,
 }
 
 #endif
+#endif /* !CONFIG_DM_ETH */
 
 int board_eth_init(bd_t *bis)
 {
+#ifndef CONFIG_DM_ETH
 #if defined(CONFIG_FSL_MC_ENET)
 	struct memac_mdio_info mdio_info;
 	struct memac_mdio_controller *regs;
@@ -564,6 +570,7 @@ int board_eth_init(bd_t *bis)
 
 	cpu_eth_init(bis);
 #endif /* CONFIG_FMAN_ENET */
+#endif /* !CONFIG_DM_ETH */
 
 #ifdef CONFIG_PHY_AQUANTIA
 	/*
@@ -577,7 +584,12 @@ int board_eth_init(bd_t *bis)
 	gd->jt->mdio_phydev_for_ethname = mdio_phydev_for_ethname;
 	gd->jt->miiphy_set_current_dev = miiphy_set_current_dev;
 #endif
+
+#ifdef CONFIG_DM_ETH
+	return 0;
+#else
 	return pci_eth_init(bis);
+#endif
 }
 
 #if defined(CONFIG_RESET_PHY_R)
@@ -589,6 +601,7 @@ void reset_phy(void)
 }
 #endif /* CONFIG_RESET_PHY_R */
 
+#ifndef CONFIG_DM_ETH
 #if defined(CONFIG_FSL_MC_ENET)
 int fdt_fixup_dpmac_phy_handle(void *fdt, int dpmac_id, int node_phandle)
 {
@@ -837,4 +850,113 @@ int fdt_fixup_board_phy(void *fdt)
 	return ret;
 }
 #endif // CONFIG_FSL_MC_ENET
+#endif
+
+#if defined(CONFIG_DM_ETH) && defined(CONFIG_MULTI_DTB_FIT)
+
+/* Structure to hold SERDES protocols supported in case of
+ * CONFIG_DM_ETH enabled (network interfaces are described in the DTS).
+ *
+ * @serdes_block: the index of the SERDES block
+ * @serdes_protocol: the decimal value of the protocol supported
+ * @dts_needed: DTS notes describing the current configuration are needed
+ *
+ * When dts_needed is true, the board_fit_config_name_match() function
+ * will try to exactly match the current configuration of the block with a DTS
+ * name provided.
+ */
+static struct serdes_configuration {
+	u8 serdes_block;
+	u32 serdes_protocol;
+	bool dts_needed;
+} supported_protocols[] = {
+	/* Serdes block #1 */
+	{1, 3, true},
+	{1, 7, true},
+	{1, 19, true},
+	{1, 20, true},
+
+	/* Serdes block #2 */
+	{2, 2, false},
+	{2, 3, false},
+	{2, 5, false},
+	{2, 11, true},
+
+	/* Serdes block #3 */
+	{3, 2, false},
+	{3, 3, false},
+};
+
+#define SUPPORTED_SERDES_PROTOCOLS ARRAY_SIZE(supported_protocols)
+
+static bool protocol_supported(u8 serdes_block, u32 protocol)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol)
+			return true;
+	}
+
+	return false;
+}
 
+static void get_str_protocol(u8 serdes_block, u32 protocol, char *str)
+{
+	struct serdes_configuration serdes_conf;
+	int i;
+
+	for (i = 0; i < SUPPORTED_SERDES_PROTOCOLS; i++) {
+		serdes_conf = supported_protocols[i];
+		if (serdes_conf.serdes_block == serdes_block &&
+		    serdes_conf.serdes_protocol == protocol) {
+			if (serdes_conf.dts_needed == true)
+				sprintf(str, "%u", protocol);
+			else
+				sprintf(str, "x");
+			return;
+		}
+	}
+}
+
+int board_fit_config_name_match(const char *name)
+{
+	struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
+	u32 rcw_status = in_le32(&gur->rcwsr[28]);
+	char srds_s1_str[2], srds_s2_str[2], srds_s3_str[2];
+	u32 srds_s1, srds_s2, srds_s3;
+	char expected_dts[100];
+
+	srds_s1 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_MASK;
+	srds_s1 >>= FSL_CHASSIS3_RCWSR28_SRDS1_PRTCL_SHIFT;
+
+	srds_s2 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_MASK;
+	srds_s2 >>= FSL_CHASSIS3_RCWSR28_SRDS2_PRTCL_SHIFT;
+
+	srds_s3 = rcw_status & FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_MASK;
+	srds_s3 >>= FSL_CHASSIS3_RCWSR28_SRDS3_PRTCL_SHIFT;
+
+	/* Check for supported protocols. The default DTS will be used
+	 * in this case
+	 */
+	if (!protocol_supported(1, srds_s1) ||
+	    !protocol_supported(2, srds_s2) ||
+	    !protocol_supported(3, srds_s3))
+		return -1;
+
+	get_str_protocol(1, srds_s1, srds_s1_str);
+	get_str_protocol(2, srds_s2, srds_s2_str);
+	get_str_protocol(3, srds_s3, srds_s3_str);
+
+	sprintf(expected_dts, "fsl-lx2160a-qds-%s-%s-%s",
+		srds_s1_str, srds_s2_str, srds_s3_str);
+
+	if (!strcmp(name, expected_dts))
+		return 0;
+
+	return -1;
+}
+#endif
diff --git a/board/freescale/lx2160a/eth_lx2160ardb.c b/board/freescale/lx2160a/eth_lx2160ardb.c
index aeb989a638..21fb559250 100644
--- a/board/freescale/lx2160a/eth_lx2160ardb.c
+++ b/board/freescale/lx2160a/eth_lx2160ardb.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
 #include <net.h>
 #include <netdev.h>
 #include <malloc.h>
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index 23ea1b6f16..73e05ee07e 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <dm.h>
+#include <init.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <i2c.h>
 #include <malloc.h>
@@ -15,6 +16,7 @@
 #include <fsl_sec.h>
 #include <asm/io.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <fsl-mc/fsl_mc.h>
 #include <env_internal.h>
@@ -29,14 +31,11 @@
 #include "../common/vid.h"
 #include <fsl_immap.h>
 #include <asm/arch-fsl-layerscape/fsl_icid.h>
-#include <asm/gic-v3.h>
-#include <cpu_func.h>
 
 #ifdef CONFIG_EMC2305
 #include "../common/emc2305.h"
 #endif
 
-#define GIC_LPI_SIZE                             0x200000
 #ifdef CONFIG_TARGET_LX2160AQDS
 #define CFG_MUX_I2C_SDHC(reg, value)		((reg & 0x3f) | value)
 #define SET_CFG_MUX1_SDHC1_SDHC(reg)		(reg & 0x3f)
@@ -587,6 +586,9 @@ int board_init(void)
 	sec_init();
 #endif
 
+#if !defined(CONFIG_SYS_EARLY_PCI_INIT) && defined(CONFIG_DM_ETH)
+	pci_init();
+#endif
 	return 0;
 }
 
@@ -632,7 +634,9 @@ void fdt_fixup_board_enet(void *fdt)
 	if (get_mc_boot_status() == 0 &&
 	    (is_lazy_dpl_addr_valid() || get_dpl_apply_status() == 0)) {
 		fdt_status_okay(fdt, offset);
+#ifndef CONFIG_DM_ETH
 		fdt_fixup_board_phy(fdt);
+#endif
 	} else {
 		fdt_status_fail(fdt, offset);
 	}
@@ -644,21 +648,6 @@ void board_quiesce_devices(void)
 }
 #endif
 
-#ifdef CONFIG_GIC_V3_ITS
-void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
-{
-	u32 phandle;
-	int err;
-	struct fdt_memory gic_lpi;
-
-	gic_lpi.start = gic_lpi_base;
-	gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
-	err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
-	if (err < 0)
-		debug("failed to add reserved memory: %d\n", err);
-}
-#endif
-
 #ifdef CONFIG_OF_BOARD_SETUP
 int ft_board_setup(void *blob, bd_t *bd)
 {
@@ -670,7 +659,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 	u64 mc_memory_base = 0;
 	u64 mc_memory_size = 0;
 	u16 total_memory_banks;
-	u64 __maybe_unused gic_lpi_base;
 
 	ft_cpu_setup(blob, bd);
 
@@ -690,12 +678,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 		size[i] = gd->bd->bi_dram[i].size;
 	}
 
-#ifdef CONFIG_GIC_V3_ITS
-	gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
-	gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
-	fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
-#endif
-
 #ifdef CONFIG_RESV_RAM
 	/* reduce size if reserved memory is within this bank */
 	if (gd->arch.resv_ram >= base[0] &&
diff --git a/board/freescale/m5208evbe/m5208evbe.c b/board/freescale/m5208evbe/m5208evbe.c
index e448a64abc..a950030eb3 100644
--- a/board/freescale/m5208evbe/m5208evbe.c
+++ b/board/freescale/m5208evbe/m5208evbe.c
@@ -12,6 +12,7 @@
 #include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m52277evb/m52277evb.c b/board/freescale/m52277evb/m52277evb.c
index a4b795fc39..144e490479 100644
--- a/board/freescale/m52277evb/m52277evb.c
+++ b/board/freescale/m52277evb/m52277evb.c
@@ -11,6 +11,7 @@
 #include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c
index da3adc5954..a89d510058 100644
--- a/board/freescale/m5249evb/m5249evb.c
+++ b/board/freescale/m5249evb/m5249evb.c
@@ -9,6 +9,7 @@
 #include <init.h>
 #include <malloc.h>
 #include <asm/immap.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m5253demo/flash.c b/board/freescale/m5253demo/flash.c
index a5223ecee6..3197421781 100644
--- a/board/freescale/m5253demo/flash.c
+++ b/board/freescale/m5253demo/flash.c
@@ -8,6 +8,8 @@
  */
 
 #include <common.h>
+#include <flash.h>
+#include <init.h>
 #include <irq_func.h>
 
 #include <asm/immap.h>
diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c
index 76c18b8504..50eb18ba94 100644
--- a/board/freescale/m5253demo/m5253demo.c
+++ b/board/freescale/m5253demo/m5253demo.c
@@ -9,9 +9,11 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/immap.h>
 #include <netdev.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m5282evb/m5282evb.c b/board/freescale/m5282evb/m5282evb.c
index 065e3e71f5..251be667d4 100644
--- a/board/freescale/m5282evb/m5282evb.c
+++ b/board/freescale/m5282evb/m5282evb.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/immap.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/m53017evb/m53017evb.c b/board/freescale/m53017evb/m53017evb.c
index 8bdb4ad127..f13b6931ea 100644
--- a/board/freescale/m53017evb/m53017evb.c
+++ b/board/freescale/m53017evb/m53017evb.c
@@ -12,6 +12,7 @@
 #include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c
index d93800b364..531894f651 100644
--- a/board/freescale/m5329evb/m5329evb.c
+++ b/board/freescale/m5329evb/m5329evb.c
@@ -12,6 +12,7 @@
 #include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c
index 1d52ce047f..29ff55f159 100644
--- a/board/freescale/m5373evb/m5373evb.c
+++ b/board/freescale/m5373evb/m5373evb.c
@@ -12,6 +12,7 @@
 #include <init.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m54418twr/m54418twr.c b/board/freescale/m54418twr/m54418twr.c
index 8c90cfe537..a418fba140 100644
--- a/board/freescale/m54418twr/m54418twr.c
+++ b/board/freescale/m54418twr/m54418twr.c
@@ -11,6 +11,7 @@
 #include <asm/immap.h>
 #include <mmc.h>
 #include <fsl_esdhc_imx.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m54451evb/m54451evb.c b/board/freescale/m54451evb/m54451evb.c
index 82a2b9093b..1298bd324e 100644
--- a/board/freescale/m54451evb/m54451evb.c
+++ b/board/freescale/m54451evb/m54451evb.c
@@ -12,6 +12,7 @@
 #include <spi.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c
index 146cd918c4..286300645b 100644
--- a/board/freescale/m54455evb/m54455evb.c
+++ b/board/freescale/m54455evb/m54455evb.c
@@ -12,6 +12,7 @@
 #include <pci.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m547xevb/m547xevb.c b/board/freescale/m547xevb/m547xevb.c
index e8d86113d6..908a500f4b 100644
--- a/board/freescale/m547xevb/m547xevb.c
+++ b/board/freescale/m547xevb/m547xevb.c
@@ -13,6 +13,7 @@
 #include <pci.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c
index 40e01c6f24..796b808e6f 100644
--- a/board/freescale/m548xevb/m548xevb.c
+++ b/board/freescale/m548xevb/m548xevb.c
@@ -13,6 +13,7 @@
 #include <pci.h>
 #include <asm/immap.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/mpc8308rdb/mpc8308rdb.c b/board/freescale/mpc8308rdb/mpc8308rdb.c
index ae73246e5b..259d6aa1c2 100644
--- a/board/freescale/mpc8308rdb/mpc8308rdb.c
+++ b/board/freescale/mpc8308rdb/mpc8308rdb.c
@@ -8,7 +8,9 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
 #include <spi.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
index c8e30a0947..99f6bcd5a9 100644
--- a/board/freescale/mpc8313erdb/sdram.c
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -8,8 +8,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <mpc83xx.h>
 #include <spd_sdram.h>
+#include <linux/delay.h>
 
 #include <asm/bitops.h>
 #include <asm/io.h>
diff --git a/board/freescale/mpc8315erdb/mpc8315erdb.c b/board/freescale/mpc8315erdb/mpc8315erdb.c
index 93e0fca083..aa2e7fe206 100644
--- a/board/freescale/mpc8315erdb/mpc8315erdb.c
+++ b/board/freescale/mpc8315erdb/mpc8315erdb.c
@@ -10,6 +10,8 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c
index 2f0f29a0e5..8a828207f9 100644
--- a/board/freescale/mpc8315erdb/sdram.c
+++ b/board/freescale/mpc8315erdb/sdram.c
@@ -8,8 +8,10 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <mpc83xx.h>
 #include <spd_sdram.h>
+#include <linux/delay.h>
 
 #include <asm/bitops.h>
 #include <asm/io.h>
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
index e513d0bfd5..1dc1c98ad6 100644
--- a/board/freescale/mpc8323erdb/mpc8323erdb.c
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -19,6 +19,7 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <command.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <u-boot/crc.h>
 #if defined(CONFIG_PCI)
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
index d4922fe1e1..afcd45769c 100644
--- a/board/freescale/mpc832xemds/mpc832xemds.c
+++ b/board/freescale/mpc832xemds/mpc832xemds.c
@@ -23,6 +23,7 @@
 #if defined(CONFIG_PQ_MDS_PIB)
 #include "../common/pq-mds-pib.h"
 #endif
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/mpc832xemds/pci.c b/board/freescale/mpc832xemds/pci.c
index 45c7294832..944108f631 100644
--- a/board/freescale/mpc832xemds/pci.c
+++ b/board/freescale/mpc832xemds/pci.c
@@ -14,6 +14,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <asm/fsl_i2c.h>
+#include <linux/delay.h>
 #include "../common/pq-mds-pib.h"
 
 static struct pci_region pci1_regions[] = {
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 0996b87c0f..576f04c144 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -6,8 +6,10 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <ioports.h>
 #include <mpc83xx.h>
+#include <asm/bitops.h>
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
 #include <spi.h>
@@ -17,6 +19,7 @@
 #else
 #include <spd_sdram.h>
 #endif
+#include <linux/delay.h>
 
 #if defined(CONFIG_OF_LIBFDT)
 #include <linux/libfdt.h>
diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c
index 7615a1dfaa..3ddbe71775 100644
--- a/board/freescale/mpc8349emds/pci.c
+++ b/board/freescale/mpc8349emds/pci.c
@@ -11,6 +11,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <asm/fsl_i2c.h>
+#include <linux/delay.h>
 
 static struct pci_region pci1_regions[] = {
 	{
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
index a2e284f1a2..3993d58515 100644
--- a/board/freescale/mpc8349itx/mpc8349itx.c
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <ioports.h>
+#include <log.h>
 #include <mpc83xx.h>
 #include <i2c.h>
 #include <miiphy.h>
@@ -15,10 +17,12 @@
 #include <pci.h>
 #endif
 #include <spd_sdram.h>
+#include <asm/bitops.h>
 #include <asm/mmu.h>
 #if defined(CONFIG_OF_LIBFDT)
 #include <linux/libfdt.h>
 #endif
+#include <linux/delay.h>
 
 #include "../../../arch/powerpc/cpu/mpc83xx/hrcw/hrcw.h"
 #include "../../../arch/powerpc/cpu/mpc83xx/elbc/elbc.h"
diff --git a/board/freescale/mpc8349itx/pci.c b/board/freescale/mpc8349itx/pci.c
index 550a2afcb7..a09b658688 100644
--- a/board/freescale/mpc8349itx/pci.c
+++ b/board/freescale/mpc8349itx/pci.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <linux/delay.h>
 
 #include <asm/mmu.h>
 #include <asm/io.h>
diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c
index 1ae2308e9b..182391ca9c 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -8,10 +8,13 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
+#include <asm/bitops.h>
 #include <asm/io.h>
 #include <asm/fsl_mpc83xx_serdes.h>
 #include <spd_sdram.h>
 #include <tsec.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c
index c72e49fbe1..30e8b2585e 100644
--- a/board/freescale/mpc837xemds/pci.c
+++ b/board/freescale/mpc837xemds/pci.c
@@ -14,6 +14,7 @@
 #include <fdt_support.h>
 #include <asm/fsl_i2c.h>
 #include <asm/fsl_mpc83xx_serdes.h>
+#include <linux/delay.h>
 
 static struct pci_region pci_regions[] = {
 	{
diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 45038acf32..94cb93a42d 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -10,12 +10,14 @@
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
+#include <asm/bitops.h>
 #include <asm/io.h>
 #include <asm/fsl_mpc83xx_serdes.h>
 #include <fdt_support.h>
 #include <spd_sdram.h>
 #include <vsc7385.h>
 #include <fsl_esdhc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/mpc837xerdb/pci.c b/board/freescale/mpc837xerdb/pci.c
index 07471e0ae5..dccf8c5551 100644
--- a/board/freescale/mpc837xerdb/pci.c
+++ b/board/freescale/mpc837xerdb/pci.c
@@ -8,6 +8,7 @@
 #include <mpc83xx.h>
 #include <pci.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static struct pci_region pci_regions[] = {
 	{
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index e55ee40026..5907a7b428 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <command.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -17,6 +19,7 @@
 #include <asm/fsl_serdes.h>
 #include <spd.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <spd_sdram.h>
 #include <fdt_support.h>
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index cb130b4a86..d470fd1cf6 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -15,6 +15,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 2d4aace98d..85d370f628 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index a4455d3f61..e11ed2e3be 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <vsprintf.h>
 #include <asm/processor.h>
@@ -16,6 +17,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index 47193dd20e..8e27e73c25 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -13,6 +13,7 @@
 #include <fsl_ddr_sdram.h>
 #include <ioports.h>
 #include <spd_sdram.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/board/freescale/mpc8568mds/bcsr.c b/board/freescale/mpc8568mds/bcsr.c
index 28e2a9435c..b1e638af5a 100644
--- a/board/freescale/mpc8568mds/bcsr.c
+++ b/board/freescale/mpc8568mds/bcsr.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <asm/io.h>
 
 #include "bcsr.h"
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index 5167f81be7..2871636165 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -6,7 +6,9 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -17,6 +19,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
@@ -302,7 +305,7 @@ void pci_init_board(void)
 	porpllsr = in_be32(&gur->porpllsr);
 	io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
 
-	debug ("   pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
+	debug("   %s: devdisr=%x, io_sel=%x\n", __func__, devdisr, io_sel);
 
 	pci_speed = 66666000;
 	pci_32 = 1;
diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c
index 57cea0af68..9ed00f6e5b 100644
--- a/board/freescale/mpc8569mds/bcsr.c
+++ b/board/freescale/mpc8569mds/bcsr.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <asm/io.h>
 
 #include "bcsr.h"
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index cf5d8a5244..90b9c72bab 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <console.h>
+#include <flash.h>
 #include <hwconfig.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -21,6 +23,7 @@
 #include <spd_sdram.h>
 #include <i2c.h>
 #include <ioports.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_esdhc.h>
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 4111d69b4b..b43032cee8 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -6,7 +6,10 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -17,6 +20,7 @@
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <tsec.h>
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 86edd66bca..c060fd9a3f 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <command.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
@@ -14,6 +16,7 @@
 #include <asm/fsl_serdes.h>
 #include <i2c.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <spd_sdram.h>
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
index 42b8cab362..9b96d0d33f 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd_diu.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <command.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_diu_fb.h>
 #include "../common/pixis.h"
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index d9e538b868..cd505dfc0a 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
@@ -12,6 +14,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <netdev.h>
diff --git a/board/freescale/mx23evk/mx23evk.c b/board/freescale/mx23evk/mx23evk.c
index 6f4d34b9ed..6cfff04966 100644
--- a/board/freescale/mx23evk/mx23evk.c
+++ b/board/freescale/mx23evk/mx23evk.c
@@ -12,6 +12,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/gpio.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
diff --git a/board/freescale/mx25pdk/mx25pdk.c b/board/freescale/mx25pdk/mx25pdk.c
index 6898e9c4d6..ec56acb307 100644
--- a/board/freescale/mx25pdk/mx25pdk.c
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@ -15,6 +15,7 @@
 #include <mmc.h>
 #include <fsl_esdhc_imx.h>
 #include <i2c.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <fsl_pmic.h>
 #include <mc34704.h>
diff --git a/board/freescale/mx28evk/mx28evk.c b/board/freescale/mx28evk/mx28evk.c
index cfbe89ebfe..e50b7db210 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -12,12 +12,15 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx28.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index fb57f26357..06fe51db71 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/freescale/mx35pdk/mx35pdk.c b/board/freescale/mx35pdk/mx35pdk.c
index d0f7f045a5..63fea37d5d 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -7,7 +7,9 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c
index 3314badf9e..46037acc0e 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -9,6 +9,7 @@
 #include <asm/gpio.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx51.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c
index 33d056b47d..fabcb03ac8 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c
index 381c1ca808..ba74592e4e 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/freescale/mx6memcal/mx6memcal.c b/board/freescale/mx6memcal/mx6memcal.c
index d01127eccc..ea7a56369d 100644
--- a/board/freescale/mx6memcal/mx6memcal.c
+++ b/board/freescale/mx6memcal/mx6memcal.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/sys_proto.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx6memcal/spl.c b/board/freescale/mx6memcal/spl.c
index be551bc375..c11eee51b6 100644
--- a/board/freescale/mx6memcal/spl.c
+++ b/board/freescale/mx6memcal/spl.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/clock.h>
diff --git a/board/freescale/mx6qarm2/mx6qarm2.c b/board/freescale/mx6qarm2/mx6qarm2.c
index 3957c09ac0..5c08ecbb96 100644
--- a/board/freescale/mx6qarm2/mx6qarm2.c
+++ b/board/freescale/mx6qarm2/mx6qarm2.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx6-pins.h>
diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c
index de19a562eb..829e42f677 100644
--- a/board/freescale/mx6sabreauto/mx6sabreauto.c
+++ b/board/freescale/mx6sabreauto/mx6sabreauto.c
@@ -6,7 +6,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c
index 07d3b0edb3..8d24af0a99 100644
--- a/board/freescale/mx6sabresd/mx6sabresd.c
+++ b/board/freescale/mx6sabresd/mx6sabresd.c
@@ -5,7 +5,9 @@
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  */
 
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c
index 43029e4245..7dd00bda38 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -5,6 +5,8 @@
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  */
 
+#include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
index 0c7904204f..522b840275 100644
--- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
+++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
@@ -6,6 +6,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -16,6 +17,7 @@
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <fsl_esdhc_imx.h>
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 4f1d6602e5..b092ea8053 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -6,6 +6,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -17,6 +18,7 @@
 #include <asm/io.h>
 #include <asm/mach-imx/mxc_i2c.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <fsl_esdhc_imx.h>
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 07941fb156..b03c9c97a7 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -4,6 +4,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
@@ -21,6 +22,7 @@
 #include <fsl_esdhc_imx.h>
 #include <i2c.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <mmc.h>
 #include <netdev.h>
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 41c620795c..f12e9d4cfe 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -4,6 +4,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx7-pins.h>
@@ -11,6 +12,7 @@
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <fsl_esdhc_imx.h>
diff --git a/board/freescale/mx7ulp_evk/mx7ulp_evk.c b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
index c939514a5f..1594285860 100644
--- a/board/freescale/mx7ulp_evk/mx7ulp_evk.c
+++ b/board/freescale/mx7ulp_evk/mx7ulp_evk.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mx7ulp-pins.h>
diff --git a/board/freescale/p1010rdb/README.P1010RDB-PA b/board/freescale/p1010rdb/README.P1010RDB-PA
index 105942f7a5..46c61237c7 100644
--- a/board/freescale/p1010rdb/README.P1010RDB-PA
+++ b/board/freescale/p1010rdb/README.P1010RDB-PA
@@ -98,7 +98,6 @@ instead of to CAN/UART1.
 Build and burn U-Boot to NOR flash
 ==================================
 1. Build u-boot.bin image
-	export ARCH=powerpc
 	export CROSS_COMPILE=/your_path/powerpc-linux-gnu-
 	make P1010RDB_NOR
 
diff --git a/board/freescale/p1010rdb/README.P1010RDB-PB b/board/freescale/p1010rdb/README.P1010RDB-PB
index dc82f0df09..4a3b389877 100644
--- a/board/freescale/p1010rdb/README.P1010RDB-PB
+++ b/board/freescale/p1010rdb/README.P1010RDB-PB
@@ -128,7 +128,6 @@ To enable IFC in case of SD boot
 Build images for different boot mode
 ====================================
 First setup cross compile environment on build host
-   $ export ARCH=powerpc
    $ export CROSS_COMPILE=<your-compiler-path>/powerpc-linux-gnu-
 
 1. For NOR boot
diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c
index a086692683..66ccc0bd1e 100644
--- a/board/freescale/p1010rdb/p1010rdb.c
+++ b/board/freescale/p1010rdb/p1010rdb.c
@@ -1,10 +1,14 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
+#include <command.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <asm/cache.h>
@@ -124,7 +128,7 @@ int board_early_init_r(void)
 	return 0;
 }
 
-#ifdef CONFIG_PCI
+#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI)
 void pci_init_board(void)
 {
 	fsl_pcie_init_board(0);
@@ -136,6 +140,125 @@ int config_board_mux(int ctrl_type)
 	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	u8 tmp;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+#if defined(CONFIG_TARGET_P1010RDB_PA)
+	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
+
+	ret = i2c_get_chip_for_busnum(I2C_PCA9557_BUS_NUM,
+				      I2C_PCA9557_ADDR1, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n",
+		       __func__, I2C_PCA9557_BUS_NUM);
+		return ret;
+	}
+	switch (ctrl_type) {
+	case MUX_TYPE_IFC:
+		tmp = 0xf0;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		tmp = 0x01;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		sd_ifc_mux = MUX_TYPE_IFC;
+		clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
+		break;
+	case MUX_TYPE_SDHC:
+		tmp = 0xf0;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		tmp = 0x05;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		sd_ifc_mux = MUX_TYPE_SDHC;
+		clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
+				PMUXCR1_SDHC_ENABLE);
+		break;
+	case MUX_TYPE_SPIFLASH:
+		out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_FLASH);
+		break;
+	case MUX_TYPE_TDM:
+		out_8(&cpld_data->tdm_can_sel, MUX_CPLD_TDM);
+		out_8(&cpld_data->spi_cs0_sel, MUX_CPLD_SPICS0_SLIC);
+		break;
+	case MUX_TYPE_CAN:
+		out_8(&cpld_data->tdm_can_sel, MUX_CPLD_CAN_UART);
+		break;
+	default:
+		break;
+	}
+#elif defined(CONFIG_TARGET_P1010RDB_PB)
+	ret = i2c_get_chip_for_busnum(I2C_PCA9557_BUS_NUM,
+				      I2C_PCA9557_ADDR2, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n",
+		       __func__, I2C_PCA9557_BUS_NUM);
+		return ret;
+	}
+	switch (ctrl_type) {
+	case MUX_TYPE_IFC:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		clrbits_8(&tmp, 0x04);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x04);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		sd_ifc_mux = MUX_TYPE_IFC;
+		clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK);
+		break;
+	case MUX_TYPE_SDHC:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		setbits_8(&tmp, 0x04);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x04);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		sd_ifc_mux = MUX_TYPE_SDHC;
+		clrsetbits_be32(&gur->pmuxcr, PMUXCR1_SDHC_MASK,
+				PMUXCR1_SDHC_ENABLE);
+		break;
+	case MUX_TYPE_SPIFLASH:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		clrbits_8(&tmp, 0x80);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x80);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		break;
+	case MUX_TYPE_TDM:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		setbits_8(&tmp, 0x82);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x82);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		break;
+	case MUX_TYPE_CAN:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		clrbits_8(&tmp, 0x02);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x02);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		break;
+	case MUX_TYPE_CS0_NOR:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		clrbits_8(&tmp, 0x08);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x08);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		break;
+	case MUX_TYPE_CS0_NAND:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		setbits_8(&tmp, 0x08);
+		dm_i2c_write(dev, 1, &tmp, 1);
+		dm_i2c_read(dev, 3, &tmp, 1);
+		clrbits_8(&tmp, 0x08);
+		dm_i2c_write(dev, 3, &tmp, 1);
+		break;
+	default:
+		break;
+	}
+#endif
+#else
 #if defined(CONFIG_TARGET_P1010RDB_PA)
 	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
 
@@ -243,6 +366,7 @@ int config_board_mux(int ctrl_type)
 	}
 	i2c_set_bus_num(orig_bus);
 #endif
+#endif
 	return 0;
 }
 
@@ -250,9 +374,23 @@ int config_board_mux(int ctrl_type)
 int i2c_pca9557_read(int type)
 {
 	u8 val;
+	int bus_num = I2C_PCA9557_BUS_NUM;
 
-	i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_PCA9557_ADDR2, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n",
+		       __func__, bus_num);
+		return ret;
+	}
+	dm_i2c_read(dev, 0, &val, 1);
+#else
+	i2c_set_bus_num(bus_num);
 	i2c_read(I2C_PCA9557_ADDR2, 0, 1, &val, 1);
+#endif
 
 	switch (type) {
 	case I2C_READ_BANK:
@@ -280,11 +418,26 @@ int checkboard(void)
 	printf("Board: %sRDB-PA, ", cpu->name);
 #elif defined(CONFIG_TARGET_P1010RDB_PB)
 	printf("Board: %sRDB-PB, ", cpu->name);
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(I2C_PCA9557_BUS_NUM, I2C_PCA9557_ADDR2,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       I2C_PCA9557_BUS_NUM);
+		return ret;
+	}
+	val = 0x0;  /* no polarity inversion */
+	dm_i2c_write(dev, 2, &val, 1);
+#else
 	i2c_set_bus_num(I2C_PCA9557_BUS_NUM);
 	i2c_init(CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE);
 	val = 0x0;  /* no polarity inversion */
 	i2c_write(I2C_PCA9557_ADDR2, 2, 1, &val, 1);
 #endif
+#endif
 
 #ifdef CONFIG_SDCARD
 	/* switch to IFC to read info from CPLD */
@@ -308,7 +461,11 @@ int checkboard(void)
 	case 0xe:
 		puts("SDHC\n");
 		val = 0x60; /* set pca9557 pin input/output */
+#ifdef CONFIG_DM_I2C
+		dm_i2c_write(dev, 3, &val, 1);
+#else
 		i2c_write(I2C_PCA9557_ADDR2, 3, 1, &val, 1);
+#endif
 		break;
 	case 0x5:
 		config_board_mux(MUX_TYPE_IFC);
@@ -457,7 +614,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 	base = env_get_bootm_low();
 	size = env_get_bootm_size();
 
-#if defined(CONFIG_PCI)
+#if defined(CONFIG_PCI) && !defined(CONFIG_DM_PCI)
 	FT_FSL_PCI_SETUP;
 #endif
 
@@ -552,8 +709,8 @@ int misc_init_r(void)
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int pin_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int pin_mux_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/board/freescale/p1022ds/diu.c b/board/freescale/p1022ds/diu.c
index 7f7251009c..918b4b9f6a 100644
--- a/board/freescale/p1022ds/diu.c
+++ b/board/freescale/p1022ds/diu.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <command.h>
+#include <log.h>
 #include <linux/ctype.h>
 #include <asm/io.h>
 #include <stdio_dev.h>
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index ebf822acb5..d10160d17a 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -8,7 +8,10 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
diff --git a/board/freescale/p1023rdb/p1023rdb.c b/board/freescale/p1023rdb/p1023rdb.c
index eeb13ccc9b..13df3e8637 100644
--- a/board/freescale/p1023rdb/p1023rdb.c
+++ b/board/freescale/p1023rdb/p1023rdb.c
@@ -9,7 +9,9 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm/cache.h>
diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
index 71fca8ca1e..1353debc0e 100644
--- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
+++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,7 +9,9 @@
 #include <env.h>
 #include <hang.h>
 #include <hwconfig.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <i2c.h>
 #include <asm/processor.h>
@@ -22,6 +25,7 @@
 #include <asm/fsl_lbc.h>
 #include <asm/mp.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
@@ -227,6 +231,7 @@ int checkboard(void)
 	struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE);
 	ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 	u8 in, out, io_config, val;
+	int bus_num = CONFIG_SYS_SPD_BUS_NUM;
 
 	printf("Board: %s CPLD: V%d.%d PCBA: V%d.0\n", CONFIG_BOARDNAME,
 		in_8(&cpld_data->cpld_rev_major) & 0x0F,
@@ -234,7 +239,26 @@ int checkboard(void)
 		in_8(&cpld_data->pcba_rev) & 0x0F);
 
 	/* Initialize i2c early for rom_loc and flash bank information */
-	i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM);
+	#if defined(CONFIG_DM_I2C)
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(bus_num, CONFIG_SYS_I2C_PCA9557_ADDR,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return -ENXIO;
+	}
+
+	if (dm_i2c_read(dev, 0, &in, 1) < 0 ||
+	    dm_i2c_read(dev, 1, &out, 1) < 0 ||
+	    dm_i2c_read(dev, 3, &io_config, 1) < 0) {
+		printf("Error reading i2c boot information!\n");
+		return 0; /* Don't want to hang() on this error */
+	}
+	#else /* Non DM I2C support - will be removed */
+	i2c_set_bus_num(bus_num);
 
 	if (i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 0, 1, &in, 1) < 0 ||
 	    i2c_read(CONFIG_SYS_I2C_PCA9557_ADDR, 1, 1, &out, 1) < 0 ||
@@ -242,6 +266,7 @@ int checkboard(void)
 		printf("Error reading i2c boot information!\n");
 		return 0; /* Don't want to hang() on this error */
 	}
+	#endif
 
 	val = (in & io_config) | (out & (~io_config));
 
diff --git a/board/freescale/p1_twr/p1_twr.c b/board/freescale/p1_twr/p1_twr.c
index 72fe1b4166..8e1522a604 100644
--- a/board/freescale/p1_twr/p1_twr.c
+++ b/board/freescale/p1_twr/p1_twr.c
@@ -7,7 +7,9 @@
 #include <command.h>
 #include <env.h>
 #include <hwconfig.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <i2c.h>
 #include <asm/processor.h>
diff --git a/board/freescale/p2041rdb/cpld.c b/board/freescale/p2041rdb/cpld.c
index 3037ef89f1..b042fe3bcb 100644
--- a/board/freescale/p2041rdb/cpld.c
+++ b/board/freescale/p2041rdb/cpld.c
@@ -87,7 +87,7 @@ static void cpld_dump_regs(void)
 }
 #endif
 
-int cpld_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int cpld_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/p2041rdb/ddr.c b/board/freescale/p2041rdb/ddr.c
index 8bcd2fb5a7..7a06c7af3d 100644
--- a/board/freescale/p2041rdb/ddr.c
+++ b/board/freescale/p2041rdb/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c
index 854a839b8c..32c68f2a71 100644
--- a/board/freescale/p2041rdb/eth.c
+++ b/board/freescale/p2041rdb/eth.c
@@ -13,6 +13,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 95ed0ef429..076e63a357 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -7,6 +7,7 @@
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/freescale/qemu-ppce500/qemu-ppce500.c b/board/freescale/qemu-ppce500/qemu-ppce500.c
index e804cfe986..61a9226eb3 100644
--- a/board/freescale/qemu-ppce500/qemu-ppce500.c
+++ b/board/freescale/qemu-ppce500/qemu-ppce500.c
@@ -8,6 +8,8 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <time.h>
 #include <asm/processor.h>
diff --git a/board/freescale/t102xqds/ddr.c b/board/freescale/t102xqds/ddr.c
index 998a2a5d3f..c27cecd5aa 100644
--- a/board/freescale/t102xqds/ddr.c
+++ b/board/freescale/t102xqds/ddr.c
@@ -6,11 +6,14 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include <asm/mpc85xx_gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/t102xqds/eth_t102xqds.c b/board/freescale/t102xqds/eth_t102xqds.c
index 5b65818eed..49ea21a83a 100644
--- a/board/freescale/t102xqds/eth_t102xqds.c
+++ b/board/freescale/t102xqds/eth_t102xqds.c
@@ -7,6 +7,9 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
diff --git a/board/freescale/t102xqds/t102xqds.c b/board/freescale/t102xqds/t102xqds.c
index e42337e47a..84db2fa9bc 100644
--- a/board/freescale/t102xqds/t102xqds.c
+++ b/board/freescale/t102xqds/t102xqds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,7 +9,9 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
@@ -75,11 +78,24 @@ int checkboard(void)
 	return 0;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
 
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -191,6 +207,82 @@ void board_retimer_ds125df111_init(void)
 {
 	u8 reg;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret, bus_num = 0;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+				      1, &dev);
+	if (ret)
+		goto failed;
+
+	/* Retimer DS125DF111 is connected to I2C1_CH7_CH5 */
+	reg = I2C_MUX_CH7;
+	dm_i2c_write(dev, 0, &reg, 1);
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
+				      1, &dev);
+	if (ret)
+		goto failed;
+
+	reg = I2C_MUX_CH5;
+	dm_i2c_write(dev, 0, &reg, 1);
+
+	/* Access to Control/Shared register */
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
+				      1, &dev);
+	if (ret)
+		goto failed;
+	reg = 0x0;
+	dm_i2c_write(dev, 0xff, &reg, 1);
+
+	/* Read device revision and ID */
+	dm_i2c_read(dev, 1, &reg, 1);
+	debug("Retimer version id = 0x%x\n", reg);
+
+	/* Enable Broadcast */
+	reg = 0x0c;
+	dm_i2c_write(dev, 0xff, &reg, 1);
+
+	/* Reset Channel Registers */
+	dm_i2c_read(dev, 0, &reg, 1);
+	reg |= 0x4;
+	dm_i2c_write(dev, 0, &reg, 1);
+
+	/* Enable override divider select and Enable Override Output Mux */
+	dm_i2c_read(dev, 9, &reg, 1);
+	reg |= 0x24;
+	dm_i2c_write(dev, 9, &reg, 1);
+
+	/* Select VCO Divider to full rate (000) */
+	dm_i2c_read(dev, 0x18, &reg, 1);
+	reg &= 0x8f;
+	dm_i2c_write(dev, 0x18, &reg, 1);
+
+	/* Select active PFD MUX input as re-timed data (001) */
+	dm_i2c_read(dev, 0x1e, &reg, 1);
+	reg &= 0x3f;
+	reg |= 0x20;
+	dm_i2c_write(dev, 0x1e, &reg, 1);
+
+	/* Set data rate as 10.3125 Gbps */
+	reg = 0x0;
+	dm_i2c_write(dev, 0x60, &reg, 1);
+	reg = 0xb2;
+	dm_i2c_write(dev, 0x61, &reg, 1);
+	reg = 0x90;
+	dm_i2c_write(dev, 0x62, &reg, 1);
+	reg = 0xb3;
+	dm_i2c_write(dev, 0x63, &reg, 1);
+	reg = 0xcd;
+	dm_i2c_write(dev, 0x64, &reg, 1);
+	return;
+
+failed:
+	printf("%s: Cannot find udev for a bus %d\n", __func__,
+	       bus_num);
+	return;
+#else
 	/* Retimer DS125DF111 is connected to I2C1_CH7_CH5 */
 	reg = I2C_MUX_CH7;
 	i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &reg, 1);
@@ -241,6 +333,7 @@ void board_retimer_ds125df111_init(void)
 	i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);
 	reg = 0xcd;
 	i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
+#endif
 }
 
 int board_early_init_f(void)
@@ -281,7 +374,7 @@ int board_early_init_r(void)
 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
 #endif
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 	board_mux_lane_to_slot();
 	board_retimer_ds125df111_init();
 
diff --git a/board/freescale/t102xqds/t102xqds.h b/board/freescale/t102xqds/t102xqds.h
index 15de132598..d327b5edb9 100644
--- a/board/freescale/t102xqds/t102xqds.h
+++ b/board/freescale/t102xqds/t102xqds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #ifndef __T102x_QDS_H__
@@ -8,6 +9,6 @@
 
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, bd_t *bd);
-int select_i2c_ch_pca9547(u8 ch);
+int select_i2c_ch_pca9547(u8 ch, int bus_num);
 
 #endif
diff --git a/board/freescale/t102xrdb/cpld.c b/board/freescale/t102xrdb/cpld.c
index 2b640e0450..47c3b1627e 100644
--- a/board/freescale/t102xrdb/cpld.c
+++ b/board/freescale/t102xrdb/cpld.c
@@ -72,7 +72,7 @@ static void cpld_dump_regs(void)
 	putc('\n');
 }
 
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/t102xrdb/ddr.c b/board/freescale/t102xrdb/ddr.c
index 043f0b5b84..3640a47957 100644
--- a/board/freescale/t102xrdb/ddr.c
+++ b/board/freescale/t102xrdb/ddr.c
@@ -6,11 +6,14 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include <asm/mpc85xx_gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/freescale/t102xrdb/eth_t102xrdb.c b/board/freescale/t102xrdb/eth_t102xrdb.c
index 299b859cb6..dbf25a237d 100644
--- a/board/freescale/t102xrdb/eth_t102xrdb.c
+++ b/board/freescale/t102xrdb/eth_t102xrdb.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index eee09a5701..754fcb0ad5 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,6 +9,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
@@ -250,8 +252,69 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 {
 	ccsr_gpio_t __iomem *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
 	ccsr_gur_t __iomem  *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
-	u32 val, orig_bus = i2c_get_bus_num();
+	u32 val;
 	u8 tmp;
+	int bus_num = I2C_PCA6408_BUS_NUM;
+
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int ret;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_PCA6408_ADDR,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+	switch (ctrl_type) {
+	case GPIO1_SD_SEL:
+		val = in_be32(&pgpio->gpdat);
+		val |= GPIO1_SD_SEL;
+		out_be32(&pgpio->gpdat, val);
+		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
+		break;
+	case GPIO1_EMMC_SEL:
+		val = in_be32(&pgpio->gpdat);
+		val &= ~GPIO1_SD_SEL;
+		out_be32(&pgpio->gpdat, val);
+		setbits_be32(&pgpio->gpdir, GPIO1_SD_SEL);
+		break;
+	case GPIO3_GET_VERSION:
+		pgpio = (ccsr_gpio_t *)(CONFIG_SYS_MPC85xx_GPIO_ADDR
+			 + GPIO3_OFFSET);
+		val = in_be32(&pgpio->gpdat);
+		val = ((val & GPIO3_BRD_VER_MASK) >> 26) & 0x3;
+		if (val == 0x3) /* GPIO3_4/5 not used on RevB */
+			val = 0;
+		return val;
+	case I2C_GET_BANK:
+		dm_i2c_read(dev, 0, &tmp, 1);
+		tmp &= 0x7;
+		tmp = ((tmp & 1) << 2) | (tmp & 2) | ((tmp & 4) >> 2);
+		return tmp;
+	case I2C_SET_BANK0:
+		tmp = 0x0;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		tmp = 0xf8;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		/* asserting HRESET_REQ */
+		out_be32(&gur->rstcr, 0x2);
+		break;
+	case I2C_SET_BANK4:
+		tmp = 0x1;
+		dm_i2c_write(dev, 1, &tmp, 1);
+		tmp = 0xf8;
+		dm_i2c_write(dev, 3, &tmp, 1);
+		out_be32(&gur->rstcr, 0x2);
+		break;
+	default:
+		break;
+	}
+#else
+	u32 orig_bus;
+
+	orig_bus = i2c_get_bus_num();
 
 	switch (ctrl_type) {
 	case GPIO1_SD_SEL:
@@ -275,14 +338,14 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 			val = 0;
 		return val;
 	case I2C_GET_BANK:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		i2c_read(I2C_PCA6408_ADDR, 0, 1, &tmp, 1);
 		tmp &= 0x7;
 		tmp = ((tmp & 1) << 2) | (tmp & 2) | ((tmp & 4) >> 2);
 		i2c_set_bus_num(orig_bus);
 		return tmp;
 	case I2C_SET_BANK0:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		tmp = 0x0;
 		i2c_write(I2C_PCA6408_ADDR, 1, 1, &tmp, 1);
 		tmp = 0xf8;
@@ -291,7 +354,7 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 		out_be32(&gur->rstcr, 0x2);
 		break;
 	case I2C_SET_BANK4:
-		i2c_set_bus_num(I2C_PCA6408_BUS_NUM);
+		i2c_set_bus_num(bus_num);
 		tmp = 0x1;
 		i2c_write(I2C_PCA6408_ADDR, 1, 1, &tmp, 1);
 		tmp = 0xf8;
@@ -301,11 +364,12 @@ static u32 t1023rdb_ctrl(u32 ctrl_type)
 	default:
 		break;
 	}
+#endif
 	return 0;
 }
 
-static int switch_cmd(cmd_tbl_t *cmdtp, int flag, int argc,
-		    char * const argv[])
+static int switch_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 2b1d768f1b..0a817d0ee8 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -6,11 +6,14 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include <asm/mpc85xx_gpio.h>
+#include <linux/delay.h>
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/t1040qds/diu.c b/board/freescale/t1040qds/diu.c
index ab9e922a92..0b1aeed69e 100644
--- a/board/freescale/t1040qds/diu.c
+++ b/board/freescale/t1040qds/diu.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
  */
 
@@ -48,7 +49,7 @@ void diu_set_pixel_clock(unsigned int pixclock)
 
 	/* Program HDMI encoder */
 	/* Switch channel to DIU */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DIU);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DIU, 0);
 
 	/* Set dispaly encoder */
 	ret = diu_set_dvi_encoder(temp);
@@ -58,7 +59,7 @@ void diu_set_pixel_clock(unsigned int pixclock)
 	}
 
 	/* Switch channel to default */
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	/* Program pixel clock */
 	out_be32((unsigned *)CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR,
diff --git a/board/freescale/t1040qds/eth.c b/board/freescale/t1040qds/eth.c
index 4185cfac12..b349b77951 100644
--- a/board/freescale/t1040qds/eth.c
+++ b/board/freescale/t1040qds/eth.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <asm/immap_85xx.h>
diff --git a/board/freescale/t1040qds/t1040qds.c b/board/freescale/t1040qds/t1040qds.c
index 92dd9237ec..c166403ba4 100644
--- a/board/freescale/t1040qds/t1040qds.c
+++ b/board/freescale/t1040qds/t1040qds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,6 +9,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
@@ -79,11 +81,24 @@ int checkboard(void)
 	return 0;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -154,7 +169,7 @@ int board_early_init_r(void)
 		MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 		0, flash_esel, BOOKE_PAGESZ_256M, 1);
 #endif
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	return 0;
 }
diff --git a/board/freescale/t1040qds/t1040qds.h b/board/freescale/t1040qds/t1040qds.h
index d2f0203f17..781bcdefc9 100644
--- a/board/freescale/t1040qds/t1040qds.h
+++ b/board/freescale/t1040qds/t1040qds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #ifndef __T1040_QDS_H__
@@ -8,6 +9,6 @@
 
 void fdt_fixup_board_enet(void *blob);
 void pci_of_setup(void *blob, bd_t *bd);
-int select_i2c_ch_pca9547(u8 ch);
+int select_i2c_ch_pca9547(u8 ch, int bus_bum);
 
 #endif
diff --git a/board/freescale/t104xrdb/cpld.c b/board/freescale/t104xrdb/cpld.c
index f9c8ab3752..ac34095f3b 100644
--- a/board/freescale/t104xrdb/cpld.c
+++ b/board/freescale/t104xrdb/cpld.c
@@ -82,7 +82,7 @@ static void cpld_dump_regs(void)
 }
 #endif
 
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 2b1b28da88..e313bf99cf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -6,11 +6,14 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
 #include <asm/fsl_law.h>
 #include <asm/mpc85xx_gpio.h>
+#include <linux/delay.h>
 #include "ddr.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index 107d28da33..9cbc8754dc 100644
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <asm/immap_85xx.h>
diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c
index dc3b59d26f..6a4b351068 100644
--- a/board/freescale/t104xrdb/t104xrdb.c
+++ b/board/freescale/t104xrdb/t104xrdb.c
@@ -8,7 +8,9 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <hwconfig.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
diff --git a/board/freescale/t208xqds/ddr.c b/board/freescale/t208xqds/ddr.c
index a2a56540b5..3317f99c81 100644
--- a/board/freescale/t208xqds/ddr.c
+++ b/board/freescale/t208xqds/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c
index 697c23b038..938e606641 100644
--- a/board/freescale/t208xqds/eth_t208xqds.c
+++ b/board/freescale/t208xqds/eth_t208xqds.c
@@ -8,6 +8,9 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
@@ -27,6 +30,7 @@
 #include "../common/qixis.h"
 #include "../common/fman.h"
 #include "t208xqds_qixis.h"
+#include <linux/libfdt.h>
 
 #define EMI_NONE	0xFFFFFFFF
 #define EMI1_RGMII1	0
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 79cc1543f9..4979085e19 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2009-2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,7 +9,9 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
@@ -75,11 +78,23 @@ int checkboard(void)
 	return 0;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -90,7 +105,7 @@ int select_i2c_ch_pca9547(u8 ch)
 
 int i2c_multiplexer_select_vid_channel(u8 channel)
 {
-	return select_i2c_ch_pca9547(channel);
+	return select_i2c_ch_pca9547(channel, 0);
 }
 
 int brd_mux_lane_to_slot(void)
@@ -368,7 +383,7 @@ int board_early_init_r(void)
 		printf("Warning: Adjusting core voltage failed.\n");
 
 	brd_mux_lane_to_slot();
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	return 0;
 }
diff --git a/board/freescale/t208xrdb/cpld.c b/board/freescale/t208xrdb/cpld.c
index 9a9b9d8e77..b9ba62adff 100644
--- a/board/freescale/t208xrdb/cpld.c
+++ b/board/freescale/t208xrdb/cpld.c
@@ -43,7 +43,7 @@ void cpld_set_defbank(void)
 	CPLD_WRITE(reset_ctl, CPLD_LBMAP_RESET);
 }
 
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/t208xrdb/ddr.c b/board/freescale/t208xrdb/ddr.c
index 0b16982f06..6a09d1cd22 100644
--- a/board/freescale/t208xrdb/ddr.c
+++ b/board/freescale/t208xrdb/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/t208xrdb/eth_t208xrdb.c b/board/freescale/t208xrdb/eth_t208xrdb.c
index 6894947304..db4718128d 100644
--- a/board/freescale/t208xrdb/eth_t208xrdb.c
+++ b/board/freescale/t208xrdb/eth_t208xrdb.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index b5c20112d0..24f0d0764c 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/freescale/t4qds/ddr.c b/board/freescale/t4qds/ddr.c
index 08656b4e30..4fdd69d424 100644
--- a/board/freescale/t4qds/ddr.c
+++ b/board/freescale/t4qds/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/t4qds/eth.c b/board/freescale/t4qds/eth.c
index b341c82e67..810868ff39 100644
--- a/board/freescale/t4qds/eth.c
+++ b/board/freescale/t4qds/eth.c
@@ -5,6 +5,9 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <log.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
@@ -25,6 +28,7 @@
 #include <hwconfig.h>
 #include "../common/qixis.h"
 #include "../common/fman.h"
+#include <linux/libfdt.h>
 
 #include "t4240qds_qixis.h"
 
diff --git a/board/freescale/t4qds/t4240emu.c b/board/freescale/t4qds/t4240emu.c
index 104b40a110..8f2032acc7 100644
--- a/board/freescale/t4qds/t4240emu.c
+++ b/board/freescale/t4qds/t4240emu.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/freescale/t4qds/t4240qds.c b/board/freescale/t4qds/t4240qds.c
index 5608774afd..8d1a66f223 100644
--- a/board/freescale/t4qds/t4240qds.c
+++ b/board/freescale/t4qds/t4240qds.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2009-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #include <common.h>
@@ -8,8 +9,10 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <netdev.h>
 #include <linux/compiler.h>
 #include <asm/mmu.h>
@@ -20,6 +23,7 @@
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_liodn.h>
 #include <fm_eth.h>
+#include <linux/delay.h>
 
 #include "../common/qixis.h"
 #include "../common/vsc3316_3308.h"
@@ -91,11 +95,25 @@ int checkboard(void)
 	return 0;
 }
 
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
 {
 	int ret;
 
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+
+	ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
+				      1, &dev);
+	if (ret) {
+		printf("%s: Cannot find udev for a bus %d\n", __func__,
+		       bus_num);
+		return ret;
+	}
+
+	ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
 	ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
 	if (ret) {
 		puts("PCA: failed to select proper channel\n");
 		return ret;
@@ -115,10 +133,28 @@ static inline int read_voltage(void)
 {
 	int i, ret, voltage_read = 0;
 	u16 vol_mon;
+#ifdef CONFIG_DM_I2C
+	struct udevice *dev;
+	int bus_num = 0;
+#endif
 
 	for (i = 0; i < NUM_READINGS; i++) {
+#ifdef CONFIG_DM_I2C
+		ret = i2c_get_chip_for_busnum(bus_num, I2C_VOL_MONITOR_ADDR,
+					      1, &dev);
+		if (ret) {
+			printf("%s: Cannot find udev for a bus %d\n", __func__,
+			       bus_num);
+			return ret;
+		}
+
+		ret = dm_i2c_read(dev,
+				  I2C_VOL_MONITOR_BUS_V_OFFSET,
+				  (void *)&vol_mon, 2);
+#else
 		ret = i2c_read(I2C_VOL_MONITOR_ADDR,
 			I2C_VOL_MONITOR_BUS_V_OFFSET, 1, (void *)&vol_mon, 2);
+#endif
 		if (ret) {
 			printf("VID: failed to read core voltage\n");
 			return ret;
@@ -250,7 +286,7 @@ static int adjust_vdd(ulong vdd_override)
 		unsigned voltage;
 	};
 
-	ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR);
+	ret = select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR, 0);
 	if (ret) {
 		debug("VID: I2c failed to switch channel\n");
 		ret = -1;
@@ -348,7 +384,7 @@ int config_frontside_crossbar_vsc3316(void)
 	u32 srds_prtcl_s1, srds_prtcl_s2;
 	int ret;
 
-	ret = select_i2c_ch_pca9547(I2C_MUX_CH_VSC3316_FS);
+	ret = select_i2c_ch_pca9547(I2C_MUX_CH_VSC3316_FS, 0);
 	if (ret)
 		return ret;
 
@@ -567,7 +603,7 @@ int board_early_init_r(void)
 	/* Configure board SERDES ports crossbar */
 	config_frontside_crossbar_vsc3316();
 	config_backside_crossbar_mux();
-	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+	select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 
 	return 0;
 }
@@ -732,11 +768,11 @@ void board_detail(void)
 	}
 
 	/* Voltage secion */
-	if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR)) {
+	if (!select_i2c_ch_pca9547(I2C_MUX_CH_VOL_MONITOR, 0)) {
 		vdd = read_voltage();
 		if (vdd > 0)
 			printf("Core voltage= %d mV\n", vdd);
-		select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+		select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
 	}
 
 	printf("XVDD        = 1.%d V\n", ((brdcfg[8] & 0xf) - 4) * 5 + 25);
@@ -868,9 +904,9 @@ void qixis_dump_switch(void)
 	}
 }
 
-static int do_vdd_adjust(cmd_tbl_t *cmdtp,
+static int do_vdd_adjust(struct cmd_tbl *cmdtp,
 			 int flag, int argc,
-			 char * const argv[])
+			 char *const argv[])
 {
 	ulong override;
 
diff --git a/board/freescale/t4rdb/cpld.c b/board/freescale/t4rdb/cpld.c
index 470b5f9154..d484509bc2 100644
--- a/board/freescale/t4rdb/cpld.c
+++ b/board/freescale/t4rdb/cpld.c
@@ -95,7 +95,7 @@ static void cpld_dump_regs(void)
 #endif
 
 #ifndef CONFIG_SPL_BUILD
-int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int rc = 0;
 
diff --git a/board/freescale/t4rdb/ddr.c b/board/freescale/t4rdb/ddr.c
index 787de6d7ad..5b7d10c979 100644
--- a/board/freescale/t4rdb/ddr.c
+++ b/board/freescale/t4rdb/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/freescale/t4rdb/eth.c b/board/freescale/t4rdb/eth.c
index 2ef192c452..4c896c8a90 100644
--- a/board/freescale/t4rdb/eth.c
+++ b/board/freescale/t4rdb/eth.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <fdt_support.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/mmu.h>
 #include <asm/processor.h>
diff --git a/board/freescale/t4rdb/t4240rdb.c b/board/freescale/t4rdb/t4240rdb.c
index 8015666ecc..d801f2c7a1 100644
--- a/board/freescale/t4rdb/t4240rdb.c
+++ b/board/freescale/t4rdb/t4240rdb.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/gardena/smart-gateway-mt7688/board.c b/board/gardena/smart-gateway-mt7688/board.c
index 776afa43a6..8a3a6e3482 100644
--- a/board/gardena/smart-gateway-mt7688/board.c
+++ b/board/gardena/smart-gateway-mt7688/board.c
@@ -4,14 +4,19 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <env_internal.h>
+#include <flash.h>
 #include <init.h>
 #include <led.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <spi.h>
 #include <spi_flash.h>
+#include <linux/delay.h>
+#include <linux/stringify.h>
 #include <u-boot/crc.h>
 #include <uuid.h>
 #include <linux/ctype.h>
@@ -205,7 +210,7 @@ static void copy_or_generate_uuid(char *fd_ptr, const char *env_var_name)
  * Helper function to provide some sane factory-data values for testing
  * purpose, when these values are not programmed correctly
  */
-int do_fd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_fd_write(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct factory_data_values *fd;
 	struct spi_flash *sf;
diff --git a/board/gateworks/gw_ventana/common.c b/board/gateworks/gw_ventana/common.c
index 1240a9da17..1a35249724 100644
--- a/board/gateworks/gw_ventana/common.c
+++ b/board/gateworks/gw_ventana/common.c
@@ -5,6 +5,8 @@
  * Author: Tim Harvey <tharvey@gateworks.com>
  */
 
+#include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/sys_proto.h>
@@ -13,6 +15,7 @@
 #include <env.h>
 #include <fsl_esdhc_imx.h>
 #include <hwconfig.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/ltc3676_pmic.h>
 #include <power/pfuze100_pmic.h>
diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c
index 5e9cf11575..a5a151d85b 100644
--- a/board/gateworks/gw_ventana/eeprom.c
+++ b/board/gateworks/gw_ventana/eeprom.c
@@ -5,11 +5,14 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <errno.h>
 #include <hexdump.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/bitops.h>
+#include <linux/delay.h>
 
 #include "gsc.h"
 #include "ventana_eeprom.h"
@@ -158,7 +161,8 @@ static struct ventana_eeprom_config *get_config(const char *name)
 static u8 econfig_bytes[sizeof(ventana_info.config)];
 static int econfig_init = -1;
 
-static int do_econfig(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_econfig(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct ventana_eeprom_config *cfg;
 	struct ventana_board_info *info = &ventana_info;
diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c
index 068f8cd9e7..bcb6bca346 100644
--- a/board/gateworks/gw_ventana/gsc.c
+++ b/board/gateworks/gw_ventana/gsc.c
@@ -5,6 +5,10 @@
  * Author: Tim Harvey <tharvey@gateworks.com>
  */
 
+#include <common.h>
+#include <command.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <common.h>
 #include <i2c.h>
@@ -176,8 +180,8 @@ int gsc_boot_wd_disable(void)
 }
 
 #if defined(CONFIG_CMD_GSC) && !defined(CONFIG_SPL_BUILD)
-static int do_gsc_sleep(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_gsc_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	unsigned char reg;
 	unsigned long secs = 0;
@@ -218,7 +222,8 @@ error:
 	return CMD_RET_FAILURE;
 }
 
-static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_gsc_wd(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	unsigned char reg;
 
@@ -257,7 +262,7 @@ static int do_gsc_wd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_gsc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc < 2)
 		return gsc_info(1);
diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c
index 8a694a71c9..649e622944 100644
--- a/board/gateworks/gw_ventana/gw_ventana.c
+++ b/board/gateworks/gw_ventana/gw_ventana.c
@@ -6,6 +6,9 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -32,6 +35,8 @@
 #include <mtd_node.h>
 #include <netdev.h>
 #include <pci.h>
+#include <linux/delay.h>
+#include <linux/libfdt.h>
 #include <power/pmic.h>
 #include <power/ltc3676_pmic.h>
 #include <power/pfuze100_pmic.h>
diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c
index 80fec5f9cf..e0e4bac161 100644
--- a/board/gateworks/gw_ventana/gw_ventana_spl.c
+++ b/board/gateworks/gw_ventana/gw_ventana_spl.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-ddr.h>
diff --git a/board/gdsys/a38x/controlcenterdc.c b/board/gdsys/a38x/controlcenterdc.c
index 4eb7d76660..a2287f9deb 100644
--- a/board/gdsys/a38x/controlcenterdc.c
+++ b/board/gdsys/a38x/controlcenterdc.c
@@ -5,13 +5,16 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <tpm-v1.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm-generic/gpio.h>
+#include <linux/delay.h>
 
 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
 #include "../arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.h"
diff --git a/board/gdsys/a38x/hre.c b/board/gdsys/a38x/hre.c
index 027ad1f57e..699241b3e6 100644
--- a/board/gdsys/a38x/hre.c
+++ b/board/gdsys/a38x/hre.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <fs.h>
 #include <i2c.h>
diff --git a/board/gdsys/a38x/hydra.c b/board/gdsys/a38x/hydra.c
index fa50ad2830..daade6da0a 100644
--- a/board/gdsys/a38x/hydra.c
+++ b/board/gdsys/a38x/hydra.c
@@ -1,4 +1,5 @@
 #include <common.h>
+#include <command.h>
 #include <console.h> /* ctrlc */
 #include <asm/io.h>
 
@@ -89,7 +90,7 @@ void hydra_initialize(void)
 #define REFL_PATTERN (0xdededede)
 #define REFL_PATTERN_INV (~REFL_PATTERN)
 
-int do_hydrate(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_hydrate(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint k = 0;
 	void __iomem *pcie2_base = (void __iomem *)(MVEBU_REG_PCIE_BASE +
diff --git a/board/gdsys/a38x/ihs_phys.c b/board/gdsys/a38x/ihs_phys.c
index 494de18f86..c23d150921 100644
--- a/board/gdsys/a38x/ihs_phys.c
+++ b/board/gdsys/a38x/ihs_phys.c
@@ -2,6 +2,8 @@
 #include <dm.h>
 #include <miiphy.h>
 #include <asm-generic/gpio.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include "ihs_phys.h"
 #include "dt_helpers.h"
diff --git a/board/gdsys/common/cmd_ioloop.c b/board/gdsys/common/cmd_ioloop.c
index 05a14ff103..3ea2bec8eb 100644
--- a/board/gdsys/common/cmd_ioloop.c
+++ b/board/gdsys/common/cmd_ioloop.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <command.h>
 #include <console.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <gdsys_fpga.h>
 
@@ -264,7 +266,7 @@ static void io_reflect(struct udevice *dev)
  * Syntax:
  *	ioreflect {fpga} {reportrate}
  */
-int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ioreflect(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint fpga;
 	uint rate = 0;
@@ -321,7 +323,7 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Syntax:
  *	ioreflect {reportrate}
  */
-int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ioreflect(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *fpga;
 	struct regmap *map;
@@ -374,7 +376,7 @@ int do_ioreflect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Syntax:
  *	ioloop {fpga} {size} {rate}
  */
-int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ioloop(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint fpga;
 	uint size;
@@ -440,7 +442,7 @@ int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Syntax:
  *	ioloop {size} {rate}
  */
-int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ioloop(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint size;
 	uint rate = 0;
@@ -501,7 +503,7 @@ int do_ioloop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
 
 #ifndef CONFIG_GDSYS_LEGACY_DRIVERS
-int do_iodev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_iodev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *ioep = NULL;
 	struct udevice *board;
diff --git a/board/gdsys/common/ihs_mdio.c b/board/gdsys/common/ihs_mdio.c
index f160a57cc2..5f1215e9e8 100644
--- a/board/gdsys/common/ihs_mdio.c
+++ b/board/gdsys/common/ihs_mdio.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include <miiphy.h>
 #ifdef CONFIG_GDSYS_LEGACY_DRIVERS
diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c
index 066222c563..7292d7ab5a 100644
--- a/board/gdsys/common/ioep-fpga.c
+++ b/board/gdsys/common/ioep-fpga.c
@@ -9,6 +9,7 @@
 #include <common.h>
 
 #include <gdsys_fpga.h>
+#include <linux/bitops.h>
 
 enum pcb_video_type {
 	PCB_DVI_SL,
@@ -443,6 +444,7 @@ static int get_features(unsigned int fpga, struct fpga_features *features)
 	return 0;
 }
 
+#include <linux/bitops.h>
 #endif
 
 bool ioep_fpga_has_osd(unsigned int fpga)
diff --git a/board/gdsys/common/mclink.c b/board/gdsys/common/mclink.c
index c43d24b26d..6147fbfc87 100644
--- a/board/gdsys/common/mclink.c
+++ b/board/gdsys/common/mclink.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 
 #include <gdsys_fpga.h>
+#include <linux/delay.h>
 
 enum {
 	MCINT_SLAVE_LINK_CHANGED_EV = 1 << 7,
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index 10c4329146..679f8f3019 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -7,8 +7,10 @@
 #ifdef CONFIG_GDSYS_LEGACY_DRIVERS
 
 #include <common.h>
+#include <command.h>
 #include <i2c.h>
 #include <malloc.h>
+#include <linux/stringify.h>
 
 #include "ch7301.h"
 #include "dp501.h"
@@ -259,7 +261,8 @@ static int osd_write_videomem(unsigned screen, unsigned offset,
 	return charcount;
 }
 
-static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int osd_print(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	unsigned screen;
 
@@ -396,7 +399,7 @@ int osd_probe(unsigned screen)
 	return 0;
 }
 
-int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int osd_write(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned screen;
 
@@ -449,7 +452,7 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-int osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int osd_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned screen;
 	unsigned x;
@@ -500,4 +503,4 @@ U_BOOT_CMD(
 	") size_y(max. " __stringify(MAX_Y_CHARS) ")\n"
 );
 
-#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
\ No newline at end of file
+#endif /* CONFIG_GDSYS_LEGACY_DRIVERS */
diff --git a/board/gdsys/common/osd_cmd.c b/board/gdsys/common/osd_cmd.c
index 53179b9811..fe6249794e 100644
--- a/board/gdsys/common/osd_cmd.c
+++ b/board/gdsys/common/osd_cmd.c
@@ -10,13 +10,14 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <hexdump.h>
 #include <video_osd.h>
 #include <malloc.h>
 
-static int do_osd_write(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_osd_write(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	struct udevice *dev;
 	uint x, y;
@@ -68,8 +69,8 @@ static int do_osd_write(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_osd_print(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_osd_print(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	struct udevice *dev;
 	uint x, y;
@@ -99,8 +100,8 @@ static int do_osd_print(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_osd_size(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_osd_size(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct udevice *dev;
 	uint x, y;
diff --git a/board/gdsys/common/phy.c b/board/gdsys/common/phy.c
index d40c08d9e9..516f4e8edc 100644
--- a/board/gdsys/common/phy.c
+++ b/board/gdsys/common/phy.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 
 #include <miiphy.h>
 
diff --git a/board/gdsys/mpc8308/gazerbeam.c b/board/gdsys/mpc8308/gazerbeam.c
index 8c9636d292..b64a6d992d 100644
--- a/board/gdsys/mpc8308/gazerbeam.c
+++ b/board/gdsys/mpc8308/gazerbeam.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <board.h>
+#include <command.h>
 #include <dm.h>
 #include <env.h>
 #include <fdt_support.h>
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index d1110157a2..d206f8f0c5 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -6,10 +6,13 @@
 
 #include <common.h>
 #include <env.h>
+#include <flash.h>
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
 #include <spi.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
diff --git a/board/gdsys/mpc8308/mpc8308.c b/board/gdsys/mpc8308/mpc8308.c
index d4108457d9..0f90f8ad32 100644
--- a/board/gdsys/mpc8308/mpc8308.c
+++ b/board/gdsys/mpc8308/mpc8308.c
@@ -10,6 +10,7 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/global_data.h>
+#include <linux/delay.h>
 
 #include "mpc8308.h"
 #include <gdsys_fpga.h>
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 9ba9e4278a..b3af8fec91 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -6,10 +6,13 @@
 
 #include <common.h>
 #include <env.h>
+#include <flash.h>
 #include <hwconfig.h>
 #include <i2c.h>
 #include <init.h>
 #include <spi.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
diff --git a/board/gdsys/p1022/controlcenterd-id.c b/board/gdsys/p1022/controlcenterd-id.c
index ad56dd7d01..1b5aa9042f 100644
--- a/board/gdsys/p1022/controlcenterd-id.c
+++ b/board/gdsys/p1022/controlcenterd-id.c
@@ -11,15 +11,18 @@
 #endif
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <dm.h>
 #include <env.h>
 #include <hang.h>
+#include <log.h>
 #include <malloc.h>
 #include <fs.h>
 #include <i2c.h>
 #include <mmc.h>
 #include <tpm-v1.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 #include <u-boot/sha1.h>
 #include <asm/byteorder.h>
diff --git a/board/gdsys/p1022/controlcenterd.c b/board/gdsys/p1022/controlcenterd.c
index 8e868165ed..73ce985d1a 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -24,7 +24,9 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -34,6 +36,7 @@
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
@@ -221,7 +224,7 @@ void hw_watchdog_reset(void)
 }
 
 #ifdef CONFIG_TRAILBLAZER
-int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return run_command(env_get("bootcmd"), flag);
 }
diff --git a/board/gdsys/p1022/ddr.c b/board/gdsys/p1022/ddr.c
index 591e08f037..eb06d22471 100644
--- a/board/gdsys/p1022/ddr.c
+++ b/board/gdsys/p1022/ddr.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/gdsys/p1022/diu.c b/board/gdsys/p1022/diu.c
index 7e1e6ce85c..9a5d3c11e1 100644
--- a/board/gdsys/p1022/diu.c
+++ b/board/gdsys/p1022/diu.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <command.h>
+#include <log.h>
 #include <linux/ctype.h>
 #include <asm/io.h>
 #include <stdio_dev.h>
diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c
index 69cd0a1bc7..edccfd03b3 100644
--- a/board/ge/bx50v3/bx50v3.c
+++ b/board/ge/bx50v3/bx50v3.c
@@ -5,12 +5,14 @@
  * Copyright 2012 Freescale Semiconductor, Inc.
  */
 
+#include <image.h>
 #include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/libfdt.h>
 #include <asm/gpio.h>
diff --git a/board/google/chromebook_coral/coral.c b/board/google/chromebook_coral/coral.c
index 4e34710b97..12d4fe63cb 100644
--- a/board/google/chromebook_coral/coral.c
+++ b/board/google/chromebook_coral/coral.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 
 int arch_misc_init(void)
 {
diff --git a/board/google/gru/gru.c b/board/google/gru/gru.c
index b6b4f19d84..7dfbc3ac86 100644
--- a/board/google/gru/gru.c
+++ b/board/google/gru/gru.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 
 #ifdef CONFIG_SPL_BUILD
 /* provided to defeat compiler optimisation in board_init_f() */
diff --git a/board/google/imx8mq_phanbell/Kconfig b/board/google/imx8mq_phanbell/Kconfig
new file mode 100644
index 0000000000..fba2e9ce67
--- /dev/null
+++ b/board/google/imx8mq_phanbell/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_IMX8MQ_PHANBELL
+
+config SYS_BOARD
+	default "imx8mq_phanbell"
+
+config SYS_VENDOR
+	default "google"
+
+config SYS_CONFIG_NAME
+	default "imx8mq_phanbell"
+
+endif
diff --git a/board/google/imx8mq_phanbell/MAINTAINERS b/board/google/imx8mq_phanbell/MAINTAINERS
new file mode 100644
index 0000000000..b233e6b57a
--- /dev/null
+++ b/board/google/imx8mq_phanbell/MAINTAINERS
@@ -0,0 +1,8 @@
+i.MX 8MQ PHANBELL BOARD
+M:	Fabio Estevam <festevam@gmail.com>
+M:	Marco Franchi <marcofrk@gmail.com>
+M:	Alifer Moraes <alifer.wsdm@gmail.com>
+S:	Maintained
+F:	board/google/imx8mq_phanbell/
+F:	include/configs/imx8mq_phanbell.h
+F:	configs/imx8mq_phanbell_defconfig
diff --git a/board/google/imx8mq_phanbell/Makefile b/board/google/imx8mq_phanbell/Makefile
new file mode 100644
index 0000000000..d6427cf8e9
--- /dev/null
+++ b/board/google/imx8mq_phanbell/Makefile
@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright 2020 NXP
+#
+
+obj-y += imx8mq_phanbell.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_1g.o
+endif
diff --git a/board/google/imx8mq_phanbell/README b/board/google/imx8mq_phanbell/README
new file mode 100644
index 0000000000..88a136b32c
--- /dev/null
+++ b/board/google/imx8mq_phanbell/README
@@ -0,0 +1,37 @@
+U-Boot for Google's i.MX8MQ Phanbell board
+
+Quick Start
+===========
+- Build the ARM Trusted firmware binary
+- Get ddr and hdmi firmware
+- Build U-Boot
+- Boot
+
+Get and Build the ARM Trusted firmware
+======================================
+Note: srctree is U-Boot source directory
+Get ATF from: https://source.codeaurora.org/external/imx/imx-atf
+branch: imx_4.19.35_1.0.0
+$ make PLAT=imx8mq bl31
+$ cp build/imx8mq/release/bl31.bin $(builddir)
+
+Get the ddr and hdmi firmware
+=============================
+$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin
+$ chmod +x firmware-imx-7.9.bin
+$ ./firmware-imx-7.9.bin
+$ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir)
+$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot
+============
+$ export CROSS_COMPILE=aarch64-linux-gnu-
+$ make imx8mq_phanbell_defconfig
+$ make flash.bin
+
+Burn the flash.bin to MicroSD card offset 33KB
+$sudo dd if=flash.bin of=/dev/sd[x] bs=1K seek=33
+
+Boot
+====
+Set Boot switch SW1: 1011 to boot from Micro SD.
diff --git a/board/google/imx8mq_phanbell/imx8mq_phanbell.c b/board/google/imx8mq_phanbell/imx8mq_phanbell.c
new file mode 100644
index 0000000000..c0cc3e9b71
--- /dev/null
+++ b/board/google/imx8mq_phanbell/imx8mq_phanbell.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <common.h>
+#include <env.h>
+#include <init.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm-generic/gpio.h>
+#include <fsl_esdhc_imx.h>
+#include <mmc.h>
+#include <asm/arch/imx8mq_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/arch/clock.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+	IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const uart_pads[] = {
+	IMX8MQ_PAD_UART1_RXD__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	IMX8MQ_PAD_UART1_TXD__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+int board_early_init_f(void)
+{
+	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+
+	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+	set_wdog_reset(wdog);
+
+	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	/* rom_pointer[1] contains the size of TEE occupies */
+	if (rom_pointer[1])
+		gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
+	else
+		gd->ram_size = PHYS_SDRAM_SIZE;
+
+	return 0;
+}
+
+#ifdef CONFIG_FEC_MXC
+static int setup_fec(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
+	clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0);
+	return set_clk_enet(ENET_125MHZ);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+	/* enable rgmii rxc skew and phy mode select to RGMII copper */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+#ifdef CONFIG_FEC_MXC
+	setup_fec();
+#endif
+
+	return 0;
+}
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
diff --git a/board/google/imx8mq_phanbell/lpddr4_timing_1g.c b/board/google/imx8mq_phanbell/lpddr4_timing_1g.c
new file mode 100644
index 0000000000..7800011a04
--- /dev/null
+++ b/board/google/imx8mq_phanbell/lpddr4_timing_1g.c
@@ -0,0 +1,1731 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
+ */
+
+#include <linux/kernel.h>
+#include <asm/arch/ddr.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{0x3d400304, 0x1},
+	{0x3d400030, 0x1},
+	{0x3d400000, 0xa1080020},
+	{0x3d400028, 0x0},
+	{0x3d400020, 0x203},
+	{0x3d400024, 0x3e800},
+	{0x3d400064, 0x610090},
+	{0x3d4000d0, 0xc003061c},
+	{0x3d4000d4, 0x9e0000},
+	{0x3d4000dc, 0xd4002d},
+	{0x3d4000e0, 0x310008},
+	{0x3d4000e8, 0x66004a},
+	{0x3d4000ec, 0x16004a},
+	{0x3d400100, 0x1a201b22},
+	{0x3d400104, 0x60633},
+	{0x3d40010c, 0xc0c000},
+	{0x3d400110, 0xf04080f},
+	{0x3d400114, 0x2040c0c},
+	{0x3d400118, 0x1010007},
+	{0x3d40011c, 0x401},
+	{0x3d400130, 0x20600},
+	{0x3d400134, 0xc100002},
+	{0x3d400138, 0x96},
+	{0x3d400144, 0xa00050},
+	{0x3d400180, 0xc3200018},
+	{0x3d400184, 0x28061a8},
+	{0x3d400188, 0x0},
+	{0x3d400190, 0x497820a},
+	{0x3d400194, 0x80303},
+	{0x3d4001a0, 0xe0400018},
+	{0x3d4001a4, 0xdf00e4},
+	{0x3d4001a8, 0x80000000},
+	{0x3d4001b0, 0x11},
+	{0x3d4001b4, 0x170a},
+	{0x3d4001c0, 0x1},
+	{0x3d4001c4, 0x1},
+	{0x3d4000f4, 0x639},
+	{0x3d400108, 0x70e1617},
+	{0x3d400200, 0x1f},
+	{0x3d40020c, 0x0},
+	{0x3d400210, 0x1f1f},
+	{0x3d400204, 0x80808},
+	{0x3d400214, 0x7070707},
+	{0x3d400218, 0xf070707},
+	{0x3d402020, 0x1},
+	{0x3d402024, 0xd0c0},
+	{0x3d402050, 0x20d040},
+	{0x3d402064, 0x14001f},
+	{0x3d4020dc, 0x940009},
+	{0x3d4020e0, 0x310000},
+	{0x3d4020e8, 0x66004a},
+	{0x3d4020ec, 0x16004a},
+	{0x3d402100, 0xb070508},
+	{0x3d402104, 0x3040b},
+	{0x3d402108, 0x305090c},
+	{0x3d40210c, 0x505000},
+	{0x3d402110, 0x4040204},
+	{0x3d402114, 0x2030303},
+	{0x3d402118, 0x1010004},
+	{0x3d40211c, 0x301},
+	{0x3d402130, 0x20300},
+	{0x3d402134, 0xa100002},
+	{0x3d402138, 0x20},
+	{0x3d402144, 0x220011},
+	{0x3d402180, 0xc0a70006},
+	{0x3d402190, 0x3858202},
+	{0x3d402194, 0x80303},
+	{0x3d4021b4, 0x502},
+	{0x3d400244, 0x0},
+	{0x3d400250, 0x29001505},
+	{0x3d400254, 0x2c},
+	{0x3d40025c, 0x5900575b},
+	{0x3d400264, 0x90000096},
+	{0x3d40026c, 0x1000012c},
+	{0x3d400300, 0x16},
+	{0x3d400304, 0x0},
+	{0x3d40030c, 0x0},
+	{0x3d400320, 0x1},
+	{0x3d40036c, 0x11},
+	{0x3d400400, 0x111},
+	{0x3d400404, 0x10f3},
+	{0x3d400408, 0x72ff},
+	{0x3d400490, 0x1},
+	{0x3d400494, 0xe00},
+	{0x3d400498, 0x62ffff},
+	{0x3d40049c, 0xe00},
+	{0x3d4004a0, 0xffff},
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{0x100a0, 0x0},
+	{0x100a1, 0x1},
+	{0x100a2, 0x2},
+	{0x100a3, 0x3},
+	{0x100a4, 0x4},
+	{0x100a5, 0x5},
+	{0x100a6, 0x6},
+	{0x100a7, 0x7},
+	{0x110a0, 0x0},
+	{0x110a1, 0x1},
+	{0x110a2, 0x2},
+	{0x110a3, 0x3},
+	{0x110a4, 0x4},
+	{0x110a5, 0x5},
+	{0x110a6, 0x6},
+	{0x110a7, 0x7},
+	{0x120a0, 0x0},
+	{0x120a1, 0x1},
+	{0x120a2, 0x2},
+	{0x120a3, 0x3},
+	{0x120a4, 0x4},
+	{0x120a5, 0x5},
+	{0x120a6, 0x6},
+	{0x120a7, 0x7},
+	{0x130a0, 0x0},
+	{0x130a1, 0x1},
+	{0x130a2, 0x2},
+	{0x130a3, 0x3},
+	{0x130a4, 0x4},
+	{0x130a5, 0x5},
+	{0x130a6, 0x6},
+	{0x130a7, 0x7},
+	{0x20110, 0x2},
+	{0x20111, 0x3},
+	{0x20112, 0x4},
+	{0x20113, 0x5},
+	{0x20114, 0x0},
+	{0x20115, 0x1},
+	{0x1005f, 0x1ff},
+	{0x1015f, 0x1ff},
+	{0x1105f, 0x1ff},
+	{0x1115f, 0x1ff},
+	{0x1205f, 0x1ff},
+	{0x1215f, 0x1ff},
+	{0x1305f, 0x1ff},
+	{0x1315f, 0x1ff},
+	{0x11005f, 0x1ff},
+	{0x11015f, 0x1ff},
+	{0x11105f, 0x1ff},
+	{0x11115f, 0x1ff},
+	{0x11205f, 0x1ff},
+	{0x11215f, 0x1ff},
+	{0x11305f, 0x1ff},
+	{0x11315f, 0x1ff},
+	{0x55, 0x1ff},
+	{0x1055, 0x1ff},
+	{0x2055, 0x1ff},
+	{0x3055, 0x1ff},
+	{0x4055, 0x1ff},
+	{0x5055, 0x1ff},
+	{0x6055, 0x1ff},
+	{0x7055, 0x1ff},
+	{0x8055, 0x1ff},
+	{0x9055, 0x1ff},
+	{0x200c5, 0x19},
+	{0x1200c5, 0x7},
+	{0x2002e, 0x2},
+	{0x12002e, 0x1},
+	{0x90204, 0x0},
+	{0x190204, 0x0},
+	{0x20024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x120024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x20056, 0x3},
+	{0x120056, 0xa},
+	{0x1004d, 0xe00},
+	{0x1014d, 0xe00},
+	{0x1104d, 0xe00},
+	{0x1114d, 0xe00},
+	{0x1204d, 0xe00},
+	{0x1214d, 0xe00},
+	{0x1304d, 0xe00},
+	{0x1314d, 0xe00},
+	{0x11004d, 0xe00},
+	{0x11014d, 0xe00},
+	{0x11104d, 0xe00},
+	{0x11114d, 0xe00},
+	{0x11204d, 0xe00},
+	{0x11214d, 0xe00},
+	{0x11304d, 0xe00},
+	{0x11314d, 0xe00},
+	{0x10049, 0xeba},
+	{0x10149, 0xeba},
+	{0x11049, 0xeba},
+	{0x11149, 0xeba},
+	{0x12049, 0xeba},
+	{0x12149, 0xeba},
+	{0x13049, 0xeba},
+	{0x13149, 0xeba},
+	{0x110049, 0xeba},
+	{0x110149, 0xeba},
+	{0x111049, 0xeba},
+	{0x111149, 0xeba},
+	{0x112049, 0xeba},
+	{0x112149, 0xeba},
+	{0x113049, 0xeba},
+	{0x113149, 0xeba},
+	{0x43, 0xe7},
+	{0x1043, 0xe7},
+	{0x2043, 0xe7},
+	{0x3043, 0xe7},
+	{0x4043, 0xe7},
+	{0x5043, 0xe7},
+	{0x6043, 0xe7},
+	{0x7043, 0xe7},
+	{0x8043, 0xe7},
+	{0x9043, 0xe7},
+	{0x20018, 0x3},
+	{0x20075, 0x4},
+	{0x20050, 0x0},
+	{0x20008, 0x320},
+	{0x120008, 0xa7},
+	{0x20088, 0x9},
+	{0x200b2, 0xdc},
+	{0x10043, 0x5a1},
+	{0x10143, 0x5a1},
+	{0x11043, 0x5a1},
+	{0x11143, 0x5a1},
+	{0x12043, 0x5a1},
+	{0x12143, 0x5a1},
+	{0x13043, 0x5a1},
+	{0x13143, 0x5a1},
+	{0x1200b2, 0xdc},
+	{0x110043, 0x5a1},
+	{0x110143, 0x5a1},
+	{0x111043, 0x5a1},
+	{0x111143, 0x5a1},
+	{0x112043, 0x5a1},
+	{0x112143, 0x5a1},
+	{0x113043, 0x5a1},
+	{0x113143, 0x5a1},
+	{0x200fa, 0x1},
+	{0x1200fa, 0x1},
+	{0x20019, 0x1},
+	{0x120019, 0x1},
+	{0x200f0, 0x0},
+	{0x200f1, 0x0},
+	{0x200f2, 0x4444},
+	{0x200f3, 0x8888},
+	{0x200f4, 0x5555},
+	{0x200f5, 0x0},
+	{0x200f6, 0x0},
+	{0x200f7, 0xf000},
+	{0x20025, 0x0},
+	{0x2002d, 0x0},
+	{0x12002d, 0x0},
+	{0x200c7, 0x80},
+	{0x1200c7, 0x80},
+	{0x200ca, 0x106},
+	{0x1200ca, 0x106},
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
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+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x131f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54002, 0x1},
+	{0x54003, 0x29c},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x121f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x994},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x994},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0x9400},
+	{0x54033, 0x3109},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0x9400},
+	{0x54039, 0x3109},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x61},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400f, 0x100},
+	{0x54010, 0x1f7f},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{0xd0000, 0x0},
+	{0x90000, 0x10},
+	{0x90001, 0x400},
+	{0x90002, 0x10e},
+	{0x90003, 0x0},
+	{0x90004, 0x0},
+	{0x90005, 0x8},
+	{0x90029, 0xb},
+	{0x9002a, 0x480},
+	{0x9002b, 0x109},
+	{0x9002c, 0x8},
+	{0x9002d, 0x448},
+	{0x9002e, 0x139},
+	{0x9002f, 0x8},
+	{0x90030, 0x478},
+	{0x90031, 0x109},
+	{0x90032, 0x0},
+	{0x90033, 0xe8},
+	{0x90034, 0x109},
+	{0x90035, 0x2},
+	{0x90036, 0x10},
+	{0x90037, 0x139},
+	{0x90038, 0xf},
+	{0x90039, 0x7c0},
+	{0x9003a, 0x139},
+	{0x9003b, 0x44},
+	{0x9003c, 0x630},
+	{0x9003d, 0x159},
+	{0x9003e, 0x14f},
+	{0x9003f, 0x630},
+	{0x90040, 0x159},
+	{0x90041, 0x47},
+	{0x90042, 0x630},
+	{0x90043, 0x149},
+	{0x90044, 0x4f},
+	{0x90045, 0x630},
+	{0x90046, 0x179},
+	{0x90047, 0x8},
+	{0x90048, 0xe0},
+	{0x90049, 0x109},
+	{0x9004a, 0x0},
+	{0x9004b, 0x7c8},
+	{0x9004c, 0x109},
+	{0x9004d, 0x0},
+	{0x9004e, 0x1},
+	{0x9004f, 0x8},
+	{0x90050, 0x0},
+	{0x90051, 0x45a},
+	{0x90052, 0x9},
+	{0x90053, 0x0},
+	{0x90054, 0x448},
+	{0x90055, 0x109},
+	{0x90056, 0x40},
+	{0x90057, 0x630},
+	{0x90058, 0x179},
+	{0x90059, 0x1},
+	{0x9005a, 0x618},
+	{0x9005b, 0x109},
+	{0x9005c, 0x40c0},
+	{0x9005d, 0x630},
+	{0x9005e, 0x149},
+	{0x9005f, 0x8},
+	{0x90060, 0x4},
+	{0x90061, 0x48},
+	{0x90062, 0x4040},
+	{0x90063, 0x630},
+	{0x90064, 0x149},
+	{0x90065, 0x0},
+	{0x90066, 0x4},
+	{0x90067, 0x48},
+	{0x90068, 0x40},
+	{0x90069, 0x630},
+	{0x9006a, 0x149},
+	{0x9006b, 0x10},
+	{0x9006c, 0x4},
+	{0x9006d, 0x18},
+	{0x9006e, 0x0},
+	{0x9006f, 0x4},
+	{0x90070, 0x78},
+	{0x90071, 0x549},
+	{0x90072, 0x630},
+	{0x90073, 0x159},
+	{0x90074, 0xd49},
+	{0x90075, 0x630},
+	{0x90076, 0x159},
+	{0x90077, 0x94a},
+	{0x90078, 0x630},
+	{0x90079, 0x159},
+	{0x9007a, 0x441},
+	{0x9007b, 0x630},
+	{0x9007c, 0x149},
+	{0x9007d, 0x42},
+	{0x9007e, 0x630},
+	{0x9007f, 0x149},
+	{0x90080, 0x1},
+	{0x90081, 0x630},
+	{0x90082, 0x149},
+	{0x90083, 0x0},
+	{0x90084, 0xe0},
+	{0x90085, 0x109},
+	{0x90086, 0xa},
+	{0x90087, 0x10},
+	{0x90088, 0x109},
+	{0x90089, 0x9},
+	{0x9008a, 0x3c0},
+	{0x9008b, 0x149},
+	{0x9008c, 0x9},
+	{0x9008d, 0x3c0},
+	{0x9008e, 0x159},
+	{0x9008f, 0x18},
+	{0x90090, 0x10},
+	{0x90091, 0x109},
+	{0x90092, 0x0},
+	{0x90093, 0x3c0},
+	{0x90094, 0x109},
+	{0x90095, 0x18},
+	{0x90096, 0x4},
+	{0x90097, 0x48},
+	{0x90098, 0x18},
+	{0x90099, 0x4},
+	{0x9009a, 0x58},
+	{0x9009b, 0xa},
+	{0x9009c, 0x10},
+	{0x9009d, 0x109},
+	{0x9009e, 0x2},
+	{0x9009f, 0x10},
+	{0x900a0, 0x109},
+	{0x900a1, 0x5},
+	{0x900a2, 0x7c0},
+	{0x900a3, 0x109},
+	{0x900a4, 0x10},
+	{0x900a5, 0x10},
+	{0x900a6, 0x109},
+	{0x40000, 0x811},
+	{0x40020, 0x880},
+	{0x40040, 0x0},
+	{0x40060, 0x0},
+	{0x40001, 0x4008},
+	{0x40021, 0x83},
+	{0x40041, 0x4f},
+	{0x40061, 0x0},
+	{0x40002, 0x4040},
+	{0x40022, 0x83},
+	{0x40042, 0x51},
+	{0x40062, 0x0},
+	{0x40003, 0x811},
+	{0x40023, 0x880},
+	{0x40043, 0x0},
+	{0x40063, 0x0},
+	{0x40004, 0x720},
+	{0x40024, 0xf},
+	{0x40044, 0x1740},
+	{0x40064, 0x0},
+	{0x40005, 0x16},
+	{0x40025, 0x83},
+	{0x40045, 0x4b},
+	{0x40065, 0x0},
+	{0x40006, 0x716},
+	{0x40026, 0xf},
+	{0x40046, 0x2001},
+	{0x40066, 0x0},
+	{0x40007, 0x716},
+	{0x40027, 0xf},
+	{0x40047, 0x2800},
+	{0x40067, 0x0},
+	{0x40008, 0x716},
+	{0x40028, 0xf},
+	{0x40048, 0xf00},
+	{0x40068, 0x0},
+	{0x40009, 0x720},
+	{0x40029, 0xf},
+	{0x40049, 0x1400},
+	{0x40069, 0x0},
+	{0x4000a, 0xe08},
+	{0x4002a, 0xc15},
+	{0x4004a, 0x0},
+	{0x4006a, 0x0},
+	{0x4000b, 0x623},
+	{0x4002b, 0x15},
+	{0x4004b, 0x0},
+	{0x4006b, 0x0},
+	{0x4000c, 0x4028},
+	{0x4002c, 0x80},
+	{0x4004c, 0x0},
+	{0x4006c, 0x0},
+	{0x4000d, 0xe08},
+	{0x4002d, 0xc1a},
+	{0x4004d, 0x0},
+	{0x4006d, 0x0},
+	{0x4000e, 0x623},
+	{0x4002e, 0x1a},
+	{0x4004e, 0x0},
+	{0x4006e, 0x0},
+	{0x4000f, 0x4040},
+	{0x4002f, 0x80},
+	{0x4004f, 0x0},
+	{0x4006f, 0x0},
+	{0x40010, 0x2604},
+	{0x40030, 0x15},
+	{0x40050, 0x0},
+	{0x40070, 0x0},
+	{0x40011, 0x708},
+	{0x40031, 0x5},
+	{0x40051, 0x0},
+	{0x40071, 0x2002},
+	{0x40012, 0x8},
+	{0x40032, 0x80},
+	{0x40052, 0x0},
+	{0x40072, 0x0},
+	{0x40013, 0x2604},
+	{0x40033, 0x1a},
+	{0x40053, 0x0},
+	{0x40073, 0x0},
+	{0x40014, 0x708},
+	{0x40034, 0xa},
+	{0x40054, 0x0},
+	{0x40074, 0x2002},
+	{0x40015, 0x4040},
+	{0x40035, 0x80},
+	{0x40055, 0x0},
+	{0x40075, 0x0},
+	{0x40016, 0x60a},
+	{0x40036, 0x15},
+	{0x40056, 0x1200},
+	{0x40076, 0x0},
+	{0x40017, 0x61a},
+	{0x40037, 0x15},
+	{0x40057, 0x1300},
+	{0x40077, 0x0},
+	{0x40018, 0x60a},
+	{0x40038, 0x1a},
+	{0x40058, 0x1200},
+	{0x40078, 0x0},
+	{0x40019, 0x642},
+	{0x40039, 0x1a},
+	{0x40059, 0x1300},
+	{0x40079, 0x0},
+	{0x4001a, 0x4808},
+	{0x4003a, 0x880},
+	{0x4005a, 0x0},
+	{0x4007a, 0x0},
+	{0x900a7, 0x0},
+	{0x900a8, 0x790},
+	{0x900a9, 0x11a},
+	{0x900aa, 0x8},
+	{0x900ab, 0x7aa},
+	{0x900ac, 0x2a},
+	{0x900ad, 0x10},
+	{0x900ae, 0x7b2},
+	{0x900af, 0x2a},
+	{0x900b0, 0x0},
+	{0x900b1, 0x7c8},
+	{0x900b2, 0x109},
+	{0x900b3, 0x10},
+	{0x900b4, 0x2a8},
+	{0x900b5, 0x129},
+	{0x900b6, 0x8},
+	{0x900b7, 0x370},
+	{0x900b8, 0x129},
+	{0x900b9, 0xa},
+	{0x900ba, 0x3c8},
+	{0x900bb, 0x1a9},
+	{0x900bc, 0xc},
+	{0x900bd, 0x408},
+	{0x900be, 0x199},
+	{0x900bf, 0x14},
+	{0x900c0, 0x790},
+	{0x900c1, 0x11a},
+	{0x900c2, 0x8},
+	{0x900c3, 0x4},
+	{0x900c4, 0x18},
+	{0x900c5, 0xe},
+	{0x900c6, 0x408},
+	{0x900c7, 0x199},
+	{0x900c8, 0x8},
+	{0x900c9, 0x8568},
+	{0x900ca, 0x108},
+	{0x900cb, 0x18},
+	{0x900cc, 0x790},
+	{0x900cd, 0x16a},
+	{0x900ce, 0x8},
+	{0x900cf, 0x1d8},
+	{0x900d0, 0x169},
+	{0x900d1, 0x10},
+	{0x900d2, 0x8558},
+	{0x900d3, 0x168},
+	{0x900d4, 0x70},
+	{0x900d5, 0x788},
+	{0x900d6, 0x16a},
+	{0x900d7, 0x1ff8},
+	{0x900d8, 0x85a8},
+	{0x900d9, 0x1e8},
+	{0x900da, 0x50},
+	{0x900db, 0x798},
+	{0x900dc, 0x16a},
+	{0x900dd, 0x60},
+	{0x900de, 0x7a0},
+	{0x900df, 0x16a},
+	{0x900e0, 0x8},
+	{0x900e1, 0x8310},
+	{0x900e2, 0x168},
+	{0x900e3, 0x8},
+	{0x900e4, 0xa310},
+	{0x900e5, 0x168},
+	{0x900e6, 0xa},
+	{0x900e7, 0x408},
+	{0x900e8, 0x169},
+	{0x900e9, 0x6e},
+	{0x900ea, 0x0},
+	{0x900eb, 0x68},
+	{0x900ec, 0x0},
+	{0x900ed, 0x408},
+	{0x900ee, 0x169},
+	{0x900ef, 0x0},
+	{0x900f0, 0x8310},
+	{0x900f1, 0x168},
+	{0x900f2, 0x0},
+	{0x900f3, 0xa310},
+	{0x900f4, 0x168},
+	{0x900f5, 0x1ff8},
+	{0x900f6, 0x85a8},
+	{0x900f7, 0x1e8},
+	{0x900f8, 0x68},
+	{0x900f9, 0x798},
+	{0x900fa, 0x16a},
+	{0x900fb, 0x78},
+	{0x900fc, 0x7a0},
+	{0x900fd, 0x16a},
+	{0x900fe, 0x68},
+	{0x900ff, 0x790},
+	{0x90100, 0x16a},
+	{0x90101, 0x8},
+	{0x90102, 0x8b10},
+	{0x90103, 0x168},
+	{0x90104, 0x8},
+	{0x90105, 0xab10},
+	{0x90106, 0x168},
+	{0x90107, 0xa},
+	{0x90108, 0x408},
+	{0x90109, 0x169},
+	{0x9010a, 0x58},
+	{0x9010b, 0x0},
+	{0x9010c, 0x68},
+	{0x9010d, 0x0},
+	{0x9010e, 0x408},
+	{0x9010f, 0x169},
+	{0x90110, 0x0},
+	{0x90111, 0x8b10},
+	{0x90112, 0x168},
+	{0x90113, 0x0},
+	{0x90114, 0xab10},
+	{0x90115, 0x168},
+	{0x90116, 0x0},
+	{0x90117, 0x1d8},
+	{0x90118, 0x169},
+	{0x90119, 0x80},
+	{0x9011a, 0x790},
+	{0x9011b, 0x16a},
+	{0x9011c, 0x18},
+	{0x9011d, 0x7aa},
+	{0x9011e, 0x6a},
+	{0x9011f, 0xa},
+	{0x90120, 0x0},
+	{0x90121, 0x1e9},
+	{0x90122, 0x8},
+	{0x90123, 0x8080},
+	{0x90124, 0x108},
+	{0x90125, 0xf},
+	{0x90126, 0x408},
+	{0x90127, 0x169},
+	{0x90128, 0xc},
+	{0x90129, 0x0},
+	{0x9012a, 0x68},
+	{0x9012b, 0x9},
+	{0x9012c, 0x0},
+	{0x9012d, 0x1a9},
+	{0x9012e, 0x0},
+	{0x9012f, 0x408},
+	{0x90130, 0x169},
+	{0x90131, 0x0},
+	{0x90132, 0x8080},
+	{0x90133, 0x108},
+	{0x90134, 0x8},
+	{0x90135, 0x7aa},
+	{0x90136, 0x6a},
+	{0x90137, 0x0},
+	{0x90138, 0x8568},
+	{0x90139, 0x108},
+	{0x9013a, 0xb7},
+	{0x9013b, 0x790},
+	{0x9013c, 0x16a},
+	{0x9013d, 0x1f},
+	{0x9013e, 0x0},
+	{0x9013f, 0x68},
+	{0x90140, 0x8},
+	{0x90141, 0x8558},
+	{0x90142, 0x168},
+	{0x90143, 0xf},
+	{0x90144, 0x408},
+	{0x90145, 0x169},
+	{0x90146, 0xc},
+	{0x90147, 0x0},
+	{0x90148, 0x68},
+	{0x90149, 0x0},
+	{0x9014a, 0x408},
+	{0x9014b, 0x169},
+	{0x9014c, 0x0},
+	{0x9014d, 0x8558},
+	{0x9014e, 0x168},
+	{0x9014f, 0x8},
+	{0x90150, 0x3c8},
+	{0x90151, 0x1a9},
+	{0x90152, 0x3},
+	{0x90153, 0x370},
+	{0x90154, 0x129},
+	{0x90155, 0x20},
+	{0x90156, 0x2aa},
+	{0x90157, 0x9},
+	{0x90158, 0x0},
+	{0x90159, 0x400},
+	{0x9015a, 0x10e},
+	{0x9015b, 0x8},
+	{0x9015c, 0xe8},
+	{0x9015d, 0x109},
+	{0x9015e, 0x0},
+	{0x9015f, 0x8140},
+	{0x90160, 0x10c},
+	{0x90161, 0x10},
+	{0x90162, 0x8138},
+	{0x90163, 0x10c},
+	{0x90164, 0x8},
+	{0x90165, 0x7c8},
+	{0x90166, 0x101},
+	{0x90167, 0x8},
+	{0x90168, 0x0},
+	{0x90169, 0x8},
+	{0x9016a, 0x8},
+	{0x9016b, 0x448},
+	{0x9016c, 0x109},
+	{0x9016d, 0xf},
+	{0x9016e, 0x7c0},
+	{0x9016f, 0x109},
+	{0x90170, 0x0},
+	{0x90171, 0xe8},
+	{0x90172, 0x109},
+	{0x90173, 0x47},
+	{0x90174, 0x630},
+	{0x90175, 0x109},
+	{0x90176, 0x8},
+	{0x90177, 0x618},
+	{0x90178, 0x109},
+	{0x90179, 0x8},
+	{0x9017a, 0xe0},
+	{0x9017b, 0x109},
+	{0x9017c, 0x0},
+	{0x9017d, 0x7c8},
+	{0x9017e, 0x109},
+	{0x9017f, 0x8},
+	{0x90180, 0x8140},
+	{0x90181, 0x10c},
+	{0x90182, 0x0},
+	{0x90183, 0x1},
+	{0x90184, 0x8},
+	{0x90185, 0x8},
+	{0x90186, 0x4},
+	{0x90187, 0x8},
+	{0x90188, 0x8},
+	{0x90189, 0x7c8},
+	{0x9018a, 0x101},
+	{0x90006, 0x0},
+	{0x90007, 0x0},
+	{0x90008, 0x8},
+	{0x90009, 0x0},
+	{0x9000a, 0x0},
+	{0x9000b, 0x0},
+	{0xd00e7, 0x400},
+	{0x90017, 0x0},
+	{0x9001f, 0x2a},
+	{0x90026, 0x6a},
+	{0x400d0, 0x0},
+	{0x400d1, 0x101},
+	{0x400d2, 0x105},
+	{0x400d3, 0x107},
+	{0x400d4, 0x10f},
+	{0x400d5, 0x202},
+	{0x400d6, 0x20a},
+	{0x400d7, 0x20b},
+	{0x2003a, 0x2},
+	{0x2000b, 0x64},
+	{0x2000c, 0xc8},
+	{0x2000d, 0x7d0},
+	{0x2000e, 0x2c},
+	{0x12000b, 0x14},
+	{0x12000c, 0x29},
+	{0x12000d, 0x1a1},
+	{0x12000e, 0x10},
+	{0x9000c, 0x0},
+	{0x9000d, 0x173},
+	{0x9000e, 0x60},
+	{0x9000f, 0x6110},
+	{0x90010, 0x2152},
+	{0x90011, 0xdfbd},
+	{0x90012, 0x60},
+	{0x90013, 0x6152},
+	{0x20010, 0x5a},
+	{0x20011, 0x3},
+	{0x120010, 0x5a},
+	{0x120011, 0x3},
+	{0x40080, 0xe0},
+	{0x40081, 0x12},
+	{0x40082, 0xe0},
+	{0x40083, 0x12},
+	{0x40084, 0xe0},
+	{0x40085, 0x12},
+	{0x140080, 0xe0},
+	{0x140081, 0x12},
+	{0x140082, 0xe0},
+	{0x140083, 0x12},
+	{0x140084, 0xe0},
+	{0x140085, 0x12},
+	{0x400fd, 0xf},
+	{0x10011, 0x1},
+	{0x10012, 0x1},
+	{0x10013, 0x180},
+	{0x10018, 0x1},
+	{0x10002, 0x6209},
+	{0x100b2, 0x1},
+	{0x101b4, 0x1},
+	{0x102b4, 0x1},
+	{0x103b4, 0x1},
+	{0x104b4, 0x1},
+	{0x105b4, 0x1},
+	{0x106b4, 0x1},
+	{0x107b4, 0x1},
+	{0x108b4, 0x1},
+	{0x11011, 0x1},
+	{0x11012, 0x1},
+	{0x11013, 0x180},
+	{0x11018, 0x1},
+	{0x11002, 0x6209},
+	{0x110b2, 0x1},
+	{0x111b4, 0x1},
+	{0x112b4, 0x1},
+	{0x113b4, 0x1},
+	{0x114b4, 0x1},
+	{0x115b4, 0x1},
+	{0x116b4, 0x1},
+	{0x117b4, 0x1},
+	{0x118b4, 0x1},
+	{0x12011, 0x1},
+	{0x12012, 0x1},
+	{0x12013, 0x180},
+	{0x12018, 0x1},
+	{0x12002, 0x6209},
+	{0x120b2, 0x1},
+	{0x121b4, 0x1},
+	{0x122b4, 0x1},
+	{0x123b4, 0x1},
+	{0x124b4, 0x1},
+	{0x125b4, 0x1},
+	{0x126b4, 0x1},
+	{0x127b4, 0x1},
+	{0x128b4, 0x1},
+	{0x13011, 0x1},
+	{0x13012, 0x1},
+	{0x13013, 0x180},
+	{0x13018, 0x1},
+	{0x13002, 0x6209},
+	{0x130b2, 0x1},
+	{0x131b4, 0x1},
+	{0x132b4, 0x1},
+	{0x133b4, 0x1},
+	{0x134b4, 0x1},
+	{0x135b4, 0x1},
+	{0x136b4, 0x1},
+	{0x137b4, 0x1},
+	{0x138b4, 0x1},
+	{0x2003a, 0x2},
+	{0xc0080, 0x2},
+	{0xd0000, 0x1}
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 3200mts 1D */
+		.drate = 3200,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 667mts 1D */
+		.drate = 667,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P0 3200mts 2D */
+		.drate = 3200,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3200, 667, },
+};
diff --git a/board/google/imx8mq_phanbell/spl.c b/board/google/imx8mq_phanbell/spl.c
new file mode 100644
index 0000000000..6f39599316
--- /dev/null
+++ b/board/google/imx8mq_phanbell/spl.c
@@ -0,0 +1,183 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ *
+ */
+
+#include <common.h>
+#include <hang.h>
+#include <asm/io.h>
+#include <errno.h>
+#include <init.h>
+#include <log.h>
+#include <asm/io.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/imx8mq_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/clock.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/sections.h>
+#include <linux/delay.h>
+#include <fsl_esdhc_imx.h>
+#include <mmc.h>
+#include <spl.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void spl_dram_init(void)
+{
+	/* ddr init */
+	ddr_init(&dram_timing);
+}
+
+#define USDHC2_CD_GPIO	IMX_GPIO_NR(2, 12)
+#define USDHC1_PWR_GPIO IMX_GPIO_NR(2, 10)
+#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19)
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int ret = 0;
+
+	switch (cfg->esdhc_base) {
+	case USDHC1_BASE_ADDR:
+		ret = 1;
+		break;
+	case USDHC2_BASE_ADDR:
+		ret = !gpio_get_value(USDHC2_CD_GPIO);
+		return ret;
+	}
+
+	return 1;
+}
+
+#define USDHC_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | \
+			 PAD_CTL_FSEL2)
+#define USDHC_GPIO_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_DSE1)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+	IMX8MQ_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA4__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA5__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA6__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA7__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_RESET_B__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+	IMX8MQ_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0xd6 */
+	IMX8MQ_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0xd6 */
+	IMX8MQ_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0xd6 */
+	IMX8MQ_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0xd6 */
+	IMX8MQ_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0x16 */
+	IMX8MQ_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), /* 0xd6 */
+	IMX8MQ_PAD_SD2_CD_B__GPIO2_IO12 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
+	IMX8MQ_PAD_SD2_RESET_B__GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
+};
+
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
+	{USDHC1_BASE_ADDR},
+	{USDHC2_BASE_ADDR},
+};
+
+int board_mmc_init(bd_t *bis)
+{
+	int i, ret;
+	/*
+	 * According to the board_mmc_init() the following map is done:
+	 * (U-Boot device node)    (Physical Port)
+	 * mmc0                    USDHC1
+	 * mmc1                    USDHC2
+	 */
+	for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
+		switch (i) {
+		case 0:
+			init_clk_usdhc(0);
+			usdhc_cfg[0].sdhc_clk = mxc_get_clock(USDHC1_CLK_ROOT);
+			usdhc_cfg[0].max_bus_width = 8;
+			imx_iomux_v3_setup_multiple_pads(usdhc1_pads,
+							 ARRAY_SIZE(usdhc1_pads));
+			gpio_request(USDHC1_PWR_GPIO, "usdhc1_reset");
+			gpio_direction_output(USDHC1_PWR_GPIO, 0);
+			udelay(500);
+			gpio_direction_output(USDHC1_PWR_GPIO, 1);
+			break;
+		case 1:
+			init_clk_usdhc(1);
+			usdhc_cfg[1].sdhc_clk = mxc_get_clock(USDHC2_CLK_ROOT);
+			usdhc_cfg[1].max_bus_width = 4;
+			imx_iomux_v3_setup_multiple_pads(usdhc2_pads,
+							 ARRAY_SIZE(usdhc2_pads));
+			gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset");
+			gpio_direction_output(USDHC2_PWR_GPIO, 0);
+			udelay(500);
+			gpio_direction_output(USDHC2_PWR_GPIO, 1);
+			break;
+		default:
+			printf("Warning: you configured more USDHC controllers(%d) than supported by the board\n", i + 1);
+			return -EINVAL;
+		}
+
+		ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+void spl_board_init(void)
+{
+	puts("Normal Boot\n");
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+	int ret;
+
+	/* Clear global data */
+	memset((void *)gd, 0, sizeof(gd_t));
+
+	arch_cpu_init();
+
+	init_uart_clk(0);
+
+	board_early_init_f();
+
+	timer_init();
+
+	preloader_console_init();
+
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	ret = spl_init();
+	if (ret) {
+		debug("spl_init() failed: %d\n", ret);
+		hang();
+	}
+
+	enable_tzc380();
+
+	/* DDR initialization */
+	spl_dram_init();
+
+	board_init_r(NULL, 0);
+}
diff --git a/board/google/veyron/veyron.c b/board/google/veyron/veyron.c
index 6b9c34818b..391d973c0b 100644
--- a/board/google/veyron/veyron.c
+++ b/board/google/veyron/veyron.c
@@ -6,8 +6,11 @@
 #include <clk.h>
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch-rockchip/clock.h>
 #include <dt-bindings/clock/rk3288-cru.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 
@@ -68,7 +71,7 @@ static int veyron_init(void)
 }
 #endif
 
-int board_early_init_f(void)
+int board_early_init_r(void)
 {
 	struct udevice *dev;
 	int ret;
diff --git a/board/grinn/chiliboard/board.c b/board/grinn/chiliboard/board.c
index 7f0de5e42b..8cc9278287 100644
--- a/board/grinn/chiliboard/board.c
+++ b/board/grinn/chiliboard/board.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/chilisom.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/grinn/liteboard/board.c b/board/grinn/liteboard/board.c
index 5d71b639df..df32e12037 100644
--- a/board/grinn/liteboard/board.c
+++ b/board/grinn/liteboard/board.c
@@ -4,6 +4,7 @@
  * Copyright (C) 2016 Grinn
  */
 
+#include <common.h>
 #include <command.h>
 #include <init.h>
 #include <asm/arch/clock.h>
diff --git a/board/gumstix/duovero/duovero.c b/board/gumstix/duovero/duovero.c
index 78fb98ef64..0df03a5a61 100644
--- a/board/gumstix/duovero/duovero.c
+++ b/board/gumstix/duovero/duovero.c
@@ -5,6 +5,8 @@
  * Maintainer: Ash Charles  <ash@gumstix.com>
  */
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mmc_host_def.h>
@@ -14,6 +16,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/gpio.h>
 #include <asm/mach-types.h>
+#include <linux/delay.h>
 
 #include "duovero_mux_data.h"
 
diff --git a/board/gumstix/pepper/board.c b/board/gumstix/pepper/board.c
index 65e5e1e60f..ebb5a560c3 100644
--- a/board/gumstix/pepper/board.c
+++ b/board/gumstix/pepper/board.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
diff --git a/board/highbank/ahci.c b/board/highbank/ahci.c
index 49cd117e3c..9c057278ac 100644
--- a/board/highbank/ahci.c
+++ b/board/highbank/ahci.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <ahci.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define CPHY_MAP(dev, addr) ((((dev) & 0x1f) << 7) | (((addr) >> 9) & 0x7f))
 #define CPHY_ADDR(base, dev, addr) ((base) | (((addr) & 0x1ff) << 2))
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 3e0edd48f5..063831dfe8 100644
--- a/board/highbank/highbank.c
+++ b/board/highbank/highbank.c
@@ -7,6 +7,9 @@
 #include <ahci.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <scsi.h>
 
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index 84400090b3..6eea939b91 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -7,12 +7,15 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <init.h>
+#include <log.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <errno.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <power/hi6553_pmic.h>
 #include <asm-generic/gpio.h>
 #include <asm/arch/dwmmc.h>
diff --git a/board/hisilicon/hikey960/hikey960.c b/board/hisilicon/hikey960/hikey960.c
index 84c26e0c14..db485db10a 100644
--- a/board/hisilicon/hikey960/hikey960.c
+++ b/board/hisilicon/hikey960/hikey960.c
@@ -8,11 +8,14 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/hi3660.h>
 #include <asm/armv8/mmu.h>
 #include <asm/psci.h>
 #include <linux/arm-smccc.h>
+#include <linux/delay.h>
 #include <linux/psci.h>
 
 #define PMIC_REG_TO_BUS_ADDR(x) (x << 2)
diff --git a/board/hisilicon/poplar/poplar.c b/board/hisilicon/poplar/poplar.c
index 4937dc374c..371c3c33fc 100644
--- a/board/hisilicon/poplar/poplar.c
+++ b/board/hisilicon/poplar/poplar.c
@@ -8,10 +8,13 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <init.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <dm/platform_data/serial_pl01x.h>
 #include <asm/arch/hi3798cv200.h>
 #include <asm/armv8/mmu.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/ids/ids8313/ids8313.c b/board/ids/ids8313/ids8313.c
index 6e74e939c3..d0d34012d7 100644
--- a/board/ids/ids8313/ids8313.c
+++ b/board/ids/ids8313/ids8313.c
@@ -16,6 +16,8 @@
 #include <init.h>
 #include <mpc83xx.h>
 #include <spi.h>
+#include <asm/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/imgtec/boston/checkboard.c b/board/imgtec/boston/checkboard.c
index 46ec1e8d9c..1b8a47d254 100644
--- a/board/imgtec/boston/checkboard.c
+++ b/board/imgtec/boston/checkboard.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 
 #include <asm/io.h>
 #include <asm/mipsregs.h>
diff --git a/board/imgtec/ci20/ci20.c b/board/imgtec/ci20/ci20.c
index 170ea12c93..5339b9e9f9 100644
--- a/board/imgtec/ci20/ci20.c
+++ b/board/imgtec/ci20/ci20.c
@@ -8,10 +8,13 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/jz4780.h>
 #include <mach/jz4780_dram.h>
 #include <mach/jz4780_gpio.h>
diff --git a/board/imgtec/malta/malta.c b/board/imgtec/malta/malta.c
index 77ce75ecf2..88a1a63bf4 100644
--- a/board/imgtec/malta/malta.c
+++ b/board/imgtec/malta/malta.c
@@ -7,11 +7,13 @@
 #include <common.h>
 #include <ide.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <pci.h>
 #include <pci_gt64120.h>
 #include <pci_msc01.h>
 #include <rtc.h>
+#include <linux/delay.h>
 
 #include <asm/addrspace.h>
 #include <asm/io.h>
diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c
index 86645155e6..0b68bbde50 100644
--- a/board/imgtec/xilfpga/xilfpga.c
+++ b/board/imgtec/xilfpga/xilfpga.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/intel/cougarcanyon2/cougarcanyon2.c b/board/intel/cougarcanyon2/cougarcanyon2.c
index 7aadd9e477..ce11eae59d 100644
--- a/board/intel/cougarcanyon2/cougarcanyon2.c
+++ b/board/intel/cougarcanyon2/cougarcanyon2.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <pci.h>
 #include <smsc_sio1007.h>
 #include <asm/ibmpc.h>
diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
index 57dce4185d..55095deead 100644
--- a/board/intel/crownbay/crownbay.c
+++ b/board/intel/crownbay/crownbay.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/ibmpc.h>
 #include <asm/pnp_def.h>
 #include <smsc_lpc47m.h>
diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig
index 543468cab5..82a6ca904e 100644
--- a/board/intel/minnowmax/Kconfig
+++ b/board/intel/minnowmax/Kconfig
@@ -21,6 +21,9 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select INTEL_BAYTRAIL
 	select BOARD_ROMSIZE_KB_8192
 	select SPI_FLASH_STMICRO
+	# Enable Winbond so we can use Dediprog em100pro emulator which does
+	# not support N25Q064
+	select SPI_FLASH_WINBOND
 
 config PCIE_ECAM_BASE
 	default 0xe0000000
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index e5fc939793..b02e3f0d4e 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
diff --git a/board/inversepath/usbarmory/usbarmory.c b/board/inversepath/usbarmory/usbarmory.c
index 4fa34e1b51..02a514809f 100644
--- a/board/inversepath/usbarmory/usbarmory.c
+++ b/board/inversepath/usbarmory/usbarmory.c
@@ -17,6 +17,7 @@
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux-mx53.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <i2c.h>
 #include <mmc.h>
diff --git a/board/iomega/iconnect/iconnect.c b/board/iomega/iconnect/iconnect.c
index fc7847bd1d..79c794bfc8 100644
--- a/board/iomega/iconnect/iconnect.c
+++ b/board/iomega/iconnect/iconnect.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
diff --git a/board/isee/igep003x/board.c b/board/isee/igep003x/board.c
index b0f8d8a314..a28d447825 100644
--- a/board/isee/igep003x/board.c
+++ b/board/isee/igep003x/board.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <serial.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
diff --git a/board/isee/igep00x0/common.c b/board/isee/igep00x0/common.c
index f5d62ffc2e..2c269773a8 100644
--- a/board/isee/igep00x0/common.c
+++ b/board/isee/igep00x0/common.c
@@ -7,6 +7,7 @@
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
 #include <jffs2/load_kernel.h>
+#include <linux/delay.h>
 #include <linux/mtd/rawnand.h>
 #include "igep00x0.h"
 
diff --git a/board/isee/igep00x0/igep00x0.c b/board/isee/igep00x0/igep00x0.c
index 1b871fdcc5..af0bce6426 100644
--- a/board/isee/igep00x0/igep00x0.c
+++ b/board/isee/igep00x0/igep00x0.c
@@ -5,7 +5,9 @@
  */
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <status_led.h>
 #include <dm.h>
 #include <ns16550.h>
@@ -18,6 +20,7 @@
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/mux.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/mtd/onenand.h>
diff --git a/board/k+p/kp_imx53/kp_id_rev.c b/board/k+p/kp_imx53/kp_id_rev.c
index 9dae54dda5..7103a3e0f2 100644
--- a/board/k+p/kp_imx53/kp_id_rev.c
+++ b/board/k+p/kp_imx53/kp_id_rev.c
@@ -13,6 +13,7 @@
 #include <env.h>
 #include <i2c.h>
 #include "kp_id_rev.h"
+#include <net.h>
 
 static int eeprom_has_been_read;
 static struct id_eeprom eeprom;
diff --git a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
index 25a5e4b9ba..75fb6acfb3 100644
--- a/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
+++ b/board/k+p/kp_imx6q_tpc/kp_imx6q_tpc_spl.c
@@ -6,6 +6,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
@@ -14,6 +16,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/keymile/Kconfig b/board/keymile/Kconfig
index 7f4cad86aa..e20c017436 100644
--- a/board/keymile/Kconfig
+++ b/board/keymile/Kconfig
@@ -28,7 +28,7 @@ config KM_PHRAM
 
 config KM_RESERVED_PRAM
 	hex "Reserved RAM"
-	default 0x801000 if KIRKWOOD
+	default 0x801000 if ARCH_KIRKWOOD
 	default 0x0 if MPC83xx
 	default 0x1000 if MPC85xx
 	depends on !ARCH_SOCFPGA
@@ -37,7 +37,7 @@ config KM_RESERVED_PRAM
 
 config KM_CRAMFS_ADDR
 	hex "CRAMFS Address"
-	default 0x2400000 if KIRKWOOD
+	default 0x2400000 if ARCH_KIRKWOOD
 	default 0xC00000 if MPC83xx
 	default 0x2000000 if MPC85xx
 	depends on !ARCH_SOCFPGA
@@ -46,7 +46,7 @@ config KM_CRAMFS_ADDR
 
 config KM_KERNEL_ADDR
 	hex "Kernel Load Address"
-	default 0x2000000 if KIRKWOOD
+	default 0x2000000 if ARCH_KIRKWOOD
 	default 0x400000 if MPC83xx
 	default 0x1000000 if MPC85xx || ARCH_SOCFPGA
 	help
@@ -54,7 +54,7 @@ config KM_KERNEL_ADDR
 
 config KM_FDT_ADDR
 	hex "FDT Load Address"
-	default 0x23E0000 if KIRKWOOD || ARCH_SOCFPGA
+	default 0x23E0000 if ARCH_KIRKWOOD || ARCH_SOCFPGA
 	default 0xB80000 if MPC83xx
 	default 0x1F80000 if MPC85xx
 	help
@@ -74,7 +74,7 @@ config KM_DEF_NETDEV
 
 config KM_COMMON_ETH_INIT
 	bool "Common Ethernet Initialization"
-	default y if KIRKWOOD || MPC83xx
+	default y if ARCH_KIRKWOOD || MPC83xx
 	default n if MPC85xx || ARCH_SOCFPGA
 	help
 	  Use the Ethernet initialization implemented in common code, which
@@ -96,7 +96,7 @@ config KM_MVEXTSW_ADDR
 config KM_IVM_BUS
 	int "IVM I2C Bus"
 	default 0 if ARCH_SOCFPGA
-	default 1 if KIRKWOOD || MPC85xx
+	default 1 if ARCH_KIRKWOOD || MPC85xx
 	default 2 if MPC83xx
 	help
 	  Identifier number of I2C bus, where the inventory EEPROM is connected to.
diff --git a/board/keymile/common/common.c b/board/keymile/common/common.c
index 08f7f8d884..9c9e1598f8 100644
--- a/board/keymile/common/common.c
+++ b/board/keymile/common/common.c
@@ -17,6 +17,7 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_POST)
 #include "post.h"
@@ -157,8 +158,8 @@ int board_eth_init(bd_t *bis)
  * read out the board id and the hw key from the intventory EEPROM and set
  * this values as environment variables.
  */
-static int do_setboardid(cmd_tbl_t *cmdtp, int flag, int argc,
-				char *const argv[])
+static int do_setboardid(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	unsigned char buf[32];
 	char *p;
@@ -203,8 +204,8 @@ U_BOOT_CMD(km_setboardid, 1, 0, do_setboardid, "setboardid", "read out bid and "
  *				application and in the init scripts (?)
  *	return 0 in case of match, 1 if not match or error
  */
-static int do_checkboardidhwk(cmd_tbl_t *cmdtp, int flag, int argc,
-			char *const argv[])
+static int do_checkboardidhwk(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	unsigned long ivmbid = 0, ivmhwkey = 0;
 	unsigned long envbid = 0, envhwkey = 0;
@@ -344,8 +345,8 @@ U_BOOT_CMD(km_checkbidhwk, 2, 0, do_checkboardidhwk,
  *  if the testpin of the board is asserted, return 1
  *  *	else return 0
  */
-static int do_checktestboot(cmd_tbl_t *cmdtp, int flag, int argc,
-			char *const argv[])
+static int do_checktestboot(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	int testpin = 0;
 	char *s = NULL;
diff --git a/board/keymile/common/qrio.c b/board/keymile/common/qrio.c
index 0cb33663aa..06a4e67881 100644
--- a/board/keymile/common/qrio.c
+++ b/board/keymile/common/qrio.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <linux/bitops.h>
 
 #include "common.h"
 #include "qrio.h"
diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig
index 1011cc8b2c..94075ce70f 100644
--- a/board/keymile/km83xx/Kconfig
+++ b/board/keymile/km83xx/Kconfig
@@ -57,25 +57,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 
 endif
 
-if TARGET_SUVD3
-
-config SYS_BOARD
-	default "km83xx"
-
-config SYS_VENDOR
-	default "keymile"
-
-config SYS_CONFIG_NAME
-	default "suvd3"
-
-config BOARD_SPECIFIC_OPTIONS # dummy
-	def_bool y
-	select ARCH_MPC832X
-	imply CMD_CRAMFS
-	imply FS_CRAMFS
-
-endif
-
 if TARGET_TUXX1
 
 config SYS_BOARD
diff --git a/board/keymile/km83xx/MAINTAINERS b/board/keymile/km83xx/MAINTAINERS
index d2af983073..177c2c4970 100644
--- a/board/keymile/km83xx/MAINTAINERS
+++ b/board/keymile/km83xx/MAINTAINERS
@@ -8,9 +8,7 @@ F:	configs/kmeter1_defconfig
 F:	include/configs/tuxx1.h
 F:	configs/kmopti2_defconfig
 F:	configs/kmtepr2_defconfig
-F:	include/configs/suvd3.h
 F:	configs/kmtegr1_defconfig
-F:	configs/suvd3_defconfig
 F:	configs/tuge1_defconfig
 F:	configs/tuxx1_defconfig
 
diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c
index 23bbdcccac..75c558ad3c 100644
--- a/board/keymile/km83xx/km83xx.c
+++ b/board/keymile/km83xx/km83xx.c
@@ -18,6 +18,7 @@
 #include <fdt_support.h>
 #include <init.h>
 #include <ioports.h>
+#include <log.h>
 #include <mpc83xx.h>
 #include <i2c.h>
 #include <miiphy.h>
@@ -25,6 +26,7 @@
 #include <asm/mmu.h>
 #include <asm/processor.h>
 #include <pci.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <post.h>
 
@@ -98,27 +100,6 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
 	{0,  0, 0, 0, QE_IOP_TAB_END},
 };
 
-#if defined(CONFIG_SUVD3)
-const uint upma_table[] = {
-	0x1ffedc00, 0x0ffcdc80, 0x0ffcdc80, 0x0ffcdc04, /* Words 0 to 3 */
-	0x0ffcdc00, 0xffffcc00, 0xffffcc01, 0xfffffc01, /* Words 4 to 7 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 8 to 11 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 12 to 15 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 16 to 19 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 20 to 23 */
-	0x9cfffc00, 0x00fffc80, 0x00fffc80, 0x00fffc00, /* Words 24 to 27 */
-	0xffffec04, 0xffffec01, 0xfffffc01, 0xfffffc01, /* Words 28 to 31 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 32 to 35 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 36 to 39 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 40 to 43 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 44 to 47 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 48 to 51 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 52 to 55 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01, /* Words 56 to 59 */
-	0xfffffc01, 0xfffffc01, 0xfffffc01, 0xfffffc01  /* Words 60 to 63 */
-};
-#endif
-
 static int piggy_present(void)
 {
 	struct km_bec_fpga __iomem *base =
@@ -136,11 +117,6 @@ int board_early_init_r(void)
 {
 	struct km_bec_fpga *base =
 		(struct km_bec_fpga *)CONFIG_SYS_KMBEC_FPGA_BASE;
-#if defined(CONFIG_SUVD3)
-	immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	fsl_lbc_t *lbc = &immap->im_lbc;
-	u32 *mxmr = &lbc->mamr;
-#endif
 
 #if defined(CONFIG_ARCH_MPC8360)
 	unsigned short	svid;
@@ -176,12 +152,6 @@ int board_early_init_r(void)
 	/* enable Application Buffer */
 	setbits_8(&base->oprtl, OPRTL_XBUFENA);
 
-#if defined(CONFIG_SUVD3)
-	/* configure UPMA for APP1 */
-	upmconfig(UPMA, (uint *) upma_table,
-		sizeof(upma_table) / sizeof(uint));
-	out_be32(mxmr, CONFIG_SYS_MAMR);
-#endif
 	return 0;
 }
 
@@ -330,8 +300,12 @@ void post_word_store(ulong value)
 
 int arch_memory_test_prepare(u32 *vstart, u32 *size, phys_addr_t *phys_offset)
 {
-	*vstart = CONFIG_SYS_MEMTEST_START;
-	*size = CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START;
+	/*
+	 * These match CONFIG_SYS_MEMTEST_START and
+	 * (CONFIG_SYS_MEMTEST_END - CONFIG_SYS_MEMTEST_START)
+	 */
+	*vstart = 0x00100000;
+	*size = 0xe00000;
 	debug("arch_memory_test_prepare 0x%08X 0x%08X\n", *vstart, *size);
 
 	return 0;
diff --git a/board/keymile/km83xx/km83xx_i2c.c b/board/keymile/km83xx/km83xx_i2c.c
index 113ca70a1a..62100b1949 100644
--- a/board/keymile/km83xx/km83xx_i2c.c
+++ b/board/keymile/km83xx/km83xx_i2c.c
@@ -8,6 +8,7 @@
 #include <i2c.h>
 #include <asm/io.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include "../common/common.h"
 
 static void i2c_write_start_seq(void)
diff --git a/board/keymile/km_arm/fpga_config.c b/board/keymile/km_arm/fpga_config.c
index 8bb0470bc3..abb5b7d60d 100644
--- a/board/keymile/km_arm/fpga_config.c
+++ b/board/keymile/km_arm/fpga_config.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 
 /* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
diff --git a/board/keymile/kmp204x/ddr.c b/board/keymile/kmp204x/ddr.c
index ee2e3d6b9a..d9c9ddf2ba 100644
--- a/board/keymile/kmp204x/ddr.c
+++ b/board/keymile/kmp204x/ddr.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/keymile/kmp204x/eth.c b/board/keymile/kmp204x/eth.c
index 7499d2078b..8635a5448b 100644
--- a/board/keymile/kmp204x/eth.c
+++ b/board/keymile/kmp204x/eth.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <fm_eth.h>
 #include <fsl_mdio.h>
diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c
index 0a6cf1fd29..21afbc7f39 100644
--- a/board/keymile/kmp204x/kmp204x.c
+++ b/board/keymile/kmp204x/kmp204x.c
@@ -10,6 +10,7 @@
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c
index 15bbc810a1..87bf16886a 100644
--- a/board/keymile/kmp204x/pci.c
+++ b/board/keymile/kmp204x/pci.c
@@ -11,6 +11,7 @@
 #include <init.h>
 #include <pci.h>
 #include <asm/fsl_pci.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/fsl_serdes.h>
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 6ef960b06b..7bc66af193 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/kobol/helios4/helios4.c b/board/kobol/helios4/helios4.c
index 3c3592ecf5..97b152664a 100644
--- a/board/kobol/helios4/helios4.c
+++ b/board/kobol/helios4/helios4.c
@@ -6,7 +6,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/kosagi/novena/novena.c b/board/kosagi/novena/novena.c
index 4bec2be43f..b1939f8a56 100644
--- a/board/kosagi/novena/novena.c
+++ b/board/kosagi/novena/novena.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <eeprom.h>
 #include <init.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <ahci.h>
 #include <env.h>
diff --git a/board/kosagi/novena/novena_spl.c b/board/kosagi/novena/novena_spl.c
index bc52b91b2f..9926285675 100644
--- a/board/kosagi/novena/novena_spl.c
+++ b/board/kosagi/novena/novena_spl.c
@@ -23,6 +23,7 @@
 #include <mmc.h>
 #include <fsl_esdhc_imx.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/arch/mx6-ddr.h>
 
diff --git a/board/kosagi/novena/video.c b/board/kosagi/novena/video.c
index 7083b6e103..a96a877f5f 100644
--- a/board/kosagi/novena/video.c
+++ b/board/kosagi/novena/video.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/board/lego/ev3/legoev3.c b/board/lego/ev3/legoev3.c
index fa099e95f5..51b669a891 100644
--- a/board/lego/ev3/legoev3.c
+++ b/board/lego/ev3/legoev3.c
@@ -14,6 +14,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <spi.h>
 #include <spi_flash.h>
 #include <asm/arch/hardware.h>
diff --git a/board/lg/sniper/sniper.c b/board/lg/sniper/sniper.c
index b4205d6ed4..2825eccc03 100644
--- a/board/lg/sniper/sniper.c
+++ b/board/lg/sniper/sniper.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
 #include <linux/ctype.h>
 #include <linux/usb/musb.h>
 #include <asm/omap_musb.h>
diff --git a/board/liebherr/display5/display5.c b/board/liebherr/display5/display5.c
index 85ca777c1d..ec55fdf0aa 100644
--- a/board/liebherr/display5/display5.c
+++ b/board/liebherr/display5/display5.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -22,6 +25,7 @@
 #include <miiphy.h>
 #include <netdev.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 #include <dm.h>
 #include <dm/platform_data/serial_mxc.h>
diff --git a/board/liebherr/display5/spl.c b/board/liebherr/display5/spl.c
index 765463e370..ac4f23f4d6 100644
--- a/board/liebherr/display5/spl.c
+++ b/board/liebherr/display5/spl.c
@@ -7,8 +7,12 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <serial.h>
 #include <spl.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/board/liebherr/mccmon6/spl.c b/board/liebherr/mccmon6/spl.c
index 08d2b56d54..b234f06220 100644
--- a/board/liebherr/mccmon6/spl.c
+++ b/board/liebherr/mccmon6/spl.c
@@ -5,6 +5,8 @@
  *         Richard Hu <hakahu@gmail.com>
  */
 
+#include <image.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
@@ -20,6 +22,7 @@
 #include <asm/arch/sys_proto.h>
 #include <serial.h>
 #include <spl.h>
+#include <linux/delay.h>
 
 #include <asm/arch/mx6-ddr.h>
 /*
diff --git a/board/liebherr/xea/xea.c b/board/liebherr/xea/xea.c
index df5d316717..8159f3a2d9 100644
--- a/board/liebherr/xea/xea.c
+++ b/board/liebherr/xea/xea.c
@@ -14,12 +14,17 @@
  */
 
 #include <common.h>
+#include <fdt_support.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx28.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/logicpd/am3517evm/am3517evm.c b/board/logicpd/am3517evm/am3517evm.c
index 18f3c3f9d9..b25b02b641 100644
--- a/board/logicpd/am3517evm/am3517evm.c
+++ b/board/logicpd/am3517evm/am3517evm.c
@@ -12,6 +12,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <net.h>
 #include <ns16550.h>
 #include <serial.h>
 #include <asm/io.h>
diff --git a/board/logicpd/imx6/README b/board/logicpd/imx6/README
index 26d053a32c..19f79c5734 100644
--- a/board/logicpd/imx6/README
+++ b/board/logicpd/imx6/README
@@ -17,7 +17,7 @@ Building U-Boot for Logic PD Development Kit
 To build U-Boot for the Dual and Quad variants:
 
  make imx6q_logic_defconfig
- make u-boot.imx ARCH=arm CROSS_COMPILE=arm-linux-
+ make u-boot.imx CROSS_COMPILE=arm-linux-
 
 
 Flashing U-Boot into the SD card
diff --git a/board/logicpd/omap3som/omap3logic.c b/board/logicpd/omap3som/omap3logic.c
index 21d8a21010..496886fea2 100644
--- a/board/logicpd/omap3som/omap3logic.c
+++ b/board/logicpd/omap3som/omap3logic.c
@@ -13,8 +13,8 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <net.h>
 #include <ns16550.h>
-#include <netdev.h>
 #include <flash.h>
 #include <nand.h>
 #include <i2c.h>
@@ -58,6 +58,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG6	0x09030000
 #define LOGIC_MT28_OMAP35_ASYNC_GPMC_CONFIG7	0x00000C50
 
+#define CONFIG_SMC911X_BASE 0x08000000
+
 #ifdef CONFIG_SPL_OS_BOOT
 int spl_start_uboot(void)
 {
@@ -204,22 +206,6 @@ static void unlock_nand(void)
 	nand_unlock(mtd, 0, mtd->size, 0);
 }
 
-int board_late_init(void)
-{
-#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
-	unlock_nand();
-#endif
-	return 0;
-}
-#endif
-
-#if defined(CONFIG_MMC)
-void board_mmc_power_init(void)
-{
-	twl4030_power_mmc_init(0);
-}
-#endif
-
 #ifdef CONFIG_SMC911X
 /* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
 static const u32 gpmc_lan92xx_config[] = {
@@ -230,12 +216,25 @@ static const u32 gpmc_lan92xx_config[] = {
 	NET_LAN92XX_GPMC_CONFIG5,
 	NET_LAN92XX_GPMC_CONFIG6,
 };
+#endif
 
-int board_eth_init(bd_t *bis)
+int board_late_init(void)
 {
+#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
+	unlock_nand();
+#endif
+
+#ifdef CONFIG_SMC911X
 	enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
 			CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
+#endif
+	return 0;
+}
+#endif
 
-	return smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#if defined(CONFIG_MMC)
+void board_mmc_power_init(void)
+{
+	twl4030_power_mmc_init(0);
 }
 #endif
diff --git a/board/logicpd/zoom1/zoom1.c b/board/logicpd/zoom1/zoom1.c
index 6bfa41737f..53dc9762f8 100644
--- a/board/logicpd/zoom1/zoom1.c
+++ b/board/logicpd/zoom1/zoom1.c
@@ -16,6 +16,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <ns16550.h>
 #include <netdev.h>
 #include <twl4030.h>
diff --git a/board/maxbcm/maxbcm.c b/board/maxbcm/maxbcm.c
index 395904f8c8..3c6422214f 100644
--- a/board/maxbcm/maxbcm.c
+++ b/board/maxbcm/maxbcm.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/mediatek/mt7622/mt7622_rfb.c b/board/mediatek/mt7622/mt7622_rfb.c
index b9296bede2..6a5f936635 100644
--- a/board/mediatek/mt7622/mt7622_rfb.c
+++ b/board/mediatek/mt7622/mt7622_rfb.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <config.h>
+#include <env.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/mediatek/mt8512/mt8512.c b/board/mediatek/mt8512/mt8512.c
index 726111d7d3..4ad62b73a6 100644
--- a/board/mediatek/mt8512/mt8512.c
+++ b/board/mediatek/mt8512/mt8512.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <wdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/mediatek/mt8518/mt8518_ap1.c b/board/mediatek/mt8518/mt8518_ap1.c
index 2ac7c6cd18..c9acfcb1a5 100644
--- a/board/mediatek/mt8518/mt8518_ap1.c
+++ b/board/mediatek/mt8518/mt8518_ap1.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/menlo/m53menlo/m53menlo.c b/board/menlo/m53menlo/m53menlo.c
index 70a13aa17b..58a564ac31 100644
--- a/board/menlo/m53menlo/m53menlo.c
+++ b/board/menlo/m53menlo/m53menlo.c
@@ -26,6 +26,7 @@
 #include <gzip.h>
 #include <i2c.h>
 #include <ipu_pixfmt.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/fb.h>
 #include <mmc.h>
diff --git a/board/microchip/mpfs_icicle/mpfs_icicle.c b/board/microchip/mpfs_icicle/mpfs_icicle.c
index 0ef243186d..8381361ec3 100644
--- a/board/microchip/mpfs_icicle/mpfs_icicle.c
+++ b/board/microchip/mpfs_icicle/mpfs_icicle.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <asm/io.h>
 
 #define MPFS_SYSREG_SOFT_RESET	((unsigned int *)0x20002088)
diff --git a/board/microchip/pic32mzda/pic32mzda.c b/board/microchip/pic32mzda/pic32mzda.c
index aa8aab39ce..e7337deea7 100644
--- a/board/microchip/pic32mzda/pic32mzda.c
+++ b/board/microchip/pic32mzda/pic32mzda.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <clk.h>
+#include <init.h>
 #include <malloc.h>
 #include <dt-bindings/clock/microchip,clock.h>
 #include <mach/pic32.h>
diff --git a/board/mikrotik/crs305-1g-4s/MAINTAINERS b/board/mikrotik/crs305-1g-4s/MAINTAINERS
deleted file mode 100644
index 3823489600..0000000000
--- a/board/mikrotik/crs305-1g-4s/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@
-CRS305-1G-4S BOARD
-M:	Luka Kovacic <me@lukakovacic.xyz>
-S:	Maintained
-F:	board/mikrotik/crs305-1g-4s/
-F:	include/configs/crs305-1g-4s.h
-F:	configs/crs305-1g-4s_defconfig
-F:	arch/arm/dts/armada-xp-crs305-1g-4s.dts
diff --git a/board/mikrotik/crs305-1g-4s/.gitignore b/board/mikrotik/crs3xx-98dx3236/.gitignore
index 775b9346b8..775b9346b8 100644
--- a/board/mikrotik/crs305-1g-4s/.gitignore
+++ b/board/mikrotik/crs3xx-98dx3236/.gitignore
diff --git a/board/mikrotik/crs3xx-98dx3236/MAINTAINERS b/board/mikrotik/crs3xx-98dx3236/MAINTAINERS
new file mode 100644
index 0000000000..127e0eac60
--- /dev/null
+++ b/board/mikrotik/crs3xx-98dx3236/MAINTAINERS
@@ -0,0 +1,11 @@
+CRS3XX-98DX3236 BOARD
+M:	Luka Kovacic <luka.kovacic@sartura.hr>
+S:	Maintained
+F:	board/mikrotik/crs3xx-98dx3236/
+F:	include/configs/crs3xx-98dx3236.h
+
+CRS305-1G-4S BOARD
+M:	Luka Kovacic <luka.kovacic@sartura.hr>
+S:	Maintained
+F:	configs/crs305-1g-4s_defconfig
+F:	arch/arm/dts/armada-xp-crs305-1g-4s.dts
diff --git a/board/mikrotik/crs305-1g-4s/Makefile b/board/mikrotik/crs3xx-98dx3236/Makefile
index c03f534e48..0b2930d3e2 100644
--- a/board/mikrotik/crs305-1g-4s/Makefile
+++ b/board/mikrotik/crs3xx-98dx3236/Makefile
@@ -2,7 +2,7 @@
 #
 # Copyright (C) 2015 Stefan Roese <sr@denx.de>
 
-obj-y	:= crs305-1g-4s.o
+obj-y	:= crs3xx-98dx3236.o
 extra-y	:= kwbimage.cfg
 
 quiet_cmd_sed = SED     $@
diff --git a/board/mikrotik/crs305-1g-4s/README b/board/mikrotik/crs3xx-98dx3236/README
index f420aabfbf..952f774ab7 100644
--- a/board/mikrotik/crs305-1g-4s/README
+++ b/board/mikrotik/crs3xx-98dx3236/README
@@ -1,13 +1,13 @@
-MikroTik CRS305-1G-4S+IN
+MikroTik CRS3XX-98DX3236
 ========================
 
-CRS305-1G-4S+IN is a 4x SFP+ switch with a Gigabit Ethernet port for management.
-Specifications:
+CRS3XX-98DX3236 is a U-Boot port that supports a series of MikroTik switches
+based on the Marvell Prestera 98DX3236 switch with an integrated CPU.
+
+Common specifications:
  - Marvell Prestera 98DX3236 switch with an integrated ARMv7 CPU
  - 512 MB DDR3 RAM
  - UART @ 115200bps
- - 4x SFP+
- - Gigabit Ethernet (AR8033)
  - 16 MB SPI flash (Winbond 25Q128JVSM)
 
 Currently supported hardware:
@@ -15,7 +15,7 @@ Currently supported hardware:
  - SPI boot, environment and load kernel
 
 Planned:
- - Gigabit Ethernet support
+ - Gigabit Ethernet support (internal CPU <-> switch fabric connection)
 
 Getting binary.0
 ================
diff --git a/board/mikrotik/crs305-1g-4s/binary.0 b/board/mikrotik/crs3xx-98dx3236/binary.0
index 8dd687286a..8dd687286a 100644
--- a/board/mikrotik/crs305-1g-4s/binary.0
+++ b/board/mikrotik/crs3xx-98dx3236/binary.0
diff --git a/board/mikrotik/crs305-1g-4s/crs305-1g-4s.c b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c
index d1d1f40092..8b419ef6f7 100644
--- a/board/mikrotik/crs305-1g-4s/crs305-1g-4s.c
+++ b/board/mikrotik/crs3xx-98dx3236/crs3xx-98dx3236.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <init.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <linux/mbus.h>
 #include <linux/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/mikrotik/crs305-1g-4s/kwbimage.cfg.in b/board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in
index 2dbbbd0246..9a58b33a6f 100644
--- a/board/mikrotik/crs305-1g-4s/kwbimage.cfg.in
+++ b/board/mikrotik/crs3xx-98dx3236/kwbimage.cfg.in
@@ -9,4 +9,4 @@ VERSION		1
 BOOT_FROM	spi
 
 # Binary Header (bin_hdr) with DDR3 training code
-BINARY board/mikrotik/crs305-1g-4s/binary.0 0000005b 00000068
+BINARY board/mikrotik/crs3xx-98dx3236/binary.0 0000005b 00000068
diff --git a/board/mpc8308_p1m/mpc8308_p1m.c b/board/mpc8308_p1m/mpc8308_p1m.c
index 5b2fd9c23f..601442055d 100644
--- a/board/mpc8308_p1m/mpc8308_p1m.c
+++ b/board/mpc8308_p1m/mpc8308_p1m.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <pci.h>
diff --git a/board/mscc/common/spi.c b/board/mscc/common/spi.c
index 0566fcba5c..45b9649336 100644
--- a/board/mscc/common/spi.c
+++ b/board/mscc/common/spi.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <spi.h>
+#include <linux/bitops.h>
 
 void external_cs_manage(struct udevice *dev, bool enable)
 {
diff --git a/board/mscc/jr2/jr2.c b/board/mscc/jr2/jr2.c
index 067907ba52..51700f4acf 100644
--- a/board/mscc/jr2/jr2.c
+++ b/board/mscc/jr2/jr2.c
@@ -4,10 +4,13 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
 #include <asm/io.h>
 #include <led.h>
 #include <miiphy.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 enum {
 	BOARD_TYPE_PCB110 = 0xAABBCE00,
diff --git a/board/mscc/luton/luton.c b/board/mscc/luton/luton.c
index e614058d10..acc26157c7 100644
--- a/board/mscc/luton/luton.c
+++ b/board/mscc/luton/luton.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
 #include <asm/io.h>
 #include <led.h>
diff --git a/board/mscc/ocelot/ocelot.c b/board/mscc/ocelot/ocelot.c
index ad227a4169..74e8bfc431 100644
--- a/board/mscc/ocelot/ocelot.c
+++ b/board/mscc/ocelot/ocelot.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
@@ -12,6 +14,7 @@
 #include <led.h>
 #include <wait_bit.h>
 #include <miiphy.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/mscc/serval/serval.c b/board/mscc/serval/serval.c
index 6c6dbf2bff..ed1aea55cc 100644
--- a/board/mscc/serval/serval.c
+++ b/board/mscc/serval/serval.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
 #include <asm/io.h>
 #include <led.h>
diff --git a/board/mscc/servalt/servalt.c b/board/mscc/servalt/servalt.c
index 71891f6fe3..d0e6016b9a 100644
--- a/board/mscc/servalt/servalt.c
+++ b/board/mscc/servalt/servalt.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <init.h>
 #include <asm/io.h>
 #include <led.h>
diff --git a/board/netgear/dgnd3700v2/dgnd3700v2.c b/board/netgear/dgnd3700v2/dgnd3700v2.c
index 6840a21001..cfc3529c34 100644
--- a/board/netgear/dgnd3700v2/dgnd3700v2.c
+++ b/board/netgear/dgnd3700v2/dgnd3700v2.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define GPIO_BASE_6362			0x10000080
 
diff --git a/board/nokia/rx51/MAINTAINERS b/board/nokia/rx51/MAINTAINERS
index 8bdddc1d83..58b16bf9a9 100644
--- a/board/nokia/rx51/MAINTAINERS
+++ b/board/nokia/rx51/MAINTAINERS
@@ -1,6 +1,8 @@
 RX51 BOARD
-M:	Pali Rohár <pali.rohar@gmail.com>
+M:	Pali Rohár <pali@kernel.org>
 S:	Maintained
 F:	board/nokia/rx51/
 F:	include/configs/nokia_rx51.h
 F:	configs/nokia_rx51_defconfig
+F:	doc/README.nokia_rx51
+F:	test/nokia_rx51_test.sh
diff --git a/board/nokia/rx51/lowlevel_init.S b/board/nokia/rx51/lowlevel_init.S
index 6871a5a74f..1466d976fc 100644
--- a/board/nokia/rx51/lowlevel_init.S
+++ b/board/nokia/rx51/lowlevel_init.S
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  */
 
 #include <config.h>
@@ -155,7 +155,14 @@ copy_code_end:
 	mov	pc, r2
 
 
-/* Copy u-boot to address CONFIG_SYS_TEXT_BASE */
+/*
+ * Copy u-boot to address CONFIG_SYS_TEXT_BASE
+ *
+ * Nokia X-Loader loading secondary image to address 0x80400000
+ * NOLO loading boot image to random place, so it doesn't really
+ * matter what is set in CONFIG_SYS_TEXT_BASE. We have to copy
+ * u-boot to CONFIG_SYS_TEXT_BASE address.
+ */
 
 copy_uboot_start:
 	/* r0 - start of u-boot before */
diff --git a/board/nokia/rx51/rx51.c b/board/nokia/rx51/rx51.c
index 71ca79deab..60a2e3619c 100644
--- a/board/nokia/rx51/rx51.c
+++ b/board/nokia/rx51/rx51.c
@@ -4,7 +4,7 @@
  * Ивайло Димитров <freemangordon@abv.bg>
  *
  * (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  *
  * (C) Copyright 2010
  * Alistair Buxton <a.j.buxton@gmail.com>
@@ -23,6 +23,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <watchdog.h>
 #include <malloc.h>
 #include <twl4030.h>
@@ -69,18 +70,12 @@ static struct tag_omap omap[] = {
 	OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
 	OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
 	OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
-	OMAP_TAG_PARTITION_CONFIG(PART1_NAME, PART1_SIZE * PART1_MULL,
-			PART1_OFFS, PART1_MASK),
-	OMAP_TAG_PARTITION_CONFIG(PART2_NAME, PART2_SIZE * PART2_MULL,
-			PART2_OFFS, PART2_MASK),
-	OMAP_TAG_PARTITION_CONFIG(PART3_NAME, PART3_SIZE * PART3_MULL,
-			PART3_OFFS, PART3_MASK),
-	OMAP_TAG_PARTITION_CONFIG(PART4_NAME, PART4_SIZE * PART4_MULL,
-			PART4_OFFS, PART4_MASK),
-	OMAP_TAG_PARTITION_CONFIG(PART5_NAME, PART5_SIZE * PART5_MULL,
-			PART5_OFFS, PART5_MASK),
-	OMAP_TAG_PARTITION_CONFIG(PART6_NAME, PART6_SIZE * PART6_MULL,
-			PART6_OFFS, PART6_MASK),
+	OMAP_TAG_PARTITION_CONFIG("bootloader", 128 * 1024, 0x00000000, 0x00000003),
+	OMAP_TAG_PARTITION_CONFIG("config", 384 * 1024, 0x00020000, 0x00000000),
+	OMAP_TAG_PARTITION_CONFIG("log", 256 * 1024, 0x00080000, 0x00000000),
+	OMAP_TAG_PARTITION_CONFIG("kernel", 2 * 1024*1024, 0x000c0000, 0x00000000),
+	OMAP_TAG_PARTITION_CONFIG("initfs", 2 * 1024*1024, 0x002c0000, 0x00000000),
+	OMAP_TAG_PARTITION_CONFIG("rootfs", 257280 * 1024, 0x004c0000, 0x00000000),
 	OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
 	OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
 	OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
@@ -93,6 +88,7 @@ static char *boot_reason_ptr;
 static char *hw_build_ptr;
 static char *nolo_version_ptr;
 static char *boot_mode_ptr;
+static int serial_was_console_enabled;
 
 /*
  * Routine: init_omap_tags
@@ -149,6 +145,13 @@ static void reuse_omap_atags(struct tag_omap *t)
 				strcpy(boot_mode_ptr, version);
 			}
 			break;
+		case OMAP_TAG_UART:
+			if (!t->u.uart.enabled_uarts)
+				serial_was_console_enabled = 1;
+			break;
+		case OMAP_TAG_SERIAL_CONSOLE:
+			serial_was_console_enabled = 1;
+			break;
 		default:
 			break;
 		}
@@ -239,10 +242,17 @@ void setup_board_tags(struct tag **in_params)
 		return;
 
 	str = env_get("setup_console_atag");
-	if (str && str[0] == '1')
-		setup_console_atag = 1;
-	else
-		setup_console_atag = 0;
+	if (str && str[0]) {
+		if (str[0] == '1')
+			setup_console_atag = 1;
+		else
+			setup_console_atag = 0;
+	} else {
+		if (serial_was_console_enabled)
+			setup_console_atag = 1;
+		else
+			setup_console_atag = 0;
+	}
 
 	setup_boot_reason_atag = env_get("setup_boot_reason_atag");
 	setup_boot_mode_atag = env_get("setup_boot_mode_atag");
diff --git a/board/nokia/rx51/rx51.h b/board/nokia/rx51/rx51.h
index fc336ee819..fa1b42bf21 100644
--- a/board/nokia/rx51/rx51.h
+++ b/board/nokia/rx51/rx51.h
@@ -4,7 +4,7 @@
  * Ивайло Димитров <freemangordon@abv.bg>
  *
  * (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  *
  * (C) Copyright 2008
  * Dirk Behme <dirk.behme@gmail.com>
diff --git a/board/nokia/rx51/tag_omap.h b/board/nokia/rx51/tag_omap.h
index c445aafde0..b99d6b7de1 100644
--- a/board/nokia/rx51/tag_omap.h
+++ b/board/nokia/rx51/tag_omap.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  *
  * (C) Copyright 2011
  * marcel@mesa.nl, Mesa Consulting B.V.
@@ -182,7 +182,7 @@ struct omap_em_asic_bb5_config {
  *  processing omap tag structures
  *
  *  Copyright (C) 2011  marcel@mesa.nl, Mesa Consulting B.V.
- *  Copyright (C) 2012  Pali Rohár <pali.rohar@gmail.com>
+ *  Copyright (C) 2012  Pali Rohár <pali@kernel.org>
  */
 
 /* TI OMAP specific information */
diff --git a/board/novtech/meerkat96/meerkat96.c b/board/novtech/meerkat96/meerkat96.c
index 5fb4d43997..b13e7ce3b1 100644
--- a/board/novtech/meerkat96/meerkat96.c
+++ b/board/novtech/meerkat96/meerkat96.c
@@ -4,6 +4,7 @@
  * Copyright (C) 2016 NXP Semiconductors
  */
 
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx7-pins.h>
diff --git a/board/nvidia/cardhu/cardhu.c b/board/nvidia/cardhu/cardhu.c
index 2ae64b1c33..6848e34004 100644
--- a/board/nvidia/cardhu/cardhu.c
+++ b/board/nvidia/cardhu/cardhu.c
@@ -6,10 +6,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/gp_padctrl.h>
 #include <asm/arch/gpio.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 #include "pinmux-config-cardhu.h"
 #include <i2c.h>
 
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index fcee21713f..72511e401e 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/gp_padctrl.h>
 #include "pinmux-config-dalmore.h"
diff --git a/board/nvidia/e2220-1170/e2220-1170.c b/board/nvidia/e2220-1170/e2220-1170.c
index 5aac0404bf..b819b049f4 100644
--- a/board/nvidia/e2220-1170/e2220-1170.c
+++ b/board/nvidia/e2220-1170/e2220-1170.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include "../p2571/max77620_init.h"
diff --git a/board/nvidia/jetson-tk1/jetson-tk1.c b/board/nvidia/jetson-tk1/jetson-tk1.c
index aed08b4232..9eccdc4a83 100644
--- a/board/nvidia/jetson-tk1/jetson-tk1.c
+++ b/board/nvidia/jetson-tk1/jetson-tk1.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <power/as3722.h>
 #include <power/pmic.h>
 
diff --git a/board/nvidia/nyan-big/nyan-big.c b/board/nvidia/nyan-big/nyan-big.c
index 3c7bfead24..71c71ed6ec 100644
--- a/board/nvidia/nyan-big/nyan-big.c
+++ b/board/nvidia/nyan-big/nyan-big.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/pinmux.h>
@@ -14,6 +15,7 @@
 #include <asm/arch/mc.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <asm/arch-tegra/pmc.h>
+#include <linux/delay.h>
 #include <power/as3722.h>
 #include <power/pmic.h>
 #include "pinmux-config-nyan-big.h"
diff --git a/board/nvidia/p2371-0000/p2371-0000.c b/board/nvidia/p2371-0000/p2371-0000.c
index 5aac0404bf..b819b049f4 100644
--- a/board/nvidia/p2371-0000/p2371-0000.c
+++ b/board/nvidia/p2371-0000/p2371-0000.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include "../p2571/max77620_init.h"
diff --git a/board/nvidia/p2371-2180/p2371-2180.c b/board/nvidia/p2371-2180/p2371-2180.c
index 1756bbca98..4aeec473b1 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -8,6 +8,9 @@
 #include <env.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
+#include <net.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
diff --git a/board/nvidia/p2571/p2571.c b/board/nvidia/p2571/p2571.c
index a9e4d21e7b..a4c4259eea 100644
--- a/board/nvidia/p2571/p2571.c
+++ b/board/nvidia/p2571/p2571.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/gpio.h>
diff --git a/board/nvidia/p2771-0000/p2771-0000.c b/board/nvidia/p2771-0000/p2771-0000.c
index 63cdb3a604..3f0e594b9c 100644
--- a/board/nvidia/p2771-0000/p2771-0000.c
+++ b/board/nvidia/p2771-0000/p2771-0000.c
@@ -7,6 +7,8 @@
 #include <env.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
+#include <net.h>
 #include <linux/libfdt.h>
 #include <asm/arch-tegra/cboot.h>
 #include "../p2571/max77620_init.h"
diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c
index f4212ab822..45f9bacc71 100644
--- a/board/nvidia/p3450-0000/p3450-0000.c
+++ b/board/nvidia/p3450-0000/p3450-0000.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <pca953x.h>
 #include <asm/arch-tegra/cboot.h>
diff --git a/board/nvidia/venice2/as3722_init.c b/board/nvidia/venice2/as3722_init.c
index 5ebd6a0c09..ba676547d3 100644
--- a/board/nvidia/venice2/as3722_init.c
+++ b/board/nvidia/venice2/as3722_init.c
@@ -5,8 +5,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
 #include "as3722_init.h"
 
 /* AS3722-PMIC-specific early init code - get CPU rails up, etc */
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
index f1d7cb8c93..808d221036 100644
--- a/board/olimex/mx23_olinuxino/mx23_olinuxino.c
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/iomux-mx23.h>
@@ -15,6 +16,7 @@
 #ifdef CONFIG_LED_STATUS
 #include <status_led.h>
 #endif
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/overo/overo.c b/board/overo/overo.c
index baa7997477..5450f5d11c 100644
--- a/board/overo/overo.c
+++ b/board/overo/overo.c
@@ -14,10 +14,13 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <ns16550.h>
 #include <netdev.h>
 #include <twl4030.h>
+#include <linux/delay.h>
 #include <linux/mtd/rawnand.h>
 #include <asm/io.h>
 #include <asm/arch/mmc_host_def.h>
diff --git a/board/overo/spl.c b/board/overo/spl.c
index d577e00fbc..91d8091d25 100644
--- a/board/overo/spl.c
+++ b/board/overo/spl.c
@@ -11,6 +11,8 @@
  * (C) Copyright 2004-2008
  * Texas Instruments, <www.ti.com>
  */
+
+#include <common.h>
 #include <asm/io.h>
 #include <asm/arch/mem.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c
index a9aae7951d..a93848666f 100644
--- a/board/pandora/pandora.c
+++ b/board/pandora/pandora.c
@@ -14,6 +14,7 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <ns16550.h>
 #include <twl4030.h>
 #include <asm/io.h>
@@ -23,6 +24,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-types.h>
+#include <linux/delay.h>
 #include "pandora.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/phytec/pcl063/spl.c b/board/phytec/pcl063/spl.c
index b5e080c072..48cb2e267c 100644
--- a/board/phytec/pcl063/spl.c
+++ b/board/phytec/pcl063/spl.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 43f6c5afcb..6f1ada82c4 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -11,6 +11,8 @@
 #include <common.h>
 #include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/phytec/pcm052/pcm052.c b/board/phytec/pcm052/pcm052.c
index c40dc052b5..b0c56a29f1 100644
--- a/board/phytec/pcm052/pcm052.c
+++ b/board/phytec/pcm052/pcm052.c
@@ -17,6 +17,7 @@
 #include <env.h>
 #include <led.h>
 #include <miiphy.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/phytec/pcm058/pcm058.c b/board/phytec/pcm058/pcm058.c
index 820b5fde14..096425c5df 100644
--- a/board/phytec/pcm058/pcm058.c
+++ b/board/phytec/pcm058/pcm058.c
@@ -11,6 +11,7 @@
  */
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -22,6 +23,7 @@
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/spi.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>
diff --git a/board/phytec/pfla02/pfla02.c b/board/phytec/pfla02/pfla02.c
index a3af823ef6..fed8f52e3e 100644
--- a/board/phytec/pfla02/pfla02.c
+++ b/board/phytec/pfla02/pfla02.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
@@ -18,6 +20,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/spi.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <mmc.h>
diff --git a/board/phytec/phycore_rk3288/phycore-rk3288.c b/board/phytec/phycore_rk3288/phycore-rk3288.c
index 039ed0f1bc..ecc73227a0 100644
--- a/board/phytec/phycore_rk3288/phycore-rk3288.c
+++ b/board/phytec/phycore_rk3288/phycore-rk3288.c
@@ -6,6 +6,8 @@
 
 #include <eeprom.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
@@ -14,6 +16,7 @@
 #include <i2c.h>
 #include <i2c_eeprom.h>
 #include <netdev.h>
+#include <linux/bitops.h>
 #include "som.h"
 #include <power/regulator.h>
 #include <power/rk8xx_pmic.h>
diff --git a/board/phytium/durian/durian.c b/board/phytium/durian/durian.c
index 40dd27a7b0..b80688ae86 100644
--- a/board/phytium/durian/durian.c
+++ b/board/phytium/durian/durian.c
@@ -6,8 +6,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <log.h>
 #include <asm/armv8/mmu.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <linux/arm-smccc.h>
diff --git a/board/pine64/pinebook-pro-rk3399/Kconfig b/board/pine64/pinebook-pro-rk3399/Kconfig
new file mode 100644
index 0000000000..3bb7ca448e
--- /dev/null
+++ b/board/pine64/pinebook-pro-rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_PINEBOOK_PRO_RK3399
+
+config SYS_BOARD
+	default "pinebook-pro-rk3399"
+
+config SYS_VENDOR
+	default "pine64"
+
+config SYS_CONFIG_NAME
+	default "pinebook-pro-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+
+endif
diff --git a/board/pine64/pinebook-pro-rk3399/MAINTAINERS b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
new file mode 100644
index 0000000000..227c1c0bea
--- /dev/null
+++ b/board/pine64/pinebook-pro-rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+PINEBOOK_PRO
+M:	Peter Robinson <pbrobinson@gmail.com>
+S:	Maintained
+F:	board/pine64/rk3399-pinebook-pro/
+F:	include/configs/rk3399-pinebook-pro.h
+F:	arch/arm/dts/rk3399-pinebook-pro.dts
+F:	arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+F:	configs/pinebook-pro-rk3399_defconfig
diff --git a/board/pine64/pinebook-pro-rk3399/Makefile b/board/pine64/pinebook-pro-rk3399/Makefile
new file mode 100644
index 0000000000..2f692a12a6
--- /dev/null
+++ b/board/pine64/pinebook-pro-rk3399/Makefile
@@ -0,0 +1 @@
+obj-y	+= pinebook-pro-rk3399.o
diff --git a/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
new file mode 100644
index 0000000000..516292aaa5
--- /dev/null
+++ b/board/pine64/pinebook-pro-rk3399/pinebook-pro-rk3399.c
@@ -0,0 +1,75 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * (C) Copyright 2020 Peter Robinson <pbrobinson at gmail.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/arch-rockchip/misc.h>
+#include <power/regulator.h>
+
+#define GRF_IO_VSEL_BT565_SHIFT 0
+#define PMUGRF_CON0_VSEL_SHIFT 8
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+	struct udevice *regulator;
+	int ret;
+
+	ret = regulator_get_by_platname("vcc5v0_usb", &regulator);
+	if (ret) {
+		pr_debug("%s vcc5v0_usb init fail! ret %d\n", __func__, ret);
+		goto out;
+	}
+
+	ret = regulator_set_enable(regulator, true);
+	if (ret)
+		pr_debug("%s vcc5v0-host-en-gpio set fail! ret %d\n", __func__, ret);
+
+out:
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_MISC_INIT_R
+static void setup_iodomain(void)
+{
+	struct rk3399_grf_regs *grf =
+	   syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	struct rk3399_pmugrf_regs *pmugrf =
+	   syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
+
+	/* BT565 is in 1.8v domain */
+	rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
+
+	/* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
+	rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
+}
+
+int misc_init_r(void)
+{
+	const u32 cpuid_offset = 0x7;
+	const u32 cpuid_length = 0x10;
+	u8 cpuid[cpuid_length];
+	int ret;
+
+	setup_iodomain();
+
+	ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
+	if (ret)
+		return ret;
+
+	ret = rockchip_cpuid_set(cpuid, cpuid_length);
+	if (ret)
+		return ret;
+
+	return ret;
+}
+#endif
diff --git a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
index 3f60235771..d79084614f 100644
--- a/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
+++ b/board/pine64/rockpro64_rk3399/rockpro64-rk3399.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/board/ppcag/bg0900/bg0900.c b/board/ppcag/bg0900/bg0900.c
index e3e8e74220..9150748654 100644
--- a/board/ppcag/bg0900/bg0900.c
+++ b/board/ppcag/bg0900/bg0900.c
@@ -6,12 +6,15 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx28.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/qca/ap121/ap121.c b/board/qca/ap121/ap121.c
index 24acdcb2e6..60a2e19143 100644
--- a/board/qca/ap121/ap121.c
+++ b/board/qca/ap121/ap121.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
diff --git a/board/qca/ap143/ap143.c b/board/qca/ap143/ap143.c
index 8ee26ababa..ac65054136 100644
--- a/board/qca/ap143/ap143.c
+++ b/board/qca/ap143/ap143.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
diff --git a/board/qca/ap152/ap152.c b/board/qca/ap152/ap152.c
index 30cd56563b..1064705d26 100644
--- a/board/qca/ap152/ap152.c
+++ b/board/qca/ap152/ap152.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c
index 414a9c001d..cf22ed5627 100644
--- a/board/qemu-mips/qemu-mips.c
+++ b/board/qemu-mips/qemu-mips.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <init.h>
+#include <net.h>
 #include <asm/mipsregs.h>
 #include <asm/io.h>
 #include <netdev.h>
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 81bd8bd95b..672bd465a5 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -10,11 +10,14 @@
 #include <dm.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <usb.h>
+#include <asm/cache.h>
 #include <asm/gpio.h>
 #include <fdt_support.h>
 #include <asm/arch/dram.h>
 #include <asm/arch/misc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/qualcomm/dragonboard820c/dragonboard820c.c b/board/qualcomm/dragonboard820c/dragonboard820c.c
index 6c096b49a1..c1ade5ce43 100644
--- a/board/qualcomm/dragonboard820c/dragonboard820c.c
+++ b/board/qualcomm/dragonboard820c/dragonboard820c.c
@@ -6,8 +6,10 @@
  */
 
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/arch/sysmap-apq8096.h>
 #include <env.h>
+#include <asm/cache.h>
 #include <linux/arm-smccc.h>
 #include <linux/psci.h>
 #include <common.h>
diff --git a/board/raidsonic/ib62x0/ib62x0.c b/board/raidsonic/ib62x0/ib62x0.c
index e8aae4cb81..db1b0adc38 100644
--- a/board/raidsonic/ib62x0/ib62x0.c
+++ b/board/raidsonic/ib62x0/ib62x0.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/raspberrypi/rpi/Kconfig b/board/raspberrypi/rpi/Kconfig
new file mode 100644
index 0000000000..e40088fde1
--- /dev/null
+++ b/board/raspberrypi/rpi/Kconfig
@@ -0,0 +1,10 @@
+if SYS_BOARD = "rpi"
+
+config RPI_EFI_NR_SPIN_PAGES
+	int "Spin table page count"
+	default 1
+	help
+	  Number of pages to reserve starting at page 0 for spin tables in the EFI
+	  memory map
+
+endif
diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c
index e367ba3092..45caa4d49e 100644
--- a/board/raspberrypi/rpi/rpi.c
+++ b/board/raspberrypi/rpi/rpi.c
@@ -489,7 +489,8 @@ int ft_board_setup(void *blob, bd_t *bd)
 
 #ifdef CONFIG_EFI_LOADER
 	/* Reserve the spin table */
-	efi_add_memory_map(0, 1, EFI_RESERVED_MEMORY_TYPE, 0);
+	efi_add_memory_map(0, CONFIG_RPI_EFI_NR_SPIN_PAGES << EFI_PAGE_SHIFT,
+			   EFI_RESERVED_MEMORY_TYPE);
 #endif
 
 	return 0;
diff --git a/board/renesas/MigoR/migo_r.c b/board/renesas/MigoR/migo_r.c
index 767c45cc9c..f8bdb4d48a 100644
--- a/board/renesas/MigoR/migo_r.c
+++ b/board/renesas/MigoR/migo_r.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/processor.h>
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index a6d7cb48a2..279ed48721 100644
--- a/board/renesas/alt/alt.c
+++ b/board/renesas/alt/alt.c
@@ -9,6 +9,7 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm.h>
 #include <dm/platform_data/serial_sh.h>
@@ -16,6 +17,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/alt/alt_spl.c b/board/renesas/alt/alt_spl.c
index dbb210584d..2de236fc29 100644
--- a/board/renesas/alt/alt_spl.c
+++ b/board/renesas/alt/alt_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/blanche/blanche.c b/board/renesas/blanche/blanche.c
index c15387366c..5fa10878d2 100644
--- a/board/renesas/blanche/blanche.c
+++ b/board/renesas/blanche/blanche.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <net.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/rcar-mstp.h>
 #include <asm/arch/rmobile.h>
@@ -22,6 +24,7 @@
 #include <env.h>
 #include <hang.h>
 #include <i2c.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <malloc.h>
 #include <miiphy.h>
diff --git a/board/renesas/condor/condor.c b/board/renesas/condor/condor.c
index 6505beda81..91afcdd85a 100644
--- a/board/renesas/condor/condor.c
+++ b/board/renesas/condor/condor.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
diff --git a/board/renesas/draak/draak.c b/board/renesas/draak/draak.c
index 2f9364c484..c8f4b214a2 100644
--- a/board/renesas/draak/draak.c
+++ b/board/renesas/draak/draak.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
@@ -16,6 +17,7 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c
index cf06a173e4..6228f22e01 100644
--- a/board/renesas/eagle/eagle.c
+++ b/board/renesas/eagle/eagle.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
diff --git a/board/renesas/ebisu/ebisu.c b/board/renesas/ebisu/ebisu.c
index 81d7f8eafa..d164a36361 100644
--- a/board/renesas/ebisu/ebisu.c
+++ b/board/renesas/ebisu/ebisu.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c
index eb6ee6f6a4..c6a93c25e6 100644
--- a/board/renesas/gose/gose.c
+++ b/board/renesas/gose/gose.c
@@ -9,6 +9,7 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm.h>
 #include <dm/platform_data/serial_sh.h>
@@ -16,6 +17,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/gose/gose_spl.c b/board/renesas/gose/gose_spl.c
index 42a6758148..624ba5db04 100644
--- a/board/renesas/gose/gose_spl.c
+++ b/board/renesas/gose/gose_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
index ba904609ae..b92e01ca98 100644
--- a/board/renesas/grpeach/grpeach.c
+++ b/board/renesas/grpeach/grpeach.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
 
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c
index e09d3d0a63..1b3acc8fd1 100644
--- a/board/renesas/koelsch/koelsch.c
+++ b/board/renesas/koelsch/koelsch.c
@@ -10,6 +10,7 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm.h>
 #include <dm/platform_data/serial_sh.h>
@@ -17,6 +18,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/koelsch/koelsch_spl.c b/board/renesas/koelsch/koelsch_spl.c
index b3530d7ce7..449bbfa7b8 100644
--- a/board/renesas/koelsch/koelsch_spl.c
+++ b/board/renesas/koelsch/koelsch_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c
index 9ac9515925..36a35a9a9c 100644
--- a/board/renesas/lager/lager.c
+++ b/board/renesas/lager/lager.c
@@ -12,6 +12,7 @@
 #include <env.h>
 #include <env_internal.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
@@ -19,6 +20,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/lager/lager_spl.c b/board/renesas/lager/lager_spl.c
index d7db361b12..1ca857c2c3 100644
--- a/board/renesas/lager/lager_spl.c
+++ b/board/renesas/lager/lager_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/porter/porter.c b/board/renesas/porter/porter.c
index 097710b479..793e02cb44 100644
--- a/board/renesas/porter/porter.c
+++ b/board/renesas/porter/porter.c
@@ -10,6 +10,7 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm.h>
 #include <dm/platform_data/serial_sh.h>
@@ -17,6 +18,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/porter/porter_spl.c b/board/renesas/porter/porter_spl.c
index 026220d9e2..f10c6cffc2 100644
--- a/board/renesas/porter/porter_spl.c
+++ b/board/renesas/porter/porter_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/r2dplus/r2dplus.c b/board/renesas/r2dplus/r2dplus.c
index f2da4686c3..0bbdb0e33a 100644
--- a/board/renesas/r2dplus/r2dplus.c
+++ b/board/renesas/r2dplus/r2dplus.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <ide.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/processor.h>
 #include <asm/io.h>
@@ -45,7 +46,9 @@ void ide_set_reset(int idereset)
 	}
 }
 
+#ifndef CONFIG_DM_ETH
 int board_eth_init(bd_t *bis)
 {
 	return pci_eth_init(bis);
 }
+#endif
diff --git a/board/renesas/r7780mp/r7780mp.c b/board/renesas/r7780mp/r7780mp.c
index 8dbeeb6e68..120464ced4 100644
--- a/board/renesas/r7780mp/r7780mp.c
+++ b/board/renesas/r7780mp/r7780mp.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <ide.h>
 #include <init.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/pci.h>
diff --git a/board/renesas/rcar-common/common.c b/board/renesas/rcar-common/common.c
index 37f8a46d7e..46dcea1f90 100644
--- a/board/renesas/rcar-common/common.c
+++ b/board/renesas/rcar-common/common.c
@@ -9,8 +9,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <dm/uclass-internal.h>
 #include <asm/arch/rmobile.h>
+#include <linux/libfdt.h>
 
 #ifdef CONFIG_RCAR_GEN3
 
@@ -19,32 +21,24 @@ DECLARE_GLOBAL_DATA_PTR;
 /* If the firmware passed a device tree use it for U-Boot DRAM setup. */
 extern u64 rcar_atf_boot_args[];
 
-int dram_init(void)
+int fdtdec_board_setup(const void *fdt_blob)
 {
-	const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
-	const void *blob;
+	void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
 
-	/* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
 	if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
-		blob = atf_fdt_blob;
-	else
-		blob = gd->fdt_blob;
+		fdt_overlay_apply_node((void *)fdt_blob, 0, atf_fdt_blob, 0);
 
-	return fdtdec_setup_mem_size_base_fdt(blob);
+	return 0;
 }
 
-int dram_init_banksize(void)
+int dram_init(void)
 {
-	const void *atf_fdt_blob = (const void *)(rcar_atf_boot_args[1]);
-	const void *blob;
-
-	/* Check if ATF passed us DTB. If not, fall back to builtin DTB. */
-	if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
-		blob = atf_fdt_blob;
-	else
-		blob = gd->fdt_blob;
+	return fdtdec_setup_mem_size_base_fdt(gd->fdt_blob);
+}
 
-	fdtdec_setup_memory_banksize_fdt(blob);
+int dram_init_banksize(void)
+{
+	fdtdec_setup_memory_banksize_fdt(gd->fdt_blob);
 
 	return 0;
 }
diff --git a/board/renesas/rcar-common/gen3-spl.c b/board/renesas/rcar-common/gen3-spl.c
index d9741c1939..fd6e5054a6 100644
--- a/board/renesas/rcar-common/gen3-spl.c
+++ b/board/renesas/rcar-common/gen3-spl.c
@@ -7,8 +7,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <spl.h>
+#include <linux/bitops.h>
 
 #define RCAR_CNTC_BASE	0xE6080000
 #define CNTCR_EN	BIT(0)
diff --git a/board/renesas/salvator-x/MAINTAINERS b/board/renesas/salvator-x/MAINTAINERS
index 542f7cc893..7335bc3cd8 100644
--- a/board/renesas/salvator-x/MAINTAINERS
+++ b/board/renesas/salvator-x/MAINTAINERS
@@ -3,6 +3,4 @@ M:	Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
 S:	Maintained
 F:	board/renesas/salvator-x/
 F:	include/configs/salvator-x.h
-F:	configs/r8a7795_salvator-x_defconfig
-F:	configs/r8a7796_salvator-x_defconfig
-F:	configs/r8a77965_salvator-x_defconfig
+F:	configs/rcar3_salvator-x_defconfig
diff --git a/board/renesas/salvator-x/salvator-x.c b/board/renesas/salvator-x/salvator-x.c
index 058fa6fbb6..947bdaefa8 100644
--- a/board/renesas/salvator-x/salvator-x.c
+++ b/board/renesas/salvator-x/salvator-x.c
@@ -9,6 +9,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <image.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
@@ -16,6 +18,7 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -93,11 +96,11 @@ int board_fit_config_name_match(const char *name)
 	u32 cpu_type = rmobile_get_cpu_type();
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
-	    !strcmp(name, "r8a7795-salvator-x-u-boot"))
+	    !strcmp(name, "r8a77950-salvator-x-u-boot"))
 		return 0;
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
-	    !strcmp(name, "r8a7796-salvator-x-u-boot"))
+	    !strcmp(name, "r8a77960-salvator-x-u-boot"))
 		return 0;
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
diff --git a/board/renesas/sh7752evb/sh7752evb.c b/board/renesas/sh7752evb/sh7752evb.c
index 203eecf3d6..a005029b61 100644
--- a/board/renesas/sh7752evb/sh7752evb.c
+++ b/board/renesas/sh7752evb/sh7752evb.c
@@ -4,14 +4,18 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
+#include <flash.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/mmc.h>
 #include <spi.h>
 #include <spi_flash.h>
+#include <linux/delay.h>
 
 int checkboard(void)
 {
@@ -243,7 +247,7 @@ int board_late_init(void)
 }
 
 #ifdef CONFIG_DEPRECATED
-int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_write_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i, ret;
 	char mac_string[256];
diff --git a/board/renesas/sh7753evb/sh7753evb.c b/board/renesas/sh7753evb/sh7753evb.c
index 0b118b2f65..3b4a3ce26a 100644
--- a/board/renesas/sh7753evb/sh7753evb.c
+++ b/board/renesas/sh7753evb/sh7753evb.c
@@ -4,14 +4,18 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
+#include <flash.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/mmc.h>
 #include <spi.h>
 #include <spi_flash.h>
+#include <linux/delay.h>
 
 int checkboard(void)
 {
@@ -259,7 +263,7 @@ int board_late_init(void)
 }
 
 #ifdef CONFIG_DEPRECATED
-int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_write_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i, ret;
 	char mac_string[256];
diff --git a/board/renesas/sh7757lcr/sh7757lcr.c b/board/renesas/sh7757lcr/sh7757lcr.c
index e8d1fdd03f..5e76b9e7b4 100644
--- a/board/renesas/sh7757lcr/sh7757lcr.c
+++ b/board/renesas/sh7757lcr/sh7757lcr.c
@@ -4,9 +4,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
+#include <flash.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/mmc.h>
@@ -342,7 +345,7 @@ int board_late_init(void)
 	return 0;
 }
 
-int do_sh_g200(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_sh_g200(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct gctrl_regs *gctrl = GCTRL_BASE;
 	unsigned long graofst;
@@ -361,7 +364,7 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_DEPRECATED
-int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_write_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i, ret;
 	char mac_string[256];
diff --git a/board/renesas/sh7763rdp/sh7763rdp.c b/board/renesas/sh7763rdp/sh7763rdp.c
index 9bc2c55986..73a53c1e5a 100644
--- a/board/renesas/sh7763rdp/sh7763rdp.c
+++ b/board/renesas/sh7763rdp/sh7763rdp.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 
diff --git a/board/renesas/silk/silk.c b/board/renesas/silk/silk.c
index e7cbd75776..171d06f317 100644
--- a/board/renesas/silk/silk.c
+++ b/board/renesas/silk/silk.c
@@ -10,6 +10,7 @@
 #include <cpu_func.h>
 #include <env.h>
 #include <hang.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm.h>
 #include <dm/platform_data/serial_sh.h>
@@ -17,6 +18,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/silk/silk_spl.c b/board/renesas/silk/silk_spl.c
index a2c397f935..f10f84a3cc 100644
--- a/board/renesas/silk/silk_spl.c
+++ b/board/renesas/silk/silk_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/stout/cpld.c b/board/renesas/stout/cpld.c
index e6c2051bd4..b56ed1703f 100644
--- a/board/renesas/stout/cpld.c
+++ b/board/renesas/stout/cpld.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
@@ -124,7 +125,8 @@ void cpld_init(void)
 #endif
 }
 
-static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	u32 addr, val;
 
diff --git a/board/renesas/stout/stout.c b/board/renesas/stout/stout.c
index 0a0ff5ff76..babcce9aa1 100644
--- a/board/renesas/stout/stout.c
+++ b/board/renesas/stout/stout.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
@@ -18,6 +19,8 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/stout/stout_spl.c b/board/renesas/stout/stout_spl.c
index 8d01efce56..57c1fabaf3 100644
--- a/board/renesas/stout/stout_spl.c
+++ b/board/renesas/stout/stout_spl.c
@@ -7,11 +7,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dm/platform_data/serial_sh.h>
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
diff --git a/board/renesas/ulcb/MAINTAINERS b/board/renesas/ulcb/MAINTAINERS
index 8549f543f4..564eb561b1 100644
--- a/board/renesas/ulcb/MAINTAINERS
+++ b/board/renesas/ulcb/MAINTAINERS
@@ -3,6 +3,4 @@ M:	Marek Vasut <marek.vasut+renesas@gmail.com>
 S:	Maintained
 F:	board/renesas/ulcb/
 F:	include/configs/ulcb.h
-F:	configs/r8a7795_ulcb_defconfig
-F:	configs/r8a7796_ulcb_defconfig
-F:	configs/r8a77965_ulcb_defconfig
+F:	configs/rcar3_ulcb_defconfig
diff --git a/board/renesas/ulcb/cpld.c b/board/renesas/ulcb/cpld.c
index 528675651d..a20a34a92a 100644
--- a/board/renesas/ulcb/cpld.c
+++ b/board/renesas/ulcb/cpld.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <dm.h>
@@ -82,7 +83,8 @@ static void cpld_write(struct udevice *dev, u8 addr, u32 data)
 	dm_gpio_set_value(&priv->sstbz, 1);
 }
 
-static int do_cpld(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_cpld(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	u32 addr, val;
diff --git a/board/renesas/ulcb/ulcb.c b/board/renesas/ulcb/ulcb.c
index bcae6ff67c..07bc1ec719 100644
--- a/board/renesas/ulcb/ulcb.c
+++ b/board/renesas/ulcb/ulcb.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <dm.h>
@@ -14,6 +16,7 @@
 #include <asm/processor.h>
 #include <asm/mach-types.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/gpio.h>
@@ -75,15 +78,15 @@ int board_fit_config_name_match(const char *name)
 	u32 cpu_type = rmobile_get_cpu_type();
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
-	    !strcmp(name, "r8a7795-h3ulcb-u-boot"))
+	    !strcmp(name, "r8a77950-ulcb-u-boot"))
 		return 0;
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
-	    !strcmp(name, "r8a7796-m3ulcb-u-boot"))
+	    !strcmp(name, "r8a77960-ulcb-u-boot"))
 		return 0;
 
 	if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
-	    !strcmp(name, "r8a77965-m3nulcb-u-boot"))
+	    !strcmp(name, "r8a77965-ulcb-u-boot"))
 		return 0;
 
 	return -1;
diff --git a/board/rockchip/evb_rk3229/README b/board/rockchip/evb_rk3229/README
index 93328c75b2..9068225e27 100644
--- a/board/rockchip/evb_rk3229/README
+++ b/board/rockchip/evb_rk3229/README
@@ -22,7 +22,6 @@ Compile the U-Boot
 
   > cd ../u-boot
   > export CROSS_COMPILE=arm-linux-gnueabihf-
-  > export ARCH=arm
   > make evb-rk3229_defconfig
   > make
   > make u-boot.itb
diff --git a/board/rockchip/evb_rk3328/MAINTAINERS b/board/rockchip/evb_rk3328/MAINTAINERS
index c661d2e06a..89becf41c5 100644
--- a/board/rockchip/evb_rk3328/MAINTAINERS
+++ b/board/rockchip/evb_rk3328/MAINTAINERS
@@ -5,6 +5,13 @@ F:      board/rockchip/evb_rk3328
 F:      include/configs/evb_rk3328.h
 F:      configs/evb-rk3328_defconfig
 
+ROC-RK3328-CC
+M:      Loic Devulder <ldevulder@suse.com>
+M:      Chen-Yu Tsai <wens@csie.org>
+S:      Maintained
+F:      configs/roc-cc-rk3328_defconfig
+F:      arch/arm/dts/rk3328-roc-cc-u-boot.dtsi
+
 ROCK64-RK3328
 M:      Matwey V. Kornilov <matwey.kornilov@gmail.com>
 S:      Maintained
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS b/board/rockchip/evb_rk3399/MAINTAINERS
index 0834254f6d..792df1087f 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -42,6 +42,13 @@ S:	Maintained
 F:	configs/nanopi-m4-rk3399_defconfig
 F:	arch/arm/dts/rk3399-nanopi-m4-u-boot.dtsi
 
+NANOPI-M4-2GB
+M:	Jagan Teki <jagan@amarulasolutions.com>
+M:	Deepak Das <deepakdas.linux@gmail.com>
+S:	Maintained
+F:	configs/nanopi-m4-2gb-rk3399_defconfig
+F:	arch/arm/dts/rk3399-nanopi-m4-2gb-u-boot.dtsi
+
 NANOPI-NEO4
 M:	Jagan Teki <jagan@amarulasolutions.com>
 S:	Maintained
diff --git a/board/rockchip/evb_rk3399/README b/board/rockchip/evb_rk3399/README
index da7ae89ab1..c6f58203eb 100644
--- a/board/rockchip/evb_rk3399/README
+++ b/board/rockchip/evb_rk3399/README
@@ -54,7 +54,6 @@ Compile U-Boot
 ==============
 
   > cd ../u-boot
-  > export ARCH=arm64
   > export CROSS_COMPILE=aarch64-linux-gnu-
   > make evb-rk3399_defconfig
   for firefly-rk3399, use below instead:
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c b/board/rockchip/evb_rk3399/evb-rk3399.c
index b9049abcc7..abb76585cf 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch-rockchip/periph.h>
 #include <power/regulator.h>
 
diff --git a/board/rockchip/evb_rv1108/evb_rv1108.c b/board/rockchip/evb_rv1108/evb_rv1108.c
index 5d622c3737..c57913828d 100644
--- a/board/rockchip/evb_rv1108/evb_rv1108.c
+++ b/board/rockchip/evb_rv1108/evb_rv1108.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/board/rockchip/kylin_rk3036/kylin_rk3036.c b/board/rockchip/kylin_rk3036/kylin_rk3036.c
index c5e28df258..0ca91cdeb0 100644
--- a/board/rockchip/kylin_rk3036/kylin_rk3036.c
+++ b/board/rockchip/kylin_rk3036/kylin_rk3036.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
 #include <init.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/uart.h>
diff --git a/board/rockchip/tinker_rk3288/tinker-rk3288.c b/board/rockchip/tinker_rk3288/tinker-rk3288.c
index 7af39e10cd..f85209c649 100644
--- a/board/rockchip/tinker_rk3288/tinker-rk3288.c
+++ b/board/rockchip/tinker_rk3288/tinker-rk3288.c
@@ -9,6 +9,7 @@
 #include <env.h>
 #include <i2c_eeprom.h>
 #include <init.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/io.h>
diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
index 9abad3f824..7a8e57b6cc 100644
--- a/board/samsung/arndale/arndale.c
+++ b/board/samsung/arndale/arndale.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <log.h>
 #include <usb.h>
 #include <asm/gpio.h>
 #include <asm/arch/pinmux.h>
diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c
index 390060e51f..029a0cc6cd 100644
--- a/board/samsung/common/board.c
+++ b/board/samsung/common/board.c
@@ -6,10 +6,13 @@
 
 #include <common.h>
 #include <cros_ec.h>
+#include <env.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <spi.h>
 #include <tmu.h>
 #include <netdev.h>
@@ -29,6 +32,7 @@
 #include <stdio_dev.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
+#include <linux/delay.h>
 #include <samsung/misc.h>
 #include <dm/pinctrl.h>
 #include <dm.h>
diff --git a/board/samsung/common/exynos5-dt-types.c b/board/samsung/common/exynos5-dt-types.c
index 1413dc8978..f1ecb7d2c3 100644
--- a/board/samsung/common/exynos5-dt-types.c
+++ b/board/samsung/common/exynos5-dt-types.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/s2mps11.h>
diff --git a/board/samsung/common/exynos5-dt.c b/board/samsung/common/exynos5-dt.c
index eef46b0dc4..69aa2120e1 100644
--- a/board/samsung/common/exynos5-dt.c
+++ b/board/samsung/common/exynos5-dt.c
@@ -8,6 +8,7 @@
 #include <dwc3-uboot.h>
 #include <env.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <i2c.h>
diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c
index 9117669f71..837463ba78 100644
--- a/board/samsung/common/misc.c
+++ b/board/samsung/common/misc.c
@@ -9,6 +9,7 @@
 #include <env.h>
 #include <lcd.h>
 #include <libtizen.h>
+#include <linux/delay.h>
 #include <samsung/misc.h>
 #include <errno.h>
 #include <version.h>
@@ -262,7 +263,7 @@ static int mode_leave_menu(int mode)
 	char *exit_option;
 	char *exit_reset = "reset";
 	char *exit_back = "back";
-	cmd_tbl_t *cmd;
+	struct cmd_tbl *cmd;
 	int cmd_result;
 	int leave;
 
diff --git a/board/samsung/goni/goni.c b/board/samsung/goni/goni.c
index 623e4abc21..40a94d547f 100644
--- a/board/samsung/goni/goni.c
+++ b/board/samsung/goni/goni.c
@@ -6,9 +6,12 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/arch/mmc.h>
 #include <dm.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <usb/dwc2_udc.h>
 #include <asm/arch/cpu.h>
diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c
index 9aa97f0f2c..7d7e722892 100644
--- a/board/samsung/odroid/odroid.c
+++ b/board/samsung/odroid/odroid.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/power.h>
 #include <asm/arch/clock.h>
diff --git a/board/samsung/smdkc100/smdkc100.c b/board/samsung/smdkc100/smdkc100.c
index a80300b0c0..fc2c2a94dc 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/sromc.h>
diff --git a/board/samsung/smdkv310/smdkv310.c b/board/samsung/smdkv310/smdkv310.c
index 05369d2227..0a5773676d 100644
--- a/board/samsung/smdkv310/smdkv310.c
+++ b/board/samsung/smdkv310/smdkv310.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <netdev.h>
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index ec85f707c1..2e80dbbc84 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <env.h>
 #include <lcd.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/cpu.h>
@@ -17,6 +18,7 @@
 #include <asm/arch/mipi_dsim.h>
 #include <asm/arch/watchdog.h>
 #include <asm/arch/power.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <usb/dwc2_udc.h>
 #include <power/max8997_pmic.h>
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 84ff936e4b..69e0ef192d 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -7,10 +7,12 @@
 
 #include <common.h>
 #include <lcd.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch/power.h>
 #include <asm/arch/mipi_dsim.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/max77686_pmic.h>
 #include <power/battery.h>
diff --git a/board/samsung/universal_c210/universal.c b/board/samsung/universal_c210/universal.c
index ed9c5b50d9..f50da6be72 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <spi.h>
 #include <lcd.h>
 #include <asm/io.h>
@@ -15,6 +16,7 @@
 #include <asm/arch/pinmux.h>
 #include <asm/arch/watchdog.h>
 #include <ld9040.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <usb.h>
 #include <usb/dwc2_udc.h>
diff --git a/board/sandisk/sansa_fuze_plus/sfp.c b/board/sandisk/sansa_fuze_plus/sfp.c
index 663eddac11..04f8678704 100644
--- a/board/sandisk/sansa_fuze_plus/sfp.c
+++ b/board/sandisk/sansa_fuze_plus/sfp.c
@@ -11,12 +11,15 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/iomux-mx23.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/sbc8349/pci.c b/board/sbc8349/pci.c
index b6435f34f2..26c4f24e4f 100644
--- a/board/sbc8349/pci.c
+++ b/board/sbc8349/pci.c
@@ -15,6 +15,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <asm/fsl_i2c.h>
+#include <linux/delay.h>
 
 static struct pci_region pci1_regions[] = {
 	{
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 9051392cd0..1e3529f334 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -9,8 +9,10 @@
 
 #include <common.h>
 #include <fdt_support.h>
+#include <init.h>
 #include <ioports.h>
 #include <mpc83xx.h>
+#include <asm/bitops.h>
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
 #include <spd_sdram.h>
@@ -18,6 +20,7 @@
 #if defined(CONFIG_OF_LIBFDT)
 #include <linux/libfdt.h>
 #endif
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/sbc8548/ddr.c b/board/sbc8548/ddr.c
index f7af1e3ded..61bc77c418 100644
--- a/board/sbc8548/ddr.c
+++ b/board/sbc8548/ddr.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index d246dce36d..24782c7e6d 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -11,6 +11,8 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
@@ -21,6 +23,7 @@
 #include <netdev.h>
 #include <tsec.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index d053eaeec3..3375cd621c 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -14,12 +14,14 @@
 #include <common.h>
 #include <command.h>
 #include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/processor.h>
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/fsl_serdes.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
@@ -49,7 +51,7 @@ int dram_init(void)
 	dram_size = fixed_sdram ();
 #endif
 
-	debug ("    DDR: ");
+	debug("    DDR: ");
 	gd->ram_size = dram_size;
 
 	return 0;
@@ -122,12 +124,12 @@ long int fixed_sdram (void)
 
 	asm ("sync;isync");
 
-	udelay (500);
+	udelay(500);
 
 	ddr->sdram_cfg = CONFIG_SYS_DDR_CFG_1B;
 	asm ("sync; isync");
 
-	udelay (500);
+	udelay(500);
 	ddr = &immap->im_ddr2;
 
 	ddr->cs0_bnds = CONFIG_SYS_DDR2_CS0_BNDS;
@@ -153,12 +155,12 @@ long int fixed_sdram (void)
 
 	asm ("sync;isync");
 
-	udelay (500);
+	udelay(500);
 
 	ddr->sdram_cfg = CONFIG_SYS_DDR2_CFG_1B;
 	asm ("sync; isync");
 
-	udelay (500);
+	udelay(500);
 #endif
 	return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 }
diff --git a/board/schulercontrol/sc_sps_1/sc_sps_1.c b/board/schulercontrol/sc_sps_1/sc_sps_1.c
index 41090dda10..d2c5f807ad 100644
--- a/board/schulercontrol/sc_sps_1/sc_sps_1.c
+++ b/board/schulercontrol/sc_sps_1/sc_sps_1.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/seco/mx6quq7/mx6quq7.c b/board/seco/mx6quq7/mx6quq7.c
index fabc348440..4fa0daba46 100644
--- a/board/seco/mx6quq7/mx6quq7.c
+++ b/board/seco/mx6quq7/mx6quq7.c
@@ -8,10 +8,12 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/seeed/linkit-smart-7688/board.c b/board/seeed/linkit-smart-7688/board.c
index d3d3d50c2c..bf7c69ea83 100644
--- a/board/seeed/linkit-smart-7688/board.c
+++ b/board/seeed/linkit-smart-7688/board.c
@@ -4,7 +4,9 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MT76XX_GPIO1_MODE	0x10000060
 
diff --git a/board/siemens/capricorn/board.c b/board/siemens/capricorn/board.c
index 00fd4b9658..c46e4ff736 100644
--- a/board/siemens/capricorn/board.c
+++ b/board/siemens/capricorn/board.c
@@ -6,8 +6,12 @@
  *
  */
 #include <common.h>
+#include <command.h>
 #include <dm.h>
+#include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <netdev.h>
 #include <env_internal.h>
 #include <fsl_esdhc_imx.h>
@@ -23,6 +27,7 @@
 #ifndef CONFIG_SPL
 #include <asm/arch-imx8/clock.h>
 #endif
+#include <linux/delay.h>
 #include "../common/factoryset.h"
 
 #define GPIO_PAD_CTRL \
@@ -410,7 +415,7 @@ unsigned char get_button_state(char * const envname, unsigned char def)
  *		0 if button is not held down
  */
 static int
-do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_userbutton(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int button = 0;
 
@@ -431,7 +436,7 @@ U_BOOT_CMD(
 #define ERST	IMX_GPIO_NR(0, 3)
 
 static int
-do_eth_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_eth_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	gpio_request(ERST, "ERST");
 	gpio_direction_output(ERST, 0);
diff --git a/board/siemens/capricorn/spl.c b/board/siemens/capricorn/spl.c
index 47fe86ccc0..8435bd3863 100644
--- a/board/siemens/capricorn/spl.c
+++ b/board/siemens/capricorn/spl.c
@@ -6,6 +6,7 @@
  *
  */
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <dm.h>
 #include <dm/uclass.h>
diff --git a/board/siemens/common/board.c b/board/siemens/common/board.c
index 24429d2837..e0bd8590bc 100644
--- a/board/siemens/common/board.c
+++ b/board/siemens/common/board.c
@@ -10,8 +10,10 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <errno.h>
+#include <init.h>
 #include <malloc.h>
 #include <serial.h>
 #include <spl.h>
@@ -150,7 +152,7 @@ unsigned char get_button_state(char * const envname, unsigned char def)
  *		0 if button is not held down
  */
 static int
-do_userbutton(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_userbutton(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int button = 0;
 	button = get_button_state("button_dfu0", BOARD_DFU_BUTTON_GPIO);
@@ -166,7 +168,7 @@ U_BOOT_CMD(
 #endif
 
 static int
-do_usertestwdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_usertestwdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	printf("\n\n\n Go into infinite loop\n\n\n");
 	while (1)
@@ -250,8 +252,8 @@ void set_env_gpios(unsigned char state)
 	} /* loop through defined led in environment */
 }
 
-static int do_board_led(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char *const argv[])
+static int do_board_led(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	if (argc != 2)
 		return CMD_RET_USAGE;
diff --git a/board/siemens/common/factoryset.c b/board/siemens/common/factoryset.c
index 0d3701c03c..2e3ae1a54d 100644
--- a/board/siemens/common/factoryset.c
+++ b/board/siemens/common/factoryset.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <env_internal.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
 #if !CONFIG_IS_ENABLED(TARGET_GIEDI) && !CONFIG_IS_ENABLED(TARGET_DENEB)
 #include <asm/arch/cpu.h>
diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c
index 03768201c3..28a974d978 100644
--- a/board/siemens/corvus/board.c
+++ b/board/siemens/corvus/board.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9g45_matrix.h>
 #include <asm/arch/at91sam9_smc.h>
diff --git a/board/siemens/draco/board.c b/board/siemens/draco/board.c
index 94bd71ad09..5ac73c0ef4 100644
--- a/board/siemens/draco/board.c
+++ b/board/siemens/draco/board.c
@@ -13,9 +13,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
@@ -33,6 +35,7 @@
 #include <miiphy.h>
 #include <cpsw.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 #include "board.h"
 #include "../common/factoryset.h"
 #include <nand.h>
@@ -342,8 +345,8 @@ int board_eth_init(bd_t *bis)
 	return n;
 }
 
-static int do_switch_reset(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char *const argv[])
+static int do_switch_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	/* Reset SMSC LAN9303 switch for default configuration */
 	gpio_request(GPIO_LAN9303_NRST, "nRST");
diff --git a/board/siemens/pxm2/board.c b/board/siemens/pxm2/board.c
index 58bb5bab1a..d86a913e5f 100644
--- a/board/siemens/pxm2/board.c
+++ b/board/siemens/pxm2/board.c
@@ -16,7 +16,9 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/siemens/rut/board.c b/board/siemens/rut/board.c
index bd4eaa4f3a..3b109e9818 100644
--- a/board/siemens/rut/board.c
+++ b/board/siemens/rut/board.c
@@ -15,6 +15,7 @@
 #include <errno.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <spi.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
@@ -33,6 +34,7 @@
 #include <cpsw.h>
 #include <video.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 #include "board.h"
 #include "../common/factoryset.h"
 #include "../../../drivers/video/da8xx-fb.h"
diff --git a/board/siemens/smartweb/smartweb.c b/board/siemens/smartweb/smartweb.c
index cb7206a561..40c9c7e21d 100644
--- a/board/siemens/smartweb/smartweb.c
+++ b/board/siemens/smartweb/smartweb.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9_sdramc.h>
 #include <asm/arch/at91sam9260_matrix.h>
diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c
index 0979df563a..927ef59650 100644
--- a/board/siemens/taurus/taurus.c
+++ b/board/siemens/taurus/taurus.c
@@ -15,6 +15,7 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <flash.h>
 #include <init.h>
 #include <asm/io.h>
 #include <asm/arch/at91sam9260_matrix.h>
@@ -385,8 +386,8 @@ static int upgrade_failure_fallback(void)
 	return 0;
 }
 
-static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_upgrade_available(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[])
 {
 	unsigned long upgrade_available = 0;
 	unsigned long boot_retry = 0;
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index 5ca21474de..75661f35f8 100644
--- a/board/sifive/fu540/Kconfig
+++ b/board/sifive/fu540/Kconfig
@@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	imply CMD_FS_GENERIC
 	imply CMD_NET
 	imply CMD_PING
+	imply CMD_SF
 	imply CLK_SIFIVE
 	imply CLK_SIFIVE_FU540_PRCI
 	imply DOS_PARTITION
@@ -40,6 +41,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	imply SIFIVE_SERIAL
 	imply SPI
 	imply SPI_SIFIVE
+	imply SPI_FLASH
+	imply SPI_FLASH_ISSI
 	imply MMC
 	imply MMC_SPI
 	imply MMC_BROKEN_CD
diff --git a/board/sifive/fu540/MAINTAINERS b/board/sifive/fu540/MAINTAINERS
index 702d803ad8..27620727bd 100644
--- a/board/sifive/fu540/MAINTAINERS
+++ b/board/sifive/fu540/MAINTAINERS
@@ -1,9 +1,10 @@
 SiFive FU540 BOARD
 M:	Paul Walmsley <paul.walmsley@sifive.com>
-M:	Palmer Dabbelt <palmer@sifive.com>
+M:	Palmer Dabbelt <palmer@dabbelt.com>
 M:	Anup Patel <anup.patel@wdc.com>
 M:	Atish Patra <atish.patra@wdc.com>
 S:	Maintained
 F:	board/sifive/fu540/
+F:	doc/board/sifive/fu540.rst
 F:	include/configs/sifive-fu540.h
 F:	configs/sifive_fu540_defconfig
diff --git a/board/sifive/fu540/fu540.c b/board/sifive/fu540/fu540.c
index 47a2090251..df57b6ecc2 100644
--- a/board/sifive/fu540/fu540.c
+++ b/board/sifive/fu540/fu540.c
@@ -8,6 +8,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <linux/bug.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 
diff --git a/board/silica/pengwyn/board.c b/board/silica/pengwyn/board.c
index c0496c549a..e3c9d9e755 100644
--- a/board/silica/pengwyn/board.c
+++ b/board/silica/pengwyn/board.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/sks-kinkel/sksimx6/sksimx6.c b/board/sks-kinkel/sksimx6/sksimx6.c
index 59a07a9ffd..772c17979b 100644
--- a/board/sks-kinkel/sksimx6/sksimx6.c
+++ b/board/sks-kinkel/sksimx6/sksimx6.c
@@ -3,10 +3,15 @@
  * Copyright (C) 2016 Stefano Babic <sbabic@denx.de>
  */
 
+#include <common.h>
+#include <command.h>
+#include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c
index 8eb4f8fc95..d358a209a4 100644
--- a/board/socrates/sdram.c
+++ b/board/socrates/sdram.c
@@ -12,6 +12,7 @@
 #include <asm/processor.h>
 #include <asm/mmu.h>
 #include <spd_sdram.h>
+#include <linux/delay.h>
 
 
 #if !defined(CONFIG_SPD_EEPROM)
diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index b0ddee7906..58c5f7527b 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -13,11 +13,14 @@
 #include <common.h>
 #include <clock_legacy.h>
 #include <env.h>
+#include <init.h>
 #include <pci.h>
+#include <uuid.h>
 #include <asm/processor.h>
 #include <asm/immap_85xx.h>
 #include <ioports.h>
 #include <flash.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 #include <asm/io.h>
@@ -105,25 +108,26 @@ int misc_init_r (void)
 		/*
 		 * Re-do flash protection upon new addresses
 		 */
-		flash_protect (FLAG_PROTECT_CLEAR,
-			       gd->bd->bi_flashstart, 0xffffffff,
-			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
+		flash_protect(FLAG_PROTECT_CLEAR,
+			      gd->bd->bi_flashstart, 0xffffffff,
+			      &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 
 		/* Monitor protection ON by default */
-		flash_protect (FLAG_PROTECT_SET,
-			       CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
-			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
+		flash_protect(FLAG_PROTECT_SET,
+			      CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_BASE +
+			      monitor_flash_len - 1,
+			      &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 
 		/* Environment protection ON by default */
-		flash_protect (FLAG_PROTECT_SET,
-			       CONFIG_ENV_ADDR,
-			       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
-			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
+		flash_protect(FLAG_PROTECT_SET,
+			      CONFIG_ENV_ADDR,
+			      CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
+			      &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 
 		/* Redundant environment protection ON by default */
-		flash_protect (FLAG_PROTECT_SET,
-			       CONFIG_ENV_ADDR_REDUND,
-			       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
+		flash_protect(FLAG_PROTECT_SET,
+			      CONFIG_ENV_ADDR_REDUND,
+			      CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
 			       &flash_info[CONFIG_SYS_MAX_FLASH_BANKS - 1]);
 	}
 
diff --git a/board/softing/vining_2000/vining_2000.c b/board/softing/vining_2000/vining_2000.c
index c74c06eaee..e5e33dcf15 100644
--- a/board/softing/vining_2000/vining_2000.c
+++ b/board/softing/vining_2000/vining_2000.c
@@ -7,6 +7,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -18,6 +19,8 @@
 #include <asm/io.h>
 #include <asm/mach-imx/mxc_i2c.h>
 #include <env.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <fsl_esdhc_imx.h>
diff --git a/board/softing/vining_fpga/socfpga.c b/board/softing/vining_fpga/socfpga.c
index 5a88b6c8ad..7e311b7a1c 100644
--- a/board/softing/vining_fpga/socfpga.c
+++ b/board/softing/vining_fpga/socfpga.c
@@ -7,11 +7,13 @@
 #include <eeprom.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <status_led.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 443751ba8f..4184754a9a 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -4,12 +4,17 @@
  */
 
 #include <common.h>
+#include <env.h>
 #include <i2c.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "../common/tlv_data.h"
 
 #include "../drivers/ddr/marvell/a38x/ddr3_init.h"
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 6a96f9ecdb..94707bccb2 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -13,13 +13,18 @@
  * Ported to SolidRun microSOM by Rabeeh Khoury <rabeeh@solid-run.com>
  */
 
+#include <common.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/mxc_hdmi.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/spear/spear300/spear300.c b/board/spear/spear300/spear300.c
index 83fdf027e9..c531eb3fc6 100644
--- a/board/spear/spear300/spear300.c
+++ b/board/spear/spear300/spear300.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
diff --git a/board/spear/spear310/spear310.c b/board/spear/spear310/spear310.c
index 1b3478a9fb..6e88547e1c 100644
--- a/board/spear/spear310/spear310.c
+++ b/board/spear/spear310/spear310.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c
index 640242e718..d8b1e7de4e 100644
--- a/board/spear/spear320/spear320.c
+++ b/board/spear/spear320/spear320.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
diff --git a/board/spear/spear600/spear600.c b/board/spear/spear600/spear600.c
index 91c2691b86..241f123ae1 100644
--- a/board/spear/spear600/spear600.c
+++ b/board/spear/spear600/spear600.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <miiphy.h>
+#include <net.h>
 #include <netdev.h>
 #include <nand.h>
 #include <asm/io.h>
diff --git a/board/spear/x600/fpga.c b/board/spear/x600/fpga.c
index d124d96b14..5140694b9e 100644
--- a/board/spear/x600/fpga.c
+++ b/board/spear/x600/fpga.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spartan3.h>
 #include <command.h>
 #include <asm/gpio.h>
@@ -11,6 +12,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_misc.h>
 #include <asm/arch/spr_ssp.h>
+#include <linux/delay.h>
 
 /*
  * FPGA program pin configuration on X600:
diff --git a/board/spear/x600/x600.c b/board/spear/x600/x600.c
index e1232edd14..e6f8dc9083 100644
--- a/board/spear/x600/x600.c
+++ b/board/spear/x600/x600.c
@@ -7,9 +7,11 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <init.h>
 #include <micrel.h>
 #include <nand.h>
+#include <net.h>
 #include <netdev.h>
 #include <phy.h>
 #include <rtc.h>
diff --git a/board/sr1500/socfpga.c b/board/sr1500/socfpga.c
index c9e32e3960..d9125a76bf 100644
--- a/board/sr1500/socfpga.c
+++ b/board/sr1500/socfpga.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 int board_early_init_f(void)
 {
diff --git a/board/st/common/Kconfig b/board/st/common/Kconfig
index af01ca4891..015ba40939 100644
--- a/board/st/common/Kconfig
+++ b/board/st/common/Kconfig
@@ -5,3 +5,67 @@ config CMD_STBOARD
 	help
 	  This compile the stboard command to
 	  read and write the board in the OTP.
+
+config MTDPARTS_NAND0_BOOT
+	string "mtd boot partitions for nand0"
+	default "2m(fsbl),2m(ssbl1),2m(ssbl2)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the partitions of nand0 used to build mtparts dynamically
+	  for boot from nand0.
+	  Each partition need to be aligned with the device erase block size,
+	  512KB is the max size for the NAND supported by stm32mp1 platform.
+
+config MTDPARTS_NAND0_TEE
+	string "mtd tee partitions for nand0"
+	default "512k(teeh),512k(teed),512k(teex)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the tee partitions added in mtparts dynamically
+	  when tee is supported with boot from nand0.
+	  Each partition need to be aligned with the device erase block size,
+	  512KB is the max size for the NAND supported by stm32mp1 platform.
+
+config MTDPARTS_NOR0_BOOT
+	string "mtd boot partitions for nor0"
+	default "256k(fsbl1),256k(fsbl2),2m(ssbl),512k(u-boot-env)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the partitions of nand0 used to build mtparts dynamically
+	  for boot from nor0.
+	  Each partition need to be aligned with the device erase block size,
+	  with 256KB we support all the NOR.
+	  U-Boot env partition (512kB) use 2 erase block for redundancy.
+
+config MTDPARTS_NOR0_TEE
+	string "mtd tee partitions for nor0"
+	default "256k(teeh),256k(teed),256k(teex)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the tee partitions added in mtparts dynamically
+	  when tee is supported with boot from nor0.
+
+config MTDPARTS_SPINAND0_BOOT
+	string "mtd boot partitions for spi-nand0"
+	default "2m(fsbl),2m(ssbl1),2m(ssbl2)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the partitions of nand0 used to build mtparts dynamically
+	  for boot from spi-nand0,
+	  512KB is the max size for the NAND supported by stm32mp1 platform.
+
+config MTDPARTS_SPINAND0_TEE
+	string "mtd tee partitions for spi-nand0"
+	default "512k(teeh),512k(teed),512k(teex)"
+	depends on SYS_MTDPARTS_RUNTIME && ARCH_STM32MP
+	help
+	  This define the tee partitions added in mtparts dynamically
+	  when tee is supported with boot from spi-nand0,
+	  512KB is the max size for the NAND supported by stm32mp1 platform.
+
+config DFU_ALT_RAM0
+	string "dfu for ram0"
+	default "uImage ram 0xc2000000 0x2000000;devicetree.dtb ram 0xc4000000 0x100000;uramdisk.image.gz ram 0xc4400000 0x10000000"
+	depends on ARCH_STM32MP && SET_DFU_ALT_INFO
+	help
+	  This defines the partitions of ram used to build dfu dynamically.
diff --git a/board/st/common/Makefile b/board/st/common/Makefile
index 8553606b90..aa030bacd8 100644
--- a/board/st/common/Makefile
+++ b/board/st/common/Makefile
@@ -4,3 +4,8 @@
 #
 
 obj-$(CONFIG_CMD_STBOARD) += cmd_stboard.o
+
+ifeq ($(CONFIG_ARCH_STM32MP),y)
+obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += stm32mp_mtdparts.o
+obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o
+endif
diff --git a/board/st/common/cmd_stboard.c b/board/st/common/cmd_stboard.c
index 915164aa0b..e1038619f0 100644
--- a/board/st/common/cmd_stboard.c
+++ b/board/st/common/cmd_stboard.c
@@ -31,6 +31,7 @@
 
 #ifndef CONFIG_SPL_BUILD
 #include <common.h>
+#include <command.h>
 #include <console.h>
 #include <misc.h>
 #include <dm/device.h>
@@ -67,8 +68,8 @@ static void display_stboard(u32 otp)
 	       otp & 0xF);
 }
 
-static int do_stboard(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_stboard(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int ret;
 	u32 otp, lock;
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
new file mode 100644
index 0000000000..0cda9196f9
--- /dev/null
+++ b/board/st/common/stm32mp_dfu.c
@@ -0,0 +1,245 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <blk.h>
+#include <dfu.h>
+#include <env.h>
+#include <memalign.h>
+#include <misc.h>
+#include <mtd.h>
+#include <mtd_node.h>
+#include <asm/arch/stm32prog.h>
+
+#define DFU_ALT_BUF_LEN SZ_1K
+
+static void board_get_alt_info_mmc(struct udevice *dev, char *buf)
+{
+	struct disk_partition info;
+	int p, len, devnum;
+	bool first = true;
+	const char *name;
+	struct mmc *mmc;
+	struct blk_desc *desc;
+
+	mmc = mmc_get_mmc_dev(dev);
+	if (!mmc)
+		return;
+
+	if (mmc_init(mmc))
+		return;
+
+	desc = mmc_get_blk_desc(mmc);
+	if (!desc)
+		return;
+
+	name = blk_get_if_type_name(desc->if_type);
+	devnum = desc->devnum;
+	len = strlen(buf);
+
+	if (buf[0] != '\0')
+		len += snprintf(buf + len,
+				DFU_ALT_BUF_LEN - len, "&");
+	len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+			 "%s %d=", name, devnum);
+
+	if (IS_MMC(mmc) && mmc->capacity_boot) {
+		len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+				"%s%d_boot1 raw 0x0 0x%llx mmcpart 1;",
+				name, devnum, mmc->capacity_boot);
+		len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+				"%s%d_boot2 raw 0x0 0x%llx mmcpart 2",
+				name, devnum, mmc->capacity_boot);
+		first = false;
+	}
+
+	for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
+		if (part_get_info(desc, p, &info))
+			continue;
+		if (!first)
+			len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
+		first = false;
+		len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+				"%s%d_%s part %d %d",
+				name, devnum, info.name, devnum, p);
+	}
+}
+
+static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
+{
+	struct mtd_info *part;
+	bool first = true;
+	const char *name;
+	int len, partnum = 0;
+
+	name = mtd->name;
+	len = strlen(buf);
+
+	if (buf[0] != '\0')
+		len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, "&");
+	len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+			"mtd %s=", name);
+
+	len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+			"%s raw 0x0 0x%llx ",
+			name, mtd->size);
+
+	list_for_each_entry(part, &mtd->partitions, node) {
+		partnum++;
+		if (!first)
+			len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
+		first = false;
+
+		len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
+				"%s_%s part %d",
+				name, part->name, partnum);
+	}
+}
+
+void set_dfu_alt_info(char *interface, char *devstr)
+{
+	struct udevice *dev;
+	struct mtd_info *mtd;
+
+	ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
+
+	if (env_get("dfu_alt_info"))
+		return;
+
+	memset(buf, 0, sizeof(buf));
+
+	snprintf(buf, DFU_ALT_BUF_LEN,
+		 "ram 0=%s", CONFIG_DFU_ALT_RAM0);
+
+	if (!uclass_get_device(UCLASS_MMC, 0, &dev))
+		board_get_alt_info_mmc(dev, buf);
+
+	if (!uclass_get_device(UCLASS_MMC, 1, &dev))
+		board_get_alt_info_mmc(dev, buf);
+
+	if (CONFIG_IS_ENABLED(MTD)) {
+		/* probe all MTD devices */
+		mtd_probe_devices();
+
+		/* probe SPI flash device on a bus */
+		if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
+			mtd = get_mtd_device_nm("nor0");
+			if (!IS_ERR_OR_NULL(mtd))
+				board_get_alt_info_mtd(mtd, buf);
+		}
+
+		mtd = get_mtd_device_nm("nand0");
+		if (!IS_ERR_OR_NULL(mtd))
+			board_get_alt_info_mtd(mtd, buf);
+
+		mtd = get_mtd_device_nm("spi-nand0");
+		if (!IS_ERR_OR_NULL(mtd))
+			board_get_alt_info_mtd(mtd, buf);
+	}
+
+#ifdef CONFIG_DFU_VIRT
+	strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
+
+	if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
+		strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
+#endif
+
+	env_set("dfu_alt_info", buf);
+	puts("DFU alt info setting: done\n");
+}
+
+#if CONFIG_IS_ENABLED(DFU_VIRT)
+#include <dfu.h>
+#include <power/stpmic1.h>
+
+static int dfu_otp_read(u64 offset, u8 *buffer, long *size)
+{
+	struct udevice *dev;
+	int ret;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(stm32mp_bsec),
+					  &dev);
+	if (ret)
+		return ret;
+
+	ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
+	if (ret >= 0) {
+		*size = ret;
+		ret = 0;
+	}
+
+	return 0;
+}
+
+static int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
+{
+	int ret;
+#ifdef CONFIG_PMIC_STPMIC1
+	struct udevice *dev;
+
+	ret = uclass_get_device_by_driver(UCLASS_MISC,
+					  DM_GET_DRIVER(stpmic1_nvm),
+					  &dev);
+	if (ret)
+		return ret;
+
+	ret = misc_read(dev, 0xF8 + offset, buffer, *size);
+	if (ret >= 0) {
+		*size = ret;
+		ret = 0;
+	}
+	if (ret == -EACCES) {
+		*size = 0;
+		ret = 0;
+	}
+#else
+	pr_err("PMIC update not supported");
+	ret = -EOPNOTSUPP;
+#endif
+
+	return ret;
+}
+
+int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
+			 void *buf, long *len)
+{
+	switch (dfu->data.virt.dev_num) {
+	case 0x0:
+		return dfu_otp_read(offset, buf, len);
+	case 0x1:
+		return dfu_pmic_read(offset, buf, len);
+	}
+
+	if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
+	    dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
+		return stm32prog_read_medium_virt(dfu, offset, buf, len);
+
+	*len = 0;
+	return 0;
+}
+
+int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
+			  void *buf, long *len)
+{
+	if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
+	    dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
+		return stm32prog_write_medium_virt(dfu, offset, buf, len);
+
+	return -EOPNOTSUPP;
+}
+
+int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
+{
+	if (CONFIG_IS_ENABLED(CMD_STM32PROG) &&
+	    dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
+		return stm32prog_get_medium_size_virt(dfu, size);
+
+	*size = SZ_1K;
+
+	return 0;
+}
+
+#endif
diff --git a/board/st/common/stm32mp_mtdparts.c b/board/st/common/stm32mp_mtdparts.c
new file mode 100644
index 0000000000..9f5897f8c8
--- /dev/null
+++ b/board/st/common/stm32mp_mtdparts.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
+/*
+ * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
+ */
+
+#include <common.h>
+#include <dfu.h>
+#include <dm.h>
+#include <env.h>
+#include <env_internal.h>
+#include <mtd.h>
+#include <mtd_node.h>
+#include <tee.h>
+#include <asm/arch/stm32prog.h>
+#include <asm/arch/sys_proto.h>
+
+#define MTDPARTS_LEN		256
+#define MTDIDS_LEN		128
+
+/*
+ * Get a global data pointer
+ */
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * update the variables "mtdids" and "mtdparts" with boot, tee and user strings
+ */
+static void board_set_mtdparts(const char *dev,
+			       char *mtdids,
+			       char *mtdparts,
+			       const char *boot,
+			       const char *tee,
+			       const char *user)
+{
+	/* mtdids: "<dev>=<dev>, ...." */
+	if (mtdids[0] != '\0')
+		strcat(mtdids, ",");
+	strcat(mtdids, dev);
+	strcat(mtdids, "=");
+	strcat(mtdids, dev);
+
+	/* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
+	if (mtdparts[0] != '\0')
+		strncat(mtdparts, ";", MTDPARTS_LEN);
+	else
+		strcat(mtdparts, "mtdparts=");
+
+	strncat(mtdparts, dev, MTDPARTS_LEN);
+	strncat(mtdparts, ":", MTDPARTS_LEN);
+
+	if (boot) {
+		strncat(mtdparts, boot, MTDPARTS_LEN);
+		strncat(mtdparts, ",", MTDPARTS_LEN);
+	}
+
+	if (tee) {
+		strncat(mtdparts, tee, MTDPARTS_LEN);
+		strncat(mtdparts, ",", MTDPARTS_LEN);
+	}
+
+	strncat(mtdparts, user, MTDPARTS_LEN);
+}
+
+void board_mtdparts_default(const char **mtdids, const char **mtdparts)
+{
+	struct mtd_info *mtd;
+	struct udevice *dev;
+	static char parts[3 * MTDPARTS_LEN + 1];
+	static char ids[MTDIDS_LEN + 1];
+	static bool mtd_initialized;
+	bool tee, nor, nand, spinand, serial;
+
+	if (mtd_initialized) {
+		*mtdids = ids;
+		*mtdparts = parts;
+		return;
+	}
+
+	tee = false;
+	nor = false;
+	nand = false;
+	spinand = false;
+	serial = false;
+
+	switch (get_bootmode() & TAMP_BOOT_DEVICE_MASK) {
+	case BOOT_SERIAL_UART:
+	case BOOT_SERIAL_USB:
+		serial = true;
+		if (CONFIG_IS_ENABLED(CMD_STM32PROG)) {
+			tee = stm32prog_get_tee_partitions();
+			nor = stm32prog_get_fsbl_nor();
+		}
+		nand = true;
+		spinand = true;
+		break;
+	case BOOT_FLASH_NAND:
+		nand = true;
+		break;
+	case BOOT_FLASH_SPINAND:
+		spinand = true;
+		break;
+	case BOOT_FLASH_NOR:
+		nor = true;
+		break;
+	default:
+		break;
+	}
+
+	if (!serial && CONFIG_IS_ENABLED(OPTEE) &&
+	    tee_find_device(NULL, NULL, NULL, NULL))
+		tee = true;
+
+	memset(parts, 0, sizeof(parts));
+	memset(ids, 0, sizeof(ids));
+
+	/* probe all MTD devices */
+	for (uclass_first_device(UCLASS_MTD, &dev);
+	     dev;
+	     uclass_next_device(&dev)) {
+		pr_debug("mtd device = %s\n", dev->name);
+	}
+
+	if (nor || nand) {
+		mtd = get_mtd_device_nm("nand0");
+		if (!IS_ERR_OR_NULL(mtd)) {
+			const char *mtd_boot = CONFIG_MTDPARTS_NAND0_BOOT;
+			const char *mtd_tee = CONFIG_MTDPARTS_NAND0_TEE;
+
+			board_set_mtdparts("nand0", ids, parts,
+					   !nor ? mtd_boot : NULL,
+					   !nor && tee ? mtd_tee : NULL,
+					   "-(UBI)");
+			put_mtd_device(mtd);
+		}
+	}
+
+	if (nor || spinand) {
+		mtd = get_mtd_device_nm("spi-nand0");
+		if (!IS_ERR_OR_NULL(mtd)) {
+			const char *mtd_boot = CONFIG_MTDPARTS_SPINAND0_BOOT;
+			const char *mtd_tee = CONFIG_MTDPARTS_SPINAND0_TEE;
+
+			board_set_mtdparts("spi-nand0", ids, parts,
+					   !nor ? mtd_boot : NULL,
+					   !nor && tee ? mtd_tee : NULL,
+					   "-(UBI)");
+			put_mtd_device(mtd);
+		}
+	}
+
+	if (nor) {
+		if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
+			const char *mtd_boot = CONFIG_MTDPARTS_NOR0_BOOT;
+			const char *mtd_tee = CONFIG_MTDPARTS_NOR0_TEE;
+
+			board_set_mtdparts("nor0", ids, parts,
+					   mtd_boot,
+					   tee ? mtd_tee : NULL,
+					   "-(nor_user)");
+		}
+	}
+
+	mtd_initialized = true;
+	*mtdids = ids;
+	*mtdparts = parts;
+	debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
+}
diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c
index 5d9fdf27b2..b1147f2e1a 100644
--- a/board/st/stih410-b2260/board.c
+++ b/board/st/stih410-b2260/board.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
+#include <asm/cache.h>
 #include <linux/usb/otg.h>
 #include <dwc3-sti-glue.h>
 #include <dwc3-uboot.h>
diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c b/board/st/stm32f429-discovery/stm32f429-discovery.c
index 500dc5fe3a..ee6a90c9fd 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -12,6 +12,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <log.h>
 
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
index 8ab2fa5d59..92e3d40a1b 100644
--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
+++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <log.h>
 
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c b/board/st/stm32f469-discovery/stm32f469-discovery.c
index 70d23d90f4..85988acb24 100644
--- a/board/st/stm32f469-discovery/stm32f469-discovery.c
+++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
@@ -6,6 +6,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <log.h>
 
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index df907426d2..0f728fd9f9 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <init.h>
 #include <lcd.h>
+#include <log.h>
 #include <miiphy.h>
 #include <phy_interface.h>
 #include <ram.h>
@@ -22,6 +23,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/syscfg.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/st/stm32h743-disco/stm32h743-disco.c b/board/st/stm32h743-disco/stm32h743-disco.c
index 6aab2e243e..0484c3c250 100644
--- a/board/st/stm32h743-disco/stm32h743-disco.c
+++ b/board/st/stm32h743-disco/stm32h743-disco.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/st/stm32h743-eval/stm32h743-eval.c b/board/st/stm32h743-eval/stm32h743-eval.c
index 6aab2e243e..0484c3c250 100644
--- a/board/st/stm32h743-eval/stm32h743-eval.c
+++ b/board/st/stm32h743-eval/stm32h743-eval.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS
index 2930947716..96c4559033 100644
--- a/board/st/stm32mp1/MAINTAINERS
+++ b/board/st/stm32mp1/MAINTAINERS
@@ -6,6 +6,5 @@ S:	Maintained
 F:	arch/arm/dts/stm32mp15*
 F:	board/st/stm32mp1/
 F:	configs/stm32mp15_basic_defconfig
-F:	configs/stm32mp15_optee_defconfig
 F:	configs/stm32mp15_trusted_defconfig
 F:	include/configs/stm32mp1.h
diff --git a/board/st/stm32mp1/board.c b/board/st/stm32mp1/board.c
index 4e35d36c76..c218d37ecc 100644
--- a/board/st/stm32mp1/board.c
+++ b/board/st/stm32mp1/board.c
@@ -7,6 +7,8 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <asm/arch/ddr.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/stpmic1.h>
 
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 45068b1cd9..4553329b25 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -7,21 +7,21 @@
 #include <bootm.h>
 #include <clk.h>
 #include <config.h>
-#include <dfu.h>
 #include <dm.h>
 #include <env.h>
 #include <env_internal.h>
+#include <fdt_support.h>
 #include <g_dnl.h>
 #include <generic-phy.h>
 #include <hang.h>
 #include <i2c.h>
 #include <init.h>
 #include <led.h>
+#include <log.h>
 #include <malloc.h>
-#include <memalign.h>
 #include <misc.h>
-#include <mtd.h>
 #include <mtd_node.h>
+#include <net.h>
 #include <netdev.h>
 #include <phy.h>
 #include <remoteproc.h>
@@ -34,7 +34,10 @@
 #include <asm/arch/stm32.h>
 #include <asm/arch/sys_proto.h>
 #include <jffs2/load_kernel.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
+#include <linux/iopoll.h>
 #include <power/regulator.h>
 #include <usb/dwc2_udc.h>
 
@@ -90,9 +93,7 @@ int checkboard(void)
 	const char *fdt_compat;
 	int fdt_compat_len;
 
-	if (IS_ENABLED(CONFIG_STM32MP1_OPTEE))
-		mode = "trusted with OP-TEE";
-	else if (IS_ENABLED(TFABOOT))
+	if (IS_ENABLED(CONFIG_TFABOOT))
 		mode = "trusted";
 	else
 		mode = "basic";
@@ -260,7 +261,6 @@ int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
 
 #endif /* CONFIG_USB_GADGET */
 
-#ifdef CONFIG_LED
 static int get_led(struct udevice **dev, char *led_string)
 {
 	char *led_name;
@@ -286,6 +286,9 @@ static int setup_led(enum led_state_t cmd)
 	struct udevice *dev;
 	int ret;
 
+	if (!CONFIG_IS_ENABLED(LED))
+		return 0;
+
 	ret = get_led(&dev, "u-boot,boot-led");
 	if (ret)
 		return ret;
@@ -293,31 +296,29 @@ static int setup_led(enum led_state_t cmd)
 	ret = led_set_state(dev, cmd);
 	return ret;
 }
-#endif
 
 static void __maybe_unused led_error_blink(u32 nb_blink)
 {
-#ifdef CONFIG_LED
 	int ret;
 	struct udevice *led;
 	u32 i;
-#endif
 
 	if (!nb_blink)
 		return;
 
-#ifdef CONFIG_LED
-	ret = get_led(&led, "u-boot,error-led");
-	if (!ret) {
-		/* make u-boot,error-led blinking */
-		/* if U32_MAX and 125ms interval, for 17.02 years */
-		for (i = 0; i < 2 * nb_blink; i++) {
-			led_set_state(led, LEDST_TOGGLE);
-			mdelay(125);
-			WATCHDOG_RESET();
+	if (CONFIG_IS_ENABLED(LED)) {
+		ret = get_led(&led, "u-boot,error-led");
+		if (!ret) {
+			/* make u-boot,error-led blinking */
+			/* if U32_MAX and 125ms interval, for 17.02 years */
+			for (i = 0; i < 2 * nb_blink; i++) {
+				led_set_state(led, LEDST_TOGGLE);
+				mdelay(125);
+				WATCHDOG_RESET();
+			}
+			led_set_state(led, LEDST_ON);
 		}
 	}
-#endif
 
 	/* infinite: the boot process must be stopped */
 	if (nb_blink == U32_MAX)
@@ -435,7 +436,7 @@ static int board_check_usb_power(void)
 	if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
 	    max_uV <= USB_START_LOW_THRESHOLD_UV &&
 	    min_uV <= USB_LOW_THRESHOLD_UV) {
-		pr_err("*       WARNING 1.5mA power supply detected        *\n");
+		pr_err("*       WARNING 1.5A power supply detected        *\n");
 		nb_blink = 3;
 	}
 
@@ -468,10 +469,10 @@ static void sysconf_init(void)
 	struct udevice *pwr_dev;
 	struct udevice *pwr_reg;
 	struct udevice *dev;
-	int ret;
 	u32 otp = 0;
 #endif
-	u32 bootr;
+	int ret;
+	u32 bootr, val;
 
 	syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
 
@@ -548,8 +549,15 @@ static void sysconf_init(void)
 	 */
 	writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
 
-	while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
-		;
+	/* poll until ready (1s timeout) */
+	ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
+				 val & SYSCFG_CMPCR_READY,
+				 1000000);
+	if (ret) {
+		pr_err("SYSCFG: I/O compensation failed, timeout.\n");
+		led_error_blink(10);
+	}
+
 	clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
 #endif
 }
@@ -621,6 +629,38 @@ static bool board_is_dk2(void)
 }
 #endif
 
+static bool board_is_ev1(void)
+{
+	if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
+	    (of_machine_is_compatible("st,stm32mp157a-ev1") ||
+	     of_machine_is_compatible("st,stm32mp157c-ev1") ||
+	     of_machine_is_compatible("st,stm32mp157d-ev1") ||
+	     of_machine_is_compatible("st,stm32mp157f-ev1")))
+		return true;
+
+	return false;
+}
+
+/* touchscreen driver: only used for pincontrol configuration */
+static const struct udevice_id goodix_ids[] = {
+	{ .compatible = "goodix,gt9147", },
+	{ }
+};
+
+U_BOOT_DRIVER(goodix) = {
+	.name		= "goodix",
+	.id		= UCLASS_NOP,
+	.of_match	= goodix_ids,
+};
+
+static void board_ev1_init(void)
+{
+	struct udevice *dev;
+
+	/* configure IRQ line on EV1 for touchscreen before LCD reset */
+	uclass_get_device_by_driver(UCLASS_NOP, DM_GET_DRIVER(goodix), &dev);
+}
+
 /* board dependent setup after realloc */
 int board_init(void)
 {
@@ -638,6 +678,9 @@ int board_init(void)
 
 	board_key_check();
 
+	if (board_is_ev1())
+		board_ev1_init();
+
 #ifdef CONFIG_DM_REGULATOR
 	if (board_is_dk2())
 		dk2_i2c1_fix();
@@ -650,12 +693,13 @@ int board_init(void)
 	if (CONFIG_IS_ENABLED(LED))
 		led_default_state();
 
+	setup_led(LEDST_ON);
+
 	return 0;
 }
 
 int board_late_init(void)
 {
-	char *boot_device;
 #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
 	const void *fdt_compat;
 	int fdt_compat_len;
@@ -667,10 +711,19 @@ int board_late_init(void)
 	fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
 				 &fdt_compat_len);
 	if (fdt_compat && fdt_compat_len) {
-		if (strncmp(fdt_compat, "st,", 3) != 0)
+		if (strncmp(fdt_compat, "st,", 3) != 0) {
 			env_set("board_name", fdt_compat);
-		else
+		} else {
+			char dtb_name[256];
+			int buf_len = sizeof(dtb_name);
+
 			env_set("board_name", fdt_compat + 3);
+
+			strncpy(dtb_name, fdt_compat + 3, buf_len);
+			buf_len -= strlen(fdt_compat + 3);
+			strncat(dtb_name, ".dtb", buf_len);
+			env_set("fdtfile", dtb_name);
+		}
 	}
 	ret = uclass_get_device_by_driver(UCLASS_MISC,
 					  DM_GET_DRIVER(stm32mp_bsec),
@@ -694,19 +747,12 @@ int board_late_init(void)
 	board_check_usb_power();
 #endif /* CONFIG_ADC */
 
-	/* Check the boot-source to disable bootdelay */
-	boot_device = env_get("boot_device");
-	if (!strcmp(boot_device, "serial") || !strcmp(boot_device, "usb"))
-		env_set("bootdelay", "0");
-
 	return 0;
 }
 
 void board_quiesce_devices(void)
 {
-#ifdef CONFIG_LED
 	setup_led(LEDST_OFF);
-#endif
 }
 
 /* eth init function : weak called in eqos driver */
@@ -794,6 +840,7 @@ enum env_location env_get_location(enum env_operation op, int prio)
 #endif
 #ifdef CONFIG_ENV_IS_IN_UBI
 	case BOOT_FLASH_NAND:
+	case BOOT_FLASH_SPINAND:
 		return ENVL_UBI;
 #endif
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
@@ -828,114 +875,13 @@ const char *env_ext4_get_dev_part(void)
 }
 #endif
 
-#ifdef CONFIG_SYS_MTDPARTS_RUNTIME
-
-#define MTDPARTS_LEN		256
-#define MTDIDS_LEN		128
-
-/**
- * The mtdparts_nand0 and mtdparts_nor0 variable tends to be long.
- * If we need to access it before the env is relocated, then we need
- * to use our own stack buffer. gd->env_buf will be too small.
- *
- * @param buf temporary buffer pointer MTDPARTS_LEN long
- * @return mtdparts variable string, NULL if not found
- */
-static const char *env_get_mtdparts(const char *str, char *buf)
-{
-	if (gd->flags & GD_FLG_ENV_READY)
-		return env_get(str);
-	if (env_get_f(str, buf, MTDPARTS_LEN) != -1)
-		return buf;
-
-	return NULL;
-}
-
-/**
- * update the variables "mtdids" and "mtdparts" with content of mtdparts_<dev>
- */
-static void board_get_mtdparts(const char *dev,
-			       char *mtdids,
-			       char *mtdparts)
-{
-	char env_name[32] = "mtdparts_";
-	char tmp_mtdparts[MTDPARTS_LEN];
-	const char *tmp;
-
-	/* name of env variable to read = mtdparts_<dev> */
-	strcat(env_name, dev);
-	tmp = env_get_mtdparts(env_name, tmp_mtdparts);
-	if (tmp) {
-		/* mtdids: "<dev>=<dev>, ...." */
-		if (mtdids[0] != '\0')
-			strcat(mtdids, ",");
-		strcat(mtdids, dev);
-		strcat(mtdids, "=");
-		strcat(mtdids, dev);
-
-		/* mtdparts: "mtdparts=<dev>:<mtdparts_<dev>>;..." */
-		if (mtdparts[0] != '\0')
-			strncat(mtdparts, ";", MTDPARTS_LEN);
-		else
-			strcat(mtdparts, "mtdparts=");
-		strncat(mtdparts, dev, MTDPARTS_LEN);
-		strncat(mtdparts, ":", MTDPARTS_LEN);
-		strncat(mtdparts, tmp, MTDPARTS_LEN);
-	}
-}
-
-void board_mtdparts_default(const char **mtdids, const char **mtdparts)
-{
-	struct mtd_info *mtd;
-	struct udevice *dev;
-	static char parts[3 * MTDPARTS_LEN + 1];
-	static char ids[MTDIDS_LEN + 1];
-	static bool mtd_initialized;
-
-	if (mtd_initialized) {
-		*mtdids = ids;
-		*mtdparts = parts;
-		return;
-	}
-
-	memset(parts, 0, sizeof(parts));
-	memset(ids, 0, sizeof(ids));
-
-	/* probe all MTD devices */
-	for (uclass_first_device(UCLASS_MTD, &dev);
-	     dev;
-	     uclass_next_device(&dev)) {
-		pr_debug("mtd device = %s\n", dev->name);
-	}
-
-	mtd = get_mtd_device_nm("nand0");
-	if (!IS_ERR_OR_NULL(mtd)) {
-		board_get_mtdparts("nand0", ids, parts);
-		put_mtd_device(mtd);
-	}
-
-	mtd = get_mtd_device_nm("spi-nand0");
-	if (!IS_ERR_OR_NULL(mtd)) {
-		board_get_mtdparts("spi-nand0", ids, parts);
-		put_mtd_device(mtd);
-	}
-
-	if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
-		board_get_mtdparts("nor0", ids, parts);
-
-	mtd_initialized = true;
-	*mtdids = ids;
-	*mtdparts = parts;
-	debug("%s:mtdids=%s & mtdparts=%s\n", __func__, ids, parts);
-}
-#endif
-
 #if defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, bd_t *bd)
 {
 #ifdef CONFIG_FDT_FIXUP_PARTITIONS
 	struct node_info nodes[] = {
 		{ "st,stm32f469-qspi",		MTD_DEV_TYPE_NOR,  },
+		{ "st,stm32f469-qspi",		MTD_DEV_TYPE_SPINAND},
 		{ "st,stm32mp15-fmc2",		MTD_DEV_TYPE_NAND, },
 	};
 	fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
@@ -945,148 +891,6 @@ int ft_board_setup(void *blob, bd_t *bd)
 }
 #endif
 
-#ifdef CONFIG_SET_DFU_ALT_INFO
-#define DFU_ALT_BUF_LEN SZ_1K
-
-static void board_get_alt_info(const char *dev, char *buff)
-{
-	char var_name[32] = "dfu_alt_info_";
-	int ret;
-
-	ALLOC_CACHE_ALIGN_BUFFER(char, tmp_alt, DFU_ALT_BUF_LEN);
-
-	/* name of env variable to read = dfu_alt_info_<dev> */
-	strcat(var_name, dev);
-	ret = env_get_f(var_name, tmp_alt, DFU_ALT_BUF_LEN);
-	if (ret) {
-		if (buff[0] != '\0')
-			strcat(buff, "&");
-		strncat(buff, tmp_alt, DFU_ALT_BUF_LEN);
-	}
-}
-
-void set_dfu_alt_info(char *interface, char *devstr)
-{
-	struct udevice *dev;
-	struct mtd_info *mtd;
-
-	ALLOC_CACHE_ALIGN_BUFFER(char, buf, DFU_ALT_BUF_LEN);
-
-	if (env_get("dfu_alt_info"))
-		return;
-
-	memset(buf, 0, sizeof(buf));
-
-	/* probe all MTD devices */
-	mtd_probe_devices();
-
-	board_get_alt_info("ram", buf);
-
-	if (!uclass_get_device(UCLASS_MMC, 0, &dev))
-		board_get_alt_info("mmc0", buf);
-
-	if (!uclass_get_device(UCLASS_MMC, 1, &dev))
-		board_get_alt_info("mmc1", buf);
-
-	if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev))
-		board_get_alt_info("nor0", buf);
-
-	mtd = get_mtd_device_nm("nand0");
-	if (!IS_ERR_OR_NULL(mtd))
-		board_get_alt_info("nand0", buf);
-
-	mtd = get_mtd_device_nm("spi-nand0");
-	if (!IS_ERR_OR_NULL(mtd))
-		board_get_alt_info("spi-nand0", buf);
-
-#ifdef CONFIG_DFU_VIRT
-	strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
-
-	if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
-		strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
-#endif
-
-	env_set("dfu_alt_info", buf);
-	puts("DFU alt info setting: done\n");
-}
-
-#if CONFIG_IS_ENABLED(DFU_VIRT)
-#include <dfu.h>
-#include <power/stpmic1.h>
-
-static int dfu_otp_read(u64 offset, u8 *buffer, long *size)
-{
-	struct udevice *dev;
-	int ret;
-
-	ret = uclass_get_device_by_driver(UCLASS_MISC,
-					  DM_GET_DRIVER(stm32mp_bsec),
-					  &dev);
-	if (ret)
-		return ret;
-
-	ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
-	if (ret >= 0) {
-		*size = ret;
-		ret = 0;
-	}
-
-	return 0;
-}
-
-static int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
-{
-	int ret;
-#ifdef CONFIG_PMIC_STPMIC1
-	struct udevice *dev;
-
-	ret = uclass_get_device_by_driver(UCLASS_MISC,
-					  DM_GET_DRIVER(stpmic1_nvm),
-					  &dev);
-	if (ret)
-		return ret;
-
-	ret = misc_read(dev, 0xF8 + offset, buffer, *size);
-	if (ret >= 0) {
-		*size = ret;
-		ret = 0;
-	}
-	if (ret == -EACCES) {
-		*size = 0;
-		ret = 0;
-	}
-#else
-	pr_err("PMIC update not supported");
-	ret = -EOPNOTSUPP;
-#endif
-
-	return ret;
-}
-
-int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
-			 void *buf, long *len)
-{
-	switch (dfu->data.virt.dev_num) {
-	case 0x0:
-		return dfu_otp_read(offset, buf, len);
-	case 0x1:
-		return dfu_pmic_read(offset, buf, len);
-	}
-	*len = 0;
-	return 0;
-}
-
-int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
-{
-	*size = SZ_1K;
-
-	return 0;
-}
-
-#endif
-
-#endif
-
 static void board_copro_image_process(ulong fw_image, size_t fw_size)
 {
 	int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c
index 33b29e647e..d5a9f1386e 100644
--- a/board/st/stv0991/stv0991.c
+++ b/board/st/stv0991/stv0991.c
@@ -5,8 +5,11 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <init.h>
 #include <miiphy.h>
+#include <net.h>
 #include <asm/arch/stv0991_periph.h>
 #include <asm/arch/stv0991_defs.h>
 #include <asm/arch/hardware.h>
diff --git a/board/ste/stemmy/stemmy.c b/board/ste/stemmy/stemmy.c
index 8cf6f18755..f7834c08fc 100644
--- a/board/ste/stemmy/stemmy.c
+++ b/board/ste/stemmy/stemmy.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2019 Stephan Gerhold <stephan@gerhold.net>
  */
 #include <common.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 6afea6ef42..f32e8f582f 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -14,7 +14,9 @@
 #include <dm.h>
 #include <env.h>
 #include <hang.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <mmc.h>
 #include <axp_pmic.h>
 #include <generic-phy.h>
@@ -26,6 +28,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm/arch/spl.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 #ifndef CONFIG_ARM64
 #include <asm/armv7.h>
diff --git a/board/sunxi/dram_sun4i_auto.c b/board/sunxi/dram_sun4i_auto.c
index 7d4409b51e..e8bbee4ee5 100644
--- a/board/sunxi/dram_sun4i_auto.c
+++ b/board/sunxi/dram_sun4i_auto.c
@@ -1,4 +1,5 @@
 #include <common.h>
+#include <init.h>
 #include <asm/arch/dram.h>
 
 static struct dram_para dram_para = {
diff --git a/board/sunxi/dram_sun5i_auto.c b/board/sunxi/dram_sun5i_auto.c
index e3fa243267..a5f4f8b743 100644
--- a/board/sunxi/dram_sun5i_auto.c
+++ b/board/sunxi/dram_sun5i_auto.c
@@ -1,6 +1,7 @@
 /* DRAM parameters for auto dram configuration on sun5i and sun7i */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/dram.h>
 
 static struct dram_para dram_para = {
diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index fa982bda5c..b4a1d4c5df 100644
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -6,9 +6,11 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dwmmc.h>
+#include <init.h>
 #include <malloc.h>
 #include <asm/arcregs.h>
 #include "axs10x.h"
+#include <asm/cache.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/synopsys/emsdp/emsdp.c b/board/synopsys/emsdp/emsdp.c
index c09ed8cff8..91fa94a638 100644
--- a/board/synopsys/emsdp/emsdp.c
+++ b/board/synopsys/emsdp/emsdp.c
@@ -4,9 +4,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <dwmmc.h>
+#include <init.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 
 #include <asm/arcregs.h>
 
@@ -101,7 +104,8 @@ void reset_cpu(ulong addr)
 		; /* loop forever till reset */
 }
 
-static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_emsdp_rom(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	u32 creg_boot = readl(CREG_BOOT);
 
@@ -117,13 +121,14 @@ static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]
 	return CMD_RET_SUCCESS;
 }
 
-cmd_tbl_t cmd_emsdp[] = {
+struct cmd_tbl cmd_emsdp[] = {
 	U_BOOT_CMD_MKENT(rom, 2, 0, do_emsdp_rom, "", ""),
 };
 
-static int do_emsdp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_emsdp(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	c = find_cmd_tbl(argv[1], cmd_emsdp, ARRAY_SIZE(cmd_emsdp));
 
diff --git a/board/synopsys/hsdk/clk-lib.c b/board/synopsys/hsdk/clk-lib.c
index 6b6bb70e3c..1c74bfb93a 100644
--- a/board/synopsys/hsdk/clk-lib.c
+++ b/board/synopsys/hsdk/clk-lib.c
@@ -5,6 +5,7 @@
  */
 
 #include <clk.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device.h>
 
diff --git a/board/synopsys/hsdk/clk-lib.h b/board/synopsys/hsdk/clk-lib.h
index c1c105a8fd..970bcd4a17 100644
--- a/board/synopsys/hsdk/clk-lib.h
+++ b/board/synopsys/hsdk/clk-lib.h
@@ -8,6 +8,7 @@
 #define __BOARD_CLK_LIB_H
 
 #include <common.h>
+#include <linux/bitops.h>
 
 enum clk_ctl_ops {
 	CLK_SET		= BIT(0), /* set frequency */
diff --git a/board/synopsys/hsdk/env-lib.c b/board/synopsys/hsdk/env-lib.c
index f443c21e6d..235f29565f 100644
--- a/board/synopsys/hsdk/env-lib.c
+++ b/board/synopsys/hsdk/env-lib.c
@@ -6,6 +6,7 @@
 
 #include "env-lib.h"
 #include <env.h>
+#include <log.h>
 
 #define MAX_CMD_LEN	25
 
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index a3e0563ff4..cd11f9dac0 100644
--- a/board/synopsys/hsdk/hsdk.c
+++ b/board/synopsys/hsdk/hsdk.c
@@ -5,11 +5,17 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <config.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <image.h>
 #include <init.h>
 #include <irq_func.h>
+#include <log.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/printk.h>
 #include <linux/kernel.h>
 #include <linux/io.h>
@@ -42,6 +48,8 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CREG_CPU_START_MASK	0xF
 #define CREG_CPU_START_POL	BIT(4)
 
+#define CREG_CORE_BOOT_IMAGE	GENMASK(5, 4)
+
 #define CREG_CPU_0_ENTRY	(CREG_BASE + 0x404)
 
 #define SDIO_BASE		(ARC_PERIPHERAL_BASE + 0xA000)
@@ -927,7 +935,8 @@ static int hsdk_go_prepare_and_run(void)
 	return hsdk_go_run(reg);
 }
 
-static int do_hsdk_go(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_hsdk_go(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int ret;
 
@@ -992,7 +1001,8 @@ static void init_mark_done(void)
 	writel(~INIT_MARKER_PENDING, INIT_MARKER_REGISTER);
 }
 
-static int do_hsdk_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_hsdk_init(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	int ret;
 
@@ -1020,7 +1030,7 @@ U_BOOT_CMD(
 	"- Init HSDK HW\n"
 );
 
-static int do_hsdk_clock_set(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_hsdk_clock_set(struct cmd_tbl *cmdtp, int flag, int argc,
 			     char *const argv[])
 {
 	int ret = 0;
@@ -1052,7 +1062,7 @@ static int do_hsdk_clock_set(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_hsdk_clock_get(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_hsdk_clock_get(struct cmd_tbl *cmdtp, int flag, int argc,
 			     char *const argv[])
 {
 	ulong rate;
@@ -1080,7 +1090,7 @@ static int do_hsdk_clock_get(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_hsdk_clock_print(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_hsdk_clock_print(struct cmd_tbl *cmdtp, int flag, int argc,
 			       char *const argv[])
 {
 	/* Main clocks */
@@ -1092,7 +1102,7 @@ static int do_hsdk_clock_print(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_hsdk_clock_print_all(struct cmd_tbl *cmdtp, int flag, int argc,
 				   char *const argv[])
 {
 	/*
@@ -1153,16 +1163,17 @@ static int do_hsdk_clock_print_all(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-cmd_tbl_t cmd_hsdk_clock[] = {
+struct cmd_tbl cmd_hsdk_clock[] = {
 	U_BOOT_CMD_MKENT(set, 3, 0, do_hsdk_clock_set, "", ""),
 	U_BOOT_CMD_MKENT(get, 3, 0, do_hsdk_clock_get, "", ""),
 	U_BOOT_CMD_MKENT(print, 4, 0, do_hsdk_clock_print, "", ""),
 	U_BOOT_CMD_MKENT(print_all, 4, 0, do_hsdk_clock_print_all, "", ""),
 };
 
-static int do_hsdk_clock(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_hsdk_clock(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -1241,11 +1252,16 @@ int board_late_init(void)
 
 int checkboard(void)
 {
+	u32 reg;
+
 	printf("Board: Synopsys %s\n", board_name(get_board_type_runtime()));
 
 	if (board_mismatch())
 		printf("WARN: U-boot is configured NOT for this board but for %s!\n",
 		       board_name(get_board_type_config()));
 
+	reg = readl(CREG_AXI_M_HS_CORE_BOOT) & CREG_CORE_BOOT_IMAGE;
+	printf("U-boot autostart: %s\n", reg ? "enabled" : "disabled");
+
 	return 0;
 };
diff --git a/board/synopsys/iot_devkit/iot_devkit.c b/board/synopsys/iot_devkit/iot_devkit.c
index 36aa8f6ae5..497ea186d3 100644
--- a/board/synopsys/iot_devkit/iot_devkit.c
+++ b/board/synopsys/iot_devkit/iot_devkit.c
@@ -5,8 +5,10 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <malloc.h>
 #include <dwmmc.h>
+#include <linux/bitops.h>
 #include <linux/libfdt.h>
 #include <fdtdec.h>
 
diff --git a/board/synopsys/nsim/nsim.c b/board/synopsys/nsim/nsim.c
index f384f707f6..00e5cc3641 100644
--- a/board/synopsys/nsim/nsim.c
+++ b/board/synopsys/nsim/nsim.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <dm/device.h>
 #include <virtio_types.h>
 #include <virtio.h>
diff --git a/board/syteco/zmx25/zmx25.c b/board/syteco/zmx25/zmx25.c
index 715e20dbd0..d5393d7059 100644
--- a/board/syteco/zmx25/zmx25.c
+++ b/board/syteco/zmx25/zmx25.c
@@ -15,11 +15,13 @@
  */
 #include <common.h>
 #include <cpu_func.h>
+#include <env.h>
 #include <init.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx25.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/tbs/tbs2910/tbs2910.c b/board/tbs/tbs2910/tbs2910.c
index b4fd183394..d32517f998 100644
--- a/board/tbs/tbs2910/tbs2910.c
+++ b/board/tbs/tbs2910/tbs2910.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2014 Soeren Moch <smoch@web.de>
  */
 
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
diff --git a/board/tcl/sl50/board.c b/board/tcl/sl50/board.c
index 7537fa213a..afa6290a2a 100644
--- a/board/tcl/sl50/board.c
+++ b/board/tcl/sl50/board.c
@@ -11,6 +11,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
diff --git a/board/technexion/pico-imx6/pico-imx6.c b/board/technexion/pico-imx6/pico-imx6.c
index f8eeb40555..b5a02eb832 100644
--- a/board/technexion/pico-imx6/pico-imx6.c
+++ b/board/technexion/pico-imx6/pico-imx6.c
@@ -6,6 +6,9 @@
  * Author: Fabio Estevam <festevam@gmail.com>
  */
 
+#include <env.h>
+#include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -17,6 +20,7 @@
 #include <asm/mach-imx/video.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <miiphy.h>
diff --git a/board/technexion/pico-imx6/spl.c b/board/technexion/pico-imx6/spl.c
index 06ad0a8c32..f9ae09607f 100644
--- a/board/technexion/pico-imx6/spl.c
+++ b/board/technexion/pico-imx6/spl.c
@@ -6,10 +6,14 @@
  *	   Fabio Estevam <festevam@gmail.com>
  */
 
+#include <common.h>
+#include <image.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c
index e27a03c212..1d24096df5 100644
--- a/board/technexion/pico-imx6ul/pico-imx6ul.c
+++ b/board/technexion/pico-imx6ul/pico-imx6ul.c
@@ -5,6 +5,8 @@
  * Author: Richard Hu <richard.hu@technexion.com>
  */
 
+#include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/imx-regs.h>
@@ -17,6 +19,7 @@
 #include <common.h>
 #include <miiphy.h>
 #include <netdev.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <usb.h>
 #include <power/pmic.h>
diff --git a/board/technexion/pico-imx7d/README.pico-imx7d_BL33 b/board/technexion/pico-imx7d/README.pico-imx7d_BL33
index 40324ffe5f..1b346093b8 100644
--- a/board/technexion/pico-imx7d/README.pico-imx7d_BL33
+++ b/board/technexion/pico-imx7d/README.pico-imx7d_BL33
@@ -4,7 +4,7 @@ The boot sequence is ATF -> OPTEE -> U-Boot -> Linux. U-Boot is in non-secure
 world in this case.
 
 - Build u-boot
-    Set environment variable of CROSS_COMPILE for your toolchain and ARCH=arm
+    Set environment variable of CROSS_COMPILE for your toolchain
     $ make pico-imx7d_bl33_defconfig
     $ make all
 
diff --git a/board/technexion/pico-imx7d/pico-imx7d.c b/board/technexion/pico-imx7d/pico-imx7d.c
index b7ca2e1315..a6fd49d729 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -4,6 +4,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
diff --git a/board/technexion/pico-imx7d/spl.c b/board/technexion/pico-imx7d/spl.c
index 6c432ca5a6..a651a00c1a 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/spl.c
@@ -5,7 +5,9 @@
  * Author: Richard Hu <richard.hu@technexion.com>
  */
 
+#include <common.h>
 #include <cpu_func.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/technexion/pico-imx8mq/Kconfig b/board/technexion/pico-imx8mq/Kconfig
new file mode 100644
index 0000000000..031fc1d563
--- /dev/null
+++ b/board/technexion/pico-imx8mq/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_PICO_IMX8MQ
+
+config SYS_BOARD
+	default "pico-imx8mq"
+
+config SYS_VENDOR
+	default "technexion"
+
+config SYS_CONFIG_NAME
+	default "pico-imx8mq"
+
+endif
diff --git a/board/technexion/pico-imx8mq/MAINTAINERS b/board/technexion/pico-imx8mq/MAINTAINERS
new file mode 100644
index 0000000000..626e7337a1
--- /dev/null
+++ b/board/technexion/pico-imx8mq/MAINTAINERS
@@ -0,0 +1,6 @@
+PICOPI IMX8MQ BOARD
+M:	Marek Vasut <marek.vasut@gmail.com>
+S:	Maintained
+F:	board/technexion/pico-imx8mq/
+F:	include/configs/pico-imx8mq.h
+F:	configs/pico-imx8mq_defconfig
diff --git a/board/technexion/pico-imx8mq/Makefile b/board/technexion/pico-imx8mq/Makefile
new file mode 100644
index 0000000000..7cfe1e02ef
--- /dev/null
+++ b/board/technexion/pico-imx8mq/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright 2017 NXP
+#
+# SPDX-License-Identifier:      GPL-2.0+
+#
+
+obj-y += pico-imx8mq.o
+
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+obj-$(CONFIG_IMX8M_LPDDR4) += lpddr4_timing_1gb.o lpddr4_timing_2gb.o lpddr4_timing_3gb.o lpddr4_timing_4gb.o
+endif
diff --git a/board/technexion/pico-imx8mq/README b/board/technexion/pico-imx8mq/README
new file mode 100644
index 0000000000..99fa332872
--- /dev/null
+++ b/board/technexion/pico-imx8mq/README
@@ -0,0 +1,52 @@
+U-Boot for the Technexion Pico i.MX8MQ
+
+Quick Start
+===========
+- Build the TFA binary
+- Get DDR and HDMI firmware
+- Build U-Boot
+- Boot
+
+Get and Build the TFA blob
+==========================
+Note: srctree is U-Boot source directory
+Get ATF from: https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git
+branch: master
+$ CROSS_COMPILE=aarch64-linux-gnu- make PLAT=imx8mq bl31
+$ cp build/imx8mq/release/bl31.bin $(builddir)
+
+Get the DDR and HDMI firmware
+=============================
+$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin
+$ chmod +x firmware-imx-7.9.bin
+$ ./firmware-imx-7.9.bin
+# Or use this to avoid running random scripts from the internet,
+# but note that you must agree to the license the script displays:
+# $ dd if=firmware-imx-7.9.bin of=firmware-imx-7.9.tar.bz2 bs=38868 skip=1
+# $ tar -xf firmware-imx-7.9.tar.bz2
+$ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(builddir)
+$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(builddir)
+
+Build U-Boot
+============
+$ export CROSS_COMPILE=aarch64-poky-linux-
+$ make pico-imx8mq_defconfig
+$ make flash.bin
+
+Burn the flash.bin to MicroSD card offset 33KB
+$ dd if=flash.bin of=/dev/mmcblkX bs=1024 seek=33
+Or into eMMC from a running system
+$ dhcp flash.bin && mmc write $loadaddr 0x42 0x800
+
+Boot
+====
+"o" denotes a pin
+"[]" denotes two pins bridged by a jumper
+
+eMMC boot:
+J1 o[] []o J2
+   []o o[]
+
+USB upload via USB-C connector:
+J1 ooo ooo J2
+   o[] []o
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing.h b/board/technexion/pico-imx8mq/lpddr4_timing.h
new file mode 100644
index 0000000000..89b0b927bc
--- /dev/null
+++ b/board/technexion/pico-imx8mq/lpddr4_timing.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#ifndef __LPDDR4_TIMING_H__
+#define __LPDDR4_TIMING_H__
+
+extern struct dram_timing_info dram_timing_1gb;
+extern struct dram_timing_info dram_timing_2gb;
+extern struct dram_timing_info dram_timing_3gb;
+extern struct dram_timing_info dram_timing_4gb;
+
+#endif /* __LPDDR4_TIMING_H__ */
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
new file mode 100644
index 0000000000..bcb852668c
--- /dev/null
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_1gb.c
@@ -0,0 +1,1734 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
+ */
+
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{0x3d400304, 0x1},
+	{0x3d400030, 0x1},
+	{0x3d400000, 0xa1080020},
+	{0x3d400028, 0x0},
+	{0x3d400020, 0x203},
+	{0x3d400024, 0x3e800},
+	{0x3d400064, 0x610090},
+	{0x3d4000d0, 0xc003061c},
+	{0x3d4000d4, 0x9e0000},
+	{0x3d4000dc, 0xd4002d},
+	{0x3d4000e0, 0x310008},
+	{0x3d4000e8, 0x66004a},
+	{0x3d4000ec, 0x16004a},
+	{0x3d400100, 0x1a201b22},
+	{0x3d400104, 0x60633},
+	{0x3d40010c, 0xc0c000},
+	{0x3d400110, 0xf04080f},
+	{0x3d400114, 0x2040c0c},
+	{0x3d400118, 0x1010007},
+	{0x3d40011c, 0x401},
+	{0x3d400130, 0x20600},
+	{0x3d400134, 0xc100002},
+	{0x3d400138, 0x96},
+	{0x3d400144, 0xa00050},
+	{0x3d400180, 0xc3200018},
+	{0x3d400184, 0x28061a8},
+	{0x3d400188, 0x0},
+	{0x3d400190, 0x497820a},
+	{0x3d400194, 0x80303},
+	{0x3d4001a0, 0xe0400018},
+	{0x3d4001a4, 0xdf00e4},
+	{0x3d4001a8, 0x80000000},
+	{0x3d4001b0, 0x11},
+	{0x3d4001b4, 0x170a},
+	{0x3d4001c0, 0x1},
+	{0x3d4001c4, 0x1},
+	{0x3d4000f4, 0x639},
+	{0x3d400108, 0x70e1617},
+	{0x3d400200, 0x1f},
+	{0x3d40020c, 0x0},
+	{0x3d400210, 0x1f1f},
+	{0x3d400204, 0x80808},
+	{0x3d400214, 0x7070707},
+	{0x3d400218, 0xf070707},
+	{0x3d402020, 0x1},
+	{0x3d402024, 0xd0c0},
+	{0x3d402050, 0x20d040},
+	{0x3d402064, 0x14001f},
+	{0x3d4020dc, 0x940009},
+	{0x3d4020e0, 0x310000},
+	{0x3d4020e8, 0x66004a},
+	{0x3d4020ec, 0x16004a},
+	{0x3d402100, 0xb070508},
+	{0x3d402104, 0x3040b},
+	{0x3d402108, 0x305090c},
+	{0x3d40210c, 0x505000},
+	{0x3d402110, 0x4040204},
+	{0x3d402114, 0x2030303},
+	{0x3d402118, 0x1010004},
+	{0x3d40211c, 0x301},
+	{0x3d402130, 0x20300},
+	{0x3d402134, 0xa100002},
+	{0x3d402138, 0x20},
+	{0x3d402144, 0x220011},
+	{0x3d402180, 0xc0a70006},
+	{0x3d402190, 0x3858202},
+	{0x3d402194, 0x80303},
+	{0x3d4021b4, 0x502},
+	{0x3d400244, 0x0},
+	{0x3d400250, 0x29001505},
+	{0x3d400254, 0x2c},
+	{0x3d40025c, 0x5900575b},
+	{0x3d400264, 0x90000096},
+	{0x3d40026c, 0x1000012c},
+	{0x3d400300, 0x16},
+	{0x3d400304, 0x0},
+	{0x3d40030c, 0x0},
+	{0x3d400320, 0x1},
+	{0x3d40036c, 0x11},
+	{0x3d400400, 0x111},
+	{0x3d400404, 0x10f3},
+	{0x3d400408, 0x72ff},
+	{0x3d400490, 0x1},
+	{0x3d400494, 0xe00},
+	{0x3d400498, 0x62ffff},
+	{0x3d40049c, 0xe00},
+	{0x3d4004a0, 0xffff},
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{0x100a0, 0x0},
+	{0x100a1, 0x1},
+	{0x100a2, 0x2},
+	{0x100a3, 0x3},
+	{0x100a4, 0x4},
+	{0x100a5, 0x5},
+	{0x100a6, 0x6},
+	{0x100a7, 0x7},
+	{0x110a0, 0x0},
+	{0x110a1, 0x1},
+	{0x110a2, 0x2},
+	{0x110a3, 0x3},
+	{0x110a4, 0x4},
+	{0x110a5, 0x5},
+	{0x110a6, 0x6},
+	{0x110a7, 0x7},
+	{0x120a0, 0x0},
+	{0x120a1, 0x1},
+	{0x120a2, 0x2},
+	{0x120a3, 0x3},
+	{0x120a4, 0x4},
+	{0x120a5, 0x5},
+	{0x120a6, 0x6},
+	{0x120a7, 0x7},
+	{0x130a0, 0x0},
+	{0x130a1, 0x1},
+	{0x130a2, 0x2},
+	{0x130a3, 0x3},
+	{0x130a4, 0x4},
+	{0x130a5, 0x5},
+	{0x130a6, 0x6},
+	{0x130a7, 0x7},
+	{0x20110, 0x2},
+	{0x20111, 0x3},
+	{0x20112, 0x4},
+	{0x20113, 0x5},
+	{0x20114, 0x0},
+	{0x20115, 0x1},
+	{0x1005f, 0x1ff},
+	{0x1015f, 0x1ff},
+	{0x1105f, 0x1ff},
+	{0x1115f, 0x1ff},
+	{0x1205f, 0x1ff},
+	{0x1215f, 0x1ff},
+	{0x1305f, 0x1ff},
+	{0x1315f, 0x1ff},
+	{0x11005f, 0x1ff},
+	{0x11015f, 0x1ff},
+	{0x11105f, 0x1ff},
+	{0x11115f, 0x1ff},
+	{0x11205f, 0x1ff},
+	{0x11215f, 0x1ff},
+	{0x11305f, 0x1ff},
+	{0x11315f, 0x1ff},
+	{0x55, 0x1ff},
+	{0x1055, 0x1ff},
+	{0x2055, 0x1ff},
+	{0x3055, 0x1ff},
+	{0x4055, 0x1ff},
+	{0x5055, 0x1ff},
+	{0x6055, 0x1ff},
+	{0x7055, 0x1ff},
+	{0x8055, 0x1ff},
+	{0x9055, 0x1ff},
+	{0x200c5, 0x19},
+	{0x1200c5, 0x7},
+	{0x2002e, 0x2},
+	{0x12002e, 0x1},
+	{0x90204, 0x0},
+	{0x190204, 0x0},
+	{0x20024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x120024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x20056, 0x3},
+	{0x120056, 0xa},
+	{0x1004d, 0xe00},
+	{0x1014d, 0xe00},
+	{0x1104d, 0xe00},
+	{0x1114d, 0xe00},
+	{0x1204d, 0xe00},
+	{0x1214d, 0xe00},
+	{0x1304d, 0xe00},
+	{0x1314d, 0xe00},
+	{0x11004d, 0xe00},
+	{0x11014d, 0xe00},
+	{0x11104d, 0xe00},
+	{0x11114d, 0xe00},
+	{0x11204d, 0xe00},
+	{0x11214d, 0xe00},
+	{0x11304d, 0xe00},
+	{0x11314d, 0xe00},
+	{0x10049, 0xeba},
+	{0x10149, 0xeba},
+	{0x11049, 0xeba},
+	{0x11149, 0xeba},
+	{0x12049, 0xeba},
+	{0x12149, 0xeba},
+	{0x13049, 0xeba},
+	{0x13149, 0xeba},
+	{0x110049, 0xeba},
+	{0x110149, 0xeba},
+	{0x111049, 0xeba},
+	{0x111149, 0xeba},
+	{0x112049, 0xeba},
+	{0x112149, 0xeba},
+	{0x113049, 0xeba},
+	{0x113149, 0xeba},
+	{0x43, 0x63},
+	{0x1043, 0x63},
+	{0x2043, 0x63},
+	{0x3043, 0x63},
+	{0x4043, 0x63},
+	{0x5043, 0x63},
+	{0x6043, 0x63},
+	{0x7043, 0x63},
+	{0x8043, 0x63},
+	{0x9043, 0x63},
+	{0x20018, 0x3},
+	{0x20075, 0x4},
+	{0x20050, 0x0},
+	{0x20008, 0x320},
+	{0x120008, 0xa7},
+	{0x20088, 0x9},
+	{0x200b2, 0xdc},
+	{0x10043, 0x5a1},
+	{0x10143, 0x5a1},
+	{0x11043, 0x5a1},
+	{0x11143, 0x5a1},
+	{0x12043, 0x5a1},
+	{0x12143, 0x5a1},
+	{0x13043, 0x5a1},
+	{0x13143, 0x5a1},
+	{0x1200b2, 0xdc},
+	{0x110043, 0x5a1},
+	{0x110143, 0x5a1},
+	{0x111043, 0x5a1},
+	{0x111143, 0x5a1},
+	{0x112043, 0x5a1},
+	{0x112143, 0x5a1},
+	{0x113043, 0x5a1},
+	{0x113143, 0x5a1},
+	{0x200fa, 0x1},
+	{0x1200fa, 0x1},
+	{0x20019, 0x1},
+	{0x120019, 0x1},
+	{0x200f0, 0x0},
+	{0x200f1, 0x0},
+	{0x200f2, 0x4444},
+	{0x200f3, 0x8888},
+	{0x200f4, 0x5555},
+	{0x200f5, 0x0},
+	{0x200f6, 0x0},
+	{0x200f7, 0xf000},
+	{0x20025, 0x0},
+	{0x2002d, 0x0},
+	{0x12002d, 0x0},
+	{0x200c7, 0x80},
+	{0x1200c7, 0x80},
+	{0x200ca, 0x106},
+	{0x1200ca, 0x106},
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
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+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x131f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54002, 0x1},
+	{0x54003, 0x29c},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x121f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x994},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x994},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0x9400},
+	{0x54033, 0x3109},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0x9400},
+	{0x54039, 0x3109},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x61},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400f, 0x100},
+	{0x54010, 0x1f7f},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{0xd0000, 0x0},
+	{0x90000, 0x10},
+	{0x90001, 0x400},
+	{0x90002, 0x10e},
+	{0x90003, 0x0},
+	{0x90004, 0x0},
+	{0x90005, 0x8},
+	{0x90029, 0xb},
+	{0x9002a, 0x480},
+	{0x9002b, 0x109},
+	{0x9002c, 0x8},
+	{0x9002d, 0x448},
+	{0x9002e, 0x139},
+	{0x9002f, 0x8},
+	{0x90030, 0x478},
+	{0x90031, 0x109},
+	{0x90032, 0x0},
+	{0x90033, 0xe8},
+	{0x90034, 0x109},
+	{0x90035, 0x2},
+	{0x90036, 0x10},
+	{0x90037, 0x139},
+	{0x90038, 0xf},
+	{0x90039, 0x7c0},
+	{0x9003a, 0x139},
+	{0x9003b, 0x44},
+	{0x9003c, 0x630},
+	{0x9003d, 0x159},
+	{0x9003e, 0x14f},
+	{0x9003f, 0x630},
+	{0x90040, 0x159},
+	{0x90041, 0x47},
+	{0x90042, 0x630},
+	{0x90043, 0x149},
+	{0x90044, 0x4f},
+	{0x90045, 0x630},
+	{0x90046, 0x179},
+	{0x90047, 0x8},
+	{0x90048, 0xe0},
+	{0x90049, 0x109},
+	{0x9004a, 0x0},
+	{0x9004b, 0x7c8},
+	{0x9004c, 0x109},
+	{0x9004d, 0x0},
+	{0x9004e, 0x1},
+	{0x9004f, 0x8},
+	{0x90050, 0x0},
+	{0x90051, 0x45a},
+	{0x90052, 0x9},
+	{0x90053, 0x0},
+	{0x90054, 0x448},
+	{0x90055, 0x109},
+	{0x90056, 0x40},
+	{0x90057, 0x630},
+	{0x90058, 0x179},
+	{0x90059, 0x1},
+	{0x9005a, 0x618},
+	{0x9005b, 0x109},
+	{0x9005c, 0x40c0},
+	{0x9005d, 0x630},
+	{0x9005e, 0x149},
+	{0x9005f, 0x8},
+	{0x90060, 0x4},
+	{0x90061, 0x48},
+	{0x90062, 0x4040},
+	{0x90063, 0x630},
+	{0x90064, 0x149},
+	{0x90065, 0x0},
+	{0x90066, 0x4},
+	{0x90067, 0x48},
+	{0x90068, 0x40},
+	{0x90069, 0x630},
+	{0x9006a, 0x149},
+	{0x9006b, 0x10},
+	{0x9006c, 0x4},
+	{0x9006d, 0x18},
+	{0x9006e, 0x0},
+	{0x9006f, 0x4},
+	{0x90070, 0x78},
+	{0x90071, 0x549},
+	{0x90072, 0x630},
+	{0x90073, 0x159},
+	{0x90074, 0xd49},
+	{0x90075, 0x630},
+	{0x90076, 0x159},
+	{0x90077, 0x94a},
+	{0x90078, 0x630},
+	{0x90079, 0x159},
+	{0x9007a, 0x441},
+	{0x9007b, 0x630},
+	{0x9007c, 0x149},
+	{0x9007d, 0x42},
+	{0x9007e, 0x630},
+	{0x9007f, 0x149},
+	{0x90080, 0x1},
+	{0x90081, 0x630},
+	{0x90082, 0x149},
+	{0x90083, 0x0},
+	{0x90084, 0xe0},
+	{0x90085, 0x109},
+	{0x90086, 0xa},
+	{0x90087, 0x10},
+	{0x90088, 0x109},
+	{0x90089, 0x9},
+	{0x9008a, 0x3c0},
+	{0x9008b, 0x149},
+	{0x9008c, 0x9},
+	{0x9008d, 0x3c0},
+	{0x9008e, 0x159},
+	{0x9008f, 0x18},
+	{0x90090, 0x10},
+	{0x90091, 0x109},
+	{0x90092, 0x0},
+	{0x90093, 0x3c0},
+	{0x90094, 0x109},
+	{0x90095, 0x18},
+	{0x90096, 0x4},
+	{0x90097, 0x48},
+	{0x90098, 0x18},
+	{0x90099, 0x4},
+	{0x9009a, 0x58},
+	{0x9009b, 0xa},
+	{0x9009c, 0x10},
+	{0x9009d, 0x109},
+	{0x9009e, 0x2},
+	{0x9009f, 0x10},
+	{0x900a0, 0x109},
+	{0x900a1, 0x5},
+	{0x900a2, 0x7c0},
+	{0x900a3, 0x109},
+	{0x900a4, 0x10},
+	{0x900a5, 0x10},
+	{0x900a6, 0x109},
+	{0x40000, 0x811},
+	{0x40020, 0x880},
+	{0x40040, 0x0},
+	{0x40060, 0x0},
+	{0x40001, 0x4008},
+	{0x40021, 0x83},
+	{0x40041, 0x4f},
+	{0x40061, 0x0},
+	{0x40002, 0x4040},
+	{0x40022, 0x83},
+	{0x40042, 0x51},
+	{0x40062, 0x0},
+	{0x40003, 0x811},
+	{0x40023, 0x880},
+	{0x40043, 0x0},
+	{0x40063, 0x0},
+	{0x40004, 0x720},
+	{0x40024, 0xf},
+	{0x40044, 0x1740},
+	{0x40064, 0x0},
+	{0x40005, 0x16},
+	{0x40025, 0x83},
+	{0x40045, 0x4b},
+	{0x40065, 0x0},
+	{0x40006, 0x716},
+	{0x40026, 0xf},
+	{0x40046, 0x2001},
+	{0x40066, 0x0},
+	{0x40007, 0x716},
+	{0x40027, 0xf},
+	{0x40047, 0x2800},
+	{0x40067, 0x0},
+	{0x40008, 0x716},
+	{0x40028, 0xf},
+	{0x40048, 0xf00},
+	{0x40068, 0x0},
+	{0x40009, 0x720},
+	{0x40029, 0xf},
+	{0x40049, 0x1400},
+	{0x40069, 0x0},
+	{0x4000a, 0xe08},
+	{0x4002a, 0xc15},
+	{0x4004a, 0x0},
+	{0x4006a, 0x0},
+	{0x4000b, 0x623},
+	{0x4002b, 0x15},
+	{0x4004b, 0x0},
+	{0x4006b, 0x0},
+	{0x4000c, 0x4028},
+	{0x4002c, 0x80},
+	{0x4004c, 0x0},
+	{0x4006c, 0x0},
+	{0x4000d, 0xe08},
+	{0x4002d, 0xc1a},
+	{0x4004d, 0x0},
+	{0x4006d, 0x0},
+	{0x4000e, 0x623},
+	{0x4002e, 0x1a},
+	{0x4004e, 0x0},
+	{0x4006e, 0x0},
+	{0x4000f, 0x4040},
+	{0x4002f, 0x80},
+	{0x4004f, 0x0},
+	{0x4006f, 0x0},
+	{0x40010, 0x2604},
+	{0x40030, 0x15},
+	{0x40050, 0x0},
+	{0x40070, 0x0},
+	{0x40011, 0x708},
+	{0x40031, 0x5},
+	{0x40051, 0x0},
+	{0x40071, 0x2002},
+	{0x40012, 0x8},
+	{0x40032, 0x80},
+	{0x40052, 0x0},
+	{0x40072, 0x0},
+	{0x40013, 0x2604},
+	{0x40033, 0x1a},
+	{0x40053, 0x0},
+	{0x40073, 0x0},
+	{0x40014, 0x708},
+	{0x40034, 0xa},
+	{0x40054, 0x0},
+	{0x40074, 0x2002},
+	{0x40015, 0x4040},
+	{0x40035, 0x80},
+	{0x40055, 0x0},
+	{0x40075, 0x0},
+	{0x40016, 0x60a},
+	{0x40036, 0x15},
+	{0x40056, 0x1200},
+	{0x40076, 0x0},
+	{0x40017, 0x61a},
+	{0x40037, 0x15},
+	{0x40057, 0x1300},
+	{0x40077, 0x0},
+	{0x40018, 0x60a},
+	{0x40038, 0x1a},
+	{0x40058, 0x1200},
+	{0x40078, 0x0},
+	{0x40019, 0x642},
+	{0x40039, 0x1a},
+	{0x40059, 0x1300},
+	{0x40079, 0x0},
+	{0x4001a, 0x4808},
+	{0x4003a, 0x880},
+	{0x4005a, 0x0},
+	{0x4007a, 0x0},
+	{0x900a7, 0x0},
+	{0x900a8, 0x790},
+	{0x900a9, 0x11a},
+	{0x900aa, 0x8},
+	{0x900ab, 0x7aa},
+	{0x900ac, 0x2a},
+	{0x900ad, 0x10},
+	{0x900ae, 0x7b2},
+	{0x900af, 0x2a},
+	{0x900b0, 0x0},
+	{0x900b1, 0x7c8},
+	{0x900b2, 0x109},
+	{0x900b3, 0x10},
+	{0x900b4, 0x2a8},
+	{0x900b5, 0x129},
+	{0x900b6, 0x8},
+	{0x900b7, 0x370},
+	{0x900b8, 0x129},
+	{0x900b9, 0xa},
+	{0x900ba, 0x3c8},
+	{0x900bb, 0x1a9},
+	{0x900bc, 0xc},
+	{0x900bd, 0x408},
+	{0x900be, 0x199},
+	{0x900bf, 0x14},
+	{0x900c0, 0x790},
+	{0x900c1, 0x11a},
+	{0x900c2, 0x8},
+	{0x900c3, 0x4},
+	{0x900c4, 0x18},
+	{0x900c5, 0xe},
+	{0x900c6, 0x408},
+	{0x900c7, 0x199},
+	{0x900c8, 0x8},
+	{0x900c9, 0x8568},
+	{0x900ca, 0x108},
+	{0x900cb, 0x18},
+	{0x900cc, 0x790},
+	{0x900cd, 0x16a},
+	{0x900ce, 0x8},
+	{0x900cf, 0x1d8},
+	{0x900d0, 0x169},
+	{0x900d1, 0x10},
+	{0x900d2, 0x8558},
+	{0x900d3, 0x168},
+	{0x900d4, 0x70},
+	{0x900d5, 0x788},
+	{0x900d6, 0x16a},
+	{0x900d7, 0x1ff8},
+	{0x900d8, 0x85a8},
+	{0x900d9, 0x1e8},
+	{0x900da, 0x50},
+	{0x900db, 0x798},
+	{0x900dc, 0x16a},
+	{0x900dd, 0x60},
+	{0x900de, 0x7a0},
+	{0x900df, 0x16a},
+	{0x900e0, 0x8},
+	{0x900e1, 0x8310},
+	{0x900e2, 0x168},
+	{0x900e3, 0x8},
+	{0x900e4, 0xa310},
+	{0x900e5, 0x168},
+	{0x900e6, 0xa},
+	{0x900e7, 0x408},
+	{0x900e8, 0x169},
+	{0x900e9, 0x6e},
+	{0x900ea, 0x0},
+	{0x900eb, 0x68},
+	{0x900ec, 0x0},
+	{0x900ed, 0x408},
+	{0x900ee, 0x169},
+	{0x900ef, 0x0},
+	{0x900f0, 0x8310},
+	{0x900f1, 0x168},
+	{0x900f2, 0x0},
+	{0x900f3, 0xa310},
+	{0x900f4, 0x168},
+	{0x900f5, 0x1ff8},
+	{0x900f6, 0x85a8},
+	{0x900f7, 0x1e8},
+	{0x900f8, 0x68},
+	{0x900f9, 0x798},
+	{0x900fa, 0x16a},
+	{0x900fb, 0x78},
+	{0x900fc, 0x7a0},
+	{0x900fd, 0x16a},
+	{0x900fe, 0x68},
+	{0x900ff, 0x790},
+	{0x90100, 0x16a},
+	{0x90101, 0x8},
+	{0x90102, 0x8b10},
+	{0x90103, 0x168},
+	{0x90104, 0x8},
+	{0x90105, 0xab10},
+	{0x90106, 0x168},
+	{0x90107, 0xa},
+	{0x90108, 0x408},
+	{0x90109, 0x169},
+	{0x9010a, 0x58},
+	{0x9010b, 0x0},
+	{0x9010c, 0x68},
+	{0x9010d, 0x0},
+	{0x9010e, 0x408},
+	{0x9010f, 0x169},
+	{0x90110, 0x0},
+	{0x90111, 0x8b10},
+	{0x90112, 0x168},
+	{0x90113, 0x0},
+	{0x90114, 0xab10},
+	{0x90115, 0x168},
+	{0x90116, 0x0},
+	{0x90117, 0x1d8},
+	{0x90118, 0x169},
+	{0x90119, 0x80},
+	{0x9011a, 0x790},
+	{0x9011b, 0x16a},
+	{0x9011c, 0x18},
+	{0x9011d, 0x7aa},
+	{0x9011e, 0x6a},
+	{0x9011f, 0xa},
+	{0x90120, 0x0},
+	{0x90121, 0x1e9},
+	{0x90122, 0x8},
+	{0x90123, 0x8080},
+	{0x90124, 0x108},
+	{0x90125, 0xf},
+	{0x90126, 0x408},
+	{0x90127, 0x169},
+	{0x90128, 0xc},
+	{0x90129, 0x0},
+	{0x9012a, 0x68},
+	{0x9012b, 0x9},
+	{0x9012c, 0x0},
+	{0x9012d, 0x1a9},
+	{0x9012e, 0x0},
+	{0x9012f, 0x408},
+	{0x90130, 0x169},
+	{0x90131, 0x0},
+	{0x90132, 0x8080},
+	{0x90133, 0x108},
+	{0x90134, 0x8},
+	{0x90135, 0x7aa},
+	{0x90136, 0x6a},
+	{0x90137, 0x0},
+	{0x90138, 0x8568},
+	{0x90139, 0x108},
+	{0x9013a, 0xb7},
+	{0x9013b, 0x790},
+	{0x9013c, 0x16a},
+	{0x9013d, 0x1f},
+	{0x9013e, 0x0},
+	{0x9013f, 0x68},
+	{0x90140, 0x8},
+	{0x90141, 0x8558},
+	{0x90142, 0x168},
+	{0x90143, 0xf},
+	{0x90144, 0x408},
+	{0x90145, 0x169},
+	{0x90146, 0xc},
+	{0x90147, 0x0},
+	{0x90148, 0x68},
+	{0x90149, 0x0},
+	{0x9014a, 0x408},
+	{0x9014b, 0x169},
+	{0x9014c, 0x0},
+	{0x9014d, 0x8558},
+	{0x9014e, 0x168},
+	{0x9014f, 0x8},
+	{0x90150, 0x3c8},
+	{0x90151, 0x1a9},
+	{0x90152, 0x3},
+	{0x90153, 0x370},
+	{0x90154, 0x129},
+	{0x90155, 0x20},
+	{0x90156, 0x2aa},
+	{0x90157, 0x9},
+	{0x90158, 0x0},
+	{0x90159, 0x400},
+	{0x9015a, 0x10e},
+	{0x9015b, 0x8},
+	{0x9015c, 0xe8},
+	{0x9015d, 0x109},
+	{0x9015e, 0x0},
+	{0x9015f, 0x8140},
+	{0x90160, 0x10c},
+	{0x90161, 0x10},
+	{0x90162, 0x8138},
+	{0x90163, 0x10c},
+	{0x90164, 0x8},
+	{0x90165, 0x7c8},
+	{0x90166, 0x101},
+	{0x90167, 0x8},
+	{0x90168, 0x0},
+	{0x90169, 0x8},
+	{0x9016a, 0x8},
+	{0x9016b, 0x448},
+	{0x9016c, 0x109},
+	{0x9016d, 0xf},
+	{0x9016e, 0x7c0},
+	{0x9016f, 0x109},
+	{0x90170, 0x0},
+	{0x90171, 0xe8},
+	{0x90172, 0x109},
+	{0x90173, 0x47},
+	{0x90174, 0x630},
+	{0x90175, 0x109},
+	{0x90176, 0x8},
+	{0x90177, 0x618},
+	{0x90178, 0x109},
+	{0x90179, 0x8},
+	{0x9017a, 0xe0},
+	{0x9017b, 0x109},
+	{0x9017c, 0x0},
+	{0x9017d, 0x7c8},
+	{0x9017e, 0x109},
+	{0x9017f, 0x8},
+	{0x90180, 0x8140},
+	{0x90181, 0x10c},
+	{0x90182, 0x0},
+	{0x90183, 0x1},
+	{0x90184, 0x8},
+	{0x90185, 0x8},
+	{0x90186, 0x4},
+	{0x90187, 0x8},
+	{0x90188, 0x8},
+	{0x90189, 0x7c8},
+	{0x9018a, 0x101},
+	{0x90006, 0x0},
+	{0x90007, 0x0},
+	{0x90008, 0x8},
+	{0x90009, 0x0},
+	{0x9000a, 0x0},
+	{0x9000b, 0x0},
+	{0xd00e7, 0x400},
+	{0x90017, 0x0},
+	{0x9001f, 0x2a},
+	{0x90026, 0x6a},
+	{0x400d0, 0x0},
+	{0x400d1, 0x101},
+	{0x400d2, 0x105},
+	{0x400d3, 0x107},
+	{0x400d4, 0x10f},
+	{0x400d5, 0x202},
+	{0x400d6, 0x20a},
+	{0x400d7, 0x20b},
+	{0x2003a, 0x2},
+	{0x2000b, 0x64},
+	{0x2000c, 0xc8},
+	{0x2000d, 0x7d0},
+	{0x2000e, 0x2c},
+	{0x12000b, 0x14},
+	{0x12000c, 0x29},
+	{0x12000d, 0x1a1},
+	{0x12000e, 0x10},
+	{0x9000c, 0x0},
+	{0x9000d, 0x173},
+	{0x9000e, 0x60},
+	{0x9000f, 0x6110},
+	{0x90010, 0x2152},
+	{0x90011, 0xdfbd},
+	{0x90012, 0x60},
+	{0x90013, 0x6152},
+	{0x20010, 0x5a},
+	{0x20011, 0x3},
+	{0x120010, 0x5a},
+	{0x120011, 0x3},
+	{0x40080, 0xe0},
+	{0x40081, 0x12},
+	{0x40082, 0xe0},
+	{0x40083, 0x12},
+	{0x40084, 0xe0},
+	{0x40085, 0x12},
+	{0x140080, 0xe0},
+	{0x140081, 0x12},
+	{0x140082, 0xe0},
+	{0x140083, 0x12},
+	{0x140084, 0xe0},
+	{0x140085, 0x12},
+	{0x400fd, 0xf},
+	{0x10011, 0x1},
+	{0x10012, 0x1},
+	{0x10013, 0x180},
+	{0x10018, 0x1},
+	{0x10002, 0x6209},
+	{0x100b2, 0x1},
+	{0x101b4, 0x1},
+	{0x102b4, 0x1},
+	{0x103b4, 0x1},
+	{0x104b4, 0x1},
+	{0x105b4, 0x1},
+	{0x106b4, 0x1},
+	{0x107b4, 0x1},
+	{0x108b4, 0x1},
+	{0x11011, 0x1},
+	{0x11012, 0x1},
+	{0x11013, 0x180},
+	{0x11018, 0x1},
+	{0x11002, 0x6209},
+	{0x110b2, 0x1},
+	{0x111b4, 0x1},
+	{0x112b4, 0x1},
+	{0x113b4, 0x1},
+	{0x114b4, 0x1},
+	{0x115b4, 0x1},
+	{0x116b4, 0x1},
+	{0x117b4, 0x1},
+	{0x118b4, 0x1},
+	{0x12011, 0x1},
+	{0x12012, 0x1},
+	{0x12013, 0x180},
+	{0x12018, 0x1},
+	{0x12002, 0x6209},
+	{0x120b2, 0x1},
+	{0x121b4, 0x1},
+	{0x122b4, 0x1},
+	{0x123b4, 0x1},
+	{0x124b4, 0x1},
+	{0x125b4, 0x1},
+	{0x126b4, 0x1},
+	{0x127b4, 0x1},
+	{0x128b4, 0x1},
+	{0x13011, 0x1},
+	{0x13012, 0x1},
+	{0x13013, 0x180},
+	{0x13018, 0x1},
+	{0x13002, 0x6209},
+	{0x130b2, 0x1},
+	{0x131b4, 0x1},
+	{0x132b4, 0x1},
+	{0x133b4, 0x1},
+	{0x134b4, 0x1},
+	{0x135b4, 0x1},
+	{0x136b4, 0x1},
+	{0x137b4, 0x1},
+	{0x138b4, 0x1},
+	{0x2003a, 0x2},
+	{0xc0080, 0x2},
+	{0xd0000, 0x1}
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 3200mts 1D */
+		.drate = 3200,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 667mts 1D */
+		.drate = 667,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P0 3200mts 2D */
+		.drate = 3200,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing_1gb = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3200, 667, },
+};
+
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
new file mode 100644
index 0000000000..9a8a323d63
--- /dev/null
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_2gb.c
@@ -0,0 +1,1734 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
+ */
+
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{0x3d400304, 0x1},
+	{0x3d400030, 0x1},
+	{0x3d400000, 0xa1080020},
+	{0x3d400028, 0x0},
+	{0x3d400020, 0x203},
+	{0x3d400024, 0x3e800},
+	{0x3d400064, 0x6100e0},
+	{0x3d4000d0, 0xc003061c},
+	{0x3d4000d4, 0x9e0000},
+	{0x3d4000dc, 0xd4002d},
+	{0x3d4000e0, 0x310008},
+	{0x3d4000e8, 0x66004a},
+	{0x3d4000ec, 0x16004a},
+	{0x3d400100, 0x1a201b22},
+	{0x3d400104, 0x60633},
+	{0x3d40010c, 0xc0c000},
+	{0x3d400110, 0xf04080f},
+	{0x3d400114, 0x2040c0c},
+	{0x3d400118, 0x1010007},
+	{0x3d40011c, 0x401},
+	{0x3d400130, 0x20600},
+	{0x3d400134, 0xc100002},
+	{0x3d400138, 0xe6},
+	{0x3d400144, 0xa00050},
+	{0x3d400180, 0xc3200018},
+	{0x3d400184, 0x28061a8},
+	{0x3d400188, 0x0},
+	{0x3d400190, 0x497820a},
+	{0x3d400194, 0x80303},
+	{0x3d4001a0, 0xe0400018},
+	{0x3d4001a4, 0xdf00e4},
+	{0x3d4001a8, 0x80000000},
+	{0x3d4001b0, 0x11},
+	{0x3d4001b4, 0x170a},
+	{0x3d4001c0, 0x1},
+	{0x3d4001c4, 0x1},
+	{0x3d4000f4, 0x639},
+	{0x3d400108, 0x70e1617},
+	{0x3d400200, 0x1f},
+	{0x3d40020c, 0x0},
+	{0x3d400210, 0x1f1f},
+	{0x3d400204, 0x80808},
+	{0x3d400214, 0x7070707},
+	{0x3d400218, 0x7070707},
+	{0x3d402020, 0x1},
+	{0x3d402024, 0xd0c0},
+	{0x3d402050, 0x20d040},
+	{0x3d402064, 0x14002f},
+	{0x3d4020dc, 0x940009},
+	{0x3d4020e0, 0x310000},
+	{0x3d4020e8, 0x66004a},
+	{0x3d4020ec, 0x16004a},
+	{0x3d402100, 0xb070508},
+	{0x3d402104, 0x3040b},
+	{0x3d402108, 0x305090c},
+	{0x3d40210c, 0x505000},
+	{0x3d402110, 0x4040204},
+	{0x3d402114, 0x2030303},
+	{0x3d402118, 0x1010004},
+	{0x3d40211c, 0x301},
+	{0x3d402130, 0x20300},
+	{0x3d402134, 0xa100002},
+	{0x3d402138, 0x31},
+	{0x3d402144, 0x220011},
+	{0x3d402180, 0xc0a70006},
+	{0x3d402190, 0x3858202},
+	{0x3d402194, 0x80303},
+	{0x3d4021b4, 0x502},
+	{0x3d400244, 0x0},
+	{0x3d400250, 0x29001505},
+	{0x3d400254, 0x2c},
+	{0x3d40025c, 0x5900575b},
+	{0x3d400264, 0x90000096},
+	{0x3d40026c, 0x1000012c},
+	{0x3d400300, 0x16},
+	{0x3d400304, 0x0},
+	{0x3d40030c, 0x0},
+	{0x3d400320, 0x1},
+	{0x3d40036c, 0x11},
+	{0x3d400400, 0x111},
+	{0x3d400404, 0x10f3},
+	{0x3d400408, 0x72ff},
+	{0x3d400490, 0x1},
+	{0x3d400494, 0xe00},
+	{0x3d400498, 0x62ffff},
+	{0x3d40049c, 0xe00},
+	{0x3d4004a0, 0xffff},
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{0x100a0, 0x0},
+	{0x100a1, 0x1},
+	{0x100a2, 0x2},
+	{0x100a3, 0x3},
+	{0x100a4, 0x4},
+	{0x100a5, 0x5},
+	{0x100a6, 0x6},
+	{0x100a7, 0x7},
+	{0x110a0, 0x0},
+	{0x110a1, 0x1},
+	{0x110a2, 0x2},
+	{0x110a3, 0x3},
+	{0x110a4, 0x4},
+	{0x110a5, 0x5},
+	{0x110a6, 0x6},
+	{0x110a7, 0x7},
+	{0x120a0, 0x0},
+	{0x120a1, 0x1},
+	{0x120a2, 0x2},
+	{0x120a3, 0x3},
+	{0x120a4, 0x4},
+	{0x120a5, 0x5},
+	{0x120a6, 0x6},
+	{0x120a7, 0x7},
+	{0x130a0, 0x0},
+	{0x130a1, 0x1},
+	{0x130a2, 0x2},
+	{0x130a3, 0x3},
+	{0x130a4, 0x4},
+	{0x130a5, 0x5},
+	{0x130a6, 0x6},
+	{0x130a7, 0x7},
+	{0x20110, 0x2},
+	{0x20111, 0x3},
+	{0x20112, 0x4},
+	{0x20113, 0x5},
+	{0x20114, 0x0},
+	{0x20115, 0x1},
+	{0x1005f, 0x1ff},
+	{0x1015f, 0x1ff},
+	{0x1105f, 0x1ff},
+	{0x1115f, 0x1ff},
+	{0x1205f, 0x1ff},
+	{0x1215f, 0x1ff},
+	{0x1305f, 0x1ff},
+	{0x1315f, 0x1ff},
+	{0x11005f, 0x1ff},
+	{0x11015f, 0x1ff},
+	{0x11105f, 0x1ff},
+	{0x11115f, 0x1ff},
+	{0x11205f, 0x1ff},
+	{0x11215f, 0x1ff},
+	{0x11305f, 0x1ff},
+	{0x11315f, 0x1ff},
+	{0x55, 0x1ff},
+	{0x1055, 0x1ff},
+	{0x2055, 0x1ff},
+	{0x3055, 0x1ff},
+	{0x4055, 0x1ff},
+	{0x5055, 0x1ff},
+	{0x6055, 0x1ff},
+	{0x7055, 0x1ff},
+	{0x8055, 0x1ff},
+	{0x9055, 0x1ff},
+	{0x200c5, 0x19},
+	{0x1200c5, 0x7},
+	{0x2002e, 0x2},
+	{0x12002e, 0x1},
+	{0x90204, 0x0},
+	{0x190204, 0x0},
+	{0x20024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x120024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x20056, 0x3},
+	{0x120056, 0xa},
+	{0x1004d, 0xe00},
+	{0x1014d, 0xe00},
+	{0x1104d, 0xe00},
+	{0x1114d, 0xe00},
+	{0x1204d, 0xe00},
+	{0x1214d, 0xe00},
+	{0x1304d, 0xe00},
+	{0x1314d, 0xe00},
+	{0x11004d, 0xe00},
+	{0x11014d, 0xe00},
+	{0x11104d, 0xe00},
+	{0x11114d, 0xe00},
+	{0x11204d, 0xe00},
+	{0x11214d, 0xe00},
+	{0x11304d, 0xe00},
+	{0x11314d, 0xe00},
+	{0x10049, 0xeba},
+	{0x10149, 0xeba},
+	{0x11049, 0xeba},
+	{0x11149, 0xeba},
+	{0x12049, 0xeba},
+	{0x12149, 0xeba},
+	{0x13049, 0xeba},
+	{0x13149, 0xeba},
+	{0x110049, 0xeba},
+	{0x110149, 0xeba},
+	{0x111049, 0xeba},
+	{0x111149, 0xeba},
+	{0x112049, 0xeba},
+	{0x112149, 0xeba},
+	{0x113049, 0xeba},
+	{0x113149, 0xeba},
+	{0x43, 0x63},
+	{0x1043, 0x63},
+	{0x2043, 0x63},
+	{0x3043, 0x63},
+	{0x4043, 0x63},
+	{0x5043, 0x63},
+	{0x6043, 0x63},
+	{0x7043, 0x63},
+	{0x8043, 0x63},
+	{0x9043, 0x63},
+	{0x20018, 0x3},
+	{0x20075, 0x4},
+	{0x20050, 0x0},
+	{0x20008, 0x320},
+	{0x120008, 0xa7},
+	{0x20088, 0x9},
+	{0x200b2, 0xdc},
+	{0x10043, 0x5a1},
+	{0x10143, 0x5a1},
+	{0x11043, 0x5a1},
+	{0x11143, 0x5a1},
+	{0x12043, 0x5a1},
+	{0x12143, 0x5a1},
+	{0x13043, 0x5a1},
+	{0x13143, 0x5a1},
+	{0x1200b2, 0xdc},
+	{0x110043, 0x5a1},
+	{0x110143, 0x5a1},
+	{0x111043, 0x5a1},
+	{0x111143, 0x5a1},
+	{0x112043, 0x5a1},
+	{0x112143, 0x5a1},
+	{0x113043, 0x5a1},
+	{0x113143, 0x5a1},
+	{0x200fa, 0x1},
+	{0x1200fa, 0x1},
+	{0x20019, 0x1},
+	{0x120019, 0x1},
+	{0x200f0, 0x0},
+	{0x200f1, 0x0},
+	{0x200f2, 0x4444},
+	{0x200f3, 0x8888},
+	{0x200f4, 0x5555},
+	{0x200f5, 0x0},
+	{0x200f6, 0x0},
+	{0x200f7, 0xf000},
+	{0x20025, 0x0},
+	{0x2002d, 0x0},
+	{0x12002d, 0x0},
+	{0x200c7, 0x80},
+	{0x1200c7, 0x80},
+	{0x200ca, 0x106},
+	{0x1200ca, 0x106},
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
+	{ 0x12180, 0x0 },
+	{ 0x112180, 0x0 },
+	{ 0x212180, 0x0 },
+	{ 0x13080, 0x0 },
+	{ 0x113080, 0x0 },
+	{ 0x213080, 0x0 },
+	{ 0x13180, 0x0 },
+	{ 0x113180, 0x0 },
+	{ 0x213180, 0x0 },
+	{ 0x10081, 0x0 },
+	{ 0x110081, 0x0 },
+	{ 0x210081, 0x0 },
+	{ 0x10181, 0x0 },
+	{ 0x110181, 0x0 },
+	{ 0x210181, 0x0 },
+	{ 0x11081, 0x0 },
+	{ 0x111081, 0x0 },
+	{ 0x211081, 0x0 },
+	{ 0x11181, 0x0 },
+	{ 0x111181, 0x0 },
+	{ 0x211181, 0x0 },
+	{ 0x12081, 0x0 },
+	{ 0x112081, 0x0 },
+	{ 0x212081, 0x0 },
+	{ 0x12181, 0x0 },
+	{ 0x112181, 0x0 },
+	{ 0x212181, 0x0 },
+	{ 0x13081, 0x0 },
+	{ 0x113081, 0x0 },
+	{ 0x213081, 0x0 },
+	{ 0x13181, 0x0 },
+	{ 0x113181, 0x0 },
+	{ 0x213181, 0x0 },
+	{ 0x100d0, 0x0 },
+	{ 0x1100d0, 0x0 },
+	{ 0x2100d0, 0x0 },
+	{ 0x101d0, 0x0 },
+	{ 0x1101d0, 0x0 },
+	{ 0x2101d0, 0x0 },
+	{ 0x110d0, 0x0 },
+	{ 0x1110d0, 0x0 },
+	{ 0x2110d0, 0x0 },
+	{ 0x111d0, 0x0 },
+	{ 0x1111d0, 0x0 },
+	{ 0x2111d0, 0x0 },
+	{ 0x120d0, 0x0 },
+	{ 0x1120d0, 0x0 },
+	{ 0x2120d0, 0x0 },
+	{ 0x121d0, 0x0 },
+	{ 0x1121d0, 0x0 },
+	{ 0x2121d0, 0x0 },
+	{ 0x130d0, 0x0 },
+	{ 0x1130d0, 0x0 },
+	{ 0x2130d0, 0x0 },
+	{ 0x131d0, 0x0 },
+	{ 0x1131d0, 0x0 },
+	{ 0x2131d0, 0x0 },
+	{ 0x100d1, 0x0 },
+	{ 0x1100d1, 0x0 },
+	{ 0x2100d1, 0x0 },
+	{ 0x101d1, 0x0 },
+	{ 0x1101d1, 0x0 },
+	{ 0x2101d1, 0x0 },
+	{ 0x110d1, 0x0 },
+	{ 0x1110d1, 0x0 },
+	{ 0x2110d1, 0x0 },
+	{ 0x111d1, 0x0 },
+	{ 0x1111d1, 0x0 },
+	{ 0x2111d1, 0x0 },
+	{ 0x120d1, 0x0 },
+	{ 0x1120d1, 0x0 },
+	{ 0x2120d1, 0x0 },
+	{ 0x121d1, 0x0 },
+	{ 0x1121d1, 0x0 },
+	{ 0x2121d1, 0x0 },
+	{ 0x130d1, 0x0 },
+	{ 0x1130d1, 0x0 },
+	{ 0x2130d1, 0x0 },
+	{ 0x131d1, 0x0 },
+	{ 0x1131d1, 0x0 },
+	{ 0x2131d1, 0x0 },
+	{ 0x10068, 0x0 },
+	{ 0x10168, 0x0 },
+	{ 0x10268, 0x0 },
+	{ 0x10368, 0x0 },
+	{ 0x10468, 0x0 },
+	{ 0x10568, 0x0 },
+	{ 0x10668, 0x0 },
+	{ 0x10768, 0x0 },
+	{ 0x10868, 0x0 },
+	{ 0x11068, 0x0 },
+	{ 0x11168, 0x0 },
+	{ 0x11268, 0x0 },
+	{ 0x11368, 0x0 },
+	{ 0x11468, 0x0 },
+	{ 0x11568, 0x0 },
+	{ 0x11668, 0x0 },
+	{ 0x11768, 0x0 },
+	{ 0x11868, 0x0 },
+	{ 0x12068, 0x0 },
+	{ 0x12168, 0x0 },
+	{ 0x12268, 0x0 },
+	{ 0x12368, 0x0 },
+	{ 0x12468, 0x0 },
+	{ 0x12568, 0x0 },
+	{ 0x12668, 0x0 },
+	{ 0x12768, 0x0 },
+	{ 0x12868, 0x0 },
+	{ 0x13068, 0x0 },
+	{ 0x13168, 0x0 },
+	{ 0x13268, 0x0 },
+	{ 0x13368, 0x0 },
+	{ 0x13468, 0x0 },
+	{ 0x13568, 0x0 },
+	{ 0x13668, 0x0 },
+	{ 0x13768, 0x0 },
+	{ 0x13868, 0x0 },
+	{ 0x10069, 0x0 },
+	{ 0x10169, 0x0 },
+	{ 0x10269, 0x0 },
+	{ 0x10369, 0x0 },
+	{ 0x10469, 0x0 },
+	{ 0x10569, 0x0 },
+	{ 0x10669, 0x0 },
+	{ 0x10769, 0x0 },
+	{ 0x10869, 0x0 },
+	{ 0x11069, 0x0 },
+	{ 0x11169, 0x0 },
+	{ 0x11269, 0x0 },
+	{ 0x11369, 0x0 },
+	{ 0x11469, 0x0 },
+	{ 0x11569, 0x0 },
+	{ 0x11669, 0x0 },
+	{ 0x11769, 0x0 },
+	{ 0x11869, 0x0 },
+	{ 0x12069, 0x0 },
+	{ 0x12169, 0x0 },
+	{ 0x12269, 0x0 },
+	{ 0x12369, 0x0 },
+	{ 0x12469, 0x0 },
+	{ 0x12569, 0x0 },
+	{ 0x12669, 0x0 },
+	{ 0x12769, 0x0 },
+	{ 0x12869, 0x0 },
+	{ 0x13069, 0x0 },
+	{ 0x13169, 0x0 },
+	{ 0x13269, 0x0 },
+	{ 0x13369, 0x0 },
+	{ 0x13469, 0x0 },
+	{ 0x13569, 0x0 },
+	{ 0x13669, 0x0 },
+	{ 0x13769, 0x0 },
+	{ 0x13869, 0x0 },
+	{ 0x1008c, 0x0 },
+	{ 0x11008c, 0x0 },
+	{ 0x21008c, 0x0 },
+	{ 0x1018c, 0x0 },
+	{ 0x11018c, 0x0 },
+	{ 0x21018c, 0x0 },
+	{ 0x1108c, 0x0 },
+	{ 0x11108c, 0x0 },
+	{ 0x21108c, 0x0 },
+	{ 0x1118c, 0x0 },
+	{ 0x11118c, 0x0 },
+	{ 0x21118c, 0x0 },
+	{ 0x1208c, 0x0 },
+	{ 0x11208c, 0x0 },
+	{ 0x21208c, 0x0 },
+	{ 0x1218c, 0x0 },
+	{ 0x11218c, 0x0 },
+	{ 0x21218c, 0x0 },
+	{ 0x1308c, 0x0 },
+	{ 0x11308c, 0x0 },
+	{ 0x21308c, 0x0 },
+	{ 0x1318c, 0x0 },
+	{ 0x11318c, 0x0 },
+	{ 0x21318c, 0x0 },
+	{ 0x1008d, 0x0 },
+	{ 0x11008d, 0x0 },
+	{ 0x21008d, 0x0 },
+	{ 0x1018d, 0x0 },
+	{ 0x11018d, 0x0 },
+	{ 0x21018d, 0x0 },
+	{ 0x1108d, 0x0 },
+	{ 0x11108d, 0x0 },
+	{ 0x21108d, 0x0 },
+	{ 0x1118d, 0x0 },
+	{ 0x11118d, 0x0 },
+	{ 0x21118d, 0x0 },
+	{ 0x1208d, 0x0 },
+	{ 0x11208d, 0x0 },
+	{ 0x21208d, 0x0 },
+	{ 0x1218d, 0x0 },
+	{ 0x11218d, 0x0 },
+	{ 0x21218d, 0x0 },
+	{ 0x1308d, 0x0 },
+	{ 0x11308d, 0x0 },
+	{ 0x21308d, 0x0 },
+	{ 0x1318d, 0x0 },
+	{ 0x11318d, 0x0 },
+	{ 0x21318d, 0x0 },
+	{ 0x100c0, 0x0 },
+	{ 0x1100c0, 0x0 },
+	{ 0x2100c0, 0x0 },
+	{ 0x101c0, 0x0 },
+	{ 0x1101c0, 0x0 },
+	{ 0x2101c0, 0x0 },
+	{ 0x102c0, 0x0 },
+	{ 0x1102c0, 0x0 },
+	{ 0x2102c0, 0x0 },
+	{ 0x103c0, 0x0 },
+	{ 0x1103c0, 0x0 },
+	{ 0x2103c0, 0x0 },
+	{ 0x104c0, 0x0 },
+	{ 0x1104c0, 0x0 },
+	{ 0x2104c0, 0x0 },
+	{ 0x105c0, 0x0 },
+	{ 0x1105c0, 0x0 },
+	{ 0x2105c0, 0x0 },
+	{ 0x106c0, 0x0 },
+	{ 0x1106c0, 0x0 },
+	{ 0x2106c0, 0x0 },
+	{ 0x107c0, 0x0 },
+	{ 0x1107c0, 0x0 },
+	{ 0x2107c0, 0x0 },
+	{ 0x108c0, 0x0 },
+	{ 0x1108c0, 0x0 },
+	{ 0x2108c0, 0x0 },
+	{ 0x110c0, 0x0 },
+	{ 0x1110c0, 0x0 },
+	{ 0x2110c0, 0x0 },
+	{ 0x111c0, 0x0 },
+	{ 0x1111c0, 0x0 },
+	{ 0x2111c0, 0x0 },
+	{ 0x112c0, 0x0 },
+	{ 0x1112c0, 0x0 },
+	{ 0x2112c0, 0x0 },
+	{ 0x113c0, 0x0 },
+	{ 0x1113c0, 0x0 },
+	{ 0x2113c0, 0x0 },
+	{ 0x114c0, 0x0 },
+	{ 0x1114c0, 0x0 },
+	{ 0x2114c0, 0x0 },
+	{ 0x115c0, 0x0 },
+	{ 0x1115c0, 0x0 },
+	{ 0x2115c0, 0x0 },
+	{ 0x116c0, 0x0 },
+	{ 0x1116c0, 0x0 },
+	{ 0x2116c0, 0x0 },
+	{ 0x117c0, 0x0 },
+	{ 0x1117c0, 0x0 },
+	{ 0x2117c0, 0x0 },
+	{ 0x118c0, 0x0 },
+	{ 0x1118c0, 0x0 },
+	{ 0x2118c0, 0x0 },
+	{ 0x120c0, 0x0 },
+	{ 0x1120c0, 0x0 },
+	{ 0x2120c0, 0x0 },
+	{ 0x121c0, 0x0 },
+	{ 0x1121c0, 0x0 },
+	{ 0x2121c0, 0x0 },
+	{ 0x122c0, 0x0 },
+	{ 0x1122c0, 0x0 },
+	{ 0x2122c0, 0x0 },
+	{ 0x123c0, 0x0 },
+	{ 0x1123c0, 0x0 },
+	{ 0x2123c0, 0x0 },
+	{ 0x124c0, 0x0 },
+	{ 0x1124c0, 0x0 },
+	{ 0x2124c0, 0x0 },
+	{ 0x125c0, 0x0 },
+	{ 0x1125c0, 0x0 },
+	{ 0x2125c0, 0x0 },
+	{ 0x126c0, 0x0 },
+	{ 0x1126c0, 0x0 },
+	{ 0x2126c0, 0x0 },
+	{ 0x127c0, 0x0 },
+	{ 0x1127c0, 0x0 },
+	{ 0x2127c0, 0x0 },
+	{ 0x128c0, 0x0 },
+	{ 0x1128c0, 0x0 },
+	{ 0x2128c0, 0x0 },
+	{ 0x130c0, 0x0 },
+	{ 0x1130c0, 0x0 },
+	{ 0x2130c0, 0x0 },
+	{ 0x131c0, 0x0 },
+	{ 0x1131c0, 0x0 },
+	{ 0x2131c0, 0x0 },
+	{ 0x132c0, 0x0 },
+	{ 0x1132c0, 0x0 },
+	{ 0x2132c0, 0x0 },
+	{ 0x133c0, 0x0 },
+	{ 0x1133c0, 0x0 },
+	{ 0x2133c0, 0x0 },
+	{ 0x134c0, 0x0 },
+	{ 0x1134c0, 0x0 },
+	{ 0x2134c0, 0x0 },
+	{ 0x135c0, 0x0 },
+	{ 0x1135c0, 0x0 },
+	{ 0x2135c0, 0x0 },
+	{ 0x136c0, 0x0 },
+	{ 0x1136c0, 0x0 },
+	{ 0x2136c0, 0x0 },
+	{ 0x137c0, 0x0 },
+	{ 0x1137c0, 0x0 },
+	{ 0x2137c0, 0x0 },
+	{ 0x138c0, 0x0 },
+	{ 0x1138c0, 0x0 },
+	{ 0x2138c0, 0x0 },
+	{ 0x100c1, 0x0 },
+	{ 0x1100c1, 0x0 },
+	{ 0x2100c1, 0x0 },
+	{ 0x101c1, 0x0 },
+	{ 0x1101c1, 0x0 },
+	{ 0x2101c1, 0x0 },
+	{ 0x102c1, 0x0 },
+	{ 0x1102c1, 0x0 },
+	{ 0x2102c1, 0x0 },
+	{ 0x103c1, 0x0 },
+	{ 0x1103c1, 0x0 },
+	{ 0x2103c1, 0x0 },
+	{ 0x104c1, 0x0 },
+	{ 0x1104c1, 0x0 },
+	{ 0x2104c1, 0x0 },
+	{ 0x105c1, 0x0 },
+	{ 0x1105c1, 0x0 },
+	{ 0x2105c1, 0x0 },
+	{ 0x106c1, 0x0 },
+	{ 0x1106c1, 0x0 },
+	{ 0x2106c1, 0x0 },
+	{ 0x107c1, 0x0 },
+	{ 0x1107c1, 0x0 },
+	{ 0x2107c1, 0x0 },
+	{ 0x108c1, 0x0 },
+	{ 0x1108c1, 0x0 },
+	{ 0x2108c1, 0x0 },
+	{ 0x110c1, 0x0 },
+	{ 0x1110c1, 0x0 },
+	{ 0x2110c1, 0x0 },
+	{ 0x111c1, 0x0 },
+	{ 0x1111c1, 0x0 },
+	{ 0x2111c1, 0x0 },
+	{ 0x112c1, 0x0 },
+	{ 0x1112c1, 0x0 },
+	{ 0x2112c1, 0x0 },
+	{ 0x113c1, 0x0 },
+	{ 0x1113c1, 0x0 },
+	{ 0x2113c1, 0x0 },
+	{ 0x114c1, 0x0 },
+	{ 0x1114c1, 0x0 },
+	{ 0x2114c1, 0x0 },
+	{ 0x115c1, 0x0 },
+	{ 0x1115c1, 0x0 },
+	{ 0x2115c1, 0x0 },
+	{ 0x116c1, 0x0 },
+	{ 0x1116c1, 0x0 },
+	{ 0x2116c1, 0x0 },
+	{ 0x117c1, 0x0 },
+	{ 0x1117c1, 0x0 },
+	{ 0x2117c1, 0x0 },
+	{ 0x118c1, 0x0 },
+	{ 0x1118c1, 0x0 },
+	{ 0x2118c1, 0x0 },
+	{ 0x120c1, 0x0 },
+	{ 0x1120c1, 0x0 },
+	{ 0x2120c1, 0x0 },
+	{ 0x121c1, 0x0 },
+	{ 0x1121c1, 0x0 },
+	{ 0x2121c1, 0x0 },
+	{ 0x122c1, 0x0 },
+	{ 0x1122c1, 0x0 },
+	{ 0x2122c1, 0x0 },
+	{ 0x123c1, 0x0 },
+	{ 0x1123c1, 0x0 },
+	{ 0x2123c1, 0x0 },
+	{ 0x124c1, 0x0 },
+	{ 0x1124c1, 0x0 },
+	{ 0x2124c1, 0x0 },
+	{ 0x125c1, 0x0 },
+	{ 0x1125c1, 0x0 },
+	{ 0x2125c1, 0x0 },
+	{ 0x126c1, 0x0 },
+	{ 0x1126c1, 0x0 },
+	{ 0x2126c1, 0x0 },
+	{ 0x127c1, 0x0 },
+	{ 0x1127c1, 0x0 },
+	{ 0x2127c1, 0x0 },
+	{ 0x128c1, 0x0 },
+	{ 0x1128c1, 0x0 },
+	{ 0x2128c1, 0x0 },
+	{ 0x130c1, 0x0 },
+	{ 0x1130c1, 0x0 },
+	{ 0x2130c1, 0x0 },
+	{ 0x131c1, 0x0 },
+	{ 0x1131c1, 0x0 },
+	{ 0x2131c1, 0x0 },
+	{ 0x132c1, 0x0 },
+	{ 0x1132c1, 0x0 },
+	{ 0x2132c1, 0x0 },
+	{ 0x133c1, 0x0 },
+	{ 0x1133c1, 0x0 },
+	{ 0x2133c1, 0x0 },
+	{ 0x134c1, 0x0 },
+	{ 0x1134c1, 0x0 },
+	{ 0x2134c1, 0x0 },
+	{ 0x135c1, 0x0 },
+	{ 0x1135c1, 0x0 },
+	{ 0x2135c1, 0x0 },
+	{ 0x136c1, 0x0 },
+	{ 0x1136c1, 0x0 },
+	{ 0x2136c1, 0x0 },
+	{ 0x137c1, 0x0 },
+	{ 0x1137c1, 0x0 },
+	{ 0x2137c1, 0x0 },
+	{ 0x138c1, 0x0 },
+	{ 0x1138c1, 0x0 },
+	{ 0x2138c1, 0x0 },
+	{ 0x10020, 0x0 },
+	{ 0x110020, 0x0 },
+	{ 0x210020, 0x0 },
+	{ 0x11020, 0x0 },
+	{ 0x111020, 0x0 },
+	{ 0x211020, 0x0 },
+	{ 0x12020, 0x0 },
+	{ 0x112020, 0x0 },
+	{ 0x212020, 0x0 },
+	{ 0x13020, 0x0 },
+	{ 0x113020, 0x0 },
+	{ 0x213020, 0x0 },
+	{ 0x20072, 0x0 },
+	{ 0x20073, 0x0 },
+	{ 0x20074, 0x0 },
+	{ 0x100aa, 0x0 },
+	{ 0x110aa, 0x0 },
+	{ 0x120aa, 0x0 },
+	{ 0x130aa, 0x0 },
+	{ 0x20010, 0x0 },
+	{ 0x120010, 0x0 },
+	{ 0x220010, 0x0 },
+	{ 0x20011, 0x0 },
+	{ 0x120011, 0x0 },
+	{ 0x220011, 0x0 },
+	{ 0x100ae, 0x0 },
+	{ 0x1100ae, 0x0 },
+	{ 0x2100ae, 0x0 },
+	{ 0x100af, 0x0 },
+	{ 0x1100af, 0x0 },
+	{ 0x2100af, 0x0 },
+	{ 0x110ae, 0x0 },
+	{ 0x1110ae, 0x0 },
+	{ 0x2110ae, 0x0 },
+	{ 0x110af, 0x0 },
+	{ 0x1110af, 0x0 },
+	{ 0x2110af, 0x0 },
+	{ 0x120ae, 0x0 },
+	{ 0x1120ae, 0x0 },
+	{ 0x2120ae, 0x0 },
+	{ 0x120af, 0x0 },
+	{ 0x1120af, 0x0 },
+	{ 0x2120af, 0x0 },
+	{ 0x130ae, 0x0 },
+	{ 0x1130ae, 0x0 },
+	{ 0x2130ae, 0x0 },
+	{ 0x130af, 0x0 },
+	{ 0x1130af, 0x0 },
+	{ 0x2130af, 0x0 },
+	{ 0x20020, 0x0 },
+	{ 0x120020, 0x0 },
+	{ 0x220020, 0x0 },
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x0 },
+	{ 0x100a2, 0x0 },
+	{ 0x100a3, 0x0 },
+	{ 0x100a4, 0x0 },
+	{ 0x100a5, 0x0 },
+	{ 0x100a6, 0x0 },
+	{ 0x100a7, 0x0 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x0 },
+	{ 0x110a2, 0x0 },
+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x131f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54002, 0x1},
+	{0x54003, 0x29c},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x121f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x110},
+	{0x54019, 0x994},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x994},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0x9400},
+	{0x54033, 0x3109},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0x9400},
+	{0x54039, 0x3109},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x61},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400f, 0x100},
+	{0x54010, 0x1f7f},
+	{0x54012, 0x110},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x1},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{0xd0000, 0x0},
+	{0x90000, 0x10},
+	{0x90001, 0x400},
+	{0x90002, 0x10e},
+	{0x90003, 0x0},
+	{0x90004, 0x0},
+	{0x90005, 0x8},
+	{0x90029, 0xb},
+	{0x9002a, 0x480},
+	{0x9002b, 0x109},
+	{0x9002c, 0x8},
+	{0x9002d, 0x448},
+	{0x9002e, 0x139},
+	{0x9002f, 0x8},
+	{0x90030, 0x478},
+	{0x90031, 0x109},
+	{0x90032, 0x0},
+	{0x90033, 0xe8},
+	{0x90034, 0x109},
+	{0x90035, 0x2},
+	{0x90036, 0x10},
+	{0x90037, 0x139},
+	{0x90038, 0xf},
+	{0x90039, 0x7c0},
+	{0x9003a, 0x139},
+	{0x9003b, 0x44},
+	{0x9003c, 0x630},
+	{0x9003d, 0x159},
+	{0x9003e, 0x14f},
+	{0x9003f, 0x630},
+	{0x90040, 0x159},
+	{0x90041, 0x47},
+	{0x90042, 0x630},
+	{0x90043, 0x149},
+	{0x90044, 0x4f},
+	{0x90045, 0x630},
+	{0x90046, 0x179},
+	{0x90047, 0x8},
+	{0x90048, 0xe0},
+	{0x90049, 0x109},
+	{0x9004a, 0x0},
+	{0x9004b, 0x7c8},
+	{0x9004c, 0x109},
+	{0x9004d, 0x0},
+	{0x9004e, 0x1},
+	{0x9004f, 0x8},
+	{0x90050, 0x0},
+	{0x90051, 0x45a},
+	{0x90052, 0x9},
+	{0x90053, 0x0},
+	{0x90054, 0x448},
+	{0x90055, 0x109},
+	{0x90056, 0x40},
+	{0x90057, 0x630},
+	{0x90058, 0x179},
+	{0x90059, 0x1},
+	{0x9005a, 0x618},
+	{0x9005b, 0x109},
+	{0x9005c, 0x40c0},
+	{0x9005d, 0x630},
+	{0x9005e, 0x149},
+	{0x9005f, 0x8},
+	{0x90060, 0x4},
+	{0x90061, 0x48},
+	{0x90062, 0x4040},
+	{0x90063, 0x630},
+	{0x90064, 0x149},
+	{0x90065, 0x0},
+	{0x90066, 0x4},
+	{0x90067, 0x48},
+	{0x90068, 0x40},
+	{0x90069, 0x630},
+	{0x9006a, 0x149},
+	{0x9006b, 0x10},
+	{0x9006c, 0x4},
+	{0x9006d, 0x18},
+	{0x9006e, 0x0},
+	{0x9006f, 0x4},
+	{0x90070, 0x78},
+	{0x90071, 0x549},
+	{0x90072, 0x630},
+	{0x90073, 0x159},
+	{0x90074, 0xd49},
+	{0x90075, 0x630},
+	{0x90076, 0x159},
+	{0x90077, 0x94a},
+	{0x90078, 0x630},
+	{0x90079, 0x159},
+	{0x9007a, 0x441},
+	{0x9007b, 0x630},
+	{0x9007c, 0x149},
+	{0x9007d, 0x42},
+	{0x9007e, 0x630},
+	{0x9007f, 0x149},
+	{0x90080, 0x1},
+	{0x90081, 0x630},
+	{0x90082, 0x149},
+	{0x90083, 0x0},
+	{0x90084, 0xe0},
+	{0x90085, 0x109},
+	{0x90086, 0xa},
+	{0x90087, 0x10},
+	{0x90088, 0x109},
+	{0x90089, 0x9},
+	{0x9008a, 0x3c0},
+	{0x9008b, 0x149},
+	{0x9008c, 0x9},
+	{0x9008d, 0x3c0},
+	{0x9008e, 0x159},
+	{0x9008f, 0x18},
+	{0x90090, 0x10},
+	{0x90091, 0x109},
+	{0x90092, 0x0},
+	{0x90093, 0x3c0},
+	{0x90094, 0x109},
+	{0x90095, 0x18},
+	{0x90096, 0x4},
+	{0x90097, 0x48},
+	{0x90098, 0x18},
+	{0x90099, 0x4},
+	{0x9009a, 0x58},
+	{0x9009b, 0xa},
+	{0x9009c, 0x10},
+	{0x9009d, 0x109},
+	{0x9009e, 0x2},
+	{0x9009f, 0x10},
+	{0x900a0, 0x109},
+	{0x900a1, 0x5},
+	{0x900a2, 0x7c0},
+	{0x900a3, 0x109},
+	{0x900a4, 0x10},
+	{0x900a5, 0x10},
+	{0x900a6, 0x109},
+	{0x40000, 0x811},
+	{0x40020, 0x880},
+	{0x40040, 0x0},
+	{0x40060, 0x0},
+	{0x40001, 0x4008},
+	{0x40021, 0x83},
+	{0x40041, 0x4f},
+	{0x40061, 0x0},
+	{0x40002, 0x4040},
+	{0x40022, 0x83},
+	{0x40042, 0x51},
+	{0x40062, 0x0},
+	{0x40003, 0x811},
+	{0x40023, 0x880},
+	{0x40043, 0x0},
+	{0x40063, 0x0},
+	{0x40004, 0x720},
+	{0x40024, 0xf},
+	{0x40044, 0x1740},
+	{0x40064, 0x0},
+	{0x40005, 0x16},
+	{0x40025, 0x83},
+	{0x40045, 0x4b},
+	{0x40065, 0x0},
+	{0x40006, 0x716},
+	{0x40026, 0xf},
+	{0x40046, 0x2001},
+	{0x40066, 0x0},
+	{0x40007, 0x716},
+	{0x40027, 0xf},
+	{0x40047, 0x2800},
+	{0x40067, 0x0},
+	{0x40008, 0x716},
+	{0x40028, 0xf},
+	{0x40048, 0xf00},
+	{0x40068, 0x0},
+	{0x40009, 0x720},
+	{0x40029, 0xf},
+	{0x40049, 0x1400},
+	{0x40069, 0x0},
+	{0x4000a, 0xe08},
+	{0x4002a, 0xc15},
+	{0x4004a, 0x0},
+	{0x4006a, 0x0},
+	{0x4000b, 0x623},
+	{0x4002b, 0x15},
+	{0x4004b, 0x0},
+	{0x4006b, 0x0},
+	{0x4000c, 0x4028},
+	{0x4002c, 0x80},
+	{0x4004c, 0x0},
+	{0x4006c, 0x0},
+	{0x4000d, 0xe08},
+	{0x4002d, 0xc1a},
+	{0x4004d, 0x0},
+	{0x4006d, 0x0},
+	{0x4000e, 0x623},
+	{0x4002e, 0x1a},
+	{0x4004e, 0x0},
+	{0x4006e, 0x0},
+	{0x4000f, 0x4040},
+	{0x4002f, 0x80},
+	{0x4004f, 0x0},
+	{0x4006f, 0x0},
+	{0x40010, 0x2604},
+	{0x40030, 0x15},
+	{0x40050, 0x0},
+	{0x40070, 0x0},
+	{0x40011, 0x708},
+	{0x40031, 0x5},
+	{0x40051, 0x0},
+	{0x40071, 0x2002},
+	{0x40012, 0x8},
+	{0x40032, 0x80},
+	{0x40052, 0x0},
+	{0x40072, 0x0},
+	{0x40013, 0x2604},
+	{0x40033, 0x1a},
+	{0x40053, 0x0},
+	{0x40073, 0x0},
+	{0x40014, 0x708},
+	{0x40034, 0xa},
+	{0x40054, 0x0},
+	{0x40074, 0x2002},
+	{0x40015, 0x4040},
+	{0x40035, 0x80},
+	{0x40055, 0x0},
+	{0x40075, 0x0},
+	{0x40016, 0x60a},
+	{0x40036, 0x15},
+	{0x40056, 0x1200},
+	{0x40076, 0x0},
+	{0x40017, 0x61a},
+	{0x40037, 0x15},
+	{0x40057, 0x1300},
+	{0x40077, 0x0},
+	{0x40018, 0x60a},
+	{0x40038, 0x1a},
+	{0x40058, 0x1200},
+	{0x40078, 0x0},
+	{0x40019, 0x642},
+	{0x40039, 0x1a},
+	{0x40059, 0x1300},
+	{0x40079, 0x0},
+	{0x4001a, 0x4808},
+	{0x4003a, 0x880},
+	{0x4005a, 0x0},
+	{0x4007a, 0x0},
+	{0x900a7, 0x0},
+	{0x900a8, 0x790},
+	{0x900a9, 0x11a},
+	{0x900aa, 0x8},
+	{0x900ab, 0x7aa},
+	{0x900ac, 0x2a},
+	{0x900ad, 0x10},
+	{0x900ae, 0x7b2},
+	{0x900af, 0x2a},
+	{0x900b0, 0x0},
+	{0x900b1, 0x7c8},
+	{0x900b2, 0x109},
+	{0x900b3, 0x10},
+	{0x900b4, 0x2a8},
+	{0x900b5, 0x129},
+	{0x900b6, 0x8},
+	{0x900b7, 0x370},
+	{0x900b8, 0x129},
+	{0x900b9, 0xa},
+	{0x900ba, 0x3c8},
+	{0x900bb, 0x1a9},
+	{0x900bc, 0xc},
+	{0x900bd, 0x408},
+	{0x900be, 0x199},
+	{0x900bf, 0x14},
+	{0x900c0, 0x790},
+	{0x900c1, 0x11a},
+	{0x900c2, 0x8},
+	{0x900c3, 0x4},
+	{0x900c4, 0x18},
+	{0x900c5, 0xe},
+	{0x900c6, 0x408},
+	{0x900c7, 0x199},
+	{0x900c8, 0x8},
+	{0x900c9, 0x8568},
+	{0x900ca, 0x108},
+	{0x900cb, 0x18},
+	{0x900cc, 0x790},
+	{0x900cd, 0x16a},
+	{0x900ce, 0x8},
+	{0x900cf, 0x1d8},
+	{0x900d0, 0x169},
+	{0x900d1, 0x10},
+	{0x900d2, 0x8558},
+	{0x900d3, 0x168},
+	{0x900d4, 0x70},
+	{0x900d5, 0x788},
+	{0x900d6, 0x16a},
+	{0x900d7, 0x1ff8},
+	{0x900d8, 0x85a8},
+	{0x900d9, 0x1e8},
+	{0x900da, 0x50},
+	{0x900db, 0x798},
+	{0x900dc, 0x16a},
+	{0x900dd, 0x60},
+	{0x900de, 0x7a0},
+	{0x900df, 0x16a},
+	{0x900e0, 0x8},
+	{0x900e1, 0x8310},
+	{0x900e2, 0x168},
+	{0x900e3, 0x8},
+	{0x900e4, 0xa310},
+	{0x900e5, 0x168},
+	{0x900e6, 0xa},
+	{0x900e7, 0x408},
+	{0x900e8, 0x169},
+	{0x900e9, 0x6e},
+	{0x900ea, 0x0},
+	{0x900eb, 0x68},
+	{0x900ec, 0x0},
+	{0x900ed, 0x408},
+	{0x900ee, 0x169},
+	{0x900ef, 0x0},
+	{0x900f0, 0x8310},
+	{0x900f1, 0x168},
+	{0x900f2, 0x0},
+	{0x900f3, 0xa310},
+	{0x900f4, 0x168},
+	{0x900f5, 0x1ff8},
+	{0x900f6, 0x85a8},
+	{0x900f7, 0x1e8},
+	{0x900f8, 0x68},
+	{0x900f9, 0x798},
+	{0x900fa, 0x16a},
+	{0x900fb, 0x78},
+	{0x900fc, 0x7a0},
+	{0x900fd, 0x16a},
+	{0x900fe, 0x68},
+	{0x900ff, 0x790},
+	{0x90100, 0x16a},
+	{0x90101, 0x8},
+	{0x90102, 0x8b10},
+	{0x90103, 0x168},
+	{0x90104, 0x8},
+	{0x90105, 0xab10},
+	{0x90106, 0x168},
+	{0x90107, 0xa},
+	{0x90108, 0x408},
+	{0x90109, 0x169},
+	{0x9010a, 0x58},
+	{0x9010b, 0x0},
+	{0x9010c, 0x68},
+	{0x9010d, 0x0},
+	{0x9010e, 0x408},
+	{0x9010f, 0x169},
+	{0x90110, 0x0},
+	{0x90111, 0x8b10},
+	{0x90112, 0x168},
+	{0x90113, 0x0},
+	{0x90114, 0xab10},
+	{0x90115, 0x168},
+	{0x90116, 0x0},
+	{0x90117, 0x1d8},
+	{0x90118, 0x169},
+	{0x90119, 0x80},
+	{0x9011a, 0x790},
+	{0x9011b, 0x16a},
+	{0x9011c, 0x18},
+	{0x9011d, 0x7aa},
+	{0x9011e, 0x6a},
+	{0x9011f, 0xa},
+	{0x90120, 0x0},
+	{0x90121, 0x1e9},
+	{0x90122, 0x8},
+	{0x90123, 0x8080},
+	{0x90124, 0x108},
+	{0x90125, 0xf},
+	{0x90126, 0x408},
+	{0x90127, 0x169},
+	{0x90128, 0xc},
+	{0x90129, 0x0},
+	{0x9012a, 0x68},
+	{0x9012b, 0x9},
+	{0x9012c, 0x0},
+	{0x9012d, 0x1a9},
+	{0x9012e, 0x0},
+	{0x9012f, 0x408},
+	{0x90130, 0x169},
+	{0x90131, 0x0},
+	{0x90132, 0x8080},
+	{0x90133, 0x108},
+	{0x90134, 0x8},
+	{0x90135, 0x7aa},
+	{0x90136, 0x6a},
+	{0x90137, 0x0},
+	{0x90138, 0x8568},
+	{0x90139, 0x108},
+	{0x9013a, 0xb7},
+	{0x9013b, 0x790},
+	{0x9013c, 0x16a},
+	{0x9013d, 0x1f},
+	{0x9013e, 0x0},
+	{0x9013f, 0x68},
+	{0x90140, 0x8},
+	{0x90141, 0x8558},
+	{0x90142, 0x168},
+	{0x90143, 0xf},
+	{0x90144, 0x408},
+	{0x90145, 0x169},
+	{0x90146, 0xc},
+	{0x90147, 0x0},
+	{0x90148, 0x68},
+	{0x90149, 0x0},
+	{0x9014a, 0x408},
+	{0x9014b, 0x169},
+	{0x9014c, 0x0},
+	{0x9014d, 0x8558},
+	{0x9014e, 0x168},
+	{0x9014f, 0x8},
+	{0x90150, 0x3c8},
+	{0x90151, 0x1a9},
+	{0x90152, 0x3},
+	{0x90153, 0x370},
+	{0x90154, 0x129},
+	{0x90155, 0x20},
+	{0x90156, 0x2aa},
+	{0x90157, 0x9},
+	{0x90158, 0x0},
+	{0x90159, 0x400},
+	{0x9015a, 0x10e},
+	{0x9015b, 0x8},
+	{0x9015c, 0xe8},
+	{0x9015d, 0x109},
+	{0x9015e, 0x0},
+	{0x9015f, 0x8140},
+	{0x90160, 0x10c},
+	{0x90161, 0x10},
+	{0x90162, 0x8138},
+	{0x90163, 0x10c},
+	{0x90164, 0x8},
+	{0x90165, 0x7c8},
+	{0x90166, 0x101},
+	{0x90167, 0x8},
+	{0x90168, 0x0},
+	{0x90169, 0x8},
+	{0x9016a, 0x8},
+	{0x9016b, 0x448},
+	{0x9016c, 0x109},
+	{0x9016d, 0xf},
+	{0x9016e, 0x7c0},
+	{0x9016f, 0x109},
+	{0x90170, 0x0},
+	{0x90171, 0xe8},
+	{0x90172, 0x109},
+	{0x90173, 0x47},
+	{0x90174, 0x630},
+	{0x90175, 0x109},
+	{0x90176, 0x8},
+	{0x90177, 0x618},
+	{0x90178, 0x109},
+	{0x90179, 0x8},
+	{0x9017a, 0xe0},
+	{0x9017b, 0x109},
+	{0x9017c, 0x0},
+	{0x9017d, 0x7c8},
+	{0x9017e, 0x109},
+	{0x9017f, 0x8},
+	{0x90180, 0x8140},
+	{0x90181, 0x10c},
+	{0x90182, 0x0},
+	{0x90183, 0x1},
+	{0x90184, 0x8},
+	{0x90185, 0x8},
+	{0x90186, 0x4},
+	{0x90187, 0x8},
+	{0x90188, 0x8},
+	{0x90189, 0x7c8},
+	{0x9018a, 0x101},
+	{0x90006, 0x0},
+	{0x90007, 0x0},
+	{0x90008, 0x8},
+	{0x90009, 0x0},
+	{0x9000a, 0x0},
+	{0x9000b, 0x0},
+	{0xd00e7, 0x400},
+	{0x90017, 0x0},
+	{0x9001f, 0x2a},
+	{0x90026, 0x6a},
+	{0x400d0, 0x0},
+	{0x400d1, 0x101},
+	{0x400d2, 0x105},
+	{0x400d3, 0x107},
+	{0x400d4, 0x10f},
+	{0x400d5, 0x202},
+	{0x400d6, 0x20a},
+	{0x400d7, 0x20b},
+	{0x2003a, 0x2},
+	{0x2000b, 0x64},
+	{0x2000c, 0xc8},
+	{0x2000d, 0x7d0},
+	{0x2000e, 0x2c},
+	{0x12000b, 0x14},
+	{0x12000c, 0x29},
+	{0x12000d, 0x1a1},
+	{0x12000e, 0x10},
+	{0x9000c, 0x0},
+	{0x9000d, 0x173},
+	{0x9000e, 0x60},
+	{0x9000f, 0x6110},
+	{0x90010, 0x2152},
+	{0x90011, 0xdfbd},
+	{0x90012, 0x60},
+	{0x90013, 0x6152},
+	{0x20010, 0x5a},
+	{0x20011, 0x3},
+	{0x120010, 0x5a},
+	{0x120011, 0x3},
+	{0x40080, 0xe0},
+	{0x40081, 0x12},
+	{0x40082, 0xe0},
+	{0x40083, 0x12},
+	{0x40084, 0xe0},
+	{0x40085, 0x12},
+	{0x140080, 0xe0},
+	{0x140081, 0x12},
+	{0x140082, 0xe0},
+	{0x140083, 0x12},
+	{0x140084, 0xe0},
+	{0x140085, 0x12},
+	{0x400fd, 0xf},
+	{0x10011, 0x1},
+	{0x10012, 0x1},
+	{0x10013, 0x180},
+	{0x10018, 0x1},
+	{0x10002, 0x6209},
+	{0x100b2, 0x1},
+	{0x101b4, 0x1},
+	{0x102b4, 0x1},
+	{0x103b4, 0x1},
+	{0x104b4, 0x1},
+	{0x105b4, 0x1},
+	{0x106b4, 0x1},
+	{0x107b4, 0x1},
+	{0x108b4, 0x1},
+	{0x11011, 0x1},
+	{0x11012, 0x1},
+	{0x11013, 0x180},
+	{0x11018, 0x1},
+	{0x11002, 0x6209},
+	{0x110b2, 0x1},
+	{0x111b4, 0x1},
+	{0x112b4, 0x1},
+	{0x113b4, 0x1},
+	{0x114b4, 0x1},
+	{0x115b4, 0x1},
+	{0x116b4, 0x1},
+	{0x117b4, 0x1},
+	{0x118b4, 0x1},
+	{0x12011, 0x1},
+	{0x12012, 0x1},
+	{0x12013, 0x180},
+	{0x12018, 0x1},
+	{0x12002, 0x6209},
+	{0x120b2, 0x1},
+	{0x121b4, 0x1},
+	{0x122b4, 0x1},
+	{0x123b4, 0x1},
+	{0x124b4, 0x1},
+	{0x125b4, 0x1},
+	{0x126b4, 0x1},
+	{0x127b4, 0x1},
+	{0x128b4, 0x1},
+	{0x13011, 0x1},
+	{0x13012, 0x1},
+	{0x13013, 0x180},
+	{0x13018, 0x1},
+	{0x13002, 0x6209},
+	{0x130b2, 0x1},
+	{0x131b4, 0x1},
+	{0x132b4, 0x1},
+	{0x133b4, 0x1},
+	{0x134b4, 0x1},
+	{0x135b4, 0x1},
+	{0x136b4, 0x1},
+	{0x137b4, 0x1},
+	{0x138b4, 0x1},
+	{0x2003a, 0x2},
+	{0xc0080, 0x2},
+	{0xd0000, 0x1}
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 3200mts 1D */
+		.drate = 3200,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 667mts 1D */
+		.drate = 667,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P0 3200mts 2D */
+		.drate = 3200,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing_2gb = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3200, 667, },
+};
+
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
new file mode 100644
index 0000000000..0f74ce581c
--- /dev/null
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_3gb.c
@@ -0,0 +1,1734 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
+ */
+
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{0x3d400304, 0x1},
+	{0x3d400030, 0x1},
+	{0x3d400000, 0xa3080020},
+	{0x3d400028, 0x0},
+	{0x3d400020, 0x203},
+	{0x3d400024, 0x3e800},
+	{0x3d400064, 0x6100e0},
+	{0x3d4000d0, 0xc003061c},
+	{0x3d4000d4, 0x9e0000},
+	{0x3d4000dc, 0xd4002d},
+	{0x3d4000e0, 0x310008},
+	{0x3d4000e8, 0x66004a},
+	{0x3d4000ec, 0x16004a},
+	{0x3d400100, 0x1a201b22},
+	{0x3d400104, 0x60633},
+	{0x3d40010c, 0xc0c000},
+	{0x3d400110, 0xf04080f},
+	{0x3d400114, 0x2040c0c},
+	{0x3d400118, 0x1010007},
+	{0x3d40011c, 0x401},
+	{0x3d400130, 0x20600},
+	{0x3d400134, 0xc100002},
+	{0x3d400138, 0xe6},
+	{0x3d400144, 0xa00050},
+	{0x3d400180, 0xc3200018},
+	{0x3d400184, 0x28061a8},
+	{0x3d400188, 0x0},
+	{0x3d400190, 0x497820a},
+	{0x3d400194, 0x80303},
+	{0x3d4001a0, 0xe0400018},
+	{0x3d4001a4, 0xdf00e4},
+	{0x3d4001a8, 0x80000000},
+	{0x3d4001b0, 0x11},
+	{0x3d4001b4, 0x170a},
+	{0x3d4001c0, 0x1},
+	{0x3d4001c4, 0x1},
+	{0x3d4000f4, 0x639},
+	{0x3d400108, 0x70e1617},
+	{0x3d400200, 0x15},
+	{0x3d40020c, 0x0},
+	{0x3d400210, 0x1f1f},
+	{0x3d400204, 0x80808},
+	{0x3d400214, 0x7070707},
+	{0x3d400218, 0x48080707},
+	{0x3d402020, 0x1},
+	{0x3d402024, 0xd0c0},
+	{0x3d402050, 0x20d040},
+	{0x3d402064, 0x14002f},
+	{0x3d4020dc, 0x940009},
+	{0x3d4020e0, 0x310000},
+	{0x3d4020e8, 0x66004a},
+	{0x3d4020ec, 0x16004a},
+	{0x3d402100, 0xb070508},
+	{0x3d402104, 0x3040b},
+	{0x3d402108, 0x305090c},
+	{0x3d40210c, 0x505000},
+	{0x3d402110, 0x4040204},
+	{0x3d402114, 0x2030303},
+	{0x3d402118, 0x1010004},
+	{0x3d40211c, 0x301},
+	{0x3d402130, 0x20300},
+	{0x3d402134, 0xa100002},
+	{0x3d402138, 0x31},
+	{0x3d402144, 0x220011},
+	{0x3d402180, 0xc0a70006},
+	{0x3d402190, 0x3858202},
+	{0x3d402194, 0x80303},
+	{0x3d4021b4, 0x502},
+	{0x3d400244, 0x0},
+	{0x3d400250, 0x29001505},
+	{0x3d400254, 0x2c},
+	{0x3d40025c, 0x5900575b},
+	{0x3d400264, 0x90000096},
+	{0x3d40026c, 0x1000012c},
+	{0x3d400300, 0x16},
+	{0x3d400304, 0x0},
+	{0x3d40030c, 0x0},
+	{0x3d400320, 0x1},
+	{0x3d40036c, 0x11},
+	{0x3d400400, 0x111},
+	{0x3d400404, 0x10f3},
+	{0x3d400408, 0x72ff},
+	{0x3d400490, 0x1},
+	{0x3d400494, 0xe00},
+	{0x3d400498, 0x62ffff},
+	{0x3d40049c, 0xe00},
+	{0x3d4004a0, 0xffff},
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{0x100a0, 0x0},
+	{0x100a1, 0x1},
+	{0x100a2, 0x2},
+	{0x100a3, 0x3},
+	{0x100a4, 0x4},
+	{0x100a5, 0x5},
+	{0x100a6, 0x6},
+	{0x100a7, 0x7},
+	{0x110a0, 0x0},
+	{0x110a1, 0x1},
+	{0x110a2, 0x2},
+	{0x110a3, 0x3},
+	{0x110a4, 0x4},
+	{0x110a5, 0x5},
+	{0x110a6, 0x6},
+	{0x110a7, 0x7},
+	{0x120a0, 0x0},
+	{0x120a1, 0x1},
+	{0x120a2, 0x2},
+	{0x120a3, 0x3},
+	{0x120a4, 0x4},
+	{0x120a5, 0x5},
+	{0x120a6, 0x6},
+	{0x120a7, 0x7},
+	{0x130a0, 0x0},
+	{0x130a1, 0x1},
+	{0x130a2, 0x2},
+	{0x130a3, 0x3},
+	{0x130a4, 0x4},
+	{0x130a5, 0x5},
+	{0x130a6, 0x6},
+	{0x130a7, 0x7},
+	{0x20110, 0x2},
+	{0x20111, 0x3},
+	{0x20112, 0x4},
+	{0x20113, 0x5},
+	{0x20114, 0x0},
+	{0x20115, 0x1},
+	{0x1005f, 0x1ff},
+	{0x1015f, 0x1ff},
+	{0x1105f, 0x1ff},
+	{0x1115f, 0x1ff},
+	{0x1205f, 0x1ff},
+	{0x1215f, 0x1ff},
+	{0x1305f, 0x1ff},
+	{0x1315f, 0x1ff},
+	{0x11005f, 0x1ff},
+	{0x11015f, 0x1ff},
+	{0x11105f, 0x1ff},
+	{0x11115f, 0x1ff},
+	{0x11205f, 0x1ff},
+	{0x11215f, 0x1ff},
+	{0x11305f, 0x1ff},
+	{0x11315f, 0x1ff},
+	{0x55, 0x1ff},
+	{0x1055, 0x1ff},
+	{0x2055, 0x1ff},
+	{0x3055, 0x1ff},
+	{0x4055, 0x1ff},
+	{0x5055, 0x1ff},
+	{0x6055, 0x1ff},
+	{0x7055, 0x1ff},
+	{0x8055, 0x1ff},
+	{0x9055, 0x1ff},
+	{0x200c5, 0x19},
+	{0x1200c5, 0x7},
+	{0x2002e, 0x2},
+	{0x12002e, 0x1},
+	{0x90204, 0x0},
+	{0x190204, 0x0},
+	{0x20024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x120024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x20056, 0x3},
+	{0x120056, 0xa},
+	{0x1004d, 0xe00},
+	{0x1014d, 0xe00},
+	{0x1104d, 0xe00},
+	{0x1114d, 0xe00},
+	{0x1204d, 0xe00},
+	{0x1214d, 0xe00},
+	{0x1304d, 0xe00},
+	{0x1314d, 0xe00},
+	{0x11004d, 0xe00},
+	{0x11014d, 0xe00},
+	{0x11104d, 0xe00},
+	{0x11114d, 0xe00},
+	{0x11204d, 0xe00},
+	{0x11214d, 0xe00},
+	{0x11304d, 0xe00},
+	{0x11314d, 0xe00},
+	{0x10049, 0xeba},
+	{0x10149, 0xeba},
+	{0x11049, 0xeba},
+	{0x11149, 0xeba},
+	{0x12049, 0xeba},
+	{0x12149, 0xeba},
+	{0x13049, 0xeba},
+	{0x13149, 0xeba},
+	{0x110049, 0xeba},
+	{0x110149, 0xeba},
+	{0x111049, 0xeba},
+	{0x111149, 0xeba},
+	{0x112049, 0xeba},
+	{0x112149, 0xeba},
+	{0x113049, 0xeba},
+	{0x113149, 0xeba},
+	{0x43, 0x63},
+	{0x1043, 0x63},
+	{0x2043, 0x63},
+	{0x3043, 0x63},
+	{0x4043, 0x63},
+	{0x5043, 0x63},
+	{0x6043, 0x63},
+	{0x7043, 0x63},
+	{0x8043, 0x63},
+	{0x9043, 0x63},
+	{0x20018, 0x3},
+	{0x20075, 0x4},
+	{0x20050, 0x0},
+	{0x20008, 0x320},
+	{0x120008, 0xa7},
+	{0x20088, 0x9},
+	{0x200b2, 0xdc},
+	{0x10043, 0x5a1},
+	{0x10143, 0x5a1},
+	{0x11043, 0x5a1},
+	{0x11143, 0x5a1},
+	{0x12043, 0x5a1},
+	{0x12143, 0x5a1},
+	{0x13043, 0x5a1},
+	{0x13143, 0x5a1},
+	{0x1200b2, 0xdc},
+	{0x110043, 0x5a1},
+	{0x110143, 0x5a1},
+	{0x111043, 0x5a1},
+	{0x111143, 0x5a1},
+	{0x112043, 0x5a1},
+	{0x112143, 0x5a1},
+	{0x113043, 0x5a1},
+	{0x113143, 0x5a1},
+	{0x200fa, 0x1},
+	{0x1200fa, 0x1},
+	{0x20019, 0x1},
+	{0x120019, 0x1},
+	{0x200f0, 0x0},
+	{0x200f1, 0x0},
+	{0x200f2, 0x4444},
+	{0x200f3, 0x8888},
+	{0x200f4, 0x5555},
+	{0x200f5, 0x0},
+	{0x200f6, 0x0},
+	{0x200f7, 0xf000},
+	{0x20025, 0x0},
+	{0x2002d, 0x0},
+	{0x12002d, 0x0},
+	{0x200c7, 0x80},
+	{0x1200c7, 0x80},
+	{0x200ca, 0x106},
+	{0x1200ca, 0x106},
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
+	{ 0x12180, 0x0 },
+	{ 0x112180, 0x0 },
+	{ 0x212180, 0x0 },
+	{ 0x13080, 0x0 },
+	{ 0x113080, 0x0 },
+	{ 0x213080, 0x0 },
+	{ 0x13180, 0x0 },
+	{ 0x113180, 0x0 },
+	{ 0x213180, 0x0 },
+	{ 0x10081, 0x0 },
+	{ 0x110081, 0x0 },
+	{ 0x210081, 0x0 },
+	{ 0x10181, 0x0 },
+	{ 0x110181, 0x0 },
+	{ 0x210181, 0x0 },
+	{ 0x11081, 0x0 },
+	{ 0x111081, 0x0 },
+	{ 0x211081, 0x0 },
+	{ 0x11181, 0x0 },
+	{ 0x111181, 0x0 },
+	{ 0x211181, 0x0 },
+	{ 0x12081, 0x0 },
+	{ 0x112081, 0x0 },
+	{ 0x212081, 0x0 },
+	{ 0x12181, 0x0 },
+	{ 0x112181, 0x0 },
+	{ 0x212181, 0x0 },
+	{ 0x13081, 0x0 },
+	{ 0x113081, 0x0 },
+	{ 0x213081, 0x0 },
+	{ 0x13181, 0x0 },
+	{ 0x113181, 0x0 },
+	{ 0x213181, 0x0 },
+	{ 0x100d0, 0x0 },
+	{ 0x1100d0, 0x0 },
+	{ 0x2100d0, 0x0 },
+	{ 0x101d0, 0x0 },
+	{ 0x1101d0, 0x0 },
+	{ 0x2101d0, 0x0 },
+	{ 0x110d0, 0x0 },
+	{ 0x1110d0, 0x0 },
+	{ 0x2110d0, 0x0 },
+	{ 0x111d0, 0x0 },
+	{ 0x1111d0, 0x0 },
+	{ 0x2111d0, 0x0 },
+	{ 0x120d0, 0x0 },
+	{ 0x1120d0, 0x0 },
+	{ 0x2120d0, 0x0 },
+	{ 0x121d0, 0x0 },
+	{ 0x1121d0, 0x0 },
+	{ 0x2121d0, 0x0 },
+	{ 0x130d0, 0x0 },
+	{ 0x1130d0, 0x0 },
+	{ 0x2130d0, 0x0 },
+	{ 0x131d0, 0x0 },
+	{ 0x1131d0, 0x0 },
+	{ 0x2131d0, 0x0 },
+	{ 0x100d1, 0x0 },
+	{ 0x1100d1, 0x0 },
+	{ 0x2100d1, 0x0 },
+	{ 0x101d1, 0x0 },
+	{ 0x1101d1, 0x0 },
+	{ 0x2101d1, 0x0 },
+	{ 0x110d1, 0x0 },
+	{ 0x1110d1, 0x0 },
+	{ 0x2110d1, 0x0 },
+	{ 0x111d1, 0x0 },
+	{ 0x1111d1, 0x0 },
+	{ 0x2111d1, 0x0 },
+	{ 0x120d1, 0x0 },
+	{ 0x1120d1, 0x0 },
+	{ 0x2120d1, 0x0 },
+	{ 0x121d1, 0x0 },
+	{ 0x1121d1, 0x0 },
+	{ 0x2121d1, 0x0 },
+	{ 0x130d1, 0x0 },
+	{ 0x1130d1, 0x0 },
+	{ 0x2130d1, 0x0 },
+	{ 0x131d1, 0x0 },
+	{ 0x1131d1, 0x0 },
+	{ 0x2131d1, 0x0 },
+	{ 0x10068, 0x0 },
+	{ 0x10168, 0x0 },
+	{ 0x10268, 0x0 },
+	{ 0x10368, 0x0 },
+	{ 0x10468, 0x0 },
+	{ 0x10568, 0x0 },
+	{ 0x10668, 0x0 },
+	{ 0x10768, 0x0 },
+	{ 0x10868, 0x0 },
+	{ 0x11068, 0x0 },
+	{ 0x11168, 0x0 },
+	{ 0x11268, 0x0 },
+	{ 0x11368, 0x0 },
+	{ 0x11468, 0x0 },
+	{ 0x11568, 0x0 },
+	{ 0x11668, 0x0 },
+	{ 0x11768, 0x0 },
+	{ 0x11868, 0x0 },
+	{ 0x12068, 0x0 },
+	{ 0x12168, 0x0 },
+	{ 0x12268, 0x0 },
+	{ 0x12368, 0x0 },
+	{ 0x12468, 0x0 },
+	{ 0x12568, 0x0 },
+	{ 0x12668, 0x0 },
+	{ 0x12768, 0x0 },
+	{ 0x12868, 0x0 },
+	{ 0x13068, 0x0 },
+	{ 0x13168, 0x0 },
+	{ 0x13268, 0x0 },
+	{ 0x13368, 0x0 },
+	{ 0x13468, 0x0 },
+	{ 0x13568, 0x0 },
+	{ 0x13668, 0x0 },
+	{ 0x13768, 0x0 },
+	{ 0x13868, 0x0 },
+	{ 0x10069, 0x0 },
+	{ 0x10169, 0x0 },
+	{ 0x10269, 0x0 },
+	{ 0x10369, 0x0 },
+	{ 0x10469, 0x0 },
+	{ 0x10569, 0x0 },
+	{ 0x10669, 0x0 },
+	{ 0x10769, 0x0 },
+	{ 0x10869, 0x0 },
+	{ 0x11069, 0x0 },
+	{ 0x11169, 0x0 },
+	{ 0x11269, 0x0 },
+	{ 0x11369, 0x0 },
+	{ 0x11469, 0x0 },
+	{ 0x11569, 0x0 },
+	{ 0x11669, 0x0 },
+	{ 0x11769, 0x0 },
+	{ 0x11869, 0x0 },
+	{ 0x12069, 0x0 },
+	{ 0x12169, 0x0 },
+	{ 0x12269, 0x0 },
+	{ 0x12369, 0x0 },
+	{ 0x12469, 0x0 },
+	{ 0x12569, 0x0 },
+	{ 0x12669, 0x0 },
+	{ 0x12769, 0x0 },
+	{ 0x12869, 0x0 },
+	{ 0x13069, 0x0 },
+	{ 0x13169, 0x0 },
+	{ 0x13269, 0x0 },
+	{ 0x13369, 0x0 },
+	{ 0x13469, 0x0 },
+	{ 0x13569, 0x0 },
+	{ 0x13669, 0x0 },
+	{ 0x13769, 0x0 },
+	{ 0x13869, 0x0 },
+	{ 0x1008c, 0x0 },
+	{ 0x11008c, 0x0 },
+	{ 0x21008c, 0x0 },
+	{ 0x1018c, 0x0 },
+	{ 0x11018c, 0x0 },
+	{ 0x21018c, 0x0 },
+	{ 0x1108c, 0x0 },
+	{ 0x11108c, 0x0 },
+	{ 0x21108c, 0x0 },
+	{ 0x1118c, 0x0 },
+	{ 0x11118c, 0x0 },
+	{ 0x21118c, 0x0 },
+	{ 0x1208c, 0x0 },
+	{ 0x11208c, 0x0 },
+	{ 0x21208c, 0x0 },
+	{ 0x1218c, 0x0 },
+	{ 0x11218c, 0x0 },
+	{ 0x21218c, 0x0 },
+	{ 0x1308c, 0x0 },
+	{ 0x11308c, 0x0 },
+	{ 0x21308c, 0x0 },
+	{ 0x1318c, 0x0 },
+	{ 0x11318c, 0x0 },
+	{ 0x21318c, 0x0 },
+	{ 0x1008d, 0x0 },
+	{ 0x11008d, 0x0 },
+	{ 0x21008d, 0x0 },
+	{ 0x1018d, 0x0 },
+	{ 0x11018d, 0x0 },
+	{ 0x21018d, 0x0 },
+	{ 0x1108d, 0x0 },
+	{ 0x11108d, 0x0 },
+	{ 0x21108d, 0x0 },
+	{ 0x1118d, 0x0 },
+	{ 0x11118d, 0x0 },
+	{ 0x21118d, 0x0 },
+	{ 0x1208d, 0x0 },
+	{ 0x11208d, 0x0 },
+	{ 0x21208d, 0x0 },
+	{ 0x1218d, 0x0 },
+	{ 0x11218d, 0x0 },
+	{ 0x21218d, 0x0 },
+	{ 0x1308d, 0x0 },
+	{ 0x11308d, 0x0 },
+	{ 0x21308d, 0x0 },
+	{ 0x1318d, 0x0 },
+	{ 0x11318d, 0x0 },
+	{ 0x21318d, 0x0 },
+	{ 0x100c0, 0x0 },
+	{ 0x1100c0, 0x0 },
+	{ 0x2100c0, 0x0 },
+	{ 0x101c0, 0x0 },
+	{ 0x1101c0, 0x0 },
+	{ 0x2101c0, 0x0 },
+	{ 0x102c0, 0x0 },
+	{ 0x1102c0, 0x0 },
+	{ 0x2102c0, 0x0 },
+	{ 0x103c0, 0x0 },
+	{ 0x1103c0, 0x0 },
+	{ 0x2103c0, 0x0 },
+	{ 0x104c0, 0x0 },
+	{ 0x1104c0, 0x0 },
+	{ 0x2104c0, 0x0 },
+	{ 0x105c0, 0x0 },
+	{ 0x1105c0, 0x0 },
+	{ 0x2105c0, 0x0 },
+	{ 0x106c0, 0x0 },
+	{ 0x1106c0, 0x0 },
+	{ 0x2106c0, 0x0 },
+	{ 0x107c0, 0x0 },
+	{ 0x1107c0, 0x0 },
+	{ 0x2107c0, 0x0 },
+	{ 0x108c0, 0x0 },
+	{ 0x1108c0, 0x0 },
+	{ 0x2108c0, 0x0 },
+	{ 0x110c0, 0x0 },
+	{ 0x1110c0, 0x0 },
+	{ 0x2110c0, 0x0 },
+	{ 0x111c0, 0x0 },
+	{ 0x1111c0, 0x0 },
+	{ 0x2111c0, 0x0 },
+	{ 0x112c0, 0x0 },
+	{ 0x1112c0, 0x0 },
+	{ 0x2112c0, 0x0 },
+	{ 0x113c0, 0x0 },
+	{ 0x1113c0, 0x0 },
+	{ 0x2113c0, 0x0 },
+	{ 0x114c0, 0x0 },
+	{ 0x1114c0, 0x0 },
+	{ 0x2114c0, 0x0 },
+	{ 0x115c0, 0x0 },
+	{ 0x1115c0, 0x0 },
+	{ 0x2115c0, 0x0 },
+	{ 0x116c0, 0x0 },
+	{ 0x1116c0, 0x0 },
+	{ 0x2116c0, 0x0 },
+	{ 0x117c0, 0x0 },
+	{ 0x1117c0, 0x0 },
+	{ 0x2117c0, 0x0 },
+	{ 0x118c0, 0x0 },
+	{ 0x1118c0, 0x0 },
+	{ 0x2118c0, 0x0 },
+	{ 0x120c0, 0x0 },
+	{ 0x1120c0, 0x0 },
+	{ 0x2120c0, 0x0 },
+	{ 0x121c0, 0x0 },
+	{ 0x1121c0, 0x0 },
+	{ 0x2121c0, 0x0 },
+	{ 0x122c0, 0x0 },
+	{ 0x1122c0, 0x0 },
+	{ 0x2122c0, 0x0 },
+	{ 0x123c0, 0x0 },
+	{ 0x1123c0, 0x0 },
+	{ 0x2123c0, 0x0 },
+	{ 0x124c0, 0x0 },
+	{ 0x1124c0, 0x0 },
+	{ 0x2124c0, 0x0 },
+	{ 0x125c0, 0x0 },
+	{ 0x1125c0, 0x0 },
+	{ 0x2125c0, 0x0 },
+	{ 0x126c0, 0x0 },
+	{ 0x1126c0, 0x0 },
+	{ 0x2126c0, 0x0 },
+	{ 0x127c0, 0x0 },
+	{ 0x1127c0, 0x0 },
+	{ 0x2127c0, 0x0 },
+	{ 0x128c0, 0x0 },
+	{ 0x1128c0, 0x0 },
+	{ 0x2128c0, 0x0 },
+	{ 0x130c0, 0x0 },
+	{ 0x1130c0, 0x0 },
+	{ 0x2130c0, 0x0 },
+	{ 0x131c0, 0x0 },
+	{ 0x1131c0, 0x0 },
+	{ 0x2131c0, 0x0 },
+	{ 0x132c0, 0x0 },
+	{ 0x1132c0, 0x0 },
+	{ 0x2132c0, 0x0 },
+	{ 0x133c0, 0x0 },
+	{ 0x1133c0, 0x0 },
+	{ 0x2133c0, 0x0 },
+	{ 0x134c0, 0x0 },
+	{ 0x1134c0, 0x0 },
+	{ 0x2134c0, 0x0 },
+	{ 0x135c0, 0x0 },
+	{ 0x1135c0, 0x0 },
+	{ 0x2135c0, 0x0 },
+	{ 0x136c0, 0x0 },
+	{ 0x1136c0, 0x0 },
+	{ 0x2136c0, 0x0 },
+	{ 0x137c0, 0x0 },
+	{ 0x1137c0, 0x0 },
+	{ 0x2137c0, 0x0 },
+	{ 0x138c0, 0x0 },
+	{ 0x1138c0, 0x0 },
+	{ 0x2138c0, 0x0 },
+	{ 0x100c1, 0x0 },
+	{ 0x1100c1, 0x0 },
+	{ 0x2100c1, 0x0 },
+	{ 0x101c1, 0x0 },
+	{ 0x1101c1, 0x0 },
+	{ 0x2101c1, 0x0 },
+	{ 0x102c1, 0x0 },
+	{ 0x1102c1, 0x0 },
+	{ 0x2102c1, 0x0 },
+	{ 0x103c1, 0x0 },
+	{ 0x1103c1, 0x0 },
+	{ 0x2103c1, 0x0 },
+	{ 0x104c1, 0x0 },
+	{ 0x1104c1, 0x0 },
+	{ 0x2104c1, 0x0 },
+	{ 0x105c1, 0x0 },
+	{ 0x1105c1, 0x0 },
+	{ 0x2105c1, 0x0 },
+	{ 0x106c1, 0x0 },
+	{ 0x1106c1, 0x0 },
+	{ 0x2106c1, 0x0 },
+	{ 0x107c1, 0x0 },
+	{ 0x1107c1, 0x0 },
+	{ 0x2107c1, 0x0 },
+	{ 0x108c1, 0x0 },
+	{ 0x1108c1, 0x0 },
+	{ 0x2108c1, 0x0 },
+	{ 0x110c1, 0x0 },
+	{ 0x1110c1, 0x0 },
+	{ 0x2110c1, 0x0 },
+	{ 0x111c1, 0x0 },
+	{ 0x1111c1, 0x0 },
+	{ 0x2111c1, 0x0 },
+	{ 0x112c1, 0x0 },
+	{ 0x1112c1, 0x0 },
+	{ 0x2112c1, 0x0 },
+	{ 0x113c1, 0x0 },
+	{ 0x1113c1, 0x0 },
+	{ 0x2113c1, 0x0 },
+	{ 0x114c1, 0x0 },
+	{ 0x1114c1, 0x0 },
+	{ 0x2114c1, 0x0 },
+	{ 0x115c1, 0x0 },
+	{ 0x1115c1, 0x0 },
+	{ 0x2115c1, 0x0 },
+	{ 0x116c1, 0x0 },
+	{ 0x1116c1, 0x0 },
+	{ 0x2116c1, 0x0 },
+	{ 0x117c1, 0x0 },
+	{ 0x1117c1, 0x0 },
+	{ 0x2117c1, 0x0 },
+	{ 0x118c1, 0x0 },
+	{ 0x1118c1, 0x0 },
+	{ 0x2118c1, 0x0 },
+	{ 0x120c1, 0x0 },
+	{ 0x1120c1, 0x0 },
+	{ 0x2120c1, 0x0 },
+	{ 0x121c1, 0x0 },
+	{ 0x1121c1, 0x0 },
+	{ 0x2121c1, 0x0 },
+	{ 0x122c1, 0x0 },
+	{ 0x1122c1, 0x0 },
+	{ 0x2122c1, 0x0 },
+	{ 0x123c1, 0x0 },
+	{ 0x1123c1, 0x0 },
+	{ 0x2123c1, 0x0 },
+	{ 0x124c1, 0x0 },
+	{ 0x1124c1, 0x0 },
+	{ 0x2124c1, 0x0 },
+	{ 0x125c1, 0x0 },
+	{ 0x1125c1, 0x0 },
+	{ 0x2125c1, 0x0 },
+	{ 0x126c1, 0x0 },
+	{ 0x1126c1, 0x0 },
+	{ 0x2126c1, 0x0 },
+	{ 0x127c1, 0x0 },
+	{ 0x1127c1, 0x0 },
+	{ 0x2127c1, 0x0 },
+	{ 0x128c1, 0x0 },
+	{ 0x1128c1, 0x0 },
+	{ 0x2128c1, 0x0 },
+	{ 0x130c1, 0x0 },
+	{ 0x1130c1, 0x0 },
+	{ 0x2130c1, 0x0 },
+	{ 0x131c1, 0x0 },
+	{ 0x1131c1, 0x0 },
+	{ 0x2131c1, 0x0 },
+	{ 0x132c1, 0x0 },
+	{ 0x1132c1, 0x0 },
+	{ 0x2132c1, 0x0 },
+	{ 0x133c1, 0x0 },
+	{ 0x1133c1, 0x0 },
+	{ 0x2133c1, 0x0 },
+	{ 0x134c1, 0x0 },
+	{ 0x1134c1, 0x0 },
+	{ 0x2134c1, 0x0 },
+	{ 0x135c1, 0x0 },
+	{ 0x1135c1, 0x0 },
+	{ 0x2135c1, 0x0 },
+	{ 0x136c1, 0x0 },
+	{ 0x1136c1, 0x0 },
+	{ 0x2136c1, 0x0 },
+	{ 0x137c1, 0x0 },
+	{ 0x1137c1, 0x0 },
+	{ 0x2137c1, 0x0 },
+	{ 0x138c1, 0x0 },
+	{ 0x1138c1, 0x0 },
+	{ 0x2138c1, 0x0 },
+	{ 0x10020, 0x0 },
+	{ 0x110020, 0x0 },
+	{ 0x210020, 0x0 },
+	{ 0x11020, 0x0 },
+	{ 0x111020, 0x0 },
+	{ 0x211020, 0x0 },
+	{ 0x12020, 0x0 },
+	{ 0x112020, 0x0 },
+	{ 0x212020, 0x0 },
+	{ 0x13020, 0x0 },
+	{ 0x113020, 0x0 },
+	{ 0x213020, 0x0 },
+	{ 0x20072, 0x0 },
+	{ 0x20073, 0x0 },
+	{ 0x20074, 0x0 },
+	{ 0x100aa, 0x0 },
+	{ 0x110aa, 0x0 },
+	{ 0x120aa, 0x0 },
+	{ 0x130aa, 0x0 },
+	{ 0x20010, 0x0 },
+	{ 0x120010, 0x0 },
+	{ 0x220010, 0x0 },
+	{ 0x20011, 0x0 },
+	{ 0x120011, 0x0 },
+	{ 0x220011, 0x0 },
+	{ 0x100ae, 0x0 },
+	{ 0x1100ae, 0x0 },
+	{ 0x2100ae, 0x0 },
+	{ 0x100af, 0x0 },
+	{ 0x1100af, 0x0 },
+	{ 0x2100af, 0x0 },
+	{ 0x110ae, 0x0 },
+	{ 0x1110ae, 0x0 },
+	{ 0x2110ae, 0x0 },
+	{ 0x110af, 0x0 },
+	{ 0x1110af, 0x0 },
+	{ 0x2110af, 0x0 },
+	{ 0x120ae, 0x0 },
+	{ 0x1120ae, 0x0 },
+	{ 0x2120ae, 0x0 },
+	{ 0x120af, 0x0 },
+	{ 0x1120af, 0x0 },
+	{ 0x2120af, 0x0 },
+	{ 0x130ae, 0x0 },
+	{ 0x1130ae, 0x0 },
+	{ 0x2130ae, 0x0 },
+	{ 0x130af, 0x0 },
+	{ 0x1130af, 0x0 },
+	{ 0x2130af, 0x0 },
+	{ 0x20020, 0x0 },
+	{ 0x120020, 0x0 },
+	{ 0x220020, 0x0 },
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x0 },
+	{ 0x100a2, 0x0 },
+	{ 0x100a3, 0x0 },
+	{ 0x100a4, 0x0 },
+	{ 0x100a5, 0x0 },
+	{ 0x100a6, 0x0 },
+	{ 0x100a7, 0x0 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x0 },
+	{ 0x110a2, 0x0 },
+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x131f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x310},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54002, 0x1},
+	{0x54003, 0x29c},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x121f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x310},
+	{0x54019, 0x994},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x994},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0x9400},
+	{0x54033, 0x3109},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0x9400},
+	{0x54039, 0x3109},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x61},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400f, 0x100},
+	{0x54010, 0x1f7f},
+	{0x54012, 0x310},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{0xd0000, 0x0},
+	{0x90000, 0x10},
+	{0x90001, 0x400},
+	{0x90002, 0x10e},
+	{0x90003, 0x0},
+	{0x90004, 0x0},
+	{0x90005, 0x8},
+	{0x90029, 0xb},
+	{0x9002a, 0x480},
+	{0x9002b, 0x109},
+	{0x9002c, 0x8},
+	{0x9002d, 0x448},
+	{0x9002e, 0x139},
+	{0x9002f, 0x8},
+	{0x90030, 0x478},
+	{0x90031, 0x109},
+	{0x90032, 0x0},
+	{0x90033, 0xe8},
+	{0x90034, 0x109},
+	{0x90035, 0x2},
+	{0x90036, 0x10},
+	{0x90037, 0x139},
+	{0x90038, 0xf},
+	{0x90039, 0x7c0},
+	{0x9003a, 0x139},
+	{0x9003b, 0x44},
+	{0x9003c, 0x630},
+	{0x9003d, 0x159},
+	{0x9003e, 0x14f},
+	{0x9003f, 0x630},
+	{0x90040, 0x159},
+	{0x90041, 0x47},
+	{0x90042, 0x630},
+	{0x90043, 0x149},
+	{0x90044, 0x4f},
+	{0x90045, 0x630},
+	{0x90046, 0x179},
+	{0x90047, 0x8},
+	{0x90048, 0xe0},
+	{0x90049, 0x109},
+	{0x9004a, 0x0},
+	{0x9004b, 0x7c8},
+	{0x9004c, 0x109},
+	{0x9004d, 0x0},
+	{0x9004e, 0x1},
+	{0x9004f, 0x8},
+	{0x90050, 0x0},
+	{0x90051, 0x45a},
+	{0x90052, 0x9},
+	{0x90053, 0x0},
+	{0x90054, 0x448},
+	{0x90055, 0x109},
+	{0x90056, 0x40},
+	{0x90057, 0x630},
+	{0x90058, 0x179},
+	{0x90059, 0x1},
+	{0x9005a, 0x618},
+	{0x9005b, 0x109},
+	{0x9005c, 0x40c0},
+	{0x9005d, 0x630},
+	{0x9005e, 0x149},
+	{0x9005f, 0x8},
+	{0x90060, 0x4},
+	{0x90061, 0x48},
+	{0x90062, 0x4040},
+	{0x90063, 0x630},
+	{0x90064, 0x149},
+	{0x90065, 0x0},
+	{0x90066, 0x4},
+	{0x90067, 0x48},
+	{0x90068, 0x40},
+	{0x90069, 0x630},
+	{0x9006a, 0x149},
+	{0x9006b, 0x10},
+	{0x9006c, 0x4},
+	{0x9006d, 0x18},
+	{0x9006e, 0x0},
+	{0x9006f, 0x4},
+	{0x90070, 0x78},
+	{0x90071, 0x549},
+	{0x90072, 0x630},
+	{0x90073, 0x159},
+	{0x90074, 0xd49},
+	{0x90075, 0x630},
+	{0x90076, 0x159},
+	{0x90077, 0x94a},
+	{0x90078, 0x630},
+	{0x90079, 0x159},
+	{0x9007a, 0x441},
+	{0x9007b, 0x630},
+	{0x9007c, 0x149},
+	{0x9007d, 0x42},
+	{0x9007e, 0x630},
+	{0x9007f, 0x149},
+	{0x90080, 0x1},
+	{0x90081, 0x630},
+	{0x90082, 0x149},
+	{0x90083, 0x0},
+	{0x90084, 0xe0},
+	{0x90085, 0x109},
+	{0x90086, 0xa},
+	{0x90087, 0x10},
+	{0x90088, 0x109},
+	{0x90089, 0x9},
+	{0x9008a, 0x3c0},
+	{0x9008b, 0x149},
+	{0x9008c, 0x9},
+	{0x9008d, 0x3c0},
+	{0x9008e, 0x159},
+	{0x9008f, 0x18},
+	{0x90090, 0x10},
+	{0x90091, 0x109},
+	{0x90092, 0x0},
+	{0x90093, 0x3c0},
+	{0x90094, 0x109},
+	{0x90095, 0x18},
+	{0x90096, 0x4},
+	{0x90097, 0x48},
+	{0x90098, 0x18},
+	{0x90099, 0x4},
+	{0x9009a, 0x58},
+	{0x9009b, 0xa},
+	{0x9009c, 0x10},
+	{0x9009d, 0x109},
+	{0x9009e, 0x2},
+	{0x9009f, 0x10},
+	{0x900a0, 0x109},
+	{0x900a1, 0x5},
+	{0x900a2, 0x7c0},
+	{0x900a3, 0x109},
+	{0x900a4, 0x10},
+	{0x900a5, 0x10},
+	{0x900a6, 0x109},
+	{0x40000, 0x811},
+	{0x40020, 0x880},
+	{0x40040, 0x0},
+	{0x40060, 0x0},
+	{0x40001, 0x4008},
+	{0x40021, 0x83},
+	{0x40041, 0x4f},
+	{0x40061, 0x0},
+	{0x40002, 0x4040},
+	{0x40022, 0x83},
+	{0x40042, 0x51},
+	{0x40062, 0x0},
+	{0x40003, 0x811},
+	{0x40023, 0x880},
+	{0x40043, 0x0},
+	{0x40063, 0x0},
+	{0x40004, 0x720},
+	{0x40024, 0xf},
+	{0x40044, 0x1740},
+	{0x40064, 0x0},
+	{0x40005, 0x16},
+	{0x40025, 0x83},
+	{0x40045, 0x4b},
+	{0x40065, 0x0},
+	{0x40006, 0x716},
+	{0x40026, 0xf},
+	{0x40046, 0x2001},
+	{0x40066, 0x0},
+	{0x40007, 0x716},
+	{0x40027, 0xf},
+	{0x40047, 0x2800},
+	{0x40067, 0x0},
+	{0x40008, 0x716},
+	{0x40028, 0xf},
+	{0x40048, 0xf00},
+	{0x40068, 0x0},
+	{0x40009, 0x720},
+	{0x40029, 0xf},
+	{0x40049, 0x1400},
+	{0x40069, 0x0},
+	{0x4000a, 0xe08},
+	{0x4002a, 0xc15},
+	{0x4004a, 0x0},
+	{0x4006a, 0x0},
+	{0x4000b, 0x623},
+	{0x4002b, 0x15},
+	{0x4004b, 0x0},
+	{0x4006b, 0x0},
+	{0x4000c, 0x4028},
+	{0x4002c, 0x80},
+	{0x4004c, 0x0},
+	{0x4006c, 0x0},
+	{0x4000d, 0xe08},
+	{0x4002d, 0xc1a},
+	{0x4004d, 0x0},
+	{0x4006d, 0x0},
+	{0x4000e, 0x623},
+	{0x4002e, 0x1a},
+	{0x4004e, 0x0},
+	{0x4006e, 0x0},
+	{0x4000f, 0x4040},
+	{0x4002f, 0x80},
+	{0x4004f, 0x0},
+	{0x4006f, 0x0},
+	{0x40010, 0x2604},
+	{0x40030, 0x15},
+	{0x40050, 0x0},
+	{0x40070, 0x0},
+	{0x40011, 0x708},
+	{0x40031, 0x5},
+	{0x40051, 0x0},
+	{0x40071, 0x2002},
+	{0x40012, 0x8},
+	{0x40032, 0x80},
+	{0x40052, 0x0},
+	{0x40072, 0x0},
+	{0x40013, 0x2604},
+	{0x40033, 0x1a},
+	{0x40053, 0x0},
+	{0x40073, 0x0},
+	{0x40014, 0x708},
+	{0x40034, 0xa},
+	{0x40054, 0x0},
+	{0x40074, 0x2002},
+	{0x40015, 0x4040},
+	{0x40035, 0x80},
+	{0x40055, 0x0},
+	{0x40075, 0x0},
+	{0x40016, 0x60a},
+	{0x40036, 0x15},
+	{0x40056, 0x1200},
+	{0x40076, 0x0},
+	{0x40017, 0x61a},
+	{0x40037, 0x15},
+	{0x40057, 0x1300},
+	{0x40077, 0x0},
+	{0x40018, 0x60a},
+	{0x40038, 0x1a},
+	{0x40058, 0x1200},
+	{0x40078, 0x0},
+	{0x40019, 0x642},
+	{0x40039, 0x1a},
+	{0x40059, 0x1300},
+	{0x40079, 0x0},
+	{0x4001a, 0x4808},
+	{0x4003a, 0x880},
+	{0x4005a, 0x0},
+	{0x4007a, 0x0},
+	{0x900a7, 0x0},
+	{0x900a8, 0x790},
+	{0x900a9, 0x11a},
+	{0x900aa, 0x8},
+	{0x900ab, 0x7aa},
+	{0x900ac, 0x2a},
+	{0x900ad, 0x10},
+	{0x900ae, 0x7b2},
+	{0x900af, 0x2a},
+	{0x900b0, 0x0},
+	{0x900b1, 0x7c8},
+	{0x900b2, 0x109},
+	{0x900b3, 0x10},
+	{0x900b4, 0x2a8},
+	{0x900b5, 0x129},
+	{0x900b6, 0x8},
+	{0x900b7, 0x370},
+	{0x900b8, 0x129},
+	{0x900b9, 0xa},
+	{0x900ba, 0x3c8},
+	{0x900bb, 0x1a9},
+	{0x900bc, 0xc},
+	{0x900bd, 0x408},
+	{0x900be, 0x199},
+	{0x900bf, 0x14},
+	{0x900c0, 0x790},
+	{0x900c1, 0x11a},
+	{0x900c2, 0x8},
+	{0x900c3, 0x4},
+	{0x900c4, 0x18},
+	{0x900c5, 0xe},
+	{0x900c6, 0x408},
+	{0x900c7, 0x199},
+	{0x900c8, 0x8},
+	{0x900c9, 0x8568},
+	{0x900ca, 0x108},
+	{0x900cb, 0x18},
+	{0x900cc, 0x790},
+	{0x900cd, 0x16a},
+	{0x900ce, 0x8},
+	{0x900cf, 0x1d8},
+	{0x900d0, 0x169},
+	{0x900d1, 0x10},
+	{0x900d2, 0x8558},
+	{0x900d3, 0x168},
+	{0x900d4, 0x70},
+	{0x900d5, 0x788},
+	{0x900d6, 0x16a},
+	{0x900d7, 0x1ff8},
+	{0x900d8, 0x85a8},
+	{0x900d9, 0x1e8},
+	{0x900da, 0x50},
+	{0x900db, 0x798},
+	{0x900dc, 0x16a},
+	{0x900dd, 0x60},
+	{0x900de, 0x7a0},
+	{0x900df, 0x16a},
+	{0x900e0, 0x8},
+	{0x900e1, 0x8310},
+	{0x900e2, 0x168},
+	{0x900e3, 0x8},
+	{0x900e4, 0xa310},
+	{0x900e5, 0x168},
+	{0x900e6, 0xa},
+	{0x900e7, 0x408},
+	{0x900e8, 0x169},
+	{0x900e9, 0x6e},
+	{0x900ea, 0x0},
+	{0x900eb, 0x68},
+	{0x900ec, 0x0},
+	{0x900ed, 0x408},
+	{0x900ee, 0x169},
+	{0x900ef, 0x0},
+	{0x900f0, 0x8310},
+	{0x900f1, 0x168},
+	{0x900f2, 0x0},
+	{0x900f3, 0xa310},
+	{0x900f4, 0x168},
+	{0x900f5, 0x1ff8},
+	{0x900f6, 0x85a8},
+	{0x900f7, 0x1e8},
+	{0x900f8, 0x68},
+	{0x900f9, 0x798},
+	{0x900fa, 0x16a},
+	{0x900fb, 0x78},
+	{0x900fc, 0x7a0},
+	{0x900fd, 0x16a},
+	{0x900fe, 0x68},
+	{0x900ff, 0x790},
+	{0x90100, 0x16a},
+	{0x90101, 0x8},
+	{0x90102, 0x8b10},
+	{0x90103, 0x168},
+	{0x90104, 0x8},
+	{0x90105, 0xab10},
+	{0x90106, 0x168},
+	{0x90107, 0xa},
+	{0x90108, 0x408},
+	{0x90109, 0x169},
+	{0x9010a, 0x58},
+	{0x9010b, 0x0},
+	{0x9010c, 0x68},
+	{0x9010d, 0x0},
+	{0x9010e, 0x408},
+	{0x9010f, 0x169},
+	{0x90110, 0x0},
+	{0x90111, 0x8b10},
+	{0x90112, 0x168},
+	{0x90113, 0x0},
+	{0x90114, 0xab10},
+	{0x90115, 0x168},
+	{0x90116, 0x0},
+	{0x90117, 0x1d8},
+	{0x90118, 0x169},
+	{0x90119, 0x80},
+	{0x9011a, 0x790},
+	{0x9011b, 0x16a},
+	{0x9011c, 0x18},
+	{0x9011d, 0x7aa},
+	{0x9011e, 0x6a},
+	{0x9011f, 0xa},
+	{0x90120, 0x0},
+	{0x90121, 0x1e9},
+	{0x90122, 0x8},
+	{0x90123, 0x8080},
+	{0x90124, 0x108},
+	{0x90125, 0xf},
+	{0x90126, 0x408},
+	{0x90127, 0x169},
+	{0x90128, 0xc},
+	{0x90129, 0x0},
+	{0x9012a, 0x68},
+	{0x9012b, 0x9},
+	{0x9012c, 0x0},
+	{0x9012d, 0x1a9},
+	{0x9012e, 0x0},
+	{0x9012f, 0x408},
+	{0x90130, 0x169},
+	{0x90131, 0x0},
+	{0x90132, 0x8080},
+	{0x90133, 0x108},
+	{0x90134, 0x8},
+	{0x90135, 0x7aa},
+	{0x90136, 0x6a},
+	{0x90137, 0x0},
+	{0x90138, 0x8568},
+	{0x90139, 0x108},
+	{0x9013a, 0xb7},
+	{0x9013b, 0x790},
+	{0x9013c, 0x16a},
+	{0x9013d, 0x1f},
+	{0x9013e, 0x0},
+	{0x9013f, 0x68},
+	{0x90140, 0x8},
+	{0x90141, 0x8558},
+	{0x90142, 0x168},
+	{0x90143, 0xf},
+	{0x90144, 0x408},
+	{0x90145, 0x169},
+	{0x90146, 0xc},
+	{0x90147, 0x0},
+	{0x90148, 0x68},
+	{0x90149, 0x0},
+	{0x9014a, 0x408},
+	{0x9014b, 0x169},
+	{0x9014c, 0x0},
+	{0x9014d, 0x8558},
+	{0x9014e, 0x168},
+	{0x9014f, 0x8},
+	{0x90150, 0x3c8},
+	{0x90151, 0x1a9},
+	{0x90152, 0x3},
+	{0x90153, 0x370},
+	{0x90154, 0x129},
+	{0x90155, 0x20},
+	{0x90156, 0x2aa},
+	{0x90157, 0x9},
+	{0x90158, 0x0},
+	{0x90159, 0x400},
+	{0x9015a, 0x10e},
+	{0x9015b, 0x8},
+	{0x9015c, 0xe8},
+	{0x9015d, 0x109},
+	{0x9015e, 0x0},
+	{0x9015f, 0x8140},
+	{0x90160, 0x10c},
+	{0x90161, 0x10},
+	{0x90162, 0x8138},
+	{0x90163, 0x10c},
+	{0x90164, 0x8},
+	{0x90165, 0x7c8},
+	{0x90166, 0x101},
+	{0x90167, 0x8},
+	{0x90168, 0x0},
+	{0x90169, 0x8},
+	{0x9016a, 0x8},
+	{0x9016b, 0x448},
+	{0x9016c, 0x109},
+	{0x9016d, 0xf},
+	{0x9016e, 0x7c0},
+	{0x9016f, 0x109},
+	{0x90170, 0x0},
+	{0x90171, 0xe8},
+	{0x90172, 0x109},
+	{0x90173, 0x47},
+	{0x90174, 0x630},
+	{0x90175, 0x109},
+	{0x90176, 0x8},
+	{0x90177, 0x618},
+	{0x90178, 0x109},
+	{0x90179, 0x8},
+	{0x9017a, 0xe0},
+	{0x9017b, 0x109},
+	{0x9017c, 0x0},
+	{0x9017d, 0x7c8},
+	{0x9017e, 0x109},
+	{0x9017f, 0x8},
+	{0x90180, 0x8140},
+	{0x90181, 0x10c},
+	{0x90182, 0x0},
+	{0x90183, 0x1},
+	{0x90184, 0x8},
+	{0x90185, 0x8},
+	{0x90186, 0x4},
+	{0x90187, 0x8},
+	{0x90188, 0x8},
+	{0x90189, 0x7c8},
+	{0x9018a, 0x101},
+	{0x90006, 0x0},
+	{0x90007, 0x0},
+	{0x90008, 0x8},
+	{0x90009, 0x0},
+	{0x9000a, 0x0},
+	{0x9000b, 0x0},
+	{0xd00e7, 0x400},
+	{0x90017, 0x0},
+	{0x9001f, 0x2a},
+	{0x90026, 0x6a},
+	{0x400d0, 0x0},
+	{0x400d1, 0x101},
+	{0x400d2, 0x105},
+	{0x400d3, 0x107},
+	{0x400d4, 0x10f},
+	{0x400d5, 0x202},
+	{0x400d6, 0x20a},
+	{0x400d7, 0x20b},
+	{0x2003a, 0x2},
+	{0x2000b, 0x64},
+	{0x2000c, 0xc8},
+	{0x2000d, 0x7d0},
+	{0x2000e, 0x2c},
+	{0x12000b, 0x14},
+	{0x12000c, 0x29},
+	{0x12000d, 0x1a1},
+	{0x12000e, 0x10},
+	{0x9000c, 0x0},
+	{0x9000d, 0x173},
+	{0x9000e, 0x60},
+	{0x9000f, 0x6110},
+	{0x90010, 0x2152},
+	{0x90011, 0xdfbd},
+	{0x90012, 0x60},
+	{0x90013, 0x6152},
+	{0x20010, 0x5a},
+	{0x20011, 0x3},
+	{0x120010, 0x5a},
+	{0x120011, 0x3},
+	{0x40080, 0xe0},
+	{0x40081, 0x12},
+	{0x40082, 0xe0},
+	{0x40083, 0x12},
+	{0x40084, 0xe0},
+	{0x40085, 0x12},
+	{0x140080, 0xe0},
+	{0x140081, 0x12},
+	{0x140082, 0xe0},
+	{0x140083, 0x12},
+	{0x140084, 0xe0},
+	{0x140085, 0x12},
+	{0x400fd, 0xf},
+	{0x10011, 0x1},
+	{0x10012, 0x1},
+	{0x10013, 0x180},
+	{0x10018, 0x1},
+	{0x10002, 0x6209},
+	{0x100b2, 0x1},
+	{0x101b4, 0x1},
+	{0x102b4, 0x1},
+	{0x103b4, 0x1},
+	{0x104b4, 0x1},
+	{0x105b4, 0x1},
+	{0x106b4, 0x1},
+	{0x107b4, 0x1},
+	{0x108b4, 0x1},
+	{0x11011, 0x1},
+	{0x11012, 0x1},
+	{0x11013, 0x180},
+	{0x11018, 0x1},
+	{0x11002, 0x6209},
+	{0x110b2, 0x1},
+	{0x111b4, 0x1},
+	{0x112b4, 0x1},
+	{0x113b4, 0x1},
+	{0x114b4, 0x1},
+	{0x115b4, 0x1},
+	{0x116b4, 0x1},
+	{0x117b4, 0x1},
+	{0x118b4, 0x1},
+	{0x12011, 0x1},
+	{0x12012, 0x1},
+	{0x12013, 0x180},
+	{0x12018, 0x1},
+	{0x12002, 0x6209},
+	{0x120b2, 0x1},
+	{0x121b4, 0x1},
+	{0x122b4, 0x1},
+	{0x123b4, 0x1},
+	{0x124b4, 0x1},
+	{0x125b4, 0x1},
+	{0x126b4, 0x1},
+	{0x127b4, 0x1},
+	{0x128b4, 0x1},
+	{0x13011, 0x1},
+	{0x13012, 0x1},
+	{0x13013, 0x180},
+	{0x13018, 0x1},
+	{0x13002, 0x6209},
+	{0x130b2, 0x1},
+	{0x131b4, 0x1},
+	{0x132b4, 0x1},
+	{0x133b4, 0x1},
+	{0x134b4, 0x1},
+	{0x135b4, 0x1},
+	{0x136b4, 0x1},
+	{0x137b4, 0x1},
+	{0x138b4, 0x1},
+	{0x2003a, 0x2},
+	{0xc0080, 0x2},
+	{0xd0000, 0x1}
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 3200mts 1D */
+		.drate = 3200,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 667mts 1D */
+		.drate = 667,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P0 3200mts 2D */
+		.drate = 3200,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing_3gb = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3200, 667, },
+};
+
diff --git a/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
new file mode 100644
index 0000000000..b1d1c5223e
--- /dev/null
+++ b/board/technexion/pico-imx8mq/lpddr4_timing_4gb.c
@@ -0,0 +1,1734 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ *
+ * Generated code from MX8M_DDR_tool
+ * Align with uboot-imx_v2018.03_4.14.78_1.0.0_ga
+ */
+
+#include <linux/kernel.h>
+#include <common.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/lpddr4_define.h>
+
+static struct dram_cfg_param ddr_ddrc_cfg[] = {
+	/** Initialize DDRC registers **/
+	{0x3d400304, 0x1},
+	{0x3d400030, 0x1},
+	{0x3d400000, 0xa3080020},
+	{0x3d400028, 0x0},
+	{0x3d400020, 0x203},
+	{0x3d400024, 0x3e800},
+	{0x3d400064, 0x6100e0},
+	{0x3d4000d0, 0xc003061c},
+	{0x3d4000d4, 0x9e0000},
+	{0x3d4000dc, 0xd4002d},
+	{0x3d4000e0, 0x310008},
+	{0x3d4000e8, 0x66004a},
+	{0x3d4000ec, 0x16004a},
+	{0x3d400100, 0x1a201b22},
+	{0x3d400104, 0x60633},
+	{0x3d40010c, 0xc0c000},
+	{0x3d400110, 0xf04080f},
+	{0x3d400114, 0x2040c0c},
+	{0x3d400118, 0x1010007},
+	{0x3d40011c, 0x401},
+	{0x3d400130, 0x20600},
+	{0x3d400134, 0xc100002},
+	{0x3d400138, 0xe6},
+	{0x3d400144, 0xa00050},
+	{0x3d400180, 0xc3200018},
+	{0x3d400184, 0x28061a8},
+	{0x3d400188, 0x0},
+	{0x3d400190, 0x497820a},
+	{0x3d400194, 0x80303},
+	{0x3d4001a0, 0xe0400018},
+	{0x3d4001a4, 0xdf00e4},
+	{0x3d4001a8, 0x80000000},
+	{0x3d4001b0, 0x11},
+	{0x3d4001b4, 0x170a},
+	{0x3d4001c0, 0x1},
+	{0x3d4001c4, 0x1},
+	{0x3d4000f4, 0x639},
+	{0x3d400108, 0x70e1617},
+	{0x3d400200, 0x17},
+	{0x3d40020c, 0x0},
+	{0x3d400210, 0x1f1f},
+	{0x3d400204, 0x80808},
+	{0x3d400214, 0x7070707},
+	{0x3d400218, 0x7070707},
+	{0x3d402020, 0x1},
+	{0x3d402024, 0xd0c0},
+	{0x3d402050, 0x20d040},
+	{0x3d402064, 0x14002f},
+	{0x3d4020dc, 0x940009},
+	{0x3d4020e0, 0x310000},
+	{0x3d4020e8, 0x66004a},
+	{0x3d4020ec, 0x16004a},
+	{0x3d402100, 0xb070508},
+	{0x3d402104, 0x3040b},
+	{0x3d402108, 0x305090c},
+	{0x3d40210c, 0x505000},
+	{0x3d402110, 0x4040204},
+	{0x3d402114, 0x2030303},
+	{0x3d402118, 0x1010004},
+	{0x3d40211c, 0x301},
+	{0x3d402130, 0x20300},
+	{0x3d402134, 0xa100002},
+	{0x3d402138, 0x31},
+	{0x3d402144, 0x220011},
+	{0x3d402180, 0xc0a70006},
+	{0x3d402190, 0x3858202},
+	{0x3d402194, 0x80303},
+	{0x3d4021b4, 0x502},
+	{0x3d400244, 0x0},
+	{0x3d400250, 0x29001505},
+	{0x3d400254, 0x2c},
+	{0x3d40025c, 0x5900575b},
+	{0x3d400264, 0x90000096},
+	{0x3d40026c, 0x1000012c},
+	{0x3d400300, 0x16},
+	{0x3d400304, 0x0},
+	{0x3d40030c, 0x0},
+	{0x3d400320, 0x1},
+	{0x3d40036c, 0x11},
+	{0x3d400400, 0x111},
+	{0x3d400404, 0x10f3},
+	{0x3d400408, 0x72ff},
+	{0x3d400490, 0x1},
+	{0x3d400494, 0xe00},
+	{0x3d400498, 0x62ffff},
+	{0x3d40049c, 0xe00},
+	{0x3d4004a0, 0xffff},
+};
+
+/* PHY Initialize Configuration */
+static struct dram_cfg_param ddr_ddrphy_cfg[] = {
+	{0x100a0, 0x0},
+	{0x100a1, 0x1},
+	{0x100a2, 0x2},
+	{0x100a3, 0x3},
+	{0x100a4, 0x4},
+	{0x100a5, 0x5},
+	{0x100a6, 0x6},
+	{0x100a7, 0x7},
+	{0x110a0, 0x0},
+	{0x110a1, 0x1},
+	{0x110a2, 0x2},
+	{0x110a3, 0x3},
+	{0x110a4, 0x4},
+	{0x110a5, 0x5},
+	{0x110a6, 0x6},
+	{0x110a7, 0x7},
+	{0x120a0, 0x0},
+	{0x120a1, 0x1},
+	{0x120a2, 0x2},
+	{0x120a3, 0x3},
+	{0x120a4, 0x4},
+	{0x120a5, 0x5},
+	{0x120a6, 0x6},
+	{0x120a7, 0x7},
+	{0x130a0, 0x0},
+	{0x130a1, 0x1},
+	{0x130a2, 0x2},
+	{0x130a3, 0x3},
+	{0x130a4, 0x4},
+	{0x130a5, 0x5},
+	{0x130a6, 0x6},
+	{0x130a7, 0x7},
+	{0x20110, 0x2},
+	{0x20111, 0x3},
+	{0x20112, 0x4},
+	{0x20113, 0x5},
+	{0x20114, 0x0},
+	{0x20115, 0x1},
+	{0x1005f, 0x1ff},
+	{0x1015f, 0x1ff},
+	{0x1105f, 0x1ff},
+	{0x1115f, 0x1ff},
+	{0x1205f, 0x1ff},
+	{0x1215f, 0x1ff},
+	{0x1305f, 0x1ff},
+	{0x1315f, 0x1ff},
+	{0x11005f, 0x1ff},
+	{0x11015f, 0x1ff},
+	{0x11105f, 0x1ff},
+	{0x11115f, 0x1ff},
+	{0x11205f, 0x1ff},
+	{0x11215f, 0x1ff},
+	{0x11305f, 0x1ff},
+	{0x11315f, 0x1ff},
+	{0x55, 0x1ff},
+	{0x1055, 0x1ff},
+	{0x2055, 0x1ff},
+	{0x3055, 0x1ff},
+	{0x4055, 0x1ff},
+	{0x5055, 0x1ff},
+	{0x6055, 0x1ff},
+	{0x7055, 0x1ff},
+	{0x8055, 0x1ff},
+	{0x9055, 0x1ff},
+	{0x200c5, 0x19},
+	{0x1200c5, 0x7},
+	{0x2002e, 0x2},
+	{0x12002e, 0x1},
+	{0x90204, 0x0},
+	{0x190204, 0x0},
+	{0x20024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x120024, 0x1ab},
+	{0x2003a, 0x0},
+	{0x20056, 0x3},
+	{0x120056, 0xa},
+	{0x1004d, 0xe00},
+	{0x1014d, 0xe00},
+	{0x1104d, 0xe00},
+	{0x1114d, 0xe00},
+	{0x1204d, 0xe00},
+	{0x1214d, 0xe00},
+	{0x1304d, 0xe00},
+	{0x1314d, 0xe00},
+	{0x11004d, 0xe00},
+	{0x11014d, 0xe00},
+	{0x11104d, 0xe00},
+	{0x11114d, 0xe00},
+	{0x11204d, 0xe00},
+	{0x11214d, 0xe00},
+	{0x11304d, 0xe00},
+	{0x11314d, 0xe00},
+	{0x10049, 0xeba},
+	{0x10149, 0xeba},
+	{0x11049, 0xeba},
+	{0x11149, 0xeba},
+	{0x12049, 0xeba},
+	{0x12149, 0xeba},
+	{0x13049, 0xeba},
+	{0x13149, 0xeba},
+	{0x110049, 0xeba},
+	{0x110149, 0xeba},
+	{0x111049, 0xeba},
+	{0x111149, 0xeba},
+	{0x112049, 0xeba},
+	{0x112149, 0xeba},
+	{0x113049, 0xeba},
+	{0x113149, 0xeba},
+	{0x43, 0x63},
+	{0x1043, 0x63},
+	{0x2043, 0x63},
+	{0x3043, 0x63},
+	{0x4043, 0x63},
+	{0x5043, 0x63},
+	{0x6043, 0x63},
+	{0x7043, 0x63},
+	{0x8043, 0x63},
+	{0x9043, 0x63},
+	{0x20018, 0x3},
+	{0x20075, 0x4},
+	{0x20050, 0x0},
+	{0x20008, 0x320},
+	{0x120008, 0xa7},
+	{0x20088, 0x9},
+	{0x200b2, 0xdc},
+	{0x10043, 0x5a1},
+	{0x10143, 0x5a1},
+	{0x11043, 0x5a1},
+	{0x11143, 0x5a1},
+	{0x12043, 0x5a1},
+	{0x12143, 0x5a1},
+	{0x13043, 0x5a1},
+	{0x13143, 0x5a1},
+	{0x1200b2, 0xdc},
+	{0x110043, 0x5a1},
+	{0x110143, 0x5a1},
+	{0x111043, 0x5a1},
+	{0x111143, 0x5a1},
+	{0x112043, 0x5a1},
+	{0x112143, 0x5a1},
+	{0x113043, 0x5a1},
+	{0x113143, 0x5a1},
+	{0x200fa, 0x1},
+	{0x1200fa, 0x1},
+	{0x20019, 0x1},
+	{0x120019, 0x1},
+	{0x200f0, 0x0},
+	{0x200f1, 0x0},
+	{0x200f2, 0x4444},
+	{0x200f3, 0x8888},
+	{0x200f4, 0x5555},
+	{0x200f5, 0x0},
+	{0x200f6, 0x0},
+	{0x200f7, 0xf000},
+	{0x20025, 0x0},
+	{0x2002d, 0x0},
+	{0x12002d, 0x0},
+	{0x200c7, 0x80},
+	{0x1200c7, 0x80},
+	{0x200ca, 0x106},
+	{0x1200ca, 0x106},
+};
+
+/* ddr phy trained csr */
+static struct dram_cfg_param ddr_ddrphy_trained_csr[] = {
+	{ 0x200b2, 0x0 },
+	{ 0x1200b2, 0x0 },
+	{ 0x2200b2, 0x0 },
+	{ 0x200cb, 0x0 },
+	{ 0x10043, 0x0 },
+	{ 0x110043, 0x0 },
+	{ 0x210043, 0x0 },
+	{ 0x10143, 0x0 },
+	{ 0x110143, 0x0 },
+	{ 0x210143, 0x0 },
+	{ 0x11043, 0x0 },
+	{ 0x111043, 0x0 },
+	{ 0x211043, 0x0 },
+	{ 0x11143, 0x0 },
+	{ 0x111143, 0x0 },
+	{ 0x211143, 0x0 },
+	{ 0x12043, 0x0 },
+	{ 0x112043, 0x0 },
+	{ 0x212043, 0x0 },
+	{ 0x12143, 0x0 },
+	{ 0x112143, 0x0 },
+	{ 0x212143, 0x0 },
+	{ 0x13043, 0x0 },
+	{ 0x113043, 0x0 },
+	{ 0x213043, 0x0 },
+	{ 0x13143, 0x0 },
+	{ 0x113143, 0x0 },
+	{ 0x213143, 0x0 },
+	{ 0x80, 0x0 },
+	{ 0x100080, 0x0 },
+	{ 0x200080, 0x0 },
+	{ 0x1080, 0x0 },
+	{ 0x101080, 0x0 },
+	{ 0x201080, 0x0 },
+	{ 0x2080, 0x0 },
+	{ 0x102080, 0x0 },
+	{ 0x202080, 0x0 },
+	{ 0x3080, 0x0 },
+	{ 0x103080, 0x0 },
+	{ 0x203080, 0x0 },
+	{ 0x4080, 0x0 },
+	{ 0x104080, 0x0 },
+	{ 0x204080, 0x0 },
+	{ 0x5080, 0x0 },
+	{ 0x105080, 0x0 },
+	{ 0x205080, 0x0 },
+	{ 0x6080, 0x0 },
+	{ 0x106080, 0x0 },
+	{ 0x206080, 0x0 },
+	{ 0x7080, 0x0 },
+	{ 0x107080, 0x0 },
+	{ 0x207080, 0x0 },
+	{ 0x8080, 0x0 },
+	{ 0x108080, 0x0 },
+	{ 0x208080, 0x0 },
+	{ 0x9080, 0x0 },
+	{ 0x109080, 0x0 },
+	{ 0x209080, 0x0 },
+	{ 0x10080, 0x0 },
+	{ 0x110080, 0x0 },
+	{ 0x210080, 0x0 },
+	{ 0x10180, 0x0 },
+	{ 0x110180, 0x0 },
+	{ 0x210180, 0x0 },
+	{ 0x11080, 0x0 },
+	{ 0x111080, 0x0 },
+	{ 0x211080, 0x0 },
+	{ 0x11180, 0x0 },
+	{ 0x111180, 0x0 },
+	{ 0x211180, 0x0 },
+	{ 0x12080, 0x0 },
+	{ 0x112080, 0x0 },
+	{ 0x212080, 0x0 },
+	{ 0x12180, 0x0 },
+	{ 0x112180, 0x0 },
+	{ 0x212180, 0x0 },
+	{ 0x13080, 0x0 },
+	{ 0x113080, 0x0 },
+	{ 0x213080, 0x0 },
+	{ 0x13180, 0x0 },
+	{ 0x113180, 0x0 },
+	{ 0x213180, 0x0 },
+	{ 0x10081, 0x0 },
+	{ 0x110081, 0x0 },
+	{ 0x210081, 0x0 },
+	{ 0x10181, 0x0 },
+	{ 0x110181, 0x0 },
+	{ 0x210181, 0x0 },
+	{ 0x11081, 0x0 },
+	{ 0x111081, 0x0 },
+	{ 0x211081, 0x0 },
+	{ 0x11181, 0x0 },
+	{ 0x111181, 0x0 },
+	{ 0x211181, 0x0 },
+	{ 0x12081, 0x0 },
+	{ 0x112081, 0x0 },
+	{ 0x212081, 0x0 },
+	{ 0x12181, 0x0 },
+	{ 0x112181, 0x0 },
+	{ 0x212181, 0x0 },
+	{ 0x13081, 0x0 },
+	{ 0x113081, 0x0 },
+	{ 0x213081, 0x0 },
+	{ 0x13181, 0x0 },
+	{ 0x113181, 0x0 },
+	{ 0x213181, 0x0 },
+	{ 0x100d0, 0x0 },
+	{ 0x1100d0, 0x0 },
+	{ 0x2100d0, 0x0 },
+	{ 0x101d0, 0x0 },
+	{ 0x1101d0, 0x0 },
+	{ 0x2101d0, 0x0 },
+	{ 0x110d0, 0x0 },
+	{ 0x1110d0, 0x0 },
+	{ 0x2110d0, 0x0 },
+	{ 0x111d0, 0x0 },
+	{ 0x1111d0, 0x0 },
+	{ 0x2111d0, 0x0 },
+	{ 0x120d0, 0x0 },
+	{ 0x1120d0, 0x0 },
+	{ 0x2120d0, 0x0 },
+	{ 0x121d0, 0x0 },
+	{ 0x1121d0, 0x0 },
+	{ 0x2121d0, 0x0 },
+	{ 0x130d0, 0x0 },
+	{ 0x1130d0, 0x0 },
+	{ 0x2130d0, 0x0 },
+	{ 0x131d0, 0x0 },
+	{ 0x1131d0, 0x0 },
+	{ 0x2131d0, 0x0 },
+	{ 0x100d1, 0x0 },
+	{ 0x1100d1, 0x0 },
+	{ 0x2100d1, 0x0 },
+	{ 0x101d1, 0x0 },
+	{ 0x1101d1, 0x0 },
+	{ 0x2101d1, 0x0 },
+	{ 0x110d1, 0x0 },
+	{ 0x1110d1, 0x0 },
+	{ 0x2110d1, 0x0 },
+	{ 0x111d1, 0x0 },
+	{ 0x1111d1, 0x0 },
+	{ 0x2111d1, 0x0 },
+	{ 0x120d1, 0x0 },
+	{ 0x1120d1, 0x0 },
+	{ 0x2120d1, 0x0 },
+	{ 0x121d1, 0x0 },
+	{ 0x1121d1, 0x0 },
+	{ 0x2121d1, 0x0 },
+	{ 0x130d1, 0x0 },
+	{ 0x1130d1, 0x0 },
+	{ 0x2130d1, 0x0 },
+	{ 0x131d1, 0x0 },
+	{ 0x1131d1, 0x0 },
+	{ 0x2131d1, 0x0 },
+	{ 0x10068, 0x0 },
+	{ 0x10168, 0x0 },
+	{ 0x10268, 0x0 },
+	{ 0x10368, 0x0 },
+	{ 0x10468, 0x0 },
+	{ 0x10568, 0x0 },
+	{ 0x10668, 0x0 },
+	{ 0x10768, 0x0 },
+	{ 0x10868, 0x0 },
+	{ 0x11068, 0x0 },
+	{ 0x11168, 0x0 },
+	{ 0x11268, 0x0 },
+	{ 0x11368, 0x0 },
+	{ 0x11468, 0x0 },
+	{ 0x11568, 0x0 },
+	{ 0x11668, 0x0 },
+	{ 0x11768, 0x0 },
+	{ 0x11868, 0x0 },
+	{ 0x12068, 0x0 },
+	{ 0x12168, 0x0 },
+	{ 0x12268, 0x0 },
+	{ 0x12368, 0x0 },
+	{ 0x12468, 0x0 },
+	{ 0x12568, 0x0 },
+	{ 0x12668, 0x0 },
+	{ 0x12768, 0x0 },
+	{ 0x12868, 0x0 },
+	{ 0x13068, 0x0 },
+	{ 0x13168, 0x0 },
+	{ 0x13268, 0x0 },
+	{ 0x13368, 0x0 },
+	{ 0x13468, 0x0 },
+	{ 0x13568, 0x0 },
+	{ 0x13668, 0x0 },
+	{ 0x13768, 0x0 },
+	{ 0x13868, 0x0 },
+	{ 0x10069, 0x0 },
+	{ 0x10169, 0x0 },
+	{ 0x10269, 0x0 },
+	{ 0x10369, 0x0 },
+	{ 0x10469, 0x0 },
+	{ 0x10569, 0x0 },
+	{ 0x10669, 0x0 },
+	{ 0x10769, 0x0 },
+	{ 0x10869, 0x0 },
+	{ 0x11069, 0x0 },
+	{ 0x11169, 0x0 },
+	{ 0x11269, 0x0 },
+	{ 0x11369, 0x0 },
+	{ 0x11469, 0x0 },
+	{ 0x11569, 0x0 },
+	{ 0x11669, 0x0 },
+	{ 0x11769, 0x0 },
+	{ 0x11869, 0x0 },
+	{ 0x12069, 0x0 },
+	{ 0x12169, 0x0 },
+	{ 0x12269, 0x0 },
+	{ 0x12369, 0x0 },
+	{ 0x12469, 0x0 },
+	{ 0x12569, 0x0 },
+	{ 0x12669, 0x0 },
+	{ 0x12769, 0x0 },
+	{ 0x12869, 0x0 },
+	{ 0x13069, 0x0 },
+	{ 0x13169, 0x0 },
+	{ 0x13269, 0x0 },
+	{ 0x13369, 0x0 },
+	{ 0x13469, 0x0 },
+	{ 0x13569, 0x0 },
+	{ 0x13669, 0x0 },
+	{ 0x13769, 0x0 },
+	{ 0x13869, 0x0 },
+	{ 0x1008c, 0x0 },
+	{ 0x11008c, 0x0 },
+	{ 0x21008c, 0x0 },
+	{ 0x1018c, 0x0 },
+	{ 0x11018c, 0x0 },
+	{ 0x21018c, 0x0 },
+	{ 0x1108c, 0x0 },
+	{ 0x11108c, 0x0 },
+	{ 0x21108c, 0x0 },
+	{ 0x1118c, 0x0 },
+	{ 0x11118c, 0x0 },
+	{ 0x21118c, 0x0 },
+	{ 0x1208c, 0x0 },
+	{ 0x11208c, 0x0 },
+	{ 0x21208c, 0x0 },
+	{ 0x1218c, 0x0 },
+	{ 0x11218c, 0x0 },
+	{ 0x21218c, 0x0 },
+	{ 0x1308c, 0x0 },
+	{ 0x11308c, 0x0 },
+	{ 0x21308c, 0x0 },
+	{ 0x1318c, 0x0 },
+	{ 0x11318c, 0x0 },
+	{ 0x21318c, 0x0 },
+	{ 0x1008d, 0x0 },
+	{ 0x11008d, 0x0 },
+	{ 0x21008d, 0x0 },
+	{ 0x1018d, 0x0 },
+	{ 0x11018d, 0x0 },
+	{ 0x21018d, 0x0 },
+	{ 0x1108d, 0x0 },
+	{ 0x11108d, 0x0 },
+	{ 0x21108d, 0x0 },
+	{ 0x1118d, 0x0 },
+	{ 0x11118d, 0x0 },
+	{ 0x21118d, 0x0 },
+	{ 0x1208d, 0x0 },
+	{ 0x11208d, 0x0 },
+	{ 0x21208d, 0x0 },
+	{ 0x1218d, 0x0 },
+	{ 0x11218d, 0x0 },
+	{ 0x21218d, 0x0 },
+	{ 0x1308d, 0x0 },
+	{ 0x11308d, 0x0 },
+	{ 0x21308d, 0x0 },
+	{ 0x1318d, 0x0 },
+	{ 0x11318d, 0x0 },
+	{ 0x21318d, 0x0 },
+	{ 0x100c0, 0x0 },
+	{ 0x1100c0, 0x0 },
+	{ 0x2100c0, 0x0 },
+	{ 0x101c0, 0x0 },
+	{ 0x1101c0, 0x0 },
+	{ 0x2101c0, 0x0 },
+	{ 0x102c0, 0x0 },
+	{ 0x1102c0, 0x0 },
+	{ 0x2102c0, 0x0 },
+	{ 0x103c0, 0x0 },
+	{ 0x1103c0, 0x0 },
+	{ 0x2103c0, 0x0 },
+	{ 0x104c0, 0x0 },
+	{ 0x1104c0, 0x0 },
+	{ 0x2104c0, 0x0 },
+	{ 0x105c0, 0x0 },
+	{ 0x1105c0, 0x0 },
+	{ 0x2105c0, 0x0 },
+	{ 0x106c0, 0x0 },
+	{ 0x1106c0, 0x0 },
+	{ 0x2106c0, 0x0 },
+	{ 0x107c0, 0x0 },
+	{ 0x1107c0, 0x0 },
+	{ 0x2107c0, 0x0 },
+	{ 0x108c0, 0x0 },
+	{ 0x1108c0, 0x0 },
+	{ 0x2108c0, 0x0 },
+	{ 0x110c0, 0x0 },
+	{ 0x1110c0, 0x0 },
+	{ 0x2110c0, 0x0 },
+	{ 0x111c0, 0x0 },
+	{ 0x1111c0, 0x0 },
+	{ 0x2111c0, 0x0 },
+	{ 0x112c0, 0x0 },
+	{ 0x1112c0, 0x0 },
+	{ 0x2112c0, 0x0 },
+	{ 0x113c0, 0x0 },
+	{ 0x1113c0, 0x0 },
+	{ 0x2113c0, 0x0 },
+	{ 0x114c0, 0x0 },
+	{ 0x1114c0, 0x0 },
+	{ 0x2114c0, 0x0 },
+	{ 0x115c0, 0x0 },
+	{ 0x1115c0, 0x0 },
+	{ 0x2115c0, 0x0 },
+	{ 0x116c0, 0x0 },
+	{ 0x1116c0, 0x0 },
+	{ 0x2116c0, 0x0 },
+	{ 0x117c0, 0x0 },
+	{ 0x1117c0, 0x0 },
+	{ 0x2117c0, 0x0 },
+	{ 0x118c0, 0x0 },
+	{ 0x1118c0, 0x0 },
+	{ 0x2118c0, 0x0 },
+	{ 0x120c0, 0x0 },
+	{ 0x1120c0, 0x0 },
+	{ 0x2120c0, 0x0 },
+	{ 0x121c0, 0x0 },
+	{ 0x1121c0, 0x0 },
+	{ 0x2121c0, 0x0 },
+	{ 0x122c0, 0x0 },
+	{ 0x1122c0, 0x0 },
+	{ 0x2122c0, 0x0 },
+	{ 0x123c0, 0x0 },
+	{ 0x1123c0, 0x0 },
+	{ 0x2123c0, 0x0 },
+	{ 0x124c0, 0x0 },
+	{ 0x1124c0, 0x0 },
+	{ 0x2124c0, 0x0 },
+	{ 0x125c0, 0x0 },
+	{ 0x1125c0, 0x0 },
+	{ 0x2125c0, 0x0 },
+	{ 0x126c0, 0x0 },
+	{ 0x1126c0, 0x0 },
+	{ 0x2126c0, 0x0 },
+	{ 0x127c0, 0x0 },
+	{ 0x1127c0, 0x0 },
+	{ 0x2127c0, 0x0 },
+	{ 0x128c0, 0x0 },
+	{ 0x1128c0, 0x0 },
+	{ 0x2128c0, 0x0 },
+	{ 0x130c0, 0x0 },
+	{ 0x1130c0, 0x0 },
+	{ 0x2130c0, 0x0 },
+	{ 0x131c0, 0x0 },
+	{ 0x1131c0, 0x0 },
+	{ 0x2131c0, 0x0 },
+	{ 0x132c0, 0x0 },
+	{ 0x1132c0, 0x0 },
+	{ 0x2132c0, 0x0 },
+	{ 0x133c0, 0x0 },
+	{ 0x1133c0, 0x0 },
+	{ 0x2133c0, 0x0 },
+	{ 0x134c0, 0x0 },
+	{ 0x1134c0, 0x0 },
+	{ 0x2134c0, 0x0 },
+	{ 0x135c0, 0x0 },
+	{ 0x1135c0, 0x0 },
+	{ 0x2135c0, 0x0 },
+	{ 0x136c0, 0x0 },
+	{ 0x1136c0, 0x0 },
+	{ 0x2136c0, 0x0 },
+	{ 0x137c0, 0x0 },
+	{ 0x1137c0, 0x0 },
+	{ 0x2137c0, 0x0 },
+	{ 0x138c0, 0x0 },
+	{ 0x1138c0, 0x0 },
+	{ 0x2138c0, 0x0 },
+	{ 0x100c1, 0x0 },
+	{ 0x1100c1, 0x0 },
+	{ 0x2100c1, 0x0 },
+	{ 0x101c1, 0x0 },
+	{ 0x1101c1, 0x0 },
+	{ 0x2101c1, 0x0 },
+	{ 0x102c1, 0x0 },
+	{ 0x1102c1, 0x0 },
+	{ 0x2102c1, 0x0 },
+	{ 0x103c1, 0x0 },
+	{ 0x1103c1, 0x0 },
+	{ 0x2103c1, 0x0 },
+	{ 0x104c1, 0x0 },
+	{ 0x1104c1, 0x0 },
+	{ 0x2104c1, 0x0 },
+	{ 0x105c1, 0x0 },
+	{ 0x1105c1, 0x0 },
+	{ 0x2105c1, 0x0 },
+	{ 0x106c1, 0x0 },
+	{ 0x1106c1, 0x0 },
+	{ 0x2106c1, 0x0 },
+	{ 0x107c1, 0x0 },
+	{ 0x1107c1, 0x0 },
+	{ 0x2107c1, 0x0 },
+	{ 0x108c1, 0x0 },
+	{ 0x1108c1, 0x0 },
+	{ 0x2108c1, 0x0 },
+	{ 0x110c1, 0x0 },
+	{ 0x1110c1, 0x0 },
+	{ 0x2110c1, 0x0 },
+	{ 0x111c1, 0x0 },
+	{ 0x1111c1, 0x0 },
+	{ 0x2111c1, 0x0 },
+	{ 0x112c1, 0x0 },
+	{ 0x1112c1, 0x0 },
+	{ 0x2112c1, 0x0 },
+	{ 0x113c1, 0x0 },
+	{ 0x1113c1, 0x0 },
+	{ 0x2113c1, 0x0 },
+	{ 0x114c1, 0x0 },
+	{ 0x1114c1, 0x0 },
+	{ 0x2114c1, 0x0 },
+	{ 0x115c1, 0x0 },
+	{ 0x1115c1, 0x0 },
+	{ 0x2115c1, 0x0 },
+	{ 0x116c1, 0x0 },
+	{ 0x1116c1, 0x0 },
+	{ 0x2116c1, 0x0 },
+	{ 0x117c1, 0x0 },
+	{ 0x1117c1, 0x0 },
+	{ 0x2117c1, 0x0 },
+	{ 0x118c1, 0x0 },
+	{ 0x1118c1, 0x0 },
+	{ 0x2118c1, 0x0 },
+	{ 0x120c1, 0x0 },
+	{ 0x1120c1, 0x0 },
+	{ 0x2120c1, 0x0 },
+	{ 0x121c1, 0x0 },
+	{ 0x1121c1, 0x0 },
+	{ 0x2121c1, 0x0 },
+	{ 0x122c1, 0x0 },
+	{ 0x1122c1, 0x0 },
+	{ 0x2122c1, 0x0 },
+	{ 0x123c1, 0x0 },
+	{ 0x1123c1, 0x0 },
+	{ 0x2123c1, 0x0 },
+	{ 0x124c1, 0x0 },
+	{ 0x1124c1, 0x0 },
+	{ 0x2124c1, 0x0 },
+	{ 0x125c1, 0x0 },
+	{ 0x1125c1, 0x0 },
+	{ 0x2125c1, 0x0 },
+	{ 0x126c1, 0x0 },
+	{ 0x1126c1, 0x0 },
+	{ 0x2126c1, 0x0 },
+	{ 0x127c1, 0x0 },
+	{ 0x1127c1, 0x0 },
+	{ 0x2127c1, 0x0 },
+	{ 0x128c1, 0x0 },
+	{ 0x1128c1, 0x0 },
+	{ 0x2128c1, 0x0 },
+	{ 0x130c1, 0x0 },
+	{ 0x1130c1, 0x0 },
+	{ 0x2130c1, 0x0 },
+	{ 0x131c1, 0x0 },
+	{ 0x1131c1, 0x0 },
+	{ 0x2131c1, 0x0 },
+	{ 0x132c1, 0x0 },
+	{ 0x1132c1, 0x0 },
+	{ 0x2132c1, 0x0 },
+	{ 0x133c1, 0x0 },
+	{ 0x1133c1, 0x0 },
+	{ 0x2133c1, 0x0 },
+	{ 0x134c1, 0x0 },
+	{ 0x1134c1, 0x0 },
+	{ 0x2134c1, 0x0 },
+	{ 0x135c1, 0x0 },
+	{ 0x1135c1, 0x0 },
+	{ 0x2135c1, 0x0 },
+	{ 0x136c1, 0x0 },
+	{ 0x1136c1, 0x0 },
+	{ 0x2136c1, 0x0 },
+	{ 0x137c1, 0x0 },
+	{ 0x1137c1, 0x0 },
+	{ 0x2137c1, 0x0 },
+	{ 0x138c1, 0x0 },
+	{ 0x1138c1, 0x0 },
+	{ 0x2138c1, 0x0 },
+	{ 0x10020, 0x0 },
+	{ 0x110020, 0x0 },
+	{ 0x210020, 0x0 },
+	{ 0x11020, 0x0 },
+	{ 0x111020, 0x0 },
+	{ 0x211020, 0x0 },
+	{ 0x12020, 0x0 },
+	{ 0x112020, 0x0 },
+	{ 0x212020, 0x0 },
+	{ 0x13020, 0x0 },
+	{ 0x113020, 0x0 },
+	{ 0x213020, 0x0 },
+	{ 0x20072, 0x0 },
+	{ 0x20073, 0x0 },
+	{ 0x20074, 0x0 },
+	{ 0x100aa, 0x0 },
+	{ 0x110aa, 0x0 },
+	{ 0x120aa, 0x0 },
+	{ 0x130aa, 0x0 },
+	{ 0x20010, 0x0 },
+	{ 0x120010, 0x0 },
+	{ 0x220010, 0x0 },
+	{ 0x20011, 0x0 },
+	{ 0x120011, 0x0 },
+	{ 0x220011, 0x0 },
+	{ 0x100ae, 0x0 },
+	{ 0x1100ae, 0x0 },
+	{ 0x2100ae, 0x0 },
+	{ 0x100af, 0x0 },
+	{ 0x1100af, 0x0 },
+	{ 0x2100af, 0x0 },
+	{ 0x110ae, 0x0 },
+	{ 0x1110ae, 0x0 },
+	{ 0x2110ae, 0x0 },
+	{ 0x110af, 0x0 },
+	{ 0x1110af, 0x0 },
+	{ 0x2110af, 0x0 },
+	{ 0x120ae, 0x0 },
+	{ 0x1120ae, 0x0 },
+	{ 0x2120ae, 0x0 },
+	{ 0x120af, 0x0 },
+	{ 0x1120af, 0x0 },
+	{ 0x2120af, 0x0 },
+	{ 0x130ae, 0x0 },
+	{ 0x1130ae, 0x0 },
+	{ 0x2130ae, 0x0 },
+	{ 0x130af, 0x0 },
+	{ 0x1130af, 0x0 },
+	{ 0x2130af, 0x0 },
+	{ 0x20020, 0x0 },
+	{ 0x120020, 0x0 },
+	{ 0x220020, 0x0 },
+	{ 0x100a0, 0x0 },
+	{ 0x100a1, 0x0 },
+	{ 0x100a2, 0x0 },
+	{ 0x100a3, 0x0 },
+	{ 0x100a4, 0x0 },
+	{ 0x100a5, 0x0 },
+	{ 0x100a6, 0x0 },
+	{ 0x100a7, 0x0 },
+	{ 0x110a0, 0x0 },
+	{ 0x110a1, 0x0 },
+	{ 0x110a2, 0x0 },
+	{ 0x110a3, 0x0 },
+	{ 0x110a4, 0x0 },
+	{ 0x110a5, 0x0 },
+	{ 0x110a6, 0x0 },
+	{ 0x110a7, 0x0 },
+	{ 0x120a0, 0x0 },
+	{ 0x120a1, 0x0 },
+	{ 0x120a2, 0x0 },
+	{ 0x120a3, 0x0 },
+	{ 0x120a4, 0x0 },
+	{ 0x120a5, 0x0 },
+	{ 0x120a6, 0x0 },
+	{ 0x120a7, 0x0 },
+	{ 0x130a0, 0x0 },
+	{ 0x130a1, 0x0 },
+	{ 0x130a2, 0x0 },
+	{ 0x130a3, 0x0 },
+	{ 0x130a4, 0x0 },
+	{ 0x130a5, 0x0 },
+	{ 0x130a6, 0x0 },
+	{ 0x130a7, 0x0 },
+	{ 0x2007c, 0x0 },
+	{ 0x12007c, 0x0 },
+	{ 0x22007c, 0x0 },
+	{ 0x2007d, 0x0 },
+	{ 0x12007d, 0x0 },
+	{ 0x22007d, 0x0 },
+	{ 0x400fd, 0x0 },
+	{ 0x400c0, 0x0 },
+	{ 0x90201, 0x0 },
+	{ 0x190201, 0x0 },
+	{ 0x290201, 0x0 },
+	{ 0x90202, 0x0 },
+	{ 0x190202, 0x0 },
+	{ 0x290202, 0x0 },
+	{ 0x90203, 0x0 },
+	{ 0x190203, 0x0 },
+	{ 0x290203, 0x0 },
+	{ 0x90204, 0x0 },
+	{ 0x190204, 0x0 },
+	{ 0x290204, 0x0 },
+	{ 0x90205, 0x0 },
+	{ 0x190205, 0x0 },
+	{ 0x290205, 0x0 },
+	{ 0x90206, 0x0 },
+	{ 0x190206, 0x0 },
+	{ 0x290206, 0x0 },
+	{ 0x90207, 0x0 },
+	{ 0x190207, 0x0 },
+	{ 0x290207, 0x0 },
+	{ 0x90208, 0x0 },
+	{ 0x190208, 0x0 },
+	{ 0x290208, 0x0 },
+	{ 0x10062, 0x0 },
+	{ 0x10162, 0x0 },
+	{ 0x10262, 0x0 },
+	{ 0x10362, 0x0 },
+	{ 0x10462, 0x0 },
+	{ 0x10562, 0x0 },
+	{ 0x10662, 0x0 },
+	{ 0x10762, 0x0 },
+	{ 0x10862, 0x0 },
+	{ 0x11062, 0x0 },
+	{ 0x11162, 0x0 },
+	{ 0x11262, 0x0 },
+	{ 0x11362, 0x0 },
+	{ 0x11462, 0x0 },
+	{ 0x11562, 0x0 },
+	{ 0x11662, 0x0 },
+	{ 0x11762, 0x0 },
+	{ 0x11862, 0x0 },
+	{ 0x12062, 0x0 },
+	{ 0x12162, 0x0 },
+	{ 0x12262, 0x0 },
+	{ 0x12362, 0x0 },
+	{ 0x12462, 0x0 },
+	{ 0x12562, 0x0 },
+	{ 0x12662, 0x0 },
+	{ 0x12762, 0x0 },
+	{ 0x12862, 0x0 },
+	{ 0x13062, 0x0 },
+	{ 0x13162, 0x0 },
+	{ 0x13262, 0x0 },
+	{ 0x13362, 0x0 },
+	{ 0x13462, 0x0 },
+	{ 0x13562, 0x0 },
+	{ 0x13662, 0x0 },
+	{ 0x13762, 0x0 },
+	{ 0x13862, 0x0 },
+	{ 0x20077, 0x0 },
+	{ 0x10001, 0x0 },
+	{ 0x11001, 0x0 },
+	{ 0x12001, 0x0 },
+	{ 0x13001, 0x0 },
+	{ 0x10040, 0x0 },
+	{ 0x10140, 0x0 },
+	{ 0x10240, 0x0 },
+	{ 0x10340, 0x0 },
+	{ 0x10440, 0x0 },
+	{ 0x10540, 0x0 },
+	{ 0x10640, 0x0 },
+	{ 0x10740, 0x0 },
+	{ 0x10840, 0x0 },
+	{ 0x10030, 0x0 },
+	{ 0x10130, 0x0 },
+	{ 0x10230, 0x0 },
+	{ 0x10330, 0x0 },
+	{ 0x10430, 0x0 },
+	{ 0x10530, 0x0 },
+	{ 0x10630, 0x0 },
+	{ 0x10730, 0x0 },
+	{ 0x10830, 0x0 },
+	{ 0x11040, 0x0 },
+	{ 0x11140, 0x0 },
+	{ 0x11240, 0x0 },
+	{ 0x11340, 0x0 },
+	{ 0x11440, 0x0 },
+	{ 0x11540, 0x0 },
+	{ 0x11640, 0x0 },
+	{ 0x11740, 0x0 },
+	{ 0x11840, 0x0 },
+	{ 0x11030, 0x0 },
+	{ 0x11130, 0x0 },
+	{ 0x11230, 0x0 },
+	{ 0x11330, 0x0 },
+	{ 0x11430, 0x0 },
+	{ 0x11530, 0x0 },
+	{ 0x11630, 0x0 },
+	{ 0x11730, 0x0 },
+	{ 0x11830, 0x0 },
+	{ 0x12040, 0x0 },
+	{ 0x12140, 0x0 },
+	{ 0x12240, 0x0 },
+	{ 0x12340, 0x0 },
+	{ 0x12440, 0x0 },
+	{ 0x12540, 0x0 },
+	{ 0x12640, 0x0 },
+	{ 0x12740, 0x0 },
+	{ 0x12840, 0x0 },
+	{ 0x12030, 0x0 },
+	{ 0x12130, 0x0 },
+	{ 0x12230, 0x0 },
+	{ 0x12330, 0x0 },
+	{ 0x12430, 0x0 },
+	{ 0x12530, 0x0 },
+	{ 0x12630, 0x0 },
+	{ 0x12730, 0x0 },
+	{ 0x12830, 0x0 },
+	{ 0x13040, 0x0 },
+	{ 0x13140, 0x0 },
+	{ 0x13240, 0x0 },
+	{ 0x13340, 0x0 },
+	{ 0x13440, 0x0 },
+	{ 0x13540, 0x0 },
+	{ 0x13640, 0x0 },
+	{ 0x13740, 0x0 },
+	{ 0x13840, 0x0 },
+	{ 0x13030, 0x0 },
+	{ 0x13130, 0x0 },
+	{ 0x13230, 0x0 },
+	{ 0x13330, 0x0 },
+	{ 0x13430, 0x0 },
+	{ 0x13530, 0x0 },
+	{ 0x13630, 0x0 },
+	{ 0x13730, 0x0 },
+	{ 0x13830, 0x0 },
+};
+
+/* P0 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x131f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x310},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P1 message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp1_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54002, 0x1},
+	{0x54003, 0x29c},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x121f},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400d, 0x100},
+	{0x54012, 0x310},
+	{0x54019, 0x994},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x994},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0x9400},
+	{0x54033, 0x3109},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0x9400},
+	{0x54039, 0x3109},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{0xd0000, 0x1},
+};
+
+/* P0 2D message block paremeter for training firmware */
+static struct dram_cfg_param ddr_fsp0_2d_cfg[] = {
+	{0xd0000, 0x0},
+	{0x54003, 0xc80},
+	{0x54004, 0x2},
+	{0x54005, 0x2228},
+	{0x54006, 0x11},
+	{0x54008, 0x61},
+	{0x54009, 0xc8},
+	{0x5400b, 0x2},
+	{0x5400f, 0x100},
+	{0x54010, 0x1f7f},
+	{0x54012, 0x310},
+	{0x54019, 0x2dd4},
+	{0x5401a, 0x31},
+	{0x5401b, 0x4a66},
+	{0x5401c, 0x4a08},
+	{0x5401e, 0x16},
+	{0x5401f, 0x2dd4},
+	{0x54020, 0x31},
+	{0x54021, 0x4a66},
+	{0x54022, 0x4a08},
+	{0x54024, 0x16},
+	{0x5402b, 0x1000},
+	{0x5402c, 0x3},
+	{0x54032, 0xd400},
+	{0x54033, 0x312d},
+	{0x54034, 0x6600},
+	{0x54035, 0x84a},
+	{0x54036, 0x4a},
+	{0x54037, 0x1600},
+	{0x54038, 0xd400},
+	{0x54039, 0x312d},
+	{0x5403a, 0x6600},
+	{0x5403b, 0x84a},
+	{0x5403c, 0x4a},
+	{0x5403d, 0x1600},
+	{ 0xd0000, 0x1 },
+};
+
+/* DRAM PHY init engine image */
+static struct dram_cfg_param ddr_phy_pie[] = {
+	{0xd0000, 0x0},
+	{0x90000, 0x10},
+	{0x90001, 0x400},
+	{0x90002, 0x10e},
+	{0x90003, 0x0},
+	{0x90004, 0x0},
+	{0x90005, 0x8},
+	{0x90029, 0xb},
+	{0x9002a, 0x480},
+	{0x9002b, 0x109},
+	{0x9002c, 0x8},
+	{0x9002d, 0x448},
+	{0x9002e, 0x139},
+	{0x9002f, 0x8},
+	{0x90030, 0x478},
+	{0x90031, 0x109},
+	{0x90032, 0x0},
+	{0x90033, 0xe8},
+	{0x90034, 0x109},
+	{0x90035, 0x2},
+	{0x90036, 0x10},
+	{0x90037, 0x139},
+	{0x90038, 0xf},
+	{0x90039, 0x7c0},
+	{0x9003a, 0x139},
+	{0x9003b, 0x44},
+	{0x9003c, 0x630},
+	{0x9003d, 0x159},
+	{0x9003e, 0x14f},
+	{0x9003f, 0x630},
+	{0x90040, 0x159},
+	{0x90041, 0x47},
+	{0x90042, 0x630},
+	{0x90043, 0x149},
+	{0x90044, 0x4f},
+	{0x90045, 0x630},
+	{0x90046, 0x179},
+	{0x90047, 0x8},
+	{0x90048, 0xe0},
+	{0x90049, 0x109},
+	{0x9004a, 0x0},
+	{0x9004b, 0x7c8},
+	{0x9004c, 0x109},
+	{0x9004d, 0x0},
+	{0x9004e, 0x1},
+	{0x9004f, 0x8},
+	{0x90050, 0x0},
+	{0x90051, 0x45a},
+	{0x90052, 0x9},
+	{0x90053, 0x0},
+	{0x90054, 0x448},
+	{0x90055, 0x109},
+	{0x90056, 0x40},
+	{0x90057, 0x630},
+	{0x90058, 0x179},
+	{0x90059, 0x1},
+	{0x9005a, 0x618},
+	{0x9005b, 0x109},
+	{0x9005c, 0x40c0},
+	{0x9005d, 0x630},
+	{0x9005e, 0x149},
+	{0x9005f, 0x8},
+	{0x90060, 0x4},
+	{0x90061, 0x48},
+	{0x90062, 0x4040},
+	{0x90063, 0x630},
+	{0x90064, 0x149},
+	{0x90065, 0x0},
+	{0x90066, 0x4},
+	{0x90067, 0x48},
+	{0x90068, 0x40},
+	{0x90069, 0x630},
+	{0x9006a, 0x149},
+	{0x9006b, 0x10},
+	{0x9006c, 0x4},
+	{0x9006d, 0x18},
+	{0x9006e, 0x0},
+	{0x9006f, 0x4},
+	{0x90070, 0x78},
+	{0x90071, 0x549},
+	{0x90072, 0x630},
+	{0x90073, 0x159},
+	{0x90074, 0xd49},
+	{0x90075, 0x630},
+	{0x90076, 0x159},
+	{0x90077, 0x94a},
+	{0x90078, 0x630},
+	{0x90079, 0x159},
+	{0x9007a, 0x441},
+	{0x9007b, 0x630},
+	{0x9007c, 0x149},
+	{0x9007d, 0x42},
+	{0x9007e, 0x630},
+	{0x9007f, 0x149},
+	{0x90080, 0x1},
+	{0x90081, 0x630},
+	{0x90082, 0x149},
+	{0x90083, 0x0},
+	{0x90084, 0xe0},
+	{0x90085, 0x109},
+	{0x90086, 0xa},
+	{0x90087, 0x10},
+	{0x90088, 0x109},
+	{0x90089, 0x9},
+	{0x9008a, 0x3c0},
+	{0x9008b, 0x149},
+	{0x9008c, 0x9},
+	{0x9008d, 0x3c0},
+	{0x9008e, 0x159},
+	{0x9008f, 0x18},
+	{0x90090, 0x10},
+	{0x90091, 0x109},
+	{0x90092, 0x0},
+	{0x90093, 0x3c0},
+	{0x90094, 0x109},
+	{0x90095, 0x18},
+	{0x90096, 0x4},
+	{0x90097, 0x48},
+	{0x90098, 0x18},
+	{0x90099, 0x4},
+	{0x9009a, 0x58},
+	{0x9009b, 0xa},
+	{0x9009c, 0x10},
+	{0x9009d, 0x109},
+	{0x9009e, 0x2},
+	{0x9009f, 0x10},
+	{0x900a0, 0x109},
+	{0x900a1, 0x5},
+	{0x900a2, 0x7c0},
+	{0x900a3, 0x109},
+	{0x900a4, 0x10},
+	{0x900a5, 0x10},
+	{0x900a6, 0x109},
+	{0x40000, 0x811},
+	{0x40020, 0x880},
+	{0x40040, 0x0},
+	{0x40060, 0x0},
+	{0x40001, 0x4008},
+	{0x40021, 0x83},
+	{0x40041, 0x4f},
+	{0x40061, 0x0},
+	{0x40002, 0x4040},
+	{0x40022, 0x83},
+	{0x40042, 0x51},
+	{0x40062, 0x0},
+	{0x40003, 0x811},
+	{0x40023, 0x880},
+	{0x40043, 0x0},
+	{0x40063, 0x0},
+	{0x40004, 0x720},
+	{0x40024, 0xf},
+	{0x40044, 0x1740},
+	{0x40064, 0x0},
+	{0x40005, 0x16},
+	{0x40025, 0x83},
+	{0x40045, 0x4b},
+	{0x40065, 0x0},
+	{0x40006, 0x716},
+	{0x40026, 0xf},
+	{0x40046, 0x2001},
+	{0x40066, 0x0},
+	{0x40007, 0x716},
+	{0x40027, 0xf},
+	{0x40047, 0x2800},
+	{0x40067, 0x0},
+	{0x40008, 0x716},
+	{0x40028, 0xf},
+	{0x40048, 0xf00},
+	{0x40068, 0x0},
+	{0x40009, 0x720},
+	{0x40029, 0xf},
+	{0x40049, 0x1400},
+	{0x40069, 0x0},
+	{0x4000a, 0xe08},
+	{0x4002a, 0xc15},
+	{0x4004a, 0x0},
+	{0x4006a, 0x0},
+	{0x4000b, 0x623},
+	{0x4002b, 0x15},
+	{0x4004b, 0x0},
+	{0x4006b, 0x0},
+	{0x4000c, 0x4028},
+	{0x4002c, 0x80},
+	{0x4004c, 0x0},
+	{0x4006c, 0x0},
+	{0x4000d, 0xe08},
+	{0x4002d, 0xc1a},
+	{0x4004d, 0x0},
+	{0x4006d, 0x0},
+	{0x4000e, 0x623},
+	{0x4002e, 0x1a},
+	{0x4004e, 0x0},
+	{0x4006e, 0x0},
+	{0x4000f, 0x4040},
+	{0x4002f, 0x80},
+	{0x4004f, 0x0},
+	{0x4006f, 0x0},
+	{0x40010, 0x2604},
+	{0x40030, 0x15},
+	{0x40050, 0x0},
+	{0x40070, 0x0},
+	{0x40011, 0x708},
+	{0x40031, 0x5},
+	{0x40051, 0x0},
+	{0x40071, 0x2002},
+	{0x40012, 0x8},
+	{0x40032, 0x80},
+	{0x40052, 0x0},
+	{0x40072, 0x0},
+	{0x40013, 0x2604},
+	{0x40033, 0x1a},
+	{0x40053, 0x0},
+	{0x40073, 0x0},
+	{0x40014, 0x708},
+	{0x40034, 0xa},
+	{0x40054, 0x0},
+	{0x40074, 0x2002},
+	{0x40015, 0x4040},
+	{0x40035, 0x80},
+	{0x40055, 0x0},
+	{0x40075, 0x0},
+	{0x40016, 0x60a},
+	{0x40036, 0x15},
+	{0x40056, 0x1200},
+	{0x40076, 0x0},
+	{0x40017, 0x61a},
+	{0x40037, 0x15},
+	{0x40057, 0x1300},
+	{0x40077, 0x0},
+	{0x40018, 0x60a},
+	{0x40038, 0x1a},
+	{0x40058, 0x1200},
+	{0x40078, 0x0},
+	{0x40019, 0x642},
+	{0x40039, 0x1a},
+	{0x40059, 0x1300},
+	{0x40079, 0x0},
+	{0x4001a, 0x4808},
+	{0x4003a, 0x880},
+	{0x4005a, 0x0},
+	{0x4007a, 0x0},
+	{0x900a7, 0x0},
+	{0x900a8, 0x790},
+	{0x900a9, 0x11a},
+	{0x900aa, 0x8},
+	{0x900ab, 0x7aa},
+	{0x900ac, 0x2a},
+	{0x900ad, 0x10},
+	{0x900ae, 0x7b2},
+	{0x900af, 0x2a},
+	{0x900b0, 0x0},
+	{0x900b1, 0x7c8},
+	{0x900b2, 0x109},
+	{0x900b3, 0x10},
+	{0x900b4, 0x2a8},
+	{0x900b5, 0x129},
+	{0x900b6, 0x8},
+	{0x900b7, 0x370},
+	{0x900b8, 0x129},
+	{0x900b9, 0xa},
+	{0x900ba, 0x3c8},
+	{0x900bb, 0x1a9},
+	{0x900bc, 0xc},
+	{0x900bd, 0x408},
+	{0x900be, 0x199},
+	{0x900bf, 0x14},
+	{0x900c0, 0x790},
+	{0x900c1, 0x11a},
+	{0x900c2, 0x8},
+	{0x900c3, 0x4},
+	{0x900c4, 0x18},
+	{0x900c5, 0xe},
+	{0x900c6, 0x408},
+	{0x900c7, 0x199},
+	{0x900c8, 0x8},
+	{0x900c9, 0x8568},
+	{0x900ca, 0x108},
+	{0x900cb, 0x18},
+	{0x900cc, 0x790},
+	{0x900cd, 0x16a},
+	{0x900ce, 0x8},
+	{0x900cf, 0x1d8},
+	{0x900d0, 0x169},
+	{0x900d1, 0x10},
+	{0x900d2, 0x8558},
+	{0x900d3, 0x168},
+	{0x900d4, 0x70},
+	{0x900d5, 0x788},
+	{0x900d6, 0x16a},
+	{0x900d7, 0x1ff8},
+	{0x900d8, 0x85a8},
+	{0x900d9, 0x1e8},
+	{0x900da, 0x50},
+	{0x900db, 0x798},
+	{0x900dc, 0x16a},
+	{0x900dd, 0x60},
+	{0x900de, 0x7a0},
+	{0x900df, 0x16a},
+	{0x900e0, 0x8},
+	{0x900e1, 0x8310},
+	{0x900e2, 0x168},
+	{0x900e3, 0x8},
+	{0x900e4, 0xa310},
+	{0x900e5, 0x168},
+	{0x900e6, 0xa},
+	{0x900e7, 0x408},
+	{0x900e8, 0x169},
+	{0x900e9, 0x6e},
+	{0x900ea, 0x0},
+	{0x900eb, 0x68},
+	{0x900ec, 0x0},
+	{0x900ed, 0x408},
+	{0x900ee, 0x169},
+	{0x900ef, 0x0},
+	{0x900f0, 0x8310},
+	{0x900f1, 0x168},
+	{0x900f2, 0x0},
+	{0x900f3, 0xa310},
+	{0x900f4, 0x168},
+	{0x900f5, 0x1ff8},
+	{0x900f6, 0x85a8},
+	{0x900f7, 0x1e8},
+	{0x900f8, 0x68},
+	{0x900f9, 0x798},
+	{0x900fa, 0x16a},
+	{0x900fb, 0x78},
+	{0x900fc, 0x7a0},
+	{0x900fd, 0x16a},
+	{0x900fe, 0x68},
+	{0x900ff, 0x790},
+	{0x90100, 0x16a},
+	{0x90101, 0x8},
+	{0x90102, 0x8b10},
+	{0x90103, 0x168},
+	{0x90104, 0x8},
+	{0x90105, 0xab10},
+	{0x90106, 0x168},
+	{0x90107, 0xa},
+	{0x90108, 0x408},
+	{0x90109, 0x169},
+	{0x9010a, 0x58},
+	{0x9010b, 0x0},
+	{0x9010c, 0x68},
+	{0x9010d, 0x0},
+	{0x9010e, 0x408},
+	{0x9010f, 0x169},
+	{0x90110, 0x0},
+	{0x90111, 0x8b10},
+	{0x90112, 0x168},
+	{0x90113, 0x0},
+	{0x90114, 0xab10},
+	{0x90115, 0x168},
+	{0x90116, 0x0},
+	{0x90117, 0x1d8},
+	{0x90118, 0x169},
+	{0x90119, 0x80},
+	{0x9011a, 0x790},
+	{0x9011b, 0x16a},
+	{0x9011c, 0x18},
+	{0x9011d, 0x7aa},
+	{0x9011e, 0x6a},
+	{0x9011f, 0xa},
+	{0x90120, 0x0},
+	{0x90121, 0x1e9},
+	{0x90122, 0x8},
+	{0x90123, 0x8080},
+	{0x90124, 0x108},
+	{0x90125, 0xf},
+	{0x90126, 0x408},
+	{0x90127, 0x169},
+	{0x90128, 0xc},
+	{0x90129, 0x0},
+	{0x9012a, 0x68},
+	{0x9012b, 0x9},
+	{0x9012c, 0x0},
+	{0x9012d, 0x1a9},
+	{0x9012e, 0x0},
+	{0x9012f, 0x408},
+	{0x90130, 0x169},
+	{0x90131, 0x0},
+	{0x90132, 0x8080},
+	{0x90133, 0x108},
+	{0x90134, 0x8},
+	{0x90135, 0x7aa},
+	{0x90136, 0x6a},
+	{0x90137, 0x0},
+	{0x90138, 0x8568},
+	{0x90139, 0x108},
+	{0x9013a, 0xb7},
+	{0x9013b, 0x790},
+	{0x9013c, 0x16a},
+	{0x9013d, 0x1f},
+	{0x9013e, 0x0},
+	{0x9013f, 0x68},
+	{0x90140, 0x8},
+	{0x90141, 0x8558},
+	{0x90142, 0x168},
+	{0x90143, 0xf},
+	{0x90144, 0x408},
+	{0x90145, 0x169},
+	{0x90146, 0xc},
+	{0x90147, 0x0},
+	{0x90148, 0x68},
+	{0x90149, 0x0},
+	{0x9014a, 0x408},
+	{0x9014b, 0x169},
+	{0x9014c, 0x0},
+	{0x9014d, 0x8558},
+	{0x9014e, 0x168},
+	{0x9014f, 0x8},
+	{0x90150, 0x3c8},
+	{0x90151, 0x1a9},
+	{0x90152, 0x3},
+	{0x90153, 0x370},
+	{0x90154, 0x129},
+	{0x90155, 0x20},
+	{0x90156, 0x2aa},
+	{0x90157, 0x9},
+	{0x90158, 0x0},
+	{0x90159, 0x400},
+	{0x9015a, 0x10e},
+	{0x9015b, 0x8},
+	{0x9015c, 0xe8},
+	{0x9015d, 0x109},
+	{0x9015e, 0x0},
+	{0x9015f, 0x8140},
+	{0x90160, 0x10c},
+	{0x90161, 0x10},
+	{0x90162, 0x8138},
+	{0x90163, 0x10c},
+	{0x90164, 0x8},
+	{0x90165, 0x7c8},
+	{0x90166, 0x101},
+	{0x90167, 0x8},
+	{0x90168, 0x0},
+	{0x90169, 0x8},
+	{0x9016a, 0x8},
+	{0x9016b, 0x448},
+	{0x9016c, 0x109},
+	{0x9016d, 0xf},
+	{0x9016e, 0x7c0},
+	{0x9016f, 0x109},
+	{0x90170, 0x0},
+	{0x90171, 0xe8},
+	{0x90172, 0x109},
+	{0x90173, 0x47},
+	{0x90174, 0x630},
+	{0x90175, 0x109},
+	{0x90176, 0x8},
+	{0x90177, 0x618},
+	{0x90178, 0x109},
+	{0x90179, 0x8},
+	{0x9017a, 0xe0},
+	{0x9017b, 0x109},
+	{0x9017c, 0x0},
+	{0x9017d, 0x7c8},
+	{0x9017e, 0x109},
+	{0x9017f, 0x8},
+	{0x90180, 0x8140},
+	{0x90181, 0x10c},
+	{0x90182, 0x0},
+	{0x90183, 0x1},
+	{0x90184, 0x8},
+	{0x90185, 0x8},
+	{0x90186, 0x4},
+	{0x90187, 0x8},
+	{0x90188, 0x8},
+	{0x90189, 0x7c8},
+	{0x9018a, 0x101},
+	{0x90006, 0x0},
+	{0x90007, 0x0},
+	{0x90008, 0x8},
+	{0x90009, 0x0},
+	{0x9000a, 0x0},
+	{0x9000b, 0x0},
+	{0xd00e7, 0x400},
+	{0x90017, 0x0},
+	{0x9001f, 0x2a},
+	{0x90026, 0x6a},
+	{0x400d0, 0x0},
+	{0x400d1, 0x101},
+	{0x400d2, 0x105},
+	{0x400d3, 0x107},
+	{0x400d4, 0x10f},
+	{0x400d5, 0x202},
+	{0x400d6, 0x20a},
+	{0x400d7, 0x20b},
+	{0x2003a, 0x2},
+	{0x2000b, 0x64},
+	{0x2000c, 0xc8},
+	{0x2000d, 0x7d0},
+	{0x2000e, 0x2c},
+	{0x12000b, 0x14},
+	{0x12000c, 0x29},
+	{0x12000d, 0x1a1},
+	{0x12000e, 0x10},
+	{0x9000c, 0x0},
+	{0x9000d, 0x173},
+	{0x9000e, 0x60},
+	{0x9000f, 0x6110},
+	{0x90010, 0x2152},
+	{0x90011, 0xdfbd},
+	{0x90012, 0x60},
+	{0x90013, 0x6152},
+	{0x20010, 0x5a},
+	{0x20011, 0x3},
+	{0x120010, 0x5a},
+	{0x120011, 0x3},
+	{0x40080, 0xe0},
+	{0x40081, 0x12},
+	{0x40082, 0xe0},
+	{0x40083, 0x12},
+	{0x40084, 0xe0},
+	{0x40085, 0x12},
+	{0x140080, 0xe0},
+	{0x140081, 0x12},
+	{0x140082, 0xe0},
+	{0x140083, 0x12},
+	{0x140084, 0xe0},
+	{0x140085, 0x12},
+	{0x400fd, 0xf},
+	{0x10011, 0x1},
+	{0x10012, 0x1},
+	{0x10013, 0x180},
+	{0x10018, 0x1},
+	{0x10002, 0x6209},
+	{0x100b2, 0x1},
+	{0x101b4, 0x1},
+	{0x102b4, 0x1},
+	{0x103b4, 0x1},
+	{0x104b4, 0x1},
+	{0x105b4, 0x1},
+	{0x106b4, 0x1},
+	{0x107b4, 0x1},
+	{0x108b4, 0x1},
+	{0x11011, 0x1},
+	{0x11012, 0x1},
+	{0x11013, 0x180},
+	{0x11018, 0x1},
+	{0x11002, 0x6209},
+	{0x110b2, 0x1},
+	{0x111b4, 0x1},
+	{0x112b4, 0x1},
+	{0x113b4, 0x1},
+	{0x114b4, 0x1},
+	{0x115b4, 0x1},
+	{0x116b4, 0x1},
+	{0x117b4, 0x1},
+	{0x118b4, 0x1},
+	{0x12011, 0x1},
+	{0x12012, 0x1},
+	{0x12013, 0x180},
+	{0x12018, 0x1},
+	{0x12002, 0x6209},
+	{0x120b2, 0x1},
+	{0x121b4, 0x1},
+	{0x122b4, 0x1},
+	{0x123b4, 0x1},
+	{0x124b4, 0x1},
+	{0x125b4, 0x1},
+	{0x126b4, 0x1},
+	{0x127b4, 0x1},
+	{0x128b4, 0x1},
+	{0x13011, 0x1},
+	{0x13012, 0x1},
+	{0x13013, 0x180},
+	{0x13018, 0x1},
+	{0x13002, 0x6209},
+	{0x130b2, 0x1},
+	{0x131b4, 0x1},
+	{0x132b4, 0x1},
+	{0x133b4, 0x1},
+	{0x134b4, 0x1},
+	{0x135b4, 0x1},
+	{0x136b4, 0x1},
+	{0x137b4, 0x1},
+	{0x138b4, 0x1},
+	{0x2003a, 0x2},
+	{0xc0080, 0x2},
+	{0xd0000, 0x1}
+};
+
+static struct dram_fsp_msg ddr_dram_fsp_msg[] = {
+	{
+		/* P0 3200mts 1D */
+		.drate = 3200,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp0_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_cfg),
+	},
+	{
+		/* P1 667mts 1D */
+		.drate = 667,
+		.fw_type = FW_1D_IMAGE,
+		.fsp_cfg = ddr_fsp1_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp1_cfg),
+	},
+	{
+		/* P0 3200mts 2D */
+		.drate = 3200,
+		.fw_type = FW_2D_IMAGE,
+		.fsp_cfg = ddr_fsp0_2d_cfg,
+		.fsp_cfg_num = ARRAY_SIZE(ddr_fsp0_2d_cfg),
+	},
+};
+
+/* ddr timing config params */
+struct dram_timing_info dram_timing_4gb = {
+	.ddrc_cfg = ddr_ddrc_cfg,
+	.ddrc_cfg_num = ARRAY_SIZE(ddr_ddrc_cfg),
+	.ddrphy_cfg = ddr_ddrphy_cfg,
+	.ddrphy_cfg_num = ARRAY_SIZE(ddr_ddrphy_cfg),
+	.fsp_msg = ddr_dram_fsp_msg,
+	.fsp_msg_num = ARRAY_SIZE(ddr_dram_fsp_msg),
+	.ddrphy_trained_csr = ddr_ddrphy_trained_csr,
+	.ddrphy_trained_csr_num = ARRAY_SIZE(ddr_ddrphy_trained_csr),
+	.ddrphy_pie = ddr_phy_pie,
+	.ddrphy_pie_num = ARRAY_SIZE(ddr_phy_pie),
+	.fsp_table = { 3200, 667, },
+};
+
diff --git a/board/technexion/pico-imx8mq/pico-imx8mq.c b/board/technexion/pico-imx8mq/pico-imx8mq.c
new file mode 100644
index 0000000000..2a3e6e7e26
--- /dev/null
+++ b/board/technexion/pico-imx8mq/pico-imx8mq.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include <common.h>
+#include <env.h>
+#include <init.h>
+#include <malloc.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <miiphy.h>
+#include <netdev.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm-generic/gpio.h>
+#include <fsl_esdhc_imx.h>
+#include <mmc.h>
+#include <asm/arch/imx8mq_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <asm/arch/clock.h>
+#include <linux/delay.h>
+#include <spl.h>
+#include <power/pmic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
+
+#define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE)
+
+static iomux_v3_cfg_t const wdog_pads[] = {
+	IMX8MQ_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const uart_pads[] = {
+	IMX8MQ_PAD_UART1_RXD__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
+	IMX8MQ_PAD_UART1_TXD__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
+};
+
+int board_early_init_f(void)
+{
+	struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
+
+	imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
+	set_wdog_reset(wdog);
+
+	imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	int ddr_size = readl(M4_BOOTROM_BASE_ADDR);
+
+	if (ddr_size == 0x4)
+		gd->ram_size = 0x100000000;
+	else if (ddr_size == 0x3)
+		gd->ram_size = 0xc0000000;
+	else if (ddr_size == 0x2)
+		gd->ram_size = 0x80000000;
+	else if (ddr_size == 0x1)
+		gd->ram_size = 0x40000000;
+	else
+		printf("Unknown DDR type!!!\n");
+
+	/* rom_pointer[1] contains the size of TEE occupies */
+	if (rom_pointer[1])
+		gd->ram_size -= rom_pointer[1];
+
+	return 0;
+}
+
+#ifdef CONFIG_FEC_MXC
+#define FEC_RST_PAD IMX_GPIO_NR(1, 9)
+#define FEC_PWR_PAD IMX_GPIO_NR(1, 0)
+static iomux_v3_cfg_t const fec1_pads[] = {
+	/* Reset */
+	IMX8MQ_PAD_GPIO1_IO09__GPIO1_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	/* Power */
+	IMX8MQ_PAD_GPIO1_IO00__GPIO1_IO0 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static void setup_iomux_fec(void)
+{
+	imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
+
+	gpio_request(IMX_GPIO_NR(1, 0), "fec1_pwr");
+	gpio_direction_output(IMX_GPIO_NR(1, 0), 1);
+	udelay(500);
+
+	gpio_request(IMX_GPIO_NR(1, 9), "fec1_rst");
+	gpio_direction_output(IMX_GPIO_NR(1, 9), 0);
+	udelay(500);
+	gpio_direction_output(IMX_GPIO_NR(1, 9), 1);
+}
+
+static int setup_fec(void)
+{
+	struct iomuxc_gpr_base_regs *gpr =
+		(struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR;
+
+	setup_iomux_fec();
+
+	/* Use 125M anatop REF_CLK1 for ENET1, not from external */
+	clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0);
+	return set_clk_enet(ENET_125MHZ);
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+	/* enable rgmii rxc skew and phy mode select to RGMII copper */
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+	return 0;
+}
+#endif
+
+int board_init(void)
+{
+#ifdef CONFIG_FEC_MXC
+	setup_fec();
+#endif
+
+	return 0;
+}
+
+int board_mmc_get_env_dev(int devno)
+{
+	return devno;
+}
+
+int board_late_init(void)
+{
+#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+	env_set("board_rev", "iMX8MQ");
+#endif
+	return 0;
+}
diff --git a/board/technexion/pico-imx8mq/spl.c b/board/technexion/pico-imx8mq/spl.c
new file mode 100644
index 0000000000..1677e033c7
--- /dev/null
+++ b/board/technexion/pico-imx8mq/spl.c
@@ -0,0 +1,226 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 NXP
+ */
+
+#include <common.h>
+#include <hang.h>
+#include <init.h>
+#include <log.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ddr.h>
+#include <asm/arch/imx8mq_pins.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/io.h>
+#include <asm/mach-imx/gpio.h>
+#include <asm/mach-imx/iomux-v3.h>
+#include <asm/mach-imx/mxc_i2c.h>
+#include <linux/delay.h>
+#include <errno.h>
+#include <fsl_esdhc_imx.h>
+#include <mmc.h>
+#include <spl.h>
+
+#include "lpddr4_timing.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DDR_DET_1		IMX_GPIO_NR(3, 11)
+#define DDR_DET_2		IMX_GPIO_NR(3, 12)
+#define DDR_DET_3		IMX_GPIO_NR(3, 13)
+
+static iomux_v3_cfg_t const verdet_pads[] = {
+	IMX8MQ_PAD_NAND_DATA01__GPIO3_IO7 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA02__GPIO3_IO8 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA03__GPIO3_IO9 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA04__GPIO3_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA05__GPIO3_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA06__GPIO3_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL),
+	IMX8MQ_PAD_NAND_DATA07__GPIO3_IO13 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+/*
+ * DDR_DET_1    DDR_DET_2   DDR_DET_3
+ *    0            0            1       4G LPDDR4
+ *    1            1            1       3G LPDDR4
+ *    1            1            0       2G LPDDR4
+ *    1            0            1       1G LPDDR4
+ */
+static void spl_dram_init(void)
+{
+	struct dram_timing_info *dram_timing;
+	u8 ddr = 0, size;
+
+	imx_iomux_v3_setup_multiple_pads(verdet_pads, ARRAY_SIZE(verdet_pads));
+
+	gpio_request(DDR_DET_1, "ddr_det_1");
+	gpio_direction_input(DDR_DET_1);
+	gpio_request(DDR_DET_2, "ddr_det_2");
+	gpio_direction_input(DDR_DET_2);
+	gpio_request(DDR_DET_3, "ddr_det_3");
+	gpio_direction_input(DDR_DET_3);
+
+	ddr |= !!gpio_get_value(DDR_DET_3) << 0;
+	ddr |= !!gpio_get_value(DDR_DET_2) << 1;
+	ddr |= !!gpio_get_value(DDR_DET_1) << 2;
+
+	switch (ddr) {
+	case 0x1:
+		size = 4;
+		dram_timing = &dram_timing_4gb;
+		break;
+	case 0x7:
+		size = 3;
+		dram_timing = &dram_timing_3gb;
+		break;
+	case 0x6:
+		size = 2;
+		dram_timing = &dram_timing_2gb;
+		break;
+	case 0x5:
+		size = 1;
+		dram_timing = &dram_timing_1gb;
+		break;
+	default:
+		puts("Unknown DDR type!!!\n");
+		return;
+	}
+
+	printf("%s: LPDDR4 %d GiB\n", __func__, size);
+	ddr_init(dram_timing);
+	writel(size, M4_BOOTROM_BASE_ADDR);
+}
+
+#define USDHC2_CD_GPIO	IMX_GPIO_NR(2, 12)
+#define USDHC1_PWR_GPIO IMX_GPIO_NR(2, 10)
+#define USDHC2_PWR_GPIO IMX_GPIO_NR(2, 19)
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
+	int ret = 0;
+
+	switch (cfg->esdhc_base) {
+	case USDHC1_BASE_ADDR:
+		ret = 1;
+		break;
+	case USDHC2_BASE_ADDR:
+		ret = !gpio_get_value(USDHC2_CD_GPIO);
+		return ret;
+	}
+
+	return 1;
+}
+
+#define USDHC_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | \
+			 PAD_CTL_FSEL2)
+#define USDHC_GPIO_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_DSE1)
+
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+	IMX8MQ_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA4__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA5__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA6__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_DATA7__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD1_RESET_B__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const usdhc2_pads[] = {
+	IMX8MQ_PAD_SD2_CLK__USDHC2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_CMD__USDHC2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_DATA0__USDHC2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_DATA1__USDHC2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_DATA2__USDHC2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_DATA3__USDHC2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+	IMX8MQ_PAD_SD2_CD_B__GPIO2_IO12 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
+	IMX8MQ_PAD_SD2_RESET_B__GPIO2_IO19 | MUX_PAD_CTRL(USDHC_GPIO_PAD_CTRL),
+};
+
+static struct fsl_esdhc_cfg usdhc_cfg[2] = {
+	{USDHC1_BASE_ADDR, 0, 8},
+	{USDHC2_BASE_ADDR, 0, 4},
+};
+
+int board_mmc_init(bd_t *bis)
+{
+	int ret;
+	/*
+	 * According to the board_mmc_init() the following map is done:
+	 * (U-Boot device node)    (Physical Port)
+	 * mmc0                    USDHC1
+	 * mmc1                    USDHC2
+	 */
+	init_clk_usdhc(0);
+	usdhc_cfg[0].sdhc_clk = mxc_get_clock(USDHC1_CLK_ROOT);
+	imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
+	gpio_request(USDHC1_PWR_GPIO, "usdhc1_reset");
+	gpio_direction_output(USDHC1_PWR_GPIO, 0);
+	udelay(500);
+	gpio_direction_output(USDHC1_PWR_GPIO, 1);
+	ret = fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
+	if (ret)
+		return ret;
+
+	init_clk_usdhc(1);
+	usdhc_cfg[1].sdhc_clk = mxc_get_clock(USDHC2_CLK_ROOT);
+	imx_iomux_v3_setup_multiple_pads(usdhc2_pads, ARRAY_SIZE(usdhc2_pads));
+	gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset");
+	gpio_direction_output(USDHC2_PWR_GPIO, 0);
+	udelay(500);
+	gpio_direction_output(USDHC2_PWR_GPIO, 1);
+	return fsl_esdhc_initialize(bis, &usdhc_cfg[1]);
+}
+
+void spl_board_init(void)
+{
+	puts("Normal Boot\n");
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+	/* Just empty function now - can't decide what to choose */
+	debug("%s: %s\n", __func__, name);
+
+	return 0;
+}
+#endif
+
+void board_init_f(ulong dummy)
+{
+	int ret;
+
+	/* Clear global data */
+	memset((void *)gd, 0, sizeof(gd_t));
+
+	arch_cpu_init();
+
+	init_uart_clk(0);
+
+	board_early_init_f();
+
+	timer_init();
+
+	preloader_console_init();
+
+	/* Clear the BSS. */
+	memset(__bss_start, 0, __bss_end - __bss_start);
+
+	ret = spl_init();
+	if (ret) {
+		debug("spl_init() failed: %d\n", ret);
+		hang();
+	}
+
+	enable_tzc380();
+
+	/* DDR initialization */
+	spl_dram_init();
+
+	board_init_r(NULL, 0);
+}
diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index 7d7c427392..8ce3637731 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -4,6 +4,8 @@
  *      Tapani Utriainen <linuxfae@technexion.com>
  */
 #include <common.h>
+#include <bootstage.h>
+#include <init.h>
 #include <malloc.h>
 #include <netdev.h>
 #include <twl4030.h>
diff --git a/board/technologic/ts4600/ts4600.c b/board/technologic/ts4600/ts4600.c
index f9cc2e8f10..54508cd864 100644
--- a/board/technologic/ts4600/ts4600.c
+++ b/board/technologic/ts4600/ts4600.c
@@ -14,12 +14,14 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx28.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <miiphy.h>
 #include <netdev.h>
diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c
index ff1a189c7e..28918de547 100644
--- a/board/technologic/ts4800/ts4800.c
+++ b/board/technologic/ts4800/ts4800.c
@@ -8,11 +8,14 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux-mx51.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/theadorable/fpga.c b/board/theadorable/fpga.c
index 4f8bf5e778..bc8379cccf 100644
--- a/board/theadorable/fpga.c
+++ b/board/theadorable/fpga.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <altera.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c
index 621e26905b..53ef9916a2 100644
--- a/board/theadorable/theadorable.c
+++ b/board/theadorable/theadorable.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <console.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
 #include <pci.h>
 #if !defined(CONFIG_SPL_BUILD)
 #include <bootcount.h>
@@ -15,6 +17,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 #include <linux/mbus.h>
 #ifdef CONFIG_NET
 #include <netdev.h>
@@ -308,7 +311,7 @@ int board_late_init(void)
 #endif
 
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_PCI)
-int do_pcie_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_pcie_test(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pci_dev_t bdf;
 	u16 ven_id, dev_id;
diff --git a/board/theobroma-systems/lion_rk3368/README b/board/theobroma-systems/lion_rk3368/README
index ad3ac93bd4..7488b18326 100644
--- a/board/theobroma-systems/lion_rk3368/README
+++ b/board/theobroma-systems/lion_rk3368/README
@@ -17,12 +17,12 @@ Configure U-Boot
 Build the TPL/SPL stage
 =======================
 
-  > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm
+  > make CROSS_COMPILE=aarch64-unknown-elf-
 
 Build the full U-Boot and a FIT image including the ATF
 =======================================================
 
-  > make CROSS_COMPILE=aarch64-unknown-elf- ARCH=arm u-boot.itb
+  > make CROSS_COMPILE=aarch64-unknown-elf- u-boot.itb
 
 Flash the image
 ===============
diff --git a/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
index 420e7daf4c..c9396577a9 100755
--- a/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
+++ b/board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
@@ -69,7 +69,7 @@ cat << __HEADER_EOF
                 };
 		fdt {
 			description = "RK3399-Q7 (Puma) flat device-tree";
-			data = /incbin/("u-boot.dtb");
+			data = /incbin/("$1");
 			type = "flat_dt";
 			compression = "none";
 		};
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 7ff4766947..f7f08ae617 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <log.h>
 #include <misc.h>
 #include <spl.h>
 #include <syscon.h>
@@ -75,7 +77,7 @@ static int setup_boottargets(void)
 	}
 
 	/*
-	 * Only run, if booting from mmc1 (i.e. /dwmmc@fe320000) and
+	 * Only run, if booting from mmc1 (i.e. /mmc@fe320000) and
 	 * only consider cases where the default boot-order first
 	 * tries to boot from mmc0 (eMMC) and then from mmc1
 	 * (i.e. external SD).
@@ -83,7 +85,7 @@ static int setup_boottargets(void)
 	 * In other words: the SD card will be moved to earlier in the
 	 * order, if U-Boot was also loaded from the SD-card.
 	 */
-	if (!strcmp(boot_device, "/dwmmc@fe320000")) {
+	if (!strcmp(boot_device, "/mmc@fe320000")) {
 		char *mmc0, *mmc1;
 
 		debug("%s: booted from SD-Card\n", __func__);
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 01b28e8da4..4199bee2e6 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -11,8 +11,10 @@
 #include <dm.h>
 #include <env.h>
 #include <errno.h>
+#include <image.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <spl.h>
 #include <serial.h>
 #include <asm/arch/cpu.h>
@@ -34,6 +36,8 @@
 #include <i2c.h>
 #include <miiphy.h>
 #include <cpsw.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/tps65217.h>
 #include <power/tps65910.h>
 #include <env_internal.h>
diff --git a/board/ti/am3517crane/am3517crane.c b/board/ti/am3517crane/am3517crane.c
index 5d4e57ffc5..888aa5b9ca 100644
--- a/board/ti/am3517crane/am3517crane.c
+++ b/board/ti/am3517crane/am3517crane.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/arch/mmc_host_def.h>
 #include <asm/arch/mem.h>
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 21fc5ed1d3..923b224e4c 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -9,11 +9,13 @@
 
 #include <common.h>
 #include <eeprom.h>
+#include <image.h>
 #include <dm/uclass.h>
 #include <env.h>
 #include <fdt_support.h>
 #include <i2c.h>
 #include <init.h>
+#include <net.h>
 #include <linux/errno.h>
 #include <spl.h>
 #include <usb.h>
diff --git a/board/ti/am57xx/board.c b/board/ti/am57xx/board.c
index 34ca3ec9b0..8720eb87a5 100644
--- a/board/ti/am57xx/board.c
+++ b/board/ti/am57xx/board.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <malloc.h>
+#include <net.h>
 #include <palmas.h>
 #include <sata.h>
 #include <serial.h>
diff --git a/board/ti/am65x/README b/board/ti/am65x/README
index 00be1ffe44..67081ce349 100644
--- a/board/ti/am65x/README
+++ b/board/ti/am65x/README
@@ -133,12 +133,12 @@ $ make PLATFORM=k3-am65x CFG_ARM64_core=y
 4. U-Boot:
 
 4.1. R5:
-$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- am65x_evm_r5_defconfig O=/tmp/r5
-$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
+$ make CROSS_COMPILE=arm-linux-gnueabihf- am65x_evm_r5_defconfig O=/tmp/r5
+$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
 
 4.2. A53:
-$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53
-$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a53
+$ make CROSS_COMPILE=aarch64-linux-gnu- am65x_evm_a53_defconfig O=/tmp/a53
+$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a53
 
 Target Images
 --------------
diff --git a/board/ti/am65x/evm.c b/board/ti/am65x/evm.c
index a610879424..a22900dcf9 100644
--- a/board/ti/am65x/evm.c
+++ b/board/ti/am65x/evm.c
@@ -9,7 +9,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <fdt_support.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/hardware.h>
 #include <asm/gpio.h>
@@ -69,11 +72,13 @@ int dram_init_banksize(void)
 	/* Bank 0 declares the memory available in the DDR low region */
 	gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 	gd->bd->bi_dram[0].size = 0x80000000;
+	gd->ram_size = 0x80000000;
 
 #ifdef CONFIG_PHYS_64BIT
 	/* Bank 1 declares the memory available in the DDR high region */
 	gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE1;
 	gd->bd->bi_dram[1].size = 0x80000000;
+	gd->ram_size = 0x100000000;
 #endif
 
 	return 0;
diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index 12e657c9c6..9139ad87d4 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -13,8 +13,11 @@
  *
  */
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <ns16550.h>
 #include <serial.h>
 #ifdef CONFIG_LED_STATUS
diff --git a/board/ti/common/board_detect.c b/board/ti/common/board_detect.c
index cbd35f2434..429668404a 100644
--- a/board/ti/common/board_detect.c
+++ b/board/ti/common/board_detect.c
@@ -9,6 +9,8 @@
 
 #include <common.h>
 #include <eeprom.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/hardware.h>
 #include <asm/omap_common.h>
 #include <dm/uclass.h>
diff --git a/board/ti/common/board_detect.h b/board/ti/common/board_detect.h
index 5835af5344..9f75b5c004 100644
--- a/board/ti/common/board_detect.h
+++ b/board/ti/common/board_detect.h
@@ -9,6 +9,7 @@
 #define __BOARD_DETECT_H
 
 /* TI EEPROM MAGIC Header identifier */
+#include <linux/bitops.h>
 #define TI_EEPROM_HEADER_MAGIC	0xEE3355AA
 #define TI_DEAD_EEPROM_MAGIC	0xADEAD12C
 
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 8132cdfbf2..acf7ff1691 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -12,8 +12,10 @@
 #include <common.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <spl.h>
+#include <net.h>
 #include <palmas.h>
 #include <sata.h>
 #include <serial.h>
diff --git a/board/ti/evm/evm.c b/board/ti/evm/evm.c
index d26dd5ba84..aba74fce77 100644
--- a/board/ti/evm/evm.c
+++ b/board/ti/evm/evm.c
@@ -13,6 +13,8 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <ns16550.h>
 #include <netdev.h>
 #include <serial.h>
@@ -26,6 +28,7 @@
 #include <twl4030.h>
 #include <asm/mach-types.h>
 #include <asm/omap_musb.h>
+#include <linux/delay.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
diff --git a/board/ti/j721e/README b/board/ti/j721e/README
index 7dcf336332..757a59cdb4 100644
--- a/board/ti/j721e/README
+++ b/board/ti/j721e/README
@@ -149,12 +149,12 @@ $ make PLATFORM=k3-j721e CFG_ARM64_core=y
 4. U-Boot:
 
 4.1. R5:
-$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
-$ make ARCH=arm CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
+$ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
+$ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
 
 4.2. A72:
-$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
-$ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a72
+$ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
+$ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a72
 
 Target Images
 --------------
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index c068bb86b5..ff939c8ca6 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -8,7 +8,12 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <fdt_support.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/hardware.h>
 #include <asm/gpio.h>
diff --git a/board/ti/ks2_evm/README b/board/ti/ks2_evm/README
index a26b7f8131..ff0ec5a363 100644
--- a/board/ti/ks2_evm/README
+++ b/board/ti/ks2_evm/README
@@ -74,7 +74,7 @@ Supported image formats:
 Build instructions:
 ===================
 Examples for k2hk, for k2e, k2l and k2g just replace k2hk prefix accordingly.
-Don't forget to add ARCH=arm and CROSS_COMPILE.
+Don't forget to add CROSS_COMPILE.
 
 To build u-boot.bin, u-boot-spi.gph, MLO:
   >make k2hk_evm_defconfig
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 6554c0eb11..8595b20e87 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -10,6 +10,7 @@
 #include "board.h"
 #include <env.h>
 #include <hang.h>
+#include <image.h>
 #include <init.h>
 #include <spl.h>
 #include <exports.h>
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index ecd4a42df4..39abb24e15 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <asm/arch/ddr3.h>
 #include <asm/arch/hardware.h>
 #include <asm/ti-common/keystone_net.h>
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index c6a14a0554..ece75326a5 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -9,6 +9,7 @@
 #include <eeprom.h>
 #include <env.h>
 #include <hang.h>
+#include <image.h>
 #include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/ti-common/keystone_net.h>
@@ -17,6 +18,8 @@
 #include <fdtdec.h>
 #include <i2c.h>
 #include <remoteproc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "mux-k2g.h"
 #include "../common/board_detect.h"
 
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index 4c0acd627f..12c4649c3c 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/ti-common/keystone_net.h>
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index e49d8b3482..f759ee3646 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <init.h>
 #include <asm/arch/ddr3.h>
 #include <asm/arch/hardware.h>
 #include <asm/ti-common/keystone_net.h>
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index ee7efcbfa7..e35f319b46 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -6,12 +6,15 @@
  * Steve Sakoman  <steve@sakoman.com>
  */
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <palmas.h>
 #include <asm/arch/omap.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mmc_host_def.h>
 #include <tca642x.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <linux/usb/gadget.h>
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 20199da390..9ebecfdbf5 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -5,6 +5,9 @@
  * Steve Sakoman  <steve@sakoman.com>
  */
 #include <common.h>
+#include <init.h>
+#include <log.h>
+#include <net.h>
 #include <asm/mach-types.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mmc_host_def.h>
diff --git a/board/ti/sdp4430/cmd_bat.c b/board/ti/sdp4430/cmd_bat.c
index c820435386..6c1e6ca393 100644
--- a/board/ti/sdp4430/cmd_bat.c
+++ b/board/ti/sdp4430/cmd_bat.c
@@ -9,7 +9,7 @@
 #ifdef CONFIG_CMD_BAT
 #include <twl6030.h>
 
-int do_vbat(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_vbat(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc == 2) {
 		if (strncmp(argv[1], "startcharge", 12) == 0)
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index e71c53e5ee..a5b3504045 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -6,6 +6,8 @@
  * Steve Sakoman  <steve@sakoman.com>
  */
 #include <common.h>
+#include <init.h>
+#include <net.h>
 #include <twl6030.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/mmc_host_def.h>
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index 2b9385d14b..8ed80d2f46 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -11,6 +11,8 @@
 #include <cpsw.h>
 #include <env.h>
 #include <errno.h>
+#include <init.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
diff --git a/board/ti/ti816x/evm.c b/board/ti/ti816x/evm.c
index 3896ebbfda..590c15676a 100644
--- a/board/ti/ti816x/evm.c
+++ b/board/ti/ti816x/evm.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <spl.h>
 #include <asm/cache.h>
 #include <asm/io.h>
diff --git a/board/timll/devkit3250/devkit3250.c b/board/timll/devkit3250/devkit3250.c
index b455844c89..f4eaf15970 100644
--- a/board/timll/devkit3250/devkit3250.c
+++ b/board/timll/devkit3250/devkit3250.c
@@ -13,6 +13,7 @@
 #include <asm/arch/emc.h>
 #include <asm/arch/wdt.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index b037d725c3..cbb219931d 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <dm.h>
 #include <env.h>
+#include <init.h>
 #include <malloc.h>
 #include <ns16550.h>
 #include <twl4030.h>
diff --git a/board/topic/zynq/Makefile b/board/topic/zynq/Makefile
index becadd2ca7..cc100b0f42 100644
--- a/board/topic/zynq/Makefile
+++ b/board/topic/zynq/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0+
 
 obj-y	:= board.o
+obj-y	+= ../../xilinx/common/board.o
 
 # Remove quotes
 hw-platform-y :=$(shell echo $(CONFIG_DEFAULT_DEVICE_TREE))
diff --git a/board/toradex/apalis-tk1/apalis-tk1.c b/board/toradex/apalis-tk1/apalis-tk1.c
index bc98858ae0..d77b4c4ab9 100644
--- a/board/toradex/apalis-tk1/apalis-tk1.c
+++ b/board/toradex/apalis-tk1/apalis-tk1.c
@@ -5,6 +5,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <env.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch-tegra/ap.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -12,6 +15,7 @@
 #include <asm/arch/pinmux.h>
 #include <env_internal.h>
 #include <pci_tegra.h>
+#include <linux/delay.h>
 #include <power/as3722.h>
 #include <power/pmic.h>
 
diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c
index 15f8dce2f1..68169f5548 100644
--- a/board/toradex/apalis-tk1/as3722_init.c
+++ b/board/toradex/apalis-tk1/as3722_init.c
@@ -4,8 +4,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
 #include "as3722_init.h"
 
 /* AS3722-PMIC-specific early init code - get CPU rails up, etc */
diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 3f85f1ac89..40c71adf51 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -9,7 +9,11 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <image.h>
 #include <init.h>
+#include <net.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <ahci.h>
 #include <asm/arch/clock.h>
@@ -137,22 +141,79 @@ iomux_v3_cfg_t const usdhc3_pads[] = {
 
 int mx6_rgmii_rework(struct phy_device *phydev)
 {
-	/* control data pad skew - devaddr = 0x02, register = 0x04 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* rx data pad skew - devaddr = 0x02, register = 0x05 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* tx data pad skew - devaddr = 0x02, register = 0x05 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
-	/* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
-	ksz9031_phy_extended_write(phydev, 0x02,
-				   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
-				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
+	int tmp;
+
+	switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
+	case PHY_ID_KSZ9131:
+		/* read rxc dll control - devaddr = 0x02, register = 0x4c */
+		tmp = ksz9031_phy_extended_read(phydev, 0x02,
+					   MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC);
+		/* disable rxdll bypass (enable 2ns skew delay on RXC) */
+		tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
+		/* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   tmp);
+		/* read txc dll control - devaddr = 0x02, register = 0x4d */
+		tmp = ksz9031_phy_extended_read(phydev, 0x02,
+					   MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC);
+		/* disable rxdll bypass (enable 2ns skew delay on TXC) */
+		tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
+		/* txc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   tmp);
+
+		/* control data pad skew - devaddr = 0x02, register = 0x04 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x007d);
+		/* rx data pad skew - devaddr = 0x02, register = 0x05 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x7777);
+		/* tx data pad skew - devaddr = 0x02, register = 0x05 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0xdddd);
+		/* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0007);
+		break;
+	case PHY_ID_KSZ9031:
+	default:
+		/* control data pad skew - devaddr = 0x02, register = 0x04 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0000);
+		/* rx data pad skew - devaddr = 0x02, register = 0x05 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0000);
+		/* tx data pad skew - devaddr = 0x02, register = 0x05 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0000);
+		/* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x03FF);
+		break;
+	}
+
 	return 0;
 }
 
diff --git a/board/toradex/apalis_imx6/do_fuse.c b/board/toradex/apalis_imx6/do_fuse.c
index 22d191f52a..6991b1bc13 100644
--- a/board/toradex/apalis_imx6/do_fuse.c
+++ b/board/toradex/apalis_imx6/do_fuse.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #ifndef CONFIG_SPL_BUILD
+#include <command.h>
 #include <console.h>
 #include <fuse.h>
 
@@ -35,8 +36,8 @@ static int mfgr_fuse(void)
 	return CMD_RET_SUCCESS;
 }
 
-int do_mfgr_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+int do_mfgr_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	int ret;
 	puts("Fusing...\n");
@@ -48,8 +49,8 @@ int do_mfgr_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-int do_updt_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+int do_updt_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	unsigned val;
 	int ret;
diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c
index ebd6418fd4..c89052ff5d 100644
--- a/board/toradex/apalis_imx6/pf0100.c
+++ b/board/toradex/apalis_imx6/pf0100.c
@@ -8,12 +8,14 @@
 */
 
 #include <common.h>
+#include <command.h>
 #include <i2c.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
+#include <linux/delay.h>
 
 #include "pf0100_otp.inc"
 #include "pf0100.h"
@@ -261,8 +263,8 @@ static int pf0100_prog(void)
 	return CMD_RET_SUCCESS;
 }
 
-static int do_pf0100_prog(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+static int do_pf0100_prog(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int ret;
 	puts("Programming PMIC OTP...");
diff --git a/board/toradex/apalis_t30/apalis_t30.c b/board/toradex/apalis_t30/apalis_t30.c
index df9bc8e707..3e8b8b1fe3 100644
--- a/board/toradex/apalis_t30/apalis_t30.c
+++ b/board/toradex/apalis_t30/apalis_t30.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/gp_padctrl.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch-tegra/ap.h>
@@ -14,6 +16,7 @@
 #include <dm.h>
 #include <i2c.h>
 #include <pci_tegra.h>
+#include <linux/delay.h>
 #include "../common/tdx-common.h"
 
 #include "pinmux-config-apalis_t30.h"
diff --git a/board/toradex/colibri-imx6ull/colibri-imx6ull.c b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
index 7dfe8aec88..c67d02f7c2 100644
--- a/board/toradex/colibri-imx6ull/colibri-imx6ull.c
+++ b/board/toradex/colibri-imx6ull/colibri-imx6ull.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <init.h>
+#include <linux/delay.h>
 
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c
index d11401ecab..6522af416a 100644
--- a/board/toradex/colibri_imx6/colibri_imx6.c
+++ b/board/toradex/colibri_imx6/colibri_imx6.c
@@ -11,6 +11,9 @@
 #include <dm.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
diff --git a/board/toradex/colibri_imx6/do_fuse.c b/board/toradex/colibri_imx6/do_fuse.c
index 22d191f52a..6991b1bc13 100644
--- a/board/toradex/colibri_imx6/do_fuse.c
+++ b/board/toradex/colibri_imx6/do_fuse.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #ifndef CONFIG_SPL_BUILD
+#include <command.h>
 #include <console.h>
 #include <fuse.h>
 
@@ -35,8 +36,8 @@ static int mfgr_fuse(void)
 	return CMD_RET_SUCCESS;
 }
 
-int do_mfgr_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+int do_mfgr_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	int ret;
 	puts("Fusing...\n");
@@ -48,8 +49,8 @@ int do_mfgr_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-int do_updt_fuse(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+int do_updt_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[])
 {
 	unsigned val;
 	int ret;
diff --git a/board/toradex/colibri_imx6/pf0100.c b/board/toradex/colibri_imx6/pf0100.c
index e744243297..8f08d8c733 100644
--- a/board/toradex/colibri_imx6/pf0100.c
+++ b/board/toradex/colibri_imx6/pf0100.c
@@ -8,12 +8,14 @@
 */
 
 #include <common.h>
+#include <command.h>
 #include <i2c.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
+#include <linux/delay.h>
 
 #include "pf0100_otp.inc"
 #include "pf0100.h"
@@ -246,8 +248,8 @@ static int pf0100_prog(void)
 	return CMD_RET_SUCCESS;
 }
 
-static int do_pf0100_prog(cmd_tbl_t *cmdtp, int flag, int argc,
-		char * const argv[])
+static int do_pf0100_prog(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int ret;
 	puts("Programming PMIC OTP...");
diff --git a/board/toradex/colibri_imx7/colibri_imx7.c b/board/toradex/colibri_imx7/colibri_imx7.c
index 8727101aa3..8df925dacf 100644
--- a/board/toradex/colibri_imx7/colibri_imx7.c
+++ b/board/toradex/colibri_imx7/colibri_imx7.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
@@ -20,6 +21,7 @@
 #include <fdt_support.h>
 #include <fsl_esdhc_imx.h>
 #include <jffs2/load_kernel.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <mmc.h>
 #include <miiphy.h>
diff --git a/board/toradex/colibri_pxa270/colibri_pxa270.c b/board/toradex/colibri_pxa270/colibri_pxa270.c
index c4db516b07..18b3d3f542 100644
--- a/board/toradex/colibri_pxa270/colibri_pxa270.c
+++ b/board/toradex/colibri_pxa270/colibri_pxa270.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <init.h>
+#include <net.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/pxa.h>
 #include <asm/arch/regs-mmc.h>
@@ -20,6 +22,7 @@
 #include <serial.h>
 #include <usb.h>
 #include <asm/mach-types.h>
+#include <linux/delay.h>
 #include "../common/tdx-common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c
index e0b27e92f8..cb0aed872f 100644
--- a/board/toradex/colibri_t20/colibri_t20.c
+++ b/board/toradex/colibri_t20/colibri_t20.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch/pinmux.h>
@@ -14,6 +16,7 @@
 #include <asm/io.h>
 #include <i2c.h>
 #include <nand.h>
+#include <linux/delay.h>
 #include "../common/tdx-common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/toradex/colibri_t30/colibri_t30.c b/board/toradex/colibri_t30/colibri_t30.c
index b6b00e3860..0bbe81e44d 100644
--- a/board/toradex/colibri_t30/colibri_t30.c
+++ b/board/toradex/colibri_t30/colibri_t30.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/gp_padctrl.h>
 #include <asm/arch/pinmux.h>
 #include <asm/arch-tegra/ap.h>
@@ -12,6 +13,7 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <i2c.h>
+#include <linux/delay.h>
 #include "pinmux-config-colibri_t30.h"
 #include "../common/tdx-common.h"
 
diff --git a/board/toradex/common/tdx-cfg-block.c b/board/toradex/common/tdx-cfg-block.c
index 1b6c911418..75216ecf6d 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include "tdx-cfg-block.h"
+#include <command.h>
+#include <asm/cache.h>
 
 #if defined(CONFIG_TARGET_APALIS_IMX6) || \
 	defined(CONFIG_TARGET_APALIS_IMX8) || \
@@ -513,8 +515,8 @@ static int get_cfgblock_barcode(char *barcode)
 	return 0;
 }
 
-static int do_cfgblock_create(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_cfgblock_create(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	u8 *config_block;
 	struct toradex_tag *tag;
@@ -642,8 +644,8 @@ out:
 	return ret;
 }
 
-static int do_cfgblock(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_cfgblock(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	int ret;
 
diff --git a/board/toradex/common/tdx-common.c b/board/toradex/common/tdx-common.c
index e9441a7979..e8de923f3e 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <env.h>
 #include <g_dnl.h>
+#include <init.h>
 #include <linux/libfdt.h>
 
 #include "tdx-cfg-block.h"
diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c
index a5dc540820..cc78c5666b 100644
--- a/board/toradex/verdin-imx8mm/spl.c
+++ b/board/toradex/verdin-imx8mm/spl.c
@@ -4,6 +4,10 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <image.h>
+#include <init.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/ddr.h>
 #include <asm/arch/imx8mm_pins.h>
@@ -169,12 +173,3 @@ void board_init_f(ulong dummy)
 
 	board_init_r(NULL, 0);
 }
-
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
-	puts("resetting ...\n");
-
-	reset_cpu(WDOG1_BASE_ADDR);
-
-	return 0;
-}
diff --git a/board/toradex/verdin-imx8mm/verdin-imx8mm.c b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
index cb9b4e3b0a..ff05c7d552 100644
--- a/board/toradex/verdin-imx8mm/verdin-imx8mm.c
+++ b/board/toradex/verdin-imx8mm/verdin-imx8mm.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 #include <miiphy.h>
 #include <netdev.h>
+#include <micrel.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -37,14 +39,62 @@ static int setup_fec(void)
 
 int board_phy_config(struct phy_device *phydev)
 {
-	/* enable rgmii rxc skew and phy mode select to RGMII copper */
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
+	int tmp;
 
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
+	switch (ksz9xx1_phy_get_id(phydev) & MII_KSZ9x31_SILICON_REV_MASK) {
+	case PHY_ID_KSZ9031:
+		/*
+		 * The PHY adds 1.2ns for the RXC and 0ns for TXC clock by
+		 * default. The MAC and the layout don't add a skew between
+		 * clock and data.
+		 * Add 0.3ns for the RXC path and 0.96 + 0.42 ns (1.38 ns) for
+		 * the TXC path to get the required clock skews.
+		 */
+		/* control data pad skew - devaddr = 0x02, register = 0x04 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0070);
+		/* rx data pad skew - devaddr = 0x02, register = 0x05 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x7777);
+		/* tx data pad skew - devaddr = 0x02, register = 0x06 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x0000);
+		/* gtx and rx clock pad skew - devaddr = 0x02,register = 0x08 */
+		ksz9031_phy_extended_write(phydev, 0x02,
+					   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
+					   MII_KSZ9031_MOD_DATA_NO_POST_INC,
+					   0x03f4);
+		break;
+	case PHY_ID_KSZ9131:
+	default:
+		/* read rxc dll control - devaddr = 0x2, register = 0x4c */
+		tmp = ksz9031_phy_extended_read(phydev, 0x02,
+					MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
+					MII_KSZ9031_MOD_DATA_NO_POST_INC);
+		/* disable rxdll bypass (enable 2ns skew delay on RXC) */
+		tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
+		/* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4c */
+		tmp = ksz9031_phy_extended_write(phydev, 0x02,
+					MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL,
+					MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
+		/* read txc dll control - devaddr = 0x02, register = 0x4d */
+		tmp = ksz9031_phy_extended_read(phydev, 0x02,
+					MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
+					MII_KSZ9031_MOD_DATA_NO_POST_INC);
+		/* disable txdll bypass (enable 2ns skew delay on TXC) */
+		tmp &= ~MII_KSZ9131_RXTXDLL_BYPASS;
+		/* rxc data pad skew 2ns - devaddr = 0x02, register = 0x4d */
+		tmp = ksz9031_phy_extended_write(phydev, 0x02,
+					MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL,
+					MII_KSZ9031_MOD_DATA_NO_POST_INC, tmp);
+		break;
+	}
 
 	if (phydev->drv->config)
 		phydev->drv->config(phydev);
diff --git a/board/tplink/wdr4300/wdr4300.c b/board/tplink/wdr4300/wdr4300.c
index 4dacaa4285..9134d6bf6d 100644
--- a/board/tplink/wdr4300/wdr4300.c
+++ b/board/tplink/wdr4300/wdr4300.c
@@ -4,9 +4,12 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/io.h>
 #include <asm/addrspace.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/ath79.h>
 #include <mach/ar71xx_regs.h>
 #include <mach/ddr.h>
diff --git a/board/tqc/tqm834x/pci.c b/board/tqc/tqm834x/pci.c
index 0834207766..92bda60765 100644
--- a/board/tqc/tqm834x/pci.c
+++ b/board/tqc/tqm834x/pci.c
@@ -13,6 +13,7 @@
 #include <pci.h>
 #include <i2c.h>
 #include <asm/fsl_i2c.h>
+#include <linux/delay.h>
 
 static struct pci_region pci1_regions[] = {
 	{
diff --git a/board/tqc/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c
index 02b3d2dea1..165a5433e7 100644
--- a/board/tqc/tqm834x/tqm834x.c
+++ b/board/tqc/tqm834x/tqm834x.c
@@ -8,6 +8,7 @@
 #include <fdt_support.h>
 #include <init.h>
 #include <ioports.h>
+#include <log.h>
 #include <mpc83xx.h>
 #include <asm/mpc8349_pci.h>
 #include <i2c.h>
@@ -15,6 +16,7 @@
 #include <asm/mmu.h>
 #include <pci.h>
 #include <flash.h>
+#include <linux/delay.h>
 #include <mtd/cfi_flash.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/tqc/tqma6/tqma6.c b/board/tqc/tqma6/tqma6.c
index 675341abdd..d7df4f976a 100644
--- a/board/tqc/tqma6/tqma6.c
+++ b/board/tqc/tqma6/tqma6.c
@@ -14,6 +14,7 @@
 #include <asm/arch/iomux.h>
 #include <asm/arch/sys_proto.h>
 #include <env.h>
+#include <fdt_support.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index a5b7587737..84d0e386a3 100644
--- a/board/tqc/tqma6/tqma6_mba6.c
+++ b/board/tqc/tqma6/tqma6_mba6.c
@@ -8,12 +8,14 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/mxc_i2c.h>
diff --git a/board/tqc/tqma6/tqma6_wru4.c b/board/tqc/tqma6/tqma6_wru4.c
index 1320f8ad78..0488cbaaa8 100644
--- a/board/tqc/tqma6/tqma6_wru4.c
+++ b/board/tqc/tqma6/tqma6_wru4.c
@@ -10,12 +10,14 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/mx6-pins.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/boot_mode.h>
diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index 2ba98c7b52..5e49180c76 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -9,6 +9,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
@@ -24,6 +25,7 @@
 #include <asm/mach-imx/mxc_i2c.h>
 #include <asm/arch/sys_proto.h>
 #include <spl.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <i2c.h>
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
index 2a4e790d88..4c85d99c13 100644
--- a/board/udoo/udoo.c
+++ b/board/udoo/udoo.c
@@ -6,12 +6,14 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <env.h>
 #include <malloc.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/udoo/udoo_spl.c b/board/udoo/udoo_spl.c
index b287fbf410..d9afbbb741 100644
--- a/board/udoo/udoo_spl.c
+++ b/board/udoo/udoo_spl.c
@@ -6,10 +6,13 @@
  * Based on board/wandboard/spl.c
  */
 
+#include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/vamrs/rock960_rk3399/README b/board/vamrs/rock960_rk3399/README
index c5c675c4ea..15df027fbc 100644
--- a/board/vamrs/rock960_rk3399/README
+++ b/board/vamrs/rock960_rk3399/README
@@ -57,7 +57,6 @@ Compile the U-Boot
 
   > cd ../u-boot
   > cp ../rkbin/rk33/rk3399_bl31_v1.00.elf ./bl31.elf
-  > export ARCH=arm64
   > export CROSS_COMPILE=aarch64-linux-gnu-
   > make rock960-rk3399_defconfig
   > make
diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c b/board/vamrs/rock960_rk3399/rock960-rk3399.c
index 68a127b9ac..a7fc38d42f 100644
--- a/board/vamrs/rock960_rk3399/rock960-rk3399.c
+++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
@@ -2,3 +2,27 @@
 /*
  * Copyright (C) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  */
+
+#include <common.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm/arch-rockchip/clock.h>
+#include <asm/arch-rockchip/grf_rk3399.h>
+#include <asm/arch-rockchip/hardware.h>
+#include <linux/bitops.h>
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+	struct rk3399_grf_regs *grf =
+	    syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	/**
+	 * Some SSD's to work on rock960 would require explicit
+	 * domain voltage change, so BT565 is in 1.8v domain
+	 */
+	rk_setreg(&grf->io_vsel, BIT(0));
+
+	return 0;
+}
+#endif
diff --git a/board/variscite/dart_6ul/dart_6ul.c b/board/variscite/dart_6ul/dart_6ul.c
index 2d0b760c39..a4f449d2e2 100644
--- a/board/variscite/dart_6ul/dart_6ul.c
+++ b/board/variscite/dart_6ul/dart_6ul.c
@@ -4,6 +4,8 @@
  * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com>
  */
 
+#include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/mx6-pins.h>
diff --git a/board/variscite/dart_6ul/spl.c b/board/variscite/dart_6ul/spl.c
index 798523d0d0..1b06a66060 100644
--- a/board/variscite/dart_6ul/spl.c
+++ b/board/variscite/dart_6ul/spl.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <spl.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
diff --git a/board/varisys/common/sys_eeprom.c b/board/varisys/common/sys_eeprom.c
index 4c025087db..251d9fd73e 100644
--- a/board/varisys/common/sys_eeprom.c
+++ b/board/varisys/common/sys_eeprom.c
@@ -15,6 +15,7 @@
 #include <env.h>
 #include <i2c.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 
 #include "eeprom.h"
@@ -306,7 +307,7 @@ static void set_mac_address(unsigned int index, const char *string)
 	update_crc();
 }
 
-int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char cmd;
 
diff --git a/board/varisys/cyrus/cyrus.c b/board/varisys/cyrus/cyrus.c
index 13429072c7..a42910f600 100644
--- a/board/varisys/cyrus/cyrus.c
+++ b/board/varisys/cyrus/cyrus.c
@@ -7,6 +7,7 @@
 #include <command.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
 #include <init.h>
 #include <netdev.h>
 #include <linux/compiler.h>
diff --git a/board/varisys/cyrus/ddr.c b/board/varisys/cyrus/ddr.c
index cac00e0467..7949eb88c0 100644
--- a/board/varisys/cyrus/ddr.c
+++ b/board/varisys/cyrus/ddr.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <i2c.h>
 #include <hwconfig.h>
+#include <init.h>
+#include <log.h>
 #include <asm/mmu.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/varisys/cyrus/eth.c b/board/varisys/cyrus/eth.c
index 9783abd659..45b21fba32 100644
--- a/board/varisys/cyrus/eth.c
+++ b/board/varisys/cyrus/eth.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 #include <netdev.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
diff --git a/board/ve8313/ve8313.c b/board/ve8313/ve8313.c
index d1c9535f46..ceb3d75552 100644
--- a/board/ve8313/ve8313.c
+++ b/board/ve8313/ve8313.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <fdt_support.h>
 #include <init.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <pci.h>
 #include <mpc83xx.h>
diff --git a/board/vscom/baltos/board.c b/board/vscom/baltos/board.c
index c76502c964..197405e555 100644
--- a/board/vscom/baltos/board.c
+++ b/board/vscom/baltos/board.c
@@ -11,6 +11,7 @@
 #include <env.h>
 #include <errno.h>
 #include <init.h>
+#include <net.h>
 #include <serial.h>
 #include <linux/libfdt.h>
 #include <spl.h>
diff --git a/board/wandboard/spl.c b/board/wandboard/spl.c
index dbd9d0286f..04c351fff9 100644
--- a/board/wandboard/spl.c
+++ b/board/wandboard/spl.c
@@ -5,10 +5,13 @@
  *         Richard Hu <hakahu@gmail.com>
  */
 
+#include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/mach-imx/iomux-v3.h>
diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index fb2f3c1fd2..e0e01b1a4a 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
@@ -6,7 +6,10 @@
  * Author: Fabio Estevam <fabio.estevam@freescale.com>
  */
 
+#include <common.h>
+#include <image.h>
 #include <init.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/crm_regs.h>
 #include <asm/arch/iomux.h>
@@ -22,6 +25,7 @@
 #include <asm/mach-imx/sata.h>
 #include <asm/io.h>
 #include <env.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <common.h>
 #include <miiphy.h>
diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c
index 1ebec93916..50630574fd 100644
--- a/board/warp7/warp7.c
+++ b/board/warp7/warp7.c
@@ -5,6 +5,7 @@
  */
 
 #include <init.h>
+#include <net.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/mx7-pins.h>
diff --git a/board/work-microwave/work_92105/work_92105.c b/board/work-microwave/work_92105/work_92105.c
index 5cc2566e2a..2e0def5b64 100644
--- a/board/work-microwave/work_92105/work_92105.c
+++ b/board/work-microwave/work_92105/work_92105.c
@@ -16,6 +16,7 @@
 #include <asm/arch/wdt.h>
 #include <asm/gpio.h>
 #include <spl.h>
+#include <linux/delay.h>
 #include "work_92105_display.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c
index db04dcabc7..fecbbbdb58 100644
--- a/board/work-microwave/work_92105/work_92105_display.c
+++ b/board/work-microwave/work_92105/work_92105_display.c
@@ -11,6 +11,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/emc.h>
@@ -20,6 +22,7 @@
 #include <i2c.h>
 #include <version.h>
 #include <vsprintf.h>
+#include <linux/delay.h>
 
 /*
  * GPO 15 in port 3 is gpio 3*32+15 = 111
@@ -266,7 +269,7 @@ void work_92105_display_init(void)
 
 #ifdef CONFIG_CMD_MAX6957
 
-static int do_max6957aax(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_max6957aax(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	int reg, val;
@@ -315,7 +318,8 @@ U_BOOT_CMD(
 #error CONFIG_CMD_HD44760 requires CONFIG_HUSH_PARSER
 #endif
 
-static int do_hd44780(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_hd44780(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	char *cmd;
 
diff --git a/board/xes/common/board.c b/board/xes/common/board.c
index 43575bc302..053b07a0b7 100644
--- a/board/xes/common/board.c
+++ b/board/xes/common/board.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <env.h>
 #include "fsl_8xxx_misc.h"
+#include <init.h>
 
 int checkboard(void)
 {
diff --git a/board/xes/xpedite517x/ddr.c b/board/xes/xpedite517x/ddr.c
index 604faf2131..a3fd2fc8ca 100644
--- a/board/xes/xpedite517x/ddr.c
+++ b/board/xes/xpedite517x/ddr.c
@@ -8,6 +8,7 @@
 #include <i2c.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
+#include <log.h>
 
 void get_spd(ddr2_spd_eeprom_t *spd, u8 i2c_address)
 {
diff --git a/board/xes/xpedite537x/ddr.c b/board/xes/xpedite537x/ddr.c
index 65e69c8013..f55102a072 100644
--- a/board/xes/xpedite537x/ddr.c
+++ b/board/xes/xpedite537x/ddr.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr_dimm_params.h>
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index e83c692f21..0469e2e7ac 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -5,9 +5,13 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <log.h>
 #include <asm/sections.h>
 #include <dm/uclass.h>
 #include <i2c.h>
+#include <linux/sizes.h>
+#include "board.h"
 
 int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
 {
@@ -71,3 +75,16 @@ void *board_fdt_blob_setup(void)
 	return NULL;
 }
 #endif
+
+int board_late_init_xilinx(void)
+{
+	ulong initrd_hi;
+
+	env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
+
+	initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
+	initrd_hi = round_down(initrd_hi, SZ_16M);
+	env_set_addr("initrd_high", (void *)initrd_hi);
+
+	return 0;
+}
diff --git a/board/xilinx/common/board.h b/board/xilinx/common/board.h
new file mode 100644
index 0000000000..180dfbca10
--- /dev/null
+++ b/board/xilinx/common/board.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2020 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#ifndef _BOARD_XILINX_COMMON_BOARD_H
+#define _BOARD_XILINX_COMMON_BOARD_H
+
+int board_late_init_xilinx(void);
+
+#endif /* BOARD_XILINX_COMMON_BOARD_H */
diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index 0e33f6af0b..4e569e910d 100644
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -12,7 +12,9 @@
 
 #include <common.h>
 #include <config.h>
+#include <env.h>
 #include <init.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <fdtdec.h>
 #include <linux/sizes.h>
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 75aedb0929..45cf1d2d0c 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -6,17 +6,20 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <env.h>
 #include <fdtdec.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <time.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
 #include <versalpl.h>
-#include <linux/sizes.h>
+#include "../common/board.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -82,9 +85,23 @@ int board_early_init_r(void)
 	return 0;
 }
 
-int board_late_init(void)
+static u8 versal_get_bootmode(void)
 {
+	u8 bootmode;
 	u32 reg = 0;
+
+	reg = readl(&crp_base->boot_mode_usr);
+
+	if (reg >> BOOT_MODE_ALT_SHIFT)
+		reg >>= BOOT_MODE_ALT_SHIFT;
+
+	bootmode = reg & BOOT_MODES_MASK;
+
+	return bootmode;
+}
+
+int board_late_init(void)
+{
 	u8 bootmode;
 	struct udevice *dev;
 	int bootseq = -1;
@@ -93,19 +110,13 @@ int board_late_init(void)
 	const char *mode;
 	char *new_targets;
 	char *env_targets;
-	ulong initrd_hi;
 
 	if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
 		debug("Saved variables - Skipping\n");
 		return 0;
 	}
 
-	reg = readl(&crp_base->boot_mode_usr);
-
-	if (reg >> BOOT_MODE_ALT_SHIFT)
-		reg >>= BOOT_MODE_ALT_SHIFT;
-
-	bootmode = reg & BOOT_MODES_MASK;
+	bootmode = versal_get_bootmode();
 
 	puts("Bootmode: ");
 	switch (bootmode) {
@@ -200,13 +211,7 @@ int board_late_init(void)
 
 	env_set("boot_targets", new_targets);
 
-	initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
-	initrd_hi = round_down(initrd_hi, SZ_16M);
-	env_set_addr("initrd_high", (void *)initrd_hi);
-
-	env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
-
-	return 0;
+	return board_late_init_xilinx();
 }
 
 int dram_init_banksize(void)
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 420a5ca663..2164eac8d5 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -17,6 +17,7 @@
 #include <zynqpl.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
+#include "../common/board.h"
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -76,9 +77,7 @@ int board_late_init(void)
 
 	env_set("boot_targets", new_targets);
 
-	env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
-
-	return 0;
+	return board_late_init_xilinx();
 }
 
 #if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
diff --git a/board/xilinx/zynq/bootimg.c b/board/xilinx/zynq/bootimg.c
index 56d69cddac..481f012c28 100644
--- a/board/xilinx/zynq/bootimg.c
+++ b/board/xilinx/zynq/bootimg.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <part.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
diff --git a/board/xilinx/zynq/cmds.c b/board/xilinx/zynq/cmds.c
index 27d44b760d..0c46de7599 100644
--- a/board/xilinx/zynq/cmds.c
+++ b/board/xilinx/zynq/cmds.c
@@ -4,10 +4,13 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <u-boot/md5.h>
 #include <u-boot/rsa.h>
 #include <u-boot/rsa-mod-exp.h>
@@ -408,8 +411,8 @@ static int zynq_verify_image(u32 src_ptr)
 	return 0;
 }
 
-static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_zynq_rsa(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	u32 src_ptr;
 	char *endp;
@@ -429,8 +432,8 @@ static int do_zynq_rsa(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif
 
 #ifdef CONFIG_CMD_ZYNQ_AES
-static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int zynq_decrypt_image(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	char *endp;
 	u32 srcaddr, srclen, dstaddr, dstlen;
@@ -469,7 +472,7 @@ static int zynq_decrypt_image(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 #endif
 
-static cmd_tbl_t zynq_commands[] = {
+static struct cmd_tbl zynq_commands[] = {
 #ifdef CONFIG_CMD_ZYNQ_RSA
 	U_BOOT_CMD_MKENT(rsa, 3, 1, do_zynq_rsa, "", ""),
 #endif
@@ -478,9 +481,10 @@ static cmd_tbl_t zynq_commands[] = {
 #endif
 };
 
-static int do_zynq(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_zynq(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
-	cmd_tbl_t *zynq_cmd;
+	struct cmd_tbl *zynq_cmd;
 	int ret;
 
 	if (!ARRAY_SIZE(zynq_commands)) {
diff --git a/board/xilinx/zynqmp/cmds.c b/board/xilinx/zynqmp/cmds.c
index 893616b6a1..0f1f26986f 100644
--- a/board/xilinx/zynqmp/cmds.c
+++ b/board/xilinx/zynqmp/cmds.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <malloc.h>
@@ -13,8 +14,8 @@
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
 
-static int do_zynqmp_verify_secure(cmd_tbl_t *cmdtp, int flag, int argc,
-				   char * const argv[])
+static int do_zynqmp_verify_secure(struct cmd_tbl *cmdtp, int flag, int argc,
+				   char *const argv[])
 {
 	u64 src_addr, addr;
 	u32 len, src_lo, src_hi;
@@ -65,8 +66,8 @@ static int do_zynqmp_verify_secure(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-static int do_zynqmp_mmio_read(cmd_tbl_t *cmdtp, int flag, int argc,
-			       char * const argv[])
+static int do_zynqmp_mmio_read(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	u32 read_val, addr;
 	int ret;
@@ -86,8 +87,8 @@ static int do_zynqmp_mmio_read(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-static int do_zynqmp_mmio_write(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_zynqmp_mmio_write(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[])
 {
 	u32 addr, mask, val;
 	int ret;
@@ -107,8 +108,8 @@ static int do_zynqmp_mmio_write(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 #ifdef CONFIG_DEFINE_TCM_OCM_MMAP
-static int do_zynqmp_tcm_init(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_zynqmp_tcm_init(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	u8 mode;
 
@@ -129,7 +130,7 @@ static int do_zynqmp_tcm_init(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 #endif
 
-static cmd_tbl_t cmd_zynqmp_sub[] = {
+static struct cmd_tbl cmd_zynqmp_sub[] = {
 	U_BOOT_CMD_MKENT(secure, 5, 0, do_zynqmp_verify_secure, "", ""),
 	U_BOOT_CMD_MKENT(mmio_read, 3, 0, do_zynqmp_mmio_read, "", ""),
 	U_BOOT_CMD_MKENT(mmio_write, 5, 0, do_zynqmp_mmio_write, "", ""),
@@ -149,10 +150,10 @@ static cmd_tbl_t cmd_zynqmp_sub[] = {
  *
  * Return: return 0 on success and CMD_RET_USAGE incase of misuse and error
  */
-static int do_zynqmp(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_zynqmp(struct cmd_tbl *cmdtp, int flag, int argc,
 		     char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/board/xilinx/zynqmp/tap_delays.c b/board/xilinx/zynqmp/tap_delays.c
index c3ae357bbd..5fde0aed7d 100644
--- a/board/xilinx/zynqmp/tap_delays.c
+++ b/board/xilinx/zynqmp/tap_delays.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/arch/sys_proto.h>
+#include <linux/delay.h>
 
 #define SD_DLL_CTRL			0xFF180358
 #define SD_ITAP_DLY			0xFF180314
diff --git a/board/xilinx/zynqmp/xil_io.h b/board/xilinx/zynqmp/xil_io.h
index 1c1bf32ada..e6caa7c850 100644
--- a/board/xilinx/zynqmp/xil_io.h
+++ b/board/xilinx/zynqmp/xil_io.h
@@ -6,6 +6,7 @@
 /* FIXME remove this when vivado is fixed */
 #include <asm/io.h>
 #include <common.h>
+#include <linux/delay.h>
 
 #define xil_printf(...)
 
diff --git a/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c
index 4805e5a3b9..383e3d0c7e 100644
--- a/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c
+++ b/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c
@@ -363,6 +363,7 @@ static unsigned long psu_mio_init_data(void)
 	psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U);
+	psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U);
 	psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U);
 	psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U);
@@ -408,7 +409,7 @@ static unsigned long psu_mio_init_data(void)
 	psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U);
 	psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U);
 	psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U);
-	psu_mask_write(0xFF180204, 0x7B3F003FU, 0x52240000U);
+	psu_mask_write(0xFF180204, 0x7B3F007FU, 0x52240000U);
 	psu_mask_write(0xFF180208, 0xFFFFE000U, 0x00B02000U);
 	psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U);
 	psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU);
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 3c92b1a582..cb72914adb 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -5,10 +5,13 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <debug_uart.h>
 #include <env.h>
 #include <init.h>
+#include <log.h>
+#include <net.h>
 #include <sata.h>
 #include <ahci.h>
 #include <scsi.h>
@@ -18,7 +21,9 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch/psu_init_gpl.h>
+#include <asm/cache.h>
 #include <asm/io.h>
+#include <asm/ptrace.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
 #include <usb.h>
@@ -26,7 +31,10 @@
 #include <zynqmppl.h>
 #include <zynqmp_firmware.h>
 #include <g_dnl.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
+#include "../common/board.h"
 
 #include "pm_cfg_obj.h"
 
@@ -413,7 +421,7 @@ int board_early_init_r(void)
 }
 
 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
-			 char * const argv[])
+			 char *const argv[])
 {
 	int ret = 0;
 
@@ -552,9 +560,26 @@ static int set_fdtfile(void)
 	return 0;
 }
 
-int board_late_init(void)
+static u8 zynqmp_get_bootmode(void)
 {
+	u8 bootmode;
 	u32 reg = 0;
+	int ret;
+
+	ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
+	if (ret)
+		return -EINVAL;
+
+	if (reg >> BOOT_MODE_ALT_SHIFT)
+		reg >>= BOOT_MODE_ALT_SHIFT;
+
+	bootmode = reg & BOOT_MODES_MASK;
+
+	return bootmode;
+}
+
+int board_late_init(void)
+{
 	u8 bootmode;
 	struct udevice *dev;
 	int bootseq = -1;
@@ -564,7 +589,6 @@ int board_late_init(void)
 	char *new_targets;
 	char *env_targets;
 	int ret;
-	ulong initrd_hi;
 
 #if defined(CONFIG_USB_ETHER) && !defined(CONFIG_USB_GADGET_DOWNLOAD)
 	usb_ether_init();
@@ -579,14 +603,7 @@ int board_late_init(void)
 	if (ret)
 		return ret;
 
-	ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
-	if (ret)
-		return -EINVAL;
-
-	if (reg >> BOOT_MODE_ALT_SHIFT)
-		reg >>= BOOT_MODE_ALT_SHIFT;
-
-	bootmode = reg & BOOT_MODES_MASK;
+	bootmode = zynqmp_get_bootmode();
 
 	puts("Bootmode: ");
 	switch (bootmode) {
@@ -691,15 +708,9 @@ int board_late_init(void)
 
 	env_set("boot_targets", new_targets);
 
-	initrd_hi = gd->start_addr_sp - CONFIG_STACK_SIZE;
-	initrd_hi = round_down(initrd_hi, SZ_16M);
-	env_set_addr("initrd_high", (void *)initrd_hi);
-
-	env_set_hex("script_offset_f", CONFIG_BOOT_SCRIPT_OFFSET);
-
 	reset_reason();
 
-	return 0;
+	return board_late_init_xilinx();
 }
 #endif
 
diff --git a/board/xilinx/zynqmp_r5/board.c b/board/xilinx/zynqmp_r5/board.c
index 1c45ee7196..5c5a2e9386 100644
--- a/board/xilinx/zynqmp_r5/board.c
+++ b/board/xilinx/zynqmp_r5/board.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <init.h>
 
 int board_init(void)
 {
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index 82a3feee69..3f71e3da44 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <miiphy.h>
 #include <net.h>
 #include <asm/arch/cpu.h>
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 6ce9e5521c..192b3b262f 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -190,6 +190,20 @@ comment "Commands"
 
 menu "Info commands"
 
+config CMD_ACPI
+	bool "acpi"
+	default y if ACPIGEN
+	help
+	  List and dump ACPI tables. ACPI (Advanced Configuration and Power
+	  Interface) is used mostly on x86 for providing information to the
+	  Operating System about devices in the system. The tables are set up
+	  by the firmware, typically U-Boot but possibly an earlier firmware
+	  module, if U-Boot is chain-loaded from something else. ACPI tables
+	  can also include code, to perform hardware-specific tasks required
+	  by the Operating Systems. This allows some amount of separation
+	  between the firmware and OS, and is particularly useful when you
+	  want to make hardware changes without the OS needing to be adjusted.
+
 config CMD_BDI
 	bool "bdinfo"
 	default y
@@ -477,6 +491,7 @@ config CMD_SPL_WRITE_SIZE
 
 config CMD_FITUPD
 	bool "fitImage update command"
+	depends on UPDATE_TFTP
 	help
 	  Implements the 'fitupd' command, which allows to automatically
 	  store software updates present on a TFTP server in NOR Flash
@@ -736,6 +751,22 @@ config SYS_ALT_MEMTEST
 	help
 	  Use a more complete alternative memory test.
 
+config SYS_MEMTEST_START
+	hex "default start address for mtest"
+	default 0
+	help
+	  This is the default start address for mtest for simple read/write
+	  test. If no arguments are given to mtest, default address is used
+	  as start address.
+
+config SYS_MEMTEST_END
+	hex "default end address for mtest"
+	default 0x1000
+	help
+	  This is the default end address for mtest for simple read/write
+	  test. If no arguments are given to mtest, default address is used
+	  as end address.
+
 endif
 
 config CMD_SHA1SUM
@@ -780,11 +811,13 @@ config CMD_UNLZ4
 config CMD_UNZIP
 	bool "unzip"
 	default y if CMD_BOOTI
+	select GZIP
 	help
 	  Uncompress a zip-compressed memory region.
 
 config CMD_ZIP
 	bool "zip"
+	select GZIP_COMPRESSED
 	help
 	  Compress a memory region with zlib deflate method.
 
diff --git a/cmd/Makefile b/cmd/Makefile
index 6692ed96c6..974ad48b0a 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -11,6 +11,7 @@ obj-y += help.o
 obj-y += version.o
 
 # command
+obj-$(CONFIG_CMD_ACPI) += acpi.o
 obj-$(CONFIG_CMD_AES) += aes.o
 obj-$(CONFIG_CMD_AB_SELECT) += ab_select.o
 obj-$(CONFIG_CMD_ADC) += adc.o
diff --git a/cmd/ab_select.c b/cmd/ab_select.c
index 7c8f2ee8eb..6298fcfb60 100644
--- a/cmd/ab_select.c
+++ b/cmd/ab_select.c
@@ -3,15 +3,18 @@
  * Copyright (C) 2017 The Android Open Source Project
  */
 
+#include <common.h>
 #include <android_ab.h>
 #include <command.h>
+#include <env.h>
+#include <part.h>
 
-static int do_ab_select(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_ab_select(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	int ret;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
+	struct disk_partition part_info;
 	char slot[2];
 
 	if (argc != 4)
diff --git a/cmd/abootimg.c b/cmd/abootimg.c
index 670bcb3aaa..40e8978f15 100644
--- a/cmd/abootimg.c
+++ b/cmd/abootimg.c
@@ -6,6 +6,8 @@
 
 #include <android_image.h>
 #include <common.h>
+#include <command.h>
+#include <image.h>
 #include <mapmem.h>
 
 #define abootimg_addr() \
@@ -14,7 +16,7 @@
 /* Please use abootimg_addr() macro to obtain the boot image address */
 static ulong _abootimg_addr = -1;
 
-static int abootimg_get_ver(int argc, char * const argv[])
+static int abootimg_get_ver(int argc, char *const argv[])
 {
 	const struct andr_img_hdr *hdr;
 	int res = CMD_RET_SUCCESS;
@@ -39,7 +41,7 @@ exit:
 	return res;
 }
 
-static int abootimg_get_recovery_dtbo(int argc, char * const argv[])
+static int abootimg_get_recovery_dtbo(int argc, char *const argv[])
 {
 	ulong addr;
 	u32 size;
@@ -61,7 +63,7 @@ static int abootimg_get_recovery_dtbo(int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int abootimg_get_dtb_load_addr(int argc, char * const argv[])
+static int abootimg_get_dtb_load_addr(int argc, char *const argv[])
 {
 	const struct andr_img_hdr *hdr;
 	int res = CMD_RET_SUCCESS;
@@ -92,7 +94,7 @@ exit:
 	return res;
 }
 
-static int abootimg_get_dtb_by_index(int argc, char * const argv[])
+static int abootimg_get_dtb_by_index(int argc, char *const argv[])
 {
 	const char *index_str;
 	u32 num;
@@ -139,7 +141,7 @@ static int abootimg_get_dtb_by_index(int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int abootimg_get_dtb(int argc, char * const argv[])
+static int abootimg_get_dtb(int argc, char *const argv[])
 {
 	if (argc < 1)
 		return CMD_RET_USAGE;
@@ -150,8 +152,8 @@ static int abootimg_get_dtb(int argc, char * const argv[])
 	return CMD_RET_USAGE;
 }
 
-static int do_abootimg_addr(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char * const argv[])
+static int do_abootimg_addr(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	char *endp;
 	ulong img_addr;
@@ -169,8 +171,8 @@ static int do_abootimg_addr(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_abootimg_get(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_abootimg_get(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	const char *param;
 
@@ -192,8 +194,8 @@ static int do_abootimg_get(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_USAGE;
 }
 
-static int do_abootimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char * const argv[])
+static int do_abootimg_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -208,16 +210,16 @@ static int do_abootimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_abootimg_sub[] = {
+static struct cmd_tbl cmd_abootimg_sub[] = {
 	U_BOOT_CMD_MKENT(addr, 2, 1, do_abootimg_addr, "", ""),
 	U_BOOT_CMD_MKENT(dump, 2, 1, do_abootimg_dump, "", ""),
 	U_BOOT_CMD_MKENT(get, 5, 1, do_abootimg_get, "", ""),
 };
 
-static int do_abootimg(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_abootimg(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	cp = find_cmd_tbl(argv[1], cmd_abootimg_sub,
 			  ARRAY_SIZE(cmd_abootimg_sub));
diff --git a/cmd/acpi.c b/cmd/acpi.c
new file mode 100644
index 0000000000..e9a9161a91
--- /dev/null
+++ b/cmd/acpi.c
@@ -0,0 +1,186 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Google LLC
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+#include <common.h>
+#include <command.h>
+#include <mapmem.h>
+#include <acpi/acpi_table.h>
+#include <asm/acpi_table.h>
+#include <dm/acpi.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * dump_hdr() - Dump an ACPI header
+ *
+ * If the header is for FACS then it shows the revision information as well
+ *
+ * @hdr: ACPI header to dump
+ */
+static void dump_hdr(struct acpi_table_header *hdr)
+{
+	bool has_hdr = memcmp(hdr->signature, "FACS", ACPI_NAME_LEN);
+
+	printf("%.*s %08lx %06x", ACPI_NAME_LEN, hdr->signature,
+	       (ulong)map_to_sysmem(hdr), hdr->length);
+	if (has_hdr) {
+		printf(" (v%02d %.6s %.8s %u %.4s %d)\n", hdr->revision,
+		       hdr->oem_id, hdr->oem_table_id, hdr->oem_revision,
+		       hdr->aslc_id, hdr->aslc_revision);
+	} else {
+		printf("\n");
+	}
+}
+
+/**
+ * find_table() - Look up an ACPI table
+ *
+ * @sig: Signature of table (4 characters, upper case)
+ * @return pointer to table header, or NULL if not found
+ */
+struct acpi_table_header *find_table(const char *sig)
+{
+	struct acpi_rsdp *rsdp;
+	struct acpi_rsdt *rsdt;
+	int len, i, count;
+
+	rsdp = map_sysmem(gd->arch.acpi_start, 0);
+	if (!rsdp)
+		return NULL;
+	rsdt = map_sysmem(rsdp->rsdt_address, 0);
+	len = rsdt->header.length - sizeof(rsdt->header);
+	count = len / sizeof(u32);
+	for (i = 0; i < count; i++) {
+		struct acpi_table_header *hdr;
+
+		hdr = map_sysmem(rsdt->entry[i], 0);
+		if (!memcmp(hdr->signature, sig, ACPI_NAME_LEN))
+			return hdr;
+		if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN)) {
+			struct acpi_fadt *fadt = (struct acpi_fadt *)hdr;
+
+			if (!memcmp(sig, "DSDT", ACPI_NAME_LEN) && fadt->dsdt)
+				return map_sysmem(fadt->dsdt, 0);
+			if (!memcmp(sig, "FACS", ACPI_NAME_LEN) &&
+			    fadt->firmware_ctrl)
+				return map_sysmem(fadt->firmware_ctrl, 0);
+		}
+	}
+
+	return NULL;
+}
+
+static int dump_table_name(const char *sig)
+{
+	struct acpi_table_header *hdr;
+
+	hdr = find_table(sig);
+	if (!hdr)
+		return -ENOENT;
+	printf("%.*s @ %08lx\n", ACPI_NAME_LEN, hdr->signature,
+	       (ulong)map_to_sysmem(hdr));
+	print_buffer(0, hdr, 1, hdr->length, 0);
+
+	return 0;
+}
+
+static void list_fadt(struct acpi_fadt *fadt)
+{
+	if (fadt->dsdt)
+		dump_hdr(map_sysmem(fadt->dsdt, 0));
+	if (fadt->firmware_ctrl)
+		dump_hdr(map_sysmem(fadt->firmware_ctrl, 0));
+}
+
+static int list_rsdt(struct acpi_rsdt *rsdt, struct acpi_xsdt *xsdt)
+{
+	int len, i, count;
+
+	dump_hdr(&rsdt->header);
+	if (xsdt)
+		dump_hdr(&xsdt->header);
+	len = rsdt->header.length - sizeof(rsdt->header);
+	count = len / sizeof(u32);
+	for (i = 0; i < count; i++) {
+		struct acpi_table_header *hdr;
+
+		if (!rsdt->entry[i])
+			break;
+		hdr = map_sysmem(rsdt->entry[i], 0);
+		dump_hdr(hdr);
+		if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN))
+			list_fadt((struct acpi_fadt *)hdr);
+		if (xsdt) {
+			if (xsdt->entry[i] != rsdt->entry[i]) {
+				printf("   (xsdt mismatch %llx)\n",
+				       xsdt->entry[i]);
+			}
+		}
+	}
+
+	return 0;
+}
+
+static int list_rsdp(struct acpi_rsdp *rsdp)
+{
+	struct acpi_rsdt *rsdt;
+	struct acpi_xsdt *xsdt;
+
+	printf("RSDP %08lx %06x (v%02d %.6s)\n", (ulong)map_to_sysmem(rsdp),
+	       rsdp->length, rsdp->revision, rsdp->oem_id);
+	rsdt = map_sysmem(rsdp->rsdt_address, 0);
+	xsdt = map_sysmem(rsdp->xsdt_address, 0);
+	list_rsdt(rsdt, xsdt);
+
+	return 0;
+}
+
+static int do_acpi_list(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	struct acpi_rsdp *rsdp;
+
+	rsdp = map_sysmem(gd->arch.acpi_start, 0);
+	if (!rsdp) {
+		printf("No ACPI tables present\n");
+		return 0;
+	}
+	printf("ACPI tables start at %lx\n", gd->arch.acpi_start);
+	list_rsdp(rsdp);
+
+	return 0;
+}
+
+static int do_acpi_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
+{
+	const char *name;
+	char sig[ACPI_NAME_LEN];
+	int ret;
+
+	if (argc < 2)
+		return CMD_RET_USAGE;
+	name = argv[1];
+	if (strlen(name) != ACPI_NAME_LEN) {
+		printf("Table name '%s' must be four characters\n", name);
+		return CMD_RET_FAILURE;
+	}
+	str_to_upper(name, sig, -1);
+	ret = dump_table_name(sig);
+	if (ret) {
+		printf("Table '%.*s' not found\n", ACPI_NAME_LEN, sig);
+		return CMD_RET_FAILURE;
+	}
+
+	return 0;
+}
+
+static char acpi_help_text[] =
+	"list - list ACPI tables\n"
+	"acpi dump <name> - Dump ACPI table";
+
+U_BOOT_CMD_WITH_SUBCMDS(acpi, "ACPI tables", acpi_help_text,
+	U_BOOT_SUBCMD_MKENT(list, 1, 1, do_acpi_list),
+	U_BOOT_SUBCMD_MKENT(dump, 2, 1, do_acpi_dump));
diff --git a/cmd/adc.c b/cmd/adc.c
index 381961cf51..16f914a030 100644
--- a/cmd/adc.c
+++ b/cmd/adc.c
@@ -8,7 +8,7 @@
 #include <dm.h>
 #include <adc.h>
 
-static int do_adc_list(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_adc_list(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	struct udevice *dev;
@@ -31,7 +31,7 @@ static int do_adc_list(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_adc_info(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_adc_info(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	struct udevice *dev;
@@ -68,7 +68,7 @@ static int do_adc_info(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_adc_single(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_adc_single(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	struct udevice *dev;
@@ -95,7 +95,7 @@ static int do_adc_single(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_adc_scan(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_adc_scan(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	struct adc_channel ch[ADC_MAX_CHANNEL];
diff --git a/cmd/adtimg.c b/cmd/adtimg.c
index 60bb01c349..aa943007f3 100644
--- a/cmd/adtimg.c
+++ b/cmd/adtimg.c
@@ -5,6 +5,7 @@
  * Eugeniu Rosca <rosca.eugeniu@gmail.com>
  */
 
+#include <command.h>
 #include <env.h>
 #include <image-android-dt.h>
 #include <common.h>
@@ -17,8 +18,8 @@
  */
 static ulong working_img;
 
-static int do_adtimg_addr(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_adtimg_addr(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	char *endp;
 	ulong hdr_addr;
@@ -56,8 +57,8 @@ static int adtimg_check_working_img(void)
 	return CMD_RET_SUCCESS;
 }
 
-static int do_adtimg_dump(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_adtimg_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	if (argc != 1)
 		return CMD_RET_USAGE;
@@ -99,7 +100,7 @@ static int adtimg_getopt_u32(char * const opt, char * const name, u32 *optval)
 	return CMD_RET_SUCCESS;
 }
 
-static int adtimg_getopt_index(int argc, char * const argv[], u32 *index,
+static int adtimg_getopt_index(int argc, char *const argv[], u32 *index,
 			       char **avar, char **svar)
 {
 	int ret;
@@ -124,7 +125,7 @@ static int adtimg_getopt_index(int argc, char * const argv[], u32 *index,
 	return CMD_RET_SUCCESS;
 }
 
-static int adtimg_get_dt_by_index(int argc, char * const argv[])
+static int adtimg_get_dt_by_index(int argc, char *const argv[])
 {
 	ulong addr;
 	u32 index, size;
@@ -163,7 +164,7 @@ static int adtimg_get_dt_by_index(int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int adtimg_get_dt(int argc, char * const argv[])
+static int adtimg_get_dt(int argc, char *const argv[])
 {
 	if (argc < 2) {
 		printf("Error: No options passed to '%s'\n", argv[0]);
@@ -181,8 +182,8 @@ static int adtimg_get_dt(int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-static int do_adtimg_get(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_adtimg_get(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	if (argc < 2) {
 		printf("Error: No arguments passed to '%s'\n", argv[0]);
@@ -203,15 +204,16 @@ static int do_adtimg_get(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_adtimg_sub[] = {
+static struct cmd_tbl cmd_adtimg_sub[] = {
 	U_BOOT_CMD_MKENT(addr, CONFIG_SYS_MAXARGS, 1, do_adtimg_addr, "", ""),
 	U_BOOT_CMD_MKENT(dump, CONFIG_SYS_MAXARGS, 1, do_adtimg_dump, "", ""),
 	U_BOOT_CMD_MKENT(get, CONFIG_SYS_MAXARGS, 1, do_adtimg_get, "", ""),
 };
 
-static int do_adtimg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_adtimg(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	cp = find_cmd_tbl(argv[1], cmd_adtimg_sub, ARRAY_SIZE(cmd_adtimg_sub));
 
diff --git a/cmd/aes.c b/cmd/aes.c
index 8c5b42fd2c..4c0dad9932 100644
--- a/cmd/aes.c
+++ b/cmd/aes.c
@@ -35,7 +35,7 @@ u32 aes_get_key_len(char *command)
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_aes(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_aes(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint32_t key_addr, iv_addr, src_addr, dst_addr, len;
 	uint8_t *key_ptr, *iv_ptr, *src_ptr, *dst_ptr;
diff --git a/cmd/arm/exception.c b/cmd/arm/exception.c
index 33bc75976f..522f6dff53 100644
--- a/cmd/arm/exception.c
+++ b/cmd/arm/exception.c
@@ -8,8 +8,8 @@
 #include <common.h>
 #include <command.h>
 
-static int do_unaligned(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_unaligned(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	/*
 	 * The LDRD instruction requires the data source to be four byte aligned
@@ -23,15 +23,15 @@ static int do_unaligned(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static int do_breakpoint(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_breakpoint(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	asm volatile ("BKPT #123\n");
 	return CMD_RET_FAILURE;
 }
 
-static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	/*
 	 * 0xe7f...f.	is undefined in ARM mode
@@ -41,7 +41,7 @@ static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_sub[] = {
+static struct cmd_tbl cmd_sub[] = {
 	U_BOOT_CMD_MKENT(breakpoint, CONFIG_SYS_MAXARGS, 1, do_breakpoint,
 			 "", ""),
 	U_BOOT_CMD_MKENT(unaligned, CONFIG_SYS_MAXARGS, 1, do_unaligned,
diff --git a/cmd/arm/exception64.c b/cmd/arm/exception64.c
index a363818532..d5de50a080 100644
--- a/cmd/arm/exception64.c
+++ b/cmd/arm/exception64.c
@@ -8,8 +8,8 @@
 #include <common.h>
 #include <command.h>
 
-static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	/*
 	 * 0xe7f...f.	is undefined in ARM mode
@@ -19,7 +19,7 @@ static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_sub[] = {
+static struct cmd_tbl cmd_sub[] = {
 	U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
 			 "", ""),
 };
diff --git a/cmd/armflash.c b/cmd/armflash.c
index 6872b0dde3..5e7315eb7c 100644
--- a/cmd/armflash.c
+++ b/cmd/armflash.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <console.h>
+#include <flash.h>
 #include <asm/io.h>
 
 #define MAX_REGIONS 4
@@ -266,7 +267,7 @@ static int exists(const char * const name)
 	return CMD_RET_FAILURE;
 }
 
-static int do_afs(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_afs(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret = CMD_RET_SUCCESS;
 
diff --git a/cmd/avb.c b/cmd/avb.c
index a4de5c40a2..88172a9ee6 100644
--- a/cmd/avb.c
+++ b/cmd/avb.c
@@ -15,7 +15,7 @@
 #define AVB_BOOTARGS	"avb_bootargs"
 static struct AvbOps *avb_ops;
 
-int do_avb_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_avb_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long mmc_dev;
 
@@ -36,7 +36,8 @@ int do_avb_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_read_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_avb_read_part(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	const char *part;
 	s64 offset;
@@ -68,7 +69,7 @@ int do_avb_read_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_read_part_hex(cmd_tbl_t *cmdtp, int flag, int argc,
+int do_avb_read_part_hex(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	const char *part;
@@ -114,7 +115,8 @@ int do_avb_read_part_hex(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_write_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_avb_write_part(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	const char *part;
 	s64 offset;
@@ -145,7 +147,8 @@ int do_avb_write_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_read_rb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_avb_read_rb(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	size_t index;
 	u64 rb_idx;
@@ -171,7 +174,8 @@ int do_avb_read_rb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_write_rb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_avb_write_rb(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	size_t index;
 	u64 rb_idx;
@@ -196,8 +200,8 @@ int do_avb_write_rb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_get_uuid(cmd_tbl_t *cmdtp, int flag,
-		    int argc, char * const argv[])
+int do_avb_get_uuid(struct cmd_tbl *cmdtp, int flag,
+		    int argc, char *const argv[])
 {
 	const char *part;
 	char buffer[UUID_STR_LEN + 1];
@@ -224,7 +228,7 @@ int do_avb_get_uuid(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag,
+int do_avb_verify_part(struct cmd_tbl *cmdtp, int flag,
 		       int argc, char *const argv[])
 {
 	const char * const requested_partitions[] = {"boot", NULL};
@@ -312,11 +316,14 @@ int do_avb_verify_part(cmd_tbl_t *cmdtp, int flag,
 		printf("Unknown error occurred\n");
 	}
 
+	if (out_data)
+		avb_slot_verify_data_free(out_data);
+
 	return res;
 }
 
-int do_avb_is_unlocked(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+int do_avb_is_unlocked(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	bool unlock;
 
@@ -341,8 +348,8 @@ int do_avb_is_unlocked(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_read_pvalue(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+int do_avb_read_pvalue(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	const char *name;
 	size_t bytes;
@@ -382,8 +389,8 @@ int do_avb_read_pvalue(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-int do_avb_write_pvalue(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+int do_avb_write_pvalue(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	const char *name;
 	const char *value;
@@ -411,7 +418,7 @@ int do_avb_write_pvalue(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_avb[] = {
+static struct cmd_tbl cmd_avb[] = {
 	U_BOOT_CMD_MKENT(init, 2, 0, do_avb_init, "", ""),
 	U_BOOT_CMD_MKENT(read_rb, 2, 0, do_avb_read_rb, "", ""),
 	U_BOOT_CMD_MKENT(write_rb, 3, 0, do_avb_write_rb, "", ""),
@@ -427,9 +434,9 @@ static cmd_tbl_t cmd_avb[] = {
 #endif
 };
 
-static int do_avb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_avb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	cp = find_cmd_tbl(argv[1], cmd_avb, ARRAY_SIZE(cmd_avb));
 
diff --git a/cmd/axi.c b/cmd/axi.c
index 588098fddd..c9d53c049e 100644
--- a/cmd/axi.c
+++ b/cmd/axi.c
@@ -14,6 +14,7 @@
 #include <command.h>
 #include <console.h>
 #include <dm.h>
+#include <log.h>
 
 /* Currently selected AXI bus device */
 static struct udevice *axi_cur_bus;
@@ -96,8 +97,8 @@ static int axi_get_cur_bus(struct udevice **busp)
  * Command handlers
  */
 
-static int do_axi_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_axi_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	struct udevice *dummy;
 
@@ -135,8 +136,8 @@ static int do_axi_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_axi_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_axi_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int ret = 0;
 	int bus_no;
@@ -163,7 +164,8 @@ static int do_axi_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret ? CMD_RET_FAILURE : 0;
 }
 
-static int do_axi_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_axi_md(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	/* Print that many bytes per line */
 	const uint DISP_LINE_LEN = 16;
@@ -261,7 +263,8 @@ static int do_axi_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static int do_axi_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_axi_mw(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	u32 writeval;
 	ulong addr, count, size;
@@ -312,17 +315,17 @@ static int do_axi_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_axi_sub[] = {
+static struct cmd_tbl cmd_axi_sub[] = {
 	U_BOOT_CMD_MKENT(bus, 1, 1, do_axi_show_bus, "", ""),
 	U_BOOT_CMD_MKENT(dev, 1, 1, do_axi_bus_num, "", ""),
 	U_BOOT_CMD_MKENT(md, 4, 1, do_axi_md, "", ""),
 	U_BOOT_CMD_MKENT(mw, 5, 1, do_axi_mw, "", ""),
 };
 
-static int do_ihs_axi(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_ihs_axi(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/bcb.c b/cmd/bcb.c
index 9626f2c69e..e03218066b 100644
--- a/cmd/bcb.c
+++ b/cmd/bcb.c
@@ -8,6 +8,8 @@
 #include <android_bootloader_message.h>
 #include <command.h>
 #include <common.h>
+#include <log.h>
+#include <part.h>
 
 enum bcb_cmd {
 	BCB_CMD_LOAD,
@@ -108,11 +110,11 @@ static int bcb_field_get(char *name, char **fieldp, int *sizep)
 	return 0;
 }
 
-static int do_bcb_load(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_bcb_load(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct blk_desc *desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	u64 cnt;
 	char *endp;
 	int part, ret;
@@ -161,8 +163,8 @@ err:
 	return CMD_RET_FAILURE;
 }
 
-static int do_bcb_set(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_bcb_set(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int size, len;
 	char *field, *str, *found;
@@ -188,8 +190,8 @@ static int do_bcb_set(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_bcb_clear(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_bcb_clear(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	int size;
 	char *field;
@@ -207,8 +209,8 @@ static int do_bcb_clear(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_bcb_test(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_bcb_test(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	int size;
 	char *field;
@@ -234,8 +236,8 @@ static int do_bcb_test(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_FAILURE;
 }
 
-static int do_bcb_dump(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_bcb_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	int size;
 	char *field;
@@ -248,11 +250,11 @@ static int do_bcb_dump(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_bcb_store(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_bcb_store(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	struct blk_desc *desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	u64 cnt;
 	int ret;
 
@@ -280,7 +282,7 @@ err:
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_bcb_sub[] = {
+static struct cmd_tbl cmd_bcb_sub[] = {
 	U_BOOT_CMD_MKENT(load, CONFIG_SYS_MAXARGS, 1, do_bcb_load, "", ""),
 	U_BOOT_CMD_MKENT(set, CONFIG_SYS_MAXARGS, 1, do_bcb_set, "", ""),
 	U_BOOT_CMD_MKENT(clear, CONFIG_SYS_MAXARGS, 1, do_bcb_clear, "", ""),
@@ -289,9 +291,9 @@ static cmd_tbl_t cmd_bcb_sub[] = {
 	U_BOOT_CMD_MKENT(store, CONFIG_SYS_MAXARGS, 1, do_bcb_store, "", ""),
 };
 
-static int do_bcb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_bcb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/bdinfo.c b/cmd/bdinfo.c
index d6a7175b37..dba552b03f 100644
--- a/cmd/bdinfo.c
+++ b/cmd/bdinfo.c
@@ -10,11 +10,18 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <net.h>
 #include <vsprintf.h>
+#include <asm/cache.h>
 #include <linux/compiler.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
+__maybe_unused void print_cpu_word_size(void)
+{
+	printf("%-12s= %u-bit\n", "Build", (uint)sizeof(void *) * 8);
+}
+
 __maybe_unused
 static void print_num(const char *name, ulong value)
 {
@@ -170,7 +177,7 @@ void __weak board_detail(void)
 	/* Please define board_detail() for your platform */
 }
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -208,12 +215,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_baudrate();
 	print_num("relocaddr", gd->relocaddr);
 	board_detail();
+	print_cpu_word_size();
+
 	return 0;
 }
 
 #elif defined(CONFIG_NIOS2)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -227,13 +236,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_MICROBLAZE)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -252,13 +262,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_num("fdt_blob", (ulong)gd->fdt_blob);
 	print_num("new_fdt", (ulong)gd->new_fdt);
 	print_num("fdt_size", (ulong)gd->fdt_size);
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_M68K)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -283,25 +294,27 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_MIPS)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	print_std_bdinfo(gd->bd);
 	print_num("relocaddr", gd->relocaddr);
 	print_num("reloc off", gd->reloc_off);
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_ARM)
 
-static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -354,13 +367,14 @@ static int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif
 	if (gd->fdt_blob)
 		print_num("fdt_blob", (ulong)gd->fdt_blob);
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_SH)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -368,12 +382,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_bi_flash(bd);
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
+
 	return 0;
 }
 
 #elif defined(CONFIG_X86)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -388,13 +404,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_mhz("ethspeed",	    bd->bi_ethspeed);
 #endif
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_SANDBOX)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -405,12 +422,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO)
 	print_num("FB base  ", gd->fb_base);
 #endif
+	print_cpu_word_size();
+
 	return 0;
 }
 
 #elif defined(CONFIG_NDS32)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -419,13 +438,14 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_bi_dram(bd);
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_RISCV)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
@@ -435,26 +455,28 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	print_num("reloc off", gd->reloc_off);
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_ARC)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	bd_t *bd = gd->bd;
 
 	print_bi_mem(bd);
 	print_eth_ip_addr();
 	print_baudrate();
+	print_cpu_word_size();
 
 	return 0;
 }
 
 #elif defined(CONFIG_XTENSA)
 
-int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	print_std_bdinfo(gd->bd);
 	return 0;
diff --git a/cmd/bedbug.c b/cmd/bedbug.c
index 9fee528830..81ce256480 100644
--- a/cmd/bedbug.c
+++ b/cmd/bedbug.c
@@ -6,6 +6,7 @@
 #include <cli.h>
 #include <command.h>
 #include <console.h>
+#include <asm/ptrace.h>
 #include <linux/ctype.h>
 #include <net.h>
 #include <bedbug/type.h>
@@ -44,10 +45,10 @@ int bedbug_puts (const char *str)
  * settings.
  * ====================================================================== */
 
-void bedbug_init (void)
+int bedbug_init(void)
 {
 	/* -------------------------------------------------- */
-	return;
+	return 0;
 }				/* bedbug_init */
 
 
@@ -56,7 +57,8 @@ void bedbug_init (void)
  * Entry point from the interpreter to the disassembler.  Repeated calls
  * will resume from the last disassembled address.
  * ====================================================================== */
-int do_bedbug_dis (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_dis(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	ulong addr;		/* Address to start disassembly from    */
 	ulong len;		/* # of instructions to disassemble     */
@@ -96,7 +98,8 @@ U_BOOT_CMD (ds, 3, 1, do_bedbug_dis,
  * instructions in consecutive memory locations until a '.' (period) is
  * entered on a line by itself.
  * ====================================================================== */
-int do_bedbug_asm (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_asm(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	long mem_addr;		/* Address to assemble into     */
 	unsigned long instr;	/* Machine code for text        */
@@ -146,7 +149,8 @@ U_BOOT_CMD (as, 2, 0, do_bedbug_asm,
  * CPU-specific break point set routine.
  * ====================================================================== */
 
-int do_bedbug_break (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_break(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	/* -------------------------------------------------- */
 	if (bug_ctx.do_break)
@@ -242,7 +246,8 @@ void bedbug_main_loop (unsigned long addr, struct pt_regs *regs)
  * stopped flag in the context so that the breakpoint routine will
  * return.
  * ====================================================================== */
-int do_bedbug_continue (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_continue(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	/* -------------------------------------------------- */
 
@@ -265,7 +270,8 @@ U_BOOT_CMD (continue, 1, 0, do_bedbug_continue,
  * the address passes control to the CPU-specific set breakpoint routine
  * for the current breakpoint number.
  * ====================================================================== */
-int do_bedbug_step (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_step(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	unsigned long addr;	/* Address to stop at */
 
@@ -296,7 +302,8 @@ U_BOOT_CMD (step, 1, 1, do_bedbug_step,
  * the address passes control to the CPU-specific set breakpoint routine
  * for the current breakpoint number.
  * ====================================================================== */
-int do_bedbug_next (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_next(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	unsigned long addr;	/* Address to stop at */
 
@@ -325,7 +332,8 @@ U_BOOT_CMD (next, 1, 1, do_bedbug_next,
  * Interpreter command to print the current stack.  This assumes an EABI
  * architecture, so it starts with GPR R1 and works back up the stack.
  * ====================================================================== */
-int do_bedbug_stack (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_stack(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	unsigned long sp;	/* Stack pointer                */
 	unsigned long func;	/* LR from stack                */
@@ -370,7 +378,8 @@ U_BOOT_CMD (where, 1, 1, do_bedbug_stack,
  * Interpreter command to dump the registers.  Calls the CPU-specific
  * show registers routine.
  * ====================================================================== */
-int do_bedbug_rdump (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_bedbug_rdump(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	/* -------------------------------------------------- */
 
diff --git a/cmd/bind.c b/cmd/bind.c
index 44a5f17f0d..068b1399ab 100644
--- a/cmd/bind.c
+++ b/cmd/bind.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -194,8 +195,8 @@ static int unbind_by_node_path(const char *path)
 	return 0;
 }
 
-static int do_bind_unbind(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_bind_unbind(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int ret = 0;
 	bool bind;
diff --git a/cmd/binop.c b/cmd/binop.c
index 6d2df5f3dd..c85cb51568 100644
--- a/cmd/binop.c
+++ b/cmd/binop.c
@@ -64,7 +64,8 @@ void write_to_mem(char *varname, u8 *result, ulong len)
 	unmap_sysmem(buf);
 }
 
-static int do_binop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_binop(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	ulong len;
 	u8 *result, *src1, *src2;
diff --git a/cmd/blk_common.c b/cmd/blk_common.c
index cc6e161ba0..87f94b5abb 100644
--- a/cmd/blk_common.c
+++ b/cmd/blk_common.c
@@ -10,8 +10,9 @@
 
 #include <common.h>
 #include <blk.h>
+#include <command.h>
 
-int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
+int blk_common_cmd(int argc, char *const argv[], enum if_type if_type,
 		   int *cur_devnump)
 {
 	const char *if_name = blk_get_if_type_name(if_type);
diff --git a/cmd/blkcache.c b/cmd/blkcache.c
index 2cc65a9ee7..25f252e455 100644
--- a/cmd/blkcache.c
+++ b/cmd/blkcache.c
@@ -4,13 +4,14 @@
  * Author: Eric Nelson<eric@nelint.com>
  *
  */
+#include <command.h>
 #include <config.h>
 #include <common.h>
 #include <malloc.h>
 #include <part.h>
 
-static int blkc_show(cmd_tbl_t *cmdtp, int flag,
-		     int argc, char * const argv[])
+static int blkc_show(struct cmd_tbl *cmdtp, int flag,
+		     int argc, char *const argv[])
 {
 	struct block_cache_stats stats;
 	blkcache_stats(&stats);
@@ -25,8 +26,8 @@ static int blkc_show(cmd_tbl_t *cmdtp, int flag,
 	return 0;
 }
 
-static int blkc_configure(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char * const argv[])
+static int blkc_configure(struct cmd_tbl *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
 	unsigned blocks_per_entry, max_entries;
 	if (argc != 3)
@@ -40,7 +41,7 @@ static int blkc_configure(cmd_tbl_t *cmdtp, int flag,
 	return 0;
 }
 
-static cmd_tbl_t cmd_blkc_sub[] = {
+static struct cmd_tbl cmd_blkc_sub[] = {
 	U_BOOT_CMD_MKENT(show, 0, 0, blkc_show, "", ""),
 	U_BOOT_CMD_MKENT(configure, 3, 0, blkc_configure, "", ""),
 };
@@ -55,10 +56,10 @@ static __maybe_unused void blkc_reloc(void)
 	};
 }
 
-static int do_blkcache(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int do_blkcache(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 	blkc_reloc();
diff --git a/cmd/blob.c b/cmd/blob.c
index 80478b8802..c80e6977b4 100644
--- a/cmd/blob.c
+++ b/cmd/blob.c
@@ -48,7 +48,8 @@ __weak int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len)
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_blob(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	ulong key_addr, src_addr, dst_addr, len;
 	uint8_t *km_ptr, *src_ptr, *dst_ptr;
diff --git a/cmd/bmp.c b/cmd/bmp.c
index edf4f56426..6040fa5d95 100644
--- a/cmd/bmp.c
+++ b/cmd/bmp.c
@@ -15,6 +15,7 @@
 #include <gzip.h>
 #include <image.h>
 #include <lcd.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <splash.h>
@@ -91,7 +92,8 @@ struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
 }
 #endif
 
-static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_bmp_info(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	ulong addr;
 
@@ -109,7 +111,8 @@ static int do_bmp_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[
 	return (bmp_info(addr));
 }
 
-static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_bmp_display(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	ulong addr;
 	int x = 0, y = 0;
@@ -141,7 +144,7 @@ static int do_bmp_display(cmd_tbl_t * cmdtp, int flag, int argc, char * const ar
 	 return (bmp_display(addr, x, y));
 }
 
-static cmd_tbl_t cmd_bmp_sub[] = {
+static struct cmd_tbl cmd_bmp_sub[] = {
 	U_BOOT_CMD_MKENT(info, 3, 0, do_bmp_info, "", ""),
 	U_BOOT_CMD_MKENT(display, 5, 0, do_bmp_display, "", ""),
 };
@@ -162,9 +165,9 @@ void bmp_reloc(void) {
  * Return:      None
  *
  */
-static int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bmp(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	/* Strip off leading 'bmp' command argument */
 	argc--;
diff --git a/cmd/boot.c b/cmd/boot.c
index 9150fce80b..36aba22b30 100644
--- a/cmd/boot.c
+++ b/cmd/boot.c
@@ -16,12 +16,12 @@
 /* Allow ports to override the default behavior */
 __attribute__((weak))
 unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
-				 char * const argv[])
+				 char *const argv[])
 {
 	return entry (argc, argv);
 }
 
-static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_go(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong	addr, rc;
 	int     rcode = 0;
diff --git a/cmd/bootcount.c b/cmd/bootcount.c
index c358418ebe..654bbb805c 100644
--- a/cmd/bootcount.c
+++ b/cmd/bootcount.c
@@ -4,15 +4,15 @@
 #include <command.h>
 #include <bootcount.h>
 
-static int do_bootcount_print(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_bootcount_print(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	printf("%lu\n", bootcount_load());
 	return CMD_RET_SUCCESS;
 }
 
-static int do_bootcount_reset(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_bootcount_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	/*
 	 * note that we're explicitly not resetting the environment
@@ -22,15 +22,15 @@ static int do_bootcount_reset(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t bootcount_sub[] = {
+static struct cmd_tbl bootcount_sub[] = {
 	U_BOOT_CMD_MKENT(print, 1, 1, do_bootcount_print, "", ""),
 	U_BOOT_CMD_MKENT(reset, 1, 1, do_bootcount_reset, "", ""),
 };
 
-static int do_bootcount(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_bootcount(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index aaed575505..0f6d0f7750 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -13,6 +13,7 @@
 #include <efi_selftest.h>
 #include <env.h>
 #include <errno.h>
+#include <image.h>
 #include <malloc.h>
 #include <linux/libfdt.h>
 #include <linux/libfdt_env.h>
@@ -127,13 +128,13 @@ static efi_status_t copy_fdt(void **fdtp)
 	new_fdt_addr = (uintptr_t)map_sysmem(fdt_ram_start + 0x7f00000 +
 					     fdt_size, 0);
 	ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS,
-				 EFI_BOOT_SERVICES_DATA, fdt_pages,
+				 EFI_ACPI_RECLAIM_MEMORY, fdt_pages,
 				 &new_fdt_addr);
 	if (ret != EFI_SUCCESS) {
 		/* If we can't put it there, put it somewhere */
 		new_fdt_addr = (ulong)memalign(EFI_PAGE_SIZE, fdt_size);
 		ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS,
-					 EFI_BOOT_SERVICES_DATA, fdt_pages,
+					 EFI_ACPI_RECLAIM_MEMORY, fdt_pages,
 					 &new_fdt_addr);
 		if (ret != EFI_SUCCESS) {
 			printf("ERROR: Failed to reserve space for FDT\n");
@@ -151,14 +152,10 @@ done:
 
 static void efi_reserve_memory(u64 addr, u64 size)
 {
-	u64 pages;
-
 	/* Convert from sandbox address space. */
 	addr = (uintptr_t)map_sysmem(addr, 0);
-	pages = efi_size_in_pages(size + (addr & EFI_PAGE_MASK));
-	addr &= ~EFI_PAGE_MASK;
-	if (efi_add_memory_map(addr, pages, EFI_RESERVED_MEMORY_TYPE,
-			       false) != EFI_SUCCESS)
+	if (efi_add_memory_map(addr, size,
+			       EFI_RESERVED_MEMORY_TYPE) != EFI_SUCCESS)
 		printf("Reserved memory mapping failed addr %llx size %llx\n",
 		       addr, size);
 }
@@ -481,10 +478,8 @@ efi_status_t efi_run_image(void *source_buffer, efi_uintn_t source_size)
 	ret = do_bootefi_exec(handle);
 
 out:
-	if (mem_handle)
-		efi_delete_handle(mem_handle);
-	if (file_path)
-		efi_free_pool(file_path);
+	efi_delete_handle(mem_handle);
+	efi_free_pool(file_path);
 	return ret;
 }
 
@@ -600,7 +595,8 @@ static int do_efi_selftest(void)
  * @argv:	command line arguments
  * Return:	status code
  */
-static int do_bootefi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootefi(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	efi_status_t ret;
 	void *fdt;
diff --git a/cmd/booti.c b/cmd/booti.c
index 4fff8cfcf6..ae37975494 100644
--- a/cmd/booti.c
+++ b/cmd/booti.c
@@ -10,6 +10,7 @@
 #include <image.h>
 #include <irq_func.h>
 #include <lmb.h>
+#include <log.h>
 #include <mapmem.h>
 #include <linux/kernel.h>
 #include <linux/sizes.h>
@@ -18,8 +19,8 @@ DECLARE_GLOBAL_DATA_PTR;
 /*
  * Image booting support
  */
-static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[], bootm_headers_t *images)
+static int booti_start(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[], bootm_headers_t *images)
 {
 	int ret;
 	ulong ld;
@@ -98,7 +99,7 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_booti(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
diff --git a/cmd/bootm.c b/cmd/bootm.c
index 931d53f0c7..d5f877cb54 100644
--- a/cmd/bootm.c
+++ b/cmd/bootm.c
@@ -34,12 +34,13 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */
 #endif
 
 #if defined(CONFIG_CMD_IMLS) || defined(CONFIG_CMD_IMLS_NAND)
-static int do_imls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+static int do_imls(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[]);
 #endif
 
 /* we overload the cmd field with our state machine info instead of a
  * function pointer */
-static cmd_tbl_t cmd_bootm_sub[] = {
+static struct cmd_tbl cmd_bootm_sub[] = {
 	U_BOOT_CMD_MKENT(start, 0, 1, (void *)BOOTM_STATE_START, "", ""),
 	U_BOOT_CMD_MKENT(loados, 0, 1, (void *)BOOTM_STATE_LOADOS, "", ""),
 #ifdef CONFIG_SYS_BOOT_RAMDISK_HIGH
@@ -55,12 +56,12 @@ static cmd_tbl_t cmd_bootm_sub[] = {
 	U_BOOT_CMD_MKENT(go, 0, 1, (void *)BOOTM_STATE_OS_GO, "", ""),
 };
 
-static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_bootm_subcommand(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	int ret = 0;
 	long state;
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	c = find_cmd_tbl(argv[0], &cmd_bootm_sub[0], ARRAY_SIZE(cmd_bootm_sub));
 	argc--; argv++;
@@ -89,7 +90,7 @@ static int do_bootm_subcommand(cmd_tbl_t *cmdtp, int flag, int argc,
 /* bootm - boot application image from image in memory */
 /*******************************************************************/
 
-int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 	static int relocated = 0;
@@ -136,7 +137,7 @@ int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		BOOTM_STATE_OS_GO, &images, 1);
 }
 
-int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)
+int bootm_maybe_autostart(struct cmd_tbl *cmdtp, const char *cmd)
 {
 	const char *ep = env_get("autostart");
 
@@ -201,7 +202,7 @@ U_BOOT_CMD(
 /* bootd - boot default image */
 /*******************************************************************/
 #if defined(CONFIG_CMD_BOOTD)
-int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return run_command(env_get("bootcmd"), flag);
 }
@@ -226,7 +227,8 @@ U_BOOT_CMD(
 /* iminfo - print header info for a requested image */
 /*******************************************************************/
 #if defined(CONFIG_CMD_IMI)
-static int do_iminfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_iminfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	int	arg;
 	ulong	addr;
@@ -519,7 +521,8 @@ static int do_imls_nand(void)
 #endif
 
 #if defined(CONFIG_CMD_IMLS) || defined(CONFIG_CMD_IMLS_NAND)
-static int do_imls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_imls(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int ret_nor = 0, ret_nand = 0;
 
diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
index 3dc2c854ac..18efe25751 100644
--- a/cmd/bootmenu.c
+++ b/cmd/bootmenu.c
@@ -1,15 +1,17 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * (C) Copyright 2011-2013 Pali Rohár <pali.rohar@gmail.com>
+ * (C) Copyright 2011-2013 Pali Rohár <pali@kernel.org>
  */
 
 #include <common.h>
 #include <command.h>
 #include <ansi.h>
 #include <env.h>
+#include <log.h>
 #include <menu.h>
 #include <watchdog.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/string.h>
 
 /* maximum bootmenu entries */
@@ -365,6 +367,34 @@ cleanup:
 	return NULL;
 }
 
+static void menu_display_statusline(struct menu *m)
+{
+	struct bootmenu_entry *entry;
+	struct bootmenu_data *menu;
+
+	if (menu_default_choice(m, (void *)&entry) < 0)
+		return;
+
+	menu = entry->menu;
+
+	printf(ANSI_CURSOR_POSITION, 1, 1);
+	puts(ANSI_CLEAR_LINE);
+	printf(ANSI_CURSOR_POSITION, 2, 1);
+	puts("  *** U-Boot Boot Menu ***");
+	puts(ANSI_CLEAR_LINE_TO_END);
+	printf(ANSI_CURSOR_POSITION, 3, 1);
+	puts(ANSI_CLEAR_LINE);
+
+	/* First 3 lines are bootmenu header + 2 empty lines between entries */
+	printf(ANSI_CURSOR_POSITION, menu->count + 5, 1);
+	puts(ANSI_CLEAR_LINE);
+	printf(ANSI_CURSOR_POSITION, menu->count + 6, 1);
+	puts("  Press UP/DOWN to move, ENTER to select");
+	puts(ANSI_CLEAR_LINE_TO_END);
+	printf(ANSI_CURSOR_POSITION, menu->count + 7, 1);
+	puts(ANSI_CLEAR_LINE);
+}
+
 static void bootmenu_show(int delay)
 {
 	int init = 0;
@@ -396,8 +426,9 @@ static void bootmenu_show(int delay)
 	if (!bootmenu)
 		return;
 
-	menu = menu_create(NULL, bootmenu->delay, 1, bootmenu_print_entry,
-			   bootmenu_choice_entry, bootmenu);
+	menu = menu_create(NULL, bootmenu->delay, 1, menu_display_statusline,
+			   bootmenu_print_entry, bootmenu_choice_entry,
+			   bootmenu);
 	if (!menu) {
 		bootmenu_destroy(bootmenu);
 		return;
@@ -445,34 +476,6 @@ cleanup:
 #endif
 }
 
-void menu_display_statusline(struct menu *m)
-{
-	struct bootmenu_entry *entry;
-	struct bootmenu_data *menu;
-
-	if (menu_default_choice(m, (void *)&entry) < 0)
-		return;
-
-	menu = entry->menu;
-
-	printf(ANSI_CURSOR_POSITION, 1, 1);
-	puts(ANSI_CLEAR_LINE);
-	printf(ANSI_CURSOR_POSITION, 2, 1);
-	puts("  *** U-Boot Boot Menu ***");
-	puts(ANSI_CLEAR_LINE_TO_END);
-	printf(ANSI_CURSOR_POSITION, 3, 1);
-	puts(ANSI_CLEAR_LINE);
-
-	/* First 3 lines are bootmenu header + 2 empty lines between entries */
-	printf(ANSI_CURSOR_POSITION, menu->count + 5, 1);
-	puts(ANSI_CLEAR_LINE);
-	printf(ANSI_CURSOR_POSITION, menu->count + 6, 1);
-	puts("  Press UP/DOWN to move, ENTER to select");
-	puts(ANSI_CLEAR_LINE_TO_END);
-	printf(ANSI_CURSOR_POSITION, menu->count + 7, 1);
-	puts(ANSI_CLEAR_LINE);
-}
-
 #ifdef CONFIG_AUTOBOOT_MENU_SHOW
 int menu_show(int bootdelay)
 {
@@ -481,7 +484,7 @@ int menu_show(int bootdelay)
 }
 #endif
 
-int do_bootmenu(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_bootmenu(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *delay_str = NULL;
 	int delay = 10;
diff --git a/cmd/bootstage.c b/cmd/bootstage.c
index ed0b0ff1fc..0e623f216b 100644
--- a/cmd/bootstage.c
+++ b/cmd/bootstage.c
@@ -4,16 +4,18 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <command.h>
 
-static int do_bootstage_report(cmd_tbl_t *cmdtp, int flag, int argc,
-			       char * const argv[])
+static int do_bootstage_report(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	bootstage_report();
 
 	return 0;
 }
 
-static int get_base_size(int argc, char * const argv[], ulong *basep,
+static int get_base_size(int argc, char *const argv[], ulong *basep,
 			 ulong *sizep)
 {
 	char *endp;
@@ -34,8 +36,8 @@ static int get_base_size(int argc, char * const argv[], ulong *basep,
 	return 0;
 }
 
-static int do_bootstage_stash(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_bootstage_stash(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	ulong base, size;
 	int ret;
@@ -57,7 +59,7 @@ static int do_bootstage_stash(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static cmd_tbl_t cmd_bootstage_sub[] = {
+static struct cmd_tbl cmd_bootstage_sub[] = {
 	U_BOOT_CMD_MKENT(report, 2, 1, do_bootstage_report, "", ""),
 	U_BOOT_CMD_MKENT(stash, 4, 0, do_bootstage_stash, "", ""),
 	U_BOOT_CMD_MKENT(unstash, 4, 0, do_bootstage_stash, "", ""),
@@ -66,10 +68,10 @@ static cmd_tbl_t cmd_bootstage_sub[] = {
 /*
  * Process a bootstage sub-command
  */
-static int do_boostage(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_boostage(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	/* Strip off leading 'bootstage' command argument */
 	argc--;
diff --git a/cmd/bootz.c b/cmd/bootz.c
index f14a5fefbf..bc15fd8ec4 100644
--- a/cmd/bootz.c
+++ b/cmd/bootz.c
@@ -10,6 +10,7 @@
 #include <image.h>
 #include <irq_func.h>
 #include <lmb.h>
+#include <log.h>
 #include <linux/compiler.h>
 
 int __weak bootz_setup(ulong image, ulong *start, ulong *end)
@@ -23,8 +24,8 @@ int __weak bootz_setup(ulong image, ulong *start, ulong *end)
 /*
  * zImage booting support
  */
-static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[], bootm_headers_t *images)
+static int bootz_start(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[], bootm_headers_t *images)
 {
 	int ret;
 	ulong zi_start, zi_end;
@@ -59,7 +60,7 @@ static int bootz_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootz(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
diff --git a/cmd/btrfs.c b/cmd/btrfs.c
index faa1239cc8..7e3cbe12ce 100644
--- a/cmd/btrfs.c
+++ b/cmd/btrfs.c
@@ -8,7 +8,7 @@
 #include <btrfs.h>
 #include <fs.h>
 
-int do_btrsubvol(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_btrsubvol(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc != 3)
 		return CMD_RET_USAGE;
diff --git a/cmd/cache.c b/cmd/cache.c
index 27dcec0931..b68d45b98b 100644
--- a/cmd/cache.c
+++ b/cmd/cache.c
@@ -20,7 +20,12 @@ void __weak invalidate_icache_all(void)
 	puts("No arch specific invalidate_icache_all available!\n");
 }
 
-static int do_icache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+__weak void noncached_set_region(void)
+{
+}
+
+static int do_icache(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	switch (argc) {
 	case 2:			/* on / off / flush */
@@ -54,7 +59,8 @@ void __weak flush_dcache_all(void)
 	/* please define arch specific flush_dcache_all */
 }
 
-static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dcache(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	switch (argc) {
 	case 2:			/* on / off / flush */
@@ -64,6 +70,7 @@ static int do_dcache(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 			break;
 		case 1:
 			dcache_enable();
+			noncached_set_region();
 			break;
 		case 2:
 			flush_dcache_all();
diff --git a/cmd/cbfs.c b/cmd/cbfs.c
index 98e652a4e7..10c2c929c3 100644
--- a/cmd/cbfs.c
+++ b/cmd/cbfs.c
@@ -11,7 +11,7 @@
 #include <env.h>
 #include <cbfs.h>
 
-static int do_cbfs_init(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cbfs_init(struct cmd_tbl *cmdtp, int flag, int argc,
 			char *const argv[])
 {
 	uintptr_t end_of_rom = 0xffffffff;
@@ -28,8 +28,7 @@ static int do_cbfs_init(cmd_tbl_t *cmdtp, int flag, int argc,
 			return 1;
 		}
 	}
-	file_cbfs_init(end_of_rom);
-	if (cbfs_get_result() != CBFS_SUCCESS) {
+	if (file_cbfs_init(end_of_rom)) {
 		printf("%s.\n", file_cbfs_error());
 		return 1;
 	}
@@ -45,7 +44,7 @@ U_BOOT_CMD(
 	"      CBFS is in. It defaults to 0xFFFFFFFF\n"
 );
 
-static int do_cbfs_fsload(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cbfs_fsload(struct cmd_tbl *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
 	const struct cbfs_cachenode *file;
@@ -92,7 +91,7 @@ U_BOOT_CMD(
 	"    - load binary file 'filename' from the cbfs to address 'addr'\n"
 );
 
-static int do_cbfs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cbfs_ls(struct cmd_tbl *cmdtp, int flag, int argc,
 		      char *const argv[])
 {
 	const struct cbfs_cachenode *file = file_cbfs_get_first();
@@ -201,7 +200,7 @@ U_BOOT_CMD(
 	"    - list the files in the cbfs\n"
 );
 
-static int do_cbfs_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cbfs_fsinfo(struct cmd_tbl *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
 	const struct cbfs_header *header = file_cbfs_get_header();
diff --git a/cmd/clk.c b/cmd/clk.c
index 74ad868500..439736d072 100644
--- a/cmd/clk.c
+++ b/cmd/clk.c
@@ -72,7 +72,7 @@ int __weak soc_clk_dump(void)
 }
 #endif
 
-static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_clk_dump(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	int ret;
@@ -86,14 +86,14 @@ static int do_clk_dump(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-static cmd_tbl_t cmd_clk_sub[] = {
+static struct cmd_tbl cmd_clk_sub[] = {
 	U_BOOT_CMD_MKENT(dump, 1, 1, do_clk_dump, "", ""),
 };
 
-static int do_clk(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_clk(struct cmd_tbl *cmdtp, int flag, int argc,
 		  char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/cls.c b/cmd/cls.c
index f1ce6e8df1..eab4e6993b 100644
--- a/cmd/cls.c
+++ b/cmd/cls.c
@@ -11,7 +11,7 @@
 #include <lcd.h>
 #include <video.h>
 
-static int do_video_clear(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_video_clear(struct cmd_tbl *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
 #if defined(CONFIG_DM_VIDEO)
diff --git a/cmd/config.c b/cmd/config.c
index d2810d573b..cf30841a35 100644
--- a/cmd/config.c
+++ b/cmd/config.c
@@ -11,7 +11,8 @@
 #include "config_data_gz.h"
 #include "config_data_size.h"
 
-static int do_config(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_config(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	char *dst;
 	unsigned long len = data_size;
diff --git a/cmd/conitrace.c b/cmd/conitrace.c
index 85c5422b7e..88850db541 100644
--- a/cmd/conitrace.c
+++ b/cmd/conitrace.c
@@ -7,9 +7,10 @@
  */
 #include <common.h>
 #include <command.h>
+#include <linux/delay.h>
 
-static int do_conitrace(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_conitrace(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	bool first = true;
 
diff --git a/cmd/console.c b/cmd/console.c
index 3f1d98b17b..9a1db83c7c 100644
--- a/cmd/console.c
+++ b/cmd/console.c
@@ -12,7 +12,8 @@
 #include <stdio_dev.h>
 
 extern void _do_coninfo (void);
-static int do_coninfo(cmd_tbl_t *cmd, int flag, int argc, char * const argv[])
+static int do_coninfo(struct cmd_tbl *cmd, int flag, int argc,
+		      char *const argv[])
 {
 	int l;
 	struct list_head *list = stdio_get_list();
diff --git a/cmd/cpu.c b/cmd/cpu.c
index 8c0abc1756..ff553c16c4 100644
--- a/cmd/cpu.c
+++ b/cmd/cpu.c
@@ -64,7 +64,7 @@ static int print_cpu_list(bool detail)
 	return 0;
 }
 
-static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cpu_list(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	if (print_cpu_list(false))
@@ -73,7 +73,7 @@ static int do_cpu_list(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_cpu_detail(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_cpu_detail(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	if (print_cpu_list(true))
@@ -82,7 +82,7 @@ static int do_cpu_detail(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static cmd_tbl_t cmd_cpu_sub[] = {
+static struct cmd_tbl cmd_cpu_sub[] = {
 	U_BOOT_CMD_MKENT(list, 2, 1, do_cpu_list, "", ""),
 	U_BOOT_CMD_MKENT(detail, 4, 0, do_cpu_detail, "", ""),
 };
@@ -90,10 +90,10 @@ static cmd_tbl_t cmd_cpu_sub[] = {
 /*
  * Process a cpu sub-command
  */
-static int do_cpu(cmd_tbl_t *cmdtp, int flag, int argc,
-		  char * const argv[])
+static int do_cpu(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
-	cmd_tbl_t *c = NULL;
+	struct cmd_tbl *c = NULL;
 
 	/* Strip off leading 'cpu' command argument */
 	argc--;
diff --git a/cmd/cramfs.c b/cmd/cramfs.c
index ad232deae0..1aeb56702c 100644
--- a/cmd/cramfs.c
+++ b/cmd/cramfs.c
@@ -94,7 +94,8 @@ extern int cramfs_info (struct part_info *info);
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cramfs_load(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	char *filename;
 	int size;
@@ -162,7 +163,7 @@ int do_cramfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-int do_cramfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cramfs_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename = "/";
 	int ret;
diff --git a/cmd/cros_ec.c b/cmd/cros_ec.c
index 9e2f1b06f3..ce1f59a740 100644
--- a/cmd/cros_ec.c
+++ b/cmd/cros_ec.c
@@ -10,6 +10,8 @@
 #include <command.h>
 #include <cros_ec.h>
 #include <dm.h>
+#include <flash.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 
@@ -23,7 +25,7 @@ static const char * const ec_current_image_name[] = {"unknown", "RO", "RW"};
  * @param argv List of remaining parameters
  * @return flash region (EC_FLASH_REGION_...) or -1 on error
  */
-static int cros_ec_decode_region(int argc, char * const argv[])
+static int cros_ec_decode_region(int argc, char *const argv[])
 {
 	if (argc > 0) {
 		if (0 == strcmp(*argv, "rw"))
@@ -50,7 +52,7 @@ static int cros_ec_decode_region(int argc, char * const argv[])
  *	(negative EC_RES_...)
  */
 static int do_read_write(struct udevice *dev, int is_write, int argc,
-			 char * const argv[])
+			 char *const argv[])
 {
 	uint32_t offset, size = -1U, region_size;
 	unsigned long addr;
@@ -92,7 +94,8 @@ static int do_read_write(struct udevice *dev, int is_write, int argc,
 	return 0;
 }
 
-static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_cros_ec(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct udevice *dev;
 	const char *cmd;
diff --git a/cmd/dataflash_mmc_mux.c b/cmd/dataflash_mmc_mux.c
index 9f271b6f61..73876e9464 100644
--- a/cmd/dataflash_mmc_mux.c
+++ b/cmd/dataflash_mmc_mux.c
@@ -9,7 +9,8 @@
 
 static int mmc_nspi (const char *);
 
-int do_dataflash_mmc_mux (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_dataflash_mmc_mux(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	switch (argc) {
 	case 2:			/* on / off	*/
diff --git a/cmd/date.c b/cmd/date.c
index 7fa950a902..75a032cd27 100644
--- a/cmd/date.c
+++ b/cmd/date.c
@@ -29,7 +29,8 @@ int mk_date (const char *, struct rtc_time *);
 
 static struct rtc_time default_tm = { 0, 0, 0, 1, 1, 2000, 6, 0, 0 };
 
-static int do_date(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_date(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct rtc_time tm;
 	int rcode = 0;
diff --git a/cmd/demo.c b/cmd/demo.c
index 52c6e7ec15..9da06f5e4d 100644
--- a/cmd/demo.c
+++ b/cmd/demo.c
@@ -7,14 +7,15 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm-demo.h>
 #include <mapmem.h>
 #include <asm/io.h>
 
 struct udevice *demo_dev;
 
-static int do_demo_hello(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_demo_hello(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int ch = 0;
 
@@ -24,8 +25,8 @@ static int do_demo_hello(cmd_tbl_t *cmdtp, int flag, int argc,
 	return demo_hello(demo_dev, ch);
 }
 
-static int do_demo_status(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_demo_status(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int status;
 	int ret;
@@ -39,8 +40,8 @@ static int do_demo_status(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_demo_light(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_demo_light(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int light;
 	int ret;
@@ -59,7 +60,7 @@ static int do_demo_light(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-int do_demo_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_demo_list(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *dev;
 	int i, ret;
@@ -78,16 +79,17 @@ int do_demo_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return cmd_process_error(cmdtp, ret);
 }
 
-static cmd_tbl_t demo_commands[] = {
+static struct cmd_tbl demo_commands[] = {
 	U_BOOT_CMD_MKENT(list, 0, 1, do_demo_list, "", ""),
 	U_BOOT_CMD_MKENT(hello, 2, 1, do_demo_hello, "", ""),
 	U_BOOT_CMD_MKENT(light, 2, 1, do_demo_light, "", ""),
 	U_BOOT_CMD_MKENT(status, 1, 1, do_demo_status, "", ""),
 };
 
-static int do_demo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_demo(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
-	cmd_tbl_t *demo_cmd;
+	struct cmd_tbl *demo_cmd;
 	int devnum = 0;
 	int ret;
 
diff --git a/cmd/dfu.c b/cmd/dfu.c
index b30f8a5667..7310595a02 100644
--- a/cmd/dfu.c
+++ b/cmd/dfu.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <watchdog.h>
 #include <dfu.h>
 #include <console.h>
@@ -18,7 +19,7 @@
 #include <usb.h>
 #include <net.h>
 
-static int do_dfu(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dfu(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 
 	if (argc < 2)
diff --git a/cmd/diag.c b/cmd/diag.c
index 8d21c7dde8..f51536dbfa 100644
--- a/cmd/diag.c
+++ b/cmd/diag.c
@@ -11,7 +11,7 @@
 #include <command.h>
 #include <post.h>
 
-int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_diag(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned int i;
 
diff --git a/cmd/disk.c b/cmd/disk.c
index 15973b7d13..8060e753eb 100644
--- a/cmd/disk.c
+++ b/cmd/disk.c
@@ -4,19 +4,21 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  */
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <image.h>
+#include <log.h>
 #include <part.h>
 
-int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc,
+int common_diskboot(struct cmd_tbl *cmdtp, const char *intf, int argc,
 		    char *const argv[])
 {
 	__maybe_unused int dev;
 	int part;
 	ulong addr = CONFIG_SYS_LOAD_ADDR;
 	ulong cnt;
-	disk_partition_t info;
+	struct disk_partition info;
 #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
 	image_header_t *hdr;
 #endif
diff --git a/cmd/dm.c b/cmd/dm.c
index 7a90685f8b..4e307ac524 100644
--- a/cmd/dm.c
+++ b/cmd/dm.c
@@ -16,39 +16,39 @@
 #include <dm/root.h>
 #include <dm/util.h>
 
-static int do_dm_dump_all(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_dm_dump_all(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	dm_dump_all();
 
 	return 0;
 }
 
-static int do_dm_dump_uclass(cmd_tbl_t *cmdtp, int flag, int argc,
-			     char * const argv[])
+static int do_dm_dump_uclass(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	dm_dump_uclass();
 
 	return 0;
 }
 
-static int do_dm_dump_devres(cmd_tbl_t *cmdtp, int flag, int argc,
-			     char * const argv[])
+static int do_dm_dump_devres(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	dm_dump_devres();
 
 	return 0;
 }
 
-static int do_dm_dump_drivers(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_dm_dump_drivers(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	dm_dump_drivers();
 
 	return 0;
 }
 
-static cmd_tbl_t test_commands[] = {
+static struct cmd_tbl test_commands[] = {
 	U_BOOT_CMD_MKENT(tree, 0, 1, do_dm_dump_all, "", ""),
 	U_BOOT_CMD_MKENT(uclass, 1, 1, do_dm_dump_uclass, "", ""),
 	U_BOOT_CMD_MKENT(devres, 1, 1, do_dm_dump_devres, "", ""),
@@ -65,9 +65,9 @@ static __maybe_unused void dm_reloc(void)
 	}
 }
 
-static int do_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *test_cmd;
+	struct cmd_tbl *test_cmd;
 	int ret;
 
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
diff --git a/cmd/echo.c b/cmd/echo.c
index 5b018d9349..d02a4cfd58 100644
--- a/cmd/echo.c
+++ b/cmd/echo.c
@@ -7,7 +7,8 @@
 #include <common.h>
 #include <command.h>
 
-static int do_echo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_echo(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int i;
 	int putnl = 1;
diff --git a/cmd/eeprom.c b/cmd/eeprom.c
index 792415ef93..7fa62bba8f 100644
--- a/cmd/eeprom.c
+++ b/cmd/eeprom.c
@@ -25,6 +25,7 @@
 #include <eeprom.h>
 #include <i2c.h>
 #include <eeprom_layout.h>
+#include <linux/delay.h>
 
 #ifndef	CONFIG_SYS_I2C_SPEED
 #define	CONFIG_SYS_I2C_SPEED	50000
@@ -237,7 +238,7 @@ static int parse_numeric_param(char *str)
  * @returns:	number of arguments parsed or CMD_RET_USAGE if error
  */
 static int parse_i2c_bus_addr(int *i2c_bus, ulong *i2c_addr, int argc,
-			      char * const argv[], int argc_no_bus_addr)
+			      char *const argv[], int argc_no_bus_addr)
 {
 	int argc_no_bus = argc_no_bus_addr + 1;
 	int argc_bus_addr = argc_no_bus_addr + 2;
@@ -355,7 +356,7 @@ static int eeprom_execute_command(enum eeprom_action action, int i2c_bus,
 }
 
 #define NEXT_PARAM(argc, index)	{ (argc)--; (index)++; }
-int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_eeprom(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int layout_ver = LAYOUT_VERSION_AUTODETECT;
 	enum eeprom_action action = EEPROM_ACTION_INVALID;
diff --git a/cmd/efi.c b/cmd/efi.c
index ea239a01f0..b3a3bf8282 100644
--- a/cmd/efi.c
+++ b/cmd/efi.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <efi.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <sort.h>
 
@@ -43,6 +44,7 @@ static struct attr_info {
 	{ EFI_MEMORY_NV, "non-volatile" },
 	{ EFI_MEMORY_MORE_RELIABLE, "higher reliability" },
 	{ EFI_MEMORY_RO, "read-only" },
+	{ EFI_MEMORY_SP, "specific purpose" },
 	{ EFI_MEMORY_RUNTIME, "needs runtime mapping" }
 };
 
@@ -191,7 +193,8 @@ static void efi_print_mem_table(struct efi_entry_memmap *map,
 		printf("*Some areas are merged (use 'all' to see)\n");
 }
 
-static int do_efi_mem(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_efi_mem(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct efi_mem_desc *desc;
 	struct efi_entry_memmap *map;
@@ -231,13 +234,13 @@ done:
 	return ret ? CMD_RET_FAILURE : 0;
 }
 
-static cmd_tbl_t efi_commands[] = {
+static struct cmd_tbl efi_commands[] = {
 	U_BOOT_CMD_MKENT(mem, 1, 1, do_efi_mem, "", ""),
 };
 
-static int do_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_efi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *efi_cmd;
+	struct cmd_tbl *efi_cmd;
 	int ret;
 
 	if (argc < 2)
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 02ef019694..58018f700c 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -11,13 +11,13 @@
 #include <efi_loader.h>
 #include <exports.h>
 #include <hexdump.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <search.h>
 #include <linux/ctype.h>
 
 #define BS systab.boottime
-#define RT systab.runtime
 
 /**
  * efi_get_device_handle_info() - get information of UEFI device
@@ -61,15 +61,15 @@ static const char sep[] = "================";
  * Implement efidebug "devices" sub-command.
  * Show all UEFI devices and their information.
  */
-static int do_efi_show_devices(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+static int do_efi_show_devices(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	efi_handle_t *handles;
 	efi_uintn_t num, i;
 	u16 *dev_path_text;
 	efi_status_t ret;
 
-	ret = EFI_CALL(BS->locate_handle_buffer(ALL_HANDLES, NULL, NULL,
+	ret = EFI_CALL(efi_locate_handle_buffer(ALL_HANDLES, NULL, NULL,
 						&num, &handles));
 	if (ret != EFI_SUCCESS)
 		return CMD_RET_FAILURE;
@@ -86,7 +86,7 @@ static int do_efi_show_devices(cmd_tbl_t *cmdtp, int flag,
 		}
 	}
 
-	EFI_CALL(BS->free_pool(handles));
+	efi_free_pool(handles);
 
 	return CMD_RET_SUCCESS;
 }
@@ -140,15 +140,15 @@ static int efi_get_driver_handle_info(efi_handle_t handle, u16 **driver_name,
  * Implement efidebug "drivers" sub-command.
  * Show all UEFI drivers and their information.
  */
-static int do_efi_show_drivers(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+static int do_efi_show_drivers(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	efi_handle_t *handles;
 	efi_uintn_t num, i;
 	u16 *driver_name, *image_path_text;
 	efi_status_t ret;
 
-	ret = EFI_CALL(BS->locate_handle_buffer(
+	ret = EFI_CALL(efi_locate_handle_buffer(
 				BY_PROTOCOL, &efi_guid_driver_binding_protocol,
 				NULL, &num, &handles));
 	if (ret != EFI_SUCCESS)
@@ -170,12 +170,12 @@ static int do_efi_show_drivers(cmd_tbl_t *cmdtp, int flag,
 			else
 				printf("%p %-20ls <built-in>\n",
 				       handles[i], driver_name);
-			EFI_CALL(BS->free_pool(driver_name));
-			EFI_CALL(BS->free_pool(image_path_text));
+			efi_free_pool(driver_name);
+			efi_free_pool(image_path_text);
 		}
 	}
 
-	EFI_CALL(BS->free_pool(handles));
+	efi_free_pool(handles);
 
 	return CMD_RET_SUCCESS;
 }
@@ -312,8 +312,8 @@ static const char *get_guid_text(const void *guid)
  * Show all UEFI handles and their information, currently all protocols
  * added to handle.
  */
-static int do_efi_show_handles(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+static int do_efi_show_handles(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	efi_handle_t *handles;
 	efi_guid_t **guid;
@@ -321,7 +321,7 @@ static int do_efi_show_handles(cmd_tbl_t *cmdtp, int flag,
 	const char *guid_text;
 	efi_status_t ret;
 
-	ret = EFI_CALL(BS->locate_handle_buffer(ALL_HANDLES, NULL, NULL,
+	ret = EFI_CALL(efi_locate_handle_buffer(ALL_HANDLES, NULL, NULL,
 						&num, &handles));
 	if (ret != EFI_SUCCESS)
 		return CMD_RET_FAILURE;
@@ -355,7 +355,7 @@ static int do_efi_show_handles(cmd_tbl_t *cmdtp, int flag,
 		putc('\n');
 	}
 
-	EFI_CALL(BS->free_pool(handles));
+	efi_free_pool(handles);
 
 	return CMD_RET_SUCCESS;
 }
@@ -372,8 +372,8 @@ static int do_efi_show_handles(cmd_tbl_t *cmdtp, int flag,
  * Implement efidebug "images" sub-command.
  * Show all UEFI loaded images and their information.
  */
-static int do_efi_show_images(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+static int do_efi_show_images(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	efi_print_image_infos(NULL);
 
@@ -395,6 +395,7 @@ static const char * const efi_mem_type_string[] = {
 	[EFI_MMAP_IO] = "IO",
 	[EFI_MMAP_IO_PORT] = "IO PORT",
 	[EFI_PAL_CODE] = "PAL",
+	[EFI_PERSISTENT_MEMORY_TYPE] = "PERSISTENT",
 };
 
 static const struct efi_mem_attrs {
@@ -413,6 +414,7 @@ static const struct efi_mem_attrs {
 	{EFI_MEMORY_NV, "NV"},
 	{EFI_MEMORY_MORE_RELIABLE, "REL"},
 	{EFI_MEMORY_RO, "RO"},
+	{EFI_MEMORY_SP, "SP"},
 	{EFI_MEMORY_RUNTIME, "RT"},
 };
 
@@ -453,8 +455,8 @@ static void print_memory_attributes(u64 attributes)
  * Implement efidebug "memmap" sub-command.
  * Show UEFI memory map.
  */
-static int do_efi_show_memmap(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+static int do_efi_show_memmap(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	struct efi_mem_desc *memmap = NULL, *map;
 	efi_uintn_t map_size = 0;
@@ -462,18 +464,17 @@ static int do_efi_show_memmap(cmd_tbl_t *cmdtp, int flag,
 	int i;
 	efi_status_t ret;
 
-	ret = EFI_CALL(BS->get_memory_map(&map_size, memmap, NULL, NULL, NULL));
+	ret = efi_get_memory_map(&map_size, memmap, NULL, NULL, NULL);
 	if (ret == EFI_BUFFER_TOO_SMALL) {
 		map_size += sizeof(struct efi_mem_desc); /* for my own */
-		ret = EFI_CALL(BS->allocate_pool(EFI_LOADER_DATA,
-						 map_size, (void *)&memmap));
+		ret = efi_allocate_pool(EFI_LOADER_DATA, map_size,
+					(void *)&memmap);
 		if (ret != EFI_SUCCESS)
 			return CMD_RET_FAILURE;
-		ret = EFI_CALL(BS->get_memory_map(&map_size, memmap,
-						  NULL, NULL, NULL));
+		ret = efi_get_memory_map(&map_size, memmap, NULL, NULL, NULL);
 	}
 	if (ret != EFI_SUCCESS) {
-		EFI_CALL(BS->free_pool(memmap));
+		efi_free_pool(memmap);
 		return CMD_RET_FAILURE;
 	}
 
@@ -481,8 +482,13 @@ static int do_efi_show_memmap(cmd_tbl_t *cmdtp, int flag,
 	       EFI_PHYS_ADDR_WIDTH - 5, spc, EFI_PHYS_ADDR_WIDTH - 3, spc);
 	printf("================ %.*s %.*s ==========\n",
 	       EFI_PHYS_ADDR_WIDTH, sep, EFI_PHYS_ADDR_WIDTH, sep);
+	/*
+	 * Coverity check: dereferencing null pointer "map."
+	 * This is a false positive as memmap will always be
+	 * populated by allocate_pool() above.
+	 */
 	for (i = 0, map = memmap; i < map_size / sizeof(*map); map++, i++) {
-		if (map->type < EFI_MAX_MEMORY_TYPE)
+		if (map->type < ARRAY_SIZE(efi_mem_type_string))
 			type = efi_mem_type_string[map->type];
 		else
 			type = "(unknown)";
@@ -500,7 +506,7 @@ static int do_efi_show_memmap(cmd_tbl_t *cmdtp, int flag,
 		putc('\n');
 	}
 
-	EFI_CALL(BS->free_pool(memmap));
+	efi_free_pool(memmap);
 
 	return CMD_RET_SUCCESS;
 }
@@ -517,8 +523,8 @@ static int do_efi_show_memmap(cmd_tbl_t *cmdtp, int flag,
  * Implement efidebug "tables" sub-command.
  * Show UEFI configuration tables.
  */
-static int do_efi_show_tables(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+static int do_efi_show_tables(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	efi_uintn_t i;
 	const char *guid_str;
@@ -547,8 +553,8 @@ static int do_efi_show_tables(cmd_tbl_t *cmdtp, int flag,
  *
  *     efidebug boot add <id> <label> <interface> <devnum>[:<part>] <file> <options>
  */
-static int do_efi_boot_add(cmd_tbl_t *cmdtp, int flag,
-			   int argc, char * const argv[])
+static int do_efi_boot_add(struct cmd_tbl *cmdtp, int flag,
+			   int argc, char *const argv[])
 {
 	int id;
 	char *endp;
@@ -603,7 +609,7 @@ static int do_efi_boot_add(cmd_tbl_t *cmdtp, int flag,
 				+ sizeof(struct efi_device_path); /* for END */
 
 	/* optional data */
-	if (argc < 6)
+	if (argc == 6)
 		lo.optional_data = NULL;
 	else
 		lo.optional_data = (const u8 *)argv[6];
@@ -614,7 +620,7 @@ static int do_efi_boot_add(cmd_tbl_t *cmdtp, int flag,
 		goto out;
 	}
 
-	ret = EFI_CALL(RT->set_variable(var_name16, &guid,
+	ret = EFI_CALL(efi_set_variable(var_name16, &guid,
 					EFI_VARIABLE_NON_VOLATILE |
 					EFI_VARIABLE_BOOTSERVICE_ACCESS |
 					EFI_VARIABLE_RUNTIME_ACCESS,
@@ -646,8 +652,8 @@ out:
  *
  *     efidebug boot rm <id> ...
  */
-static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char * const argv[])
+static int do_efi_boot_rm(struct cmd_tbl *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
 	efi_guid_t guid;
 	int id, i;
@@ -669,7 +675,7 @@ static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
 		p = var_name16;
 		utf8_utf16_strncpy(&p, var_name, 9);
 
-		ret = EFI_CALL(RT->set_variable(var_name16, &guid, 0, 0, NULL));
+		ret = EFI_CALL(efi_set_variable(var_name16, &guid, 0, 0, NULL));
 		if (ret) {
 			printf("Cannot remove %ls\n", var_name16);
 			return CMD_RET_FAILURE;
@@ -682,20 +688,25 @@ static int do_efi_boot_rm(cmd_tbl_t *cmdtp, int flag,
 /**
  * show_efi_boot_opt_data() - dump UEFI load option
  *
- * @id:		load option number
+ * @varname16:	variable name
  * @data:	value of UEFI load option variable
  * @size:	size of the boot option
  *
  * Decode the value of UEFI load option variable and print information.
  */
-static void show_efi_boot_opt_data(int id, void *data, size_t size)
+static void show_efi_boot_opt_data(u16 *varname16, void *data, size_t *size)
 {
 	struct efi_load_option lo;
 	char *label, *p;
 	size_t label_len16, label_len;
 	u16 *dp_str;
+	efi_status_t ret;
 
-	efi_deserialize_load_option(&lo, data);
+	ret = efi_deserialize_load_option(&lo, data, size);
+	if (ret != EFI_SUCCESS) {
+		printf("%ls: invalid load option\n", varname16);
+		return;
+	}
 
 	label_len16 = u16_strlen(lo.label);
 	label_len = utf16_utf8_strnlen(lo.label, label_len16);
@@ -705,8 +716,8 @@ static void show_efi_boot_opt_data(int id, void *data, size_t size)
 	p = label;
 	utf16_utf8_strncpy(&p, lo.label, label_len16);
 
-	printf("Boot%04X:\n", id);
-	printf("  attributes: %c%c%c (0x%08x)\n",
+	printf("%ls:\nattributes: %c%c%c (0x%08x)\n",
+	       varname16,
 	       /* ACTIVE */
 	       lo.attributes & LOAD_OPTION_ACTIVE ? 'A' : '-',
 	       /* FORCE RECONNECT */
@@ -722,45 +733,39 @@ static void show_efi_boot_opt_data(int id, void *data, size_t size)
 
 	printf("  data:\n");
 	print_hex_dump("    ", DUMP_PREFIX_OFFSET, 16, 1,
-		       lo.optional_data, size + (u8 *)data -
-		       (u8 *)lo.optional_data, true);
+		       lo.optional_data, *size, true);
 	free(label);
 }
 
 /**
  * show_efi_boot_opt() - dump UEFI load option
  *
- * @id:		Load option number
+ * @varname16:	variable name
  *
  * Dump information defined by UEFI load option.
  */
-static void show_efi_boot_opt(int id)
+static void show_efi_boot_opt(u16 *varname16)
 {
-	char var_name[9];
-	u16 var_name16[9], *p;
-	efi_guid_t guid;
-	void *data = NULL;
+	void *data;
 	efi_uintn_t size;
 	efi_status_t ret;
 
-	sprintf(var_name, "Boot%04X", id);
-	p = var_name16;
-	utf8_utf16_strncpy(&p, var_name, 9);
-	guid = efi_global_variable_guid;
-
 	size = 0;
-	ret = EFI_CALL(RT->get_variable(var_name16, &guid, NULL, &size, NULL));
+	ret = EFI_CALL(efi_get_variable(varname16, &efi_global_variable_guid,
+					NULL, &size, NULL));
 	if (ret == EFI_BUFFER_TOO_SMALL) {
 		data = malloc(size);
-		ret = EFI_CALL(RT->get_variable(var_name16, &guid, NULL, &size,
-						data));
+		if (!data) {
+			printf("ERROR: Out of memory\n");
+			return;
+		}
+		ret = EFI_CALL(efi_get_variable(varname16,
+						&efi_global_variable_guid,
+						NULL, &size, data));
+		if (ret == EFI_SUCCESS)
+			show_efi_boot_opt_data(varname16, data, &size);
+		free(data);
 	}
-	if (ret == EFI_SUCCESS)
-		show_efi_boot_opt_data(id, data, size);
-	else if (ret == EFI_NOT_FOUND)
-		printf("Boot%04X: not found\n", id);
-
-	free(data);
 }
 
 static int u16_tohex(u16 c)
@@ -788,8 +793,8 @@ static int u16_tohex(u16 c)
  *
  *     efidebug boot dump
  */
-static int do_efi_boot_dump(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
+static int do_efi_boot_dump(struct cmd_tbl *cmdtp, int flag,
+			    int argc, char *const argv[])
 {
 	u16 *var_name16, *p;
 	efi_uintn_t buf_size, size;
@@ -839,7 +844,7 @@ static int do_efi_boot_dump(cmd_tbl_t *cmdtp, int flag,
 			id = (id << 4) + digit;
 		}
 		if (i == 4 && !var_name16[8])
-			show_efi_boot_opt(id);
+			show_efi_boot_opt(var_name16);
 	}
 
 	free(var_name16);
@@ -856,8 +861,7 @@ static int do_efi_boot_dump(cmd_tbl_t *cmdtp, int flag,
  */
 static int show_efi_boot_order(void)
 {
-	efi_guid_t guid;
-	u16 *bootorder = NULL;
+	u16 *bootorder;
 	efi_uintn_t size;
 	int num, i;
 	char var_name[9];
@@ -868,20 +872,25 @@ static int show_efi_boot_order(void)
 	size_t label_len16, label_len;
 	efi_status_t ret;
 
-	guid = efi_global_variable_guid;
 	size = 0;
-	ret = EFI_CALL(RT->get_variable(L"BootOrder", &guid, NULL, &size,
-					NULL));
-	if (ret == EFI_BUFFER_TOO_SMALL) {
-		bootorder = malloc(size);
-		ret = EFI_CALL(RT->get_variable(L"BootOrder", &guid, NULL,
-						&size, bootorder));
+	ret = EFI_CALL(efi_get_variable(L"BootOrder", &efi_global_variable_guid,
+					NULL, &size, NULL));
+	if (ret != EFI_BUFFER_TOO_SMALL) {
+		if (ret == EFI_NOT_FOUND) {
+			printf("BootOrder not defined\n");
+			return CMD_RET_SUCCESS;
+		} else {
+			return CMD_RET_FAILURE;
+		}
 	}
-	if (ret == EFI_NOT_FOUND) {
-		printf("BootOrder not defined\n");
-		ret = CMD_RET_SUCCESS;
-		goto out;
-	} else if (ret != EFI_SUCCESS) {
+	bootorder = malloc(size);
+	if (!bootorder) {
+		printf("ERROR: Out of memory\n");
+		return CMD_RET_FAILURE;
+	}
+	ret = EFI_CALL(efi_get_variable(L"BootOrder", &efi_global_variable_guid,
+					NULL, &size, bootorder));
+	if (ret != EFI_SUCCESS) {
 		ret = CMD_RET_FAILURE;
 		goto out;
 	}
@@ -893,11 +902,11 @@ static int show_efi_boot_order(void)
 		utf8_utf16_strncpy(&p16, var_name, 9);
 
 		size = 0;
-		ret = EFI_CALL(RT->get_variable(var_name16, &guid, NULL, &size,
-						NULL));
+		ret = EFI_CALL(efi_get_variable(var_name16,
+						&efi_global_variable_guid, NULL,
+						&size, NULL));
 		if (ret != EFI_BUFFER_TOO_SMALL) {
-			printf("%2d: Boot%04X: (not defined)\n",
-			       i + 1, bootorder[i]);
+			printf("%2d: %s: (not defined)\n", i + 1, var_name);
 			continue;
 		}
 
@@ -906,15 +915,21 @@ static int show_efi_boot_order(void)
 			ret = CMD_RET_FAILURE;
 			goto out;
 		}
-		ret = EFI_CALL(RT->get_variable(var_name16, &guid, NULL, &size,
-						data));
+		ret = EFI_CALL(efi_get_variable(var_name16,
+						&efi_global_variable_guid, NULL,
+						&size, data));
 		if (ret != EFI_SUCCESS) {
 			free(data);
 			ret = CMD_RET_FAILURE;
 			goto out;
 		}
 
-		efi_deserialize_load_option(&lo, data);
+		ret = efi_deserialize_load_option(&lo, data, &size);
+		if (ret != EFI_SUCCESS) {
+			printf("%ls: invalid load option\n", var_name16);
+			ret = CMD_RET_FAILURE;
+			goto out;
+		}
 
 		label_len16 = u16_strlen(lo.label);
 		label_len = utf16_utf8_strnlen(lo.label, label_len16);
@@ -926,7 +941,7 @@ static int show_efi_boot_order(void)
 		}
 		p = label;
 		utf16_utf8_strncpy(&p, lo.label, label_len16);
-		printf("%2d: Boot%04X: %s\n", i + 1, bootorder[i], label);
+		printf("%2d: %s: %s\n", i + 1, var_name, label);
 		free(label);
 
 		free(data);
@@ -952,8 +967,8 @@ out:
  *
  *     efidebug boot next <id>
  */
-static int do_efi_boot_next(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
+static int do_efi_boot_next(struct cmd_tbl *cmdtp, int flag,
+			    int argc, char *const argv[])
 {
 	u16 bootnext;
 	efi_uintn_t size;
@@ -966,7 +981,7 @@ static int do_efi_boot_next(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_USAGE;
 
 	bootnext = (u16)simple_strtoul(argv[1], &endp, 16);
-	if (*endp != '\0' || bootnext > 0xffff) {
+	if (*endp) {
 		printf("invalid value: %s\n", argv[1]);
 		r = CMD_RET_FAILURE;
 		goto out;
@@ -974,7 +989,7 @@ static int do_efi_boot_next(cmd_tbl_t *cmdtp, int flag,
 
 	guid = efi_global_variable_guid;
 	size = sizeof(u16);
-	ret = EFI_CALL(RT->set_variable(L"BootNext", &guid,
+	ret = EFI_CALL(efi_set_variable(L"BootNext", &guid,
 					EFI_VARIABLE_NON_VOLATILE |
 					EFI_VARIABLE_BOOTSERVICE_ACCESS |
 					EFI_VARIABLE_RUNTIME_ACCESS,
@@ -1001,8 +1016,8 @@ out:
  *
  *     efidebug boot order [<id> ...]
  */
-static int do_efi_boot_order(cmd_tbl_t *cmdtp, int flag,
-			     int argc, char * const argv[])
+static int do_efi_boot_order(struct cmd_tbl *cmdtp, int flag,
+			     int argc, char *const argv[])
 {
 	u16 *bootorder = NULL;
 	efi_uintn_t size;
@@ -1035,7 +1050,7 @@ static int do_efi_boot_order(cmd_tbl_t *cmdtp, int flag,
 	}
 
 	guid = efi_global_variable_guid;
-	ret = EFI_CALL(RT->set_variable(L"BootOrder", &guid,
+	ret = EFI_CALL(efi_set_variable(L"BootOrder", &guid,
 					EFI_VARIABLE_NON_VOLATILE |
 					EFI_VARIABLE_BOOTSERVICE_ACCESS |
 					EFI_VARIABLE_RUNTIME_ACCESS,
@@ -1050,7 +1065,7 @@ out:
 	return r;
 }
 
-static cmd_tbl_t cmd_efidebug_boot_sub[] = {
+static struct cmd_tbl cmd_efidebug_boot_sub[] = {
 	U_BOOT_CMD_MKENT(add, CONFIG_SYS_MAXARGS, 1, do_efi_boot_add, "", ""),
 	U_BOOT_CMD_MKENT(rm, CONFIG_SYS_MAXARGS, 1, do_efi_boot_rm, "", ""),
 	U_BOOT_CMD_MKENT(dump, CONFIG_SYS_MAXARGS, 1, do_efi_boot_dump, "", ""),
@@ -1071,10 +1086,10 @@ static cmd_tbl_t cmd_efidebug_boot_sub[] = {
  *
  * Implement efidebug "boot" sub-command.
  */
-static int do_efi_boot_opt(cmd_tbl_t *cmdtp, int flag,
-			   int argc, char * const argv[])
+static int do_efi_boot_opt(struct cmd_tbl *cmdtp, int flag,
+			   int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -1104,7 +1119,7 @@ static int do_efi_boot_opt(cmd_tbl_t *cmdtp, int flag,
  *
  *     efidebug test bootmgr
  */
-static int do_efi_test_bootmgr(cmd_tbl_t *cmdtp, int flag,
+static int do_efi_test_bootmgr(struct cmd_tbl *cmdtp, int flag,
 			       int argc, char * const argv[])
 {
 	efi_handle_t image;
@@ -1126,7 +1141,7 @@ static int do_efi_test_bootmgr(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_efidebug_test_sub[] = {
+static struct cmd_tbl cmd_efidebug_test_sub[] = {
 	U_BOOT_CMD_MKENT(bootmgr, CONFIG_SYS_MAXARGS, 1, do_efi_test_bootmgr,
 			 "", ""),
 };
@@ -1143,10 +1158,10 @@ static cmd_tbl_t cmd_efidebug_test_sub[] = {
  *
  * Implement efidebug "test" sub-command.
  */
-static int do_efi_test(cmd_tbl_t *cmdtp, int flag,
+static int do_efi_test(struct cmd_tbl *cmdtp, int flag,
 		       int argc, char * const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -1161,7 +1176,59 @@ static int do_efi_test(cmd_tbl_t *cmdtp, int flag,
 	return cp->cmd(cmdtp, flag, argc, argv);
 }
 
-static cmd_tbl_t cmd_efidebug_sub[] = {
+/**
+ * do_efi_query_info() - QueryVariableInfo EFI service
+ *
+ * @cmdtp:	Command table
+ * @flag:	Command flag
+ * @argc:	Number of arguments
+ * @argv:	Argument array
+ * Return:	CMD_RET_SUCCESS on success,
+ *		CMD_RET_USAGE or CMD_RET_FAILURE on failure
+ *
+ * Implement efidebug "test" sub-command.
+ */
+
+static int do_efi_query_info(struct cmd_tbl *cmdtp, int flag,
+			     int argc, char * const argv[])
+{
+	efi_status_t ret;
+	u32 attr = 0;
+	u64 max_variable_storage_size;
+	u64 remain_variable_storage_size;
+	u64 max_variable_size;
+	int i;
+
+	for (i = 1; i < argc; i++) {
+		if (!strcmp(argv[i], "-bs"))
+			attr |= EFI_VARIABLE_BOOTSERVICE_ACCESS;
+		else if (!strcmp(argv[i], "-rt"))
+			attr |= EFI_VARIABLE_RUNTIME_ACCESS;
+		else if (!strcmp(argv[i], "-nv"))
+			attr |= EFI_VARIABLE_NON_VOLATILE;
+		else if (!strcmp(argv[i], "-at"))
+			attr |=
+				EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS;
+	}
+
+	ret = EFI_CALL(efi_query_variable_info(attr,
+					       &max_variable_storage_size,
+					       &remain_variable_storage_size,
+					       &max_variable_size));
+	if (ret != EFI_SUCCESS) {
+		printf("Error: Cannot query UEFI variables, r = %lu\n",
+		       ret & ~EFI_ERROR_MASK);
+		return CMD_RET_FAILURE;
+	}
+
+	printf("Max storage size %llu\n", max_variable_storage_size);
+	printf("Remaining storage size %llu\n", remain_variable_storage_size);
+	printf("Max variable size %llu\n", max_variable_size);
+
+	return CMD_RET_SUCCESS;
+}
+
+static struct cmd_tbl cmd_efidebug_sub[] = {
 	U_BOOT_CMD_MKENT(boot, CONFIG_SYS_MAXARGS, 1, do_efi_boot_opt, "", ""),
 	U_BOOT_CMD_MKENT(devices, CONFIG_SYS_MAXARGS, 1, do_efi_show_devices,
 			 "", ""),
@@ -1177,6 +1244,8 @@ static cmd_tbl_t cmd_efidebug_sub[] = {
 			 "", ""),
 	U_BOOT_CMD_MKENT(test, CONFIG_SYS_MAXARGS, 1, do_efi_test,
 			 "", ""),
+	U_BOOT_CMD_MKENT(query, CONFIG_SYS_MAXARGS, 1, do_efi_query_info,
+			 "", ""),
 };
 
 /**
@@ -1192,10 +1261,10 @@ static cmd_tbl_t cmd_efidebug_sub[] = {
  * Implement efidebug command which allows us to display and
  * configure UEFI environment.
  */
-static int do_efidebug(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int do_efidebug(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 	efi_status_t r;
 
 	if (argc < 2)
@@ -1248,7 +1317,9 @@ static char efidebug_help_text[] =
 	"efidebug tables\n"
 	"  - show UEFI configuration tables\n"
 	"efidebug test bootmgr\n"
-	"  - run simple bootmgr for test\n";
+	"  - run simple bootmgr for test\n"
+	"efidebug query [-nv][-bs][-rt][-at]\n"
+	"  - show size of UEFI variables store\n";
 #endif
 
 U_BOOT_CMD(
diff --git a/cmd/elf.c b/cmd/elf.c
index 10e8264d3c..d44b95d903 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -10,17 +10,19 @@
 #include <elf.h>
 #include <env.h>
 #include <image.h>
+#include <log.h>
 #include <net.h>
 #include <vxworks.h>
 #ifdef CONFIG_X86
 #include <vbe.h>
+#include <asm/cache.h>
 #include <asm/e820.h>
 #include <linux/linkage.h>
 #endif
 
 /* Allow ports to override the default behavior */
 static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]),
-				     int argc, char * const argv[])
+				     int argc, char *const argv[])
 {
 	unsigned long ret;
 
@@ -34,7 +36,7 @@ static unsigned long do_bootelf_exec(ulong (*entry)(int, char * const[]),
 }
 
 /* Interpreter command to boot an arbitrary ELF image from memory */
-int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long addr; /* Address of the ELF image */
 	unsigned long rc; /* Return value from user code */
@@ -90,7 +92,7 @@ int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * be either an ELF image or a raw binary.  Will attempt to setup the
  * bootline and other parameters correctly.
  */
-int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bootvx(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long addr; /* Address of image */
 	unsigned long bootaddr = 0; /* Address to put the bootline */
diff --git a/cmd/ethsw.c b/cmd/ethsw.c
index 8d271ce1f3..f8b8a798bf 100644
--- a/cmd/ethsw.c
+++ b/cmd/ethsw.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <env_flags.h>
 #include <ethsw.h>
+#include <net.h>
 
 static const char *ethsw_name;
 
@@ -999,7 +1000,7 @@ static void cmd_keywords_check(struct ethsw_command_def *parsed_cmd,
 }
 
 /* find all the keywords in the command */
-static int keywords_find(int argc, char * const argv[],
+static int keywords_find(int argc, char *const argv[],
 			 struct ethsw_command_def *parsed_cmd)
 {
 	int i;
@@ -1064,7 +1065,8 @@ static void command_def_init(struct ethsw_command_def *parsed_cmd)
 }
 
 /* function to interpret commands starting with "ethsw " */
-static int do_ethsw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ethsw(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct ethsw_command_def parsed_cmd;
 	int rc = CMD_RET_SUCCESS;
diff --git a/cmd/exit.c b/cmd/exit.c
index f40d0686e1..7bf241ec73 100644
--- a/cmd/exit.c
+++ b/cmd/exit.c
@@ -7,7 +7,8 @@
 #include <common.h>
 #include <command.h>
 
-static int do_exit(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int r;
 
diff --git a/cmd/ext2.c b/cmd/ext2.c
index dc56ab25ff..57a99516a6 100644
--- a/cmd/ext2.c
+++ b/cmd/ext2.c
@@ -19,9 +19,12 @@
 /*
  * Ext2fs support
  */
+#include <common.h>
+#include <command.h>
 #include <fs.h>
 
-static int do_ext2ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ext2ls(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return do_ls(cmdtp, flag, argc, argv, FS_TYPE_EXT);
 }
@@ -29,7 +32,7 @@ static int do_ext2ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 /******************************************************************************
  * Ext2fs boot command intepreter. Derived from diskboot
  */
-int do_ext2load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ext2load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_EXT);
 }
diff --git a/cmd/ext4.c b/cmd/ext4.c
index d2fa7f1db1..4791b69fd9 100644
--- a/cmd/ext4.c
+++ b/cmd/ext4.c
@@ -41,25 +41,23 @@
 #include <usb.h>
 #endif
 
-int do_ext4_size(cmd_tbl_t *cmdtp, int flag, int argc,
-						char *const argv[])
+int do_ext4_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_size(cmdtp, flag, argc, argv, FS_TYPE_EXT);
 }
 
-int do_ext4_load(cmd_tbl_t *cmdtp, int flag, int argc,
-						char *const argv[])
+int do_ext4_load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_EXT);
 }
 
-int do_ext4_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ext4_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_ls(cmdtp, flag, argc, argv, FS_TYPE_EXT);
 }
 
 #if defined(CONFIG_CMD_EXT4_WRITE)
-int do_ext4_write(cmd_tbl_t *cmdtp, int flag, int argc,
+int do_ext4_write(struct cmd_tbl *cmdtp, int flag, int argc,
 		  char *const argv[])
 {
 	return do_save(cmdtp, flag, argc, argv, FS_TYPE_EXT);
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 1b4215114d..ad5c064911 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -14,6 +14,7 @@
 #include <net.h>
 #include <usb.h>
 #include <watchdog.h>
+#include <linux/stringify.h>
 
 static int do_fastboot_udp(int argc, char *const argv[],
 			   uintptr_t buf_addr, size_t buf_size)
@@ -93,7 +94,8 @@ exit:
 #endif
 }
 
-static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_fastboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	uintptr_t buf_addr = (uintptr_t)NULL;
 	size_t buf_size = 0;
diff --git a/cmd/fat.c b/cmd/fat.c
index abce2f1e0c..b438ce16c9 100644
--- a/cmd/fat.c
+++ b/cmd/fat.c
@@ -8,11 +8,14 @@
  * Boot support
  */
 #include <common.h>
+#include <command.h>
 #include <mapmem.h>
 #include <fat.h>
 #include <fs.h>
+#include <part.h>
+#include <asm/cache.h>
 
-int do_fat_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_fat_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_size(cmdtp, flag, argc, argv, FS_TYPE_FAT);
 }
@@ -25,7 +28,7 @@ U_BOOT_CMD(
 	"      and determine its size."
 );
 
-int do_fat_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_fat_fsload(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_FAT);
 }
@@ -46,7 +49,8 @@ U_BOOT_CMD(
 	"      be printed and performance will suffer for the load."
 );
 
-static int do_fat_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fat_ls(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return do_ls(cmdtp, flag, argc, argv, FS_TYPE_FAT);
 }
@@ -58,12 +62,12 @@ U_BOOT_CMD(
 	"    - list files from 'dev' on 'interface' in a 'directory'"
 );
 
-static int do_fat_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_fat_fsinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int dev, part;
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 
 	if (argc < 2) {
 		printf("usage: fatinfo <interface> [<dev[:part]>]\n");
@@ -91,8 +95,8 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_FAT_WRITE
-static int do_fat_fswrite(cmd_tbl_t *cmdtp, int flag,
-		int argc, char * const argv[])
+static int do_fat_fswrite(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	loff_t size;
 	int ret;
@@ -100,7 +104,7 @@ static int do_fat_fswrite(cmd_tbl_t *cmdtp, int flag,
 	unsigned long count;
 	long offset;
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 	int dev = 0;
 	int part = 1;
 	void *buf;
@@ -146,7 +150,8 @@ U_BOOT_CMD(
 	"      to 'dev' on 'interface'"
 );
 
-static int do_fat_rm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fat_rm(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return do_rm(cmdtp, flag, argc, argv, FS_TYPE_FAT);
 }
@@ -158,8 +163,8 @@ U_BOOT_CMD(
 	"    - delete a file from 'dev' on 'interface'"
 );
 
-static int do_fat_mkdir(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_fat_mkdir(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return do_mkdir(cmdtp, flag, argc, argv, FS_TYPE_FAT);
 }
diff --git a/cmd/fdt.c b/cmd/fdt.c
index 36cc726540..99b1b5b3fc 100644
--- a/cmd/fdt.c
+++ b/cmd/fdt.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <linux/ctype.h>
 #include <linux/types.h>
 #include <asm/global_data.h>
@@ -87,7 +88,7 @@ static const char * const fdt_member_table[] = {
 	"size_dt_struct",
 };
 
-static int fdt_get_header_value(int argc, char * const argv[])
+static int fdt_get_header_value(int argc, char *const argv[])
 {
 	fdt32_t *fdtp = (fdt32_t *)working_fdt;
 	ulong val;
@@ -111,7 +112,7 @@ static int fdt_get_header_value(int argc, char * const argv[])
 /*
  * Flattened Device Tree command, see the help for parameter definitions.
  */
-static int do_fdt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/fitupd.c b/cmd/fitupd.c
index 1e5edd9f9b..0f490c58fc 100644
--- a/cmd/fitupd.c
+++ b/cmd/fitupd.c
@@ -8,11 +8,8 @@
 #include <command.h>
 #include <net.h>
 
-#if !defined(CONFIG_UPDATE_TFTP)
-#error "CONFIG_UPDATE_TFTP required"
-#endif
-
-static int do_fitupd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fitupd(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	ulong addr = 0UL;
 
diff --git a/cmd/flash.c b/cmd/flash.c
index cd1758d7e2..240871e808 100644
--- a/cmd/flash.c
+++ b/cmd/flash.c
@@ -9,6 +9,8 @@
  */
 #include <common.h>
 #include <command.h>
+#include <log.h>
+#include <uuid.h>
 
 #if defined(CONFIG_CMD_MTDPARTS)
 #include <jffs2/jffs2.h>
@@ -88,7 +90,7 @@ abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)
 /*
  * Take *addr in Flash and adjust it to fall on the end of its sector
  */
-int flash_sect_roundb (ulong *addr)
+int flash_sect_roundb(ulong *addr)
 {
 	flash_info_t *info;
 	ulong bank, sector_end_addr;
@@ -268,7 +270,8 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
 }
 #endif /* CONFIG_MTD_NOR_FLASH */
 
-static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_flinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 #ifdef CONFIG_MTD_NOR_FLASH
 	ulong bank;
@@ -279,7 +282,7 @@ static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		for (bank=0; bank <CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
 			printf ("\nBank # %ld: ", bank+1);
 
-			flash_print_info (&flash_info[bank]);
+			flash_print_info(&flash_info[bank]);
 		}
 		return 0;
 	}
@@ -291,12 +294,13 @@ static int do_flinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		return 1;
 	}
 	printf ("\nBank # %ld: ", bank);
-	flash_print_info (&flash_info[bank-1]);
+	flash_print_info(&flash_info[bank - 1]);
 #endif /* CONFIG_MTD_NOR_FLASH */
 	return 0;
 }
 
-static int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_flerase(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 #ifdef CONFIG_MTD_NOR_FLASH
 	flash_info_t *info = NULL;
@@ -316,7 +320,7 @@ static int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		for (bank=1; bank<=CONFIG_SYS_MAX_FLASH_BANKS; ++bank) {
 			printf ("Erase Flash Bank # %ld ", bank);
 			info = &flash_info[bank-1];
-			rcode = flash_erase (info, 0, info->sector_count-1);
+			rcode = flash_erase(info, 0, info->sector_count - 1);
 		}
 		return rcode;
 	}
@@ -370,7 +374,7 @@ static int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 		}
 		printf ("Erase Flash Bank # %ld ", bank);
 		info = &flash_info[bank-1];
-		rcode = flash_erase (info, 0, info->sector_count-1);
+		rcode = flash_erase(info, 0, info->sector_count - 1);
 		return rcode;
 	}
 
@@ -390,7 +394,7 @@ static int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 #ifdef CONFIG_MTD_NOR_FLASH
-int flash_sect_erase (ulong addr_first, ulong addr_last)
+int flash_sect_erase(ulong addr_first, ulong addr_last)
 {
 	flash_info_t *info;
 	ulong bank;
@@ -408,14 +412,14 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 		     ++bank, ++info) {
 			if (s_first[bank]>=0) {
 				erased += s_last[bank] - s_first[bank] + 1;
-				debug ("Erase Flash from 0x%08lx to 0x%08lx "
-					"in Bank # %ld ",
-					info->start[s_first[bank]],
-					(s_last[bank] == info->sector_count) ?
-						info->start[0] + info->size - 1:
-						info->start[s_last[bank]+1] - 1,
-					bank+1);
-				rcode = flash_erase (info, s_first[bank], s_last[bank]);
+				debug("Erase Flash from 0x%08lx to 0x%08lx in Bank # %ld ",
+				      info->start[s_first[bank]],
+				      (s_last[bank] == info->sector_count) ?
+				      info->start[0] + info->size - 1 :
+				      info->start[s_last[bank] + 1] - 1,
+				      bank + 1);
+				rcode = flash_erase(info, s_first[bank],
+						    s_last[bank]);
 			}
 		}
 		if (rcode == 0)
@@ -429,7 +433,8 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 }
 #endif /* CONFIG_MTD_NOR_FLASH */
 
-static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_protect(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int rcode = 0;
 #ifdef CONFIG_MTD_NOR_FLASH
@@ -526,7 +531,8 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 						p ? "" : "Un", argv[1],
 						bank, addr_first, addr_last);
 
-				rcode = flash_sect_protect (p, addr_first, addr_last);
+				rcode = flash_sect_protect(p, addr_first,
+							   addr_last);
 				return rcode;
 			}
 
@@ -580,13 +586,13 @@ static int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	if (addr_first >= addr_last)
 		return CMD_RET_USAGE;
 
-	rcode = flash_sect_protect (p, addr_first, addr_last);
+	rcode = flash_sect_protect(p, addr_first, addr_last);
 #endif /* CONFIG_MTD_NOR_FLASH */
 	return rcode;
 }
 
 #ifdef CONFIG_MTD_NOR_FLASH
-int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
+int flash_sect_protect(int p, ulong addr_first, ulong addr_last)
 {
 	flash_info_t *info;
 	ulong bank;
@@ -606,9 +612,9 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
 			}
 
 			if (s_first[bank]>=0 && s_first[bank]<=s_last[bank]) {
-				debug ("%sProtecting sectors %d..%d in bank %ld\n",
-					p ? "" : "Un-",
-					s_first[bank], s_last[bank], bank+1);
+				debug("%sProtecting sectors %d..%d in bank %ld\n",
+				      p ? "" : "Un-", s_first[bank],
+				      s_last[bank], bank + 1);
 				protected += s_last[bank] - s_first[bank] + 1;
 				for (i=s_first[bank]; i<=s_last[bank]; ++i) {
 #if defined(CONFIG_SYS_FLASH_PROTECTION)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index b1c7b5453b..8ae1c936fb 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -13,6 +13,8 @@
 #include <fpga.h>
 #include <fs.h>
 #include <gzip.h>
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
 
 static long do_fpga_get_device(char *arg)
@@ -33,7 +35,8 @@ static long do_fpga_get_device(char *arg)
 }
 
 static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
-				cmd_tbl_t *cmdtp, int argc, char *const argv[])
+				struct cmd_tbl *cmdtp, int argc,
+				char *const argv[])
 {
 	size_t local_data_size;
 	long local_fpga_data;
@@ -65,7 +68,7 @@ static int do_fpga_check_params(long *dev, long *fpga_data, size_t *data_size,
 }
 
 #if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
-int do_fpga_loads(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_fpga_loads(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -117,7 +120,7 @@ int do_fpga_loads(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 #endif
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
-static int do_fpga_loadfs(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_fpga_loadfs(struct cmd_tbl *cmdtp, int flag, int argc,
 			  char *const argv[])
 {
 	size_t data_size = 0;
@@ -140,16 +143,16 @@ static int do_fpga_loadfs(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 #endif
 
-static int do_fpga_info(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_fpga_info(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	long dev = do_fpga_get_device(argv[0]);
 
 	return fpga_info(dev);
 }
 
-static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_fpga_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -163,8 +166,8 @@ static int do_fpga_dump(cmd_tbl_t *cmdtp, int flag, int argc,
 	return fpga_dump(dev, (void *)fpga_data, data_size);
 }
 
-static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_fpga_load(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -178,8 +181,8 @@ static int do_fpga_load(cmd_tbl_t *cmdtp, int flag, int argc,
 	return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
 }
 
-static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -194,8 +197,8 @@ static int do_fpga_loadb(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADP)
-static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -211,8 +214,8 @@ static int do_fpga_loadp(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif
 
 #if defined(CONFIG_CMD_FPGA_LOADBP)
-static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_fpga_loadbp(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	size_t data_size = 0;
 	long fpga_data, dev;
@@ -229,8 +232,8 @@ static int do_fpga_loadbp(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif
 
 #if defined(CONFIG_CMD_FPGA_LOADMK)
-static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	size_t data_size = 0;
 	void *fpga_data = NULL;
@@ -362,7 +365,7 @@ static int do_fpga_loadmk(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 #endif
 
-static cmd_tbl_t fpga_commands[] = {
+static struct cmd_tbl fpga_commands[] = {
 	U_BOOT_CMD_MKENT(info, 1, 1, do_fpga_info, "", ""),
 	U_BOOT_CMD_MKENT(dump, 3, 1, do_fpga_dump, "", ""),
 	U_BOOT_CMD_MKENT(load, 3, 1, do_fpga_load, "", ""),
@@ -384,10 +387,10 @@ static cmd_tbl_t fpga_commands[] = {
 #endif
 };
 
-static int do_fpga_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_fpga_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
 			   char *const argv[])
 {
-	cmd_tbl_t *fpga_cmd;
+	struct cmd_tbl *fpga_cmd;
 	int ret;
 
 	if (argc < 2)
diff --git a/cmd/fpgad.c b/cmd/fpgad.c
index 0d55453eaa..fb2fe63e78 100644
--- a/cmd/fpgad.c
+++ b/cmd/fpgad.c
@@ -25,7 +25,7 @@ static uint	dp_last_length = 0x40;
  *	fpgad {fpga} {addr} {len}
  */
 #define DISP_LINE_LEN	16
-int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_fpga_md(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned int k;
 	unsigned int fpga;
diff --git a/cmd/fs.c b/cmd/fs.c
index db74767b7b..3a0c465c15 100644
--- a/cmd/fs.c
+++ b/cmd/fs.c
@@ -9,7 +9,8 @@
 #include <command.h>
 #include <fs.h>
 
-static int do_size_wrapper(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_size_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	return do_size(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
@@ -22,8 +23,8 @@ U_BOOT_CMD(
 	"      and determine its size."
 );
 
-static int do_load_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_load_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
@@ -40,8 +41,8 @@ U_BOOT_CMD(
 	"      If 'pos' is 0 or omitted, the file is read from the start."
 )
 
-static int do_save_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_save_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	return do_save(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
@@ -57,8 +58,8 @@ U_BOOT_CMD(
 	"      If 'pos' is 0 or omitted, the file is written from the start."
 )
 
-static int do_ls_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_ls_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	return do_ls(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
@@ -71,8 +72,8 @@ U_BOOT_CMD(
 	"      device type 'interface' instance 'dev'."
 )
 
-static int do_ln_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_ln_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	return do_ln(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
@@ -85,8 +86,8 @@ U_BOOT_CMD(
 	"      device type 'interface' instance 'dev'."
 )
 
-static int do_fstype_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_fstype_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	return do_fs_type(cmdtp, flag, argc, argv);
 }
diff --git a/cmd/fs_uuid.c b/cmd/fs_uuid.c
index 02ae9b7f3c..5dc94aa640 100644
--- a/cmd/fs_uuid.c
+++ b/cmd/fs_uuid.c
@@ -9,8 +9,8 @@
 #include <command.h>
 #include <fs.h>
 
-static int do_fs_uuid_wrapper(cmd_tbl_t *cmdtp, int flag,
-	int argc, char * const argv[])
+static int do_fs_uuid_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	return do_fs_uuid(cmdtp, flag, argc, argv, FS_TYPE_ANY);
 }
diff --git a/cmd/fuse.c b/cmd/fuse.c
index 42d74fa883..e001619d17 100644
--- a/cmd/fuse.c
+++ b/cmd/fuse.c
@@ -40,7 +40,8 @@ static int confirm_prog(void)
 	return 0;
 }
 
-static int do_fuse(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_fuse(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	const char *op = argc >= 2 ? argv[1] : NULL;
 	int confirmed = argc >= 3 && !strcmp(argv[2], "-y");
diff --git a/cmd/gettime.c b/cmd/gettime.c
index 863bd87590..2e74e02b49 100644
--- a/cmd/gettime.c
+++ b/cmd/gettime.c
@@ -14,8 +14,8 @@
 #include <common.h>
 #include <command.h>
 
-static int do_gettime(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_gettime(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	unsigned long int val = get_timer(0);
 
diff --git a/cmd/gpio.c b/cmd/gpio.c
index 408a942455..4fdb3135fc 100644
--- a/cmd/gpio.c
+++ b/cmd/gpio.c
@@ -10,6 +10,7 @@
 #include <command.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/gpio.h>
 #include <linux/err.h>
@@ -117,7 +118,8 @@ static int do_gpio_status(bool all, const char *gpio_name)
 }
 #endif
 
-static int do_gpio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_gpio(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	unsigned int gpio;
 	enum gpio_cmd sub_cmd;
diff --git a/cmd/gpt.c b/cmd/gpt.c
index efaf1bcecb..df759416c8 100644
--- a/cmd/gpt.c
+++ b/cmd/gpt.c
@@ -11,11 +11,15 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <command.h>
+#include <part.h>
 #include <part_efi.h>
 #include <exports.h>
+#include <uuid.h>
 #include <linux/ctype.h>
 #include <div64.h>
 #include <memalign.h>
@@ -188,7 +192,8 @@ static void del_gpt_info(void)
 	}
 }
 
-static struct disk_part *allocate_disk_part(disk_partition_t *info, int partnum)
+static struct disk_part *allocate_disk_part(struct disk_partition *info,
+					    int partnum)
 {
 	struct disk_part *newpart;
 	newpart = calloc(1, sizeof(struct disk_part));
@@ -245,7 +250,7 @@ static void print_gpt_info(void)
 		printf("Block size %lu, name %s\n", curr->gpt_part_info.blksz,
 		       curr->gpt_part_info.name);
 		printf("Type %s, bootable %d\n", curr->gpt_part_info.type,
-		       curr->gpt_part_info.bootable);
+		       curr->gpt_part_info.bootable & PART_BOOTABLE);
 #ifdef CONFIG_PARTITION_UUIDS
 		printf("UUID %s\n", curr->gpt_part_info.uuid);
 #endif
@@ -309,7 +314,7 @@ static int get_gpt_info(struct blk_desc *dev_desc)
 {
 	/* start partition numbering at 1, as U-Boot does */
 	int valid_parts = 0, p, ret;
-	disk_partition_t info;
+	struct disk_partition info;
 	struct disk_part *new_disk_part;
 
 	/*
@@ -374,14 +379,14 @@ static int do_get_gpt_info(struct blk_desc *dev_desc)
 static int set_gpt_info(struct blk_desc *dev_desc,
 			const char *str_part,
 			char **str_disk_guid,
-			disk_partition_t **partitions,
+			struct disk_partition **partitions,
 			u8 *parts_count)
 {
 	char *tok, *str, *s;
 	int i;
 	char *val, *p;
 	int p_count;
-	disk_partition_t *parts;
+	struct disk_partition *parts;
 	int errno = 0;
 	uint64_t size_ll, start_ll;
 	lbaint_t offset = 0;
@@ -439,7 +444,7 @@ static int set_gpt_info(struct blk_desc *dev_desc,
 	}
 
 	/* allocate memory for partitions */
-	parts = calloc(sizeof(disk_partition_t), p_count);
+	parts = calloc(sizeof(struct disk_partition), p_count);
 	if (parts == NULL)
 		return -ENOMEM;
 
@@ -535,7 +540,7 @@ static int set_gpt_info(struct blk_desc *dev_desc,
 
 		/* bootable */
 		if (found_key(tok, "bootable"))
-			parts[i].bootable = 1;
+			parts[i].bootable = PART_BOOTABLE;
 	}
 
 	*parts_count = p_count;
@@ -556,7 +561,7 @@ static int gpt_default(struct blk_desc *blk_dev_desc, const char *str_part)
 	int ret;
 	char *str_disk_guid;
 	u8 part_count = 0;
-	disk_partition_t *partitions = NULL;
+	struct disk_partition *partitions = NULL;
 
 	/* fill partitions */
 	ret = set_gpt_info(blk_dev_desc, str_part,
@@ -583,7 +588,7 @@ static int gpt_verify(struct blk_desc *blk_dev_desc, const char *str_part)
 {
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1,
 				     blk_dev_desc->blksz);
-	disk_partition_t *partitions = NULL;
+	struct disk_partition *partitions = NULL;
 	gpt_entry *gpt_pte = NULL;
 	char *str_disk_guid;
 	u8 part_count = 0;
@@ -639,7 +644,7 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
 {
 	struct list_head *pos;
 	struct disk_part *curr;
-	disk_partition_t *new_partitions = NULL;
+	struct disk_partition *new_partitions = NULL;
 	char disk_guid[UUID_STR_LEN + 1];
 	char *partitions_list, *str_disk_guid = NULL;
 	u8 part_count = 0;
@@ -772,11 +777,9 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
  out:
 	del_gpt_info();
 #ifdef CONFIG_RANDOM_UUID
-	if (str_disk_guid)
-		free(str_disk_guid);
+	free(str_disk_guid);
 #endif
-	if (new_partitions)
-		free(new_partitions);
+	free(new_partitions);
 	free(partitions_list);
 	return ret;
 }
@@ -792,7 +795,7 @@ static int do_rename_gpt_parts(struct blk_desc *dev_desc, char *subcomm,
  *
  * @return zero on success; otherwise error
  */
-static int do_gpt(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_gpt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret = CMD_RET_SUCCESS;
 	int dev = 0;
diff --git a/cmd/hash.c b/cmd/hash.c
index dff943ac9f..e163cd6774 100644
--- a/cmd/hash.c
+++ b/cmd/hash.c
@@ -14,7 +14,8 @@
 #include <hash.h>
 #include <linux/ctype.h>
 
-static int do_hash(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_hash(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	char *s;
 	int flags = HASH_FLAG_ENV;
diff --git a/cmd/help.c b/cmd/help.c
index a1a0b99b6f..8d67d977bf 100644
--- a/cmd/help.c
+++ b/cmd/help.c
@@ -7,11 +7,12 @@
 #include <common.h>
 #include <command.h>
 
-static int do_help(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_help(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 #ifdef CONFIG_CMDLINE
-	cmd_tbl_t *start = ll_entry_start(cmd_tbl_t, cmd);
-	const int len = ll_entry_count(cmd_tbl_t, cmd);
+	struct cmd_tbl *start = ll_entry_start(struct cmd_tbl, cmd);
+	const int len = ll_entry_count(struct cmd_tbl, cmd);
 	return _do_help(start, len, cmdtp, flag, argc, argv);
 #else
 	return 0;
@@ -29,7 +30,7 @@ U_BOOT_CMD(
 
 #ifdef CONFIG_CMDLINE
 /* This does not use the U_BOOT_CMD macro as ? can't be used in symbol names */
-ll_entry_declare(cmd_tbl_t, question_mark, cmd) = {
+ll_entry_declare(struct cmd_tbl, question_mark, cmd) = {
 	"?",	CONFIG_SYS_MAXARGS, cmd_always_repeatable,	do_help,
 	"alias for 'help'",
 #ifdef  CONFIG_SYS_LONGHELP
diff --git a/cmd/host.c b/cmd/host.c
index eefc4f255e..cd9c9677f0 100644
--- a/cmd/host.c
+++ b/cmd/host.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <fs.h>
 #include <part.h>
@@ -13,32 +14,32 @@
 
 static int host_curr_device = -1;
 
-static int do_host_load(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_load(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return do_load(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
 }
 
-static int do_host_ls(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_ls(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	return do_ls(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
 }
 
-static int do_host_size(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_size(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return do_size(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
 }
 
-static int do_host_save(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_save(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return do_save(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX);
 }
 
-static int do_host_bind(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_bind(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	if (argc < 2 || argc > 3)
 		return CMD_RET_USAGE;
@@ -53,8 +54,8 @@ static int do_host_bind(cmd_tbl_t *cmdtp, int flag, int argc,
 	return host_dev_bind(dev, file);
 }
 
-static int do_host_info(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_host_info(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	if (argc < 1 || argc > 2)
 		return CMD_RET_USAGE;
@@ -100,8 +101,8 @@ static int do_host_info(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_host_dev(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_host_dev(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	int dev;
 	char *ep;
@@ -140,7 +141,7 @@ static int do_host_dev(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static cmd_tbl_t cmd_host_sub[] = {
+static struct cmd_tbl cmd_host_sub[] = {
 	U_BOOT_CMD_MKENT(load, 7, 0, do_host_load, "", ""),
 	U_BOOT_CMD_MKENT(ls, 3, 0, do_host_ls, "", ""),
 	U_BOOT_CMD_MKENT(save, 6, 0, do_host_save, "", ""),
@@ -150,10 +151,10 @@ static cmd_tbl_t cmd_host_sub[] = {
 	U_BOOT_CMD_MKENT(dev, 0, 1, do_host_dev, "", ""),
 };
 
-static int do_host(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_host(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	/* Skip past 'host' */
 	argc--;
diff --git a/cmd/i2c.c b/cmd/i2c.c
index 43a76299b3..cc01119b21 100644
--- a/cmd/i2c.c
+++ b/cmd/i2c.c
@@ -73,9 +73,11 @@
 #include <edid.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 
 /* Display values from last command.
@@ -288,7 +290,8 @@ static int i2c_report_err(int ret, enum i2c_err_op op)
  * Syntax:
  *	i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
  */
-static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	uint	chip;
 	uint	devaddr, length;
@@ -341,7 +344,8 @@ static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv
 	return 0;
 }
 
-static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	uint	chip;
 	uint	devaddr, length;
@@ -432,7 +436,7 @@ static int do_i2c_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[
 }
 
 #ifdef CONFIG_DM_I2C
-static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
 			char *const argv[])
 {
 	struct udevice *dev;
@@ -462,7 +466,8 @@ static int do_i2c_flags(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_i2c_olen(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct udevice *dev;
 	uint olen;
@@ -507,7 +512,8 @@ static int do_i2c_olen(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  * Syntax:
  *	i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
  */
-static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	uint	chip;
 	uint	addr, length;
@@ -626,7 +632,8 @@ static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
  * Syntax:
  *	i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
  */
-static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	uint	chip;
 	ulong	addr;
@@ -712,7 +719,8 @@ static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
  * Syntax:
  *	i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
  */
-static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	uint	chip;
 	ulong	addr;
@@ -796,8 +804,8 @@ static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]
  *	i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  *	i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  */
-static int
-mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
+static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
+		       char *const argv[])
 {
 	uint	chip;
 	ulong	addr;
@@ -945,7 +953,8 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const arg
  *
  * Returns zero (success) if one or more I2C devices was found
  */
-static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	int j;
 	int addr = -1;
@@ -1020,7 +1029,8 @@ static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv
  *	{length} - Number of bytes to read
  *	{delay}  - A DECIMAL number and defaults to 1000 uSec
  */
-static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	uint	chip;
 	int alen;
@@ -1146,7 +1156,8 @@ static void decode_bits (u_char const b, char const *str[], int const do_once)
  * Syntax:
  *	i2c sdram {i2c_chip}
  */
-static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
 
@@ -1648,7 +1659,7 @@ static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  *	i2c edid {i2c_chip}
  */
 #if defined(CONFIG_I2C_EDID)
-int do_edid(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	uint chip;
 	struct edid1_info edid;
@@ -1715,8 +1726,8 @@ static void show_bus(struct udevice *bus)
  * Returns zero always.
  */
 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
-static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	if (argc == 1) {
 		/* show all busses */
@@ -1802,8 +1813,8 @@ static int do_i2c_show_bus(cmd_tbl_t *cmdtp, int flag, int argc,
  */
 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS) || \
 		defined(CONFIG_DM_I2C)
-static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	int		ret = 0;
 	int	bus_no;
@@ -1853,7 +1864,8 @@ static int do_i2c_bus_num(cmd_tbl_t *cmdtp, int flag, int argc,
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	int speed, ret=0;
 
@@ -1896,7 +1908,8 @@ static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_mm(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
 }
@@ -1911,7 +1924,8 @@ static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
 }
@@ -1925,7 +1939,8 @@ static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  *
  * Returns zero always.
  */
-static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 #if defined(CONFIG_DM_I2C)
 	struct udevice *bus;
@@ -1944,7 +1959,7 @@ static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv
 	return 0;
 }
 
-static cmd_tbl_t cmd_i2c_sub[] = {
+static struct cmd_tbl cmd_i2c_sub[] = {
 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_DM_I2C)
 	U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
 #endif
@@ -1995,9 +2010,9 @@ static __maybe_unused void i2c_reloc(void)
  * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  * on error.
  */
-static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 	i2c_reloc();
diff --git a/cmd/ide.c b/cmd/ide.c
index 2f93ba7904..b78c38e159 100644
--- a/cmd/ide.c
+++ b/cmd/ide.c
@@ -27,7 +27,7 @@
 /* Current I/O Device	*/
 static int curr_device;
 
-int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ide(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc == 2) {
 		if (strncmp(argv[1], "res", 3) == 0) {
@@ -40,7 +40,7 @@ int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return blk_common_cmd(argc, argv, IF_TYPE_IDE, &curr_device);
 }
 
-int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_diskboot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return common_diskboot(cmdtp, "ide", argc, argv);
 }
diff --git a/cmd/ini.c b/cmd/ini.c
index 0c425262d0..c075be623c 100644
--- a/cmd/ini.c
+++ b/cmd/ini.c
@@ -226,7 +226,7 @@ static int ini_handler(void *user, char *section, char *name, char *value)
 	return 1;
 }
 
-static int do_ini(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ini(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const char *section;
 	char *file_address;
diff --git a/cmd/io.c b/cmd/io.c
index 7fee9674a2..c7e964153b 100644
--- a/cmd/io.c
+++ b/cmd/io.c
@@ -24,7 +24,7 @@ static ulong base_address;
  * Syntax:
  *	iod{.b, .w, .l} {addr}
  */
-int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_io_iod(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr, length, bytes;
 	u8 buf[DISP_LINE_LEN];
@@ -90,7 +90,7 @@ int do_io_iod(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_io_iow(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_io_iow(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr, val;
 	int size;
diff --git a/cmd/iotrace.c b/cmd/iotrace.c
index fa6c68b198..652ebefb89 100644
--- a/cmd/iotrace.c
+++ b/cmd/iotrace.c
@@ -55,7 +55,7 @@ static void do_print_trace(void)
 	}
 }
 
-static int do_set_buffer(int argc, char * const argv[])
+static int do_set_buffer(int argc, char *const argv[])
 {
 	ulong addr = 0, size = 0;
 
@@ -71,7 +71,7 @@ static int do_set_buffer(int argc, char * const argv[])
 	return 0;
 }
 
-static int do_set_region(int argc, char * const argv[])
+static int do_set_region(int argc, char *const argv[])
 {
 	ulong addr = 0, size = 0;
 
@@ -87,7 +87,7 @@ static int do_set_region(int argc, char * const argv[])
 	return 0;
 }
 
-int do_iotrace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_iotrace(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const char *cmd = argc < 2 ? NULL : argv[1];
 
diff --git a/cmd/irq.c b/cmd/irq.c
index 52d06b3eed..1d3e28cb3c 100644
--- a/cmd/irq.c
+++ b/cmd/irq.c
@@ -8,8 +8,8 @@
 #include <command.h>
 #include <irq_func.h>
 
-static int do_interrupts(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_interrupts(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 
 	if (argc != 2)
@@ -31,7 +31,7 @@ U_BOOT_CMD(
 );
 
 /* Implemented in $(CPU)/interrupts.c */
-int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 U_BOOT_CMD(
 	irqinfo,    1,    1,     do_irqinfo,
diff --git a/cmd/itest.c b/cmd/itest.c
index e21e1f1b1b..a0cf4bee04 100644
--- a/cmd/itest.c
+++ b/cmd/itest.c
@@ -175,7 +175,8 @@ static int binary_test(char *op, char *arg1, char *arg2, int w)
 }
 
 /* command line interface to the shell test */
-static int do_itest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_itest(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	int	value, w;
 
diff --git a/cmd/jffs2.c b/cmd/jffs2.c
index da2580d85d..9540988e33 100644
--- a/cmd/jffs2.c
+++ b/cmd/jffs2.c
@@ -73,9 +73,11 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <flash.h>
 #include <image.h>
 #include <malloc.h>
 #include <jffs2/jffs2.h>
+#include <linux/bug.h>
 #include <linux/list.h>
 #include <linux/ctype.h>
 #include <cramfs/cramfs_fs.h>
@@ -471,7 +473,8 @@ static struct part_info* jffs2_part_info(struct mtd_device *dev, unsigned int pa
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_jffs2_fsload(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	char *fsname;
 	char *filename;
@@ -533,7 +536,7 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_jffs2_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename = "/";
 	int ret;
@@ -571,7 +574,8 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_jffs2_fsinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct part_info *part;
 	char *fsname;
diff --git a/cmd/led.c b/cmd/led.c
index 50ffa509ab..9433fa886c 100644
--- a/cmd/led.c
+++ b/cmd/led.c
@@ -71,7 +71,7 @@ static int list_leds(void)
 	return 0;
 }
 
-int do_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	enum led_state_t cmd;
 	const char *led_label;
diff --git a/cmd/legacy_led.c b/cmd/legacy_led.c
index 7d40d8db58..86cd969e40 100644
--- a/cmd/legacy_led.c
+++ b/cmd/legacy_led.c
@@ -85,7 +85,7 @@ void __weak __led_blink(led_id_t mask, int freq)
 {
 }
 
-int do_legacy_led(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_legacy_led(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i, match = 0;
 	enum led_cmd cmd;
diff --git a/cmd/license.c b/cmd/license.c
index c5b04c331b..15411b5a92 100644
--- a/cmd/license.c
+++ b/cmd/license.c
@@ -12,7 +12,8 @@
 #include "license_data_gz.h"
 #include "license_data_size.h"
 
-static int do_license(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_license(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	char *dst;
 	unsigned long len = data_size;
diff --git a/cmd/load.c b/cmd/load.c
index fab30fe894..63a9414543 100644
--- a/cmd/load.c
+++ b/cmd/load.c
@@ -19,6 +19,8 @@
 #include <exports.h>
 #include <serial.h>
 #include <xyzModem.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,8 +42,8 @@ static int do_echo = 1;
 /* -------------------------------------------------------------------- */
 
 #if defined(CONFIG_CMD_LOADS)
-static int do_load_serial(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_load_serial(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	long offset = 0;
 	ulong addr;
@@ -241,7 +243,8 @@ static int read_record(char *buf, ulong len)
 
 #if defined(CONFIG_CMD_SAVES)
 
-int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_save_serial(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	ulong offset = 0;
 	ulong size   = 0;
@@ -418,8 +421,8 @@ static int  his_pad_count;  /* number of pad chars he needs */
 static char his_pad_char;   /* pad chars he needs */
 static char his_quote;      /* quote chars he'll use */
 
-static int do_load_serial_bin(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_load_serial_bin(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	ulong offset = 0;
 	ulong addr;
diff --git a/cmd/log.c b/cmd/log.c
index 1e3936aeeb..664f7bd7ac 100644
--- a/cmd/log.c
+++ b/cmd/log.c
@@ -11,8 +11,8 @@
 
 static char log_fmt_chars[LOGF_COUNT] = "clFLfm";
 
-static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_log_level(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	if (argc > 1)
 		gd->default_log_level = simple_strtol(argv[1], NULL, 10);
@@ -22,8 +22,8 @@ static int do_log_level(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_log_format(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_log_format(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	int i;
 
@@ -58,7 +58,8 @@ static int do_log_format(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_log_rec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_log_rec(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	enum log_category_t cat;
 	enum log_level_t level;
@@ -94,7 +95,7 @@ static int do_log_rec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static cmd_tbl_t log_sub[] = {
+static struct cmd_tbl log_sub[] = {
 	U_BOOT_CMD_MKENT(level, CONFIG_SYS_MAXARGS, 1, do_log_level, "", ""),
 #ifdef CONFIG_LOG_TEST
 	U_BOOT_CMD_MKENT(test, 2, 1, do_log_test, "", ""),
@@ -103,9 +104,9 @@ static cmd_tbl_t log_sub[] = {
 	U_BOOT_CMD_MKENT(rec, CONFIG_SYS_MAXARGS, 1, do_log_rec, "", ""),
 };
 
-static int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_log(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/lzmadec.c b/cmd/lzmadec.c
index e3b9cc75ac..3b8db0a853 100644
--- a/cmd/lzmadec.c
+++ b/cmd/lzmadec.c
@@ -17,7 +17,8 @@
 
 #include <lzma/LzmaTools.h>
 
-static int do_lzmadec(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_lzmadec(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	unsigned long src, dst;
 	SizeT src_len = ~0UL, dst_len = ~0UL;
diff --git a/cmd/mac.c b/cmd/mac.c
index 4227d10936..a39e1168a5 100644
--- a/cmd/mac.c
+++ b/cmd/mac.c
@@ -7,7 +7,8 @@
 #include <common.h>
 #include <command.h>
 
-extern int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_mac(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
 
 U_BOOT_CMD(
 	mac, 3, 1,  do_mac,
diff --git a/cmd/md5sum.c b/cmd/md5sum.c
index 63cbae0364..5ae3ddf85f 100644
--- a/cmd/md5sum.c
+++ b/cmd/md5sum.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <image.h>
 #include <mapmem.h>
 #include <u-boot/md5.h>
 #include <asm/io.h>
@@ -72,7 +73,7 @@ static int parse_verify_sum(char *verify_str, u8 *vsum)
 	return 0;
 }
 
-int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_md5sum(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr, len;
 	unsigned int i;
@@ -135,7 +136,8 @@ int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 #else
-static int do_md5sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_md5sum(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	unsigned long addr, len;
 	unsigned int i;
diff --git a/cmd/mdio.c b/cmd/mdio.c
index 22c8fbe856..c48bb51237 100644
--- a/cmd/mdio.c
+++ b/cmd/mdio.c
@@ -190,7 +190,8 @@ static int extract_phy_range(char *const argv[], int argc, struct mii_dev **bus,
 }
 
 /* ---------------------------------------------------------------- */
-static int do_mdio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mdio(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	char op[2];
 	int addrlo, addrhi, reglo, reghi, devadlo, devadhi;
diff --git a/cmd/mem.c b/cmd/mem.c
index 009b7b58f3..9b97f7bf69 100644
--- a/cmd/mem.c
+++ b/cmd/mem.c
@@ -18,10 +18,14 @@
 #include <console.h>
 #include <flash.h>
 #include <hash.h>
+#include <log.h>
 #include <mapmem.h>
+#include <rand.h>
 #include <watchdog.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -29,7 +33,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CONFIG_SYS_MEMTEST_SCRATCH 0
 #endif
 
-static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
+static int mod_mem(struct cmd_tbl *, int, int, int, char * const []);
 
 /* Display values from last command.
  * Memory modify remembered values are different from display memory.
@@ -46,7 +50,8 @@ static	ulong	base_address = 0;
  *	md{.b, .w, .l, .q} {addr} {len}
  */
 #define DISP_LINE_LEN	16
-static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_md(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	ulong	addr, length, bytes;
 	const void *buf;
@@ -96,16 +101,20 @@ static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return (rc);
 }
 
-static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_mm(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return mod_mem (cmdtp, 1, flag, argc, argv);
 }
-static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+
+static int do_mem_nm(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	return mod_mem (cmdtp, 0, flag, argc, argv);
 }
 
-static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_mw(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 #ifdef MEM_SUPPORT_64BIT_DATA
 	u64 writeval;
@@ -166,7 +175,8 @@ static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 #ifdef CONFIG_CMD_MX_CYCLIC
-static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_mdc(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int i;
 	ulong count;
@@ -181,7 +191,7 @@ static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 		/* delay for <count> ms... */
 		for (i=0; i<count; i++)
-			udelay (1000);
+			udelay(1000);
 
 		/* check for ctrl-c to abort... */
 		if (ctrlc()) {
@@ -193,7 +203,8 @@ static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_mwc(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int i;
 	ulong count;
@@ -208,7 +219,7 @@ static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 
 		/* delay for <count> ms... */
 		for (i=0; i<count; i++)
-			udelay (1000);
+			udelay(1000);
 
 		/* check for ctrl-c to abort... */
 		if (ctrlc()) {
@@ -221,7 +232,8 @@ static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 #endif /* CONFIG_CMD_MX_CYCLIC */
 
-static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_cmp(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	ulong	addr1, addr2, count, ngood, bytes;
 	int	size;
@@ -301,7 +313,8 @@ static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return rcode;
 }
 
-static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_cp(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	ulong	addr, dest, count;
 	void	*src, *dst;
@@ -359,8 +372,8 @@ static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mem_base(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (argc > 1) {
 		/* Set new base address.
@@ -373,8 +386,8 @@ static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mem_loop(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	ulong	addr, length, i, bytes;
 	int	size;
@@ -471,8 +484,8 @@ static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 #ifdef CONFIG_LOOPW
-static int do_mem_loopw(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_mem_loopw(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	ulong	addr, length, i, bytes;
 	int	size;
@@ -918,11 +931,12 @@ static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
  * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
  * interrupted by ctrl-c or by a failure of one of the sub-tests.
  */
-static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_mem_mtest(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	ulong start, end;
-	vu_long *buf, *dummy;
+	vu_long scratch_space;
+	vu_long *buf, *dummy = &scratch_space;
 	ulong iteration_limit = 0;
 	ulong count = 0;
 	ulong errs = 0;	/* number of errors, or -1 if interrupted */
@@ -958,7 +972,6 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
 	      start, end);
 
 	buf = map_sysmem(start, end - start);
-	dummy = map_sysmem(CONFIG_SYS_MEMTEST_SCRATCH, sizeof(vu_long));
 	for (iteration = 0;
 			!iteration_limit || iteration < iteration_limit;
 			iteration++) {
@@ -988,7 +1001,6 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
 	}
 
 	unmap_sysmem((void *)buf);
-	unmap_sysmem((void *)dummy);
 
 	if (errs == -1UL) {
 		/* Memory test was aborted - write a newline to finish off */
@@ -1007,7 +1019,8 @@ static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
  *	nm{.b, .w, .l, .q} {addr}
  */
 static int
-mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
+mod_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
+	char *const argv[])
 {
 	ulong	addr;
 #ifdef MEM_SUPPORT_64BIT_DATA
@@ -1111,7 +1124,8 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
 
 #ifdef CONFIG_CMD_CRC32
 
-static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mem_crc(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int flags = 0;
 	int ac;
@@ -1136,7 +1150,8 @@ static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 #endif
 
 #ifdef CONFIG_CMD_RANDOM
-static int do_random(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_random(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	unsigned long addr, len;
 	unsigned long seed; // NOT INITIALIZED ON PURPOSE
@@ -1264,8 +1279,8 @@ U_BOOT_CMD(
 #endif
 
 #ifdef CONFIG_CMD_MEMINFO
-static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mem_info(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	puts("DRAM:  ");
 	print_size(gd->ram_size, "\n");
diff --git a/cmd/mfsl.c b/cmd/mfsl.c
index 583762a345..31f5b36ade 100644
--- a/cmd/mfsl.c
+++ b/cmd/mfsl.c
@@ -14,7 +14,7 @@
 #include <command.h>
 #include <asm/asm.h>
 
-int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_frd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned int fslnum;
 	unsigned int num;
@@ -169,7 +169,7 @@ int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_fwr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned int fslnum;
 	unsigned int num;
@@ -324,7 +324,7 @@ int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
 
 }
 
-int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+int do_rspr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned int reg = 0;
 	unsigned int val = 0;
diff --git a/cmd/mii.c b/cmd/mii.c
index 23ee1e6cfa..b52a55dc33 100644
--- a/cmd/mii.c
+++ b/cmd/mii.c
@@ -277,7 +277,7 @@ static void extract_range(
 }
 
 /* ---------------------------------------------------------------- */
-static int do_mii(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mii(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char		op[2];
 	unsigned char	addrlo, addrhi, reglo, reghi;
diff --git a/cmd/misc.c b/cmd/misc.c
index a1eef72a6c..20ab943494 100644
--- a/cmd/misc.c
+++ b/cmd/misc.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <command.h>
 #include <console.h>
+#include <linux/delay.h>
 
-static int do_sleep(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sleep(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	ulong start = get_timer(0);
 	ulong mdelay = 0;
@@ -58,7 +60,8 @@ U_BOOT_CMD(
 );
 
 #ifdef CONFIG_CMD_TIMER
-static int do_timer(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_timer(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	static ulong start;
 
diff --git a/cmd/mmc.c b/cmd/mmc.c
index 6142ec8e20..97e5d91859 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -5,9 +5,11 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <console.h>
 #include <mmc.h>
+#include <part.h>
 #include <sparse_format.h>
 #include <image-sparse.h>
 
@@ -140,7 +142,9 @@ static struct mmc *init_mmc_device(int dev, bool force_init)
 
 	return mmc;
 }
-static int do_mmcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+
+static int do_mmcinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct mmc *mmc;
 
@@ -173,8 +177,9 @@ static int confirm_key_prog(void)
 	puts("Authentication key programming aborted\n");
 	return 0;
 }
-static int do_mmcrpmb_key(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char * const argv[])
+
+static int do_mmcrpmb_key(struct cmd_tbl *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
 	void *key_addr;
 	struct mmc *mmc = find_mmc_device(curr_device);
@@ -191,8 +196,9 @@ static int do_mmcrpmb_key(cmd_tbl_t *cmdtp, int flag,
 	}
 	return CMD_RET_SUCCESS;
 }
-static int do_mmcrpmb_read(cmd_tbl_t *cmdtp, int flag,
-			   int argc, char * const argv[])
+
+static int do_mmcrpmb_read(struct cmd_tbl *cmdtp, int flag,
+			   int argc, char *const argv[])
 {
 	u16 blk, cnt;
 	void *addr;
@@ -219,8 +225,9 @@ static int do_mmcrpmb_read(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	return CMD_RET_SUCCESS;
 }
-static int do_mmcrpmb_write(cmd_tbl_t *cmdtp, int flag,
-			    int argc, char * const argv[])
+
+static int do_mmcrpmb_write(struct cmd_tbl *cmdtp, int flag,
+			    int argc, char *const argv[])
 {
 	u16 blk, cnt;
 	void *addr;
@@ -245,8 +252,9 @@ static int do_mmcrpmb_write(cmd_tbl_t *cmdtp, int flag,
 		return CMD_RET_FAILURE;
 	return CMD_RET_SUCCESS;
 }
-static int do_mmcrpmb_counter(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+
+static int do_mmcrpmb_counter(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	unsigned long counter;
 	struct mmc *mmc = find_mmc_device(curr_device);
@@ -257,17 +265,17 @@ static int do_mmcrpmb_counter(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_rpmb[] = {
+static struct cmd_tbl cmd_rpmb[] = {
 	U_BOOT_CMD_MKENT(key, 2, 0, do_mmcrpmb_key, "", ""),
 	U_BOOT_CMD_MKENT(read, 5, 1, do_mmcrpmb_read, "", ""),
 	U_BOOT_CMD_MKENT(write, 5, 0, do_mmcrpmb_write, "", ""),
 	U_BOOT_CMD_MKENT(counter, 1, 1, do_mmcrpmb_counter, "", ""),
 };
 
-static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag,
-		      int argc, char * const argv[])
+static int do_mmcrpmb(struct cmd_tbl *cmdtp, int flag,
+		      int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 	struct mmc *mmc;
 	char original_part;
 	int ret;
@@ -314,8 +322,8 @@ static int do_mmcrpmb(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
-static int do_mmc_read(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int do_mmc_read(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	struct mmc *mmc;
 	u32 blk, cnt, n;
@@ -356,8 +364,8 @@ static lbaint_t mmc_sparse_reserve(struct sparse_storage *info,
 	return blkcnt;
 }
 
-static int do_mmc_sparse_write(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+static int do_mmc_sparse_write(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	struct sparse_storage sparse;
 	struct blk_desc *dev_desc;
@@ -407,8 +415,8 @@ static int do_mmc_sparse_write(cmd_tbl_t *cmdtp, int flag,
 #endif
 
 #if CONFIG_IS_ENABLED(MMC_WRITE)
-static int do_mmc_write(cmd_tbl_t *cmdtp, int flag,
-			int argc, char * const argv[])
+static int do_mmc_write(struct cmd_tbl *cmdtp, int flag,
+			int argc, char *const argv[])
 {
 	struct mmc *mmc;
 	u32 blk, cnt, n;
@@ -437,8 +445,9 @@ static int do_mmc_write(cmd_tbl_t *cmdtp, int flag,
 
 	return (n == cnt) ? CMD_RET_SUCCESS : CMD_RET_FAILURE;
 }
-static int do_mmc_erase(cmd_tbl_t *cmdtp, int flag,
-			int argc, char * const argv[])
+
+static int do_mmc_erase(struct cmd_tbl *cmdtp, int flag,
+			int argc, char *const argv[])
 {
 	struct mmc *mmc;
 	u32 blk, cnt, n;
@@ -467,8 +476,8 @@ static int do_mmc_erase(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
-static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
+static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag,
+			 int argc, char *const argv[])
 {
 	struct mmc *mmc;
 
@@ -478,8 +487,9 @@ static int do_mmc_rescan(cmd_tbl_t *cmdtp, int flag,
 
 	return CMD_RET_SUCCESS;
 }
-static int do_mmc_part(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+
+static int do_mmc_part(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	struct blk_desc *mmc_dev;
 	struct mmc *mmc;
@@ -497,8 +507,9 @@ static int do_mmc_part(cmd_tbl_t *cmdtp, int flag,
 	puts("get mmc type error!\n");
 	return CMD_RET_FAILURE;
 }
-static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,
-		      int argc, char * const argv[])
+
+static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag,
+		      int argc, char *const argv[])
 {
 	int dev, part = 0, ret;
 	struct mmc *mmc;
@@ -538,8 +549,9 @@ static int do_mmc_dev(cmd_tbl_t *cmdtp, int flag,
 
 	return CMD_RET_SUCCESS;
 }
-static int do_mmc_list(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+
+static int do_mmc_list(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	print_mmc_devices('\n');
 	return CMD_RET_SUCCESS;
@@ -547,7 +559,7 @@ static int do_mmc_list(cmd_tbl_t *cmdtp, int flag,
 
 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
 static int parse_hwpart_user(struct mmc_hwpart_conf *pconf,
-			     int argc, char * const argv[])
+			     int argc, char *const argv[])
 {
 	int i = 0;
 
@@ -581,7 +593,7 @@ static int parse_hwpart_user(struct mmc_hwpart_conf *pconf,
 }
 
 static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx,
-			   int argc, char * const argv[])
+			   int argc, char *const argv[])
 {
 	int i;
 
@@ -614,8 +626,8 @@ static int parse_hwpart_gp(struct mmc_hwpart_conf *pconf, int pidx,
 	return i;
 }
 
-static int do_mmc_hwpartition(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+static int do_mmc_hwpartition(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	struct mmc *mmc;
 	struct mmc_hwpart_conf pconf = { };
@@ -698,8 +710,8 @@ static int do_mmc_hwpartition(cmd_tbl_t *cmdtp, int flag,
 #endif
 
 #ifdef CONFIG_SUPPORT_EMMC_BOOT
-static int do_mmc_bootbus(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char * const argv[])
+static int do_mmc_bootbus(struct cmd_tbl *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
 	int dev;
 	struct mmc *mmc;
@@ -724,8 +736,9 @@ static int do_mmc_bootbus(cmd_tbl_t *cmdtp, int flag,
 	/* acknowledge to be sent during boot operation */
 	return mmc_set_boot_bus_width(mmc, width, reset, mode);
 }
-static int do_mmc_boot_resize(cmd_tbl_t *cmdtp, int flag,
-			      int argc, char * const argv[])
+
+static int do_mmc_boot_resize(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	int dev;
 	struct mmc *mmc;
@@ -777,8 +790,8 @@ static int mmc_partconf_print(struct mmc *mmc)
 	return CMD_RET_SUCCESS;
 }
 
-static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag,
-			   int argc, char * const argv[])
+static int do_mmc_partconf(struct cmd_tbl *cmdtp, int flag,
+			   int argc, char *const argv[])
 {
 	int dev;
 	struct mmc *mmc;
@@ -808,8 +821,9 @@ static int do_mmc_partconf(cmd_tbl_t *cmdtp, int flag,
 	/* acknowledge to be sent during boot operation */
 	return mmc_set_part_conf(mmc, ack, part_num, access);
 }
-static int do_mmc_rst_func(cmd_tbl_t *cmdtp, int flag,
-			   int argc, char * const argv[])
+
+static int do_mmc_rst_func(struct cmd_tbl *cmdtp, int flag,
+			   int argc, char *const argv[])
 {
 	int dev;
 	struct mmc *mmc;
@@ -843,8 +857,8 @@ static int do_mmc_rst_func(cmd_tbl_t *cmdtp, int flag,
 	return mmc_set_rst_n_function(mmc, enable);
 }
 #endif
-static int do_mmc_setdsr(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
+static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int flag,
+			 int argc, char *const argv[])
 {
 	struct mmc *mmc;
 	u32 val;
@@ -872,8 +886,8 @@ static int do_mmc_setdsr(cmd_tbl_t *cmdtp, int flag,
 }
 
 #ifdef CONFIG_CMD_BKOPS_ENABLE
-static int do_mmc_bkops_enable(cmd_tbl_t *cmdtp, int flag,
-				   int argc, char * const argv[])
+static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	int dev;
 	struct mmc *mmc;
@@ -896,7 +910,7 @@ static int do_mmc_bkops_enable(cmd_tbl_t *cmdtp, int flag,
 }
 #endif
 
-static int do_mmc_boot_wp(cmd_tbl_t *cmdtp, int flag,
+static int do_mmc_boot_wp(struct cmd_tbl *cmdtp, int flag,
 			  int argc, char * const argv[])
 {
 	int err;
@@ -916,7 +930,7 @@ static int do_mmc_boot_wp(cmd_tbl_t *cmdtp, int flag,
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_mmc[] = {
+static struct cmd_tbl cmd_mmc[] = {
 	U_BOOT_CMD_MKENT(info, 1, 0, do_mmcinfo, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 1, do_mmc_read, "", ""),
 	U_BOOT_CMD_MKENT(wp, 1, 0, do_mmc_boot_wp, "", ""),
@@ -949,9 +963,10 @@ static cmd_tbl_t cmd_mmc[] = {
 #endif
 };
 
-static int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mmcops(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	cp = find_cmd_tbl(argv[1], cmd_mmc, ARRAY_SIZE(cmd_mmc));
 
diff --git a/cmd/mp.c b/cmd/mp.c
index 4c8f5fc3fa..c2b5235a37 100644
--- a/cmd/mp.c
+++ b/cmd/mp.c
@@ -26,7 +26,7 @@ static int cpu_status_all(void)
 }
 
 static int
-cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+cpu_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long cpuid;
 
diff --git a/cmd/mtd.c b/cmd/mtd.c
index f407c5e445..485a963bdd 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -195,8 +195,8 @@ static bool mtd_oob_write_is_empty(struct mtd_oob_ops *op)
 	return true;
 }
 
-static int do_mtd_list(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mtd_list(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct mtd_info *mtd;
 	int dev_nb = 0;
@@ -240,7 +240,8 @@ static int mtd_special_write_oob(struct mtd_info *mtd, u64 off,
 	return ret;
 }
 
-static int do_mtd_io(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	bool dump, read, raw, woob, write_empty_pages, has_pages = false;
 	u64 start_off, off, len, remaining, default_len;
@@ -382,8 +383,8 @@ out_put_mtd:
 	return ret;
 }
 
-static int do_mtd_erase(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	struct erase_info erase_op = {};
 	struct mtd_info *mtd;
@@ -454,8 +455,8 @@ out_put_mtd:
 	return ret;
 }
 
-static int do_mtd_bad(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_mtd_bad(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct mtd_info *mtd;
 	loff_t off;
@@ -485,7 +486,7 @@ out_put_mtd:
 }
 
 #ifdef CONFIG_AUTO_COMPLETE
-static int mtd_name_complete(int argc, char * const argv[], char last_char,
+static int mtd_name_complete(int argc, char *const argv[], char last_char,
 			     int maxv, char *cmdv[])
 {
 	int len = 0, n_found = 0;
diff --git a/cmd/mtdparts.c b/cmd/mtdparts.c
index b40c2afadd..5220142b9a 100644
--- a/cmd/mtdparts.c
+++ b/cmd/mtdparts.c
@@ -73,6 +73,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <jffs2/load_kernel.h>
 #include <linux/list.h>
@@ -1915,7 +1916,8 @@ static struct part_info* mtd_part_info(struct mtd_device *dev, unsigned int part
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-static int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_chpart(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 /* command line only */
 	struct mtd_device *dev;
@@ -1953,8 +1955,8 @@ static int do_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * @param argv arguments list
  * @return 0 on success, 1 otherwise
  */
-static int do_mtdparts(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_mtdparts(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (argc == 2) {
 		if (strcmp(argv[1], "default") == 0) {
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index dc0ce01c35..a27b0df8ae 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -8,7 +8,9 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <flash.h>
 #include <image.h>
+#include <net.h>
 #include <vsprintf.h>
 #include <errno.h>
 #include <dm.h>
@@ -730,8 +732,8 @@ static int bubt_check_boot_mode(const struct bubt_dev *dst)
 
 		for (int i = 0; i < ARRAY_SIZE(a38x_boot_modes); i++) {
 			if (a38x_boot_modes[i].id == hdr->blockid) {
-				printf("Error: A38x image meant to be "
-				       "booted from \"%s\", not \"%s\"!\n",
+				printf("Error: A38x image meant to be booted from "
+				       "\"%s\", not \"%s\"!\n",
 				       a38x_boot_modes[i].name, dst->name);
 				return -ENOEXEC;
 			}
@@ -827,7 +829,7 @@ else
 #endif
 #endif /* DEFAULT_BUBT_DST */
 
-int do_bubt_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_bubt_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct bubt_dev *src, *dst;
 	size_t image_size;
diff --git a/cmd/nand.c b/cmd/nand.c
index 4de6892a01..92d039af8f 100644
--- a/cmd/nand.c
+++ b/cmd/nand.c
@@ -20,7 +20,9 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <image.h>
+#include <asm/cache.h>
 #include <linux/mtd/mtd.h>
 #include <command.h>
 #include <console.h>
@@ -187,7 +189,7 @@ static void do_nand_status(struct mtd_info *mtd)
 #ifdef CONFIG_ENV_OFFSET_OOB
 unsigned long nand_env_oob_offset;
 
-int do_nand_env_oob(cmd_tbl_t *cmdtp, int argc, char *const argv[])
+int do_nand_env_oob(struct cmd_tbl *cmdtp, int argc, char *const argv[])
 {
 	int ret;
 	uint32_t oob_buf[ENV_OFFSET_SIZE/sizeof(uint32_t)];
@@ -374,7 +376,8 @@ static void adjust_size_for_badblocks(loff_t *size, loff_t offset, int dev)
 	}
 }
 
-static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_nand(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int i, ret = 0;
 	ulong addr;
@@ -843,7 +846,7 @@ U_BOOT_CMD(
 	"NAND sub-system", nand_help_text
 );
 
-static int nand_load_image(cmd_tbl_t *cmdtp, struct mtd_info *mtd,
+static int nand_load_image(struct cmd_tbl *cmdtp, struct mtd_info *mtd,
 			   ulong offset, ulong addr, char *cmd)
 {
 	int r;
@@ -931,8 +934,8 @@ static int nand_load_image(cmd_tbl_t *cmdtp, struct mtd_info *mtd,
 	return bootm_maybe_autostart(cmdtp, cmd);
 }
 
-static int do_nandboot(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_nandboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	char *boot_device = NULL;
 	int idx;
diff --git a/cmd/net.c b/cmd/net.c
index 1b724cc570..25390b0474 100644
--- a/cmd/net.c
+++ b/cmd/net.c
@@ -8,15 +8,17 @@
  * Boot support
  */
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
 #include <image.h>
 #include <net.h>
 
-static int netboot_common(enum proto_t, cmd_tbl_t *, int, char * const []);
+static int netboot_common(enum proto_t, struct cmd_tbl *, int, char * const []);
 
 #ifdef CONFIG_CMD_BOOTP
-static int do_bootp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_bootp(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	return netboot_common(BOOTP, cmdtp, argc, argv);
 }
@@ -29,7 +31,7 @@ U_BOOT_CMD(
 #endif
 
 #ifdef CONFIG_CMD_TFTPBOOT
-int do_tftpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_tftpb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
@@ -47,7 +49,8 @@ U_BOOT_CMD(
 #endif
 
 #ifdef CONFIG_CMD_TFTPPUT
-static int do_tftpput(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_tftpput(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	return netboot_common(TFTPPUT, cmdtp, argc, argv);
 }
@@ -60,7 +63,8 @@ U_BOOT_CMD(
 #endif
 
 #ifdef CONFIG_CMD_TFTPSRV
-static int do_tftpsrv(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_tftpsrv(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	return netboot_common(TFTPSRV, cmdtp, argc, argv);
 }
@@ -77,7 +81,7 @@ U_BOOT_CMD(
 
 
 #ifdef CONFIG_CMD_RARP
-int do_rarpb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_rarpb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	return netboot_common(RARP, cmdtp, argc, argv);
 }
@@ -90,7 +94,8 @@ U_BOOT_CMD(
 #endif
 
 #if defined(CONFIG_CMD_DHCP)
-static int do_dhcp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dhcp(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	return netboot_common(DHCP, cmdtp, argc, argv);
 }
@@ -103,7 +108,8 @@ U_BOOT_CMD(
 #endif
 
 #if defined(CONFIG_CMD_NFS)
-static int do_nfs(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_nfs(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	return netboot_common(NFS, cmdtp, argc, argv);
 }
@@ -176,8 +182,8 @@ static void netboot_update_env(void)
 #endif
 }
 
-static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc,
-		char * const argv[])
+static int netboot_common(enum proto_t proto, struct cmd_tbl *cmdtp, int argc,
+			  char *const argv[])
 {
 	char *s;
 	char *end;
@@ -272,7 +278,8 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc,
 }
 
 #if defined(CONFIG_CMD_PING)
-static int do_ping(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ping(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -320,7 +327,7 @@ static void cdp_update_env(void)
 	}
 }
 
-int do_cdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_cdp(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int r;
 
@@ -343,7 +350,7 @@ U_BOOT_CMD(
 #endif
 
 #if defined(CONFIG_CMD_SNTP)
-int do_sntp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_sntp(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *toff;
 
@@ -384,7 +391,7 @@ U_BOOT_CMD(
 #endif
 
 #if defined(CONFIG_CMD_DNS)
-int do_dns(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_dns(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc == 1)
 		return CMD_RET_USAGE;
@@ -430,8 +437,8 @@ U_BOOT_CMD(
 #endif	/* CONFIG_CMD_DNS */
 
 #if defined(CONFIG_CMD_LINK_LOCAL)
-static int do_link_local(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_link_local(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	char tmp[22];
 
diff --git a/cmd/nvedit.c b/cmd/nvedit.c
index 966c134059..08d49df220 100644
--- a/cmd/nvedit.c
+++ b/cmd/nvedit.c
@@ -29,10 +29,13 @@
 #include <console.h>
 #include <env.h>
 #include <env_internal.h>
+#include <log.h>
+#include <net.h>
 #include <search.h>
 #include <errno.h>
 #include <malloc.h>
 #include <mapmem.h>
+#include <linux/bitops.h>
 #include <u-boot/crc.h>
 #include <watchdog.h>
 #include <linux/stddef.h>
@@ -120,8 +123,8 @@ static int env_print(char *name, int flag)
 	return 0;
 }
 
-static int do_env_print(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_env_print(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	int i;
 	int rcode = 0;
@@ -162,8 +165,8 @@ static int do_env_print(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 #ifdef CONFIG_CMD_GREPENV
-static int do_env_grep(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int do_env_grep(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	char *res = NULL;
 	int len, grep_how, grep_what;
@@ -222,7 +225,7 @@ DONE:
  * Set a new environment variable,
  * or replace or delete an existing one.
  */
-static int _do_env_set(int flag, int argc, char * const argv[], int env_flag)
+static int _do_env_set(int flag, int argc, char *const argv[], int env_flag)
 {
 	int   i, len;
 	char  *name, *value, *s;
@@ -378,7 +381,8 @@ int eth_env_set_enetaddr(const char *name, const uint8_t *enetaddr)
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int do_env_set(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_env_set(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -390,7 +394,7 @@ static int do_env_set(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Prompt for environment variable
  */
 #if defined(CONFIG_CMD_ASKENV)
-int do_env_ask(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_env_ask(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char message[CONFIG_SYS_CBSIZE];
 	int i, len, pos, size;
@@ -508,7 +512,8 @@ static int print_active_callback(struct env_entry *entry)
 /*
  * Print the callbacks available and what they are bound to
  */
-int do_env_callback(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_env_callback(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct env_clbk_tbl *clbkp;
 	int i;
@@ -576,7 +581,7 @@ static int print_active_flags(struct env_entry *entry)
 /*
  * Print the flags available and what variables have flags
  */
-int do_env_flags(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_env_flags(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* Print the available variable types */
 	printf("Available variable type flags (position %d):\n",
@@ -618,8 +623,8 @@ int do_env_flags(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Interactively edit an environment variable
  */
 #if defined(CONFIG_CMD_EDITENV)
-static int do_env_edit(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_env_edit(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	char buffer[CONFIG_SYS_CBSIZE];
 	char *init_val;
@@ -763,8 +768,8 @@ ulong env_get_ulong(const char *name, int base, ulong default_val)
 
 #ifndef CONFIG_SPL_BUILD
 #if defined(CONFIG_CMD_SAVEENV) && defined(ENV_IS_IN_DEVICE)
-static int do_env_save(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_env_save(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	return env_save() ? 1 : 0;
 }
@@ -776,8 +781,8 @@ U_BOOT_CMD(
 );
 
 #if defined(CONFIG_CMD_ERASEENV)
-static int do_env_erase(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_env_erase(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return env_erase() ? 1 : 0;
 }
@@ -807,8 +812,8 @@ int env_match(uchar *s1, int i2)
 }
 
 #ifndef CONFIG_SPL_BUILD
-static int do_env_default(cmd_tbl_t *cmdtp, int flag,
-			  int argc, char * const argv[])
+static int do_env_default(struct cmd_tbl *cmdtp, int flag,
+			  int argc, char *const argv[])
 {
 	int all = 0, env_flag = H_INTERACTIVE;
 
@@ -845,8 +850,8 @@ static int do_env_default(cmd_tbl_t *cmdtp, int flag,
 	return cmd_usage(cmdtp);
 }
 
-static int do_env_delete(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
+static int do_env_delete(struct cmd_tbl *cmdtp, int flag,
+			 int argc, char *const argv[])
 {
 	int env_flag = H_INTERACTIVE;
 	int ret = 0;
@@ -926,8 +931,8 @@ static int do_env_delete(cmd_tbl_t *cmdtp, int flag,
  *
  *	=> env import -d -t ${backup_addr}
  */
-static int do_env_export(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
+static int do_env_export(struct cmd_tbl *cmdtp, int flag,
+			 int argc, char *const argv[])
 {
 	char	buf[32];
 	ulong	addr;
@@ -1059,8 +1064,8 @@ sep_err:
  *		the environment at address 'addr'. Without arguments, the whole
  *		environment gets imported.
  */
-static int do_env_import(cmd_tbl_t *cmdtp, int flag,
-			 int argc, char * const argv[])
+static int do_env_import(struct cmd_tbl *cmdtp, int flag,
+			 int argc, char *const argv[])
 {
 	ulong	addr;
 	char	*cmd, *ptr;
@@ -1220,8 +1225,8 @@ static int print_env_info(void)
  * env info [-d] - evaluate whether default environment is used
  * env info [-p] - evaluate whether environment can be persisted
  */
-static int do_env_info(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int do_env_info(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	int eval_flags = 0;
 	int eval_results = 0;
@@ -1277,8 +1282,8 @@ static int do_env_info(cmd_tbl_t *cmdtp, int flag,
 #endif
 
 #if defined(CONFIG_CMD_ENV_EXISTS)
-static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_env_exists(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	struct env_entry e, *ep;
 
@@ -1296,7 +1301,7 @@ static int do_env_exists(cmd_tbl_t *cmdtp, int flag, int argc,
 /*
  * New command line interface: "env" command with subcommands
  */
-static cmd_tbl_t cmd_env_sub[] = {
+static struct cmd_tbl cmd_env_sub[] = {
 #if defined(CONFIG_CMD_ASKENV)
 	U_BOOT_CMD_MKENT(ask, CONFIG_SYS_MAXARGS, 1, do_env_ask, "", ""),
 #endif
@@ -1346,9 +1351,9 @@ void env_reloc(void)
 }
 #endif
 
-static int do_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/nvedit_efi.c b/cmd/nvedit_efi.c
index 837e39e021..29cad38e19 100644
--- a/cmd/nvedit_efi.c
+++ b/cmd/nvedit_efi.c
@@ -14,6 +14,7 @@
 #include <hexdump.h>
 #include <malloc.h>
 #include <mapmem.h>
+#include <uuid.h>
 #include <linux/kernel.h>
 
 /*
@@ -137,7 +138,7 @@ out:
  *
  * Show information encoded in named UEFI variables
  */
-static int efi_dump_vars(int argc,  char * const argv[],
+static int efi_dump_vars(int argc,  char *const argv[],
 			 const efi_guid_t *guid, bool verbose)
 {
 	u16 *var_name16, *p;
@@ -171,7 +172,7 @@ static int efi_dump_vars(int argc,  char * const argv[],
 	return CMD_RET_SUCCESS;
 }
 
-static bool match_name(int argc, char * const argv[], u16 *var_name16)
+static bool match_name(int argc, char *const argv[], u16 *var_name16)
 {
 	char *buf, *p;
 	size_t buflen;
@@ -209,7 +210,7 @@ out:
  *
  * Show information encoded in all the UEFI variables
  */
-static int efi_dump_var_all(int argc,  char * const argv[],
+static int efi_dump_var_all(int argc,  char *const argv[],
 			    const efi_guid_t *guid_p, bool verbose)
 {
 	u16 *var_name16, *p;
@@ -274,7 +275,8 @@ static int efi_dump_var_all(int argc,  char * const argv[],
  * If one or more variable names are specified, show information
  * named UEFI variables, otherwise show all the UEFI variables.
  */
-int do_env_print_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_env_print_efi(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	efi_guid_t guid;
 	const efi_guid_t *guid_p;
@@ -298,7 +300,7 @@ int do_env_print_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 				return CMD_RET_USAGE;
 
 			/* -a already specified */
-			if (!default_guid & guid_any)
+			if (!default_guid && guid_any)
 				return CMD_RET_USAGE;
 
 			argc--;
@@ -464,7 +466,8 @@ out:
  * Encode values specified and set given UEFI variable.
  * If no value is specified, delete the variable.
  */
-int do_env_set_efi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_env_set_efi(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	char *var_name, *value, *ep;
 	ulong addr;
diff --git a/cmd/nvme.c b/cmd/nvme.c
index 5da903bd52..e715c570a3 100644
--- a/cmd/nvme.c
+++ b/cmd/nvme.c
@@ -5,13 +5,15 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <dm.h>
 #include <nvme.h>
 
 static int nvme_curr_dev;
 
-static int do_nvme(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_nvme(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int ret;
 
diff --git a/cmd/onenand.c b/cmd/onenand.c
index d97844fa7a..216458bb47 100644
--- a/cmd/onenand.c
+++ b/cmd/onenand.c
@@ -24,7 +24,7 @@ static struct mtd_info *mtd;
 static loff_t next_ofs;
 static loff_t skip_ofs;
 
-static int arg_off_size_onenand(int argc, char * const argv[], ulong *off,
+static int arg_off_size_onenand(int argc, char *const argv[], ulong *off,
 				size_t *size)
 {
 	if (argc >= 1) {
@@ -358,13 +358,15 @@ static int onenand_dump(struct mtd_info *mtd, ulong off, int only_oob)
 	return 0;
 }
 
-static int do_onenand_info(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_info(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	printf("%s\n", mtd->name);
 	return 0;
 }
 
-static int do_onenand_bad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_bad(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	ulong ofs;
 
@@ -379,7 +381,8 @@ static int do_onenand_bad(cmd_tbl_t * cmdtp, int flag, int argc, char * const ar
 	return 0;
 }
 
-static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_read(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	char *s;
 	int oob = 0;
@@ -408,7 +411,8 @@ static int do_onenand_read(cmd_tbl_t * cmdtp, int flag, int argc, char * const a
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_write(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	ulong addr, ofs;
 	size_t len;
@@ -434,7 +438,8 @@ static int do_onenand_write(cmd_tbl_t * cmdtp, int flag, int argc, char * const
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_erase(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	ulong ofs;
 	int ret = 0;
@@ -470,7 +475,8 @@ static int do_onenand_erase(cmd_tbl_t * cmdtp, int flag, int argc, char * const
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_test(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	ulong ofs;
 	int ret = 0;
@@ -495,7 +501,8 @@ static int do_onenand_test(cmd_tbl_t * cmdtp, int flag, int argc, char * const a
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_onenand_dump(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	ulong ofs;
 	int ret = 0;
@@ -515,7 +522,8 @@ static int do_onenand_dump(cmd_tbl_t * cmdtp, int flag, int argc, char * const a
 	return ret == 0 ? 1 : 0;
 }
 
-static int do_onenand_markbad(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand_markbad(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	int ret = 0;
 	ulong addr;
@@ -545,7 +553,7 @@ static int do_onenand_markbad(cmd_tbl_t * cmdtp, int flag, int argc, char * cons
 	return ret;
 }
 
-static cmd_tbl_t cmd_onenand_sub[] = {
+static struct cmd_tbl cmd_onenand_sub[] = {
 	U_BOOT_CMD_MKENT(info, 1, 0, do_onenand_info, "", ""),
 	U_BOOT_CMD_MKENT(bad, 1, 0, do_onenand_bad, "", ""),
 	U_BOOT_CMD_MKENT(read, 4, 0, do_onenand_read, "", ""),
@@ -563,9 +571,10 @@ void onenand_reloc(void) {
 }
 #endif
 
-static int do_onenand(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+static int do_onenand(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/osd.c b/cmd/osd.c
index 0b1fa49936..bdad5d8e96 100644
--- a/cmd/osd.c
+++ b/cmd/osd.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <hexdump.h>
 #include <video_osd.h>
@@ -80,8 +81,8 @@ static void show_osd(struct udevice *osd)
 	printf("\n");
 }
 
-static int do_osd_write(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_osd_write(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	uint x, y;
 	uint count;
@@ -131,8 +132,8 @@ static int do_osd_write(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_osd_print(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_osd_print(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	uint x, y;
 	u8 color;
@@ -161,8 +162,8 @@ static int do_osd_print(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_osd_size(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_osd_size(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	uint x, y;
 	int res;
@@ -187,8 +188,8 @@ static int do_osd_size(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_show_osd(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_show_osd(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct udevice *osd;
 
@@ -223,8 +224,8 @@ static int do_show_osd(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_osd_num(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_osd_num(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int osd_no;
 	int res = 0;
@@ -250,7 +251,7 @@ static int do_osd_num(cmd_tbl_t *cmdtp, int flag, int argc,
 	return res ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t cmd_osd_sub[] = {
+static struct cmd_tbl cmd_osd_sub[] = {
 	U_BOOT_CMD_MKENT(show, 1, 1, do_show_osd, "", ""),
 	U_BOOT_CMD_MKENT(dev, 1, 1, do_osd_num, "", ""),
 	U_BOOT_CMD_MKENT(write, 4, 1, do_osd_write, "", ""),
@@ -258,9 +259,9 @@ static cmd_tbl_t cmd_osd_sub[] = {
 	U_BOOT_CMD_MKENT(size, 2, 1, do_osd_size, "", ""),
 };
 
-static int do_osd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_osd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/part.c b/cmd/part.c
index 5e4e45ca6d..216f14bf5d 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -28,11 +28,11 @@ enum cmd_part_info {
 	CMD_PART_INFO_NUMBER
 };
 
-static int do_part_uuid(int argc, char * const argv[])
+static int do_part_uuid(int argc, char *const argv[])
 {
 	int part;
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -51,7 +51,7 @@ static int do_part_uuid(int argc, char * const argv[])
 	return 0;
 }
 
-static int do_part_list(int argc, char * const argv[])
+static int do_part_list(int argc, char *const argv[])
 {
 	int ret;
 	struct blk_desc *desc;
@@ -90,7 +90,7 @@ static int do_part_list(int argc, char * const argv[])
 	if (var != NULL) {
 		int p;
 		char str[512] = { '\0', };
-		disk_partition_t info;
+		struct disk_partition info;
 
 		for (p = 1; p < MAX_SEARCH_PARTITIONS; p++) {
 			char t[5];
@@ -114,10 +114,10 @@ static int do_part_list(int argc, char * const argv[])
 	return 0;
 }
 
-static int do_part_info(int argc, char * const argv[], enum cmd_part_info param)
+static int do_part_info(int argc, char *const argv[], enum cmd_part_info param)
 {
 	struct blk_desc *desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	char buf[512] = { 0 };
 	char *endp;
 	int part;
@@ -167,22 +167,23 @@ static int do_part_info(int argc, char * const argv[], enum cmd_part_info param)
 	return 0;
 }
 
-static int do_part_start(int argc, char * const argv[])
+static int do_part_start(int argc, char *const argv[])
 {
 	return do_part_info(argc, argv, CMD_PART_INFO_START);
 }
 
-static int do_part_size(int argc, char * const argv[])
+static int do_part_size(int argc, char *const argv[])
 {
 	return do_part_info(argc, argv, CMD_PART_INFO_SIZE);
 }
 
-static int do_part_number(int argc, char * const argv[])
+static int do_part_number(int argc, char *const argv[])
 {
 	return do_part_info(argc, argv, CMD_PART_INFO_NUMBER);
 }
 
-static int do_part(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_part(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/pcap.c b/cmd/pcap.c
index 980603f7bd..d0172f3fff 100644
--- a/cmd/pcap.c
+++ b/cmd/pcap.c
@@ -9,8 +9,8 @@
 #include <net.h>
 #include <net/pcap.h>
 
-static int do_pcap_init(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_pcap_init(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	phys_addr_t addr;
 	unsigned int size;
@@ -24,26 +24,26 @@ static int do_pcap_init(cmd_tbl_t *cmdtp, int flag, int argc,
 	return pcap_init(addr, size) ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
 
-static int do_pcap_start(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_pcap_start(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	return pcap_start_stop(true) ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
 
-static int do_pcap_stop(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_pcap_stop(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	return pcap_start_stop(false) ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
 
-static int do_pcap_status(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_pcap_status(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	return pcap_print_status() ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
 
-static int do_pcap_clear(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_pcap_clear(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	return pcap_clear() ? CMD_RET_FAILURE : CMD_RET_SUCCESS;
 }
diff --git a/cmd/pci.c b/cmd/pci.c
index 0043471fc7..f91a4eb8ed 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -18,6 +18,7 @@
 #include <command.h>
 #include <console.h>
 #include <dm.h>
+#include <init.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <pci.h>
@@ -655,7 +656,7 @@ static void pci_show_regions(struct udevice *bus)
  *      pci modify[.b, .w, .l] bus.device.function [addr]
  *      pci write[.b, .w, .l] bus.device.function addr value
  */
-static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_pci(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr = 0, value = 0, cmd_size = 0;
 	enum pci_size_t size = PCI_SIZE_32;
diff --git a/cmd/pinmux.c b/cmd/pinmux.c
index de909a163d..9942b15419 100644
--- a/cmd/pinmux.c
+++ b/cmd/pinmux.c
@@ -14,7 +14,8 @@
 
 static struct udevice *currdev;
 
-static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[])
 {
 	const char *name;
 	int ret;
@@ -75,7 +76,8 @@ static int show_pinmux(struct udevice *dev)
 	return 0;
 }
 
-static int do_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_status(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	struct udevice *dev;
 	int ret = CMD_RET_USAGE;
@@ -99,7 +101,8 @@ static int do_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return ret;
 }
 
-static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 
@@ -118,16 +121,16 @@ static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t pinmux_subcmd[] = {
+static struct cmd_tbl pinmux_subcmd[] = {
 	U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""),
 	U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
 	U_BOOT_CMD_MKENT(status, 2, 1, do_status, "", ""),
 };
 
-static int do_pinmux(cmd_tbl_t *cmdtp, int flag, int argc,
-		     char * const argv[])
+static int do_pinmux(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
-	cmd_tbl_t *cmd;
+	struct cmd_tbl *cmd;
 
 	argc--;
 	argv++;
diff --git a/cmd/pmc.c b/cmd/pmc.c
index cafeba9fcc..9a3ba2bffc 100644
--- a/cmd/pmc.c
+++ b/cmd/pmc.c
@@ -30,7 +30,8 @@ static int get_pmc_dev(struct udevice **devp)
 	return 0;
 }
 
-static int do_pmc_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_pmc_init(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct udevice *dev;
 	int ret;
@@ -42,7 +43,8 @@ static int do_pmc_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-static int do_pmc_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_pmc_info(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct udevice *dev;
 	int ret;
@@ -55,14 +57,14 @@ static int do_pmc_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_pmc_sub[] = {
+static struct cmd_tbl cmd_pmc_sub[] = {
 	U_BOOT_CMD_MKENT(init, 0, 1, do_pmc_init, "", ""),
 	U_BOOT_CMD_MKENT(info, 0, 1, do_pmc_info, "", ""),
 };
 
-static int do_pmc(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_pmc(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	const cmd_tbl_t *cp;
+	const struct cmd_tbl *cp;
 
 	if (argc < 2) /* no subcommand */
 		return cmd_usage(cmdtp);
diff --git a/cmd/pmic.c b/cmd/pmic.c
index 2400bfb601..3bda0534a3 100644
--- a/cmd/pmic.c
+++ b/cmd/pmic.c
@@ -4,6 +4,7 @@
  * Przemyslaw Marczak <p.marczak@samsung.com>
  */
 #include <common.h>
+#include <command.h>
 #include <errno.h>
 #include <dm.h>
 #include <dm/uclass-internal.h>
@@ -21,7 +22,7 @@ static int failure(int ret)
 	return CMD_RET_FAILURE;
 }
 
-static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *name;
 	int ret = -ENODEV;
@@ -46,7 +47,8 @@ static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	int ret;
@@ -73,7 +75,8 @@ static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct uc_pmic_priv *priv;
 	struct udevice *dev;
@@ -118,7 +121,8 @@ static int do_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_read(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct uc_pmic_priv *priv;
 	struct udevice *dev;
@@ -157,7 +161,8 @@ static int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_write(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct udevice *dev;
 	uint reg, value;
@@ -191,7 +196,7 @@ static int do_write(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t subcmd[] = {
+static struct cmd_tbl subcmd[] = {
 	U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""),
 	U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
 	U_BOOT_CMD_MKENT(dump, 1, 1, do_dump, "", ""),
@@ -199,10 +204,10 @@ static cmd_tbl_t subcmd[] = {
 	U_BOOT_CMD_MKENT(write, 3, 1, do_write, "", ""),
 };
 
-static int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_pmic(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
-	cmd_tbl_t *cmd;
+	struct cmd_tbl *cmd;
 
 	argc--;
 	argv++;
diff --git a/cmd/pxe.c b/cmd/pxe.c
index bce6728875..6372fc9871 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -24,7 +24,8 @@ const char *pxe_default_paths[] = {
 	NULL
 };
 
-static int do_get_tftp(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
+static int do_get_tftp(struct cmd_tbl *cmdtp, const char *file_path,
+		       char *file_addr)
 {
 	char *tftp_argv[] = {"tftp", NULL, NULL, NULL};
 
@@ -42,7 +43,7 @@ static int do_get_tftp(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
  *
  * Returns 1 on success or < 0 on error.
  */
-static int pxe_uuid_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_uuid_path(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
 {
 	char *uuid_str;
 
@@ -60,7 +61,7 @@ static int pxe_uuid_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
  *
  * Returns 1 on success or < 0 on error.
  */
-static int pxe_mac_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_mac_path(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
 {
 	char mac_str[21];
 	int err;
@@ -80,7 +81,7 @@ static int pxe_mac_path(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
  *
  * Returns 1 on success or < 0 on error.
  */
-static int pxe_ipaddr_paths(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_ipaddr_paths(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
 {
 	char ip_addr[9];
 	int mask_pos, err;
@@ -113,7 +114,7 @@ static int pxe_ipaddr_paths(cmd_tbl_t *cmdtp, unsigned long pxefile_addr_r)
  * Returns 0 on success or 1 on error.
  */
 static int
-do_pxe_get(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_pxe_get(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *pxefile_addr_str;
 	unsigned long pxefile_addr_r;
@@ -166,7 +167,7 @@ do_pxe_get(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  * Returns 0 on success, 1 on error.
  */
 static int
-do_pxe_boot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_pxe_boot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long pxefile_addr_r;
 	struct pxe_menu *cfg;
@@ -206,14 +207,14 @@ do_pxe_boot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_pxe_sub[] = {
+static struct cmd_tbl cmd_pxe_sub[] = {
 	U_BOOT_CMD_MKENT(get, 1, 1, do_pxe_get, "", ""),
 	U_BOOT_CMD_MKENT(boot, 2, 1, do_pxe_boot, "", "")
 };
 
-static int do_pxe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_pxe(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/pxe_utils.c b/cmd/pxe_utils.c
index 53af04d7dc..8716e782f6 100644
--- a/cmd/pxe_utils.c
+++ b/cmd/pxe_utils.c
@@ -5,11 +5,14 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <lcd.h>
+#include <net.h>
 #include <linux/string.h>
 #include <linux/ctype.h>
 #include <errno.h>
@@ -99,7 +102,8 @@ static int get_bootfile_path(const char *file_path, char *bootfile_path,
 	return 1;
 }
 
-int (*do_getfile)(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr);
+int (*do_getfile)(struct cmd_tbl *cmdtp, const char *file_path,
+		  char *file_addr);
 
 /*
  * As in pxelinux, paths to files referenced from files we retrieve are
@@ -109,7 +113,7 @@ int (*do_getfile)(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr);
  *
  * Returns 1 for success, or < 0 on error.
  */
-static int get_relfile(cmd_tbl_t *cmdtp, const char *file_path,
+static int get_relfile(struct cmd_tbl *cmdtp, const char *file_path,
 		       unsigned long file_addr)
 {
 	size_t path_len;
@@ -147,7 +151,7 @@ static int get_relfile(cmd_tbl_t *cmdtp, const char *file_path,
  *
  * Returns 1 on success, or < 0 for error.
  */
-int get_pxe_file(cmd_tbl_t *cmdtp, const char *file_path,
+int get_pxe_file(struct cmd_tbl *cmdtp, const char *file_path,
 		 unsigned long file_addr)
 {
 	unsigned long config_file_size;
@@ -188,7 +192,7 @@ int get_pxe_file(cmd_tbl_t *cmdtp, const char *file_path,
  *
  * Returns 1 on success or < 0 on error.
  */
-int get_pxelinux_path(cmd_tbl_t *cmdtp, const char *file,
+int get_pxelinux_path(struct cmd_tbl *cmdtp, const char *file,
 		      unsigned long pxefile_addr_r)
 {
 	size_t base_len = strlen(PXELINUX_DIR);
@@ -212,7 +216,7 @@ int get_pxelinux_path(cmd_tbl_t *cmdtp, const char *file,
  *
  * Returns 1 on success or < 0 on error.
  */
-static int get_relfile_envaddr(cmd_tbl_t *cmdtp, const char *file_path,
+static int get_relfile_envaddr(struct cmd_tbl *cmdtp, const char *file_path,
 			       const char *envaddr_name)
 {
 	unsigned long file_addr;
@@ -342,7 +346,7 @@ static int label_localboot(struct pxe_label *label)
  * If the label specifies an 'append' line, its contents will overwrite that
  * of the 'bootargs' environment variable.
  */
-static int label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)
+static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label)
 {
 	char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL };
 	char initrd_str[28];
@@ -821,7 +825,7 @@ static int parse_integer(char **c, int *dst)
 	return 1;
 }
 
-static int parse_pxefile_top(cmd_tbl_t *cmdtp, char *p, unsigned long base,
+static int parse_pxefile_top(struct cmd_tbl *cmdtp, char *p, unsigned long base,
 			     struct pxe_menu *cfg, int nest_level);
 
 /*
@@ -832,7 +836,7 @@ static int parse_pxefile_top(cmd_tbl_t *cmdtp, char *p, unsigned long base,
  * include, nest_level has already been incremented and doesn't need to be
  * incremented here.
  */
-static int handle_include(cmd_tbl_t *cmdtp, char **c, unsigned long base,
+static int handle_include(struct cmd_tbl *cmdtp, char **c, unsigned long base,
 			  struct pxe_menu *cfg, int nest_level)
 {
 	char *include_path;
@@ -872,7 +876,7 @@ static int handle_include(cmd_tbl_t *cmdtp, char **c, unsigned long base,
  * nest_level should be 1 when parsing the top level pxe file, 2 when parsing
  * a file it includes, 3 when parsing a file included by that file, and so on.
  */
-static int parse_menu(cmd_tbl_t *cmdtp, char **c, struct pxe_menu *cfg,
+static int parse_menu(struct cmd_tbl *cmdtp, char **c, struct pxe_menu *cfg,
 		      unsigned long base, int nest_level)
 {
 	struct token t;
@@ -1085,7 +1089,7 @@ static int parse_label(char **c, struct pxe_menu *cfg)
  *
  * Returns 1 on success, < 0 on error.
  */
-static int parse_pxefile_top(cmd_tbl_t *cmdtp, char *p, unsigned long base,
+static int parse_pxefile_top(struct cmd_tbl *cmdtp, char *p, unsigned long base,
 			     struct pxe_menu *cfg, int nest_level)
 {
 	struct token t;
@@ -1193,7 +1197,7 @@ void destroy_pxe_menu(struct pxe_menu *cfg)
  * files it includes). The resulting pxe_menu struct can be free()'d by using
  * the destroy_pxe_menu() function.
  */
-struct pxe_menu *parse_pxefile(cmd_tbl_t *cmdtp, unsigned long menucfg)
+struct pxe_menu *parse_pxefile(struct cmd_tbl *cmdtp, unsigned long menucfg)
 {
 	struct pxe_menu *cfg;
 	char *buf;
@@ -1237,7 +1241,7 @@ static struct menu *pxe_menu_to_menu(struct pxe_menu *cfg)
 	 * Create a menu and add items for all the labels.
 	 */
 	m = menu_create(cfg->title, DIV_ROUND_UP(cfg->timeout, 10),
-			cfg->prompt, label_print, NULL, NULL);
+			cfg->prompt, NULL, label_print, NULL, NULL);
 
 	if (!m)
 		return NULL;
@@ -1277,7 +1281,7 @@ static struct menu *pxe_menu_to_menu(struct pxe_menu *cfg)
 /*
  * Try to boot any labels we have yet to attempt to boot.
  */
-static void boot_unattempted_labels(cmd_tbl_t *cmdtp, struct pxe_menu *cfg)
+static void boot_unattempted_labels(struct cmd_tbl *cmdtp, struct pxe_menu *cfg)
 {
 	struct list_head *pos;
 	struct pxe_label *label;
@@ -1302,7 +1306,7 @@ static void boot_unattempted_labels(cmd_tbl_t *cmdtp, struct pxe_menu *cfg)
  * If this function returns, there weren't any labels that successfully
  * booted, or the user interrupted the menu selection via ctrl+c.
  */
-void handle_pxe_menu(cmd_tbl_t *cmdtp, struct pxe_menu *cfg)
+void handle_pxe_menu(struct cmd_tbl *cmdtp, struct pxe_menu *cfg)
 {
 	void *choice;
 	struct menu *m;
diff --git a/cmd/pxe_utils.h b/cmd/pxe_utils.h
index a38ac81a47..77d2588875 100644
--- a/cmd/pxe_utils.h
+++ b/cmd/pxe_utils.h
@@ -74,15 +74,15 @@ struct pxe_menu {
 
 extern bool is_pxe;
 
-extern int (*do_getfile)(cmd_tbl_t *cmdtp, const char *file_path,
+extern int (*do_getfile)(struct cmd_tbl *cmdtp, const char *file_path,
 			 char *file_addr);
 void destroy_pxe_menu(struct pxe_menu *cfg);
-int get_pxe_file(cmd_tbl_t *cmdtp, const char *file_path,
+int get_pxe_file(struct cmd_tbl *cmdtp, const char *file_path,
 		 unsigned long file_addr);
-int get_pxelinux_path(cmd_tbl_t *cmdtp, const char *file,
+int get_pxelinux_path(struct cmd_tbl *cmdtp, const char *file,
 		      unsigned long pxefile_addr_r);
-void handle_pxe_menu(cmd_tbl_t *cmdtp, struct pxe_menu *cfg);
-struct pxe_menu *parse_pxefile(cmd_tbl_t *cmdtp, unsigned long menucfg);
+void handle_pxe_menu(struct cmd_tbl *cmdtp, struct pxe_menu *cfg);
+struct pxe_menu *parse_pxefile(struct cmd_tbl *cmdtp, unsigned long menucfg);
 int format_mac_pxe(char *outbuf, size_t outbuf_len);
 
 #endif /* __PXE_UTILS_H */
diff --git a/cmd/qfw.c b/cmd/qfw.c
index af826627a2..bb571487f0 100644
--- a/cmd/qfw.c
+++ b/cmd/qfw.c
@@ -93,8 +93,8 @@ static int qemu_fwcfg_list_firmware(void)
 	return 0;
 }
 
-static int qemu_fwcfg_do_list(cmd_tbl_t *cmdtp, int flag,
-		int argc, char * const argv[])
+static int qemu_fwcfg_do_list(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	if (qemu_fwcfg_list_firmware() < 0)
 		return CMD_RET_FAILURE;
@@ -102,8 +102,8 @@ static int qemu_fwcfg_do_list(cmd_tbl_t *cmdtp, int flag,
 	return 0;
 }
 
-static int qemu_fwcfg_do_cpus(cmd_tbl_t *cmdtp, int flag,
-		int argc, char * const argv[])
+static int qemu_fwcfg_do_cpus(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	int ret = qemu_fwcfg_online_cpus();
 	if (ret < 0) {
@@ -116,8 +116,8 @@ static int qemu_fwcfg_do_cpus(cmd_tbl_t *cmdtp, int flag,
 	return 0;
 }
 
-static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,
-		int argc, char * const argv[])
+static int qemu_fwcfg_do_load(struct cmd_tbl *cmdtp, int flag,
+			      int argc, char *const argv[])
 {
 	char *env;
 	void *load_addr;
@@ -156,16 +156,17 @@ static int qemu_fwcfg_do_load(cmd_tbl_t *cmdtp, int flag,
 	return qemu_fwcfg_setup_kernel(load_addr, initrd_addr);
 }
 
-static cmd_tbl_t fwcfg_commands[] = {
+static struct cmd_tbl fwcfg_commands[] = {
 	U_BOOT_CMD_MKENT(list, 0, 1, qemu_fwcfg_do_list, "", ""),
 	U_BOOT_CMD_MKENT(cpus, 0, 1, qemu_fwcfg_do_cpus, "", ""),
 	U_BOOT_CMD_MKENT(load, 2, 1, qemu_fwcfg_do_load, "", ""),
 };
 
-static int do_qemu_fw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_qemu_fw(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int ret;
-	cmd_tbl_t *fwcfg_cmd;
+	struct cmd_tbl *fwcfg_cmd;
 
 	if (!qemu_fwcfg_present()) {
 		printf("QEMU fw_cfg interface not found\n");
diff --git a/cmd/read.c b/cmd/read.c
index 82c2d9ad99..34f53f9a29 100644
--- a/cmd/read.c
+++ b/cmd/read.c
@@ -12,13 +12,13 @@
 #include <command.h>
 #include <part.h>
 
-int do_read(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_read(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *ep;
 	struct blk_desc *dev_desc = NULL;
 	int dev;
 	int part = 0;
-	disk_partition_t part_info;
+	struct disk_partition part_info;
 	ulong offset = 0u;
 	ulong limit = 0u;
 	void *addr;
diff --git a/cmd/reginfo.c b/cmd/reginfo.c
index de94dd8071..c8a04b1754 100644
--- a/cmd/reginfo.c
+++ b/cmd/reginfo.c
@@ -8,8 +8,8 @@
 #include <command.h>
 #include <asm/ppc.h>
 
-static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_reginfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	print_reginfo();
 
diff --git a/cmd/regulator.c b/cmd/regulator.c
index ed8d778c82..aa06c9a9fc 100644
--- a/cmd/regulator.c
+++ b/cmd/regulator.c
@@ -4,6 +4,7 @@
  * Przemyslaw Marczak <p.marczak@samsung.com>
  */
 #include <common.h>
+#include <command.h>
 #include <errno.h>
 #include <dm.h>
 #include <dm/uclass-internal.h>
@@ -22,7 +23,7 @@ static int failure(int ret)
 	return CMD_RET_FAILURE;
 }
 
-static int do_dev(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dev(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
 	const char *name;
@@ -82,7 +83,8 @@ static int curr_dev_and_platdata(struct udevice **devp,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_list(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_list(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
 	struct udevice *dev;
@@ -137,7 +139,8 @@ static const char *get_mode_name(struct dm_regulator_mode *mode,
 	return NULL;
 }
 
-static int do_info(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_info(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -231,7 +234,8 @@ static void do_status_line(struct udevice *dev)
 	printf("\n");
 }
 
-static int do_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_status(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	struct dm_regulator_uclass_platdata *uc_pdata;
 	struct udevice *dev;
@@ -255,7 +259,8 @@ static int do_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_value(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_value(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -304,7 +309,8 @@ static int do_value(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_current(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_current(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -343,7 +349,8 @@ static int do_current(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_mode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mode(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -378,7 +385,8 @@ static int do_mode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_enable(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -397,7 +405,8 @@ static int do_enable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static int do_disable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_disable(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct udevice *dev;
 	struct dm_regulator_uclass_platdata *uc_pdata;
@@ -416,7 +425,7 @@ static int do_disable(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-static cmd_tbl_t subcmd[] = {
+static struct cmd_tbl subcmd[] = {
 	U_BOOT_CMD_MKENT(dev, 2, 1, do_dev, "", ""),
 	U_BOOT_CMD_MKENT(list, 1, 1, do_list, "", ""),
 	U_BOOT_CMD_MKENT(info, 2, 1, do_info, "", ""),
@@ -428,10 +437,10 @@ static cmd_tbl_t subcmd[] = {
 	U_BOOT_CMD_MKENT(disable, 1, 1, do_disable, "", ""),
 };
 
-static int do_regulator(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_regulator(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
-	cmd_tbl_t *cmd;
+	struct cmd_tbl *cmd;
 
 	argc--;
 	argv++;
diff --git a/cmd/reiser.c b/cmd/reiser.c
index 598fab48b3..3db926f806 100644
--- a/cmd/reiser.c
+++ b/cmd/reiser.c
@@ -30,12 +30,12 @@
 #define PRINTF(fmt,args...)
 #endif
 
-int do_reiserls (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reiserls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename = "/";
 	int dev, part;
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 
 	if (argc < 3)
 		return CMD_RET_USAGE;
@@ -76,12 +76,12 @@ U_BOOT_CMD(
 /******************************************************************************
  * Reiserfs boot command intepreter. Derived from diskboot
  */
-int do_reiserload (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reiserload(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename = NULL;
 	int dev, part;
 	ulong addr = 0, filelen;
-	disk_partition_t info;
+	struct disk_partition info;
 	struct blk_desc *dev_desc = NULL;
 	unsigned long count;
 	char *addr_str;
diff --git a/cmd/remoteproc.c b/cmd/remoteproc.c
index da6f3fc8cc..e8b9178e74 100644
--- a/cmd/remoteproc.c
+++ b/cmd/remoteproc.c
@@ -69,7 +69,7 @@ static int print_remoteproc_list(void)
  *
  * Return: 0 if no error, else returns appropriate error value.
  */
-static int do_rproc_init(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_rproc_init(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	int id;
@@ -102,7 +102,7 @@ static int do_rproc_init(cmd_tbl_t *cmdtp, int flag, int argc,
  *
  * Return: 0 if no error, else returns appropriate error value.
  */
-static int do_remoteproc_list(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_remoteproc_list(struct cmd_tbl *cmdtp, int flag, int argc,
 			      char *const argv[])
 {
 	if (print_remoteproc_list())
@@ -120,7 +120,7 @@ static int do_remoteproc_list(cmd_tbl_t *cmdtp, int flag, int argc,
  *
  * Return: 0 if no error, else returns appropriate error value.
  */
-static int do_remoteproc_load(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_remoteproc_load(struct cmd_tbl *cmdtp, int flag, int argc,
 			      char *const argv[])
 {
 	ulong addr, size;
@@ -159,7 +159,7 @@ static int do_remoteproc_load(cmd_tbl_t *cmdtp, int flag, int argc,
  *
  * Return: 0 if no error, else returns appropriate error value.
  */
-static int do_remoteproc_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_remoteproc_wrapper(struct cmd_tbl *cmdtp, int flag, int argc,
 				 char *const argv[])
 {
 	int id, ret = CMD_RET_USAGE;
@@ -201,7 +201,7 @@ static int do_remoteproc_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret ? CMD_RET_FAILURE : 0;
 }
 
-static cmd_tbl_t cmd_remoteproc_sub[] = {
+static struct cmd_tbl cmd_remoteproc_sub[] = {
 	U_BOOT_CMD_MKENT(init, 1, 1, do_rproc_init,
 			 "Enumerate and initialize the remote processor(s)",
 			 "id - ID of the remote processor\n"
@@ -242,10 +242,10 @@ static cmd_tbl_t cmd_remoteproc_sub[] = {
  *
  * Return: 0 if no error, else returns appropriate error value.
  */
-static int do_remoteproc(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_remoteproc(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
-	cmd_tbl_t *c = NULL;
+	struct cmd_tbl *c = NULL;
 
 	/* Strip off leading 'rproc' command argument */
 	argc--;
diff --git a/cmd/riscv/exception.c b/cmd/riscv/exception.c
index 547fb7d132..3c8dbbec0e 100644
--- a/cmd/riscv/exception.c
+++ b/cmd/riscv/exception.c
@@ -8,14 +8,14 @@
 #include <common.h>
 #include <command.h>
 
-static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	asm volatile (".word 0xffffffff\n");
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_sub[] = {
+static struct cmd_tbl cmd_sub[] = {
 	U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
 			 "", ""),
 };
diff --git a/cmd/rng.c b/cmd/rng.c
index 76367fed94..9747c11be4 100644
--- a/cmd/rng.c
+++ b/cmd/rng.c
@@ -11,7 +11,7 @@
 #include <malloc.h>
 #include <rng.h>
 
-static int do_rng(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_rng(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	size_t n = 0x40;
 	struct udevice *dev;
diff --git a/cmd/rockusb.c b/cmd/rockusb.c
index 9b70c6a6af..f181ec6111 100644
--- a/cmd/rockusb.c
+++ b/cmd/rockusb.c
@@ -10,7 +10,8 @@
 #include <usb.h>
 #include <asm/arch-rockchip/f_rockusb.h>
 
-static int do_rockusb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_rockusb(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int controller_index, dev_index;
 	char *usb_controller;
diff --git a/cmd/sata.c b/cmd/sata.c
index 6bdb516cb5..aa396c1bbd 100644
--- a/cmd/sata.c
+++ b/cmd/sata.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <ahci.h>
+#include <blk.h>
 #include <dm.h>
 #include <command.h>
 #include <part.h>
@@ -78,7 +79,8 @@ int sata_probe(int devnum)
 #endif
 }
 
-static int do_sata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sata(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int rc = 0;
 
diff --git a/cmd/sb.c b/cmd/sb.c
index 5701e03797..f7eb921f43 100644
--- a/cmd/sb.c
+++ b/cmd/sb.c
@@ -5,11 +5,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <spl.h>
 #include <asm/state.h>
 
-static int do_sb_handoff(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_sb_handoff(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 #if CONFIG_IS_ENABLED(HANDOFF)
@@ -26,8 +27,8 @@ static int do_sb_handoff(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif
 }
 
-static int do_sb_state(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_sb_state(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	struct sandbox_state *state;
 
@@ -37,14 +38,14 @@ static int do_sb_state(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static cmd_tbl_t cmd_sb_sub[] = {
+static struct cmd_tbl cmd_sb_sub[] = {
 	U_BOOT_CMD_MKENT(handoff, 1, 0, do_sb_handoff, "", ""),
 	U_BOOT_CMD_MKENT(state, 1, 0, do_sb_state, "", ""),
 };
 
-static int do_sb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	/* Skip past 'sb' */
 	argc--;
diff --git a/cmd/scsi.c b/cmd/scsi.c
index 67de1a3bdc..5f710d2895 100644
--- a/cmd/scsi.c
+++ b/cmd/scsi.c
@@ -8,6 +8,7 @@
  * SCSI support.
  */
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <scsi.h>
 
@@ -16,7 +17,8 @@ static int scsi_curr_dev; /* current device */
 /*
  * scsi boot command intepreter. Derived from diskboot
  */
-static int do_scsiboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_scsiboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	return common_diskboot(cmdtp, "scsi", argc, argv);
 }
@@ -24,7 +26,8 @@ static int do_scsiboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 /*
  * scsi command intepreter
  */
-static int do_scsi(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_scsi(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	int ret;
 
diff --git a/cmd/setexpr.c b/cmd/setexpr.c
index 0182f19938..770dc24d2b 100644
--- a/cmd/setexpr.c
+++ b/cmd/setexpr.c
@@ -12,6 +12,7 @@
 #include <config.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <mapmem.h>
 
 static ulong get_arg(char *s, int w)
@@ -290,7 +291,8 @@ static int regex_sub(const char *name,
 }
 #endif
 
-static int do_setexpr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_setexpr(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	ulong a, b;
 	ulong value;
diff --git a/cmd/sf.c b/cmd/sf.c
index e993b3e5ad..d18f6a888c 100644
--- a/cmd/sf.c
+++ b/cmd/sf.c
@@ -6,12 +6,16 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <div64.h>
 #include <dm.h>
+#include <flash.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <spi.h>
 #include <spi_flash.h>
+#include <asm/cache.h>
 #include <jffs2/jffs2.h>
 #include <linux/mtd/mtd.h>
 
@@ -79,7 +83,7 @@ static ulong bytes_per_second(unsigned int len, ulong start_ms)
 		return 1024 * len / max(get_timer(start_ms), 1UL);
 }
 
-static int do_spi_flash_probe(int argc, char * const argv[])
+static int do_spi_flash_probe(int argc, char *const argv[])
 {
 	unsigned int bus = CONFIG_SF_DEFAULT_BUS;
 	unsigned int cs = CONFIG_SF_DEFAULT_CS;
@@ -141,13 +145,10 @@ static int do_spi_flash_probe(int argc, char * const argv[])
 
 	new = spi_flash_probe(bus, cs, speed, mode);
 	flash = new;
-
 	if (!new) {
 		printf("Failed to initialize SPI flash at %u:%u\n", bus, cs);
 		return 1;
 	}
-
-	flash = new;
 #endif
 
 	return 0;
@@ -259,7 +260,7 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset,
 	return 0;
 }
 
-static int do_spi_flash_read_write(int argc, char * const argv[])
+static int do_spi_flash_read_write(int argc, char *const argv[])
 {
 	unsigned long addr;
 	void *buf;
@@ -317,7 +318,7 @@ static int do_spi_flash_read_write(int argc, char * const argv[])
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_spi_flash_erase(int argc, char * const argv[])
+static int do_spi_flash_erase(int argc, char *const argv[])
 {
 	int ret;
 	int dev = 0;
@@ -349,7 +350,7 @@ static int do_spi_flash_erase(int argc, char * const argv[])
 	return ret == 0 ? 0 : 1;
 }
 
-static int do_spi_protect(int argc, char * const argv[])
+static int do_spi_protect(int argc, char *const argv[])
 {
 	int ret = 0;
 	loff_t start, len;
@@ -498,7 +499,7 @@ static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len,
 	return 0;
 }
 
-static int do_spi_flash_test(int argc, char * const argv[])
+static int do_spi_flash_test(int argc, char *const argv[])
 {
 	unsigned long offset;
 	unsigned long len;
@@ -542,8 +543,8 @@ static int do_spi_flash_test(int argc, char * const argv[])
 }
 #endif /* CONFIG_CMD_SF_TEST */
 
-static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_spi_flash(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	const char *cmd;
 	int ret;
diff --git a/cmd/sha1sum.c b/cmd/sha1sum.c
index 3c50fc27ce..bcc665a5a6 100644
--- a/cmd/sha1sum.c
+++ b/cmd/sha1sum.c
@@ -12,7 +12,7 @@
 #include <hash.h>
 #include <u-boot/sha1.h>
 
-int do_sha1sum(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_sha1sum(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int flags = HASH_FLAG_ENV;
 	int ac;
diff --git a/cmd/smccc.c b/cmd/smccc.c
index 8b1475c2fe..0b19f6c68c 100644
--- a/cmd/smccc.c
+++ b/cmd/smccc.c
@@ -10,7 +10,8 @@
 #include <linux/compiler.h>
 #include <linux/psci.h>
 
-static int do_call(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_call(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct arm_smccc_res res;
 
diff --git a/cmd/sound.c b/cmd/sound.c
index 638f29df21..7fc19678ea 100644
--- a/cmd/sound.c
+++ b/cmd/sound.c
@@ -13,7 +13,8 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /* Initilaise sound subsystem */
-static int do_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_init(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	int ret;
@@ -30,7 +31,8 @@ static int do_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 }
 
 /* play sound from buffer */
-static int do_play(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_play(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct udevice *dev;
 	int ret = 0;
@@ -53,15 +55,16 @@ static int do_play(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_sound_sub[] = {
+static struct cmd_tbl cmd_sound_sub[] = {
 	U_BOOT_CMD_MKENT(init, 0, 1, do_init, "", ""),
 	U_BOOT_CMD_MKENT(play, 2, 1, do_play, "", ""),
 };
 
 /* process sound command */
-static int do_sound(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+static int do_sound(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	if (argc < 1)
 		return CMD_RET_USAGE;
diff --git a/cmd/source.c b/cmd/source.c
index 92f8f77ee6..b6c709a3d2 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -18,6 +18,7 @@
 #include <command.h>
 #include <env.h>
 #include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <asm/byteorder.h>
@@ -154,13 +155,14 @@ int image_source_script(ulong addr, const char *fit_uname)
 		return 1;
 	}
 
-	debug ("** Script length: %ld\n", len);
+	debug("** Script length: %ld\n", len);
 	return run_command_list((char *)data, len, 0);
 }
 
 /**************************************************/
 #if defined(CONFIG_CMD_SOURCE)
-static int do_source(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_source(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	ulong addr;
 	int rcode;
@@ -169,16 +171,16 @@ static int do_source(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	/* Find script image */
 	if (argc < 2) {
 		addr = CONFIG_SYS_LOAD_ADDR;
-		debug ("*  source: default load address = 0x%08lx\n", addr);
+		debug("*  source: default load address = 0x%08lx\n", addr);
 #if defined(CONFIG_FIT)
 	} else if (fit_parse_subimage(argv[1], image_load_addr, &addr,
 				      &fit_uname)) {
-		debug ("*  source: subimage '%s' from FIT image at 0x%08lx\n",
-				fit_uname, addr);
+		debug("*  source: subimage '%s' from FIT image at 0x%08lx\n",
+		      fit_uname, addr);
 #endif
 	} else {
 		addr = simple_strtoul(argv[1], NULL, 16);
-		debug ("*  source: cmdline image address = 0x%08lx\n", addr);
+		debug("*  source: cmdline image address = 0x%08lx\n", addr);
 	}
 
 	printf ("## Executing script at %08lx\n", addr);
diff --git a/cmd/spi.c b/cmd/spi.c
index bfa185b6ae..aec912167c 100644
--- a/cmd/spi.c
+++ b/cmd/spi.c
@@ -97,7 +97,7 @@ done:
  * The command prints out the hexadecimal string received via SPI.
  */
 
-int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_spi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char  *cp = 0;
 	uchar tmp;
diff --git a/cmd/spl.c b/cmd/spl.c
index 56051b8a4b..28b40dd31e 100644
--- a/cmd/spl.c
+++ b/cmd/spl.c
@@ -8,6 +8,8 @@
 #include <command.h>
 #include <cmd_spl.h>
 #include <env.h>
+#include <image.h>
+#include <log.h>
 #include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -49,7 +51,7 @@ static const char **subcmd_list[] = {
 };
 
 /* Calls bootm with the parameters given */
-static int call_bootm(int argc, char * const argv[], const char *subcommand[])
+static int call_bootm(int argc, char *const argv[], const char *subcommand[])
 {
 	char *bootm_argv[5];
 
@@ -95,14 +97,15 @@ static int call_bootm(int argc, char * const argv[], const char *subcommand[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_spl_export_sub[] = {
+static struct cmd_tbl cmd_spl_export_sub[] = {
 	U_BOOT_CMD_MKENT(fdt, 0, 1, (void *)SPL_EXPORT_FDT, "", ""),
 	U_BOOT_CMD_MKENT(atags, 0, 1, (void *)SPL_EXPORT_ATAGS, "", ""),
 };
 
-static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int spl_export(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
-	const cmd_tbl_t *c;
+	const struct cmd_tbl *c;
 
 	if (argc < 2) /* no subcommand */
 		return cmd_usage(cmdtp);
@@ -141,13 +144,13 @@ static int spl_export(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static cmd_tbl_t cmd_spl_sub[] = {
+static struct cmd_tbl cmd_spl_sub[] = {
 	U_BOOT_CMD_MKENT(export, 0, 1, (void *)SPL_EXPORT, "", ""),
 };
 
-static int do_spl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_spl(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	const cmd_tbl_t *c;
+	const struct cmd_tbl *c;
 	int cmd;
 
 	if (argc < 2) /* no subcommand */
diff --git a/cmd/strings.c b/cmd/strings.c
index 41b1665926..85fdc34f08 100644
--- a/cmd/strings.c
+++ b/cmd/strings.c
@@ -12,7 +12,7 @@
 
 static char *start_addr, *last_addr;
 
-int do_strings(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_strings(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc == 1)
 		return CMD_RET_USAGE;
diff --git a/cmd/sysboot.c b/cmd/sysboot.c
index 793d67d2f5..af6a2f1b7f 100644
--- a/cmd/sysboot.c
+++ b/cmd/sysboot.c
@@ -8,7 +8,8 @@
 
 static char *fs_argv[5];
 
-static int do_get_ext2(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
+static int do_get_ext2(struct cmd_tbl *cmdtp, const char *file_path,
+		       char *file_addr)
 {
 #ifdef CONFIG_CMD_EXT2
 	fs_argv[0] = "ext2load";
@@ -21,7 +22,8 @@ static int do_get_ext2(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
 	return -ENOENT;
 }
 
-static int do_get_fat(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
+static int do_get_fat(struct cmd_tbl *cmdtp, const char *file_path,
+		      char *file_addr)
 {
 #ifdef CONFIG_CMD_FAT
 	fs_argv[0] = "fatload";
@@ -34,7 +36,8 @@ static int do_get_fat(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
 	return -ENOENT;
 }
 
-static int do_get_any(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
+static int do_get_any(struct cmd_tbl *cmdtp, const char *file_path,
+		      char *file_addr)
 {
 #ifdef CONFIG_CMD_FS_GENERIC
 	fs_argv[0] = "load";
@@ -52,7 +55,8 @@ static int do_get_any(cmd_tbl_t *cmdtp, const char *file_path, char *file_addr)
  *
  * Returns 0 on success, 1 on error.
  */
-static int do_sysboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sysboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	unsigned long pxefile_addr_r;
 	struct pxe_menu *cfg;
diff --git a/cmd/terminal.c b/cmd/terminal.c
index e1ec66ed71..f6e4d2539e 100644
--- a/cmd/terminal.c
+++ b/cmd/terminal.c
@@ -12,7 +12,7 @@
 #include <stdio_dev.h>
 #include <serial.h>
 
-int do_terminal(cmd_tbl_t * cmd, int flag, int argc, char * const argv[])
+int do_terminal(struct cmd_tbl *cmd, int flag, int argc, char *const argv[])
 {
 	int last_tilde = 0;
 	struct stdio_dev *dev = NULL;
diff --git a/cmd/test.c b/cmd/test.c
index 258bfd8806..fa7c48fb9f 100644
--- a/cmd/test.c
+++ b/cmd/test.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <command.h>
 #include <fs.h>
+#include <log.h>
 
 #define OP_INVALID	0
 #define OP_NOT		1
@@ -50,7 +51,8 @@ const struct {
 	{0, "-e", OP_FILE_EXISTS, 4},
 };
 
-static int do_test(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_test(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	char * const *ap;
 	int i, op, left, adv, expr, last_expr, last_unop, last_binop;
@@ -190,7 +192,8 @@ U_BOOT_CMD(
 	"[args..]"
 );
 
-static int do_false(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_false(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	return 1;
 }
@@ -201,7 +204,8 @@ U_BOOT_CMD(
 	NULL
 );
 
-static int do_true(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_true(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	return 0;
 }
diff --git a/cmd/thordown.c b/cmd/thordown.c
index 8dae024e31..ae20dddfdd 100644
--- a/cmd/thordown.c
+++ b/cmd/thordown.c
@@ -7,12 +7,13 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <thor.h>
 #include <dfu.h>
 #include <g_dnl.h>
 #include <usb.h>
 
-int do_thor_down(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_thor_down(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc < 4)
 		return CMD_RET_USAGE;
diff --git a/cmd/ti/ddr3.c b/cmd/ti/ddr3.c
index a452fe7876..623b63b0f9 100644
--- a/cmd/ti/ddr3.c
+++ b/cmd/ti/ddr3.c
@@ -6,7 +6,9 @@
  */
 
 #include <cpu_func.h>
+#include <env.h>
 #include <init.h>
+#include <log.h>
 #include <asm/arch/hardware.h>
 #include <asm/cache.h>
 #include <asm/emif.h>
@@ -276,8 +278,8 @@ static int is_ecc_enabled(void)
 		(ecc_ctrl & EMIF_ECC_REG_RMW_EN_MASK);
 }
 
-static int do_ddr_test(cmd_tbl_t *cmdtp,
-		       int flag, int argc, char * const argv[])
+static int do_ddr_test(struct cmd_tbl *cmdtp,
+		       int flag, int argc, char *const argv[])
 {
 	u32 start_addr, end_addr, size, ecc_err;
 
diff --git a/cmd/time.c b/cmd/time.c
index 51cde9749f..db8c1892df 100644
--- a/cmd/time.c
+++ b/cmd/time.c
@@ -24,7 +24,8 @@ static void report_time(ulong cycles)
 	printf(" %lu.%03lu seconds\n", seconds, milliseconds);
 }
 
-static int do_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_time(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	ulong cycles = 0;
 	int retval = 0;
diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 211ab2680f..eab0531c96 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -15,6 +15,8 @@
 #include <i2c.h>
 #include <i2c_eeprom.h>
 #include <env.h>
+#include <init.h>
+#include <net.h>
 #include <linux/ctype.h>
 #include <u-boot/crc.h>
 
@@ -423,7 +425,7 @@ void show_tlv_code_list(void)
  *
  *  This function implements the tlv_eeprom command.
  */
-int do_tlv_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_tlv_eeprom(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char cmd;
 	struct tlvinfo_header *eeprom_hdr = to_header(eeprom);
diff --git a/cmd/tpm-common.c b/cmd/tpm-common.c
index 3014255229..88c9e08e31 100644
--- a/cmd/tpm-common.c
+++ b/cmd/tpm-common.c
@@ -296,7 +296,7 @@ int get_tpm(struct udevice **devp)
 	return 0;
 }
 
-int do_tpm_device(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_tpm_device(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long num;
 	int rc;
@@ -314,7 +314,7 @@ int do_tpm_device(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return rc;
 }
 
-int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_tpm_info(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *dev;
 	char buf[80];
@@ -333,7 +333,7 @@ int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_tpm_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_tpm_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct udevice *dev;
 	int rc;
@@ -347,9 +347,9 @@ int do_tpm_init(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return report_return_code(tpm_init(dev));
 }
 
-int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_tpm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *tpm_commands, *cmd;
+	struct cmd_tbl *tpm_commands, *cmd;
 	struct tpm_chip_priv *priv;
 	struct udevice *dev;
 	unsigned int size;
diff --git a/cmd/tpm-user-utils.h b/cmd/tpm-user-utils.h
index a851d9c4af..358ddff576 100644
--- a/cmd/tpm-user-utils.h
+++ b/cmd/tpm-user-utils.h
@@ -17,9 +17,10 @@ int type_string_pack(const char *type_str, char * const values[], u8 *data);
 int type_string_write_vars(const char *type_str, u8 *data, char * const vars[]);
 int get_tpm(struct udevice **devp);
 
-int do_tpm_device(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_tpm_init(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_tpm_info(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_tpm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_tpm_device(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
+int do_tpm_init(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_tpm_info(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_tpm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 #endif /* __TPM_USER_UTILS_H */
diff --git a/cmd/tpm-v1.c b/cmd/tpm-v1.c
index bc34e0654f..0e2168aea6 100644
--- a/cmd/tpm-v1.c
+++ b/cmd/tpm-v1.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
 #include <malloc.h>
 #include <asm/unaligned.h>
@@ -11,8 +12,8 @@
 #include <tpm-v1.h>
 #include "tpm-user-utils.h"
 
-static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_tpm_startup(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	enum tpm_startup_type mode;
 	struct udevice *dev;
@@ -37,8 +38,8 @@ static int do_tpm_startup(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm_startup(dev, mode));
 }
 
-static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag, int argc,
-				  char * const argv[])
+static int do_tpm_nv_define_space(struct cmd_tbl *cmdtp, int flag, int argc,
+				  char *const argv[])
 {
 	u32 index, perm, size;
 	struct udevice *dev;
@@ -57,8 +58,8 @@ static int do_tpm_nv_define_space(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm_nv_define_space(dev, index, perm, size));
 }
 
-static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_tpm_nv_read_value(struct cmd_tbl *cmdtp, int flag, int argc,
+				char *const argv[])
 {
 	u32 index, count, rc;
 	struct udevice *dev;
@@ -83,8 +84,8 @@ static int do_tpm_nv_read_value(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag, int argc,
-				 char * const argv[])
+static int do_tpm_nv_write_value(struct cmd_tbl *cmdtp, int flag, int argc,
+				 char *const argv[])
 {
 	struct udevice *dev;
 	u32 index, rc;
@@ -110,8 +111,8 @@ static int do_tpm_nv_write_value(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_tpm_extend(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	u8 in_digest[20], out_digest[20];
 	struct udevice *dev;
@@ -138,8 +139,8 @@ static int do_tpm_extend(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_tpm_pcr_read(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	u32 index, count, rc;
 	struct udevice *dev;
@@ -164,8 +165,8 @@ static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_tsc_physical_presence(cmd_tbl_t *cmdtp, int flag, int argc,
-					char * const argv[])
+static int do_tpm_tsc_physical_presence(struct cmd_tbl *cmdtp, int flag,
+					int argc, char *const argv[])
 {
 	struct udevice *dev;
 	u16 presence;
@@ -182,8 +183,8 @@ static int do_tpm_tsc_physical_presence(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm_tsc_physical_presence(dev, presence));
 }
 
-static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag, int argc,
-			     char * const argv[])
+static int do_tpm_read_pubek(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	struct udevice *dev;
 	u32 count, rc;
@@ -207,8 +208,8 @@ static int do_tpm_read_pubek(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_physical_set_deactivated(cmd_tbl_t *cmdtp, int flag, int argc,
-					   char * const argv[])
+static int do_tpm_physical_set_deactivated(struct cmd_tbl *cmdtp, int flag,
+					   int argc, char *const argv[])
 {
 	struct udevice *dev;
 	u8 state;
@@ -225,8 +226,8 @@ static int do_tpm_physical_set_deactivated(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm_physical_set_deactivated(dev, state));
 }
 
-static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, int argc,
-				 char * const argv[])
+static int do_tpm_get_capability(struct cmd_tbl *cmdtp, int flag, int argc,
+				 char *const argv[])
 {
 	u32 cap_area, sub_cap, rc;
 	void *cap;
@@ -253,8 +254,8 @@ static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag, int argc,
-			       char * const argv[])
+static int do_tpm_raw_transfer(struct cmd_tbl *cmdtp, int flag, int argc,
+			       char *const argv[])
 {
 	struct udevice *dev;
 	void *command;
@@ -282,8 +283,8 @@ static int do_tpm_raw_transfer(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char * const argv[])
+static int do_tpm_nv_define(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	u32 index, perm, size;
 	struct udevice *dev;
@@ -306,8 +307,8 @@ static int do_tpm_nv_define(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm_nv_define_space(dev, index, perm, size));
 }
 
-static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_tpm_nv_read(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	u32 index, count, err;
 	struct udevice *dev;
@@ -341,8 +342,8 @@ static int do_tpm_nv_read(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(err);
 }
 
-static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_tpm_nv_write(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	u32 index, count, err;
 	struct udevice *dev;
@@ -377,8 +378,8 @@ static int do_tpm_nv_write(cmd_tbl_t *cmdtp, int flag, int argc,
 
 #ifdef CONFIG_TPM_AUTH_SESSIONS
 
-static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_tpm_oiap(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	u32 auth_handle, err;
 	struct udevice *dev;
@@ -394,8 +395,8 @@ static int do_tpm_oiap(cmd_tbl_t *cmdtp, int flag, int argc,
 }
 
 #ifdef CONFIG_TPM_LOAD_KEY_BY_SHA1
-static int do_tpm_load_key_by_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char *
-				   const argv[])
+static int do_tpm_load_key_by_sha1(struct cmd_tbl *cmdtp, int flag, int argc,
+				   char *const argv[])
 {
 	u32 parent_handle = 0;
 	u32 key_len, key_handle, err;
@@ -437,8 +438,8 @@ static int do_tpm_load_key_by_sha1(cmd_tbl_t *cmdtp, int flag, int argc, char *
 }
 #endif /* CONFIG_TPM_LOAD_KEY_BY_SHA1 */
 
-static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag, int argc,
-				 char * const argv[])
+static int do_tpm_load_key2_oiap(struct cmd_tbl *cmdtp, int flag, int argc,
+				 char *const argv[])
 {
 	u32 parent_handle, key_len, key_handle, err;
 	u8 usage_auth[DIGEST_LENGTH];
@@ -468,8 +469,8 @@ static int do_tpm_load_key2_oiap(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(err);
 }
 
-static int do_tpm_get_pub_key_oiap(cmd_tbl_t *cmdtp, int flag, int argc,
-				   char * const argv[])
+static int do_tpm_get_pub_key_oiap(struct cmd_tbl *cmdtp, int flag, int argc,
+				   char *const argv[])
 {
 	u32 key_handle, err;
 	u8 usage_auth[DIGEST_LENGTH];
@@ -504,8 +505,8 @@ TPM_COMMAND_NO_ARG(tpm_end_oiap)
 #endif /* CONFIG_TPM_AUTH_SESSIONS */
 
 #ifdef CONFIG_TPM_FLUSH_RESOURCES
-static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_tpm_flush(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	struct udevice *dev;
 	int type = 0;
@@ -577,8 +578,8 @@ static int do_tpm_flush(cmd_tbl_t *cmdtp, int flag, int argc,
 #endif /* CONFIG_TPM_FLUSH_RESOURCES */
 
 #ifdef CONFIG_TPM_LIST_RESOURCES
-static int do_tpm_list(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_tpm_list(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	int type = 0;
 	u16 res_count;
@@ -644,7 +645,7 @@ TPM_COMMAND_NO_ARG(tpm_force_clear)
 TPM_COMMAND_NO_ARG(tpm_physical_enable)
 TPM_COMMAND_NO_ARG(tpm_physical_disable)
 
-static cmd_tbl_t tpm1_commands[] = {
+static struct cmd_tbl tpm1_commands[] = {
 	U_BOOT_CMD_MKENT(device, 0, 1, do_tpm_device, "", ""),
 	U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""),
 	U_BOOT_CMD_MKENT(init, 0, 1, do_tpm_init, "", ""),
@@ -710,7 +711,7 @@ static cmd_tbl_t tpm1_commands[] = {
 #endif /* CONFIG_TPM_LIST_RESOURCES */
 };
 
-cmd_tbl_t *get_tpm1_commands(unsigned int *size)
+struct cmd_tbl *get_tpm1_commands(unsigned int *size)
 {
 	*size = ARRAY_SIZE(tpm1_commands);
 
diff --git a/cmd/tpm-v2.c b/cmd/tpm-v2.c
index 0cd39821bf..e6742656f5 100644
--- a/cmd/tpm-v2.c
+++ b/cmd/tpm-v2.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <log.h>
 #include <mapmem.h>
@@ -12,8 +13,8 @@
 #include <tpm-v2.h>
 #include "tpm-user-utils.h"
 
-static int do_tpm2_startup(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_tpm2_startup(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	enum tpm2_startup_types mode;
 	struct udevice *dev;
@@ -37,8 +38,8 @@ static int do_tpm2_startup(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm2_startup(dev, mode));
 }
 
-static int do_tpm2_self_test(cmd_tbl_t *cmdtp, int flag, int argc,
-			     char * const argv[])
+static int do_tpm2_self_test(struct cmd_tbl *cmdtp, int flag, int argc,
+			     char *const argv[])
 {
 	enum tpm2_yes_no full_test;
 	struct udevice *dev;
@@ -62,8 +63,8 @@ static int do_tpm2_self_test(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm2_self_test(dev, full_test));
 }
 
-static int do_tpm2_clear(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int do_tpm2_clear(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	u32 handle = 0;
 	const char *pw = (argc < 3) ? NULL : argv[2];
@@ -91,8 +92,8 @@ static int do_tpm2_clear(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm2_clear(dev, handle, pw, pw_sz));
 }
 
-static int do_tpm2_pcr_extend(cmd_tbl_t *cmdtp, int flag, int argc,
-			      char * const argv[])
+static int do_tpm2_pcr_extend(struct cmd_tbl *cmdtp, int flag, int argc,
+			      char *const argv[])
 {
 	struct udevice *dev;
 	struct tpm_chip_priv *priv;
@@ -122,8 +123,8 @@ static int do_tpm2_pcr_extend(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+static int do_tpm_pcr_read(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	struct udevice *dev;
 	struct tpm_chip_priv *priv;
@@ -160,8 +161,8 @@ static int do_tpm_pcr_read(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(rc);
 }
 
-static int do_tpm_get_capability(cmd_tbl_t *cmdtp, int flag, int argc,
-				 char * const argv[])
+static int do_tpm_get_capability(struct cmd_tbl *cmdtp, int flag, int argc,
+				 char *const argv[])
 {
 	u32 capability, property, rc;
 	u8 *data;
@@ -203,7 +204,7 @@ unmap_data:
 	return report_return_code(rc);
 }
 
-static int do_tpm_dam_reset(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_tpm_dam_reset(struct cmd_tbl *cmdtp, int flag, int argc,
 			    char *const argv[])
 {
 	const char *pw = (argc < 2) ? NULL : argv[1];
@@ -224,7 +225,7 @@ static int do_tpm_dam_reset(cmd_tbl_t *cmdtp, int flag, int argc,
 	return report_return_code(tpm2_dam_reset(dev, pw, pw_sz));
 }
 
-static int do_tpm_dam_parameters(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_tpm_dam_parameters(struct cmd_tbl *cmdtp, int flag, int argc,
 				 char *const argv[])
 {
 	const char *pw = (argc < 5) ? NULL : argv[4];
@@ -268,7 +269,7 @@ static int do_tpm_dam_parameters(cmd_tbl_t *cmdtp, int flag, int argc,
 						      lockout_recovery));
 }
 
-static int do_tpm_change_auth(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_tpm_change_auth(struct cmd_tbl *cmdtp, int flag, int argc,
 			      char *const argv[])
 {
 	u32 handle;
@@ -304,8 +305,8 @@ static int do_tpm_change_auth(cmd_tbl_t *cmdtp, int flag, int argc,
 						   oldpw, oldpw_sz));
 }
 
-static int do_tpm_pcr_setauthpolicy(cmd_tbl_t *cmdtp, int flag, int argc,
-				    char * const argv[])
+static int do_tpm_pcr_setauthpolicy(struct cmd_tbl *cmdtp, int flag, int argc,
+				    char *const argv[])
 {
 	u32 index = simple_strtoul(argv[1], NULL, 0);
 	char *key = argv[2];
@@ -328,8 +329,8 @@ static int do_tpm_pcr_setauthpolicy(cmd_tbl_t *cmdtp, int flag, int argc,
 							 key));
 }
 
-static int do_tpm_pcr_setauthvalue(cmd_tbl_t *cmdtp, int flag,
-				   int argc, char * const argv[])
+static int do_tpm_pcr_setauthvalue(struct cmd_tbl *cmdtp, int flag,
+				   int argc, char *const argv[])
 {
 	u32 index = simple_strtoul(argv[1], NULL, 0);
 	char *key = argv[2];
@@ -353,7 +354,7 @@ static int do_tpm_pcr_setauthvalue(cmd_tbl_t *cmdtp, int flag,
 							key, key_sz));
 }
 
-static cmd_tbl_t tpm2_commands[] = {
+static struct cmd_tbl tpm2_commands[] = {
 	U_BOOT_CMD_MKENT(device, 0, 1, do_tpm_device, "", ""),
 	U_BOOT_CMD_MKENT(info, 0, 1, do_tpm_info, "", ""),
 	U_BOOT_CMD_MKENT(init, 0, 1, do_tpm_init, "", ""),
@@ -372,7 +373,7 @@ static cmd_tbl_t tpm2_commands[] = {
 			 do_tpm_pcr_setauthvalue, "", ""),
 };
 
-cmd_tbl_t *get_tpm2_commands(unsigned int *size)
+struct cmd_tbl *get_tpm2_commands(unsigned int *size)
 {
 	*size = ARRAY_SIZE(tpm2_commands);
 
diff --git a/cmd/tpm_test.c b/cmd/tpm_test.c
index 2cde517d7a..ebfb25cab0 100644
--- a/cmd/tpm_test.c
+++ b/cmd/tpm_test.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <tpm-v1.h>
 #include "tpm-user-utils.h"
 
@@ -483,8 +484,8 @@ static int test_write_limit(struct udevice *dev)
 }
 
 #define VOIDTEST(XFUNC) \
-	int do_test_##XFUNC(cmd_tbl_t *cmd_tbl, int flag, int argc, \
-	char * const argv[]) \
+	int do_test_##XFUNC(struct cmd_tbl *cmd_tbl, int flag, int argc, \
+	char *const argv[]) \
 	{ \
 		struct udevice *dev; \
 		int ret; \
@@ -513,7 +514,7 @@ VOIDTEST(timing)
 VOIDTEST(write_limit)
 VOIDTEST(timer)
 
-static cmd_tbl_t cmd_cros_tpm_sub[] = {
+static struct cmd_tbl cmd_cros_tpm_sub[] = {
 	VOIDENT(early_extend)
 	VOIDENT(early_nvram)
 	VOIDENT(early_nvram2)
@@ -530,9 +531,10 @@ static cmd_tbl_t cmd_cros_tpm_sub[] = {
 	VOIDENT(timer)
 };
 
-static int do_tpmtest(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_tpmtest(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 	int i;
 
 	printf("argc = %d, argv = ", argc);
diff --git a/cmd/trace.c b/cmd/trace.c
index 392b129536..4ce47c7627 100644
--- a/cmd/trace.c
+++ b/cmd/trace.c
@@ -10,7 +10,7 @@
 #include <trace.h>
 #include <asm/io.h>
 
-static int get_args(int argc, char * const argv[], char **buff,
+static int get_args(int argc, char *const argv[], char **buff,
 		    size_t *buff_ptr, size_t *buff_size)
 {
 	if (argc < 2)
@@ -29,7 +29,7 @@ static int get_args(int argc, char * const argv[], char **buff,
 	return 0;
 }
 
-static int create_func_list(int argc, char * const argv[])
+static int create_func_list(int argc, char *const argv[])
 {
 	size_t buff_size, avail, buff_ptr, needed, used;
 	char *buff;
@@ -52,7 +52,7 @@ static int create_func_list(int argc, char * const argv[])
 	return 0;
 }
 
-static int create_call_list(int argc, char * const argv[])
+static int create_call_list(int argc, char *const argv[])
 {
 	size_t buff_size, avail, buff_ptr, needed, used;
 	char *buff;
@@ -76,7 +76,7 @@ static int create_call_list(int argc, char * const argv[])
 	return 0;
 }
 
-int do_trace(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_trace(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const char *cmd = argc < 2 ? NULL : argv[1];
 
diff --git a/cmd/tsi148.c b/cmd/tsi148.c
index 369a2b5ab3..2eae14f87f 100644
--- a/cmd/tsi148.c
+++ b/cmd/tsi148.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <pci.h>
@@ -382,7 +383,7 @@ int tsi148_vme_crg_window(unsigned int vmeAddr, int vam)
 /*
  * Tundra Tsi148 configuration
  */
-int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_tsi148(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;
 	char cmd = 'x';
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 54d128dbc5..171377cc66 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -528,7 +528,7 @@ int ubi_part(char *part_name, const char *vid_header_offset)
 	return 0;
 }
 
-static int do_ubi(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ubi(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int64_t size = 0;
 	ulong addr = 0;
diff --git a/cmd/ubifs.c b/cmd/ubifs.c
index e4000b7ad1..a26b653d61 100644
--- a/cmd/ubifs.c
+++ b/cmd/ubifs.c
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <config.h>
 #include <command.h>
+#include <log.h>
 #include <ubifs_uboot.h>
 
 static int ubifs_initialized;
@@ -38,8 +39,9 @@ int cmd_ubifs_mount(char *vol_name)
 
 	return ret;
 }
-static int do_ubifs_mount(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+
+static int do_ubifs_mount(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	char *vol_name;
 
@@ -70,8 +72,8 @@ int cmd_ubifs_umount(void)
 	return 0;
 }
 
-static int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_ubifs_umount(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	if (argc != 1)
 		return CMD_RET_USAGE;
@@ -79,8 +81,8 @@ static int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc,
 	return cmd_ubifs_umount();
 }
 
-static int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_ubifs_ls(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	char *filename = "/";
 	int ret;
@@ -103,8 +105,8 @@ static int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc,
 	return ret;
 }
 
-static int do_ubifs_load(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[])
+static int do_ubifs_load(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	char *filename;
 	char *endp;
diff --git a/cmd/ufs.c b/cmd/ufs.c
index 5b25788656..858cd49b59 100644
--- a/cmd/ufs.c
+++ b/cmd/ufs.c
@@ -9,7 +9,7 @@
 #include <command.h>
 #include <ufs.h>
 
-static int do_ufs(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ufs(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int dev, ret;
 
diff --git a/cmd/universe.c b/cmd/universe.c
index dc9a8b5617..5ff47dde4f 100644
--- a/cmd/universe.c
+++ b/cmd/universe.c
@@ -298,7 +298,7 @@ int universe_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr, int si
 /*
  * Tundra Universe configuration
  */
-int do_universe(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_universe(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, pms = 0, vdw = 0;
 	char cmd = 'x';
diff --git a/cmd/unlz4.c b/cmd/unlz4.c
index 5320b378d3..4ae7f34d36 100644
--- a/cmd/unlz4.c
+++ b/cmd/unlz4.c
@@ -9,7 +9,8 @@
 #include <env.h>
 #include <lz4.h>
 
-static int do_unlz4(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_unlz4(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	unsigned long src, dst;
 	size_t src_len = ~0UL, dst_len = ~0UL;
diff --git a/cmd/unzip.c b/cmd/unzip.c
index afd58e7cdb..9b28328a1d 100644
--- a/cmd/unzip.c
+++ b/cmd/unzip.c
@@ -8,8 +8,10 @@
 #include <command.h>
 #include <env.h>
 #include <gzip.h>
+#include <part.h>
 
-static int do_unzip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_unzip(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	unsigned long src, dst;
 	unsigned long src_len = ~0UL, dst_len = ~0UL;
@@ -41,8 +43,8 @@ U_BOOT_CMD(
 	"srcaddr dstaddr [dstsize]"
 );
 
-static int do_gzwrite(cmd_tbl_t *cmdtp, int flag,
-		      int argc, char * const argv[])
+static int do_gzwrite(struct cmd_tbl *cmdtp, int flag,
+		      int argc, char *const argv[])
 {
 	struct blk_desc *bdev;
 	int ret;
diff --git a/cmd/usb.c b/cmd/usb.c
index dd9ac0bc97..b9ec29a845 100644
--- a/cmd/usb.c
+++ b/cmd/usb.c
@@ -11,6 +11,8 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <bootstage.h>
 #include <command.h>
 #include <console.h>
 #include <dm.h>
@@ -554,7 +556,8 @@ static int usb_test(struct usb_device *dev, int port, char* arg)
  * usb boot command intepreter. Derived from diskboot
  */
 #ifdef CONFIG_USB_STORAGE
-static int do_usbboot(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_usbboot(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	return common_diskboot(cmdtp, "usb", argc, argv);
 }
@@ -623,7 +626,7 @@ static void usb_show_info(struct usb_device *udev)
 /******************************************************************************
  * usb command intepreter
  */
-static int do_usb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_usb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct usb_device *udev = NULL;
 	int i;
diff --git a/cmd/usb_gadget_sdp.c b/cmd/usb_gadget_sdp.c
index 2ead06be9f..1af82e1136 100644
--- a/cmd/usb_gadget_sdp.c
+++ b/cmd/usb_gadget_sdp.c
@@ -7,11 +7,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <g_dnl.h>
 #include <sdp.h>
 #include <usb.h>
 
-static int do_sdp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_sdp(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
diff --git a/cmd/usb_mass_storage.c b/cmd/usb_mass_storage.c
index c5c6899787..d565635c6c 100644
--- a/cmd/usb_mass_storage.c
+++ b/cmd/usb_mass_storage.c
@@ -6,16 +6,18 @@
  * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
  */
 
-#include <errno.h>
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <console.h>
+#include <errno.h>
 #include <g_dnl.h>
 #include <malloc.h>
 #include <part.h>
 #include <usb.h>
 #include <usb_mass_storage.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 
 static int ums_read_sector(struct ums *ums_dev,
 			   ulong start, lbaint_t blkcnt, void *buf)
@@ -55,7 +57,7 @@ static int ums_init(const char *devtype, const char *devnums_part_str)
 {
 	char *s, *t, *devnum_part_str, *name;
 	struct blk_desc *block_dev;
-	disk_partition_t info;
+	struct disk_partition info;
 	int partnum;
 	int ret = -1;
 	struct ums *ums_new;
@@ -134,8 +136,8 @@ cleanup:
 	return ret;
 }
 
-static int do_usb_mass_storage(cmd_tbl_t *cmdtp, int flag,
-			       int argc, char * const argv[])
+static int do_usb_mass_storage(struct cmd_tbl *cmdtp, int flag,
+			       int argc, char *const argv[])
 {
 	const char *usb_controller;
 	const char *devtype;
diff --git a/cmd/version.c b/cmd/version.c
index b2fffe9977..3686b87332 100644
--- a/cmd/version.c
+++ b/cmd/version.c
@@ -14,7 +14,8 @@
 
 const char __weak version_string[] = U_BOOT_VERSION_STRING;
 
-static int do_version(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_version(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	char buf[DISPLAY_OPTIONS_BANNER_LENGTH];
 
diff --git a/cmd/virtio.c b/cmd/virtio.c
index b7082bc63a..3dace5344f 100644
--- a/cmd/virtio.c
+++ b/cmd/virtio.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <dm.h>
 #include <virtio_types.h>
@@ -12,7 +13,8 @@
 
 static int virtio_curr_dev;
 
-static int do_virtio(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_virtio(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	if (argc == 2 && !strcmp(argv[1], "scan")) {
 		/* make sure all virtio devices are enumerated */
diff --git a/cmd/w1.c b/cmd/w1.c
index 9c95fcf9cd..92be1f2531 100644
--- a/cmd/w1.c
+++ b/cmd/w1.c
@@ -103,7 +103,7 @@ static int w1_read(int argc, char *const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-int do_w1(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_w1(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/cmd/wdt.c b/cmd/wdt.c
index 647d9899b4..27410981e7 100644
--- a/cmd/wdt.c
+++ b/cmd/wdt.c
@@ -12,7 +12,7 @@
 
 static struct udevice *currdev;
 
-static int do_wdt_list(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_list(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	struct udevice *dev;
@@ -29,7 +29,7 @@ static int do_wdt_list(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_wdt_dev(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_dev(struct cmd_tbl *cmdtp, int flag, int argc,
 		      char *const argv[])
 {
 	int ret;
@@ -60,7 +60,7 @@ static int check_currdev(void)
 	return 0;
 }
 
-static int do_wdt_start(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_start(struct cmd_tbl *cmdtp, int flag, int argc,
 			char *const argv[])
 {
 	int ret;
@@ -90,7 +90,7 @@ static int do_wdt_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_wdt_stop(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_stop(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	int ret;
@@ -111,7 +111,7 @@ static int do_wdt_stop(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_wdt_reset(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_reset(struct cmd_tbl *cmdtp, int flag, int argc,
 			char *const argv[])
 {
 	int ret;
@@ -132,7 +132,7 @@ static int do_wdt_reset(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_SUCCESS;
 }
 
-static int do_wdt_expire(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_wdt_expire(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	int ret;
diff --git a/cmd/wol.c b/cmd/wol.c
index 8a756f373c..f0d6343227 100644
--- a/cmd/wol.c
+++ b/cmd/wol.c
@@ -14,7 +14,7 @@
 #if defined(CONFIG_CMD_WOL)
 void wol_set_timeout(ulong);
 
-int do_wol(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_wol(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	/* Validate arguments */
 	if (argc < 2)
diff --git a/cmd/x86/exception.c b/cmd/x86/exception.c
index ade1e2ea92..82faaa913e 100644
--- a/cmd/x86/exception.c
+++ b/cmd/x86/exception.c
@@ -8,14 +8,14 @@
 #include <common.h>
 #include <command.h>
 
-static int do_undefined(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+static int do_undefined(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
 	asm volatile (".word 0xffff\n");
 	return CMD_RET_FAILURE;
 }
 
-static cmd_tbl_t cmd_sub[] = {
+static struct cmd_tbl cmd_sub[] = {
 	U_BOOT_CMD_MKENT(undefined, CONFIG_SYS_MAXARGS, 1, do_undefined,
 			 "", ""),
 };
diff --git a/cmd/x86/fsp.c b/cmd/x86/fsp.c
index 6e485fb144..8017eda387 100644
--- a/cmd/x86/fsp.c
+++ b/cmd/x86/fsp.c
@@ -9,7 +9,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_hdr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct fsp_header *hdr;
 	u32 img_addr;
@@ -80,13 +80,13 @@ static int do_hdr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static cmd_tbl_t fsp_commands[] = {
+static struct cmd_tbl fsp_commands[] = {
 	U_BOOT_CMD_MKENT(hdr, 0, 1, do_hdr, "", ""),
 };
 
-static int do_fsp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fsp(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *fsp_cmd;
+	struct cmd_tbl *fsp_cmd;
 	int ret;
 
 	if (argc < 2)
diff --git a/cmd/x86/hob.c b/cmd/x86/hob.c
index 3967a7ca5a..6b1f7bda5b 100644
--- a/cmd/x86/hob.c
+++ b/cmd/x86/hob.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <efi.h>
+#include <uuid.h>
 #include <asm/hob.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -25,7 +26,7 @@ static char *hob_type[] = {
 	"Capsule",
 };
 
-static int do_hob(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_hob(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const struct hob_header *hdr;
 	uint type;
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index d3fd959235..084d7315f4 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <asm/msr.h>
 #include <asm/mtrr.h>
 
@@ -43,7 +44,7 @@ static int do_mtrr_list(void)
 	return 0;
 }
 
-static int do_mtrr_set(uint reg, int argc, char * const argv[])
+static int do_mtrr_set(uint reg, int argc, char *const argv[])
 {
 	const char *typename = argv[0];
 	struct mtrr_state state;
@@ -72,7 +73,6 @@ static int do_mtrr_set(uint reg, int argc, char * const argv[])
 	if (valid)
 		mask |= MTRR_PHYS_MASK_VALID;
 
-	printf("base=%llx, mask=%llx\n", base, mask);
 	mtrr_open(&state, true);
 	wrmsrl(MTRR_PHYS_BASE_MSR(reg), base);
 	wrmsrl(MTRR_PHYS_MASK_MSR(reg), mask);
@@ -98,7 +98,8 @@ static int mtrr_set_valid(int reg, bool valid)
 	return 0;
 }
 
-static int do_mtrr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	const char *cmd;
 	uint reg;
diff --git a/cmd/ximg.c b/cmd/ximg.c
index 770f6a3eed..159ba51648 100644
--- a/cmd/ximg.c
+++ b/cmd/ximg.c
@@ -24,6 +24,7 @@
 #include <bzlib.h>
 #endif
 #include <asm/byteorder.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 
 #ifndef CONFIG_SYS_XIMG_LEN
@@ -32,7 +33,7 @@
 #endif
 
 static int
-do_imgextract(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
+do_imgextract(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong		addr = image_load_addr;
 	ulong		dest = 0;
diff --git a/cmd/yaffs2.c b/cmd/yaffs2.c
index 9244606bda..f29ebcc026 100644
--- a/cmd/yaffs2.c
+++ b/cmd/yaffs2.c
@@ -43,7 +43,7 @@ extern void cmd_yaffs_mv(const char *oldPath, const char *newPath);
 extern int yaffs_dump_dev(const char *path);
 
 /* ytrace - show/set yaffs trace mask */
-int do_ytrace(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ytrace(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	if (argc > 1)
 		cmd_yaffs_tracemask(1, simple_strtol(argv[1], NULL, 16));
@@ -54,7 +54,7 @@ int do_ytrace(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 }
 
 /* ydevls - lists yaffs mount points. */
-int do_ydevls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ydevls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	cmd_yaffs_dev_ls();
 
@@ -62,7 +62,7 @@ int do_ydevls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 }
 
 /* ydevconfig mount_pt mtd_dev_num start_block end_block */
-int do_ydevconfig(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ydevconfig(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *mtpoint;
 	int mtd_dev;
@@ -85,7 +85,7 @@ int do_ydevconfig(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_ymount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ymount(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *mtpoint;
 
@@ -102,7 +102,7 @@ int do_ymount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yumount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yumount(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *mtpoint;
 
@@ -118,7 +118,7 @@ int do_yumount(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *dirname;
 
@@ -134,7 +134,7 @@ int do_yls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yrd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yrd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename;
 
@@ -153,7 +153,7 @@ int do_yrd(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_ywr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ywr(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename;
 	ulong value;
@@ -177,7 +177,7 @@ int do_ywr(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yrdm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yrdm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename;
 	ulong addr;
@@ -195,7 +195,7 @@ int do_yrdm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_ywrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ywrm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *filename;
 	ulong addr;
@@ -215,7 +215,7 @@ int do_ywrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_ymkdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ymkdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *dirname;
 
@@ -230,7 +230,7 @@ int do_ymkdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yrmdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yrmdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *dirname;
 
@@ -245,7 +245,7 @@ int do_yrmdir(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_yrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_yrm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *name;
 
@@ -261,7 +261,7 @@ int do_yrm(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
 	return 0;
 }
 
-int do_ymv(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ymv(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char *oldPath;
 	char *newPath;
diff --git a/cmd/zfs.c b/cmd/zfs.c
index 9c237a5758..e429ac88d7 100644
--- a/cmd/zfs.c
+++ b/cmd/zfs.c
@@ -32,13 +32,14 @@
 #define DOS_FS_TYPE_OFFSET	0x36
 #define DOS_FS32_TYPE_OFFSET	0x52
 
-static int do_zfs_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_zfs_load(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	char *filename = NULL;
 	int dev;
 	int part;
 	ulong addr = 0;
-	disk_partition_t info;
+	struct disk_partition info;
 	struct blk_desc *dev_desc;
 	unsigned long count;
 	const char *addr_str;
@@ -129,13 +130,13 @@ int zfs_print(const char *entry, const struct zfs_dirhook_info *data)
 }
 
 
-
-static int do_zfs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_zfs_ls(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	const char *filename = "/";
 	int part;
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	struct device_s vdev;
 
 	if (argc < 2)
diff --git a/cmd/zip.c b/cmd/zip.c
index 8ef46e9815..8ad3768464 100644
--- a/cmd/zip.c
+++ b/cmd/zip.c
@@ -7,8 +7,9 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <gzip.h>
 
-static int do_zip(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_zip(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	unsigned long src, dst;
 	unsigned long src_len, dst_len = ~0UL;
diff --git a/common/Kconfig b/common/Kconfig
index 30cba15948..2d86dd7e63 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -932,6 +932,16 @@ config LAST_STAGE_INIT
 	  U-Boot calls last_stage_init() before the command-line interpreter is
 	  started.
 
+config PCI_INIT_R
+	bool "Enumerate PCI buses during init"
+	depends on PCI
+	default y if !DM_PCI
+	help
+	  With this option U-Boot will call pci_init() soon after relocation,
+	  which will enumerate PCI buses. This is needed, for instance, in the
+	  case of DM PCI-based Ethernet devices, which will not be detected
+	  without having the enumeration performed earlier.
+
 endmenu
 
 menu "Security support"
diff --git a/common/android_ab.c b/common/android_ab.c
index e0fe32d24d..4943f26d53 100644
--- a/common/android_ab.c
+++ b/common/android_ab.c
@@ -5,9 +5,12 @@
 #include <common.h>
 #include <android_ab.h>
 #include <android_bootloader_message.h>
+#include <blk.h>
+#include <log.h>
 #include <malloc.h>
-#include <linux/err.h>
+#include <part.h>
 #include <memalign.h>
+#include <linux/err.h>
 #include <u-boot/crc.h>
 #include <u-boot/crc.h>
 
@@ -81,7 +84,7 @@ static int ab_control_default(struct bootloader_control *abc)
  * @return 0 on success and a negative on error
  */
 static int ab_control_create_from_disk(struct blk_desc *dev_desc,
-				       const disk_partition_t *part_info,
+				       const struct disk_partition *part_info,
 				       struct bootloader_control **abc)
 {
 	ulong abc_offset, abc_blocks, ret;
@@ -131,7 +134,7 @@ static int ab_control_create_from_disk(struct blk_desc *dev_desc,
  * @return 0 on success and a negative on error
  */
 static int ab_control_store(struct blk_desc *dev_desc,
-			    const disk_partition_t *part_info,
+			    const struct disk_partition *part_info,
 			    struct bootloader_control *abc)
 {
 	ulong abc_offset, abc_blocks, ret;
@@ -178,7 +181,7 @@ static int ab_compare_slots(const struct slot_metadata *a,
 	return 0;
 }
 
-int ab_select_slot(struct blk_desc *dev_desc, disk_partition_t *part_info)
+int ab_select_slot(struct blk_desc *dev_desc, struct disk_partition *part_info)
 {
 	struct bootloader_control *abc = NULL;
 	u32 crc32_le;
diff --git a/common/autoboot.c b/common/autoboot.c
index 4ea9be6da9..6d78716a26 100644
--- a/common/autoboot.c
+++ b/common/autoboot.c
@@ -13,11 +13,13 @@
 #include <env.h>
 #include <fdtdec.h>
 #include <hash.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <menu.h>
 #include <post.h>
 #include <time.h>
+#include <linux/delay.h>
 #include <u-boot/sha256.h>
 #include <bootcount.h>
 
diff --git a/common/bedbug.c b/common/bedbug.c
index 42ecf61eff..18a35ca23e 100644
--- a/common/bedbug.c
+++ b/common/bedbug.c
@@ -1,6 +1,7 @@
 /* $Id$ */
 
 #include <common.h>
+#include <asm/ptrace.h>
 
 #include <linux/ctype.h>
 #include <bedbug/bedbug.h>
diff --git a/common/board_f.c b/common/board_f.c
index 5c650f046c..01194eaa0e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <bloblist.h>
+#include <bootstage.h>
 #include <clock_legacy.h>
 #include <console.h>
 #include <cpu.h>
@@ -25,6 +26,7 @@
 #include <init.h>
 #include <initcall.h>
 #include <lcd.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <os.h>
@@ -40,6 +42,7 @@
 #include <trace.h>
 #include <video.h>
 #include <watchdog.h>
+#include <asm/cache.h>
 #ifdef CONFIG_MACH_TYPE
 #include <asm/mach-types.h>
 #endif
@@ -183,11 +186,11 @@ static int print_cpuinfo(void)
 	char desc[512];
 	int ret;
 
-	ret = uclass_first_device_err(UCLASS_CPU, &dev);
-	if (ret) {
-		debug("%s: Could not get CPU device (err = %d)\n",
-		      __func__, ret);
-		return ret;
+	dev = cpu_get_current_dev();
+	if (!dev) {
+		debug("%s: Could not get CPU device\n",
+		      __func__);
+		return -ENODEV;
 	}
 
 	ret = cpu_get_desc(dev, desc, sizeof(desc));
@@ -309,7 +312,7 @@ __weak int mach_cpu_init(void)
 /* Get the top of usable RAM */
 __weak ulong board_get_usable_ram_top(ulong total_size)
 {
-#ifdef CONFIG_SYS_SDRAM_BASE
+#if defined(CONFIG_SYS_SDRAM_BASE) && CONFIG_SYS_SDRAM_BASE > 0
 	/*
 	 * Detect whether we have so much RAM that it goes past the end of our
 	 * 32-bit address space. If so, clip the usable RAM so it doesn't.
@@ -822,9 +825,9 @@ static int initf_dm(void)
 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 	int ret;
 
-	bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
+	bootstage_start(BOOTSTAGE_ID_ACCUM_DM_F, "dm_f");
 	ret = dm_init_and_scan(true);
-	bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
+	bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_F);
 	if (ret)
 		return ret;
 #endif
diff --git a/common/board_info.c b/common/board_info.c
index a392bece62..a6db087f96 100644
--- a/common/board_info.c
+++ b/common/board_info.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 
 #include <common.h>
+#include <init.h>
 #include <linux/libfdt.h>
 #include <linux/compiler.h>
 
diff --git a/common/board_r.c b/common/board_r.c
index 0bbeaa7594..fa57fa9b69 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -11,12 +11,16 @@
 
 #include <common.h>
 #include <api.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <exports.h>
+#include <flash.h>
 #include <hang.h>
 #include <image.h>
 #include <irq_func.h>
+#include <log.h>
 #include <net.h>
+#include <asm/cache.h>
 #include <u-boot/crc.h>
 /* TODO: can we just include all these headers whether needed or not? */
 #if defined(CONFIG_CMD_BEDBUG)
@@ -232,9 +236,8 @@ static int initr_unlock_ram_in_cache(void)
 #ifdef CONFIG_PCI
 static int initr_pci(void)
 {
-#ifndef CONFIG_DM_PCI
-	pci_init();
-#endif
+	if (IS_ENABLED(CONFIG_PCI_INIT_R))
+		pci_init();
 
 	return 0;
 }
@@ -311,9 +314,9 @@ static int initr_dm(void)
 #ifdef CONFIG_TIMER
 	gd->timer = NULL;
 #endif
-	bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "dm_r");
+	bootstage_start(BOOTSTAGE_ID_ACCUM_DM_R, "dm_r");
 	ret = dm_init_and_scan(false);
-	bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R);
+	bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_R);
 	if (ret)
 		return ret;
 
@@ -355,8 +358,8 @@ static int initr_announce(void)
 #ifdef CONFIG_NEEDS_MANUAL_RELOC
 static int initr_manual_reloc_cmdtable(void)
 {
-	fixup_cmdtable(ll_entry_start(cmd_tbl_t, cmd),
-		       ll_entry_count(cmd_tbl_t, cmd));
+	fixup_cmdtable(ll_entry_start(struct cmd_tbl, cmd),
+		       ll_entry_count(struct cmd_tbl, cmd));
 	return 0;
 }
 #endif
@@ -370,11 +373,19 @@ static int initr_binman(void)
 }
 
 #if defined(CONFIG_MTD_NOR_FLASH)
+__weak int is_flash_available(void)
+{
+	return 1;
+}
+
 static int initr_flash(void)
 {
 	ulong flash_size = 0;
 	bd_t *bd = gd->bd;
 
+	if (!is_flash_available())
+		return 0;
+
 	puts("Flash: ");
 
 	if (board_flash_wp_on())
@@ -464,13 +475,14 @@ static int initr_mmc(void)
  */
 static int should_load_env(void)
 {
-#ifdef CONFIG_OF_CONTROL
-	return fdtdec_get_config_int(gd->fdt_blob, "load-environment", 1);
-#elif defined CONFIG_DELAY_ENVIRONMENT
-	return 0;
-#else
+	if (IS_ENABLED(CONFIG_OF_CONTROL))
+		return fdtdec_get_config_int(gd->fdt_blob,
+						"load-environment", 1);
+
+	if (IS_ENABLED(CONFIG_DELAY_ENVIRONMENT))
+		return 0;
+
 	return 1;
-#endif
 }
 
 static int initr_env(void)
@@ -480,10 +492,10 @@ static int initr_env(void)
 		env_relocate();
 	else
 		env_set_default(NULL, 0);
-#ifdef CONFIG_OF_CONTROL
-	env_set_hex("fdtcontroladdr",
-		    (unsigned long)map_to_sysmem(gd->fdt_blob));
-#endif
+
+	if (IS_ENABLED(CONFIG_OF_CONTROL))
+		env_set_hex("fdtcontroladdr",
+			    (unsigned long)map_to_sysmem(gd->fdt_blob));
 
 	/* Initialize from environment */
 	image_load_addr = env_get_ulong("loadaddr", 16, image_load_addr);
@@ -518,15 +530,6 @@ static int initr_api(void)
 }
 #endif
 
-/* enable exceptions */
-#ifdef CONFIG_ARM
-static int initr_enable_interrupts(void)
-{
-	enable_interrupts();
-	return 0;
-}
-#endif
-
 #ifdef CONFIG_CMD_NET
 static int initr_ethaddr(void)
 {
@@ -646,15 +649,6 @@ int initr_mem(void)
 }
 #endif
 
-#ifdef CONFIG_CMD_BEDBUG
-static int initr_bedbug(void)
-{
-	bedbug_init();
-
-	return 0;
-}
-#endif
-
 static int run_main_loop(void)
 {
 #ifdef CONFIG_SANDBOX
@@ -813,9 +807,6 @@ static init_fnc_t init_sequence_r[] = {
 	initr_kgdb,
 #endif
 	interrupt_init,
-#ifdef CONFIG_ARM
-	initr_enable_interrupts,
-#endif
 #if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
 	timer_init,		/* initialize timer */
 #endif
@@ -860,7 +851,7 @@ static init_fnc_t init_sequence_r[] = {
 #endif
 #ifdef CONFIG_CMD_BEDBUG
 	INIT_FUNC_WATCHDOG_RESET
-	initr_bedbug,
+	bedbug_init,
 #endif
 #if defined(CONFIG_PRAM)
 	initr_mem,
diff --git a/common/boot_fit.c b/common/boot_fit.c
index ffa4d740eb..dfc2a3117d 100644
--- a/common/boot_fit.c
+++ b/common/boot_fit.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
+#include <log.h>
 #include <linux/libfdt.h>
 
 static int fdt_offset(const void *fit)
diff --git a/common/bootm.c b/common/bootm.c
index db4362a643..2ed7521520 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -13,8 +13,11 @@
 #include <fdt_support.h>
 #include <irq_func.h>
 #include <lmb.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
+#include <net.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #if defined(CONFIG_CMD_USB)
 #include <usb.h>
@@ -40,8 +43,8 @@ DECLARE_GLOBAL_DATA_PTR;
 
 bootm_headers_t images;		/* pointers to os/initrd/fdt images */
 
-static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
-				   char * const argv[], bootm_headers_t *images,
+static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc,
+				   char *const argv[], bootm_headers_t *images,
 				   ulong *os_data, ulong *os_len);
 
 __weak void board_quiesce_devices(void)
@@ -65,8 +68,8 @@ static void boot_start_lmb(bootm_headers_t *images)
 static inline void boot_start_lmb(bootm_headers_t *images) { }
 #endif
 
-static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int bootm_start(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	memset((void *)&images, 0, sizeof(images));
 	images.verify = env_get_yesno("verify");
@@ -79,8 +82,8 @@ static int bootm_start(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[])
+static int bootm_find_os(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[])
 {
 	const void *os_hdr;
 	bool ep_found = false;
@@ -236,7 +239,7 @@ static int bootm_find_os(cmd_tbl_t *cmdtp, int flag, int argc,
  *     0, if all existing images were loaded correctly
  *     1, if an image is found but corrupted, or invalid
  */
-int bootm_find_images(int flag, int argc, char * const argv[])
+int bootm_find_images(int flag, int argc, char *const argv[])
 {
 	int ret;
 
@@ -283,8 +286,8 @@ int bootm_find_images(int flag, int argc, char * const argv[])
 	return 0;
 }
 
-static int bootm_find_other(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char * const argv[])
+static int bootm_find_other(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[])
 {
 	if (((images.os.type == IH_TYPE_KERNEL) ||
 	     (images.os.type == IH_TYPE_KERNEL_NOLOAD) ||
@@ -518,8 +521,9 @@ static void fixup_silent_linux(void)
  *	then the intent is to boot an OS, so this function will not return
  *	unless the image type is standalone.
  */
-int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		    int states, bootm_headers_t *images, int boot_progress)
+int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[], int states, bootm_headers_t *images,
+		    int boot_progress)
 {
 	boot_os_fn *boot_fn;
 	ulong iflag = 0;
@@ -702,8 +706,8 @@ static image_header_t *image_get_kernel(ulong img_addr, int verify)
  *     pointer to image header if valid image was found, plus kernel start
  *     address and length, otherwise NULL
  */
-static const void *boot_get_kernel(cmd_tbl_t *cmdtp, int flag, int argc,
-				   char * const argv[], bootm_headers_t *images,
+static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc,
+				   char *const argv[], bootm_headers_t *images,
 				   ulong *os_data, ulong *os_len)
 {
 #if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
diff --git a/common/bootm_os.c b/common/bootm_os.c
index 1d58462509..55296483f7 100644
--- a/common/bootm_os.c
+++ b/common/bootm_os.c
@@ -6,10 +6,14 @@
 
 #include <common.h>
 #include <bootm.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <efi_loader.h>
 #include <env.h>
 #include <fdt_support.h>
+#include <image.h>
+#include <lmb.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
@@ -18,7 +22,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static int do_bootm_standalone(int flag, int argc, char * const argv[],
+static int do_bootm_standalone(int flag, int argc, char *const argv[],
 			       bootm_headers_t *images)
 {
 	char *s;
@@ -40,7 +44,7 @@ static int do_bootm_standalone(int flag, int argc, char * const argv[],
 /*******************************************************************/
 
 #if defined(CONFIG_BOOTM_NETBSD) || defined(CONFIG_BOOTM_PLAN9)
-static void copy_args(char *dest, int argc, char * const argv[], char delim)
+static void copy_args(char *dest, int argc, char *const argv[], char delim)
 {
 	int i;
 
@@ -54,8 +58,8 @@ static void copy_args(char *dest, int argc, char * const argv[], char delim)
 #endif
 
 #ifdef CONFIG_BOOTM_NETBSD
-static int do_bootm_netbsd(int flag, int argc, char * const argv[],
-			    bootm_headers_t *images)
+static int do_bootm_netbsd(int flag, int argc, char *const argv[],
+			   bootm_headers_t *images)
 {
 	void (*loader)(bd_t *, image_header_t *, char *, char *);
 	image_header_t *os_hdr, *hdr;
@@ -126,8 +130,8 @@ static int do_bootm_netbsd(int flag, int argc, char * const argv[],
 #endif /* CONFIG_BOOTM_NETBSD*/
 
 #ifdef CONFIG_LYNXKDI
-static int do_bootm_lynxkdi(int flag, int argc, char * const argv[],
-			     bootm_headers_t *images)
+static int do_bootm_lynxkdi(int flag, int argc, char *const argv[],
+			    bootm_headers_t *images)
 {
 	image_header_t *hdr = &images->legacy_hdr_os_copy;
 
@@ -148,8 +152,8 @@ static int do_bootm_lynxkdi(int flag, int argc, char * const argv[],
 #endif /* CONFIG_LYNXKDI */
 
 #ifdef CONFIG_BOOTM_RTEMS
-static int do_bootm_rtems(int flag, int argc, char * const argv[],
-			   bootm_headers_t *images)
+static int do_bootm_rtems(int flag, int argc, char *const argv[],
+			  bootm_headers_t *images)
 {
 	void (*entry_point)(bd_t *);
 
@@ -181,8 +185,8 @@ static int do_bootm_rtems(int flag, int argc, char * const argv[],
 #endif /* CONFIG_BOOTM_RTEMS */
 
 #if defined(CONFIG_BOOTM_OSE)
-static int do_bootm_ose(int flag, int argc, char * const argv[],
-			   bootm_headers_t *images)
+static int do_bootm_ose(int flag, int argc, char *const argv[],
+			bootm_headers_t *images)
 {
 	void (*entry_point)(void);
 
@@ -214,8 +218,8 @@ static int do_bootm_ose(int flag, int argc, char * const argv[],
 #endif /* CONFIG_BOOTM_OSE */
 
 #if defined(CONFIG_BOOTM_PLAN9)
-static int do_bootm_plan9(int flag, int argc, char * const argv[],
-			   bootm_headers_t *images)
+static int do_bootm_plan9(int flag, int argc, char *const argv[],
+			  bootm_headers_t *images)
 {
 	void (*entry_point)(void);
 	char *s;
@@ -321,7 +325,7 @@ static void do_bootvx_fdt(bootm_headers_t *images)
 	puts("## vxWorks terminated\n");
 }
 
-static int do_bootm_vxworks_legacy(int flag, int argc, char * const argv[],
+static int do_bootm_vxworks_legacy(int flag, int argc, char *const argv[],
 				   bootm_headers_t *images)
 {
 	if (flag != BOOTM_STATE_OS_GO)
@@ -339,7 +343,7 @@ static int do_bootm_vxworks_legacy(int flag, int argc, char * const argv[],
 	return 1;
 }
 
-int do_bootm_vxworks(int flag, int argc, char * const argv[],
+int do_bootm_vxworks(int flag, int argc, char *const argv[],
 		     bootm_headers_t *images)
 {
 	char *bootargs;
@@ -376,8 +380,8 @@ int do_bootm_vxworks(int flag, int argc, char * const argv[],
 #endif
 
 #if defined(CONFIG_CMD_ELF)
-static int do_bootm_qnxelf(int flag, int argc, char * const argv[],
-			    bootm_headers_t *images)
+static int do_bootm_qnxelf(int flag, int argc, char *const argv[],
+			   bootm_headers_t *images)
 {
 	char *local_args[2];
 	char str[16];
@@ -414,8 +418,8 @@ static int do_bootm_qnxelf(int flag, int argc, char * const argv[],
 #endif
 
 #ifdef CONFIG_INTEGRITY
-static int do_bootm_integrity(int flag, int argc, char * const argv[],
-			   bootm_headers_t *images)
+static int do_bootm_integrity(int flag, int argc, char *const argv[],
+			      bootm_headers_t *images)
 {
 	void (*entry_point)(void);
 
@@ -447,8 +451,8 @@ static int do_bootm_integrity(int flag, int argc, char * const argv[],
 #endif
 
 #ifdef CONFIG_BOOTM_OPENRTOS
-static int do_bootm_openrtos(int flag, int argc, char * const argv[],
-			   bootm_headers_t *images)
+static int do_bootm_openrtos(int flag, int argc, char *const argv[],
+			     bootm_headers_t *images)
 {
 	void (*entry_point)(void);
 
@@ -473,7 +477,7 @@ static int do_bootm_openrtos(int flag, int argc, char * const argv[],
 #endif
 
 #ifdef CONFIG_BOOTM_OPTEE
-static int do_bootm_tee(int flag, int argc, char * const argv[],
+static int do_bootm_tee(int flag, int argc, char *const argv[],
 			bootm_headers_t *images)
 {
 	int ret;
@@ -501,7 +505,7 @@ static int do_bootm_tee(int flag, int argc, char * const argv[],
 #endif
 
 #ifdef CONFIG_BOOTM_EFI
-static int do_bootm_efi(int flag, int argc, char * const argv[],
+static int do_bootm_efi(int flag, int argc, char *const argv[],
 			bootm_headers_t *images)
 {
 	int ret;
@@ -604,7 +608,7 @@ __weak void board_preboot_os(void)
 	/* please define board specific board_preboot_os() */
 }
 
-int boot_selected_os(int argc, char * const argv[], int state,
+int boot_selected_os(int argc, char *const argv[], int state,
 		     bootm_headers_t *images, boot_os_fn *boot_fn)
 {
 	arch_preboot_os();
diff --git a/common/bootstage.c b/common/bootstage.c
index d2ed33663b..5f87358fd8 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -10,7 +10,9 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <hang.h>
+#include <log.h>
 #include <malloc.h>
 #include <sort.h>
 #include <spl.h>
diff --git a/common/bouncebuf.c b/common/bouncebuf.c
index 0ace152b98..6d98920de6 100644
--- a/common/bouncebuf.c
+++ b/common/bouncebuf.c
@@ -7,9 +7,11 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <bouncebuf.h>
+#include <asm/cache.h>
 
 static int addr_aligned(struct bounce_buffer *state)
 {
diff --git a/common/cli.c b/common/cli.c
index 38bba17585..6635ab2bcf 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <cli.h>
 #include <cli_hush.h>
 #include <command.h>
@@ -128,7 +129,7 @@ int run_command_list(const char *cmd, int len, int flag)
 /****************************************************************************/
 
 #if defined(CONFIG_CMD_RUN)
-int do_run(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_run(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int i;
 
@@ -182,7 +183,7 @@ bool cli_process_fdt(const char **cmdp)
 void cli_secure_boot_cmd(const char *cmd)
 {
 #ifdef CONFIG_CMDLINE
-	cmd_tbl_t *cmdtp;
+	struct cmd_tbl *cmdtp;
 #endif
 	int rc;
 
diff --git a/common/cli_hush.c b/common/cli_hush.c
index cf1e273485..5b1f119074 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -1849,8 +1849,7 @@ static int run_list_real(struct pipe *pi)
 				continue;
 			} else {
 				/* insert new value from list for variable */
-				if (pi->progs->argv[0])
-					free(pi->progs->argv[0]);
+				free(pi->progs->argv[0]);
 				pi->progs->argv[0] = *list++;
 #ifndef __U_BOOT__
 				pi->progs->glob_result.gl_pathv[0] =
@@ -3665,8 +3664,8 @@ static char *make_string(char **inp, int *nonnull)
 }
 
 #ifdef __U_BOOT__
-static int do_showvar(cmd_tbl_t *cmdtp, int flag, int argc,
-		      char * const argv[])
+static int do_showvar(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	int i, k;
 	int rcode = 0;
diff --git a/common/cli_readline.c b/common/cli_readline.c
index 6ef7a3e564..1f1e28c6d8 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <bootretry.h>
 #include <cli.h>
+#include <command.h>
 #include <time.h>
 #include <watchdog.h>
 
diff --git a/common/cli_simple.c b/common/cli_simple.c
index 358e9b7fe1..7d91316a0f 100644
--- a/common/cli_simple.c
+++ b/common/cli_simple.c
@@ -14,6 +14,7 @@
 #include <command.h>
 #include <console.h>
 #include <env.h>
+#include <log.h>
 #include <linux/ctype.h>
 
 #define DEBUG_PARSER	0	/* set to 1 to debug */
diff --git a/common/command.c b/common/command.c
index 0d8bf244be..4f49f15bfd 100644
--- a/common/command.c
+++ b/common/command.c
@@ -12,6 +12,7 @@
 #include <command.h>
 #include <console.h>
 #include <env.h>
+#include <log.h>
 #include <linux/ctype.h>
 
 /*
@@ -19,14 +20,14 @@
  * for long help messages
  */
 
-int _do_help(cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t *cmdtp, int flag,
-	     int argc, char * const argv[])
+int _do_help(struct cmd_tbl *cmd_start, int cmd_items, struct cmd_tbl *cmdtp,
+	     int flag, int argc, char *const argv[])
 {
 	int i;
 	int rcode = 0;
 
 	if (argc == 1) {	/* show list of commands */
-		cmd_tbl_t *cmd_array[cmd_items];
+		struct cmd_tbl *cmd_array[cmd_items];
 		int i, j, swaps;
 
 		/* Make array of commands from .uboot_cmd section */
@@ -41,7 +42,7 @@ int _do_help(cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t *cmdtp, int flag,
 			for (j = 0; j < i; ++j) {
 				if (strcmp(cmd_array[j]->name,
 					   cmd_array[j + 1]->name) > 0) {
-					cmd_tbl_t *tmp;
+					struct cmd_tbl *tmp;
 					tmp = cmd_array[j];
 					cmd_array[j] = cmd_array[j + 1];
 					cmd_array[j + 1] = tmp;
@@ -83,11 +84,12 @@ int _do_help(cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t *cmdtp, int flag,
 }
 
 /* find command table entry for a command */
-cmd_tbl_t *find_cmd_tbl(const char *cmd, cmd_tbl_t *table, int table_len)
+struct cmd_tbl *find_cmd_tbl(const char *cmd, struct cmd_tbl *table,
+			     int table_len)
 {
 #ifdef CONFIG_CMDLINE
-	cmd_tbl_t *cmdtp;
-	cmd_tbl_t *cmdtp_temp = table;	/* Init value */
+	struct cmd_tbl *cmdtp;
+	struct cmd_tbl *cmdtp_temp = table;	/* Init value */
 	const char *p;
 	int len;
 	int n_found = 0;
@@ -117,14 +119,14 @@ cmd_tbl_t *find_cmd_tbl(const char *cmd, cmd_tbl_t *table, int table_len)
 	return NULL;	/* not found or ambiguous command */
 }
 
-cmd_tbl_t *find_cmd(const char *cmd)
+struct cmd_tbl *find_cmd(const char *cmd)
 {
-	cmd_tbl_t *start = ll_entry_start(cmd_tbl_t, cmd);
-	const int len = ll_entry_count(cmd_tbl_t, cmd);
+	struct cmd_tbl *start = ll_entry_start(struct cmd_tbl, cmd);
+	const int len = ll_entry_count(struct cmd_tbl, cmd);
 	return find_cmd_tbl(cmd, start, len);
 }
 
-int cmd_usage(const cmd_tbl_t *cmdtp)
+int cmd_usage(const struct cmd_tbl *cmdtp)
 {
 	printf("%s - %s\n\n", cmdtp->name, cmdtp->usage);
 
@@ -145,7 +147,8 @@ int cmd_usage(const cmd_tbl_t *cmdtp)
 #ifdef CONFIG_AUTO_COMPLETE
 static char env_complete_buf[512];
 
-int var_complete(int argc, char * const argv[], char last_char, int maxv, char *cmdv[])
+int var_complete(int argc, char *const argv[], char last_char, int maxv,
+		 char *cmdv[])
 {
 	int space;
 
@@ -163,7 +166,7 @@ int var_complete(int argc, char * const argv[], char last_char, int maxv, char *
 	return 0;
 }
 
-static int dollar_complete(int argc, char * const argv[], char last_char,
+static int dollar_complete(int argc, char *const argv[], char last_char,
 			   int maxv, char *cmdv[])
 {
 	/* Make sure the last argument starts with a $. */
@@ -177,12 +180,12 @@ static int dollar_complete(int argc, char * const argv[], char last_char,
 
 /*************************************************************************************/
 
-int complete_subcmdv(cmd_tbl_t *cmdtp, int count, int argc,
-		     char * const argv[], char last_char,
+int complete_subcmdv(struct cmd_tbl *cmdtp, int count, int argc,
+		     char *const argv[], char last_char,
 		     int maxv, char *cmdv[])
 {
 #ifdef CONFIG_CMDLINE
-	const cmd_tbl_t *cmdend = cmdtp + count;
+	const struct cmd_tbl *cmdend = cmdtp + count;
 	const char *p;
 	int len, clen;
 	int n_found = 0;
@@ -254,12 +257,12 @@ int complete_subcmdv(cmd_tbl_t *cmdtp, int count, int argc,
 #endif
 }
 
-static int complete_cmdv(int argc, char * const argv[], char last_char,
+static int complete_cmdv(int argc, char *const argv[], char last_char,
 			 int maxv, char *cmdv[])
 {
 #ifdef CONFIG_CMDLINE
-	return complete_subcmdv(ll_entry_start(cmd_tbl_t, cmd),
-				ll_entry_count(cmd_tbl_t, cmd), argc, argv,
+	return complete_subcmdv(ll_entry_start(struct cmd_tbl, cmd),
+				ll_entry_count(struct cmd_tbl, cmd), argc, argv,
 				last_char, maxv, cmdv);
 #else
 	return 0;
@@ -296,7 +299,8 @@ static int make_argv(char *s, int argvsz, char *argv[])
 	return argc;
 }
 
-static void print_argv(const char *banner, const char *leader, const char *sep, int linemax, char * const argv[])
+static void print_argv(const char *banner, const char *leader, const char *sep,
+		       int linemax, char *const argv[])
 {
 	int ll = leader != NULL ? strlen(leader) : 0;
 	int sl = sep != NULL ? strlen(sep) : 0;
@@ -323,7 +327,7 @@ static void print_argv(const char *banner, const char *leader, const char *sep,
 	printf("\n");
 }
 
-static int find_common_prefix(char * const argv[])
+static int find_common_prefix(char *const argv[])
 {
 	int i, len;
 	char *anchor, *s, *t;
@@ -486,7 +490,7 @@ int cmd_get_data_size(char* arg, int default_size)
 #if defined(CONFIG_NEEDS_MANUAL_RELOC)
 DECLARE_GLOBAL_DATA_PTR;
 
-void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)
+void fixup_cmdtable(struct cmd_tbl *cmdtp, int size)
 {
 	int	i;
 
@@ -498,7 +502,7 @@ void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)
 
 		addr = (ulong)(cmdtp->cmd_rep) + gd->reloc_off;
 		cmdtp->cmd_rep =
-			(int (*)(struct cmd_tbl_s *, int, int,
+			(int (*)(struct cmd_tbl *, int, int,
 				 char * const [], int *))addr;
 
 		addr = (ulong)(cmdtp->cmd) + gd->reloc_off;
@@ -506,8 +510,8 @@ void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)
 		printf("Command \"%s\": 0x%08lx => 0x%08lx\n",
 		       cmdtp->name, (ulong)(cmdtp->cmd), addr);
 #endif
-		cmdtp->cmd =
-			(int (*)(struct cmd_tbl_s *, int, int, char * const []))addr;
+		cmdtp->cmd = (int (*)(struct cmd_tbl *, int, int,
+				      char *const []))addr;
 		addr = (ulong)(cmdtp->name) + gd->reloc_off;
 		cmdtp->name = (char *)addr;
 		if (cmdtp->usage) {
@@ -532,24 +536,24 @@ void fixup_cmdtable(cmd_tbl_t *cmdtp, int size)
 }
 #endif
 
-int cmd_always_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[], int *repeatable)
+int cmd_always_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[], int *repeatable)
 {
 	*repeatable = 1;
 
 	return cmdtp->cmd(cmdtp, flag, argc, argv);
 }
 
-int cmd_never_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[], int *repeatable)
+int cmd_never_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[], int *repeatable)
 {
 	*repeatable = 0;
 
 	return cmdtp->cmd(cmdtp, flag, argc, argv);
 }
 
-int cmd_discard_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[])
+int cmd_discard_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[])
 {
 	int repeatable;
 
@@ -568,8 +572,8 @@ int cmd_discard_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
  * @param repeatable	Can the command be repeated
  * @return 0 if command succeeded, else non-zero (CMD_RET_...)
  */
-static int cmd_call(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		    int *repeatable)
+static int cmd_call(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[], int *repeatable)
 {
 	int result;
 
@@ -579,11 +583,11 @@ static int cmd_call(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return result;
 }
 
-enum command_ret_t cmd_process(int flag, int argc, char * const argv[],
+enum command_ret_t cmd_process(int flag, int argc, char *const argv[],
 			       int *repeatable, ulong *ticks)
 {
 	enum command_ret_t rc = CMD_RET_SUCCESS;
-	cmd_tbl_t *cmdtp;
+	struct cmd_tbl *cmdtp;
 
 #if defined(CONFIG_SYS_XTRACE)
 	char *xtrace;
@@ -638,7 +642,7 @@ enum command_ret_t cmd_process(int flag, int argc, char * const argv[],
 	return rc;
 }
 
-int cmd_process_error(cmd_tbl_t *cmdtp, int err)
+int cmd_process_error(struct cmd_tbl *cmdtp, int err)
 {
 	if (err == CMD_RET_USAGE)
 		return CMD_RET_USAGE;
diff --git a/common/common_fit.c b/common/common_fit.c
index 41305d8aa6..a993308100 100644
--- a/common/common_fit.c
+++ b/common/common_fit.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <errno.h>
 #include <image.h>
+#include <log.h>
 #include <linux/libfdt.h>
 
 ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)
diff --git a/common/console.c b/common/console.c
index e398530a13..1deca3cb78 100644
--- a/common/console.c
+++ b/common/console.c
@@ -19,6 +19,7 @@
 #include <exports.h>
 #include <env_internal.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/cros_ec.c b/common/cros_ec.c
index e66471ebd1..249d1f1941 100644
--- a/common/cros_ec.c
+++ b/common/cros_ec.c
@@ -12,6 +12,7 @@
 #include <cros_ec.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 
 struct udevice *board_get_cros_ec_dev(void)
 {
diff --git a/common/dfu.c b/common/dfu.c
index da6289b218..d23cf67f19 100644
--- a/common/dfu.c
+++ b/common/dfu.c
@@ -11,6 +11,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <watchdog.h>
 #include <dfu.h>
 #include <console.h>
diff --git a/common/dlmalloc.c b/common/dlmalloc.c
index db5ab55ed3..b29a7cfd93 100644
--- a/common/dlmalloc.c
+++ b/common/dlmalloc.c
@@ -1,4 +1,5 @@
 #include <common.h>
+#include <log.h>
 
 #if CONFIG_IS_ENABLED(UNIT_TEST)
 #define DEBUG
@@ -280,6 +281,7 @@ nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
 	    |             Unused space (may be 0 bytes long)                .
 	    .                                                               .
 	    .                                                               |
+
 nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
     `foot:' |             Size of chunk, in bytes                           |
 	    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
@@ -574,6 +576,10 @@ static void malloc_bin_reloc(void)
 static inline void malloc_bin_reloc(void) {}
 #endif
 
+#ifdef CONFIG_SYS_MALLOC_DEFAULT_TO_INIT
+static void malloc_init(void);
+#endif
+
 ulong mem_malloc_start = 0;
 ulong mem_malloc_end = 0;
 ulong mem_malloc_brk = 0;
@@ -604,6 +610,10 @@ void mem_malloc_init(ulong start, ulong size)
 	mem_malloc_end = start + size;
 	mem_malloc_brk = start;
 
+#ifdef CONFIG_SYS_MALLOC_DEFAULT_TO_INIT
+	malloc_init();
+#endif
+
 	debug("using memory %#lx-%#lx for malloc()\n", mem_malloc_start,
 	      mem_malloc_end);
 #ifdef CONFIG_SYS_MALLOC_CLEAR_ON_INIT
@@ -708,7 +718,36 @@ static unsigned int max_n_mmaps = 0;
 static unsigned long max_mmapped_mem = 0;
 #endif
 
+#ifdef CONFIG_SYS_MALLOC_DEFAULT_TO_INIT
+static void malloc_init(void)
+{
+	int i, j;
+
+	debug("bins (av_ array) are at %p\n", (void *)av_);
+
+	av_[0] = NULL; av_[1] = NULL;
+	for (i = 2, j = 2; i < NAV * 2 + 2; i += 2, j++) {
+		av_[i] = bin_at(j - 2);
+		av_[i + 1] = bin_at(j - 2);
+
+		/* Just print the first few bins so that
+		 * we can see there are alright.
+		 */
+		if (i < 10)
+			debug("av_[%d]=%lx av_[%d]=%lx\n",
+			      i, (ulong)av_[i],
+			      i + 1, (ulong)av_[i + 1]);
+	}
 
+	/* Init the static bookkeeping as well */
+	sbrk_base = (char *)(-1);
+	max_sbrked_mem = 0;
+	max_total_mem = 0;
+#ifdef DEBUG
+	memset((void *)&current_mallinfo, 0, sizeof(struct mallinfo));
+#endif
+}
+#endif
 
 /*
   Debugging support
@@ -1051,9 +1090,6 @@ static mchunkptr mremap_chunk(p, new_size) mchunkptr p; size_t new_size;
 
 #endif /* HAVE_MMAP */
 
-
-
-
 /*
   Extend the top-most chunk by obtaining memory from system.
   Main interface to sbrk (but see also malloc_trim).
diff --git a/common/edid.c b/common/edid.c
index f99f42dc40..553ab8fd01 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -13,6 +13,7 @@
 #include <edid.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/ctype.h>
 #include <linux/string.h>
 
diff --git a/common/exports.c b/common/exports.c
index 18af38a5f6..6253b55694 100644
--- a/common/exports.c
+++ b/common/exports.c
@@ -1,4 +1,5 @@
 #include <common.h>
+#include <command.h>
 #include <exports.h>
 #include <malloc.h>
 #include <spi.h>
diff --git a/common/fdt_region.c b/common/fdt_region.c
index bf0a9be730..667659054a 100644
--- a/common/fdt_region.c
+++ b/common/fdt_region.c
@@ -5,6 +5,7 @@
  * Written by Simon Glass <sjg@chromium.org>
  */
 
+#include <fdt_support.h>
 #include <linux/libfdt_env.h>
 #include <fdt_region.h>
 
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 02cf5c6241..3778de5368 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -8,7 +8,9 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <mapmem.h>
+#include <net.h>
 #include <stdio_dev.h>
 #include <linux/ctype.h>
 #include <linux/types.h>
diff --git a/common/flash.c b/common/flash.c
index 5f155aefd1..bb82385c1f 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <flash.h>
+#include <log.h>
+#include <uuid.h>
 
 #include <mtd/cfi_flash.h>
 
@@ -24,7 +26,7 @@ extern flash_info_t  flash_info[]; /* info for FLASH chips */
  * If necessary you have to map the second bank at lower addresses.
  */
 void
-flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
+flash_protect(int flag, ulong from, ulong to, flash_info_t *info)
 {
 	ulong b_end;
 	short s_end;
@@ -38,10 +40,10 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
 	s_end = info->sector_count - 1;	/* index of last sector */
 	b_end = info->start[0] + info->size - 1;	/* bank end address */
 
-	debug ("flash_protect %s: from 0x%08lX to 0x%08lX\n",
-		(flag & FLAG_PROTECT_SET) ? "ON" :
-			(flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???",
-		from, to);
+	debug("%s %s: from 0x%08lX to 0x%08lX\n", __func__,
+	      (flag & FLAG_PROTECT_SET) ? "ON" :
+	      (flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???",
+	      from, to);
 
 	/* There is nothing to do if we have no data about the flash
 	 * or the protect range and flash range don't overlap.
@@ -66,7 +68,7 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
 #else
 				info->protect[i] = 0;
 #endif	/* CONFIG_SYS_FLASH_PROTECTION */
-				debug ("protect off %d\n", i);
+				debug("protect off %d\n", i);
 			}
 			else if (flag & FLAG_PROTECT_SET) {
 #if defined(CONFIG_SYS_FLASH_PROTECTION)
@@ -74,7 +76,7 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
 #else
 				info->protect[i] = 1;
 #endif	/* CONFIG_SYS_FLASH_PROTECTION */
-				debug ("protect on %d\n", i);
+				debug("protect on %d\n", i);
 			}
 		}
 	}
@@ -84,7 +86,7 @@ flash_protect (int flag, ulong from, ulong to, flash_info_t *info)
  */
 
 flash_info_t *
-addr2info (ulong addr)
+addr2info(ulong addr)
 {
 	flash_info_t *info;
 	int i;
@@ -119,12 +121,12 @@ addr2info (ulong addr)
  *			(only some targets require alignment)
  */
 int
-flash_write (char *src, ulong addr, ulong cnt)
+flash_write(char *src, ulong addr, ulong cnt)
 {
 	int i;
 	ulong         end        = addr + cnt - 1;
-	flash_info_t *info_first = addr2info (addr);
-	flash_info_t *info_last  = addr2info (end );
+	flash_info_t *info_first = addr2info(addr);
+	flash_info_t *info_last  = addr2info(end);
 	flash_info_t *info;
 	__maybe_unused char *src_orig = src;
 	__maybe_unused char *addr_orig = (char *)addr;
diff --git a/common/hash.c b/common/hash.c
index ff4986a619..8c00659d25 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -13,19 +13,21 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <hw_sha.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <u-boot/crc.h>
 #else
 #include "mkimage.h"
 #include <time.h>
-#include <image.h>
 #endif /* !USE_HOSTCC*/
 
 #include <hash.h>
+#include <image.h>
 #include <u-boot/crc.h>
 #include <u-boot/sha1.h>
 #include <u-boot/sha256.h>
@@ -443,8 +445,8 @@ static void hash_show(struct hash_algo *algo, ulong addr, ulong len, uint8_t *ou
 		printf("%02x", output[i]);
 }
 
-int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
-		 int argc, char * const argv[])
+int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
+		 int flag, int argc, char *const argv[])
 {
 	ulong addr, len;
 
diff --git a/common/hwconfig.c b/common/hwconfig.c
index 72f3c4e0fa..daf3eea5f9 100644
--- a/common/hwconfig.c
+++ b/common/hwconfig.c
@@ -14,6 +14,7 @@
 #include <env.h>
 #include <exports.h>
 #include <hwconfig.h>
+#include <log.h>
 #include <linux/types.h>
 #include <linux/string.h>
 #else
diff --git a/common/image-android.c b/common/image-android.c
index 6af9baa121..18f7c8db03 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -33,6 +33,13 @@ static ulong android_image_get_kernel_addr(const struct andr_img_hdr *hdr)
 	if (hdr->kernel_addr == ANDROID_IMAGE_DEFAULT_KERNEL_ADDR)
 		return (ulong)hdr + hdr->page_size;
 
+	/*
+	 * abootimg creates images where all load addresses are 0
+	 * and we need to fix them.
+	 */
+	if (hdr->kernel_addr == 0 && hdr->ramdisk_addr == 0)
+		return env_get_ulong("kernel_addr_r", 16, 0);
+
 	return hdr->kernel_addr;
 }
 
diff --git a/common/image-cipher.c b/common/image-cipher.c
index f50c3d31bd..09869f7846 100644
--- a/common/image-cipher.c
+++ b/common/image-cipher.c
@@ -10,7 +10,7 @@
 #include <common.h>
 #include <malloc.h>
 DECLARE_GLOBAL_DATA_PTR;
-#endif /* !USE_HOSTCC*/
+#endif /* !USE_HOSdTCC*/
 #include <image.h>
 #include <uboot_aes.h>
 #include <u-boot/aes.h>
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 3002948b6b..b63e772bd6 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -14,6 +14,8 @@
 #include <env.h>
 #include <errno.h>
 #include <image.h>
+#include <lmb.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/libfdt.h>
 #include <mapmem.h>
@@ -263,8 +265,8 @@ error:
  *     1, if fdt image is found but corrupted
  *     of_flat_tree and of_size are set to 0 if no fdt exists
  */
-int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
-		bootm_headers_t *images, char **of_flat_tree, ulong *of_size)
+int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch,
+		 bootm_headers_t *images, char **of_flat_tree, ulong *of_size)
 {
 #if CONFIG_IS_ENABLED(LEGACY_IMAGE_FORMAT)
 	const image_header_t *fdt_hdr;
diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c
index 3e73578594..cc1967109e 100644
--- a/common/image-fit-sig.c
+++ b/common/image-fit-sig.c
@@ -8,6 +8,7 @@
 #include <time.h>
 #else
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
@@ -249,7 +250,7 @@ static int fit_config_check_sig(const void *fit, int noffset,
 				int required_keynode, int conf_noffset,
 				char **err_msgp)
 {
-	char * const exc_prop[] = {"data"};
+	char * const exc_prop[] = {"data", "data-size", "data-position"};
 	const char *prop, *end, *name;
 	struct image_sign_info info;
 	const uint32_t *strings;
diff --git a/common/image-fit.c b/common/image-fit.c
index 368b73088a..1ece100a21 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -11,12 +11,14 @@
 #ifdef USE_HOSTCC
 #include "mkimage.h"
 #include <time.h>
+#include <linux/libfdt.h>
 #include <u-boot/crc.h>
 #else
 #include <linux/compiler.h>
 #include <linux/kconfig.h>
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <mapmem.h>
 #include <asm/io.h>
 #include <malloc.h>
diff --git a/common/image-sig.c b/common/image-sig.c
index 84b2c0439c..498969d641 100644
--- a/common/image-sig.c
+++ b/common/image-sig.c
@@ -5,9 +5,12 @@
 
 #ifdef USE_HOSTCC
 #include "mkimage.h"
+#include <fdt_support.h>
 #include <time.h>
+#include <linux/libfdt.h>
 #else
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 DECLARE_GLOBAL_DATA_PTR;
 #endif /* !USE_HOSTCC*/
diff --git a/common/image.c b/common/image.c
index d8d14e871c..e1ca1a7905 100644
--- a/common/image.c
+++ b/common/image.c
@@ -8,9 +8,13 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <bootstage.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <lmb.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <u-boot/crc.h>
 #include <watchdog.h>
 
@@ -44,7 +48,8 @@
 #include <lzma/LzmaTools.h>
 
 #ifdef CONFIG_CMD_BDI
-extern int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[]);
 #endif
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -1072,8 +1077,8 @@ int genimg_has_config(bootm_headers_t *images)
  *     1, if ramdisk image is found but corrupted, or invalid
  *     rd_start and rd_end are set to 0 if no ramdisk exists
  */
-int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
-		uint8_t arch, ulong *rd_start, ulong *rd_end)
+int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images,
+		     uint8_t arch, ulong *rd_start, ulong *rd_end)
 {
 	ulong rd_addr, rd_load;
 	ulong rd_data, rd_len;
@@ -1368,7 +1373,7 @@ int boot_get_setup(bootm_headers_t *images, uint8_t arch,
 
 #if IMAGE_ENABLE_FIT
 #if defined(CONFIG_FPGA)
-int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
+int boot_get_fpga(int argc, char *const argv[], bootm_headers_t *images,
 		  uint8_t arch, const ulong *ld_start, ulong * const ld_len)
 {
 	ulong tmp_img_addr, img_data, img_len;
@@ -1469,8 +1474,8 @@ static void fit_loadable_process(uint8_t img_type,
 			fit_loadable_handler->handler(img_data, img_len);
 }
 
-int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
-		uint8_t arch, const ulong *ld_start, ulong * const ld_len)
+int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images,
+		      uint8_t arch, const ulong *ld_start, ulong * const ld_len)
 {
 	/*
 	 * These variables are used to hold the current image location
diff --git a/common/init/board_init.c b/common/init/board_init.c
index f7c8a173ff..8c8a5eac05 100644
--- a/common/init/board_init.c
+++ b/common/init/board_init.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
+#include <init.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/iotrace.c b/common/iotrace.c
index 295ee07b72..7225ee4404 100644
--- a/common/iotrace.c
+++ b/common/iotrace.c
@@ -9,6 +9,7 @@
 #include <mapmem.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/bug.h>
 #include <u-boot/crc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/kgdb.c b/common/kgdb.c
index daf53bed7a..4493a15919 100644
--- a/common/kgdb.c
+++ b/common/kgdb.c
@@ -88,6 +88,7 @@
  ****************************************************************************/
 
 #include <common.h>
+#include <asm/ptrace.h>
 
 #include <kgdb.h>
 #include <command.h>
@@ -574,7 +575,7 @@ breakpoint(void)
 }
 
 int
-do_kgdb(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+do_kgdb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
     printf("Entering KGDB mode via exception handler...\n\n");
     kgdb_breakpoint(argc - 1, argv + 1);
diff --git a/common/kgdb_stubs.c b/common/kgdb_stubs.c
index c061126bed..66aed7cea1 100644
--- a/common/kgdb_stubs.c
+++ b/common/kgdb_stubs.c
@@ -11,6 +11,7 @@
 #include <cpu_func.h>
 #include <kgdb.h>
 #include <serial.h>
+#include <asm/ptrace.h>
 
 int (*debugger_exception_handler)(struct pt_regs *);
 
diff --git a/common/lcd.c b/common/lcd.c
index f8bc1ceba7..02f2db3a99 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -12,6 +12,9 @@
 #include <command.h>
 #include <cpu_func.h>
 #include <env_callback.h>
+#include <log.h>
+#include <asm/cache.h>
+#include <init.h>
 #include <linux/types.h>
 #include <stdio_dev.h>
 #include <lcd.h>
diff --git a/common/lcd_console.c b/common/lcd_console.c
index d34bc2fa83..1a246c492c 100644
--- a/common/lcd_console.c
+++ b/common/lcd_console.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <lcd.h>
+#include <log.h>
 #include <serial.h>
 #include <video_font.h>		/* Get font data, width and height */
 #if defined(CONFIG_LCD_LOGO)
@@ -219,7 +221,7 @@ void lcd_printf(const char *fmt, ...)
 	lcd_puts(buf);
 }
 
-static int do_lcd_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_lcd_setcursor(struct cmd_tbl *cmdtp, int flag, int argc,
 			    char *const argv[])
 {
 	unsigned int col, row;
@@ -234,7 +236,7 @@ static int do_lcd_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_lcd_puts(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_lcd_puts(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	if (argc != 2)
diff --git a/common/log_syslog.c b/common/log_syslog.c
index 5e3e20e8a4..698c585fa1 100644
--- a/common/log_syslog.c
+++ b/common/log_syslog.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <log.h>
+#include <net.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/main.c b/common/main.c
index 06d7ff56d6..4b3cd302c3 100644
--- a/common/main.c
+++ b/common/main.c
@@ -8,11 +8,13 @@
 
 #include <common.h>
 #include <autoboot.h>
+#include <bootstage.h>
 #include <cli.h>
 #include <command.h>
 #include <console.h>
 #include <env.h>
 #include <init.h>
+#include <net.h>
 #include <version.h>
 
 static void run_preboot_environment_command(void)
diff --git a/common/malloc_simple.c b/common/malloc_simple.c
index eabbb70128..34f0b49093 100644
--- a/common/malloc_simple.c
+++ b/common/malloc_simple.c
@@ -8,6 +8,7 @@
 #define LOG_CATEGORY LOGC_ALLOC
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <asm/io.h>
diff --git a/common/menu.c b/common/menu.c
index 7b66d199a9..5fb2ffbd06 100644
--- a/common/menu.c
+++ b/common/menu.c
@@ -36,6 +36,7 @@ struct menu {
 	int timeout;
 	char *title;
 	int prompt;
+	void (*display_statusline)(struct menu *);
 	void (*item_data_print)(void *);
 	char *(*item_choice)(void *);
 	void *item_choice_data;
@@ -106,10 +107,6 @@ static inline void *menu_item_destroy(struct menu *m,
 	return NULL;
 }
 
-__weak void menu_display_statusline(struct menu *m)
-{
-}
-
 /*
  * Display a menu so the user can make a choice of an item. First display its
  * title, if any, and then each item in the menu.
@@ -120,7 +117,8 @@ static inline void menu_display(struct menu *m)
 		puts(m->title);
 		putc('\n');
 	}
-	menu_display_statusline(m);
+	if (m->display_statusline)
+		m->display_statusline(m);
 
 	menu_items_iter(m, menu_item_print, NULL);
 }
@@ -344,6 +342,9 @@ int menu_item_add(struct menu *m, char *item_key, void *item_data)
  * timeout. If 1, the user will be prompted for input regardless of the value
  * of timeout.
  *
+ * display_statusline - If not NULL, will be called to show a statusline when
+ * the menu is displayed.
+ *
  * item_data_print - If not NULL, will be called for each item when the menu
  * is displayed, with the pointer to the item's data passed as the argument.
  * If NULL, each item's key will be printed instead.  Since an item's key is
@@ -360,6 +361,7 @@ int menu_item_add(struct menu *m, char *item_key, void *item_data)
  * insufficient memory available to create the menu.
  */
 struct menu *menu_create(char *title, int timeout, int prompt,
+				void (*display_statusline)(struct menu *),
 				void (*item_data_print)(void *),
 				char *(*item_choice)(void *),
 				void *item_choice_data)
@@ -374,6 +376,7 @@ struct menu *menu_create(char *title, int timeout, int prompt,
 	m->default_item = NULL;
 	m->prompt = prompt;
 	m->timeout = timeout;
+	m->display_statusline = display_statusline;
 	m->item_data_print = item_data_print;
 	m->item_choice = item_choice;
 	m->item_choice_data = item_choice_data;
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index 2db067876e..7d4d15ed91 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -11,8 +11,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <miiphy.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 #include <asm/types.h>
 #include <linux/list.h>
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index ef5bf66696..414b6f396d 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -663,15 +663,6 @@ config SPL_MMC_SUPPORT
 	  this option to build the drivers in drivers/mmc as part of an SPL
 	  build.
 
-config SPL_FORCE_MMC_BOOT
-	bool "Force SPL booting from MMC"
-	depends on SPL_MMC_SUPPORT
-	default n
-	help
-	  Force SPL to use MMC device for Linux kernel booting even when the
-	  SoC ROM recognized boot medium is not eMMC/SD. This is crucial for
-	  factory or 'falcon mode' booting.
-
 config SPL_MMC_TINY
 	bool "Tiny MMC framework in SPL"
 	depends on SPL_MMC_SUPPORT
@@ -979,7 +970,7 @@ config SPL_POWER_DOMAIN
 
 config SPL_RAM_SUPPORT
 	bool "Support booting from RAM"
-	default y if MICROBLAZE || ARCH_SOCFPGA || TEGRA || ARCH_ZYNQ
+	default y if MICROBLAZE || ARCH_SOCFPGA || ARCH_TEGRA || ARCH_ZYNQ
 	help
 	  Enable booting of an image in RAM. The image can be preloaded or
 	  it can be loaded by SPL directly into RAM (e.g. using USB).
@@ -987,7 +978,7 @@ config SPL_RAM_SUPPORT
 config SPL_RAM_DEVICE
 	bool "Support booting from preloaded image in RAM"
 	depends on SPL_RAM_SUPPORT
-	default y if MICROBLAZE || ARCH_SOCFPGA || TEGRA || ARCH_ZYNQ
+	default y if MICROBLAZE || ARCH_SOCFPGA || ARCH_TEGRA || ARCH_ZYNQ
 	help
 	  Enable booting of an image already loaded in RAM. The image has to
 	  be already in memory when SPL takes over, e.g. loaded by the boot
@@ -1181,6 +1172,14 @@ config SPL_USB_SDP_SUPPORT
 	  Enable Serial Download Protocol (SDP) device support in SPL. This
 	  allows to download images into memory and execute (jump to) them
 	  using the same protocol as implemented by the i.MX family's boot ROM.
+
+config SPL_SDP_USB_DEV
+	int "SDP USB controller index"
+	default 0
+	depends on SPL_USB_SDP_SUPPORT
+	help
+	  Some boards have USB controller other than 0. Define this option
+	  so it can be used in compiled environment.
 endif
 
 config SPL_WATCHDOG_SUPPORT
diff --git a/common/spl/spl.c b/common/spl/spl.c
index b0f0e1557b..0e96a8cd10 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -9,10 +9,13 @@
 #include <common.h>
 #include <bloblist.h>
 #include <binman_sym.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <handoff.h>
 #include <hang.h>
+#include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <serial.h>
 #include <spl.h>
 #include <asm/u-boot.h>
@@ -58,7 +61,8 @@ static bd_t bdata __attribute__ ((section(".data")));
  */
 __weak void show_boot_progress(int val) {}
 
-#if defined(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF)
+#if defined(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) || \
+	defined(CONFIG_SPL_ATF)
 /* weak, default platform-specific function to initialize dram banks */
 __weak int dram_init_banksize(void)
 {
@@ -100,12 +104,14 @@ void __weak spl_perform_fixups(struct spl_image_info *spl_image)
 {
 }
 
-void spl_fixup_fdt(void)
+void spl_fixup_fdt(void *fdt_blob)
 {
-#if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR)
-	void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR;
+#if defined(CONFIG_SPL_OF_LIBFDT)
 	int err;
 
+	if (!fdt_blob)
+		return;
+
 	err = fdt_check_header(fdt_blob);
 	if (err < 0) {
 		printf("fdt_root: %s\n", fdt_strerror(err));
@@ -423,11 +429,11 @@ static int spl_common_init(bool setup_malloc)
 		}
 	}
 	if (CONFIG_IS_ENABLED(DM)) {
-		bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL,
+		bootstage_start(BOOTSTAGE_ID_ACCUM_DM_SPL,
 				spl_phase() == PHASE_TPL ? "dm tpl" : "dm_spl");
 		/* With CONFIG_SPL_OF_PLATDATA, bring in all devices */
 		ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA));
-		bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL);
+		bootstage_accum(BOOTSTAGE_ID_ACCUM_DM_SPL);
 		if (ret) {
 			debug("dm_init_and_scan() returned error %d\n", ret);
 			return ret;
@@ -574,8 +580,7 @@ void board_init_f(ulong dummy)
 		}
 	}
 
-	if (CONFIG_IS_ENABLED(SERIAL_SUPPORT))
-		preloader_console_init();
+	preloader_console_init();
 }
 #endif
 
@@ -638,7 +643,8 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	initr_watchdog();
 #endif
 
-	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF))
+	if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) ||
+	    IS_ENABLED(CONFIG_SPL_ATF))
 		dram_init_banksize();
 
 	bootcount_inc();
@@ -680,6 +686,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #if CONFIG_IS_ENABLED(ATF)
 	case IH_OS_ARM_TRUSTED_FIRMWARE:
 		debug("Jumping to U-Boot via ARM Trusted Firmware\n");
+		spl_fixup_fdt(spl_image.fdt_addr);
 		spl_invoke_atf(&spl_image);
 		break;
 #endif
@@ -699,7 +706,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 #ifdef CONFIG_SPL_OS_BOOT
 	case IH_OS_LINUX:
 		debug("Jumping to Linux\n");
-		spl_fixup_fdt();
+#if defined(CONFIG_SYS_SPL_ARGS_ADDR)
+		spl_fixup_fdt((void *)CONFIG_SYS_SPL_ARGS_ADDR);
+#endif
 		spl_board_prepare_for_linux();
 		jump_to_image_linux(&spl_image);
 #endif
@@ -724,13 +733,13 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
 	jump_to_image_no_args(&spl_image);
 }
 
-#ifdef CONFIG_SPL_SERIAL_SUPPORT
 /*
  * This requires UART clocks to be enabled.  In order for this to work the
  * caller must ensure that the gd pointer is valid.
  */
 void preloader_console_init(void)
 {
+#ifdef CONFIG_SPL_SERIAL_SUPPORT
 	gd->baudrate = CONFIG_BAUDRATE;
 
 	serial_init();		/* serial communications setup */
@@ -744,8 +753,8 @@ void preloader_console_init(void)
 #ifdef CONFIG_SPL_DISPLAY_PRINT
 	spl_display_print();
 #endif
-}
 #endif
+}
 
 /**
  * This function is called before the stack is changed from initial stack to
diff --git a/common/spl/spl_atf.c b/common/spl/spl_atf.c
index 702367b2a2..b54b4f0d22 100644
--- a/common/spl/spl_atf.c
+++ b/common/spl/spl_atf.c
@@ -13,7 +13,10 @@
 #include <atf_common.h>
 #include <cpu_func.h>
 #include <errno.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
+#include <asm/cache.h>
 
 static struct bl2_to_bl31_params_mem bl31_params_mem;
 static struct bl31_params *bl2_to_bl31_params;
diff --git a/common/spl/spl_ext.c b/common/spl/spl_ext.c
index 2a6252229c..3898041d10 100644
--- a/common/spl/spl_ext.c
+++ b/common/spl/spl_ext.c
@@ -2,6 +2,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <part.h>
 #include <spl.h>
 #include <asm/u-boot.h>
 #include <ext4fs.h>
@@ -15,7 +16,7 @@ int spl_load_image_ext(struct spl_image_info *spl_image,
 	s32 err;
 	struct image_header *header;
 	loff_t filelen, actlen;
-	disk_partition_t part_info = {};
+	struct disk_partition part_info = {};
 
 	header = spl_get_load_buffer(-sizeof(*header), sizeof(*header));
 
@@ -69,7 +70,7 @@ int spl_load_image_ext_os(struct spl_image_info *spl_image,
 {
 	int err;
 	__maybe_unused loff_t filelen, actlen;
-	disk_partition_t part_info = {};
+	struct disk_partition part_info = {};
 	__maybe_unused char *file;
 
 	if (part_get_info(block_dev, partition, &part_info)) {
diff --git a/common/spl/spl_fat.c b/common/spl/spl_fat.c
index aa371ab52c..c2eb097365 100644
--- a/common/spl/spl_fat.c
+++ b/common/spl/spl_fat.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/u-boot.h>
 #include <fat.h>
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index c51e4beb1c..f581a22421 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -10,8 +10,10 @@
 #include <fpga.h>
 #include <gzip.h>
 #include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <spl.h>
+#include <asm/cache.h>
 #include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/common/spl/spl_legacy.c b/common/spl/spl_legacy.c
index 29d3ec7073..82d0326806 100644
--- a/common/spl/spl_legacy.c
+++ b/common/spl/spl_legacy.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <spl.h>
 
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index a68cdec8dc..add2785b4e 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -7,6 +7,8 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <part.h>
 #include <spl.h>
 #include <linux/compiler.h>
 #include <errno.h>
@@ -168,7 +170,7 @@ static int mmc_load_image_raw_partition(struct spl_image_info *spl_image,
 					struct mmc *mmc, int partition,
 					unsigned long sector)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 	int err;
 
 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 5f8a111a2f..48c97549eb 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -5,6 +5,9 @@
  */
 #include <common.h>
 #include <config.h>
+#include <fdt_support.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <nand.h>
diff --git a/common/spl/spl_net.c b/common/spl/spl_net.c
index 30c050c0b3..e140a6306f 100644
--- a/common/spl/spl_net.c
+++ b/common/spl/spl_net.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <env.h>
 #include <errno.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <net.h>
 #include <linux/libfdt.h>
diff --git a/common/spl/spl_nor.c b/common/spl/spl_nor.c
index 3f03ffe6a3..5270401db0 100644
--- a/common/spl/spl_nor.c
+++ b/common/spl/spl_nor.c
@@ -4,6 +4,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 
 static ulong spl_nor_load_read(struct spl_load_info *load, ulong sector,
diff --git a/common/spl/spl_onenand.c b/common/spl/spl_onenand.c
index ee30f328e6..93cbf47e82 100644
--- a/common/spl/spl_onenand.c
+++ b/common/spl/spl_onenand.c
@@ -9,6 +9,8 @@
  */
 #include <common.h>
 #include <config.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <onenand_uboot.h>
diff --git a/common/spl/spl_opensbi.c b/common/spl/spl_opensbi.c
index 3519c34299..e88136e6f3 100644
--- a/common/spl/spl_opensbi.c
+++ b/common/spl/spl_opensbi.c
@@ -9,9 +9,11 @@
 #include <cpu_func.h>
 #include <errno.h>
 #include <hang.h>
+#include <image.h>
 #include <spl.h>
 #include <asm/smp.h>
 #include <opensbi.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 954e91a004..df1d5b43d8 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -11,6 +11,8 @@
  */
 #include <common.h>
 #include <binman_sym.h>
+#include <image.h>
+#include <log.h>
 #include <mapmem.h>
 #include <spl.h>
 #include <linux/libfdt.h>
diff --git a/common/spl/spl_sdp.c b/common/spl/spl_sdp.c
index 806bf1327e..e7f7b68411 100644
--- a/common/spl/spl_sdp.c
+++ b/common/spl/spl_sdp.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spl.h>
 #include <usb.h>
 #include <g_dnl.h>
@@ -14,7 +15,9 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 			      struct spl_boot_device *bootdev)
 {
 	int ret;
-	const int controller_index = 0;
+	const int controller_index = CONFIG_SPL_SDP_USB_DEV;
+
+	usb_gadget_initialize(controller_index);
 
 	g_dnl_clear_detach();
 	ret = g_dnl_register("usb_dnl_sdp");
@@ -37,6 +40,7 @@ static int spl_sdp_load_image(struct spl_image_info *spl_image,
 	ret = spl_sdp_handle(controller_index, spl_image);
 	debug("SDP ended\n");
 
+	usb_gadget_release(controller_index);
 	return ret;
 }
 SPL_LOAD_IMAGE_METHOD("USB SDP", 0, BOOT_DEVICE_BOARD, spl_sdp_load_image);
diff --git a/common/spl/spl_spi.c b/common/spl/spl_spi.c
index 288dbb5fa9..2744fb5d52 100644
--- a/common/spl/spl_spi.c
+++ b/common/spl/spl_spi.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <spi.h>
 #include <spi_flash.h>
 #include <errno.h>
diff --git a/common/spl/spl_ubi.c b/common/spl/spl_ubi.c
index 0cb5080882..de6a63bd2d 100644
--- a/common/spl/spl_ubi.c
+++ b/common/spl/spl_ubi.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <config.h>
+#include <image.h>
 #include <nand.h>
 #include <onenand_uboot.h>
 #include <ubispl.h>
diff --git a/common/spl/spl_usb.c b/common/spl/spl_usb.c
index e29d579b0d..08837b38fc 100644
--- a/common/spl/spl_usb.c
+++ b/common/spl/spl_usb.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/u-boot.h>
 #include <errno.h>
diff --git a/common/spl/spl_xip.c b/common/spl/spl_xip.c
index 1af4da8725..8ce0a09ef3 100644
--- a/common/spl/spl_xip.c
+++ b/common/spl/spl_xip.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 
 static int spl_xip(struct spl_image_info *spl_image,
diff --git a/common/spl/spl_ymodem.c b/common/spl/spl_ymodem.c
index 8500ee8ba5..284512478f 100644
--- a/common/spl/spl_ymodem.c
+++ b/common/spl/spl_ymodem.c
@@ -10,6 +10,8 @@
  */
 #include <common.h>
 #include <gzip.h>
+#include <image.h>
+#include <log.h>
 #include <spl.h>
 #include <xyzModem.h>
 #include <asm/u-boot.h>
diff --git a/common/splash_source.c b/common/splash_source.c
index 2ff15208a7..f51ca5ddf3 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -13,6 +13,7 @@
 #include <fs.h>
 #include <fdt_support.h>
 #include <image.h>
+#include <log.h>
 #include <nand.h>
 #include <sata.h>
 #include <spi.h>
diff --git a/common/stdio.c b/common/stdio.c
index 54ecc9b53d..2119204b98 100644
--- a/common/stdio.c
+++ b/common/stdio.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <stdarg.h>
 #include <malloc.h>
 #include <stdio_dev.h>
diff --git a/common/usb.c b/common/usb.c
index 686f09a77d..aad13fd9c5 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -28,6 +28,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <asm/processor.h>
@@ -37,6 +38,7 @@
 #include <asm/unaligned.h>
 #include <errno.h>
 #include <usb.h>
+#include <linux/delay.h>
 
 #define USB_BUFSIZ	512
 
diff --git a/common/usb_hub.c b/common/usb_hub.c
index c642b683e7..e578f0be28 100644
--- a/common/usb_hub.c
+++ b/common/usb_hub.c
@@ -26,11 +26,13 @@
 #include <dm.h>
 #include <env.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <asm/processor.h>
 #include <asm/unaligned.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <linux/list.h>
 #include <asm/byteorder.h>
 #ifdef CONFIG_SANDBOX
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index a6221ef716..b316807844 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <env.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <stdio_dev.h>
diff --git a/common/usb_storage.c b/common/usb_storage.c
index b291ac55d1..ff25441995 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -33,15 +33,19 @@
 
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <mapmem.h>
 #include <memalign.h>
 #include <asm/byteorder.h>
+#include <asm/cache.h>
 #include <asm/processor.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <linux/delay.h>
 
 #include <part.h>
 #include <usb.h>
diff --git a/config.mk b/config.mk
index 097d1f67d2..7bb1fd4ed1 100644
--- a/config.mk
+++ b/config.mk
@@ -23,7 +23,7 @@ VENDOR :=
 ARCH := $(CONFIG_SYS_ARCH:"%"=%)
 CPU := $(CONFIG_SYS_CPU:"%"=%)
 ifdef CONFIG_SPL_BUILD
-ifdef CONFIG_TEGRA
+ifdef CONFIG_ARCH_TEGRA
 CPU := arm720t
 endif
 endif
diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig
index bb68698fd6..e1b66774e4 100644
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -17,7 +17,6 @@ CONFIG_VIDEO_LCD_BL_PWM="PB2"
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
index 40b3883971..3e0a53fec8 100644
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -15,11 +15,11 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2-emmc"
 CONFIG_SCSI_AHCI=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
index 2b082cab59..6935fc6012 100644
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -13,11 +13,12 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime2"
 CONFIG_SCSI_AHCI=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
index 975df4e778..950c94813a 100644
--- a/configs/A20-OLinuXino-Lime_defconfig
+++ b/configs/A20-OLinuXino-Lime_defconfig
@@ -11,6 +11,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-lime"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
index 0ccb609a22..3317aceef5 100644
--- a/configs/A20-OLinuXino_MICRO-eMMC_defconfig
+++ b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -13,6 +13,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro-emmc"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
index 0a68fd9e6a..d5bb51ff26 100644
--- a/configs/A20-OLinuXino_MICRO_defconfig
+++ b/configs/A20-OLinuXino_MICRO_defconfig
@@ -14,6 +14,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olinuxino-micro"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
index 5b5ed3bb0a..56f6ad8275 100644
--- a/configs/A20-Olimex-SOM-EVB_defconfig
+++ b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -15,6 +15,8 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som-evb"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_RTL8211X_PHY_FORCE_MASTER=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
index ee3b752ec3..005c152e0f 100644
--- a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
@@ -13,13 +13,13 @@ CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb-emmc"
 CONFIG_SCSI_AHCI=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_PHY_ADDR=3
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig
index 0272911ecf..b699af5e19 100644
--- a/configs/A20-Olimex-SOM204-EVB_defconfig
+++ b/configs/A20-Olimex-SOM204-EVB_defconfig
@@ -12,13 +12,13 @@ CONFIG_GMAC_TX_DELAY=4
 CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-olimex-som204-evb"
 CONFIG_SCSI_AHCI=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_PHY_ADDR=3
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig
index aeb22f1b77..6fcb51a1cd 100644
--- a/configs/B4420QDS_NAND_defconfig
+++ b/configs/B4420QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4420QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig
index 07450076af..5dc72cb3f2 100644
--- a/configs/B4420QDS_SPIFLASH_defconfig
+++ b/configs/B4420QDS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4420QDS=y
 CONFIG_FIT=y
@@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig
index c982dd6f4e..5f9a88adfa 100644
--- a/configs/B4420QDS_defconfig
+++ b/configs/B4420QDS_defconfig
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig
index b26d458898..0874acd83e 100644
--- a/configs/B4860QDS_NAND_defconfig
+++ b/configs/B4860QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4860QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig
index 9ead606eac..4d7bf5dc39 100644
--- a/configs/B4860QDS_SECURE_BOOT_defconfig
+++ b/configs/B4860QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4860QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig
index 1d4fac84a0..566076543f 100644
--- a/configs/B4860QDS_SPIFLASH_defconfig
+++ b/configs/B4860QDS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_B4860QDS=y
 CONFIG_FIT=y
@@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
index 11c59c8a32..58195adcbc 100644
--- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig
@@ -33,6 +33,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig
index aa11996ddb..68ff6ed953 100644
--- a/configs/B4860QDS_defconfig
+++ b/configs/B4860QDS_defconfig
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
index 49cee6dcaa..64f6dadc22 100644
--- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig
@@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xE0000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9131RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -43,7 +43,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig
index f212dc8d6c..eda1ac428c 100644
--- a/configs/BSC9131RDB_NAND_defconfig
+++ b/configs/BSC9131RDB_NAND_defconfig
@@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xE0000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9131RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
index 958b831051..8ac33150f8 100644
--- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9131RDB=y
 CONFIG_FIT=y
@@ -35,7 +35,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig
index 81fca1d548..10d866661b 100644
--- a/configs/BSC9131RDB_SPIFLASH_defconfig
+++ b/configs/BSC9131RDB_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9131RDB=y
 CONFIG_FIT=y
@@ -35,7 +35,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
index 48d3b18dbd..83300b204a 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
index c3a655b780..5f85370a0a 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig
@@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xE0000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
index 9884c6c727..646158bb77 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
index c92dd73b0f..82f37fbf1c 100644
--- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig
@@ -4,9 +4,9 @@ CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xE0000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFFE000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
index 31ddd01c5a..25ed8dc6a7 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x8FF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
index 9dcc015f2f..e0e441de44 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
index 114250ca21..f7181d69d2 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x8FF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
index 718674316d..0ea77dc3a9 100644
--- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
index 0909ce4a01..30bdc5d3d2 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
index 8d5e9f004e..0e93c0d1c2 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
index 0086febde7..ca119d0625 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
index 0766e0f3df..288d4cf883 100644
--- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
index ebc71e43c4..e30dd9be90 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
index d12d6633b2..8f4d4b8fbb 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 CONFIG_FIT=y
@@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
index 64c6acf1f2..80c51aa705 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
index a62a3812ab..fb16caad9a 100644
--- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
+++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_BSC9132QDS=y
 CONFIG_FIT=y
@@ -42,7 +42,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
index b309171d04..3b5081789d 100644
--- a/configs/Bananapi_defconfig
+++ b/configs/Bananapi_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi"
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Bananapi_m2m_defconfig b/configs/Bananapi_m2m_defconfig
index 2649c7e84a..8806fe66c2 100644
--- a/configs/Bananapi_m2m_defconfig
+++ b/configs/Bananapi_m2m_defconfig
@@ -9,7 +9,6 @@ CONFIG_MMC0_CD_PIN="PB4"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB0_ID_DET="PH8"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-bananapi-m2m"
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
index 0cec760ffa..834d3e4e60 100644
--- a/configs/Bananapro_defconfig
+++ b/configs/Bananapro_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapro"
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig
index f850bdf4d8..cdcf50eee8 100644
--- a/configs/C29XPCIE_NAND_defconfig
+++ b/configs/C29XPCIE_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -51,7 +51,15 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig
index ca3065f3df..e43c72860a 100644
--- a/configs/C29XPCIE_NOR_SECBOOT_defconfig
+++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -33,7 +33,15 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
index 3e5d26866d..b7eb77e2a0 100644
--- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -35,7 +35,15 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig
index 883c33b0e9..9bfdcd0461 100644
--- a/configs/C29XPCIE_SPIFLASH_defconfig
+++ b/configs/C29XPCIE_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_C29XPCIE=y
 CONFIG_FIT=y
@@ -36,7 +36,15 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig
index b2781b832c..3e7f19692a 100644
--- a/configs/C29XPCIE_defconfig
+++ b/configs/C29XPCIE_defconfig
@@ -34,7 +34,15 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/CSQ_CS908_defconfig b/configs/CSQ_CS908_defconfig
index f9026a422d..d9223a0324 100644
--- a/configs/CSQ_CS908_defconfig
+++ b/configs/CSQ_CS908_defconfig
@@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN=""
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-cs908"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Colombus_defconfig b/configs/Colombus_defconfig
index f70f92e0a6..71f62b5118 100644
--- a/configs/Colombus_defconfig
+++ b/configs/Colombus_defconfig
@@ -17,6 +17,7 @@ CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
 CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
index 0c7aafd25a..aa7a9d48bf 100644
--- a/configs/Cubieboard2_defconfig
+++ b/configs/Cubieboard2_defconfig
@@ -10,6 +10,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubieboard2"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
index 32c44ff382..c0d75ba8bc 100644
--- a/configs/Cubietruck_defconfig
+++ b/configs/Cubietruck_defconfig
@@ -15,11 +15,11 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-cubietruck"
 CONFIG_SCSI_AHCI=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Hummingbird_A31_defconfig b/configs/Hummingbird_A31_defconfig
index 15984ec5a3..6798698fe9 100644
--- a/configs/Hummingbird_A31_defconfig
+++ b/configs/Hummingbird_A31_defconfig
@@ -9,6 +9,7 @@ CONFIG_VIDEO_VGA_VIA_LCD=y
 CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-hummingbird"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
index 9ddfb6f5e2..a232bc32a7 100644
--- a/configs/Itead_Ibox_A20_defconfig
+++ b/configs/Itead_Ibox_A20_defconfig
@@ -10,6 +10,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-itead-ibox"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
index c3cb3654bb..34db56f79b 100644
--- a/configs/Lamobo_R1_defconfig
+++ b/configs/Lamobo_R1_defconfig
@@ -14,6 +14,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-lamobo-r1"
 CONFIG_SCSI_AHCI=y
 CONFIG_B53_SWITCH=y
 CONFIG_B53_PHY_PORTS=0x1f
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
index 7377debc9b..72690e2950 100644
--- a/configs/Linksprite_pcDuino3_Nano_defconfig
+++ b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -12,6 +12,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3-nano"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
index ad78152a04..172a2e8e43 100644
--- a/configs/Linksprite_pcDuino3_defconfig
+++ b/configs/Linksprite_pcDuino3_defconfig
@@ -10,6 +10,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-pcduino3"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig
index 027e6f7836..1a89934c25 100644
--- a/configs/M52277EVB_stmicro_defconfig
+++ b/configs/M52277EVB_stmicro_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x43E00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x30000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M52277EVB=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT"
 CONFIG_BOOTDELAY=3
diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig
index 249718d452..4cecb5a15b 100644
--- a/configs/M54418TWR_defconfig
+++ b/configs/M54418TWR_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x47E00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M54418TWR=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
 CONFIG_USE_BOOTARGS=y
diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig
index 5085bb3fbc..014cc25792 100644
--- a/configs/M54418TWR_serial_mii_defconfig
+++ b/configs/M54418TWR_serial_mii_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x47E00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M54418TWR=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=25000000"
 CONFIG_USE_BOOTARGS=y
diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig
index 42201cc21c..18e7fe9317 100644
--- a/configs/M54418TWR_serial_rmii_defconfig
+++ b/configs/M54418TWR_serial_rmii_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x47E00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M54418TWR=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=50000000"
 CONFIG_USE_BOOTARGS=y
diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig
index 4bf3fc12b0..f9aa2d0d5d 100644
--- a/configs/M54451EVB_stmicro_defconfig
+++ b/configs/M54451EVB_stmicro_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x47E00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x20000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M54451EVB=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000"
 CONFIG_BOOTDELAY=1
diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig
index 55d4bc31de..83fdaf79de 100644
--- a/configs/M54455EVB_stm33_defconfig
+++ b/configs/M54455EVB_stm33_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x4FE00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x30000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_M54455EVB=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333"
 CONFIG_BOOTDELAY=1
diff --git a/configs/MPC8308RDB_defconfig b/configs/MPC8308RDB_defconfig
index dc9ebb8f5c..da4154381b 100644
--- a/configs/MPC8308RDB_defconfig
+++ b/configs/MPC8308RDB_defconfig
@@ -136,7 +136,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8313ERDB_33_defconfig b/configs/MPC8313ERDB_33_defconfig
index 07ebb279e1..d4db18f7f2 100644
--- a/configs/MPC8313ERDB_33_defconfig
+++ b/configs/MPC8313ERDB_33_defconfig
@@ -154,7 +154,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_66_defconfig b/configs/MPC8313ERDB_66_defconfig
index 432193bfd4..b381309b7f 100644
--- a/configs/MPC8313ERDB_66_defconfig
+++ b/configs/MPC8313ERDB_66_defconfig
@@ -153,7 +153,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_NAND_33_defconfig b/configs/MPC8313ERDB_NAND_33_defconfig
index af09f1641d..30feda2485 100644
--- a/configs/MPC8313ERDB_NAND_33_defconfig
+++ b/configs/MPC8313ERDB_NAND_33_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x90000
 CONFIG_SYS_CLK_FREQ=33333333
+CONFIG_SPL_TEXT_BASE=0xFFF00000
 CONFIG_MPC83xx=y
 CONFIG_HIGH_BATS=y
 CONFIG_TARGET_MPC8313ERDB_NAND=y
@@ -128,7 +129,6 @@ CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
 CONFIG_LCRR_EADC_1=y
 CONFIG_LCRR_CLKDIV_4=y
-CONFIG_SPL_TEXT_BASE=0xFFF00000
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_33MHZ"
@@ -163,7 +163,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8313ERDB_NAND_66_defconfig b/configs/MPC8313ERDB_NAND_66_defconfig
index f2d8a653ac..f7c83fbf62 100644
--- a/configs/MPC8313ERDB_NAND_66_defconfig
+++ b/configs/MPC8313ERDB_NAND_66_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x90000
 CONFIG_SYS_CLK_FREQ=66666667
+CONFIG_SPL_TEXT_BASE=0xFFF00000
 CONFIG_MPC83xx=y
 CONFIG_HIGH_BATS=y
 CONFIG_TARGET_MPC8313ERDB_NAND=y
@@ -127,7 +128,6 @@ CONFIG_ACR_PIPE_DEP_4=y
 CONFIG_ACR_RPTCNT_4=y
 CONFIG_LCRR_EADC_1=y
 CONFIG_LCRR_CLKDIV_4=y
-CONFIG_SPL_TEXT_BASE=0xFFF00000
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_66MHZ"
@@ -162,7 +162,15 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/MPC8315ERDB_defconfig b/configs/MPC8315ERDB_defconfig
index da6bc1dfa3..bbb79dff2e 100644
--- a/configs/MPC8315ERDB_defconfig
+++ b/configs/MPC8315ERDB_defconfig
@@ -138,7 +138,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index fd4e6ece43..a3f3a40e58 100644
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -103,6 +103,14 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig
index 1a618930c8..59611af430 100644
--- a/configs/MPC8349EMDS_SDRAM_defconfig
+++ b/configs/MPC8349EMDS_SDRAM_defconfig
@@ -112,7 +112,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 1351d96213..4b28bf848f 100644
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -103,6 +103,14 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index 5a8692fceb..2860c53825 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -104,7 +104,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349ITXGP_defconfig b/configs/MPC8349ITXGP_defconfig
index c4d41c63a8..6124458e59 100644
--- a/configs/MPC8349ITXGP_defconfig
+++ b/configs/MPC8349ITXGP_defconfig
@@ -172,7 +172,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349ITX_LOWBOOT_defconfig b/configs/MPC8349ITX_LOWBOOT_defconfig
index d5e253b0a6..a1d2a89e4a 100644
--- a/configs/MPC8349ITX_LOWBOOT_defconfig
+++ b/configs/MPC8349ITX_LOWBOOT_defconfig
@@ -177,7 +177,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8349ITX_defconfig b/configs/MPC8349ITX_defconfig
index 0517fc6ad4..1147fad91d 100644
--- a/configs/MPC8349ITX_defconfig
+++ b/configs/MPC8349ITX_defconfig
@@ -176,7 +176,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC837XEMDS_HOST_defconfig b/configs/MPC837XEMDS_HOST_defconfig
index 6aa991a11d..89e619fddf 100644
--- a/configs/MPC837XEMDS_HOST_defconfig
+++ b/configs/MPC837XEMDS_HOST_defconfig
@@ -171,7 +171,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC837XEMDS_SLAVE_defconfig b/configs/MPC837XEMDS_SLAVE_defconfig
index 1cce99d915..f9a3910b0c 100644
--- a/configs/MPC837XEMDS_SLAVE_defconfig
+++ b/configs/MPC837XEMDS_SLAVE_defconfig
@@ -128,6 +128,14 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC837XEMDS_defconfig b/configs/MPC837XEMDS_defconfig
index ebba5a2fbb..11b185d227 100644
--- a/configs/MPC837XEMDS_defconfig
+++ b/configs/MPC837XEMDS_defconfig
@@ -149,7 +149,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/MPC837XERDB_SLAVE_defconfig b/configs/MPC837XERDB_SLAVE_defconfig
index 39c50960bb..87fe4fcb39 100644
--- a/configs/MPC837XERDB_SLAVE_defconfig
+++ b/configs/MPC837XERDB_SLAVE_defconfig
@@ -125,6 +125,14 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
diff --git a/configs/MPC837XERDB_defconfig b/configs/MPC837XERDB_defconfig
index fd8335ee4e..0b4036072f 100644
--- a/configs/MPC837XERDB_defconfig
+++ b/configs/MPC837XERDB_defconfig
@@ -168,7 +168,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig
index a08e0967af..e60890e2d0 100644
--- a/configs/MPC8536DS_36BIT_defconfig
+++ b/configs/MPC8536DS_36BIT_defconfig
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig
index 1795a25f08..9f653661f4 100644
--- a/configs/MPC8536DS_SDCARD_defconfig
+++ b/configs/MPC8536DS_SDCARD_defconfig
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig
index eafd3546a5..866d719564 100644
--- a/configs/MPC8536DS_SPIFLASH_defconfig
+++ b/configs/MPC8536DS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xf8f40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xF0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8536DS=y
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig
index 8756310cb5..9366e7a757 100644
--- a/configs/MPC8536DS_defconfig
+++ b/configs/MPC8536DS_defconfig
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8541CDS_defconfig b/configs/MPC8541CDS_defconfig
index 7017f7f5c8..5c25c4fcd5 100644
--- a/configs/MPC8541CDS_defconfig
+++ b/configs/MPC8541CDS_defconfig
@@ -23,7 +23,15 @@ CONFIG_ENV_ADDR=0xFFFC0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/MPC8541CDS_legacy_defconfig b/configs/MPC8541CDS_legacy_defconfig
index a62d3663b5..5b5abbe6f4 100644
--- a/configs/MPC8541CDS_legacy_defconfig
+++ b/configs/MPC8541CDS_legacy_defconfig
@@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFC0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/MPC8544DS_defconfig b/configs/MPC8544DS_defconfig
index fb1ed08adb..c2c70d3444 100644
--- a/configs/MPC8544DS_defconfig
+++ b/configs/MPC8544DS_defconfig
@@ -28,7 +28,15 @@ CONFIG_SCSI_AHCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index a8700100e1..010e375740 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -23,11 +23,20 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 42c31d4237..deaa69d134 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -22,11 +22,20 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 263f24c179..ab6f6eacd6 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -22,11 +22,20 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 # CONFIG_MMC is not set
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8555CDS_defconfig b/configs/MPC8555CDS_defconfig
index b639175107..dcf7091055 100644
--- a/configs/MPC8555CDS_defconfig
+++ b/configs/MPC8555CDS_defconfig
@@ -23,7 +23,15 @@ CONFIG_ENV_ADDR=0xFFFC0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/MPC8555CDS_legacy_defconfig b/configs/MPC8555CDS_legacy_defconfig
index 51710bbdbe..7e369f1b4c 100644
--- a/configs/MPC8555CDS_legacy_defconfig
+++ b/configs/MPC8555CDS_legacy_defconfig
@@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFC0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/MPC8568MDS_defconfig b/configs/MPC8568MDS_defconfig
index 24bc0d582d..820bd72af4 100644
--- a/configs/MPC8568MDS_defconfig
+++ b/configs/MPC8568MDS_defconfig
@@ -25,7 +25,15 @@ CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_QE=y
diff --git a/configs/MPC8572DS_36BIT_defconfig b/configs/MPC8572DS_36BIT_defconfig
index bbb49876b1..50912bf245 100644
--- a/configs/MPC8572DS_36BIT_defconfig
+++ b/configs/MPC8572DS_36BIT_defconfig
@@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8572DS_defconfig b/configs/MPC8572DS_defconfig
index 1a32f25c53..fea1e281e0 100644
--- a/configs/MPC8572DS_defconfig
+++ b/configs/MPC8572DS_defconfig
@@ -32,7 +32,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/MPC8641HPCN_36BIT_defconfig b/configs/MPC8641HPCN_36BIT_defconfig
index 249cddac36..1e643673ec 100644
--- a/configs/MPC8641HPCN_36BIT_defconfig
+++ b/configs/MPC8641HPCN_36BIT_defconfig
@@ -27,7 +27,15 @@ CONFIG_SCSI_AHCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/MPC8641HPCN_defconfig b/configs/MPC8641HPCN_defconfig
index f87c616966..7ce7891d14 100644
--- a/configs/MPC8641HPCN_defconfig
+++ b/configs/MPC8641HPCN_defconfig
@@ -27,7 +27,15 @@ CONFIG_SCSI_AHCI=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/Mele_A1000G_quad_defconfig b/configs/Mele_A1000G_quad_defconfig
index babe9f11e5..cd652b3309 100644
--- a/configs/Mele_A1000G_quad_defconfig
+++ b/configs/Mele_A1000G_quad_defconfig
@@ -8,6 +8,7 @@ CONFIG_USB1_VBUS_PIN="PC27"
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mele-a1000g-quad"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Mele_I7_defconfig b/configs/Mele_I7_defconfig
index 1282d8763a..bedddf1db1 100644
--- a/configs/Mele_I7_defconfig
+++ b/configs/Mele_I7_defconfig
@@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="PC27"
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-i7"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Mele_M3_defconfig b/configs/Mele_M3_defconfig
index 60d15ab05b..1686463327 100644
--- a/configs/Mele_M3_defconfig
+++ b/configs/Mele_M3_defconfig
@@ -10,6 +10,7 @@ CONFIG_VIDEO_COMPOSITE=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m3"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
index 8900c7a1f1..1c6ab3ae24 100644
--- a/configs/Mele_M5_defconfig
+++ b/configs/Mele_M5_defconfig
@@ -11,6 +11,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-m5"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Mele_M9_defconfig b/configs/Mele_M9_defconfig
index b1b3b7af16..f7bd7fc300 100644
--- a/configs/Mele_M9_defconfig
+++ b/configs/Mele_M9_defconfig
@@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN="PC27"
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-m9"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
index af8c17defb..32135f3d0f 100644
--- a/configs/Orangepi_defconfig
+++ b/configs/Orangepi_defconfig
@@ -14,6 +14,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
index 43ee76fa18..a48939bb34 100644
--- a/configs/Orangepi_mini_defconfig
+++ b/configs/Orangepi_mini_defconfig
@@ -16,6 +16,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-orangepi-mini"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
index 5269b6e823..c1044520d7 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 4b2b8c4628..da04cab014 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -39,14 +39,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -58,14 +61,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
index 5e9f9648f0..723f6ca2bb 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 6f328a5745..e6edd395e7 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -21,14 +22,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -39,14 +43,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 83ad24aea8..dcd606b0c2 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -34,14 +34,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -52,14 +55,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
index a225ddaee6..9987cde995 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 08d8864653..c0800c8d7d 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -36,14 +36,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa_36b"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -54,14 +57,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
index 6ef808054b..9691fd2bd4 100644
--- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 796e112732..29ba692ca1 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -38,14 +38,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -57,14 +60,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
index ba4bcdf98a..49351264cb 100644
--- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -36,7 +36,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index 73dbb867e2..d8f87b5dac 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -20,14 +21,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -38,14 +42,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 947bd22657..9711082529 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -33,14 +33,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -51,14 +54,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
index 8f1f8a9b0c..b31bdff00d 100644
--- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index bd6d1ea702..de2ac2235f 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PA=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,14 +35,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pa"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -53,14 +56,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
index bbd2f26508..66bdebbf99 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index 1461b89f24..9f4876dd13 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -39,14 +39,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -58,14 +61,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
index 31550bb753..f2e40668ea 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index c857c8d728..e85af32e2c 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -21,14 +22,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -39,14 +43,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index f79796a480..45feab4ee4 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -34,14 +34,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -52,14 +55,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
index 4bcb9ced29..50b5c5f1c5 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index c4c3c4486c..3cd94f84ea 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -36,14 +36,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb_36b"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -54,14 +57,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
index 593e86646b..17708dee47 100644
--- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,7 +38,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 8378eede02..ddfe7b43a1 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -38,14 +38,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -57,14 +60,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
index 3be6893ff4..be455a0c8f 100644
--- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -37,7 +37,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index 764017a907..6011f8a9d8 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -4,6 +4,7 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
+CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -20,14 +21,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -38,14 +42,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index 437858b800..65f86fff60 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -33,14 +33,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -51,14 +54,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
index 586ed29817..ce3d7c4d6b 100644
--- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x11000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 7f222db0ab..f71ee19ba6 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1010RDB_PB=y
-CONFIG_SPL_TEXT_BASE=0xD0001000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,14 +35,17 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
 CONFIG_MTDIDS_DEFAULT="nand0=ff800000.flash"
 CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:2m(uboot-env),1m(dtb),5m(kernel),56m(fs),-(usr)"
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="p1010rdb-pb"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -53,14 +56,25 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
index 2276b48e2a..91d46e4727 100644
--- a/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020MBG=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -46,7 +46,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020MBG-PC_36BIT_defconfig b/configs/P1020MBG-PC_36BIT_defconfig
index 9d0e4c58ad..7930af3b73 100644
--- a/configs/P1020MBG-PC_36BIT_defconfig
+++ b/configs/P1020MBG-PC_36BIT_defconfig
@@ -34,7 +34,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020MBG-PC_SDCARD_defconfig b/configs/P1020MBG-PC_SDCARD_defconfig
index 811e11e7e9..708a4bbfbf 100644
--- a/configs/P1020MBG-PC_SDCARD_defconfig
+++ b/configs/P1020MBG-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020MBG=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -45,7 +45,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020MBG-PC_defconfig b/configs/P1020MBG-PC_defconfig
index 06d50d0057..4ff3712d0f 100644
--- a/configs/P1020MBG-PC_defconfig
+++ b/configs/P1020MBG-PC_defconfig
@@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index fadb4461ef..6ee52fe5e7 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -39,7 +39,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -49,6 +48,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -69,6 +77,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index f79176e5c4..489b91d8e7 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -35,7 +35,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -45,6 +44,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -64,6 +72,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index f9f5ab4254..4a8e4e3726 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -37,7 +37,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -47,6 +46,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -66,6 +74,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 6cab654759..f9a4b735ca 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -34,6 +33,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,7 +45,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -53,6 +61,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 723d150ef1..5c8231cba2 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -38,7 +38,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -48,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -60,7 +60,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -68,6 +76,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 0829adec7c..ad2bb90a49 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -34,7 +34,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -44,6 +43,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -55,7 +55,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -63,6 +71,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 8d1e989b87..b8055e49b0 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PC=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -36,7 +36,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -46,6 +45,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -65,6 +73,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index e337cebea4..a71985374e 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -23,7 +23,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -33,6 +32,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -52,6 +60,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index e5ee950acf..0043fd5f66 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -38,7 +38,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -51,6 +50,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -64,7 +64,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -72,6 +80,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index ba9bea5eee..cb0a8aec65 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -34,7 +34,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -47,6 +46,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -67,6 +75,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index d3a54f71f7..35e60ca856 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020RDB_PD=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -36,7 +36,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -49,6 +48,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -69,6 +77,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index fffdcc852a..d7f19c3d96 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -23,7 +23,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -36,6 +35,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -48,7 +48,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -56,6 +64,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
index 2dc7593320..4b00005624 100644
--- a/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020UTM=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -46,7 +46,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020UTM-PC_36BIT_defconfig b/configs/P1020UTM-PC_36BIT_defconfig
index 793ab1535f..968d3edbcf 100644
--- a/configs/P1020UTM-PC_36BIT_defconfig
+++ b/configs/P1020UTM-PC_36BIT_defconfig
@@ -34,7 +34,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020UTM-PC_SDCARD_defconfig b/configs/P1020UTM-PC_SDCARD_defconfig
index 2cd958a140..93302a12b0 100644
--- a/configs/P1020UTM-PC_SDCARD_defconfig
+++ b/configs/P1020UTM-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1020UTM=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -45,7 +45,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1020UTM-PC_defconfig b/configs/P1020UTM-PC_defconfig
index bd366e953b..c41ac7bfd4 100644
--- a/configs/P1020UTM-PC_defconfig
+++ b/configs/P1020UTM-PC_defconfig
@@ -33,7 +33,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig
index bd341ff9a2..ba1d836552 100644
--- a/configs/P1021RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -62,7 +62,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
index 5e81cfe62d..30b8372a5b 100644
--- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -57,7 +57,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
index 9e40031d5e..37bc209d98 100644
--- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig
index 28609f37b3..ca1be9c112 100644
--- a/configs/P1021RDB-PC_36BIT_defconfig
+++ b/configs/P1021RDB-PC_36BIT_defconfig
@@ -45,7 +45,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig
index 4140e0400d..1b38da48f7 100644
--- a/configs/P1021RDB-PC_NAND_defconfig
+++ b/configs/P1021RDB-PC_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig
index 5231aaec50..242b9eb3c9 100644
--- a/configs/P1021RDB-PC_SDCARD_defconfig
+++ b/configs/P1021RDB-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig
index e277ab4d85..6792e3f45a 100644
--- a/configs/P1021RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1021RDB-PC_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1021RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig
index 4abebb5cdf..54010afb56 100644
--- a/configs/P1021RDB-PC_defconfig
+++ b/configs/P1021RDB-PC_defconfig
@@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig
index 8ad9397ebc..2bfda3ed40 100644
--- a/configs/P1022DS_36BIT_NAND_defconfig
+++ b/configs/P1022DS_36BIT_NAND_defconfig
@@ -6,9 +6,9 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -59,7 +59,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig
index 5e818257f7..9cc214088c 100644
--- a/configs/P1022DS_36BIT_SDCARD_defconfig
+++ b/configs/P1022DS_36BIT_SDCARD_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -53,7 +53,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig
index fea76c4f70..80d3a88273 100644
--- a/configs/P1022DS_36BIT_SPIFLASH_defconfig
+++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig
@@ -3,15 +3,15 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -55,7 +55,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig
index 9e0eb0aa41..1048b53abb 100644
--- a/configs/P1022DS_36BIT_defconfig
+++ b/configs/P1022DS_36BIT_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig
index f10452788d..79754874b6 100644
--- a/configs/P1022DS_NAND_defconfig
+++ b/configs/P1022DS_NAND_defconfig
@@ -6,9 +6,9 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig
index 0db9171f34..4e80b8844e 100644
--- a/configs/P1022DS_SDCARD_defconfig
+++ b/configs/P1022DS_SDCARD_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig
index d41e8a8258..e55f05cf56 100644
--- a/configs/P1022DS_SPIFLASH_defconfig
+++ b/configs/P1022DS_SPIFLASH_defconfig
@@ -3,15 +3,15 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P1022DS=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig
index cee5e59429..c611ce418d 100644
--- a/configs/P1022DS_defconfig
+++ b/configs/P1022DS_defconfig
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1023RDB_defconfig b/configs/P1023RDB_defconfig
index a279a74cda..0c10bc051c 100644
--- a/configs/P1023RDB_defconfig
+++ b/configs/P1023RDB_defconfig
@@ -37,6 +37,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig
index 4f32964304..5116fac64a 100644
--- a/configs/P1024RDB_36BIT_defconfig
+++ b/configs/P1024RDB_36BIT_defconfig
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig
index d595553254..2e2eda74f0 100644
--- a/configs/P1024RDB_NAND_defconfig
+++ b/configs/P1024RDB_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -56,7 +56,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig
index bd443c9871..69a3718ec4 100644
--- a/configs/P1024RDB_SDCARD_defconfig
+++ b/configs/P1024RDB_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig
index 1c8abd631d..a09696cc63 100644
--- a/configs/P1024RDB_SPIFLASH_defconfig
+++ b/configs/P1024RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -52,7 +52,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig
index f38424fb4a..72665c4edf 100644
--- a/configs/P1024RDB_defconfig
+++ b/configs/P1024RDB_defconfig
@@ -39,7 +39,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig
index dbd9f7d81a..8eaddb1290 100644
--- a/configs/P1025RDB_36BIT_defconfig
+++ b/configs/P1025RDB_36BIT_defconfig
@@ -41,7 +41,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig
index 36c73a6e30..bbeb396f64 100644
--- a/configs/P1025RDB_NAND_defconfig
+++ b/configs/P1025RDB_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1025RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -58,7 +58,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig
index d73e41de7d..bc88a27479 100644
--- a/configs/P1025RDB_SDCARD_defconfig
+++ b/configs/P1025RDB_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1025RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -51,7 +51,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig
index f8feeb1d09..6dba8c5648 100644
--- a/configs/P1025RDB_SPIFLASH_defconfig
+++ b/configs/P1025RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P1025RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -54,7 +54,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig
index e2f5e4b4ea..92dc97ab08 100644
--- a/configs/P1025RDB_defconfig
+++ b/configs/P1025RDB_defconfig
@@ -40,7 +40,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index e2c647dbdf..3e6ea64ee3 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_PHYS_64BIT=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
@@ -40,7 +40,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -53,6 +52,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -66,7 +66,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -74,6 +82,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 04f2fc9c91..187cbee0d6 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -36,7 +36,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -49,6 +48,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -61,7 +61,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -69,6 +77,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index 03e5c7e211..88c9224001 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -38,7 +38,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -51,6 +50,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -63,7 +63,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -71,6 +79,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 8655b15b91..88e24c30ba 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -25,7 +25,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -38,6 +37,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -50,7 +50,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -58,6 +66,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 4e2b4e21a7..dda34dd43e 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -6,10 +6,10 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xFF800000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -39,7 +39,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -52,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -65,7 +65,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -73,6 +81,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index d1f3197774..c2b6ad5f32 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -7,10 +7,10 @@ CONFIG_ENV_OFFSET=0x0
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,7 +35,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -48,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -60,7 +60,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -68,6 +76,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index b38940dd0b..3ec208ee00 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x11001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_MPC85xx=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_P2020RDB=y
-CONFIG_SPL_TEXT_BASE=0xf8f81000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -37,7 +37,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -50,6 +49,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -62,7 +62,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -70,6 +78,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index d681e59732..0f0a6ad810 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 # CONFIG_CMD_HASH is not set
 CONFIG_CMD_EXT2=y
@@ -37,6 +36,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -49,7 +49,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
@@ -57,6 +65,7 @@ CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 110e50bfd9..13b20dd1c6 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index c47c60158d..d99c15342d 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -44,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig
index 08e9ca2d4d..af33f9de2b 100644
--- a/configs/P2041RDB_SECURE_BOOT_defconfig
+++ b/configs/P2041RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 40eafa7162..78a2a97064 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
index ce354ae609..dd5f2a4fc0 100644
--- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig
@@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 3a79fc62b6..0b9625e91e 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -43,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
index dc0567c464..8ab25373c9 100644
--- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -40,6 +40,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 473ad5b055..55613ccacd 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 806653e748..b52068d050 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -44,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig
index fb2b12000e..d6cabebeb7 100644
--- a/configs/P3041DS_SECURE_BOOT_defconfig
+++ b/configs/P3041DS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index cbafc9c8a0..3af52b90e8 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P3041DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
index a8e4512bf4..c34311b2f9 100644
--- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig
@@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index e00958566a..cc3234c6b1 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -43,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index da929598f6..18ad56ac8d 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -43,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig
index 281bba123f..22a6ebe89c 100644
--- a/configs/P4080DS_SECURE_BOOT_defconfig
+++ b/configs/P4080DS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 9ed25c10ba..81a513bec9 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P4080DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -44,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
index a090bed0bc..a740bc4a7b 100644
--- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig
@@ -32,6 +32,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index fcefd8d1e7..52db2e06c7 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD_NOR_FLASH=y
@@ -42,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
index 19ba105459..52efa92009 100644
--- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5020DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig
index 4cba3e8e64..baf7d835bc 100644
--- a/configs/P5020DS_NAND_defconfig
+++ b/configs/P5020DS_NAND_defconfig
@@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig
index 5cfbc6efcd..c5b424145c 100644
--- a/configs/P5020DS_SDCARD_defconfig
+++ b/configs/P5020DS_SDCARD_defconfig
@@ -39,6 +39,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig
index 5c6f405b7d..c08f9fffa6 100644
--- a/configs/P5020DS_SECURE_BOOT_defconfig
+++ b/configs/P5020DS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5020DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig
index 8074e09080..03d7a16a6d 100644
--- a/configs/P5020DS_SPIFLASH_defconfig
+++ b/configs/P5020DS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5020DS=y
 CONFIG_FIT=y
@@ -40,6 +40,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
index 8921201907..7569364252 100644
--- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig
@@ -34,6 +34,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig
index 8bd419b374..a1b410c7b6 100644
--- a/configs/P5020DS_defconfig
+++ b/configs/P5020DS_defconfig
@@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
index 6a69842c97..beab855eae 100644
--- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -41,6 +41,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 4c3f705238..efffb706fb 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -46,6 +47,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 3874e06f31..fdd39acbaf 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -44,6 +45,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig
index 554a8c1f3b..5d48206dc8 100644
--- a/configs/P5040DS_SECURE_BOOT_defconfig
+++ b/configs/P5040DS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -38,6 +38,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 09c13fecd6..3f4642f4e0 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xFFF40000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_P5040DS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +46,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index d531401796..d2a2e02dcd 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -43,6 +44,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index 379a4c26c2..b21db3c9df 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x00600000
 CONFIG_TARGET_SBx81LIFKW=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_IDENT_STRING="\nSBx81LIFKW"
 # CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index d5b73b9f72..420d75ea30 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x00600000
 CONFIG_TARGET_SBx81LIFXCAT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_IDENT_STRING="\nSBx81LIFXCAT"
 # CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/Sinlinx_SinA31s_defconfig b/configs/Sinlinx_SinA31s_defconfig
index 74fb9e3d0a..461a28f24e 100644
--- a/configs/Sinlinx_SinA31s_defconfig
+++ b/configs/Sinlinx_SinA31s_defconfig
@@ -11,6 +11,7 @@ CONFIG_USB1_VBUS_PIN=""
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sina31s"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/Sinlinx_SinA33_defconfig b/configs/Sinlinx_SinA33_defconfig
index 9f29870902..277598e0c4 100644
--- a/configs/Sinlinx_SinA33_defconfig
+++ b/configs/Sinlinx_SinA33_defconfig
@@ -13,7 +13,6 @@ CONFIG_VIDEO_LCD_BL_EN="PH6"
 CONFIG_VIDEO_LCD_BL_PWM="PH0"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_CMD_DFU=y
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-sinlinx-sina33"
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
diff --git a/configs/Sinovoip_BPI_M2_defconfig b/configs/Sinovoip_BPI_M2_defconfig
index b2ecf4ee92..10bdf200b2 100644
--- a/configs/Sinovoip_BPI_M2_defconfig
+++ b/configs/Sinovoip_BPI_M2_defconfig
@@ -7,6 +7,7 @@ CONFIG_USB1_VBUS_PIN=""
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31s-sinovoip-bpi-m2"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig
index bfc1a49f44..75604383c6 100644
--- a/configs/T1023RDB_NAND_defconfig
+++ b/configs/T1023RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1023RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -31,6 +31,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -62,6 +64,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig
index 772dcaa0f8..4471c83f3f 100644
--- a/configs/T1023RDB_SDCARD_defconfig
+++ b/configs/T1023RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1023RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -29,6 +29,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -59,6 +61,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig
index b0079f46d8..34fe6e5e52 100644
--- a/configs/T1023RDB_SECURE_BOOT_defconfig
+++ b/configs/T1023RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1023RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -17,6 +17,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -46,6 +48,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig
index 540d8c1e3a..599aeec688 100644
--- a/configs/T1023RDB_SPIFLASH_defconfig
+++ b/configs/T1023RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1023RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -31,6 +31,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -62,6 +64,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig
index ede4ccac6a..62cc129a31 100644
--- a/configs/T1023RDB_defconfig
+++ b/configs/T1023RDB_defconfig
@@ -16,6 +16,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -46,6 +48,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
index bb22d4ed94..2199abcb95 100644
--- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -48,6 +48,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig
index d21bfb48d4..0a52af48bb 100644
--- a/configs/T1024QDS_DDR4_defconfig
+++ b/configs/T1024QDS_DDR4_defconfig
@@ -48,6 +48,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig
index fa4a899132..9db39b1b58 100644
--- a/configs/T1024QDS_NAND_defconfig
+++ b/configs/T1024QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -65,6 +65,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig
index 54b36230ff..679f2ad208 100644
--- a/configs/T1024QDS_SDCARD_defconfig
+++ b/configs/T1024QDS_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -62,6 +62,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig
index f0c1b37f20..cc080c7285 100644
--- a/configs/T1024QDS_SECURE_BOOT_defconfig
+++ b/configs/T1024QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig
index 53fd5690d9..01bc5111e0 100644
--- a/configs/T1024QDS_SPIFLASH_defconfig
+++ b/configs/T1024QDS_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -65,6 +65,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig
index 3517cfd562..6ebffb8dd1 100644
--- a/configs/T1024QDS_defconfig
+++ b/configs/T1024QDS_defconfig
@@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index d75e5ec38a..9b116548a7 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -34,6 +34,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -41,7 +43,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
@@ -53,6 +54,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -68,6 +70,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
@@ -75,6 +78,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 95d30f1017..5e087fe2f3 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -32,6 +32,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -39,7 +41,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
@@ -51,6 +52,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -65,6 +67,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
@@ -72,6 +75,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig
index e924e7418a..f23f021143 100644
--- a/configs/T1024RDB_SECURE_BOOT_defconfig
+++ b/configs/T1024RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -19,6 +19,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -48,6 +50,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 4068b6ca5a..39b4537e71 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1024RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -34,6 +34,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -41,7 +43,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
@@ -54,6 +55,7 @@ CONFIG_ENV_ADDR=0xFFFC9000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -68,6 +70,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
@@ -75,6 +78,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index ad4ba96a2e..8ff2fe3f0c 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -19,6 +19,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -26,7 +28,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
-CONFIG_CMD_DATE=y
 CONFIG_MP=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_FAT=y
@@ -39,6 +40,7 @@ CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -53,6 +55,7 @@ CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
@@ -60,6 +63,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig
index 8e11e7e412..87b2a76973 100644
--- a/configs/T1040D4RDB_NAND_defconfig
+++ b/configs/T1040D4RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig
index 0e5b6a5e59..4b9e428045 100644
--- a/configs/T1040D4RDB_SDCARD_defconfig
+++ b/configs/T1040D4RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -57,6 +57,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig
index 9992ad74df..7adffb73ea 100644
--- a/configs/T1040D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040D4RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -43,6 +43,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig
index 5b9c3cb273..2320b7214c 100644
--- a/configs/T1040D4RDB_SPIFLASH_defconfig
+++ b/configs/T1040D4RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig
index 8177b1653c..eb25930ff7 100644
--- a/configs/T1040D4RDB_defconfig
+++ b/configs/T1040D4RDB_defconfig
@@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig
index 9cb012cf6f..a575b6fbc6 100644
--- a/configs/T1040QDS_DDR4_defconfig
+++ b/configs/T1040QDS_DDR4_defconfig
@@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig
index ddde260546..e616f0d232 100644
--- a/configs/T1040QDS_SECURE_BOOT_defconfig
+++ b/configs/T1040QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -49,6 +49,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig
index 94c02a9810..0b1c7cd12d 100644
--- a/configs/T1040QDS_defconfig
+++ b/configs/T1040QDS_defconfig
@@ -50,6 +50,10 @@ CONFIG_SPI_FLASH_EON=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig
index 381801e5de..7cf98473bd 100644
--- a/configs/T1040RDB_NAND_defconfig
+++ b/configs/T1040RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -61,6 +61,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig
index 1eeba5d8ba..321260fc8b 100644
--- a/configs/T1040RDB_SDCARD_defconfig
+++ b/configs/T1040RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -58,6 +58,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig
index f0705cedf6..910b984f47 100644
--- a/configs/T1040RDB_SECURE_BOOT_defconfig
+++ b/configs/T1040RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig
index cd30d8aedf..65ab4e0c79 100644
--- a/configs/T1040RDB_SPIFLASH_defconfig
+++ b/configs/T1040RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1040RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -61,6 +61,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig
index f5c2c1795e..e8c5393b18 100644
--- a/configs/T1040RDB_defconfig
+++ b/configs/T1040RDB_defconfig
@@ -45,6 +45,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 05544f04a1..1602fb890e 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -51,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -65,6 +66,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -73,6 +76,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index f8f5998571..a4a31bfd62 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -49,6 +49,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -62,6 +63,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -70,6 +73,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig
index 066ac3f28c..f460b17e4d 100644
--- a/configs/T1042D4RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index ebb62df96b..697c08dbfa 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042D4RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -52,6 +52,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0xFFFC9000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -65,6 +66,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -73,6 +76,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 4e66073ef4..70ddffb3a7 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -37,6 +37,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -50,6 +51,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -58,6 +61,7 @@ CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
 CONFIG_PCIE_FSL=y
 CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
+CONFIG_DM_RTC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_FSL_ESPI=y
diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
index 5b076ea753..167325f83c 100644
--- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig
@@ -2,14 +2,14 @@ CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB_PI=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -65,6 +65,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig
index 49baa03bb0..90bbee2508 100644
--- a/configs/T1042RDB_PI_NAND_defconfig
+++ b/configs/T1042RDB_PI_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x180000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB_PI=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -63,6 +63,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig
index c9a27c3d48..ae664df4dd 100644
--- a/configs/T1042RDB_PI_SDCARD_defconfig
+++ b/configs/T1042RDB_PI_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB_PI=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -60,6 +60,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig
index aef96d0e34..ef654653e5 100644
--- a/configs/T1042RDB_PI_SPIFLASH_defconfig
+++ b/configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x30001000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB_PI=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -63,6 +63,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig
index 727d1f251f..07ad865b6e 100644
--- a/configs/T1042RDB_PI_defconfig
+++ b/configs/T1042RDB_PI_defconfig
@@ -47,6 +47,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig
index 218421800f..c5f39e82f6 100644
--- a/configs/T1042RDB_SECURE_BOOT_defconfig
+++ b/configs/T1042RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T1042RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -43,6 +43,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig
index cf8ae99a71..c94730d79b 100644
--- a/configs/T1042RDB_defconfig
+++ b/configs/T1042RDB_defconfig
@@ -44,6 +44,8 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 2c3a2edde8..52255ed120 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -47,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -64,6 +65,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index a7c2fa8121..ba57ea33b1 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -45,6 +45,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -61,6 +62,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index ef5aa483f8..9b3f709c87 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
@@ -32,6 +32,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -48,6 +49,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 1848a790ee..5aa45f5a89 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0xFFFC9000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -64,6 +65,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index a6c3215c78..4958435ef4 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -30,6 +30,7 @@ CONFIG_ENV_IS_IN_REMOTE=y
 CONFIG_ENV_ADDR=0xFFE20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -41,6 +42,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 18d0a50ee0..602bf577e0 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -33,6 +33,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -49,6 +50,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index ca96fb8d3b..81baa5dbdd 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x100000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -30,6 +30,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -49,6 +51,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -66,6 +69,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_FW_IN_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 1c21dc69a9..a1d7d87b60 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -28,6 +28,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -47,6 +49,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -63,6 +66,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_FW_IN_MMC=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig
index 44dbfb0192..7d04a94116 100644
--- a/configs/T2080RDB_SECURE_BOOT_defconfig
+++ b/configs/T2080RDB_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -15,6 +15,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -45,6 +47,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 8c45787bce..c433a922e6 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2080RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -30,6 +30,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -50,6 +52,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0xFFFC9000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -66,6 +69,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_FW_IN_SPIFLASH=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
index e6de728c6f..a8f0a965c1 100644
--- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig
@@ -13,6 +13,8 @@ CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -38,6 +40,7 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_SYS_CORTINA_FW_IN_REMOTE=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index ea43eb5d17..85e3b64ad3 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -15,6 +15,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00200000
+CONFIG_SYS_MEMTEST_END=0x00400000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_SF=y
@@ -35,6 +37,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -50,6 +53,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_PHY_REALTEK=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig
index 2e0e05e654..85381c60ef 100644
--- a/configs/T2081QDS_NAND_defconfig
+++ b/configs/T2081QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2081QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -60,6 +60,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig
index 4104885846..bbc8b7666e 100644
--- a/configs/T2081QDS_SDCARD_defconfig
+++ b/configs/T2081QDS_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2081QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -57,6 +57,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig
index 242b11c891..b02505be21 100644
--- a/configs/T2081QDS_SPIFLASH_defconfig
+++ b/configs/T2081QDS_SPIFLASH_defconfig
@@ -3,16 +3,16 @@ CONFIG_SYS_TEXT_BASE=0x00201000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T2081QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -60,6 +60,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
index 8d00ad65eb..a10f39b336 100644
--- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig
@@ -36,6 +36,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig
index bfa40b5ef9..22ca08363c 100644
--- a/configs/T2081QDS_defconfig
+++ b/configs/T2081QDS_defconfig
@@ -44,6 +44,9 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_MII=y
diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig
index 05e4a6198e..ddff89602f 100644
--- a/configs/T4160QDS_NAND_defconfig
+++ b/configs/T4160QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4160QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig
index fe126938f4..5d253534ca 100644
--- a/configs/T4160QDS_SDCARD_defconfig
+++ b/configs/T4160QDS_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4160QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -50,6 +50,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig
index 8e003ed9fc..8934c3edf0 100644
--- a/configs/T4160QDS_SECURE_BOOT_defconfig
+++ b/configs/T4160QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4160QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig
index 37ef521736..d0d1290631 100644
--- a/configs/T4160QDS_defconfig
+++ b/configs/T4160QDS_defconfig
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig
index 438052fdcd..f3c7e1ec57 100644
--- a/configs/T4160RDB_defconfig
+++ b/configs/T4160RDB_defconfig
@@ -37,7 +37,10 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
 CONFIG_PHY_CORTINA=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig
index cfa0356271..f971cee3b0 100644
--- a/configs/T4240QDS_NAND_defconfig
+++ b/configs/T4240QDS_NAND_defconfig
@@ -7,9 +7,9 @@ CONFIG_ENV_OFFSET=0x140000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
 CONFIG_SYS_LDSCRIPT="arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
 CONFIG_FIT=y
@@ -53,6 +53,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig
index 67efee97fd..5e662be1d7 100644
--- a/configs/T4240QDS_SDCARD_defconfig
+++ b/configs/T4240QDS_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240QDS=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -50,6 +50,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig
index 4808a49dcf..807d5b5895 100644
--- a/configs/T4240QDS_SECURE_BOOT_defconfig
+++ b/configs/T4240QDS_SECURE_BOOT_defconfig
@@ -1,7 +1,7 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xEFF40000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240QDS=y
 # CONFIG_SYS_MALLOC_F is not set
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
index 29cadfa3a8..2bc30bbf9e 100644
--- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig
@@ -33,6 +33,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig
index 3d7aa9f987..84341f7579 100644
--- a/configs/T4240QDS_defconfig
+++ b/configs/T4240QDS_defconfig
@@ -37,6 +37,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 17be2e78ae..14e366358b 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -8,9 +8,9 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_MPC85xx=y
 CONFIG_TARGET_T4240RDB=y
-CONFIG_SPL_TEXT_BASE=0xFFFD8000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -42,6 +42,7 @@ CONFIG_DEFAULT_DEVICE_TREE="t4240rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -54,7 +55,10 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
 CONFIG_PHY_CORTINA=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 426ddef391..dfe8953af7 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -30,6 +30,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -42,7 +43,10 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
 CONFIG_PHY_CORTINA=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
diff --git a/configs/TQM834x_defconfig b/configs/TQM834x_defconfig
index 8afc884423..96ce4de0e6 100644
--- a/configs/TQM834x_defconfig
+++ b/configs/TQM834x_defconfig
@@ -150,7 +150,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/TWR-P1025_defconfig b/configs/TWR-P1025_defconfig
index c52263bfcd..e48454aa6c 100644
--- a/configs/TWR-P1025_defconfig
+++ b/configs/TWR-P1025_defconfig
@@ -41,7 +41,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index e0162e02d2..8ad1c04672 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -40,7 +40,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/Wits_Pro_A20_DKT_defconfig b/configs/Wits_Pro_A20_DKT_defconfig
index 8630f39a5f..8dbf6cd5ce 100644
--- a/configs/Wits_Pro_A20_DKT_defconfig
+++ b/configs/Wits_Pro_A20_DKT_defconfig
@@ -14,6 +14,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-wits-pro-a20-dkt"
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig
index 08687cb61a..b62058297b 100644
--- a/configs/a64-olinuxino-emmc_defconfig
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -6,7 +6,7 @@ CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc"
-CONFIG_SUN8I_EMAC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
diff --git a/configs/adp-ae3xx_defconfig b/configs/adp-ae3xx_defconfig
index 67e96563d0..62164474b1 100644
--- a/configs/adp-ae3xx_defconfig
+++ b/configs/adp-ae3xx_defconfig
@@ -1,8 +1,8 @@
 CONFIG_NDS32=y
 CONFIG_SYS_TEXT_BASE=0x4A000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x140000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_TARGET_ADP_AE3XX=y
 CONFIG_FIT=y
diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig
index 7540d30b45..58296fd144 100644
--- a/configs/ae350_rv32_spl_xip_defconfig
+++ b/configs/ae350_rv32_spl_xip_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x01200000
 CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_TARGET_AX25_AE350=y
 CONFIG_SPL_TEXT_BASE=0x80000000
+CONFIG_TARGET_AX25_AE350=y
 CONFIG_RISCV_SMODE=y
 CONFIG_XIP=y
 CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig
index 99a0035ebb..8063b77b9f 100644
--- a/configs/ae350_rv64_spl_xip_defconfig
+++ b/configs/ae350_rv64_spl_xip_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_TEXT_BASE=0x01200000
 CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_TARGET_AX25_AE350=y
 CONFIG_SPL_TEXT_BASE=0x80000000
+CONFIG_TARGET_AX25_AE350=y
 CONFIG_ARCH_RV64I=y
 CONFIG_RISCV_SMODE=y
 CONFIG_XIP=y
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index 31e00ab3f4..105c478b4b 100644
--- a/configs/alt_defconfig
+++ b/configs/alt_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt"
 CONFIG_R8A7794=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -73,6 +73,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig
index d8a7b7dcf5..64c1c537f9 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -49,6 +49,8 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_PHY_GIGE=y
 CONFIG_MII=y
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index 66899c277b..8d8276ba56 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -58,6 +58,8 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig
index b0033810b9..01333e7d93 100644
--- a/configs/am335x_guardian_defconfig
+++ b/configs/am335x_guardian_defconfig
@@ -11,9 +11,9 @@ CONFIG_TARGET_AM335X_GUARDIAN=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0x44E3E000
 CONFIG_SPL=y
 CONFIG_BOOTSTAGE_STASH_ADDR=0x0
+CONFIG_ENV_OFFSET_REDUND=0x540000
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_CONSOLE_MUX=y
@@ -23,11 +23,6 @@ CONFIG_ARCH_MISC_INIT=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_SEPARATE_BSS=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
-CONFIG_ENV_IS_IN_NAND=y
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_OFFSET_REDUND=0x540000
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_ETH_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
@@ -45,7 +40,6 @@ CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_NAND_OFS=0x0
 CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_FLASH is not set
-# CONFIG_CMD_LED is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -53,6 +47,7 @@ CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_LED is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
 CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(SPL),256k(SPL.backup1),256k(SPL.backup2),256k(SPL.backup3),1m(u-boot),1m(u-boot.backup1),1m(u-boot-2),1m(u-boot-2.backup1),256k(u-boot-env),256k(u-boot-env.backup1),256k(splash-screen),-(UBI)"
@@ -61,11 +56,13 @@ CONFIG_CMD_UBI=y
 # CONFIG_ISO_PARTITION is not set
 # CONFIG_SPL_EFI_PARTITION is not set
 CONFIG_OF_CONTROL=y
-# CONFIG_SPL_OF_CONTROL is not set
 CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian"
+CONFIG_ENV_IS_IN_NAND=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_SPL_DM=y
 CONFIG_BOOTCOUNT_LIMIT=y
-CONFIG_BOOTCOUNT_AM33XX=y
 CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_MISC=y
@@ -97,5 +94,5 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
 CONFIG_USB_ETHER=y
 CONFIG_SPL_WDT=y
 CONFIG_FAT_WRITE=y
-CONFIG_SPL_OF_LIBFDT=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
+CONFIG_SPL_OF_LIBFDT=y
diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig
index 1dceea5398..393665fcf3 100644
--- a/configs/am335x_hs_evm_defconfig
+++ b/configs/am335x_hs_evm_defconfig
@@ -51,6 +51,8 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig
index a7d76c83bd..a8afad9e0b 100644
--- a/configs/am335x_hs_evm_uart_defconfig
+++ b/configs/am335x_hs_evm_uart_defconfig
@@ -53,6 +53,8 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig
index e0efd5bc95..633c35f77b 100644
--- a/configs/am335x_igep003x_defconfig
+++ b/configs/am335x_igep003x_defconfig
@@ -67,6 +67,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig
index b7ee1a7129..c0bb093c4d 100644
--- a/configs/am335x_shc_defconfig
+++ b/configs/am335x_shc_defconfig
@@ -49,6 +49,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig
index 641d15be16..026a81538e 100644
--- a/configs/am335x_shc_ict_defconfig
+++ b/configs/am335x_shc_ict_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig
index 49c0966fa8..91c1ce7f54 100644
--- a/configs/am335x_shc_netboot_defconfig
+++ b/configs/am335x_shc_netboot_defconfig
@@ -51,6 +51,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig
index a2dc081c3d..4fa7b6dbc4 100644
--- a/configs/am335x_shc_sdboot_defconfig
+++ b/configs/am335x_shc_sdboot_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig
index ecbe094c73..238164a55f 100644
--- a/configs/am335x_sl50_defconfig
+++ b/configs/am335x_sl50_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig
index d52745fd84..39facf132e 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -4,8 +4,8 @@ CONFIG_ARCH_CPU_INIT=y
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_SYS_TEXT_BASE=0x30000000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x110000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_AM43XX=y
 CONFIG_ENV_OFFSET_REDUND=0x120000
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig
index 21de5229c1..db48785f91 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -42,7 +42,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig
index f0ddb020ee..42942e9ed4 100644
--- a/configs/am57xx_evm_defconfig
+++ b/configs/am57xx_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TARGET_AM57XX_EVM=y
@@ -11,8 +12,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ARMV7_LPAE=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x40300000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_BOARD_SETUP=y
@@ -31,7 +32,6 @@ CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ADTIMG=y
 CONFIG_CMD_ABOOTIMG=y
diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig
index 5db187738e..f80ec38004 100644
--- a/configs/am57xx_hs_evm_defconfig
+++ b/configs/am57xx_hs_evm_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -35,7 +36,6 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ADTIMG=y
 CONFIG_CMD_ABOOTIMG=y
 CONFIG_CMD_BCB=y
diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig
index 5ef15187a6..3b155cc202 100644
--- a/configs/am57xx_hs_evm_usb_defconfig
+++ b/configs/am57xx_hs_evm_usb_defconfig
@@ -4,6 +4,7 @@ CONFIG_TI_SECURE_DEVICE=y
 CONFIG_ISW_ENTRY_ADDR=0x40306d50
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -37,7 +38,6 @@ CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 542bbd992c..d74a2d0930 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -7,6 +7,7 @@ CONFIG_SOC_K3_AM6=y
 CONFIG_TARGET_AM654_A53_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -37,11 +38,9 @@ CONFIG_SPL_DM_MAILBOX=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_DFU=y
@@ -50,7 +49,6 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
@@ -97,7 +95,7 @@ CONFIG_MMC_SDHCI_AM654=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index b7955265c7..4fc199e809 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -8,6 +8,7 @@ CONFIG_SOC_K3_AM6=y
 CONFIG_K3_EARLY_CONS=y
 CONFIG_TARGET_AM654_R5_EVM=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -40,7 +41,6 @@ CONFIG_SPL_REMOTEPROC=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -58,7 +58,6 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
@@ -79,7 +78,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
-CONFIG_MISC=y
 CONFIG_K3_AVS0=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig
index 9f43cee396..117953817d 100644
--- a/configs/am65x_hs_evm_a53_defconfig
+++ b/configs/am65x_hs_evm_a53_defconfig
@@ -8,12 +8,14 @@ CONFIG_SOC_K3_AM6=y
 CONFIG_TARGET_AM654_A53_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
 CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_OFFSET_REDUND=0x6A0000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -39,11 +41,9 @@ CONFIG_SPL_DM_MAILBOX=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_DFU=y
@@ -52,7 +52,6 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_REMOTEPROC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
@@ -67,7 +66,6 @@ CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_OFFSET_REDUND=0x6A0000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
@@ -99,7 +97,7 @@ CONFIG_MMC_SDHCI_AM654=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig
index bbf50bf72b..b2d638672e 100644
--- a/configs/am65x_hs_evm_r5_defconfig
+++ b/configs/am65x_hs_evm_r5_defconfig
@@ -9,6 +9,7 @@ CONFIG_SOC_K3_AM6=y
 CONFIG_K3_EARLY_CONS=y
 CONFIG_TARGET_AM654_R5_EVM=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -42,7 +43,6 @@ CONFIG_SPL_REMOTEPROC=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -60,7 +60,6 @@ CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board"
 CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
@@ -81,7 +80,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
-CONFIG_MISC=y
 CONFIG_K3_AVS0=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig
index 1001cae06c..5d7a8de71d 100644
--- a/configs/ap121_defconfig
+++ b/configs/ap121_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x9F000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xb8020000
 CONFIG_DEBUG_UART_CLOCK=25000000
@@ -24,6 +24,8 @@ CONFIG_SYS_PROMPT="ap121 # "
 # CONFIG_CMD_EDITENV is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80100000
+CONFIG_SYS_MEMTEST_END=0x83f00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_DHCP=y
diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig
index 1058fc08e5..68cc8e03bb 100644
--- a/configs/ap143_defconfig
+++ b/configs/ap143_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x9F000000
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xb8020000
 CONFIG_DEBUG_UART_CLOCK=25000000
@@ -25,6 +25,8 @@ CONFIG_SYS_PROMPT="ap143 # "
 # CONFIG_CMD_EDITENV is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80100000
+CONFIG_SYS_MEMTEST_END=0x83f00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_MTDPARTS=y
diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig
index 7124dcd6ed..434e3c1406 100644
--- a/configs/ap152_defconfig
+++ b/configs/ap152_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x9F000000
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xb8020000
 CONFIG_DEBUG_UART_CLOCK=25000000
@@ -25,6 +25,8 @@ CONFIG_SYS_PROMPT="ap152 # "
 # CONFIG_CMD_EDITENV is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80100000
+CONFIG_SYS_MEMTEST_END=0x83f00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_MTDPARTS=y
diff --git a/configs/apalis-imx8qm_defconfig b/configs/apalis-imx8qm_defconfig
index 84bc0bb929..4c27c33459 100644
--- a/configs/apalis-imx8qm_defconfig
+++ b/configs/apalis-imx8qm_defconfig
@@ -18,6 +18,8 @@ CONFIG_CMD_CPU=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x88000000
+CONFIG_SYS_MEMTEST_END=0x89000000
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_FUSE=y
diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig
index 150941fd1a..604a473fa9 100644
--- a/configs/apalis-tk1_defconfig
+++ b/configs/apalis-tk1_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 12fe9895ed..4c6b100654 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -4,17 +4,17 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_APALIS_IMX6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_TARGET_APALIS_IMX6=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
 CONFIG_CMD_HDMIDETECT=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
@@ -40,6 +40,8 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig
index b2e3ff6614..a5db39129e 100644
--- a/configs/apalis_t30_defconfig
+++ b/configs/apalis_t30_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig
index 25ac75d4ee..01990bd970 100644
--- a/configs/aristainetos2_defconfig
+++ b/configs/aristainetos2_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SYS_MALLOC_F_LEN=0xe000
-CONFIG_TARGET_ARISTAINETOS2=y
 CONFIG_ENV_OFFSET=0xD0000
+CONFIG_TARGET_ARISTAINETOS2=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0xE0000
diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig
index d1a20b643e..318b81e331 100644
--- a/configs/aristainetos2b_defconfig
+++ b/configs/aristainetos2b_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SYS_MALLOC_F_LEN=0xe000
-CONFIG_TARGET_ARISTAINETOS2B=y
 CONFIG_ENV_OFFSET=0xD0000
+CONFIG_TARGET_ARISTAINETOS2B=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0xE0000
diff --git a/configs/aristainetos2bcsl_defconfig b/configs/aristainetos2bcsl_defconfig
index 712e632460..0ff67a44cb 100644
--- a/configs/aristainetos2bcsl_defconfig
+++ b/configs/aristainetos2bcsl_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SYS_MALLOC_F_LEN=0xe000
-CONFIG_TARGET_ARISTAINETOS2BCSL=y
 CONFIG_ENV_OFFSET=0xD0000
+CONFIG_TARGET_ARISTAINETOS2BCSL=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0xE0000
diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig
index 8611915877..ffd4360159 100644
--- a/configs/aristainetos2c_defconfig
+++ b/configs/aristainetos2c_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SYS_MALLOC_F_LEN=0xe000
-CONFIG_TARGET_ARISTAINETOS2C=y
 CONFIG_ENV_OFFSET=0xD0000
+CONFIG_TARGET_ARISTAINETOS2C=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0xE0000
diff --git a/configs/armadillo-800eva_defconfig b/configs/armadillo-800eva_defconfig
index d160708600..ec35221325 100644
--- a/configs/armadillo-800eva_defconfig
+++ b/configs/armadillo-800eva_defconfig
@@ -36,6 +36,8 @@ CONFIG_CMD_PING=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0x40000
 # CONFIG_MMC is not set
+CONFIG_BITBANGMII=y
+CONFIG_PHY_SMSC=y
 CONFIG_SH_ETHER=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig b/configs/at91sam9260ek_dataflash_cs0_defconfig
index 3d5176f6a5..854ea4fdf2 100644
--- a/configs/at91sam9260ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs0_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9260ek_dataflash_cs1_defconfig b/configs/at91sam9260ek_dataflash_cs1_defconfig
index a78117a3c7..4fbcd31225 100644
--- a/configs/at91sam9260ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9260ek_dataflash_cs1_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9261ek_dataflash_cs0_defconfig b/configs/at91sam9261ek_dataflash_cs0_defconfig
index 607d181b56..65851258b4 100644
--- a/configs/at91sam9261ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs0_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9261ek_dataflash_cs3_defconfig b/configs/at91sam9261ek_dataflash_cs3_defconfig
index 30e27a4e36..f04e454c4e 100644
--- a/configs/at91sam9261ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9261ek_dataflash_cs3_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9263ek_dataflash_cs0_defconfig b/configs/at91sam9263ek_dataflash_cs0_defconfig
index a03be17862..bf824771f2 100644
--- a/configs/at91sam9263ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9263ek_dataflash_cs0_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9263ek_dataflash_defconfig b/configs/at91sam9263ek_dataflash_defconfig
index a03be17862..bf824771f2 100644
--- a/configs/at91sam9263ek_dataflash_defconfig
+++ b/configs/at91sam9263ek_dataflash_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000
 CONFIG_TARGET_AT91SAM9263EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9g10ek_dataflash_cs0_defconfig b/configs/at91sam9g10ek_dataflash_cs0_defconfig
index 827ad0e5b7..914dcde240 100644
--- a/configs/at91sam9g10ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs0_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9g10ek_dataflash_cs3_defconfig b/configs/at91sam9g10ek_dataflash_cs3_defconfig
index c01f69720f..bc11dbb4b6 100644
--- a/configs/at91sam9g10ek_dataflash_cs3_defconfig
+++ b/configs/at91sam9g10ek_dataflash_cs3_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9261EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9g20ek_dataflash_cs0_defconfig b/configs/at91sam9g20ek_dataflash_cs0_defconfig
index 0a841fec11..cf1f5c0a1c 100644
--- a/configs/at91sam9g20ek_dataflash_cs0_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs0_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9g20ek_dataflash_cs1_defconfig b/configs/at91sam9g20ek_dataflash_cs1_defconfig
index 18d951ad8c..025cd2146e 100644
--- a/configs/at91sam9g20ek_dataflash_cs1_defconfig
+++ b/configs/at91sam9g20ek_dataflash_cs1_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig
index 075daa79d3..308f097b60 100644
--- a/configs/at91sam9n12ek_mmc_defconfig
+++ b/configs/at91sam9n12ek_mmc_defconfig
@@ -47,6 +47,8 @@ CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_KS8851_MLL=y
+CONFIG_KS8851_MLL_BASEADDR=0x30000000
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig
index b02be84493..fd6d13db9b 100644
--- a/configs/at91sam9n12ek_nandflash_defconfig
+++ b/configs/at91sam9n12ek_nandflash_defconfig
@@ -48,6 +48,8 @@ CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_KS8851_MLL=y
+CONFIG_KS8851_MLL_BASEADDR=0x30000000
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig
index f816d27a55..97e29bdc6e 100644
--- a/configs/at91sam9n12ek_spiflash_defconfig
+++ b/configs/at91sam9n12ek_spiflash_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000
 CONFIG_TARGET_AT91SAM9N12EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x3000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x5000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
@@ -49,6 +49,8 @@ CONFIG_NAND_ATMEL=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=30000000
 CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_KS8851_MLL=y
+CONFIG_KS8851_MLL_BASEADDR=0x30000000
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
 CONFIG_DM_SERIAL=y
diff --git a/configs/at91sam9rlek_dataflash_defconfig b/configs/at91sam9rlek_dataflash_defconfig
index 6c2547006f..e63b061e4f 100644
--- a/configs/at91sam9rlek_dataflash_defconfig
+++ b/configs/at91sam9rlek_dataflash_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000
 CONFIG_TARGET_AT91SAM9RLEK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig
index 64f7fffd0d..c43a5cb63e 100644
--- a/configs/at91sam9x5ek_dataflash_defconfig
+++ b/configs/at91sam9x5ek_dataflash_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig
index 792d46f514..f418bfbf16 100644
--- a/configs/at91sam9x5ek_spiflash_defconfig
+++ b/configs/at91sam9x5ek_spiflash_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000
 CONFIG_TARGET_AT91SAM9X5EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x3000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x5000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9xeek_dataflash_cs0_defconfig b/configs/at91sam9xeek_dataflash_cs0_defconfig
index d637d3629d..6ef2574216 100644
--- a/configs/at91sam9xeek_dataflash_cs0_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs0_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/at91sam9xeek_dataflash_cs1_defconfig b/configs/at91sam9xeek_dataflash_cs1_defconfig
index 06288ce4eb..3e7d2bed93 100644
--- a/configs/at91sam9xeek_dataflash_cs1_defconfig
+++ b/configs/at91sam9xeek_dataflash_cs1_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21f00000
 CONFIG_TARGET_AT91SAM9260EK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
index 2a72355c69..785283fbea 100644
--- a/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
+++ b/configs/avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig
@@ -17,6 +17,8 @@ CONFIG_BOOTDELAY=0
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_SPL_OS_BOOT=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_MMC=y
diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig
index fcfdd0d867..91f74e5898 100644
--- a/configs/axs101_defconfig
+++ b/configs/axs101_defconfig
@@ -28,7 +28,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="axs101"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index 29f5a2aaf5..ab5f699327 100644
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -28,7 +28,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="axs103"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/bananapi_m1_plus_defconfig b/configs/bananapi_m1_plus_defconfig
index 3813b6e89a..e533555c3b 100644
--- a/configs/bananapi_m1_plus_defconfig
+++ b/configs/bananapi_m1_plus_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-bananapi-m1-plus"
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig
index 3b4d5de8ad..80a817a3f3 100644
--- a/configs/bayleybay_defconfig
+++ b/configs/bayleybay_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6FF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_INTEL=y
 CONFIG_TARGET_BAYLEYBAY=y
diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig
index afb59ec884..d467e62dee 100644
--- a/configs/bcm7260_defconfig
+++ b/configs/bcm7260_defconfig
@@ -13,6 +13,7 @@ CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_CMD_MMC=y
 CONFIG_EFI_PARTITION=y
 CONFIG_OF_PRIOR_STAGE=y
 CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
index 20526d05dc..2c71a5efed 100644
--- a/configs/bcm7445_defconfig
+++ b/configs/bcm7445_defconfig
@@ -3,8 +3,8 @@ CONFIG_ARCH_BCMSTB=y
 CONFIG_SYS_TEXT_BASE=0x80100000
 CONFIG_TARGET_BCM7445=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x1E0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_ENV_OFFSET_REDUND=0x1F0000
 CONFIG_FIT=y
@@ -14,6 +14,7 @@ CONFIG_USE_PREBOOT=y
 CONFIG_PREBOOT="fdt addr ${fdtcontroladdr};fdt move ${fdtcontroladdr} ${fdtsaveaddr};fdt addr ${fdtsaveaddr};"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot>"
+CONFIG_CMD_MMC=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_OF_PRIOR_STAGE=y
diff --git a/configs/bcm911360_entphn-ns_defconfig b/configs/bcm911360_entphn-ns_defconfig
index cca6558c5b..58069711b6 100644
--- a/configs/bcm911360_entphn-ns_defconfig
+++ b/configs/bcm911360_entphn-ns_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/bcm911360_entphn_defconfig b/configs/bcm911360_entphn_defconfig
index 710d02599d..9fbaa4edb1 100644
--- a/configs/bcm911360_entphn_defconfig
+++ b/configs/bcm911360_entphn_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/bcm911360k_defconfig b/configs/bcm911360k_defconfig
index 6ff9bb7341..33015dc417 100644
--- a/configs/bcm911360k_defconfig
+++ b/configs/bcm911360k_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/bcm958300k-ns_defconfig b/configs/bcm958300k-ns_defconfig
index 19eca9d5df..f30f1bf7df 100644
--- a/configs/bcm958300k-ns_defconfig
+++ b/configs/bcm958300k-ns_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/bcm958300k_defconfig b/configs/bcm958300k_defconfig
index 6ff9bb7341..33015dc417 100644
--- a/configs/bcm958300k_defconfig
+++ b/configs/bcm958300k_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/bcm958305k_defconfig b/configs/bcm958305k_defconfig
index 6ff9bb7341..33015dc417 100644
--- a/configs/bcm958305k_defconfig
+++ b/configs/bcm958305k_defconfig
@@ -21,6 +21,7 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_MMC is not set
+CONFIG_PHY_BROADCOM=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SHA1=y
diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig
index d70467012c..89f4dc1144 100644
--- a/configs/beaver_defconfig
+++ b/configs/beaver_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig
index b4fcccf27d..87dae5950b 100644
--- a/configs/birdland_bav335a_defconfig
+++ b/configs/birdland_bav335a_defconfig
@@ -51,6 +51,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig
index b9f8bcab4b..5ee9878a55 100644
--- a/configs/birdland_bav335b_defconfig
+++ b/configs/birdland_bav335b_defconfig
@@ -51,6 +51,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/bk4r1_defconfig b/configs/bk4r1_defconfig
index deec16e55c..8c2bda6984 100644
--- a/configs/bk4r1_defconfig
+++ b/configs/bk4r1_defconfig
@@ -20,6 +20,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80010000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_CMD_DM=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig
index 64b7bccfb4..137acceea0 100644
--- a/configs/blanche_defconfig
+++ b/configs/blanche_defconfig
@@ -5,8 +5,8 @@ CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Blanche"
 CONFIG_R8A7792=y
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index c142261331..189b824544 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index c6c7f00acd..eb2454e296 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -16,6 +16,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston32r6_defconfig b/configs/boston32r6_defconfig
index 0fffc46ae6..f3e0908d5b 100644
--- a/configs/boston32r6_defconfig
+++ b/configs/boston32r6_defconfig
@@ -16,6 +16,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston32r6el_defconfig b/configs/boston32r6el_defconfig
index 1ecc06d440..0d139d8307 100644
--- a/configs/boston32r6el_defconfig
+++ b/configs/boston32r6el_defconfig
@@ -17,6 +17,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 46e78c7fef..8ba301f6bd 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -16,6 +16,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index aa075398e4..6db2f2b887 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -17,6 +17,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston64r6_defconfig b/configs/boston64r6_defconfig
index 216e61c8bf..b0bbf51a52 100644
--- a/configs/boston64r6_defconfig
+++ b/configs/boston64r6_defconfig
@@ -16,6 +16,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/boston64r6el_defconfig b/configs/boston64r6el_defconfig
index 354ae8e53b..030d708e55 100644
--- a/configs/boston64r6el_defconfig
+++ b/configs/boston64r6el_defconfig
@@ -17,6 +17,8 @@ CONFIG_SYS_PROMPT="boston # "
 # CONFIG_CMD_ELF is not set
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_PCI=y
diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig
index 59c2e2af9a..09370b7ed0 100644
--- a/configs/brppt1_mmc_defconfig
+++ b/configs/brppt1_mmc_defconfig
@@ -46,6 +46,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_ITEST is not set
@@ -54,7 +55,6 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_BKOPS_ENABLE=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4=y
diff --git a/configs/brppt1_spi_defconfig b/configs/brppt1_spi_defconfig
index a8a71d195b..964b22b100 100644
--- a/configs/brppt1_spi_defconfig
+++ b/configs/brppt1_spi_defconfig
@@ -5,8 +5,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x20000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_AM33XX=y
 CONFIG_TARGET_BRPPT1=y
@@ -39,7 +40,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
@@ -53,6 +53,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_BKOPS_ENABLE=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_ITEST is not set
@@ -61,7 +62,6 @@ CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_BOOTCOUNT=y
-CONFIG_CMD_BKOPS_ENABLE=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4=y
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index 4fde3b963c..c4eb03bde0 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -8,10 +8,11 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_TARGET_BRPPT2=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x20000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
+CONFIG_TARGET_BRPPT2=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0x020CC068
 CONFIG_NR_DRAM_BANKS=1
@@ -33,7 +34,6 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_ELF is not set
diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig
index bb71014828..a7cf98fc74 100644
--- a/configs/brsmarc1_defconfig
+++ b/configs/brsmarc1_defconfig
@@ -5,8 +5,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x20000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=600
@@ -38,7 +39,6 @@ CONFIG_SPL_I2C_SUPPORT=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BOOTD is not set
diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig
index 6145861060..bf2f5f5208 100644
--- a/configs/cardhu_defconfig
+++ b/configs/cardhu_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig
index c30b37e8c7..366a90dd42 100644
--- a/configs/cei-tk1-som_defconfig
+++ b/configs/cei-tk1-som_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/cgtqmx6eval_defconfig b/configs/cgtqmx6eval_defconfig
index 48d3498d30..a934336f41 100644
--- a/configs/cgtqmx6eval_defconfig
+++ b/configs/cgtqmx6eval_defconfig
@@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_CGTQMX6EVAL=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_CGTQMX6EVAL=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -28,7 +29,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="CGT-QMX6-Quad U-Boot > "
@@ -64,6 +64,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/cherryhill_defconfig b/configs/cherryhill_defconfig
index e3c26075ec..c3ad39c725 100644
--- a/configs/cherryhill_defconfig
+++ b/configs/cherryhill_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x5F0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig
index 4c118a615a..30100a3151 100644
--- a/configs/chiliboard_defconfig
+++ b/configs/chiliboard_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig
index a0b1c8d87e..23efafb0d2 100644
--- a/configs/chromebit_mickey_defconfig
+++ b/configs/chromebit_mickey_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3288=y
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_TARGET_CHROMEBIT_MICKEY=y
@@ -11,20 +12,20 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 # CONFIG_SPL_CRC32_SUPPORT is not set
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -72,8 +73,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINMUX is not set
-CONFIG_SPL_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig
index 439c8cb0ce..4f606e7ec9 100644
--- a/configs/chromebook_bob_defconfig
+++ b/configs/chromebook_bob_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
@@ -12,8 +13,8 @@ CONFIG_DEBUG_UART_BASE=0xff1a0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
+CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -21,7 +22,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig
index 67713ba883..2039ea6186 100644
--- a/configs/chromebook_coral_defconfig
+++ b/configs/chromebook_coral_defconfig
@@ -7,6 +7,7 @@ CONFIG_BOOTSTAGE_STASH_ADDR=0xfef00000
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xde000000
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPL_TEXT_BASE=0xfef10000
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_TARGET_CHROMEBOOK_CORAL=y
 CONFIG_DEBUG_UART=y
@@ -15,7 +16,6 @@ CONFIG_HAVE_ACPI_RESUME=y
 CONFIG_INTEL_CAR_CQOS=y
 CONFIG_X86_OFFSET_U_BOOT=0xffe00000
 CONFIG_X86_OFFSET_SPL=0xffe80000
-CONFIG_SPL_TEXT_BASE=0xfef10000
 CONFIG_BOOTSTAGE=y
 CONFIG_SPL_BOOTSTAGE=y
 CONFIG_TPL_BOOTSTAGE=y
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index 7ba0c9566a..443e3cdace 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3288=y
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_SPL_STACK_R_ADDR=0x80000
@@ -10,23 +11,22 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_LOG=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 # CONFIG_SPL_CRC32_SUPPORT is not set
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -75,8 +75,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINMUX is not set
-CONFIG_SPL_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig
index 5abd690b00..a13f6eac80 100644
--- a/configs/chromebook_link64_defconfig
+++ b/configs/chromebook_link64_defconfig
@@ -1,12 +1,13 @@
 CONFIG_X86=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_X86_RUN_64BIT=y
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_TARGET_CHROMEBOOK_LINK64=y
@@ -14,7 +15,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_HAVE_MRC=y
 CONFIG_SMP=y
 CONFIG_HAVE_VGA_BIOS=y
-CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_BOOTSTAGE=y
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig
index 6ef9a271b0..de4186cdf2 100644
--- a/configs/chromebook_link_defconfig
+++ b/configs/chromebook_link_defconfig
@@ -2,8 +2,8 @@ CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_SYS_MALLOC_F_LEN=0x2400
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig
index 46e1c183a2..99ac0e0674 100644
--- a/configs/chromebook_minnie_defconfig
+++ b/configs/chromebook_minnie_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3288=y
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_TARGET_CHROMEBOOK_MINNIE=y
@@ -11,21 +12,21 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 # CONFIG_SPL_CRC32_SUPPORT is not set
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -74,8 +75,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y
-# CONFIG_SPL_PINMUX is not set
-CONFIG_SPL_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebook_samus_defconfig b/configs/chromebook_samus_defconfig
index 2f101c4adb..fb4d88028c 100644
--- a/configs/chromebook_samus_defconfig
+++ b/configs/chromebook_samus_defconfig
@@ -2,8 +2,8 @@ CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
 CONFIG_SYS_MALLOC_F_LEN=0x1d00
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
diff --git a/configs/chromebook_samus_tpl_defconfig b/configs/chromebook_samus_tpl_defconfig
index cd1cc5ffa1..a12a04b0bf 100644
--- a/configs/chromebook_samus_tpl_defconfig
+++ b/configs/chromebook_samus_tpl_defconfig
@@ -2,12 +2,13 @@ CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xffed0000
 CONFIG_SYS_MALLOC_F_LEN=0x1a00
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPL_TEXT_BASE=0xffe70000
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_TARGET_CHROMEBOOK_SAMUS_TPL=y
 CONFIG_DEBUG_UART=y
@@ -16,7 +17,6 @@ CONFIG_HAVE_REFCODE=y
 CONFIG_SMP=y
 CONFIG_HAVE_VGA_BIOS=y
 CONFIG_X86_OFFSET_U_BOOT=0xfff00000
-CONFIG_SPL_TEXT_BASE=0xffe70000
 CONFIG_BOOTSTAGE=y
 CONFIG_BOOTSTAGE_REPORT=y
 CONFIG_SHOW_BOOT_PROGRESS=y
diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig
index 34cf727abc..5a5152541b 100644
--- a/configs/chromebook_speedy_defconfig
+++ b/configs/chromebook_speedy_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3288=y
 # CONFIG_SPL_MMC_SUPPORT is not set
 CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
@@ -11,22 +12,21 @@ CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_SPL_PAYLOAD="u-boot.img"
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
-CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_BOARD_EARLY_INIT_R=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 # CONFIG_SPL_CRC32_SUPPORT is not set
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -74,6 +74,7 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_DM_PMIC=y
 # CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_RK8XX=y
diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig
index 0c970c8574..48bcd94a62 100644
--- a/configs/chromebox_panther_defconfig
+++ b/configs/chromebox_panther_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_TARGET_CHROMEBOX_PANTHER=y
diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig
index 2e88880b18..d2766190de 100644
--- a/configs/cl-som-imx7_defconfig
+++ b/configs/cl-som-imx7_defconfig
@@ -5,8 +5,8 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_CL_SOM_IMX7=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -44,6 +44,7 @@ CONFIG_CMD_SF=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
+# CONFIG_CMD_MDIO is not set
 CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
@@ -71,6 +72,8 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig
index 1566a4ff82..449c3a435e 100644
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -14,9 +14,9 @@ CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
@@ -31,7 +31,6 @@ CONFIG_SPL_CMD_TLV_EEPROM=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_MVEBU_BUBT=y
 CONFIG_CMD_PCI=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -39,6 +38,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_MVEBU_BUBT=y
 # CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog"
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig
index 0823f34667..2b6445a3f1 100644
--- a/configs/clearfog_gt_8k_defconfig
+++ b/configs/clearfog_gt_8k_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_8K=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0xf0512000
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index d2de5cfe65..edaa8e24a5 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_CM_FX6=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_CM_FX6=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -15,8 +16,8 @@ CONFIG_SPL=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 # CONFIG_CMD_BMODE is not set
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
@@ -29,7 +30,6 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x80
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SYS_PROMPT="CM-FX6 # "
 # CONFIG_CMD_XIMG is not set
@@ -78,6 +78,7 @@ CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_DM_PMIC=y
diff --git a/configs/cm_t335_defconfig b/configs/cm_t335_defconfig
index 6c72712060..51351669fe 100644
--- a/configs/cm_t335_defconfig
+++ b/configs/cm_t335_defconfig
@@ -50,6 +50,7 @@ CONFIG_LED_STATUS_BOOT=0
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_FAT_WRITE=y
diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index 1e245c6aa7..94b051ad4f 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -4,8 +4,9 @@ CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_AM43XX=y
 CONFIG_TARGET_CM_T43=y
@@ -31,7 +32,6 @@ CONFIG_SPL_MTD_SUPPORT=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SYS_PROMPT="CM-T43 # "
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_EEPROM=y
@@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_DM_SERIAL=y
diff --git a/configs/colibri-imx6ull_defconfig b/configs/colibri-imx6ull_defconfig
index c9005a7d07..74a67a0200 100644
--- a/configs/colibri-imx6ull_defconfig
+++ b/configs/colibri-imx6ull_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_COLIBRI_IMX6ULL=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x380000
+CONFIG_TARGET_COLIBRI_IMX6ULL=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DISTRO_DEFAULTS=y
@@ -26,6 +26,8 @@ CONFIG_SYS_PROMPT="Colibri iMX6ULL # "
 CONFIG_CMD_ASKENV=y
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/colibri-imx8qxp_defconfig b/configs/colibri-imx8qxp_defconfig
index fa5bd4aca1..d86cefafc6 100644
--- a/configs/colibri-imx8qxp_defconfig
+++ b/configs/colibri-imx8qxp_defconfig
@@ -18,6 +18,8 @@ CONFIG_CMD_CPU=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x88000000
+CONFIG_SYS_MEMTEST_END=0x89000000
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig
index 82f71ecf7c..adb7c95019 100644
--- a/configs/colibri_imx6_defconfig
+++ b/configs/colibri_imx6_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_COLIBRI_IMX6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFDE00
+CONFIG_TARGET_COLIBRI_IMX6=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -39,6 +39,8 @@ CONFIG_CMD_ASKENV=y
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/colibri_imx7_defconfig b/configs/colibri_imx7_defconfig
index e434a77400..7596478ee3 100644
--- a/configs/colibri_imx7_defconfig
+++ b/configs/colibri_imx7_defconfig
@@ -27,6 +27,8 @@ CONFIG_SYS_PROMPT="Colibri iMX7 # "
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x8c000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/colibri_imx7_emmc_defconfig b/configs/colibri_imx7_emmc_defconfig
index 814667adf9..c23ff97daa 100644
--- a/configs/colibri_imx7_emmc_defconfig
+++ b/configs/colibri_imx7_emmc_defconfig
@@ -29,6 +29,8 @@ CONFIG_SYS_PROMPT="Colibri iMX7 # "
 CONFIG_CMD_ASKENV=y
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x8c000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig
index cf3e4e0beb..a1d6ab206a 100644
--- a/configs/colibri_t20_defconfig
+++ b/configs/colibri_t20_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x10000
diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig
index 4937433af0..d44ed05784 100644
--- a/configs/colibri_t30_defconfig
+++ b/configs/colibri_t30_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/colibri_vf_defconfig b/configs/colibri_vf_defconfig
index 91afabe543..c494fb40e9 100644
--- a/configs/colibri_vf_defconfig
+++ b/configs/colibri_vf_defconfig
@@ -29,6 +29,8 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80010000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_DM=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
index f29c56a7ef..abf5263081 100644
--- a/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
+++ b/configs/conga-qeval20-qa3-e3845-internal-uart_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/configs/conga-qeval20-qa3-e3845_defconfig b/configs/conga-qeval20-qa3-e3845_defconfig
index 0780adbcd6..aac0ed2928 100644
--- a/configs/conga-qeval20-qa3-e3845_defconfig
+++ b/configs/conga-qeval20-qa3-e3845_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_CONGATEC=y
 CONFIG_TARGET_CONGA_QEVAL20_QA3_E3845=y
diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
index edabb84c13..90fe803ac8 100644
--- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig
@@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig
index fb85188385..55a46c3c29 100644
--- a/configs/controlcenterd_36BIT_SDCARD_defconfig
+++ b/configs/controlcenterd_36BIT_SDCARD_defconfig
@@ -44,7 +44,15 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig
index 524dbc2b39..4ac46ff759 100644
--- a/configs/controlcenterdc_defconfig
+++ b/configs/controlcenterdc_defconfig
@@ -6,17 +6,18 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_CONTROLCENTERDC=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -26,7 +27,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_LAST_STAGE_INIT=y
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x30000
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_GO is not set
@@ -62,6 +62,7 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_MV=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_MVNETA=y
diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig
new file mode 100644
index 0000000000..39469b5203
--- /dev/null
+++ b/configs/coreboot64_defconfig
@@ -0,0 +1,48 @@
+CONFIG_X86=y
+CONFIG_SYS_TEXT_BASE=0x1120000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_NR_DRAM_BANKS=8
+CONFIG_PRE_CON_BUF_ADDR=0x100000
+CONFIG_SPL_TEXT_BASE=0x1110000
+CONFIG_X86_RUN_64BIT=y
+CONFIG_VENDOR_COREBOOT=y
+CONFIG_TARGET_COREBOOT=y
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_LAST_STAGE_INIT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_IDE=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+# CONFIG_CMD_NFS is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_SOUND=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_MAC_PARTITION=y
+# CONFIG_SPL_MAC_PARTITION is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_ISO_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="coreboot"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+# CONFIG_PCI_PNP is not set
+CONFIG_SOUND=y
+CONFIG_SOUND_I8254=y
+CONFIG_CONSOLE_SCROLL_LINES=5
diff --git a/configs/cougarcanyon2_defconfig b/configs/cougarcanyon2_defconfig
index 6fc90bcd00..aac8a391fd 100644
--- a/configs/cougarcanyon2_defconfig
+++ b/configs/cougarcanyon2_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFE00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x5FF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_INTEL=y
 CONFIG_TARGET_COUGARCANYON2=y
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
index 6f56cb4786..06d5ce4cad 100644
--- a/configs/crownbay_defconfig
+++ b/configs/crownbay_defconfig
@@ -1,9 +1,9 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
-CONFIG_MAX_CPUS=2
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x0
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_MAX_CPUS=2
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_INTEL=y
 CONFIG_TARGET_CROWNBAY=y
diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig
index 257dbc16e9..27043bf69a 100644
--- a/configs/crs305-1g-4s_defconfig
+++ b/configs/crs305-1g-4s_defconfig
@@ -3,46 +3,46 @@ CONFIG_ARCH_CPU_INIT=y
 CONFIG_ARCH_MVEBU=y
 CONFIG_SYS_TEXT_BASE=0x00800000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_TARGET_CRS305_1G_4S=y
+CONFIG_TARGET_CRS3XX_98DX3236=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x80000
+# CONFIG_EFI_LOADER is not set
 CONFIG_BUILD_TARGET="u-boot.kwb"
 CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n"
+CONFIG_AUTOBOOT_STOP_STR="s"
+CONFIG_AUTOBOOT_KEYED_CTRLC=y
 CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_MEMTEST=y
-CONFIG_SYS_ALT_MEMTEST=y
 # CONFIG_CMD_FLASH is not set
-CONFIG_CMD_I2C=y
+# CONFIG_CMD_I2C is not set
 CONFIG_CMD_SPI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_TFTPPUT=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
-CONFIG_CMD_TIME=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_CMD_UBI=y
+# CONFIG_CMD_UBI is not set
+CONFIG_CMD_MTD=y
+CONFIG_CMD_MTDPARTS=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_BLK=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_MVTWSI=y
+# CONFIG_DM_I2C is not set
+# CONFIG_SYS_I2C_MVTWSI is not set
 # CONFIG_MMC is not set
 CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
 CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_MTD=y
 CONFIG_SPI_FLASH_SFDP_SUPPORT=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_BAR=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_FIT=y
+CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_FIT_BEST_MATCH=y
 CONFIG_PCI=y
 CONFIG_PCI_MVEBU=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig
index eea3e0abe3..fe3c6c4762 100644
--- a/configs/d2net_v2_defconfig
+++ b/configs/d2net_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NET2BIG_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" D2 v2"
 CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2"
diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig
index bee44a076f..ee49ed29e6 100644
--- a/configs/da850evm_defconfig
+++ b/configs/da850evm_defconfig
@@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -29,7 +30,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_CRC32_VERIFY=y
diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig
index 226b201272..bc2c0a2c25 100644
--- a/configs/da850evm_nand_defconfig
+++ b/configs/da850evm_nand_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
@@ -27,7 +28,6 @@ CONFIG_SPL_SEPARATE_BSS=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x8000
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_CRC32_VERIFY=y
diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig
index cad56f131b..483a7cfeb5 100644
--- a/configs/dalmore_defconfig
+++ b/configs/dalmore_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/db-88f6281-bp-nand_defconfig b/configs/db-88f6281-bp-nand_defconfig
index e7a8b406dd..f98e462d42 100644
--- a/configs/db-88f6281-bp-nand_defconfig
+++ b/configs/db-88f6281-bp-nand_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DB_88F6281_BP=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP"
 # CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/db-88f6281-bp-spi_defconfig b/configs/db-88f6281-bp-spi_defconfig
index ec63ffb4b7..52af8f41ce 100644
--- a/configs/db-88f6281-bp-spi_defconfig
+++ b/configs/db-88f6281-bp-spi_defconfig
@@ -2,12 +2,12 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DB_88F6281_BP=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING="\nMarvell DB-88F6281-BP"
 # CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig
index 068f76bbe4..e5a18d8096 100644
--- a/configs/db-88f6720_defconfig
+++ b/configs/db-88f6720_defconfig
@@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6720=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xf1012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40004030
+CONFIG_DEBUG_UART=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
@@ -23,7 +24,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig
index e231ca4673..146ea50b89 100644
--- a/configs/db-88f6820-amc_defconfig
+++ b/configs/db-88f6820-amc_defconfig
@@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_AMC=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=200000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40000030
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=3
@@ -24,7 +25,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig
index c866131025..20848abae2 100644
--- a/configs/db-88f6820-gp_defconfig
+++ b/configs/db-88f6820-gp_defconfig
@@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_88F6820_GP=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -24,7 +25,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig
index 012149a860..ab96622873 100644
--- a/configs/db-mv784mp-gp_defconfig
+++ b/configs/db-mv784mp-gp_defconfig
@@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_MV784MP_GP=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40004030
+CONFIG_DEBUG_UART=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
@@ -23,7 +24,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig
index 425d7856df..2bbff64665 100644
--- a/configs/db-xc3-24g4xg_defconfig
+++ b/configs/db-xc3-24g4xg_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00800000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DB_XC3_24G4XG=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_BUILD_TARGET="u-boot.kwb"
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -15,6 +15,8 @@ CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00800000
+CONFIG_SYS_MEMTEST_END=0x00ffffff
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig
index 388330afc4..628b3516a8 100644
--- a/configs/deneb_defconfig
+++ b/configs/deneb_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
 CONFIG_SPL_GPIO_SUPPORT=y
diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig
index 1b061cd8d4..d8a81d755a 100644
--- a/configs/devkit3250_defconfig
+++ b/configs/devkit3250_defconfig
@@ -48,6 +48,7 @@ CONFIG_SPL_NAND_SIMPLE=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
 CONFIG_PHY_ADDR=31
+CONFIG_PHY_SMSC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_USB=y
diff --git a/configs/dfi-bt700-q7x-151_defconfig b/configs/dfi-bt700-q7x-151_defconfig
index 71b1a2fa8b..fdf686f956 100644
--- a/configs/dfi-bt700-q7x-151_defconfig
+++ b/configs/dfi-bt700-q7x-151_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_DFI=y
 CONFIG_SMP=y
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 40de1d8203..e0dfffa4b5 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -4,11 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_MX6_DDRCAL=y
-CONFIG_TARGET_DHCOMIMX6=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_DHCOMIMX6=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -18,8 +19,8 @@ CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x110000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT=y
@@ -30,9 +31,10 @@ CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x11400
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x20000000
 CONFIG_CMD_UNZIP=y
 CONFIG_CMD_DFU=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/display5_defconfig b/configs/display5_defconfig
index 9026c17f3f..6241375c4c 100644
--- a/configs/display5_defconfig
+++ b/configs/display5_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x120000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_MX6_DDRCAL=y
 CONFIG_TARGET_DISPLAY5=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_ENV_OFFSET=0x120000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
@@ -38,10 +39,8 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_SAVEENV=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SPL_FORCE_MMC_BOOT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="display5 > "
diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig
index 710fef4a20..eb46e3b256 100644
--- a/configs/display5_factory_defconfig
+++ b/configs/display5_factory_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x1000
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x120000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_MX6_DDRCAL=y
 CONFIG_TARGET_DISPLAY5=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
-CONFIG_ENV_OFFSET=0x120000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
@@ -37,7 +38,6 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig
index a23377f842..0739527037 100644
--- a/configs/dms-ba16-1g_defconfig
+++ b/configs/dms-ba16-1g_defconfig
@@ -1,11 +1,11 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_ADVANTECH_DMS_BA16=y
-CONFIG_SYS_DDR_1G=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_ADVANTECH_DMS_BA16=y
+CONFIG_SYS_DDR_1G=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_BOOTDELAY=1
 # CONFIG_CONSOLE_MUX is not set
@@ -43,6 +43,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_PWM_IMX=y
 CONFIG_SPI=y
diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig
index 8ea6a70865..03a2c59bad 100644
--- a/configs/dms-ba16_defconfig
+++ b/configs/dms-ba16_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_ADVANTECH_DMS_BA16=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_ADVANTECH_DMS_BA16=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_BOOTDELAY=1
 # CONFIG_CONSOLE_MUX is not set
@@ -42,6 +42,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_PWM_IMX=y
 CONFIG_SPI=y
diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig
index 8457806282..e44ec51ce9 100644
--- a/configs/dns325_defconfig
+++ b/configs/dns325_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DNS325=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig
index 079b6652f1..fcc597d249 100644
--- a/configs/dockstar_defconfig
+++ b/configs/dockstar_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DOCKSTAR=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index 4d765da4e0..e4547d9dcc 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TARGET_DRA7XX_EVM=y
@@ -11,8 +12,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ARMV7_LPAE=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x40300000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_OF_BOARD_SETUP=y
@@ -29,7 +30,6 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 CONFIG_CMD_SPL=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index c25d4ce5c1..c08bcce903 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_TI_SECURE_DEVICE=y
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -34,7 +35,6 @@ CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig
index 8e74496b2c..879c2b650b 100644
--- a/configs/dra7xx_hs_evm_usb_defconfig
+++ b/configs/dra7xx_hs_evm_usb_defconfig
@@ -4,6 +4,7 @@ CONFIG_TI_SECURE_DEVICE=y
 CONFIG_ISW_ENTRY_ADDR=0x40306d50
 CONFIG_TI_COMMON_CMD_OPTIONS=y
 CONFIG_SYS_MALLOC_F_LEN=0x18000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_OMAP54XX=y
 CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
@@ -16,8 +17,8 @@ CONFIG_ENV_OFFSET_REDUND=0x280000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_ARMV7_LPAE=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x40306D50
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_IMAGE_POST_PROCESS=y
 CONFIG_SPL_LOAD_FIT=y
@@ -36,7 +37,6 @@ CONFIG_SPL_DMA=y
 # CONFIG_SPL_NAND_SUPPORT is not set
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
diff --git a/configs/draco_defconfig b/configs/draco_defconfig
index 1e1ea38a30..4c326211d7 100644
--- a/configs/draco_defconfig
+++ b/configs/draco_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=300
 CONFIG_TARGET_DRACO=y
@@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_SMSC=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig
index ebc3eb4872..26bb8b7e19 100644
--- a/configs/dreamplug_defconfig
+++ b/configs/dreamplug_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DREAMPLUG=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING="\nMarvell-DreamPlug"
 # CONFIG_SYS_MALLOC_F is not set
diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig
index 0d7b895cc7..89ed5eb13c 100644
--- a/configs/ds109_defconfig
+++ b/configs/ds109_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_DS109=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x3D0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_USE_PREBOOT=y
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index 01a3909c8c..7d395d1e26 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -7,15 +7,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_DS414=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x7E0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40004030
+CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200"
@@ -24,7 +25,6 @@ CONFIG_PREBOOT="usb start; sf probe"
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_I2C=y
 CONFIG_CMD_PCI=y
diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig
index 951ed1df55..da418de4cd 100644
--- a/configs/e2220-1170_defconfig
+++ b/configs/e2220-1170_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -18,6 +18,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra210-e2220-1170"
@@ -43,4 +44,3 @@ CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig
index b9a68a9263..9a9d9c58d7 100644
--- a/configs/edminiv2_defconfig
+++ b/configs/edminiv2_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_ORION5X=y
-CONFIG_SPL_LDSCRIPT="arch/arm/cpu/arm926ejs/orion5x/u-boot-spl.lds"
+CONFIG_ARCH_ORION5X=y
+CONFIG_SPL_LDSCRIPT="arch/arm/mach-orion5x/u-boot-spl.lds"
 CONFIG_SYS_TEXT_BASE=0x00800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig
index b6682994f5..33da0f5f3e 100644
--- a/configs/elgin-rv1108_defconfig
+++ b/configs/elgin-rv1108_defconfig
@@ -3,8 +3,8 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x60000000
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_ROCKCHIP_RV1108=y
-CONFIG_TARGET_ELGIN_RV1108=y
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0
+CONFIG_TARGET_ELGIN_RV1108=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0x10210000
 CONFIG_DEBUG_UART_CLOCK=24000000
diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig
index ea67e647ca..edf4453e9e 100644
--- a/configs/emsdp_defconfig
+++ b/configs/emsdp_defconfig
@@ -19,7 +19,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="emsdp"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_NET is not set
diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig
index 424dc949c4..16202c848c 100644
--- a/configs/etamin_defconfig
+++ b/configs/etamin_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x980000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=300
 CONFIG_TARGET_ETAMIN=y
@@ -28,7 +29,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -74,6 +74,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_SMSC=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index e9ad7a864d..3f90eaef26 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x27000000
 CONFIG_TARGET_ETHERNUT5=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x21000
-CONFIG_ENV_SECT_SIZE=0x21000
 CONFIG_ENV_OFFSET=0x3DE000
+CONFIG_ENV_SECT_SIZE=0x21000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9XE"
diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig
index b5ba75cc6e..b2fda44ec2 100644
--- a/configs/evb-px30_defconfig
+++ b/configs/evb-px30_defconfig
@@ -12,8 +12,8 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x00000000
+CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
@@ -85,6 +85,8 @@ CONFIG_SPL_RAM=y
 CONFIG_TPL_RAM=y
 CONFIG_ROCKCHIP_SDRAM_COMMON=y
 CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 # CONFIG_SPECIFY_CONSOLE_INDEX is not set
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_DEBUG_UART_SKIP_INIT=y
@@ -101,7 +103,6 @@ CONFIG_DISPLAY=y
 CONFIG_LCD=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig
index a106ae69ca..dddb9d22af 100644
--- a/configs/evb-rk3036_defconfig
+++ b/configs/evb-rk3036_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x10081000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb"
diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig
index f8e648bbb4..4d7beca0b7 100644
--- a/configs/evb-rk3229_defconfig
+++ b/configs/evb-rk3229_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_STACK_R_ADDR=0x60600000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0x11030000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x60000000
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig
index 1b25dc13a9..64568249a0 100644
--- a/configs/evb-rk3308_defconfig
+++ b/configs/evb-rk3308_defconfig
@@ -71,7 +71,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig
index 5bbdc00214..7667bb037b 100644
--- a/configs/evb-rk3328_defconfig
+++ b/configs/evb-rk3328_defconfig
@@ -61,7 +61,6 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 3f74be3b3c..6cfb4e5dac 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -28,6 +28,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
@@ -35,10 +36,15 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
+CONFIG_DM_RESET=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_ROCKCHIP=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
@@ -47,6 +53,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig
index dd7bd384bc..943e69a16c 100644
--- a/configs/ficus-rk3399_defconfig
+++ b/configs/ficus-rk3399_defconfig
@@ -7,8 +7,8 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
 CONFIG_TARGET_ROCK960_RK3399=y
 CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
+CONFIG_DEBUG_UART=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig
index 5ed60379bf..afd966d85e 100644
--- a/configs/firefly-px30_defconfig
+++ b/configs/firefly-px30_defconfig
@@ -13,8 +13,8 @@ CONFIG_SPL_STACK_R_ADDR=0x600000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xFF160000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x00000000
+CONFIG_DEBUG_UART=y
 CONFIG_TPL_SYS_MALLOC_F_LEN=0x600
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_FIT=y
@@ -102,7 +102,6 @@ CONFIG_DISPLAY=y
 CONFIG_LCD=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_TPL_TINY_MEMSET=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig
index 09b49bde21..4e2a23f638 100644
--- a/configs/galileo_defconfig
+++ b/configs/galileo_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF10000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x0
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_VENDOR_INTEL=y
 CONFIG_TARGET_GALILEO=y
diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig
index 08a96be9d6..79d1cb9a96 100644
--- a/configs/gardena-smart-gateway-at91sam_defconfig
+++ b/configs/gardena-smart-gateway-at91sam_defconfig
@@ -16,8 +16,8 @@ CONFIG_SPL=y
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xfffff200
 CONFIG_DEBUG_UART_CLOCK=132000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
 CONFIG_BOOTDELAY=3
diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig
index 44b412118c..7111905eee 100644
--- a/configs/gazerbeam_defconfig
+++ b/configs/gazerbeam_defconfig
@@ -127,6 +127,8 @@ CONFIG_CMD_CPU=y
 CONFIG_CMD_BINOP=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00001000
+CONFIG_SYS_MEMTEST_END=0x07e00000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -176,7 +178,16 @@ CONFIG_CFI_FLASH=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PHYLIB_10G=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_DM_ETH=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index a978d4e460..f0893ce08e 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -2,10 +2,10 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_TARGET_GE_BX50V3=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_GE_BX50V3=y
 CONFIG_DM_GPIO=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig
index 957875f782..3cae981a61 100644
--- a/configs/giedi_defconfig
+++ b/configs/giedi_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
 CONFIG_SPL_GPIO_SUPPORT=y
diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig
index 97b1615c8a..9384244ebb 100644
--- a/configs/goflexhome_defconfig
+++ b/configs/goflexhome_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_GOFLEXHOME=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/gose_defconfig b/configs/gose_defconfig
index 3a2daac468..8fc0df4b05 100644
--- a/configs/gose_defconfig
+++ b/configs/gose_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose"
 CONFIG_R8A7793=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -71,6 +71,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig
index 99b656eb51..417938a512 100644
--- a/configs/grpeach_defconfig
+++ b/configs/grpeach_defconfig
@@ -3,8 +3,8 @@ CONFIG_ARCH_CPU_INIT=y
 CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x18000000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_RZA1=y
 CONFIG_NR_DRAM_BANKS=1
@@ -44,6 +44,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_BITBANGMII=y
 CONFIG_DM_ETH=y
 CONFIG_SH_ETHER=y
 CONFIG_PINCTRL=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index a5d51ce610..7e394d9aec 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -16,6 +16,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_PART=y
 CONFIG_CMD_USB=y
diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig
index 2bdd78041d..8d862696ca 100644
--- a/configs/guruplug_defconfig
+++ b/configs/guruplug_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_GURUPLUG=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 3ec8485c9b..639cb99862 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_GW_VENTANA=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xB1400
+CONFIG_TARGET_GW_VENTANA=y
 CONFIG_CMD_EECONFIG=y
 CONFIG_CMD_GSC=y
 CONFIG_SPL_MMC_SUPPORT=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index a3a432de12..67ea57c7fc 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_GW_VENTANA=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0xB1400
+CONFIG_TARGET_GW_VENTANA=y
 CONFIG_CMD_EECONFIG=y
 CONFIG_CMD_GSC=y
 CONFIG_SPL_MMC_SUPPORT=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 9d147b0a31..f6e85b680b 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_GW_VENTANA=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x1000000
+CONFIG_TARGET_GW_VENTANA=y
 CONFIG_CMD_EECONFIG=y
 CONFIG_CMD_GSC=y
 CONFIG_SPL_MMC_SUPPORT=y
diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig
index 197add3945..ec8f4dad22 100644
--- a/configs/harmony_defconfig
+++ b/configs/harmony_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1FFE0000
diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig
index 0fe8559507..e15f10cdd5 100644
--- a/configs/helios4_defconfig
+++ b/configs/helios4_defconfig
@@ -15,9 +15,9 @@ CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
@@ -54,6 +54,7 @@ CONFIG_MTD=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SF_DEFAULT_SPEED=104000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_MVNETA=y
 CONFIG_MII=y
diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig
index dca59972cb..439231a8dd 100644
--- a/configs/hrcon_defconfig
+++ b/configs/hrcon_defconfig
@@ -129,7 +129,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig
index 40de2f95f3..ef0ee4de57 100644
--- a/configs/hrcon_dh_defconfig
+++ b/configs/hrcon_dh_defconfig
@@ -127,7 +127,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig
index 64832ecbdf..5fe6f75006 100644
--- a/configs/hsdk_4xd_defconfig
+++ b/configs/hsdk_4xd_defconfig
@@ -31,7 +31,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig
index 84b22ed7c0..4b767169fc 100644
--- a/configs/hsdk_defconfig
+++ b/configs/hsdk_defconfig
@@ -30,7 +30,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="hsdk"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig
index 8543780a7d..555169d3f6 100644
--- a/configs/i12-tvbox_defconfig
+++ b/configs/i12-tvbox_defconfig
@@ -8,6 +8,7 @@ CONFIG_VIDEO_COMPOSITE=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-i12-tvbox"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig
index 9da976f399..fea69d32e9 100644
--- a/configs/ib62x0_defconfig
+++ b/configs/ib62x0_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_IB62X0=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/icnova-a20-swac_defconfig b/configs/icnova-a20-swac_defconfig
index d6da5acd5e..063cdf7ade 100644
--- a/configs/icnova-a20-swac_defconfig
+++ b/configs/icnova-a20-swac_defconfig
@@ -15,6 +15,7 @@ CONFIG_VIDEO_LCD_PANEL_LVDS=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_CMD_UNZIP=y
 CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-swac"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
 CONFIG_SUN7I_GMAC=y
diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig
index 8121867008..4281aa93bc 100644
--- a/configs/iconnect_defconfig
+++ b/configs/iconnect_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_ICONNECT=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/ids8313_defconfig b/configs/ids8313_defconfig
index 29f62e23a3..802b5a6cd6 100644
--- a/configs/ids8313_defconfig
+++ b/configs/ids8313_defconfig
@@ -163,7 +163,15 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig
index e273f35e84..a5c301dbdb 100644
--- a/configs/igep00x0_defconfig
+++ b/configs/igep00x0_defconfig
@@ -52,6 +52,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
+CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SPL_NAND_SIMPLE=y
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index 2d49b664de..d4feb66162 100644
--- a/configs/imx28_xea_defconfig
+++ b/configs/imx28_xea_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x800
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_DM_SPI=y
 CONFIG_TARGET_XEA=y
@@ -18,6 +19,7 @@ CONFIG_ENV_OFFSET_REDUND=0x90000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_TEXT_BASE=0x1000
+CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOARD_EARLY_INIT_F=y
@@ -28,12 +30,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0
 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y
 CONFIG_SPL_DMA=y
-CONFIG_SPL_FORCE_MMC_BOOT=y
 CONFIG_SPL_MMC_TINY=y
 CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_ASKENV=y
diff --git a/configs/imx6dl_icore_nand_defconfig b/configs/imx6dl_icore_nand_defconfig
index 6d62022ec9..340718c572 100644
--- a/configs/imx6dl_icore_nand_defconfig
+++ b/configs/imx6dl_icore_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -24,6 +24,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl> "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6dl_mamoj_defconfig b/configs/imx6dl_mamoj_defconfig
index 37168d2bea..7c4913debd 100644
--- a/configs/imx6dl_mamoj_defconfig
+++ b/configs/imx6dl_mamoj_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_MX6DL_MAMOJ=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6DL_MAMOJ=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_IMX_HAB=y
 # CONFIG_CMD_BMODE is not set
@@ -15,6 +15,8 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/imx6q_icore_nand_defconfig b/configs/imx6q_icore_nand_defconfig
index a0baab14d1..6b3cb8d8d3 100644
--- a/configs/imx6q_icore_nand_defconfig
+++ b/configs/imx6q_icore_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -25,6 +25,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl> "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index f57e89d0c2..be704125a9 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -4,16 +4,17 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_MX6_OCRAM_256KB=y
-CONFIG_TARGET_MX6LOGICPD=y
 CONFIG_ENV_SIZE=0x100000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_MX6_OCRAM_256KB=y
+CONFIG_TARGET_MX6LOGICPD=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
 CONFIG_BOOTDELAY=3
@@ -28,7 +29,6 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
@@ -38,6 +38,8 @@ CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_NAND_OFS=0x1500000
 CONFIG_CMD_SPL_WRITE_SIZE=0x00100000
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
@@ -60,7 +62,6 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="imx6q-logicpd"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig
index dbad2f3f60..7b13e1fd78 100644
--- a/configs/imx6qdl_icore_mipi_defconfig
+++ b/configs/imx6qdl_icore_mipi_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -14,8 +14,8 @@ CONFIG_DEBUG_UART_BASE=0x021f0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_LIBDISK_SUPPORT=y
 # CONFIG_CMD_BMODE is not set
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -31,6 +31,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl-mipi> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig
index e82a06e429..4b2e1f4780 100644
--- a/configs/imx6qdl_icore_mmc_defconfig
+++ b/configs/imx6qdl_icore_mmc_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_ADDR=0x020D8024
@@ -17,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0x021f0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_LIBDISK_SUPPORT=y
 # CONFIG_CMD_BMODE is not set
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
@@ -34,6 +34,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig
index a0baab14d1..6b3cb8d8d3 100644
--- a/configs/imx6qdl_icore_nand_defconfig
+++ b/configs/imx6qdl_icore_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -25,6 +25,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl> "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig
index be9a0271a1..a224baf639 100644
--- a/configs/imx6qdl_icore_rqs_defconfig
+++ b/configs/imx6qdl_icore_rqs_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6Q_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -28,6 +28,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="icorem6qdl-rqs> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig
index d8076f8b9d..5e27fd6bd1 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -26,6 +26,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="geam6ul> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig
index 9ac27f1034..ce1c3ddeee 100644
--- a/configs/imx6ul_geam_nand_defconfig
+++ b/configs/imx6ul_geam_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -26,6 +26,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="geam6ul> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig
index 534774987e..3140458282 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -26,6 +26,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="isiotmx6ul> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig
index 1dce4636d5..c9c2660d60 100644
--- a/configs/imx6ul_isiot_nand_defconfig
+++ b/configs/imx6ul_isiot_nand_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x400000
+CONFIG_TARGET_MX6UL_ENGICAM=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -26,6 +26,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="isiotmx6ul> "
 CONFIG_CRC32_VERIFY=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig
new file mode 100644
index 0000000000..b935d72360
--- /dev/null
+++ b/configs/imx8mm_beacon_defconfig
@@ -0,0 +1,104 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
+CONFIG_SYS_I2C_MXC_I2C1=y
+CONFIG_SYS_I2C_MXC_I2C2=y
+CONFIG_SYS_I2C_MXC_I2C3=y
+CONFIG_DM_GPIO=y
+CONFIG_TARGET_IMX8MM_BEACON=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg"
+CONFIG_DEFAULT_FDT_FILE="imx8mm-beacon-kit.dtb"
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_SEPARATE_BSS=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot=> "
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mm-beacon-kit"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_SPL_CLK_COMPOSITE_CCF=y
+CONFIG_CLK_COMPOSITE_CCF=y
+CONFIG_SPL_CLK_IMX8MM=y
+CONFIG_CLK_IMX8MM=y
+CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_PMIC=y
+CONFIG_DM_PMIC_BD71837=y
+CONFIG_SPL_DM_PMIC_BD71837=y
+CONFIG_DM_REGULATOR=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_BD71837=y
+CONFIG_SPL_DM_REGULATOR_BD71837=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_CONS_INDEX=2
+CONFIG_DM_SERIAL=y
+# CONFIG_SPL_DM_SERIAL is not set
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_SPI_MEM=y
+CONFIG_NXP_FSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index 1403067130..9a72f46f27 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -1,17 +1,15 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8M=y
 CONFIG_SYS_TEXT_BASE=0x40200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_OFFSET=0x400000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_IMX8MM_EVK=y
 CONFIG_SPL_MMC_SUPPORT=y
@@ -30,6 +28,7 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot=> "
 # CONFIG_CMD_EXPORTENV is not set
@@ -82,5 +81,9 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index e3f99896a6..bc6014d73a 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -1,17 +1,15 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8M=y
 CONFIG_SYS_TEXT_BASE=0x40200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_OFFSET=0x400000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_IMX8MN_EVK=y
 CONFIG_SPL_MMC_SUPPORT=y
@@ -32,6 +30,7 @@ CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_BOOTROM_SUPPORT=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="u-boot=> "
 # CONFIG_CMD_EXPORTENV is not set
@@ -76,5 +75,9 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index b181543df5..44b2935f69 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -1,17 +1,15 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8M=y
 CONFIG_SYS_TEXT_BASE=0x40200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_OFFSET=0x400000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_IMX8MP_EVK=y
 CONFIG_SPL_MMC_SUPPORT=y
@@ -81,4 +79,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+# CONFIG_WATCHDOG is not set
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index a936f5b79d..7472bad9e6 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8M=y
 CONFIG_SYS_TEXT_BASE=0x40200000
 CONFIG_ENV_SIZE=0x1000
@@ -21,6 +19,7 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT2=y
@@ -37,6 +36,8 @@ CONFIG_SYS_I2C_MXC=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_DM_ETH=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX8M=y
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
new file mode 100644
index 0000000000..045d204897
--- /dev/null
+++ b/configs/imx8mq_phanbell_defconfig
@@ -0,0 +1,51 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
+CONFIG_DM_GPIO=y
+CONFIG_TARGET_IMX8MQ_PHANBELL=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_CSF_SIZE=0x2000
+CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
+CONFIG_SD_BOOT=y
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_BOOTM_NETBSD is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_USDHC=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_DM_THERMAL=y
diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig
index f7debfbe7b..428c7c47cd 100644
--- a/configs/imx8qm_mek_defconfig
+++ b/configs/imx8qm_mek_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
 CONFIG_SPL_GPIO_SUPPORT=y
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index 301747a56c..35191447ae 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
 CONFIG_SPL_GPIO_SUPPORT=y
diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig
index 8a7e9ee9c7..4cc37f5de7 100644
--- a/configs/imx8qxp_mek_defconfig
+++ b/configs/imx8qxp_mek_defconfig
@@ -1,6 +1,4 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8=y
 CONFIG_SYS_TEXT_BASE=0x80020000
 CONFIG_SPL_GPIO_SUPPORT=y
@@ -28,7 +26,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_POWER_DOMAIN=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_CPU=y
 # CONFIG_BOOTM_NETBSD is not set
diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig
index 2f35df1896..ca5f83e9be 100644
--- a/configs/imxrt1020-evk_defconfig
+++ b/configs/imxrt1020-evk_defconfig
@@ -24,7 +24,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
 # CONFIG_SPL_CRC32_SUPPORT is not set
-# CONFIG_SPL_DM_GPIO is not set
 # CONFIG_BOOTM_NETBSD is not set
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
@@ -48,6 +47,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y
 CONFIG_CLK_COMPOSITE_CCF=y
 CONFIG_SPL_CLK_IMXRT1020=y
 CONFIG_CLK_IMXRT1020=y
+# CONFIG_SPL_DM_GPIO is not set
 CONFIG_MXC_GPIO=y
 # CONFIG_INPUT is not set
 CONFIG_DM_MMC=y
diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig
index 25d0ba191c..0eafe26d47 100644
--- a/configs/imxrt1050-evk_defconfig
+++ b/configs/imxrt1050-evk_defconfig
@@ -27,7 +27,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x100
 # CONFIG_SPL_CRC32_SUPPORT is not set
-# CONFIG_SPL_DM_GPIO is not set
 # CONFIG_BOOTM_NETBSD is not set
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
@@ -51,6 +50,7 @@ CONFIG_SPL_CLK_COMPOSITE_CCF=y
 CONFIG_CLK_COMPOSITE_CCF=y
 CONFIG_SPL_CLK_IMXRT1050=y
 CONFIG_CLK_IMXRT1050=y
+# CONFIG_SPL_DM_GPIO is not set
 CONFIG_MXC_GPIO=y
 # CONFIG_INPUT is not set
 CONFIG_DM_MMC=y
diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig
index 5bae7a8819..6144eb5fad 100644
--- a/configs/inetspace_v2_defconfig
+++ b/configs/inetspace_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" IS v2"
 CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2"
diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig
index b35423198f..35039c4143 100644
--- a/configs/iot_devkit_defconfig
+++ b/configs/iot_devkit_defconfig
@@ -23,7 +23,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="iot_devkit"
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_NET is not set
diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig
index e9e82bb430..4deb4e219f 100644
--- a/configs/j721e_evm_a72_defconfig
+++ b/configs/j721e_evm_a72_defconfig
@@ -8,6 +8,7 @@ CONFIG_SOC_K3_J721E=y
 CONFIG_TARGET_J721E_A72_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -43,7 +44,6 @@ CONFIG_SPL_RAM_DEVICE=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
@@ -120,7 +120,6 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_HBMC_AM654=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig
index 917f82d4b5..ee9217aee2 100644
--- a/configs/j721e_evm_r5_defconfig
+++ b/configs/j721e_evm_r5_defconfig
@@ -8,12 +8,12 @@ CONFIG_SOC_K3_J721E=y
 CONFIG_K3_EARLY_CONS=y
 CONFIG_TARGET_J721E_R5_EVM=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_SPL_STACK_R_ADDR=0x82000000
-CONFIG_ENV_OFFSET_REDUND=0x700000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -23,6 +23,7 @@ CONFIG_SPL_TEXT_BASE=0x41c00000
 CONFIG_SPL_LOAD_FIT=y
 CONFIG_USE_BOOTCOMMAND=y
 # CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_EARLY_BSS=y
@@ -42,7 +43,6 @@ CONFIG_SPL_REMOTEPROC=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
 CONFIG_SPL_YMODEM_SUPPORT=y
@@ -78,9 +78,10 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
-CONFIG_MISC=y
 CONFIG_FS_LOADER=y
+CONFIG_ESM_K3=y
 CONFIG_K3_AVS0=y
+CONFIG_ESM_PMIC=y
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_SDHCI=y
@@ -132,6 +133,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_FS_EXT4=y
 CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
-CONFIG_ESM_K3=y
-CONFIG_ESM_PMIC=y
-CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig
index a723e2718e..ae540a26a4 100644
--- a/configs/j721e_hs_evm_a72_defconfig
+++ b/configs/j721e_hs_evm_a72_defconfig
@@ -8,6 +8,7 @@ CONFIG_SOC_K3_J721E=y
 CONFIG_TARGET_J721E_A72_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -39,7 +40,6 @@ CONFIG_SPL_POWER_DOMAIN=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_DFU=y
@@ -110,7 +110,6 @@ CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_HBMC_AM654=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH_SFDP_SUPPORT
 CONFIG_SPI_FLASH_STMICRO=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig
index 196625d881..51d5a3bb98 100644
--- a/configs/j721e_hs_evm_r5_defconfig
+++ b/configs/j721e_hs_evm_r5_defconfig
@@ -9,6 +9,7 @@ CONFIG_SOC_K3_J721E=y
 CONFIG_TARGET_J721E_R5_EVM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x680000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -41,7 +42,6 @@ CONFIG_SPL_REMOTEPROC=y
 # CONFIG_SPL_SPI_FLASH_TINY is not set
 CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_FLASH is not set
@@ -75,7 +75,6 @@ CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
 CONFIG_SYS_I2C_OMAP24XX=y
 CONFIG_DM_MAILBOX=y
 CONFIG_K3_SEC_PROXY=y
-CONFIG_MISC=y
 CONFIG_FS_LOADER=y
 CONFIG_K3_AVS0=y
 CONFIG_DM_MMC=y
diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig
index 116950ea7b..74f4456d89 100644
--- a/configs/jetson-tk1_defconfig
+++ b/configs/jetson-tk1_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig
index 5df19efa9b..644b6e5464 100644
--- a/configs/k2e_evm_defconfig
+++ b/configs/k2e_evm_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_TARGET_K2E_EVM=y
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
@@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_CMD_MX_CYCLIC=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_GPIO is not set
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
index 5abf5faa45..5bc7f7f865 100644
--- a/configs/k2g_evm_defconfig
+++ b/configs/k2g_evm_defconfig
@@ -9,6 +9,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_TARGET_K2G_EVM=y
 CONFIG_ENV_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
@@ -23,7 +24,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_CMD_MX_CYCLIC=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_GPIO is not set
diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig
index 0635f4a976..eb5916c2c6 100644
--- a/configs/k2hk_evm_defconfig
+++ b/configs/k2hk_evm_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_TARGET_K2HK_EVM=y
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
@@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_CMD_MX_CYCLIC=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_GPIO is not set
diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig
index 66f778fa0b..71a35e3496 100644
--- a/configs/k2l_evm_defconfig
+++ b/configs/k2l_evm_defconfig
@@ -10,6 +10,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_TARGET_K2L_EVM=y
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
@@ -24,7 +25,6 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_CMD_MX_CYCLIC=y
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_GPIO is not set
diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig
index 692138eb11..4aeab0e35d 100644
--- a/configs/khadas-vim3_defconfig
+++ b/configs/khadas-vim3_defconfig
@@ -40,6 +40,8 @@ CONFIG_ETH_DESIGNWARE=y
 CONFIG_MESON_G12A_USB_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MESON_G12A=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_MESON_EE_POWER_DOMAIN=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_RESET=y
@@ -55,6 +57,7 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
+CONFIG_USB_KEYBOARD=y
 # CONFIG_USB_DWC3_GADGET is not set
 CONFIG_USB_DWC3_MESON_G12A=y
 CONFIG_USB_GADGET=y
@@ -63,4 +66,10 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_VIDEO_MESON=y
+CONFIG_VIDEO_DT_SIMPLEFB=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig
index 28c20c0d6d..887885f329 100644
--- a/configs/khadas-vim3l_defconfig
+++ b/configs/khadas-vim3l_defconfig
@@ -57,6 +57,7 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
+CONFIG_USB_KEYBOARD=y
 # CONFIG_USB_DWC3_GADGET is not set
 CONFIG_USB_DWC3_MESON_G12A=y
 CONFIG_USB_GADGET=y
@@ -66,6 +67,9 @@ CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_DM_VIDEO=y
+# CONFIG_VIDEO_BPP8 is not set
+# CONFIG_VIDEO_BPP16 is not set
+CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_MESON=y
 CONFIG_VIDEO_DT_SIMPLEFB=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig
index d185100f66..9bbbfd9442 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index a8374d9fc2..887893ef33 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig
index 7ad69e1639..81c9f697bb 100644
--- a/configs/km_kirkwood_pci_defconfig
+++ b/configs/km_kirkwood_pci_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_KM_FPGA_CONFIG=y
diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig
index 55379658e7..a0d2c1a726 100644
--- a/configs/kmcoge4_defconfig
+++ b/configs/kmcoge4_defconfig
@@ -1,8 +1,8 @@
 CONFIG_PPC=y
 CONFIG_SYS_TEXT_BASE=0xfff40000
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
 CONFIG_ENV_OFFSET_REDUND=0x110000
@@ -55,6 +55,7 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
 CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 1775273807..169d895203 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -1,15 +1,15 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_PIGGY_MAC_ADDRESS_OFFSET=3
 CONFIG_KM_ENV_IS_IN_SPI_NOR=y
 CONFIG_KM_PIGGY4_88E6352=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_ENV_OFFSET_REDUND=0xD0000
 CONFIG_IDENT_STRING="\nKeymile COGE5UN"
diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig
index 3cef72cc86..8d90cdab0f 100644
--- a/configs/kmnusa_defconfig
+++ b/configs/kmnusa_defconfig
@@ -1,15 +1,15 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_KM_FPGA_CONFIG=y
 CONFIG_KM_ENV_IS_IN_SPI_NOR=y
 CONFIG_KM_PIGGY4_88E6352=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_ENV_OFFSET_REDUND=0xD0000
 CONFIG_IDENT_STRING="\nKeymile NUSA"
diff --git a/configs/kmsuse2_defconfig b/configs/kmsuse2_defconfig
index e81a8b02fc..82006010ed 100644
--- a/configs/kmsuse2_defconfig
+++ b/configs/kmsuse2_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x07d00000
 CONFIG_TARGET_KM_KIRKWOOD=y
 CONFIG_KM_FPGA_CONFIG=y
@@ -9,8 +9,8 @@ CONFIG_KM_FPGA_FORCE_CONFIG=y
 CONFIG_KM_FPGA_NO_RESET=y
 CONFIG_KM_ENV_IS_IN_SPI_NOR=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
 CONFIG_ENV_OFFSET_REDUND=0xD0000
 CONFIG_IDENT_STRING="\nABB SUSE2"
diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig
index edb79334e0..7d8ac65111 100644
--- a/configs/koelsch_defconfig
+++ b/configs/koelsch_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch"
 CONFIG_R8A7791=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -71,6 +71,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/kp_imx53_defconfig b/configs/kp_imx53_defconfig
index 096ba53236..936b51a699 100644
--- a/configs/kp_imx53_defconfig
+++ b/configs/kp_imx53_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_KP_IMX53=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_KP_IMX53=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0x102000
 # CONFIG_CMD_BMODE is not set
diff --git a/configs/kp_imx6q_tpc_defconfig b/configs/kp_imx6q_tpc_defconfig
index 6bfe9af402..2f46b23fcd 100644
--- a/configs/kp_imx6q_tpc_defconfig
+++ b/configs/kp_imx6q_tpc_defconfig
@@ -5,18 +5,19 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2200
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
 CONFIG_MX6_DDRCAL=y
 CONFIG_TARGET_KP_IMX6Q_TPC=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x100000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
 CONFIG_ENV_OFFSET_REDUND=0x102000
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
@@ -26,7 +27,6 @@ CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_SPL_RAW_IMAGE_SUPPORT=y
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_AUTOBOOT_KEYED=y
diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig
index 51cd9b5433..e59dc5270d 100644
--- a/configs/kylin-rk3036_defconfig
+++ b/configs/kylin-rk3036_defconfig
@@ -12,8 +12,8 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x0
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0x20068000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x10081000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb"
diff --git a/configs/lager_defconfig b/configs/lager_defconfig
index 6e6ad00820..918d9beb29 100644
--- a/configs/lager_defconfig
+++ b/configs/lager_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager"
 CONFIG_R8A7790=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -73,6 +73,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig
index 7e486757a2..df0dbbd19d 100644
--- a/configs/libretech-ac_defconfig
+++ b/configs/libretech-ac_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="libretech-ac"
 CONFIG_ARCH_MESON=y
 CONFIG_SYS_TEXT_BASE=0x01000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xFFFF0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_MESON_GXL=y
 CONFIG_NR_DRAM_BANKS=1
@@ -69,8 +69,8 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
 CONFIG_USB_DWC3=y
-CONFIG_USB_KEYBOARD=y
 # CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
 CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig
index 531d519a7c..72101425cf 100644
--- a/configs/libretech-s905d-pc_defconfig
+++ b/configs/libretech-s905d-pc_defconfig
@@ -2,13 +2,14 @@ CONFIG_ARM=y
 CONFIG_SYS_BOARD="q200"
 CONFIG_ARCH_MESON=y
 CONFIG_SYS_TEXT_BASE=0x01000000
-CONFIG_MESON_GXL=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xFFFF0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
+CONFIG_MESON_GXL=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xc81004c0
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_IDENT_STRING=" libretech-s905d-pc"
 CONFIG_DEBUG_UART=y
 CONFIG_OF_BOARD_SETUP=y
@@ -22,7 +23,6 @@ CONFIG_CMD_ADC=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -34,13 +34,11 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SARADC_MESON=y
-CONFIG_DM_GPIO=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
@@ -67,12 +65,12 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
 CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
 CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_MESON=y
diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig
index 595ec21da7..4c255c1cd8 100644
--- a/configs/libretech-s912-pc_defconfig
+++ b/configs/libretech-s912-pc_defconfig
@@ -1,14 +1,14 @@
 CONFIG_ARM=y
-CONFIG_SYS_BOARD="q200"
 CONFIG_ARCH_MESON=y
 CONFIG_SYS_TEXT_BASE=0x01000000
-CONFIG_MESON_GXM=y
 CONFIG_ENV_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xFFFF0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
+CONFIG_MESON_GXM=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xc81004c0
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_IDENT_STRING=" libretech-s912-pc"
 CONFIG_DEBUG_UART=y
 CONFIG_OF_BOARD_SETUP=y
@@ -22,7 +22,6 @@ CONFIG_CMD_ADC=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -34,13 +33,11 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_SARADC_MESON=y
-CONFIG_DM_GPIO=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
-CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_GIGADEVICE=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
@@ -67,12 +64,12 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_XHCI_DWC3_OF_SIMPLE=y
 CONFIG_USB_DWC3=y
 # CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e
 CONFIG_USB_GADGET_PRODUCT_NUM=0xfada
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_MESON=y
diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index e022b4caf0..b6504b7123 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -14,9 +14,9 @@ CONFIG_DEBUG_UART_BASE=0xFF180000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_TEXT_BASE=0x00000000
 CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
 CONFIG_DEBUG_UART=y
-CONFIG_SPL_TEXT_BASE=0x00000000
 CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
diff --git a/configs/liteboard_defconfig b/configs/liteboard_defconfig
index 665955c5e8..b1606e54c4 100644
--- a/configs/liteboard_defconfig
+++ b/configs/liteboard_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_LITEBOARD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_LITEBOARD=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -23,6 +23,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
@@ -45,6 +47,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig
index b1cf8ef7c5..07ba4d6472 100644
--- a/configs/ls1012a2g5rdb_qspi_defconfig
+++ b/configs/ls1012a2g5rdb_qspi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012A2G5RDB=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -42,6 +44,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012a2g5rdb_tfa_defconfig b/configs/ls1012a2g5rdb_tfa_defconfig
index a978580952..8999d01f66 100644
--- a/configs/ls1012a2g5rdb_tfa_defconfig
+++ b/configs/ls1012a2g5rdb_tfa_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012A2G5RDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -42,6 +44,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig
index 1e601484ee..541cbb07ce 100644
--- a/configs/ls1012afrdm_qspi_defconfig
+++ b/configs/ls1012afrdm_qspi_defconfig
@@ -1,11 +1,10 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRDM=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
-CONFIG_BLK=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -23,6 +22,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -34,11 +35,13 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_BLK=y
 CONFIG_DM_I2C=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012afrdm_tfa_defconfig b/configs/ls1012afrdm_tfa_defconfig
index 420a2f416c..b5043d7a18 100644
--- a/configs/ls1012afrdm_tfa_defconfig
+++ b/configs/ls1012afrdm_tfa_defconfig
@@ -2,11 +2,10 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRDM=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
-CONFIG_BLK=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -23,6 +22,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_USB=y
@@ -34,11 +35,13 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
+CONFIG_BLK=y
 CONFIG_DM_I2C=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
index cc5ee71638..f105aaf2bc 100644
--- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRWY=y
 CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_NXP_ESBC=y
-CONFIG_ENV_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
@@ -20,6 +20,9 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig
index bee093694c..492276439e 100644
--- a/configs/ls1012afrwy_qspi_defconfig
+++ b/configs/ls1012afrwy_qspi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRWY=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1D0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
@@ -21,6 +21,9 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -32,6 +35,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x401D0000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
diff --git a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
index a983c30042..9c89064150 100644
--- a/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRWY=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_NXP_ESBC=y
-CONFIG_ENV_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -20,6 +20,9 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1012afrwy_tfa_defconfig b/configs/ls1012afrwy_tfa_defconfig
index f8ca4483f2..2948fd57ec 100644
--- a/configs/ls1012afrwy_tfa_defconfig
+++ b/configs/ls1012afrwy_tfa_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012AFRWY=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1D0000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -21,6 +21,9 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -31,7 +34,7 @@ CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x401D0000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig
index fd4fba5cc4..65e8e5c791 100644
--- a/configs/ls1012aqds_qspi_defconfig
+++ b/configs/ls1012aqds_qspi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012AQDS=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
@@ -26,6 +26,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -58,6 +60,7 @@ CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
index 23dea4ce23..529cd08b12 100644
--- a/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012aqds_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_NXP_ESBC=y
-CONFIG_ENV_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -24,6 +24,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -47,6 +49,7 @@ CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012aqds_tfa_defconfig b/configs/ls1012aqds_tfa_defconfig
index 974cedc0f4..79d196c77b 100644
--- a/configs/ls1012aqds_tfa_defconfig
+++ b/configs/ls1012aqds_tfa_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -26,6 +26,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -58,6 +60,7 @@ CONFIG_SF_DEFAULT_BUS=1
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=10000000
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
index 5ad4e0d6bd..1483e64d8c 100644
--- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012ARDB=y
 CONFIG_SYS_TEXT_BASE=0x40100000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_NXP_ESBC=y
-CONFIG_ENV_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -42,6 +44,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_E1000=y
 CONFIG_PCI=y
diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig
index 98057a944c..e39de4caf5 100644
--- a/configs/ls1012ardb_qspi_defconfig
+++ b/configs/ls1012ardb_qspi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1012ARDB=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -44,6 +46,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
index 4e937e53ee..8b67798429 100644
--- a/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_NXP_ESBC=y
-CONFIG_ENV_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -41,7 +43,10 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_FSL_PFE=y
+CONFIG_DM_ETH=y
 CONFIG_E1000=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
@@ -60,5 +65,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
-CONFIG_FSL_PFE=y
-CONFIG_DM_ETH=y
diff --git a/configs/ls1012ardb_tfa_defconfig b/configs/ls1012ardb_tfa_defconfig
index fdf2324a63..e0d203d442 100644
--- a/configs/ls1012ardb_tfa_defconfig
+++ b/configs/ls1012ardb_tfa_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1012ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -23,6 +23,8 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -33,7 +35,6 @@ CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x40500000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
@@ -44,6 +45,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_FSL_PFE=y
 CONFIG_DM_ETH=y
diff --git a/configs/ls1021aiot_qspi_defconfig b/configs/ls1021aiot_qspi_defconfig
index 512f775303..cb73a04b35 100644
--- a/configs/ls1021aiot_qspi_defconfig
+++ b/configs/ls1021aiot_qspi_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AIOT=y
 CONFIG_SYS_TEXT_BASE=0x40010000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
@@ -12,6 +12,7 @@ CONFIG_MISC_INIT_R=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
@@ -30,6 +31,7 @@ CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 4cd4c319b5..10b6930914 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -7,8 +7,8 @@ CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
 CONFIG_MISC_INIT_R=y
 CONFIG_BOARD_EARLY_INIT_F=y
@@ -17,6 +17,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_EXT2=y
@@ -36,6 +37,7 @@ CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index d29b6ebc74..24e0316eb1 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -21,6 +21,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -49,6 +51,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 62c3bccbfe..f0f3a747c6 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -22,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -50,6 +52,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index a940c74de7..8a88c5fd39 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -37,6 +37,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -66,6 +68,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 73fd8c2cc8..547b6393ba 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
@@ -22,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -48,6 +50,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index b75b0c08d2..58d251b908 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -21,6 +21,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -50,6 +52,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 83daeb1374..f74a4c6b29 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -22,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -51,6 +53,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 497ee52d59..f91534cfdd 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021AQDS=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
@@ -23,6 +23,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -49,6 +51,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 3d12ceb27f..8d34213855 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT"
@@ -35,6 +35,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -65,6 +67,7 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 22be8e6e91..9871c8edf4 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -11,8 +11,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SD_BOOT,SD_BOOT_QSPI"
@@ -34,6 +34,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -61,6 +63,7 @@ CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_PHY_REALTEK=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls1021atsn_qspi_defconfig b/configs/ls1021atsn_qspi_defconfig
index b7e754cf19..a62e04e92a 100644
--- a/configs/ls1021atsn_qspi_defconfig
+++ b/configs/ls1021atsn_qspi_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATSN=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig
index 5245540978..db4f0ab796 100644
--- a/configs/ls1021atsn_sdcard_defconfig
+++ b/configs/ls1021atsn_sdcard_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 9af9912600..0bf4aad102 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_SYS_TEXT_BASE=0x60100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
@@ -23,6 +23,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 3e63933ea2..5507dbe3c1 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -22,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 01b5205df4..cdf81957a8 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -24,6 +24,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig
index 0fcd675f3a..4c82d66899 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -2,8 +2,8 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1021ATWR=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
@@ -25,6 +25,8 @@ CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 2f2a9fff37..9039ccc8f2 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -3,8 +3,8 @@ CONFIG_TARGET_LS1021ATWR=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -38,6 +38,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig
index 7a98c26bcc..478d3df1b8 100644
--- a/configs/ls1021atwr_sdcard_ifc_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -37,6 +37,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig
index 110631da12..de783a8d3d 100644
--- a/configs/ls1021atwr_sdcard_qspi_defconfig
+++ b/configs/ls1021atwr_sdcard_qspi_defconfig
@@ -10,8 +10,8 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -36,6 +36,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index c5f0bd85da..4fd9ff8f3a 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1028AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=2
@@ -19,6 +20,9 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -28,7 +32,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_NETCONSOLE=y
 CONFIG_DM=y
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 7085be77fe..fc6344cd7c 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1028AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=2
@@ -20,6 +21,9 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
@@ -30,7 +34,7 @@ CONFIG_CMD_WDT=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-duart"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x20500000
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
new file mode 100644
index 0000000000..e0348279d9
--- /dev/null
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -0,0 +1,91 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1028AQDS=y
+CONFIG_TFABOOT=y
+CONFIG_SYS_MALLOC_F_LEN=0x6000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
+CONFIG_FSPI_AHB_EN_4BYTE=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_AHCI=y
+CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="LPUART"
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_WDT=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1028a-qds-lpuart"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x20500000
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_NETCONSOLE=y
+CONFIG_DM=y
+CONFIG_SCSI_AHCI=y
+CONFIG_SATA_CEVA=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_I2C_MUX=y
+CONFIG_I2C_MUX_PCA954x=y
+CONFIG_DM_MMC=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
+CONFIG_E1000=y
+CONFIG_FSL_ENETC=y
+CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_ECAM_GENERIC=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
+CONFIG_SCSI=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_FSL_LPUART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
+CONFIG_NXP_FSPI=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_WDT=y
+CONFIG_WDT_SP805=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 6fa14af6af..96f190d859 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1028ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=2
@@ -18,6 +19,9 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 7ffd1c3bc6..1f05ae57cc 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1028ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=2
@@ -19,6 +20,9 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M"
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 93b86af607..da56fce693 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -19,6 +20,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -35,6 +38,7 @@ CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -46,6 +50,9 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -62,5 +69,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index f89c2ee3a4..9d450b3d63 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -20,6 +21,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -36,6 +39,7 @@ CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -47,6 +51,9 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -64,5 +71,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index a169bfef8f..a08ec2a7e4 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -5,13 +5,14 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,6 +36,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -52,6 +55,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -62,6 +66,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -78,5 +85,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 01d0af30b1..fe025facdd 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -19,6 +20,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -36,6 +39,7 @@ CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
 CONFIG_SYS_FSL_DDR3=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -47,6 +51,9 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -63,5 +70,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 65eff7c40b..a018b22fa9 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -21,6 +22,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -36,11 +39,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -58,5 +66,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index c5042a345d..862458c7c7 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,6 +36,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -52,6 +55,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -63,6 +67,9 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -79,5 +86,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 12706a48dc..a7252ac115 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -34,6 +35,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -50,11 +53,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -72,5 +80,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index b7335bcd33..3ee5d2869c 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -21,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -34,6 +37,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart"
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -44,7 +48,11 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -55,6 +63,7 @@ CONFIG_DM_SCSI=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
+CONFIG_FSL_QSPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
@@ -63,5 +72,3 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index 6e594ed07c..297788b648 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -22,6 +23,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -43,6 +46,7 @@ CONFIG_ENV_ADDR=0x60500000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -54,7 +58,11 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -71,5 +79,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 153a62866f..911bbef72c 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SYS_TEXT_BASE=0x60100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DISTRO_DEFAULTS=y
@@ -13,6 +14,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -25,6 +27,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -36,6 +39,10 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -55,5 +62,3 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index d1e534388b..4a15992f7c 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DISTRO_DEFAULTS=y
@@ -13,6 +14,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -28,6 +30,7 @@ CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -40,6 +43,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -55,5 +62,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 252c7c8313..f399b1cbb3 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -46,6 +48,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -57,6 +60,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -75,5 +82,3 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index de18aaa063..5f794605d6 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -31,6 +32,7 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -47,6 +49,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -58,6 +61,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -74,5 +81,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 149b25ffe5..224321810a 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -45,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -55,6 +58,10 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -74,5 +81,3 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index b386fc668c..bf557d7650 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -29,6 +30,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -45,6 +47,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -57,6 +60,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -73,5 +80,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 # CONFIG_SPL_USE_TINY_PRINTF is not set
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index 36eb0fcff7..0f3f920ffd 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1043ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -15,6 +16,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -27,6 +29,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb"
 CONFIG_DM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -38,6 +41,10 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -56,5 +63,3 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index eaddbca79f..a62310ccc9 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1043ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -16,6 +17,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@0x1100000(nor_bank0_fit),7m(nor_bank0_user),2m@0x4100000(nor_bank4_uboot),40m@0x5100000(nor_bank4_fit),-(nor_bank4_user);7e800000.flash:1m(nand_uboot),1m(nand_uboot_env),20m(nand_fit);spi0.0:1m(uboot),5m(kernel),1m(dtb),9m(file_system)"
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -33,6 +35,7 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_ADDR=0x60500000
 CONFIG_DM=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +48,10 @@ CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -59,5 +66,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig
index 616984f7d7..68271c35b2 100644
--- a/configs/ls1046afrwy_tfa_defconfig
+++ b/configs/ls1046afrwy_tfa_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046AFRWY=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -31,9 +32,11 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-frwy"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40500000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -62,5 +65,3 @@ CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_RTL8152=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index ed25b7a680..caa4221875 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x20000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -19,6 +20,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -32,6 +35,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -42,6 +46,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -60,5 +67,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index 0a50bb14c0..838d97cde4 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -19,6 +20,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -35,6 +38,7 @@ CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -45,6 +49,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -62,5 +69,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 17d1685081..d89b7791b2 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -3,6 +3,7 @@ CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x60100000
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -20,6 +21,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -36,6 +39,7 @@ CONFIG_ENV_ADDR=0x60300000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -46,6 +50,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -64,5 +71,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 0bafcbe168..4aebca7108 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -3,12 +3,13 @@ CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -28,6 +29,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -44,6 +47,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -53,6 +57,9 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -70,5 +77,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index ff0fd45c9e..00b3568276 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1046AQDS=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_AHCI=y
@@ -20,6 +21,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -31,15 +34,21 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:2m(uboot),14m(free)"
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x40300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -58,5 +67,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 78edb456b8..a68c43566d 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -36,6 +37,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -53,6 +56,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -63,6 +67,9 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -80,5 +87,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index d085daf384..a66b1bdca9 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -35,6 +36,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -51,11 +54,16 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -74,5 +82,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 6a9391478b..2b84a6bee5 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1046AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -21,6 +22,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -34,6 +37,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-qds-duart"
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -43,7 +47,11 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -61,5 +69,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 04e6b2392c..e412c05b53 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
 CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -22,6 +23,8 @@ CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -39,10 +42,11 @@ CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_USE_ENV_SPI_BUS=y
 CONFIG_ENV_SPI_BUS=0
-CONFIG_ENV_ADDR=0x60500000
+CONFIG_ENV_ADDR=0x40500000
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -53,7 +57,11 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SF_DEFAULT_BUS=1
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -71,5 +79,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index bbb352db31..def9140fd6 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -31,6 +32,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -48,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -56,6 +59,9 @@ CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -73,5 +79,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index b9c8a8822c..f29e86b8f9 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_TARGET_LS1046ARDB=y
 CONFIG_SYS_TEXT_BASE=0x40100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -15,6 +16,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_MISC_INIT_R=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -29,14 +31,19 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -55,5 +62,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index 51edada3f8..51978686b5 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1046ARDB=y
 CONFIG_SYS_TEXT_BASE=0x40100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_MISC_INIT_R=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -28,18 +30,24 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.i
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x40300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -57,5 +65,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig
index 84e059671c..cbc598dea8 100644
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@@ -4,8 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
@@ -13,8 +14,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SPL_LOAD_FIT=y
@@ -33,6 +34,7 @@ CONFIG_SPL_OS_BOOT=y
 CONFIG_SYS_OS_BASE=0x40980000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_SPL=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -51,6 +53,7 @@ CONFIG_SPL_ENV_IS_NOWHERE=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -58,6 +61,9 @@ CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_BAR is not set
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
@@ -77,5 +83,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_SPL_GZIP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index 9954e894da..aeac0a248e 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046ARDB=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -45,6 +47,7 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SPL_DM=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
@@ -52,6 +55,9 @@ CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -70,5 +76,3 @@ CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index 3502809756..878bdf0513 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -5,14 +5,15 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_DM_GPIO=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x10000000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -30,6 +31,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -47,6 +49,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
@@ -55,6 +58,9 @@ CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -72,5 +78,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
index 9e3042b797..7db5174111 100644
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@@ -2,8 +2,9 @@ CONFIG_ARM=y
 CONFIG_TARGET_LS1046ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
+CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_MISC_INIT_R=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -29,14 +31,19 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -54,5 +61,3 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_RSA=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index 2f7686bafd..06bedd66ff 100644
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -3,8 +3,9 @@ CONFIG_TARGET_LS1046ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 mtdparts=1550000.spi-0:1m(rcw),15m(u-boot),48m(kernel.itb);7e800000.flash:16m(nand_uboot),48m(nand_kernel),448m(nand_free)"
 CONFIG_MISC_INIT_R=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -31,17 +33,23 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1046a-rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x40500000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
 CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_ESDHC=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 # CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_FMAN_ENET=y
 CONFIG_PCI=y
@@ -58,5 +66,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_DM_I2C=y
-CONFIG_DM_GPIO=y
diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index 7713e58bbe..61e05ceda6 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_SYS_TEXT_BASE=0x30100000
 CONFIG_ENV_SIZE=0x20000
@@ -18,6 +19,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
@@ -42,6 +45,11 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_PCI=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index 242c40b8b5..e51fdcab20 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_SYS_TEXT_BASE=0x20100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -20,10 +21,13 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
@@ -39,6 +43,11 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_PCI=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 3649b06a75..f7d0c15707 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_SYS_TEXT_BASE=0x20100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -21,10 +22,13 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
@@ -42,6 +46,11 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_PCI=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index 815ea5ce4a..57e706a4c4 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -11,8 +12,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4"
@@ -29,6 +30,8 @@ CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
@@ -52,6 +55,11 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_PCI=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index 275dbf9e0e..4ff7173369 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -11,8 +12,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT_VERBOSE=y
@@ -31,10 +32,13 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
@@ -52,6 +56,11 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_E1000=y
 CONFIG_MII=y
 CONFIG_PCI=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index 1144cba983..c184843a6d 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -24,18 +25,24 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_OF_LIST="fsl-ls1088a-qds-21-x fsl-ls1088a-qds-29-x"
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_NAND=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x80500000
+CONFIG_ENV_ADDR=0x20500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
@@ -57,8 +64,18 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index 3f654e2e1d..f00307f964 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_SYS_TEXT_BASE=0x20100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -21,10 +22,14 @@ CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
@@ -40,8 +45,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 935d76b4be..0572c9c241 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_SYS_TEXT_BASE=0x20100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -22,10 +23,14 @@ CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
@@ -43,8 +48,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index 562cbdd3ab..3e00a25857 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -33,10 +34,14 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
@@ -52,8 +57,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 1e6fdceca1..b6e21b2756 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -11,8 +12,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_SYS_MALLOC_F is not set
 CONFIG_FIT_VERBOSE=y
@@ -32,10 +33,14 @@ CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
@@ -53,8 +58,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 0086039e52..dba4526734 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -24,9 +25,13 @@ CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
@@ -47,8 +52,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index a7908e95b5..53b236ce9e 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS1088ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=2
@@ -25,16 +26,20 @@ CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fffffff
+CONFIG_CMD_DM=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MDIO is not set
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x80500000
+CONFIG_ENV_ADDR=0x20500000
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SCSI_AHCI=y
@@ -52,8 +57,13 @@ CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 8a792e449a..efbd5f75bd 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_SYS_TEXT_BASE=0x30100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_AHCI=y
@@ -43,6 +44,10 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index bc4c218c21..ad53671e6c 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_SYS_TEXT_BASE=0x30100000
 CONFIG_ENV_SIZE=0x2000
@@ -46,6 +47,10 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e840cbf0ef..590ca28000 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -9,8 +10,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
@@ -53,6 +54,10 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 861e652f7f..b8fbb43eb3 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_SYS_TEXT_BASE=0x20100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_AHCI=y
 CONFIG_FIT=y
@@ -45,6 +46,10 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 864e70d334..d493febf4b 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -11,8 +12,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
@@ -52,6 +53,10 @@ CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 # CONFIG_SPI_FLASH_BAR is not set
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4abfc64705..21739f0f9e 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_SYS_TEXT_BASE=0x30100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_AHCI=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index 0102e14ecb..dc4564b318 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_SYS_TEXT_BASE=0x30100000
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 448e0fe58d..a3fa5c6bbf 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -1,4 +1,5 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_SYS_TEXT_BASE=0x80400000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -9,8 +10,8 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_SPL=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x1800a000
+CONFIG_AHCI=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index e446a1120b..9d08eb7af7 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2081ARDB=y
 CONFIG_SYS_TEXT_BASE=0x20100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=3
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 9f49736b4f..ad17ef1703 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
@@ -21,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -33,10 +35,13 @@ CONFIG_MP=y
 # CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds"
+CONFIG_OF_LIST="fsl-ls2080a-qds-42-x"
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x80500000
+CONFIG_ENV_ADDR=0x20500000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
@@ -56,9 +61,18 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_PHYLIB=y
+CONFIG_PHYLIB_10G=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_TERANETICS=y
+CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_PHY_GIGE=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index ae4a6820ff..be073b6724 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_SYS_TEXT_BASE=0x20100000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=3
@@ -16,6 +17,7 @@ CONFIG_BOOTDELAY=10
 # CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -39,8 +41,11 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 1ad5f3b367..f2eb8d765a 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -1,9 +1,10 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_SYS_TEXT_BASE=0x20100000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x300000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_FSL_LS_PPA=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=3
@@ -19,6 +20,7 @@ CONFIG_BOOTARGS="console=ttyS1,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21
 # CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -30,6 +32,7 @@ CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x20300000
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
@@ -45,8 +48,11 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index c0d0a99c8a..a244af17bc 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=3
@@ -22,6 +23,7 @@ CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -31,7 +33,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_CACHE=y
 CONFIG_MP=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb"
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
@@ -54,8 +56,11 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index ccbaaf7a5c..b64e3dc1d2 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LS2080ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_QSPI_AHB_INIT=y
 CONFIG_NR_DRAM_BANKS=3
@@ -23,6 +24,7 @@ CONFIG_MISC_INIT_R=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -37,7 +39,8 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi"
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_ADDR=0x80500000
+CONFIG_ENV_ADDR=0x20500000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
@@ -62,8 +65,11 @@ CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
 CONFIG_MII=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig
index 716aca30b1..e2e0e8af71 100644
--- a/configs/lschlv2_defconfig
+++ b/configs/lschlv2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_LSXL=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" LS-CHLv2"
 CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig
index 2e760e5176..4de845da2c 100644
--- a/configs/lsxhl_defconfig
+++ b/configs/lsxhl_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_LSXL=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" LS-XHL"
 CONFIG_DISTRO_DEFAULTS=y
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 319f710382..51d5dc356e 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LX2160AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=3
@@ -20,6 +21,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -30,6 +32,8 @@ CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
+CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x  fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x"
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM=y
 CONFIG_SATA_CEVA=y
@@ -52,7 +56,12 @@ CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_E1000=y
+CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
@@ -74,4 +83,3 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_GIC_V3_ITS=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 0161dba9a7..716c089ba9 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LX2160AQDS=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
 CONFIG_NR_DRAM_BANKS=3
@@ -22,6 +23,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -32,6 +34,8 @@ CONFIG_MP=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_BOARD_FIXUP=y
 CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
+CONFIG_OF_LIST="fsl-lx2160a-qds-3-x-x fsl-lx2160a-qds-7-x-x fsl-lx2160a-qds-19-x-x fsl-lx2160a-qds-20-x-x fsl-lx2160a-qds-3-11-x  fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-7-11-x fsl-lx2160a-qds-19-11-x fsl-lx2160a-qds-20-11-x"
+CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_ADDR=0x20500000
@@ -56,7 +60,12 @@ CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_CORTINA=y
 CONFIG_PHY_REALTEK=y
 CONFIG_PHY_VITESSE=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_DM_MDIO_MUX=y
 CONFIG_E1000=y
+CONFIG_MDIO_MUX_I2CREG=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
@@ -74,4 +83,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_GIC_V3_ITS=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 10098ab5a9..23f814fb6c 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -1,10 +1,11 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LX2160ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
-CONFIG_NXP_ESBC=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_NXP_ESBC=y
 CONFIG_DM_GPIO=y
 CONFIG_EMC2305=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -21,6 +22,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -48,7 +50,10 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
@@ -69,4 +74,3 @@ CONFIG_RSA=y
 CONFIG_SPL_RSA=y
 CONFIG_RSA_SOFTWARE_EXP=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_GIC_V3_ITS=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index c8582aa40d..bc654cfee9 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
 CONFIG_TARGET_LX2160ARDB=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_TEXT_BASE=0x82000000
 CONFIG_SYS_MALLOC_F_LEN=0x6000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_EMC2305=y
 CONFIG_FSPI_AHB_EN_4BYTE=y
@@ -23,6 +24,7 @@ CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x2
 CONFIG_MISC_INIT_R=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -54,7 +56,10 @@ CONFIG_PHYLIB=y
 CONFIG_PHY_AQUANTIA=y
 CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
 CONFIG_E1000=y
+CONFIG_FSL_LS_MDIO=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
 CONFIG_DM_PCI_COMPAT=y
@@ -72,4 +77,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
-CONFIG_GIC_V3_ITS=y
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
new file mode 100644
index 0000000000..5f181a3868
--- /dev/null
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -0,0 +1,85 @@
+CONFIG_ARM=y
+CONFIG_GIC_V3_ITS=y
+CONFIG_TARGET_LX2160ARDB=y
+CONFIG_TFABOOT=y
+CONFIG_SYS_TEXT_BASE=0x82000000
+CONFIG_SYS_MALLOC_F_LEN=0x6000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x500000
+CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_DM_GPIO=y
+CONFIG_EMC2305=y
+CONFIG_FSPI_AHB_EN_4BYTE=y
+CONFIG_NR_DRAM_BANKS=3
+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
+CONFIG_AHCI=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_BOOTDELAY=10
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c0000 ramdisk_size=0x2000000 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf"
+# CONFIG_USE_BOOTCOMMAND is not set
+CONFIG_MISC_INIT_R=y
+CONFIG_CMD_GREPENV=y
+CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_EEPROM=y
+CONFIG_CMD_DM=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
+CONFIG_MP=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_BOARD_FIXUP=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_ENV_ADDR=0x20500000
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SATA_CEVA=y
+CONFIG_FSL_CAAM=y
+CONFIG_DM_I2C=y
+CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
+CONFIG_I2C_DEFAULT_BUS_NUMBER=0
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_FSL_ESDHC=y
+CONFIG_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_PHYLIB=y
+CONFIG_PHY_AQUANTIA=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_CORTINA=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_E1000=y
+CONFIG_FSL_LS_MDIO=y
+CONFIG_PCI=y
+CONFIG_DM_PCI=y
+CONFIG_DM_PCI_COMPAT=y
+CONFIG_PCIE_LAYERSCAPE=y
+CONFIG_PCIE_LAYERSCAPE_GEN4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_PCF2127=y
+CONFIG_DM_SCSI=y
+CONFIG_DM_SERIAL=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
+CONFIG_EFI_MM_COMM_TEE=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index b7c1e6fcd8..a65c21a139 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
-CONFIG_TARGET_M53MENLO=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_M53MENLO=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=3
diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig
index 4e1dbf1ec2..765a3ca2b6 100644
--- a/configs/marsboard_defconfig
+++ b/configs/marsboard_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024"
@@ -30,6 +30,7 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig
index 9cc9d66393..1bdb151d0f 100644
--- a/configs/maxbcm_defconfig
+++ b/configs/maxbcm_defconfig
@@ -7,22 +7,22 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MAXBCM=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40004030
+CONFIG_DEBUG_UART=y
 CONFIG_BOOTDELAY=3
 CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig
index a49b638393..2750747ece 100644
--- a/configs/mccmon6_nor_defconfig
+++ b/configs/mccmon6_nor_defconfig
@@ -3,11 +3,11 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_TARGET_MCCMON6=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig
index c2e42c491c..6c72a5183f 100644
--- a/configs/mccmon6_sd_defconfig
+++ b/configs/mccmon6_sd_defconfig
@@ -3,11 +3,11 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x20000
+CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_TARGET_MCCMON6=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_SECT_SIZE=0x20000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig
index bfca54d857..95c9dfa807 100644
--- a/configs/medcom-wide_defconfig
+++ b/configs/medcom-wide_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1FFE0000
diff --git a/configs/meerkat96_defconfig b/configs/meerkat96_defconfig
index 894ddc6c79..191288f836 100644
--- a/configs/meerkat96_defconfig
+++ b/configs/meerkat96_defconfig
@@ -19,6 +19,8 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PART=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index 30700a42e9..63496d2eb2 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x21F00000
 CONFIG_TARGET_MEESC=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4200
-CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_ENV_OFFSET=0x4200
+CONFIG_ENV_SECT_SIZE=0x210
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig
index 91ce67ef8a..127fd5d53e 100644
--- a/configs/minnowmax_defconfig
+++ b/configs/minnowmax_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig
index e3e205fd54..5332abff4e 100644
--- a/configs/miqi-rk3288_defconfig
+++ b/configs/miqi-rk3288_defconfig
@@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
@@ -70,12 +70,12 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 CONFIG_DISPLAY=y
diff --git a/configs/mixtile_loftq_defconfig b/configs/mixtile_loftq_defconfig
index 829491fa8e..e4b354933c 100644
--- a/configs/mixtile_loftq_defconfig
+++ b/configs/mixtile_loftq_defconfig
@@ -9,6 +9,7 @@ CONFIG_USB1_VBUS_PIN="PH24"
 CONFIG_USB2_VBUS_PIN=""
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-mixtile-loftq"
+CONFIG_PHY_REALTEK=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
 CONFIG_MII=y
diff --git a/configs/mpc8308_p1m_defconfig b/configs/mpc8308_p1m_defconfig
index 7dd8808b41..aa678d2035 100644
--- a/configs/mpc8308_p1m_defconfig
+++ b/configs/mpc8308_p1m_defconfig
@@ -117,7 +117,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/mscc_jr2_defconfig b/configs/mscc_jr2_defconfig
index a27eb4b950..9bd90ddc3d 100644
--- a/configs/mscc_jr2_defconfig
+++ b/configs/mscc_jr2_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x40000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x70100000
@@ -29,6 +29,8 @@ CONFIG_SYS_PROMPT="jr2 # "
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fc00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SPI=y
diff --git a/configs/mscc_luton_defconfig b/configs/mscc_luton_defconfig
index cd3f1bba52..a57d033d30 100644
--- a/configs/mscc_luton_defconfig
+++ b/configs/mscc_luton_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x40000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x70100000
@@ -31,6 +31,8 @@ CONFIG_SYS_PROMPT="luton # "
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SPI=y
diff --git a/configs/mscc_ocelot_defconfig b/configs/mscc_ocelot_defconfig
index 4aa0dd04fd..32f4148e75 100644
--- a/configs/mscc_ocelot_defconfig
+++ b/configs/mscc_ocelot_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x40000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0x70100000
@@ -28,6 +28,8 @@ CONFIG_SYS_PROMPT="ocelot # "
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fc00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
diff --git a/configs/mscc_serval_defconfig b/configs/mscc_serval_defconfig
index 606ea5be50..e35219e3ce 100644
--- a/configs/mscc_serval_defconfig
+++ b/configs/mscc_serval_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x40000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_ARCH_MSCC=y
@@ -26,6 +26,8 @@ CONFIG_SYS_PROMPT="serval # "
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SPI=y
diff --git a/configs/mscc_servalt_defconfig b/configs/mscc_servalt_defconfig
index c7829923eb..669d9f6c23 100644
--- a/configs/mscc_servalt_defconfig
+++ b/configs/mscc_servalt_defconfig
@@ -2,8 +2,8 @@ CONFIG_MIPS=y
 CONFIG_SYS_TEXT_BASE=0x40000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_ENV_OFFSET_REDUND=0x140000
 CONFIG_ARCH_MSCC=y
@@ -25,6 +25,8 @@ CONFIG_SYS_PROMPT="servalt # "
 CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x9fc00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SPI=y
diff --git a/configs/mt7622_rfb_defconfig b/configs/mt7622_rfb_defconfig
index 1ce6ebdfeb..1f3ccfe7cb 100644
--- a/configs/mt7622_rfb_defconfig
+++ b/configs/mt7622_rfb_defconfig
@@ -51,6 +51,5 @@ CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_TIMER=y
 CONFIG_MTK_TIMER=y
 CONFIG_WDT_MTK=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_HEXDUMP=y
diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig
index 07ddade76a..6b9fbd7e22 100644
--- a/configs/mt7623n_bpir2_defconfig
+++ b/configs/mt7623n_bpir2_defconfig
@@ -7,13 +7,13 @@ CONFIG_ENV_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x100000
 CONFIG_TARGET_MT7623=y
 CONFIG_NR_DRAM_BANKS=1
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_BOOTDELAY=3
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_DEFAULT_FDT_FILE="mt7623n-bananapi-bpi-r2"
 # CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTMENU=y
 # CONFIG_CMD_ELF is not set
@@ -21,13 +21,9 @@ CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
 CONFIG_CMD_READ=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
-CONFIG_CMD_PING=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
 CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -56,4 +52,3 @@ CONFIG_TIMER=y
 CONFIG_MTK_TIMER=y
 CONFIG_WDT_MTK=y
 CONFIG_LZMA=y
-# CONFIG_EFI_LOADER is not set
diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig
index 3efff8fee8..42d5dc552c 100644
--- a/configs/mt7629_rfb_defconfig
+++ b/configs/mt7629_rfb_defconfig
@@ -24,13 +24,17 @@ CONFIG_SYS_PROMPT="U-Boot> "
 CONFIG_CMD_BOOTMENU=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
+CONFIG_CMD_BIND=y
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_PING=y
-# CONFIG_PARTITIONS is not set
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_LOG=y
 CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb"
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-parents"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -40,6 +44,7 @@ CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
+CONFIG_BLK=y
 CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 # CONFIG_MMC is not set
@@ -54,11 +59,15 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_MEDIATEK_ETH=y
+CONFIG_PHY=y
+CONFIG_PHY_MTK_TPHY=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
 CONFIG_PINCTRL_MT7629=y
 CONFIG_POWER_DOMAIN=y
 CONFIG_MTK_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_DM_SERIAL=y
@@ -69,6 +78,12 @@ CONFIG_MTK_SNFI_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_MTK=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_WDT_MTK=y
 CONFIG_LZMA=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/mt8512_bm1_emmc_defconfig b/configs/mt8512_bm1_emmc_defconfig
index a3dc962460..e7659d7085 100644
--- a/configs/mt8512_bm1_emmc_defconfig
+++ b/configs/mt8512_bm1_emmc_defconfig
@@ -31,5 +31,4 @@ CONFIG_TIMER=y
 CONFIG_MTK_TIMER=y
 CONFIG_WDT=y
 CONFIG_WDT_MTK=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
diff --git a/configs/mt8518_ap1_emmc_defconfig b/configs/mt8518_ap1_emmc_defconfig
index 943c1b2577..a449804e04 100644
--- a/configs/mt8518_ap1_emmc_defconfig
+++ b/configs/mt8518_ap1_emmc_defconfig
@@ -45,5 +45,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0bb4
 CONFIG_USB_GADGET_PRODUCT_NUM=0x0c01
 CONFIG_WDT=y
 CONFIG_WDT_MTK=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig
index e5284fad02..144abb8989 100644
--- a/configs/mvebu_db-88f3720_defconfig
+++ b/configs/mvebu_db-88f3720_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_37XX=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xd0012000
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index 6fd2613d21..fb02f61b56 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_8K=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0xf0512000
 CONFIG_DEBUG_UART_CLOCK=200000000
diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig
index 8e6c08b23d..01b6120149 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_37XX=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xd0012000
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index 9b4cb14e7e..0975ed386f 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_8K=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0xf0512000
diff --git a/configs/mx25pdk_defconfig b/configs/mx25pdk_defconfig
index f752b720d4..aa08e100a2 100644
--- a/configs/mx25pdk_defconfig
+++ b/configs/mx25pdk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX25=y
 CONFIG_SYS_TEXT_BASE=0x81200000
-CONFIG_TARGET_MX25PDK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX25PDK=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg"
 CONFIG_DEFAULT_FDT_FILE="imx25-pdk.dtb"
diff --git a/configs/mx31pdk_defconfig b/configs/mx31pdk_defconfig
index 595a1be237..c53c23a363 100644
--- a/configs/mx31pdk_defconfig
+++ b/configs/mx31pdk_defconfig
@@ -5,9 +5,9 @@ CONFIG_ARCH_MX31=y
 CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds"
 CONFIG_SYS_TEXT_BASE=0x87e00000
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX31PDK=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_TARGET_MX31PDK=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
diff --git a/configs/mx51evk_defconfig b/configs/mx51evk_defconfig
index a2af8ae7b2..dbc4d85a22 100644
--- a/configs/mx51evk_defconfig
+++ b/configs/mx51evk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x97800000
-CONFIG_TARGET_MX51EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX51EVK=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx51evk/imximage.cfg"
diff --git a/configs/mx53ard_defconfig b/configs/mx53ard_defconfig
index f0ecb4dcd3..e021df284c 100644
--- a/configs/mx53ard_defconfig
+++ b/configs/mx53ard_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_MX53ARD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX53ARD=y
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg"
diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig
index 4e03532942..5dc48c49b5 100644
--- a/configs/mx53cx9020_defconfig
+++ b/configs/mx53cx9020_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_MX53CX9020=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX53CX9020=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_CMD_BMODE is not set
diff --git a/configs/mx53evk_defconfig b/configs/mx53evk_defconfig
index e520cbab95..9063f72fcf 100644
--- a/configs/mx53evk_defconfig
+++ b/configs/mx53evk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_MX53EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX53EVK=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53evk/imximage.cfg"
 CONFIG_HUSH_PARSER=y
diff --git a/configs/mx53loco_defconfig b/configs/mx53loco_defconfig
index 277b528f2a..e5d842a75d 100644
--- a/configs/mx53loco_defconfig
+++ b/configs/mx53loco_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_MX53LOCO=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX53LOCO=y
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53loco/imximage.cfg"
diff --git a/configs/mx53ppd_defconfig b/configs/mx53ppd_defconfig
index 29c918740f..0b6564ce5c 100644
--- a/configs/mx53ppd_defconfig
+++ b/configs/mx53ppd_defconfig
@@ -2,9 +2,9 @@ CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_TARGET_MX53PPD=y
 CONFIG_ENV_SIZE=0x2800
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX53PPD=y
 CONFIG_DM_GPIO=y
 CONFIG_BOOTCOUNT_BOOTLIMIT=10
 CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/mx53smd_defconfig b/configs/mx53smd_defconfig
index 8cf6c80e14..fd13eea023 100644
--- a/configs/mx53smd_defconfig
+++ b/configs/mx53smd_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_MX53SMD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX53SMD=y
 CONFIG_NR_DRAM_BANKS=2
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
diff --git a/configs/mx6cuboxi_defconfig b/configs/mx6cuboxi_defconfig
index bee7d280f0..df7e4611a0 100644
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6CUBOXI=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFE000
+CONFIG_TARGET_MX6CUBOXI=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -15,8 +15,8 @@ CONFIG_SPL=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 # CONFIG_CMD_BMODE is not set
 CONFIG_CMD_HDMIDETECT=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg"
@@ -49,6 +49,7 @@ CONFIG_DWC_AHSATA=y
 CONFIG_DM_MMC=y
 CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6dlarm2_defconfig b/configs/mx6dlarm2_defconfig
index 4afd623573..e826282ad8 100644
--- a/configs/mx6dlarm2_defconfig
+++ b/configs/mx6dlarm2_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_MX6QARM2=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX6QARM2=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,DDR_MB=2048"
diff --git a/configs/mx6dlarm2_lpddr2_defconfig b/configs/mx6dlarm2_lpddr2_defconfig
index bbb6948b3f..fa8740390f 100644
--- a/configs/mx6dlarm2_lpddr2_defconfig
+++ b/configs/mx6dlarm2_lpddr2_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_MX6QARM2=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX6QARM2=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage_mx6dl.cfg,MX6DL,MX6DL_LPDDR2,DDR_MB=512"
diff --git a/configs/mx6memcal_defconfig b/configs/mx6memcal_defconfig
index 1b0158b583..8b5e0ff9b1 100644
--- a/configs/mx6memcal_defconfig
+++ b/configs/mx6memcal_defconfig
@@ -3,9 +3,9 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2000
 CONFIG_MX6_DDRCAL=y
 CONFIG_TARGET_MX6MEMCAL=y
-CONFIG_ENV_SIZE=0x2000
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -31,6 +31,8 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ENV_EXISTS is not set
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x20000000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_CACHE=y
diff --git a/configs/mx6qarm2_defconfig b/configs/mx6qarm2_defconfig
index a26a8b0913..93cf05bfa8 100644
--- a/configs/mx6qarm2_defconfig
+++ b/configs/mx6qarm2_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_MX6QARM2=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX6QARM2=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,DDR_MB=2048"
diff --git a/configs/mx6qarm2_lpddr2_defconfig b/configs/mx6qarm2_lpddr2_defconfig
index 169f19babb..86f122454d 100644
--- a/configs/mx6qarm2_lpddr2_defconfig
+++ b/configs/mx6qarm2_lpddr2_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_MX6QARM2=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_MX6QARM2=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qarm2/imximage.cfg,MX6Q,MX6DQ_LPDDR2,DDR_MB=512"
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index a85bfe0769..ea338c1b53 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -20,6 +20,8 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig
index 06835f203a..5304050ce3 100644
--- a/configs/mx6sabreauto_defconfig
+++ b/configs/mx6sabreauto_defconfig
@@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_TARGET_MX6SABREAUTO=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6SABREAUTO=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -74,6 +74,11 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_DM_MDIO=y
+CONFIG_FEC_MXC=y
+CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
@@ -97,8 +102,3 @@ CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP32 is not set
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_IPUV3=y
-CONFIG_FEC_MXC=y
-CONFIG_PHY_ATHEROS=y
-CONFIG_DM_ETH=y
-CONFIG_DM_MDIO=y
-CONFIG_RGMII=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index f218408832..2a517cc1f3 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -5,9 +5,9 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_TARGET_MX6SABRESD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6SABRESD=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig
index 163cb1a7ae..3436076894 100644
--- a/configs/mx6slevk_defconfig
+++ b/configs/mx6slevk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SLEVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_MX6SLEVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
@@ -43,6 +43,9 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
+CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
@@ -61,6 +64,3 @@ CONFIG_DM_USB=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-CONFIG_DM_ETH=y
-CONFIG_FEC_MXC=y
-CONFIG_PHY_SMSC=y
diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig
index 7d46eec8d7..4d348df691 100644
--- a/configs/mx6slevk_spinor_defconfig
+++ b/configs/mx6slevk_spinor_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SLEVK=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_MX6SLEVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig
index c5be9573f4..3a0ae92bf2 100644
--- a/configs/mx6slevk_spl_defconfig
+++ b/configs/mx6slevk_spl_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6SLEVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_MX6SLEVK=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
diff --git a/configs/mx6sllevk_defconfig b/configs/mx6sllevk_defconfig
index 537dd3d1b5..48cace5101 100644
--- a/configs/mx6sllevk_defconfig
+++ b/configs/mx6sllevk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SLLEVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6SLLEVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
@@ -14,6 +14,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/mx6sllevk_plugin_defconfig b/configs/mx6sllevk_plugin_defconfig
index 36f73f7131..a32b19851d 100644
--- a/configs/mx6sllevk_plugin_defconfig
+++ b/configs/mx6sllevk_plugin_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SLLEVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6SLLEVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_USE_IMXIMG_PLUGIN=y
@@ -15,6 +15,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig
index 2c5f519d0c..be20be2ad6 100644
--- a/configs/mx6sxsabreauto_defconfig
+++ b/configs/mx6sxsabreauto_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SXSABREAUTO=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_MX6SXSABREAUTO=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
@@ -45,6 +45,7 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 7cf672948d..745a8becea 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6SXSABRESD=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xE0000
+CONFIG_TARGET_MX6SXSABRESD=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
@@ -49,6 +49,7 @@ CONFIG_SF_DEFAULT_SPEED=40000000
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
diff --git a/configs/mx6ul_14x14_evk_defconfig b/configs/mx6ul_14x14_evk_defconfig
index 2a7f5fddf4..94b36d2615 100644
--- a/configs/mx6ul_14x14_evk_defconfig
+++ b/configs/mx6ul_14x14_evk_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_14X14_EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_MX6UL_14X14_EVK=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -26,6 +26,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -56,8 +58,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
-CONFIG_FEC_MXC=y
 CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6ul_9x9_evk_defconfig b/configs/mx6ul_9x9_evk_defconfig
index c02f71f566..9bb11f580e 100644
--- a/configs/mx6ul_9x9_evk_defconfig
+++ b/configs/mx6ul_9x9_evk_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_MX6UL_9X9_EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_MX6UL_9X9_EVK=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -26,6 +26,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig
index c16ecfab49..344e03a8de 100644
--- a/configs/mx6ull_14x14_evk_defconfig
+++ b/configs/mx6ull_14x14_evk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
@@ -13,6 +13,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -41,8 +43,8 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
-CONFIG_FEC_MXC=y
 CONFIG_DM_ETH=y
+CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig
index ddfc4763dd..2811d868ac 100644
--- a/configs/mx6ull_14x14_evk_plugin_defconfig
+++ b/configs/mx6ull_14x14_evk_plugin_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_USE_IMXIMG_PLUGIN=y
@@ -14,6 +14,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/mx6ulz_14x14_evk_defconfig b/configs/mx6ulz_14x14_evk_defconfig
index 92d73a85c8..37b518a763 100644
--- a/configs/mx6ulz_14x14_evk_defconfig
+++ b/configs/mx6ulz_14x14_evk_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_MX6ULL_14X14_EVK=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6ullevk/imximage.cfg"
@@ -13,11 +13,11 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_PING=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
diff --git a/configs/mx7dsabresd_defconfig b/configs/mx7dsabresd_defconfig
index e948091a92..df87e2d171 100644
--- a/configs/mx7dsabresd_defconfig
+++ b/configs/mx7dsabresd_defconfig
@@ -24,6 +24,8 @@ CONFIG_BOUNCE_BUFFER=y
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/mx7dsabresd_qspi_defconfig b/configs/mx7dsabresd_qspi_defconfig
index 23a1c45837..3a07b704b5 100644
--- a/configs/mx7dsabresd_qspi_defconfig
+++ b/configs/mx7dsabresd_qspi_defconfig
@@ -24,6 +24,8 @@ CONFIG_BOUNCE_BUFFER=y
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/mx7ulp_evk_defconfig b/configs/mx7ulp_evk_defconfig
index 62d37b3369..680445bea7 100644
--- a/configs/mx7ulp_evk_defconfig
+++ b/configs/mx7ulp_evk_defconfig
@@ -12,6 +12,8 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x60000000
+CONFIG_SYS_MEMTEST_END=0x9e000000
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/mx7ulp_evk_plugin_defconfig b/configs/mx7ulp_evk_plugin_defconfig
index 8d24fe7ac1..b70c36c7c9 100644
--- a/configs/mx7ulp_evk_plugin_defconfig
+++ b/configs/mx7ulp_evk_plugin_defconfig
@@ -10,6 +10,8 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx7ulp_evk/imximage.cfg"
 CONFIG_BOUNCE_BUFFER=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x60000000
+CONFIG_SYS_MEMTEST_END=0x9e000000
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig
index 607a00dbf7..6fef7e61b9 100644
--- a/configs/nanopc-t4-rk3399_defconfig
+++ b/configs/nanopc-t4-rk3399_defconfig
@@ -17,6 +17,7 @@ CONFIG_TPL=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
@@ -34,10 +35,13 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME=y
+CONFIG_PCI=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
@@ -46,18 +50,19 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_GADGET=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
 CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig
new file mode 100644
index 0000000000..4e559edd94
--- /dev/null
+++ b/configs/nanopi-m4-2gb-rk3399_defconfig
@@ -0,0 +1,61 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_EVB_RK3399=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig
index 3fcb7ac2d7..ab7c2d1714 100644
--- a/configs/nanopi-m4-rk3399_defconfig
+++ b/configs/nanopi-m4-rk3399_defconfig
@@ -46,18 +46,16 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
 CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig
index b9ea535e43..45cd56faae 100644
--- a/configs/nanopi-neo4-rk3399_defconfig
+++ b/configs/nanopi-neo4-rk3399_defconfig
@@ -46,18 +46,16 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
 CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig
index eb7effe98f..918fd26b05 100644
--- a/configs/nas220_defconfig
+++ b/configs/nas220_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NAS220=y
 CONFIG_ENV_SIZE=0x10000
diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig
index d334db0ae0..1389d30900 100644
--- a/configs/net2big_v2_defconfig
+++ b/configs/net2big_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NET2BIG_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" 2Big v2"
 CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2"
diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig
index cb00d483ce..c744d2c58e 100644
--- a/configs/netspace_lite_v2_defconfig
+++ b/configs/netspace_lite_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" NS v2 Lite"
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2"
diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig
index 0317cb9555..8602729fcb 100644
--- a/configs/netspace_max_v2_defconfig
+++ b/configs/netspace_max_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" NS Max v2"
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2"
diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig
index a87aaddb87..ba9301de4d 100644
--- a/configs/netspace_mini_v2_defconfig
+++ b/configs/netspace_mini_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" NS v2 Mini"
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2"
diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig
index e4e08a2e85..6ba1ef423e 100644
--- a/configs/netspace_v2_defconfig
+++ b/configs/netspace_v2_defconfig
@@ -1,12 +1,12 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NETSPACE_V2=y
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x70000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_IDENT_STRING=" NS v2"
 CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2"
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index d10162578a..f6b0655f0f 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index dd07ce0d58..0de09d4a09 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index 91b85ea708..0757aa01c6 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 009382fec0..d9e0760ead 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index c0f4261930..f5396b6cb7 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 1dc9d5377a..a9aa8ad59b 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_NITROGEN6X=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x2000
+CONFIG_TARGET_NITROGEN6X=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_CMD_HDMIDETECT=y
@@ -22,6 +22,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10010000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/nokia_rx51_defconfig b/configs/nokia_rx51_defconfig
index f9e5b0e123..61921e5688 100644
--- a/configs/nokia_rx51_defconfig
+++ b/configs/nokia_rx51_defconfig
@@ -4,29 +4,47 @@ CONFIG_ARCH_OMAP2PLUS=y
 CONFIG_SYS_TEXT_BASE=0x80008000
 CONFIG_TARGET_NOKIA_RX51=y
 CONFIG_NR_DRAM_BANKS=2
+# CONFIG_FIT is not set
 CONFIG_BOOTDELAY=30
 CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="setenv mmcnum 1; setenv mmcpart 1;setenv mmcscriptfile bootmenu.scr;if run switchmmc; then setenv mmcdone true;setenv mmctype fat;if run scriptload; then true; else setenv mmctype ext2;if run scriptload; then true; else setenv mmctype ext4;if run scriptload; then true; else setenv mmcdone false;fi;fi;fi;if ${mmcdone}; then run scriptboot;fi;fi;if run slide; then true; else setenv bootmenu_delay 0;setenv bootdelay 0;fi"
-# CONFIG_CONSOLE_MUX is not set
-CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+CONFIG_PREBOOT="run preboot"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Nokia RX-51 # "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_MENU_SHOW=y
+# CONFIG_CMD_BDI is not set
+# CONFIG_CMD_BOOTD is not set
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
 CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+# CONFIG_CMD_EDITENV is not set
 # CONFIG_CMD_SAVEENV is not set
+# CONFIG_CMD_ENV_EXISTS is not set
+# CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_ONENAND=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
+CONFIG_MTDIDS_DEFAULT="onenand0=onenand"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=onenand:128k(bootloader)ro,384k(config),256k(log),2m(kernel),2m(initfs),-(rootfs)"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 # CONFIG_NET is not set
 CONFIG_TWL4030_LED=y
+# CONFIG_MMC_HW_PARTITIONING is not set
 CONFIG_MMC_OMAP_HS=y
+CONFIG_MTD=y
 CONFIG_CONS_INDEX=3
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
@@ -39,3 +57,4 @@ CONFIG_TWL4030_USB=y
 CONFIG_VIDEO=y
 CONFIG_CFB_CONSOLE_ANSI=y
 # CONFIG_VGA_AS_SINGLE_DEVICE is not set
+# CONFIG_GZIP is not set
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 87adc1eb4c..27bc0fa1a4 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_MX6_DDRCAL=y
-CONFIG_TARGET_KOSAGI_NOVENA=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_KOSAGI_NOVENA=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -16,8 +16,8 @@ CONFIG_ENV_OFFSET_REDUND=0x84000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_CMD_HDMIDETECT=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/spl_sd.cfg,MX6Q"
diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
index 6a1073c30b..7a864bddf3 100644
--- a/configs/nsa310s_defconfig
+++ b/configs/nsa310s_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_NSA310S=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig
index 8c08ee6233..8abb1a432a 100644
--- a/configs/nyan-big_defconfig
+++ b/configs/nyan-big_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x81000100
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -9,8 +9,8 @@ CONFIG_DEBUG_UART_BASE=0x70006000
 CONFIG_DEBUG_UART_CLOCK=408000000
 CONFIG_TEGRA124=y
 CONFIG_TARGET_NYAN_BIG=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x80108000
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_OF_SYSTEM_SETUP=y
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 39279b40db..3fb6f2d089 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_REGULATOR=y
 CONFIG_OF_CONTROL=y
@@ -32,14 +33,20 @@ CONFIG_MMC_MESON_GX=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_MESON_GXBB_USB_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MESON_GXBB=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_MESON=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 CONFIG_SMBIOS_MANUFACTURER="Hardkernel Co., Ltd."
diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig
index 2e982e1b53..1a2183ce19 100644
--- a/configs/odroid-xu3_defconfig
+++ b/configs/odroid-xu3_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_ADC=y
 CONFIG_ADC_EXYNOS=y
 CONFIG_DFU_MMC=y
+CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_MMC_DW=y
 CONFIG_MTD=y
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
index e4392e477e..345cc3b940 100644
--- a/configs/odroid_defconfig
+++ b/configs/odroid_defconfig
@@ -40,6 +40,7 @@ CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DFU_MMC=y
+CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_SYS_I2C_S3C24X0=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_SDHCI=y
diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig
index bcf4efc621..a460ed559e 100644
--- a/configs/omap35_logic_defconfig
+++ b/configs/omap35_logic_defconfig
@@ -56,8 +56,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
 CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
 CONFIG_SMC911X_32_BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig
index 51c5d449e0..f6db27f02e 100644
--- a/configs/omap35_logic_somlv_defconfig
+++ b/configs/omap35_logic_somlv_defconfig
@@ -60,8 +60,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
 CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
 CONFIG_SMC911X_32_BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig
index 15925fb7db..918532a66c 100644
--- a/configs/omap3_logic_defconfig
+++ b/configs/omap3_logic_defconfig
@@ -55,8 +55,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
 CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
 CONFIG_SMC911X_32_BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig
index ea8fc37f12..4a63437653 100644
--- a/configs/omap3_logic_somlv_defconfig
+++ b/configs/omap3_logic_somlv_defconfig
@@ -62,8 +62,8 @@ CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
 CONFIG_SYS_NAND_U_BOOT_OFFS=0x80000
 CONFIG_SPL_NAND_SIMPLE=y
+CONFIG_DM_ETH=y
 CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x08000000
 CONFIG_SMC911X_32_BIT=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_SINGLE=y
diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig
index cb4e8477e1..3ac6319d2d 100644
--- a/configs/omap4_panda_defconfig
+++ b/configs/omap4_panda_defconfig
@@ -24,7 +24,6 @@ CONFIG_CMD_USB=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_ENV_IS_IN_FAT=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig
index f575bf24e7..2551f284af 100644
--- a/configs/openrd_base_defconfig
+++ b/configs/openrd_base_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_OPENRD=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig
index 42f3786918..c0bf3be373 100644
--- a/configs/openrd_client_defconfig
+++ b/configs/openrd_client_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_OPENRD=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig
index 47189da080..ab97d66e89 100644
--- a/configs/openrd_ultimate_defconfig
+++ b/configs/openrd_ultimate_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_OPENRD=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/opos6uldev_defconfig b/configs/opos6uldev_defconfig
index 8dee24c2cc..632ca1c245 100644
--- a/configs/opos6uldev_defconfig
+++ b/configs/opos6uldev_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_OPOS6ULDEV=y
 CONFIG_ENV_SIZE=0x2800
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_OPOS6ULDEV=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400
diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig
index 2b4ecb6405..45b9f2d41c 100644
--- a/configs/ot1200_defconfig
+++ b/configs/ot1200_defconfig
@@ -1,10 +1,10 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_OT1200=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_OT1200=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg,MX6Q"
 CONFIG_BOOTDELAY=3
@@ -45,6 +45,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig
index 0c4d9d9479..9472d29408 100644
--- a/configs/ot1200_spl_defconfig
+++ b/configs/ot1200_spl_defconfig
@@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_OT1200=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_OT1200=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
@@ -23,7 +24,6 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -56,6 +56,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_SST=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig
index 70817194c3..d8d28ed6ea 100644
--- a/configs/p2371-0000_defconfig
+++ b/configs/p2371-0000_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2371-0000"
@@ -44,4 +45,3 @@ CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index c70217c82d..ec4c5909ac 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -21,6 +21,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_LIVE=y
@@ -52,4 +53,3 @@ CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index 43c24b8330..95188a142a 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p2571"
@@ -44,4 +45,3 @@ CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/p2771-0000-000_defconfig b/configs/p2771-0000-000_defconfig
index 8bf84193e6..befa46a4cd 100644
--- a/configs/p2771-0000-000_defconfig
+++ b/configs/p2771-0000-000_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -18,6 +18,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-000"
@@ -36,5 +37,3 @@ CONFIG_TEGRA186_POWER_DOMAIN=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/p2771-0000-500_defconfig b/configs/p2771-0000-500_defconfig
index 1f40333b0e..71cde4e41d 100644
--- a/configs/p2771-0000-500_defconfig
+++ b/configs/p2771-0000-500_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
@@ -18,6 +18,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra186-p2771-0000-500"
@@ -36,5 +37,3 @@ CONFIG_TEGRA186_POWER_DOMAIN=y
 CONFIG_SYS_NS16550=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_BOOTP_PREFER_SERVERIP=y
diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
index f78e1d3867..2bf8f97ca2 100644
--- a/configs/p3450-0000_defconfig
+++ b/configs/p3450-0000_defconfig
@@ -1,39 +1,41 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80080000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xFFFFE000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_NR_DRAM_BANKS=2
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P3450_0000=y
-CONFIG_NR_DRAM_BANKS=2
-CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # "
 # CONFIG_CMD_IMI is not set
 CONFIG_CMD_DFU=y
-# CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_PCI=y
-CONFIG_CMD_SF=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_BOOTP_PREFER_SERVERIP=y
 # CONFIG_CMD_NFS is not set
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_OF_LIVE=y
 CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000"
+# CONFIG_ENV_IS_IN_MMC is not set
+CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_I2C_TEGRA=y
-CONFIG_SPI_FLASH=y
-CONFIG_SPI_FLASH_MACRONIX=y
-CONFIG_SPI_FLASH_USE_4K_SECTORS=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=24000000
+CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_RTL8169=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
@@ -54,11 +56,3 @@ CONFIG_CI_UDC=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
-# CONFIG_ENV_IS_IN_MMC is not set
-CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
-CONFIG_ENV_OFFSET=0xFFFFE000
-CONFIG_BOOTP_PREFER_SERVERIP=y
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_DISABLE_SDMMC1_EARLY=y
diff --git a/configs/parrot_r16_defconfig b/configs/parrot_r16_defconfig
index 2c2edbc2b6..4c9b248ec0 100644
--- a/configs/parrot_r16_defconfig
+++ b/configs/parrot_r16_defconfig
@@ -11,7 +11,6 @@ CONFIG_USB0_ID_DET="PD10"
 CONFIG_USB1_VBUS_PIN="PD12"
 CONFIG_AXP_GPIO=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
-# CONFIG_SPL_PARTITION_UUIDS is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-parrot"
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_CONS_INDEX=5
diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig
index 8536c64fc0..4330d141a3 100644
--- a/configs/paz00_defconfig
+++ b/configs/paz00_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
index cbe6594837..ea7a0769f2 100644
--- a/configs/pcm051_rev1_defconfig
+++ b/configs/pcm051_rev1_defconfig
@@ -45,6 +45,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
index 744c5827d1..43e64630ab 100644
--- a/configs/pcm051_rev3_defconfig
+++ b/configs/pcm051_rev3_defconfig
@@ -45,6 +45,7 @@ CONFIG_MMC_OMAP_HS=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=24000000
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/pcm052_defconfig b/configs/pcm052_defconfig
index 6192894813..4f77026212 100644
--- a/configs/pcm052_defconfig
+++ b/configs/pcm052_defconfig
@@ -14,6 +14,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80010000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/pcm058_defconfig b/configs/pcm058_defconfig
index 87cac5c3fd..0dfbc172c2 100644
--- a/configs/pcm058_defconfig
+++ b/configs/pcm058_defconfig
@@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PCM058=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_PCM058=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -30,7 +31,6 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig
index 6efca9b08e..b0128a6285 100644
--- a/configs/peach-pi_defconfig
+++ b/configs/peach-pi_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_PEACH_PI=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_NR_DRAM_BANKS=7
 CONFIG_SPL=y
 CONFIG_IDENT_STRING=" for Peach-Pi"
diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig
index 216ec90efa..ea4155dcf8 100644
--- a/configs/peach-pit_defconfig
+++ b/configs/peach-pit_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_PEACH_PIT=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_SPL=y
 CONFIG_IDENT_STRING=" for Peach-Pit"
 CONFIG_SPL_TEXT_BASE=0x02024410
diff --git a/configs/pengwyn_defconfig b/configs/pengwyn_defconfig
index eadab3e860..3d0fcf3ea0 100644
--- a/configs/pengwyn_defconfig
+++ b/configs/pengwyn_defconfig
@@ -52,6 +52,8 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/pfla02_defconfig b/configs/pfla02_defconfig
index 50fcbb30ec..5e5bbb05bd 100644
--- a/configs/pfla02_defconfig
+++ b/configs/pfla02_defconfig
@@ -4,10 +4,11 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PFLA02=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_PFLA02=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -30,7 +31,6 @@ CONFIG_SPL_DMA=y
 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig
index ef19bb64aa..864e2ff59b 100644
--- a/configs/phycore-am335x-r2-wega_defconfig
+++ b/configs/phycore-am335x-r2-wega_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
+CONFIG_SPL_PAYLOAD="u-boot.img"
 # CONFIG_FIT is not set
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -22,7 +23,6 @@ CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
-CONFIG_SPL_PAYLOAD="u-boot.img"
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -49,7 +49,6 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_ENV_IS_IN_NAND=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig
index 8c1bd20dec..51b3e41c9c 100644
--- a/configs/phycore-rk3288_defconfig
+++ b/configs/phycore-rk3288_defconfig
@@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
diff --git a/configs/phycore_pcl063_defconfig b/configs/phycore_pcl063_defconfig
index 8d7d4b9528..15e4fbb7af 100644
--- a/configs/phycore_pcl063_defconfig
+++ b/configs/phycore_pcl063_defconfig
@@ -3,8 +3,8 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PCL063=y
 CONFIG_ENV_SIZE=0x4000
+CONFIG_TARGET_PCL063=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=8
@@ -18,6 +18,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 CONFIG_CMD_DM=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/phycore_pcl063_ull_defconfig b/configs/phycore_pcl063_ull_defconfig
index 8b50d269b4..cb9e4e38b1 100644
--- a/configs/phycore_pcl063_ull_defconfig
+++ b/configs/phycore_pcl063_ull_defconfig
@@ -3,8 +3,8 @@ CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PCL063_ULL=y
 CONFIG_ENV_SIZE=0x4000
+CONFIG_TARGET_PCL063_ULL=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=8
diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig
index f98e6a23af..b2ed187931 100644
--- a/configs/pic32mzdask_defconfig
+++ b/configs/pic32mzdask_defconfig
@@ -13,6 +13,8 @@ CONFIG_SYS_PROMPT="dask # "
 CONFIG_LOOPW=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x88000000
+CONFIG_SYS_MEMTEST_END=0x88080000
 CONFIG_CMD_CLK=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
@@ -31,6 +33,7 @@ CONFIG_MMC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_PIC32=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_MII=y
 CONFIG_PIC32_ETH=y
diff --git a/configs/pico-dwarf-imx6ul_defconfig b/configs/pico-dwarf-imx6ul_defconfig
index f914418c05..66fad2a823 100644
--- a/configs/pico-dwarf-imx6ul_defconfig
+++ b/configs/pico-dwarf-imx6ul_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -25,6 +25,8 @@ CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/pico-hobbit-imx6ul_defconfig b/configs/pico-hobbit-imx6ul_defconfig
index d18341f6a7..a33555e04a 100644
--- a/configs/pico-hobbit-imx6ul_defconfig
+++ b/configs/pico-hobbit-imx6ul_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -26,6 +26,8 @@ CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index fe73ac585e..0bc7e4fc95 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PICO_IMX6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_PICO_IMX6=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -39,6 +39,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_USB_SDP=y
 CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_MDIO is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
 # CONFIG_SPL_DOS_PARTITION is not set
@@ -61,6 +62,8 @@ CONFIG_FASTBOOT_FLASH=y
 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
 CONFIG_DM_MMC=y
 CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_USB=y
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index 3fd1012d4b..8113bd0074 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -28,6 +28,8 @@ CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig
index 2836edc64b..ea9caa75cf 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -27,6 +27,8 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_SPL=y
 CONFIG_CMD_SPL_WRITE_SIZE=0x20000
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
new file mode 100644
index 0000000000..470fd3a355
--- /dev/null
+++ b/configs/pico-imx8mq_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x40200000
+CONFIG_ENV_SIZE=0x1000
+CONFIG_ENV_OFFSET=0x400000
+CONFIG_DM_GPIO=y
+CONFIG_TARGET_PICO_IMX8MQ=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_CSF_SIZE=0x2000
+CONFIG_SPL_TEXT_BASE=0x7E1000
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/mach-imx/imx8m/imximage.cfg"
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_HUSH_PARSER=y
+# CONFIG_BOOTM_NETBSD is not set
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SAVED_DRAM_TIMING_BASE=0x40000000
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MXC=y
+CONFIG_DM_MMC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_FSL_USDHC=y
+CONFIG_DM_ETH=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_IMX8M_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_DM_THERMAL=y
diff --git a/configs/pico-pi-imx6ul_defconfig b/configs/pico-pi-imx6ul_defconfig
index 951d9d3304..046acfc455 100644
--- a/configs/pico-pi-imx6ul_defconfig
+++ b/configs/pico-pi-imx6ul_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_PICO_IMX6UL=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -26,6 +26,8 @@ CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_USB_SDP_SUPPORT=y
 CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
diff --git a/configs/pine_h64_defconfig b/configs/pine_h64_defconfig
index cb5e624a3d..87871fd19f 100644
--- a/configs/pine_h64_defconfig
+++ b/configs/pine_h64_defconfig
@@ -6,9 +6,10 @@ CONFIG_SUNXI_DRAM_H6_LPDDR3=y
 CONFIG_MMC0_CD_PIN="PF6"
 CONFIG_MMC_SUNXI_SLOT_EXTRA=2
 CONFIG_USB3_VBUS_PIN="PL5"
+CONFIG_SPL_SPI_SUNXI=y
 # CONFIG_PSCI_RESET is not set
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_DEFAULT_DEVICE_TREE="sun50i-h6-pine-h64"
+CONFIG_SUN8I_EMAC=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_OHCI_HCD=y
-CONFIG_SPL_SPI_SUNXI=y
diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig
new file mode 100644
index 0000000000..0e9f0ec250
--- /dev/null
+++ b/configs/pinebook-pro-rk3399_defconfig
@@ -0,0 +1,84 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
+CONFIG_MISC_INIT_R=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_SF=y
+CONFIG_CMD_TIME=y
+CONFIG_CMD_USB=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_BOOTDELAY=3
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_SPI_FLASH=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_DM_PMIC_FAN53555=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+# CONFIG_USB_XHCI_ROCKCHIP is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USE_TINY_PRINTF=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO_BPP16=y
+CONFIG_VIDEO_BPP32=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_EDP=y
diff --git a/configs/platinum_picon_defconfig b/configs/platinum_picon_defconfig
index 216dad8577..1164669113 100644
--- a/configs/platinum_picon_defconfig
+++ b/configs/platinum_picon_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PLATINUM_PICON=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x1000000
+CONFIG_TARGET_PLATINUM_PICON=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/platinum_titanium_defconfig b/configs/platinum_titanium_defconfig
index a01641f825..cecfa89972 100644
--- a/configs/platinum_titanium_defconfig
+++ b/configs/platinum_titanium_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_PLATINUM_TITANIUM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x1000000
+CONFIG_TARGET_PLATINUM_TITANIUM=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig
index 3c716d6e27..6b70a240f5 100644
--- a/configs/plutux_defconfig
+++ b/configs/plutux_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1FFE0000
diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig
index 8957a87639..e254ac0393 100644
--- a/configs/pogo_e02_defconfig
+++ b/configs/pogo_e02_defconfig
@@ -1,7 +1,7 @@
 CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_POGO_E02=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig
index 01d3603f1e..36d767dab9 100644
--- a/configs/popmetal-rk3288_defconfig
+++ b/configs/popmetal-rk3288_defconfig
@@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
diff --git a/configs/porter_defconfig b/configs/porter_defconfig
index 1bb11c9108..0cb903619d 100644
--- a/configs/porter_defconfig
+++ b/configs/porter_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter"
 CONFIG_R8A7791=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -71,6 +71,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index d4cf8453f5..a148832b83 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0
 CONFIG_TARGET_PUMA_RK3399=y
@@ -11,8 +12,8 @@ CONFIG_DEBUG_UART_BASE=0xFF180000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff8c2000
+CONFIG_DEBUG_UART=y
 CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh"
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
 CONFIG_MISC_INIT_R=y
@@ -24,7 +25,6 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig
index 7253341460..67de086c0b 100644
--- a/configs/pxm2_defconfig
+++ b/configs/pxm2_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=720
 CONFIG_TARGET_PXM2=y
@@ -28,7 +29,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
@@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig
index a37ec4d0d6..4e8eab531c 100644
--- a/configs/qemu-x86_64_defconfig
+++ b/configs/qemu-x86_64_defconfig
@@ -1,11 +1,12 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0x1110000
 CONFIG_SYS_MALLOC_F_LEN=0x1000
-CONFIG_MAX_CPUS=2
 CONFIG_ENV_SIZE=0x40000
+CONFIG_MAX_CPUS=2
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
+CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_X86_RUN_64BIT=y
 CONFIG_TARGET_QEMU_X86_64=y
 CONFIG_DEBUG_UART=y
@@ -14,7 +15,6 @@ CONFIG_GENERATE_PIRQ_TABLE=y
 CONFIG_GENERATE_MP_TABLE=y
 CONFIG_GENERATE_ACPI_TABLE=y
 CONFIG_X86_OFFSET_U_BOOT=0xfff00000
-CONFIG_SPL_TEXT_BASE=0xfffd0000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BUILD_ROM=y
 CONFIG_FIT=y
@@ -27,6 +27,7 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_LAST_STAGE_INIT=y
+CONFIG_PCI_INIT_R=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_CPU_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig
index 4a4792d72b..565f232b4f 100644
--- a/configs/qemu-x86_defconfig
+++ b/configs/qemu-x86_defconfig
@@ -1,7 +1,7 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
-CONFIG_MAX_CPUS=2
 CONFIG_ENV_SIZE=0x40000
+CONFIG_MAX_CPUS=2
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_SMP=y
 CONFIG_GENERATE_PIRQ_TABLE=y
@@ -18,6 +18,7 @@ CONFIG_BOOTARGS="root=/dev/sdb3 init=/sbin/init rootwait ro"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_LAST_STAGE_INIT=y
+CONFIG_PCI_INIT_R=y
 CONFIG_CMD_CPU=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig
index 084b4c1ca6..53c653df21 100644
--- a/configs/qemu_arm64_defconfig
+++ b/configs/qemu_arm64_defconfig
@@ -2,7 +2,6 @@ CONFIG_ARM=y
 CONFIG_ARCH_QEMU=y
 CONFIG_ENV_SIZE=0x40000
 CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_TARGET_QEMU_ARM_64BIT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
@@ -11,10 +10,9 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="pci enum"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_PCI_INIT_R=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_PCI=y
diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig
index f807dfc10e..a8473988bd 100644
--- a/configs/qemu_arm_defconfig
+++ b/configs/qemu_arm_defconfig
@@ -12,10 +12,9 @@ CONFIG_FIT_SIGNATURE=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_FIT_BEST_MATCH=y
 CONFIG_LEGACY_IMAGE_FORMAT=y
-CONFIG_USE_PREBOOT=y
-CONFIG_PREBOOT="pci enum"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_PCI_INIT_R=y
 CONFIG_CMD_BOOTEFI_SELFTEST=y
 CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_PCI=y
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 8ae4ba1a1c..900428a84f 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -7,8 +7,7 @@ CONFIG_TARGET_R2DPLUS=y
 CONFIG_BOOTDELAY=-1
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttySC0,115200"
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
+CONFIG_HUSH_PARSER=y
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_DM=y
 CONFIG_CMD_IDE=y
diff --git a/configs/r8a77965_salvator-x_defconfig b/configs/r8a77965_salvator-x_defconfig
deleted file mode 100644
index 8da542c728..0000000000
--- a/configs/r8a77965_salvator-x_defconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
-CONFIG_RCAR_GEN3=y
-CONFIG_TARGET_SALVATOR_X=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
-CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_FIT=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a77965-salvator-x.dtb"
-CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77965-salvator-x-u-boot"
-CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot"
-CONFIG_MULTI_DTB_FIT_LZO=y
-CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH=y
-CONFIG_RENESAS_RAVB=y
-CONFIG_PCI=y
-CONFIG_DM_PCI=y
-CONFIG_PCI_RCAR_GEN3=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a77965_ulcb_defconfig b/configs/r8a77965_ulcb_defconfig
deleted file mode 100644
index 117939bac7..0000000000
--- a/configs/r8a77965_ulcb_defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
-CONFIG_RCAR_GEN3=y
-CONFIG_TARGET_ULCB=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
-CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_FIT=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a77965-m3nulcb.dtb"
-CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a77965-m3nulcb-u-boot"
-CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot"
-CONFIG_MULTI_DTB_FIT_LZO=y
-CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH=y
-CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a7796_salvator-x_defconfig b/configs/r8a7796_salvator-x_defconfig
deleted file mode 100644
index 86d666fdf1..0000000000
--- a/configs/r8a7796_salvator-x_defconfig
+++ /dev/null
@@ -1,71 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
-CONFIG_RCAR_GEN3=y
-CONFIG_TARGET_SALVATOR_X=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
-CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_FIT=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a7796-salvator-x.dtb"
-CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PCI=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7796-salvator-x-u-boot"
-CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot"
-CONFIG_MULTI_DTB_FIT_LZO=y
-CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH=y
-CONFIG_RENESAS_RAVB=y
-CONFIG_PCI=y
-CONFIG_DM_PCI=y
-CONFIG_PCI_RCAR_GEN3=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a7796_ulcb_defconfig b/configs/r8a7796_ulcb_defconfig
deleted file mode 100644
index ce4d5acfc7..0000000000
--- a/configs/r8a7796_ulcb_defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_RMOBILE=y
-CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_ENV_SIZE=0x20000
-CONFIG_ENV_OFFSET=0xFFFE0000
-CONFIG_DM_GPIO=y
-CONFIG_RCAR_GEN3=y
-CONFIG_TARGET_ULCB=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
-CONFIG_SPL_TEXT_BASE=0xe6338000
-CONFIG_FIT=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
-CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a7796-m3ulcb.dtb"
-CONFIG_VERSION_VARIABLE=y
-CONFIG_HUSH_PARSER=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7796-m3ulcb-u-boot"
-CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot"
-CONFIG_MULTI_DTB_FIT_LZO=y
-CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_REGMAP=y
-CONFIG_SYSCON=y
-CONFIG_CLK=y
-CONFIG_CLK_RENESAS=y
-CONFIG_RCAR_GPIO=y
-CONFIG_DM_I2C=y
-CONFIG_SYS_I2C_RCAR_IIC=y
-CONFIG_DM_MMC=y
-CONFIG_MMC_IO_VOLTAGE=y
-CONFIG_MMC_UHS_SUPPORT=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_RENESAS_SDHI=y
-CONFIG_PHY_MICREL=y
-CONFIG_PHY_MICREL_KSZ90X1=y
-CONFIG_DM_ETH=y
-CONFIG_RENESAS_RAVB=y
-CONFIG_DM_REGULATOR=y
-CONFIG_DM_REGULATOR_FIXED=y
-CONFIG_DM_REGULATOR_GPIO=y
-CONFIG_SCIF_CONSOLE=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_DM_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_OF_LIBFDT_OVERLAY=y
-CONFIG_SMBIOS_MANUFACTURER=""
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig
index 2658ae8f69..fbc10c83e1 100644
--- a/configs/r8a77970_eagle_defconfig
+++ b/configs/r8a77970_eagle_defconfig
@@ -4,13 +4,13 @@ CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x700000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_EAGLE=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
@@ -48,6 +48,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -59,6 +60,8 @@ CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_RENESAS_RPC_SPI=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig
index bf2e65aba8..963a2e31bd 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -4,13 +4,13 @@ CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x50000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x700000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_CONDOR=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
@@ -52,6 +52,7 @@ CONFIG_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -63,6 +64,8 @@ CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_RENESAS_RPC_SPI=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig
index 621849f0f7..e4a017aa23 100644
--- a/configs/r8a77990_ebisu_defconfig
+++ b/configs/r8a77990_ebisu_defconfig
@@ -8,8 +8,8 @@ CONFIG_ENV_OFFSET=0xFFFE0000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_EBISU=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
@@ -46,6 +46,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -54,6 +55,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig
index fbbef30666..b2dc167b9f 100644
--- a/configs/r8a77995_draak_defconfig
+++ b/configs/r8a77995_draak_defconfig
@@ -8,8 +8,8 @@ CONFIG_ENV_OFFSET=0xFFFE0000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_DRAAK=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6318000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
@@ -54,6 +54,7 @@ CONFIG_CFI_FLASH=y
 CONFIG_FLASH_CFI_MTD=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_RENESAS_RPC_HF=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -62,6 +63,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig
index 905e53b632..c4a4e13737 100644
--- a/configs/rastaban_defconfig
+++ b/configs/rastaban_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=300
 CONFIG_TARGET_RASTABAN=y
@@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_SMSC=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/r8a7795_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig
index 328d8b1704..6944edcd01 100644
--- a/configs/r8a7795_salvator-x_defconfig
+++ b/configs/rcar3_salvator-x_defconfig
@@ -7,13 +7,13 @@ CONFIG_ENV_OFFSET=0xFFFE0000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_SALVATOR_X=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a7795-salvator-x.dtb"
+CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb"
 CONFIG_VERSION_VARIABLE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7795-salvator-x-u-boot"
-CONFIG_OF_LIST="r8a7795-salvator-x-u-boot r8a7796-salvator-x-u-boot r8a77965-salvator-x-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot"
+CONFIG_OF_LIST="r8a77950-salvator-x-u-boot r8a77960-salvator-x-u-boot r8a77965-salvator-x-u-boot"
 CONFIG_MULTI_DTB_FIT_LZO=y
 CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
 CONFIG_ENV_IS_IN_MMC=y
@@ -49,6 +49,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -60,6 +61,8 @@ CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SCIF_CONSOLE=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/r8a7795_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index c1979f41c8..e702c87d92 100644
--- a/configs/r8a7795_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -8,13 +8,13 @@ CONFIG_ENV_OFFSET=0xFFFE0000
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GEN3=y
 CONFIG_TARGET_ULCB=y
-CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_SPL_TEXT_BASE=0xe6338000
+CONFIG_SMBIOS_PRODUCT_NAME=""
 CONFIG_FIT=y
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="root=/dev/nfs rw nfsroot=192.168.0.1:/export/rfs ip=192.168.0.20"
 CONFIG_SUPPORT_RAW_INITRD=y
-CONFIG_DEFAULT_FDT_FILE="r8a7795-h3ulcb.dtb"
+CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb"
 CONFIG_VERSION_VARIABLE=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -31,8 +31,8 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="r8a7795-h3ulcb-u-boot"
-CONFIG_OF_LIST="r8a7795-h3ulcb-u-boot r8a7796-m3ulcb-u-boot r8a77965-m3nulcb-u-boot"
+CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot"
+CONFIG_OF_LIST="r8a77950-ulcb-u-boot r8a77960-ulcb-u-boot r8a77965-ulcb-u-boot"
 CONFIG_MULTI_DTB_FIT_LZO=y
 CONFIG_MULTI_DTB_FIT_USER_DEFINED_AREA=y
 CONFIG_ENV_IS_IN_MMC=y
@@ -49,6 +49,7 @@ CONFIG_MMC_IO_VOLTAGE=y
 CONFIG_MMC_UHS_SUPPORT=y
 CONFIG_MMC_HS400_SUPPORT=y
 CONFIG_RENESAS_SDHI=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
@@ -58,6 +59,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SYSRESET=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig
index 0e60c47e02..73656017d1 100644
--- a/configs/riotboard_defconfig
+++ b/configs/riotboard_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024"
@@ -30,6 +30,7 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/riotboard_spl_defconfig b/configs/riotboard_spl_defconfig
index 61fe41d6fc..5ff8da0355 100644
--- a/configs/riotboard_spl_defconfig
+++ b/configs/riotboard_spl_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_EMBESTMX6BOARDS=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -40,6 +40,7 @@ CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_SST=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig
index 569166b2e3..9e59ca4f76 100644
--- a/configs/roc-cc-rk3308_defconfig
+++ b/configs/roc-cc-rk3308_defconfig
@@ -71,7 +71,6 @@ CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_SPL_TINY_MEMSET=y
-CONFIG_LZ4=y
 CONFIG_LZO=y
 CONFIG_ERRNO_STR=y
 # CONFIG_EFI_LOADER is not set
diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig
new file mode 100644
index 0000000000..933a1c6967
--- /dev/null
+++ b/configs/roc-cc-rk3328_defconfig
@@ -0,0 +1,102 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3328=y
+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_TPL_LIBCOMMON_SUPPORT=y
+CONFIG_TPL_LIBGENERIC_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_SPL_STACK_R_ADDR=0x600000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0xFF130000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SMBIOS_PRODUCT_NAME="roc-rk3328-cc"
+CONFIG_DEBUG_UART=y
+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
+# CONFIG_ANDROID_BOOT_IMAGE is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-roc-cc.dtb"
+CONFIG_MISC_INIT_R=y
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
+CONFIG_SPL_ATF=y
+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_TPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_TPL_OF_PLATDATA=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_TPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SPL_REGMAP=y
+CONFIG_TPL_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_SYSCON=y
+CONFIG_TPL_SYSCON=y
+CONFIG_CLK=y
+CONFIG_SPL_CLK=y
+CONFIG_FASTBOOT_BUF_ADDR=0x800800
+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_SF_DEFAULT_SPEED=20000000
+CONFIG_PHY_REALTEK=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM=y
+CONFIG_SPL_RAM=y
+CONFIG_TPL_RAM=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC3=y
+# CONFIG_USB_DWC3_GADGET is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_TPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
+CONFIG_SMBIOS_MANUFACTURER="firefly"
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig
new file mode 100644
index 0000000000..1c1539bcb9
--- /dev/null
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -0,0 +1,74 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_ROCKCHIP_RK3399=y
+CONFIG_TARGET_ROC_PC_RK3399=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEBUG_UART_BASE=0xFF1A0000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_DEBUG_UART=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
+CONFIG_TPL=y
+CONFIG_TPL_GPIO_SUPPORT=y
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_TIME=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME=y
+CONFIG_PCI=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_DM_RESET=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSRESET=y
+CONFIG_USB=y
+CONFIG_USB_XHCI_HCD=y
+CONFIG_USB_XHCI_DWC3=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
+CONFIG_USB_ETHER_ASIX88179=y
+CONFIG_USB_ETHER_MCS7830=y
+CONFIG_USB_ETHER_RTL8152=y
+CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index be76524cef..76e76c160e 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
@@ -36,11 +37,14 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_ROCKCHIP_SPI=y
@@ -50,18 +54,18 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_GENERIC=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
 CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig
index cf71c85927..2118402bbe 100644
--- a/configs/rock2_defconfig
+++ b/configs/rock2_defconfig
@@ -9,8 +9,8 @@ CONFIG_SPL_STACK_R_ADDR=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0xff690000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0xff704000
+CONFIG_DEBUG_UART=y
 # CONFIG_ANDROID_BOOT_IMAGE is not set
 CONFIG_USE_PREBOOT=y
 CONFIG_SILENT_CONSOLE=y
@@ -72,9 +72,9 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 CONFIG_DISPLAY=y
diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig
index 826c7a6917..f123826358 100644
--- a/configs/rock64-rk3328_defconfig
+++ b/configs/rock64-rk3328_defconfig
@@ -1,6 +1,7 @@
 CONFIG_ARM=y
 CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
+CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
@@ -25,6 +26,8 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_TPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_STACK_R=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
 CONFIG_CMD_BOOTZ=y
@@ -36,7 +39,7 @@ CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_TPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_TPL_OF_PLATDATA=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -60,13 +63,14 @@ CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-CONFIG_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_PMIC_RK8XX=y
+CONFIG_SPL_DM_REGULATOR=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_SPL_DM_REGULATOR_FIXED=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM=y
diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig
index c4e954731a..e290e2734b 100644
--- a/configs/rock960-rk3399_defconfig
+++ b/configs/rock960-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A0000
 CONFIG_DEBUG_UART_CLOCK=24000000
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
+CONFIG_MISC_INIT_R=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
@@ -18,6 +19,7 @@ CONFIG_SYS_PROMPT="rock960 => "
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
@@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_DM_ETH=y
+CONFIG_NVME=y
+CONFIG_PCI=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
 CONFIG_PWM_ROCKCHIP=y
+CONFIG_DM_RESET=y
 CONFIG_BAUDRATE=1500000
 CONFIG_DEBUG_UART_SHIFT=2
 CONFIG_SYSRESET=y
@@ -51,6 +56,7 @@ CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_DWC3=y
 CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
@@ -58,12 +64,9 @@ CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
 CONFIG_DM_VIDEO=y
-CONFIG_VIDEO_BPP16=y
-CONFIG_VIDEO_BPP32=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_ERRNO_STR=y
diff --git a/configs/rock_defconfig b/configs/rock_defconfig
index 78cd548b9f..4e804e9255 100644
--- a/configs/rock_defconfig
+++ b/configs/rock_defconfig
@@ -11,8 +11,8 @@ CONFIG_SPL_STACK_R_ADDR=0x60080000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BASE=0x20064000
 CONFIG_DEBUG_UART_CLOCK=24000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x10080800
+CONFIG_DEBUG_UART=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig
index 8074e4665a..8c4b2f35c1 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -28,6 +28,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_KEYBOARD=y
 CONFIG_MISC=y
 CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
@@ -52,11 +53,18 @@ CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_ASIX88179=y
 CONFIG_USB_ETHER_MCS7830=y
 CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
+CONFIG_DM_VIDEO=y
+CONFIG_DISPLAY=y
+CONFIG_VIDEO_ROCKCHIP=y
+CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig
index cecc16cbfc..5053a38822 100644
--- a/configs/rpi_0_w_defconfig
+++ b/configs/rpi_0_w_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig
index 762a72a574..0000a759f1 100644
--- a/configs/rpi_2_defconfig
+++ b/configs/rpi_2_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig
index 5ca31648f9..a714f9ec49 100644
--- a/configs/rpi_3_32b_defconfig
+++ b/configs/rpi_3_32b_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig
index 4f0332023d..c9efa0671d 100644
--- a/configs/rpi_3_b_plus_defconfig
+++ b/configs/rpi_3_b_plus_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig
index 51d5a717d5..244d9b3a78 100644
--- a/configs/rpi_3_defconfig
+++ b/configs/rpi_3_defconfig
@@ -20,7 +20,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig
index 72cda5d949..f369bb93bd 100644
--- a/configs/rpi_4_32b_defconfig
+++ b/configs/rpi_4_32b_defconfig
@@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00008000
 CONFIG_TARGET_RPI_4_32B=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4000
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_NR_DRAM_BANKS=4
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_OF_BOARD_SETUP=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -17,7 +17,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_BOARD=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
@@ -25,6 +24,7 @@ CONFIG_DFU_MMC=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_BCM2835=y
 CONFIG_DM_ETH=y
 CONFIG_BCMGENET=y
diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig
index 6d148dab07..d4b586cf3a 100644
--- a/configs/rpi_4_defconfig
+++ b/configs/rpi_4_defconfig
@@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x00080000
 CONFIG_TARGET_RPI_4=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x4000
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_NR_DRAM_BANKS=4
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_OF_BOARD_SETUP=y
-# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
+CONFIG_ARCH_FIXUP_FDT_MEMORY=y
 CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
@@ -17,7 +17,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_BOARD=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
@@ -25,6 +24,7 @@ CONFIG_DFU_MMC=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_BCM2835=y
 CONFIG_DM_ETH=y
 CONFIG_BCMGENET=y
diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig
index fea86be8b0..f8a369f8f1 100644
--- a/configs/rpi_arm64_defconfig
+++ b/configs/rpi_arm64_defconfig
@@ -3,7 +3,8 @@ CONFIG_ARCH_BCM283X=y
 CONFIG_SYS_TEXT_BASE=0x00080000
 CONFIG_TARGET_RPI_ARM64=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
-CONFIG_NR_DRAM_BANKS=2
+CONFIG_ENV_SIZE=0x4000
+CONFIG_NR_DRAM_BANKS=4
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_USE_PREBOOT=y
@@ -17,12 +18,12 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_BOARD=y
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM_KEYBOARD=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_BCM2835=y
 CONFIG_DM_ETH=y
 CONFIG_BCMGENET=y
diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig
index dbbc818e14..64bb184c2b 100644
--- a/configs/rpi_defconfig
+++ b/configs/rpi_defconfig
@@ -19,7 +19,6 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_FS_UUID=y
 CONFIG_OF_EMBED=y
 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b"
-CONFIG_ENV_FAT_INTERFACE="mmc"
 CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/rut_defconfig b/configs/rut_defconfig
index 22572ef09d..40c9de25c6 100644
--- a/configs/rut_defconfig
+++ b/configs/rut_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=600
 CONFIG_TARGET_RUT=y
@@ -29,7 +30,6 @@ CONFIG_ARCH_EARLY_INIT_R=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
@@ -74,6 +74,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_NATSEMI=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
diff --git a/configs/s32v234evb_defconfig b/configs/s32v234evb_defconfig
index 1fb25ee2ba..78450c23d6 100644
--- a/configs/s32v234evb_defconfig
+++ b/configs/s32v234evb_defconfig
@@ -11,6 +11,9 @@ CONFIG_BOOTARGS="console=ttyLF0 root=/dev/ram rw"
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0xc0000000
+CONFIG_SYS_MEMTEST_END=0xc7c00000
+CONFIG_CMD_MMC=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_DM=y
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig
index b64064856f..a750ec9e18 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -18,8 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig
index dfd8047041..3f22fde026 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig
index 6c2336369c..2c8ae8d004 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index a22dcf1a01..a5fb4f514e 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -17,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf801c000
 CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index 31a7edfb43..92decb4b85 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -16,8 +17,8 @@ CONFIG_DEBUG_UART_BASE=0xf801c000
 CONFIG_DEBUG_UART_CLOCK=82000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2"
@@ -32,7 +33,6 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_DISPLAY_PRINT=y
 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_SPL_AT91_MCK_BYPASS=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig
index 64b23db492..75d68a76e4 100644
--- a/configs/sama5d2_xplained_emmc_defconfig
+++ b/configs/sama5d2_xplained_emmc_defconfig
@@ -18,8 +18,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig
index 12571ff517..779e91a52a 100644
--- a/configs/sama5d2_xplained_mmc_defconfig
+++ b/configs/sama5d2_xplained_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig
index e64f1b6b83..9b5645667d 100644
--- a/configs/sama5d2_xplained_qspiflash_defconfig
+++ b/configs/sama5d2_xplained_qspiflash_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig
index 6da9bd3c56..43d493bf9c 100644
--- a/configs/sama5d2_xplained_spiflash_defconfig
+++ b/configs/sama5d2_xplained_spiflash_defconfig
@@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xf8020000
 CONFIG_DEBUG_UART_CLOCK=83000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SPI_BOOT=y
@@ -31,7 +32,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p1 rw rootwai
 CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig
index 024ac65b12..440f3cb555 100644
--- a/configs/sama5d36ek_cmp_spiflash_defconfig
+++ b/configs/sama5d36ek_cmp_spiflash_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x26f00000
 CONFIG_TARGET_SAMA5D3XEK=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_DEBUG_UART_BOARD_INIT=y
diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig
index fa85fabb01..76e981dabf 100644
--- a/configs/sama5d3_xplained_mmc_defconfig
+++ b/configs/sama5d3_xplained_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00
 CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SD_BOOT=y
diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig
index 83ff270e5c..44c61848b8 100644
--- a/configs/sama5d3_xplained_nandflash_defconfig
+++ b/configs/sama5d3_xplained_nandflash_defconfig
@@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xffffee00
 CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_ENV_OFFSET_REDUND=0x100000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig
index a5fc191918..d7f2ebeffd 100644
--- a/configs/sama5d3xek_mmc_defconfig
+++ b/configs/sama5d3xek_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00
 CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SD_BOOT=y
diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig
index e39bd49b8c..5ad854248d 100644
--- a/configs/sama5d3xek_nandflash_defconfig
+++ b/configs/sama5d3xek_nandflash_defconfig
@@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xffffee00
 CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_ENV_OFFSET_REDUND=0x100000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig
index 6c7cc2e16b..6a76d7c9c0 100644
--- a/configs/sama5d3xek_spiflash_defconfig
+++ b/configs/sama5d3xek_spiflash_defconfig
@@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xffffee00
 CONFIG_DEBUG_UART_CLOCK=132000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x300000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SPI_BOOT=y
@@ -30,7 +31,6 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig
index bca732c911..eaee73ec99 100644
--- a/configs/sama5d4_xplained_mmc_defconfig
+++ b/configs/sama5d4_xplained_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SD_BOOT=y
diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig
index 58f314b4ec..a277be13a4 100644
--- a/configs/sama5d4_xplained_nandflash_defconfig
+++ b/configs/sama5d4_xplained_nandflash_defconfig
@@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_ENV_OFFSET_REDUND=0x100000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig
index d833962c3b..3be18e65a4 100644
--- a/configs/sama5d4_xplained_spiflash_defconfig
+++ b/configs/sama5d4_xplained_spiflash_defconfig
@@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SPI_BOOT=y
@@ -31,7 +32,6 @@ CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(boots
 CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig
index b0486edd80..c1c64dd322 100644
--- a/configs/sama5d4ek_mmc_defconfig
+++ b/configs/sama5d4ek_mmc_defconfig
@@ -19,8 +19,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SD_BOOT=y
diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig
index 9fdc36a7ee..935945c154 100644
--- a/configs/sama5d4ek_nandflash_defconfig
+++ b/configs/sama5d4ek_nandflash_defconfig
@@ -16,8 +16,8 @@ CONFIG_DEBUG_UART_BOARD_INIT=y
 CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_ENV_OFFSET_REDUND=0x100000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_NAND_BOOT=y
diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig
index 13243a796c..a7541a22d6 100644
--- a/configs/sama5d4ek_spiflash_defconfig
+++ b/configs/sama5d4ek_spiflash_defconfig
@@ -8,8 +8,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6000
+CONFIG_ENV_SECT_SIZE=0x1000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
@@ -20,8 +21,8 @@ CONFIG_DEBUG_UART_BASE=0xfc00c000
 CONFIG_DEBUG_UART_CLOCK=88000000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x200000
+CONFIG_DEBUG_UART=y
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_FIT=y
 CONFIG_SPI_BOOT=y
@@ -30,7 +31,6 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256K(env_redundant),256k(env),512k(dtb),6M(kernel)ro,-(rootfs) rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index 9d092330ef..a3f049e124 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -35,6 +35,8 @@ CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00100000
+CONFIG_SYS_MEMTEST_END=0x00101000
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -78,7 +80,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_HOSTFILE=y
 CONFIG_DEFAULT_DEVICE_TREE="sandbox64"
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NETCONSOLE=y
 CONFIG_IP_DEFRAG=y
 CONFIG_REGMAP=y
@@ -203,7 +204,6 @@ CONFIG_WDT_SANDBOX=y
 CONFIG_FS_CBFS=y
 CONFIG_FS_CRAMFS=y
 CONFIG_CMD_DHRYSTONE=y
-CONFIG_RSA_VERIFY_WITH_PKEY=y
 CONFIG_TPM=y
 CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index cc38315868..c09bf33493 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -39,6 +39,8 @@ CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00100000
+CONFIG_SYS_MEMTEST_END=0x00101000
 CONFIG_CMD_BIND=y
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
@@ -87,7 +89,6 @@ CONFIG_OF_CONTROL=y
 CONFIG_OF_LIVE=y
 CONFIG_OF_HOSTFILE=y
 CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NETCONSOLE=y
 CONFIG_IP_DEFRAG=y
 CONFIG_REGMAP=y
@@ -229,7 +230,6 @@ CONFIG_WDT_SANDBOX=y
 CONFIG_FS_CBFS=y
 CONFIG_FS_CRAMFS=y
 CONFIG_CMD_DHRYSTONE=y
-CONFIG_RSA_VERIFY_WITH_PKEY=y
 CONFIG_TPM=y
 CONFIG_LZ4=y
 CONFIG_ERRNO_STR=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index 00d9359f19..21f9047046 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -29,6 +29,8 @@ CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00100000
+CONFIG_SYS_MEMTEST_END=0x00101000
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -61,7 +63,6 @@ CONFIG_AMIGA_PARTITION=y
 CONFIG_OF_CONTROL=y
 CONFIG_OF_HOSTFILE=y
 CONFIG_DEFAULT_DEVICE_TREE="sandbox"
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NETCONSOLE=y
 CONFIG_IP_DEFRAG=y
 CONFIG_REGMAP=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 18c6a47602..fc8b26e88c 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -39,6 +39,8 @@ CONFIG_CMD_MD5SUM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MX_CYCLIC=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00100000
+CONFIG_SYS_MEMTEST_END=0x00101000
 CONFIG_CMD_DEMO=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
@@ -77,7 +79,6 @@ CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_HOSTFILE=y
 CONFIG_DEFAULT_DEVICE_TREE="sandbox"
 CONFIG_SPL_OF_PLATDATA=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NETCONSOLE=y
 CONFIG_IP_DEFRAG=y
 CONFIG_SPL_DM=y
diff --git a/configs/sansa_fuze_plus_defconfig b/configs/sansa_fuze_plus_defconfig
index b207592ee8..188b0eec65 100644
--- a/configs/sansa_fuze_plus_defconfig
+++ b/configs/sansa_fuze_plus_defconfig
@@ -22,6 +22,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 # CONFIG_SPL_FRAMEWORK is not set
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x40000000
+CONFIG_SYS_MEMTEST_END=0x40400000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
diff --git a/configs/sbc8349_PCI_33_defconfig b/configs/sbc8349_PCI_33_defconfig
index a042b1e886..52afd44c27 100644
--- a/configs/sbc8349_PCI_33_defconfig
+++ b/configs/sbc8349_PCI_33_defconfig
@@ -108,7 +108,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8349_PCI_66_defconfig b/configs/sbc8349_PCI_66_defconfig
index 6d09d61fd3..c50a76bac5 100644
--- a/configs/sbc8349_PCI_66_defconfig
+++ b/configs/sbc8349_PCI_66_defconfig
@@ -108,7 +108,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/sbc8349_defconfig b/configs/sbc8349_defconfig
index efcaae90c1..2b06272024 100644
--- a/configs/sbc8349_defconfig
+++ b/configs/sbc8349_defconfig
@@ -85,7 +85,15 @@ CONFIG_ENV_ADDR_REDUND=0xFF860000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
 CONFIG_SYS_NS16550=y
diff --git a/configs/sbc8548_PCI_33_PCIE_defconfig b/configs/sbc8548_PCI_33_PCIE_defconfig
index e3eca06cd0..1c480b68d3 100644
--- a/configs/sbc8548_PCI_33_PCIE_defconfig
+++ b/configs/sbc8548_PCI_33_PCIE_defconfig
@@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/sbc8548_PCI_33_defconfig b/configs/sbc8548_PCI_33_defconfig
index 9583402ebf..9b5a369633 100644
--- a/configs/sbc8548_PCI_33_defconfig
+++ b/configs/sbc8548_PCI_33_defconfig
@@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/sbc8548_PCI_66_PCIE_defconfig b/configs/sbc8548_PCI_66_PCIE_defconfig
index 3d8033f6b4..97474a2528 100644
--- a/configs/sbc8548_PCI_66_PCIE_defconfig
+++ b/configs/sbc8548_PCI_66_PCIE_defconfig
@@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/sbc8548_PCI_66_defconfig b/configs/sbc8548_PCI_66_defconfig
index 0eb0cc542a..843c9d1f4d 100644
--- a/configs/sbc8548_PCI_66_defconfig
+++ b/configs/sbc8548_PCI_66_defconfig
@@ -26,7 +26,15 @@ CONFIG_ENV_ADDR=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/sbc8548_defconfig b/configs/sbc8548_defconfig
index 4e090770a8..0b693f51dc 100644
--- a/configs/sbc8548_defconfig
+++ b/configs/sbc8548_defconfig
@@ -24,7 +24,15 @@ CONFIG_ENV_ADDR=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 # CONFIG_PCI is not set
diff --git a/configs/sbc8641d_defconfig b/configs/sbc8641d_defconfig
index 767428a04d..67fbb1c5c0 100644
--- a/configs/sbc8641d_defconfig
+++ b/configs/sbc8641d_defconfig
@@ -24,7 +24,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/sc_sps_1_defconfig b/configs/sc_sps_1_defconfig
index b525d6a650..a56c42574b 100644
--- a/configs/sc_sps_1_defconfig
+++ b/configs/sc_sps_1_defconfig
@@ -34,6 +34,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_MXS_GPIO=y
 CONFIG_MMC_MXS=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_CONS_INDEX=0
 CONFIG_USB=y
diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig
index 9c285b96aa..ba19ceb5ac 100644
--- a/configs/seaboard_defconfig
+++ b/configs/seaboard_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/secomx6quq7_defconfig b/configs/secomx6quq7_defconfig
index 2f679fcec1..3383517a66 100644
--- a/configs/secomx6quq7_defconfig
+++ b/configs/secomx6quq7_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_SECOMX6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_SECOMX6=y
 CONFIG_SECOMX6_UQ7=y
 CONFIG_SECOMX6Q=y
 CONFIG_SECOMX6_2GB=y
diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig
index 79777e3262..c3fe419fa4 100644
--- a/configs/sei510_defconfig
+++ b/configs/sei510_defconfig
@@ -77,5 +77,4 @@ CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_MESON=y
 CONFIG_VIDEO_DT_SIMPLEFB=y
-CONFIG_LZ4=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig
index bfcba34336..f147235a5a 100644
--- a/configs/sei610_defconfig
+++ b/configs/sei610_defconfig
@@ -77,5 +77,4 @@ CONFIG_DM_VIDEO=y
 CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_VIDEO_MESON=y
 CONFIG_VIDEO_DT_SIMPLEFB=y
-CONFIG_LZ4=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig
index b49734a934..1d0c558eff 100644
--- a/configs/sh7752evb_defconfig
+++ b/configs/sh7752evb_defconfig
@@ -30,6 +30,8 @@ CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
 CONFIG_SH_MMCIF=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_VITESSE=y
 CONFIG_SH_ETHER=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig
index 396d6e3b07..b1563ed9c6 100644
--- a/configs/sh7753evb_defconfig
+++ b/configs/sh7753evb_defconfig
@@ -29,6 +29,8 @@ CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
 CONFIG_SH_MMCIF=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_VITESSE=y
 CONFIG_SH_ETHER=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig
index a7e7c2df00..4f5808afd1 100644
--- a/configs/sh7757lcr_defconfig
+++ b/configs/sh7757lcr_defconfig
@@ -32,6 +32,7 @@ CONFIG_MAC_PARTITION=y
 CONFIG_DOS_PARTITION=y
 CONFIG_MMC=y
 CONFIG_SH_MMCIF=y
+CONFIG_BITBANGMII=y
 CONFIG_SH_ETHER=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SPI=y
diff --git a/configs/sh7763rdp_defconfig b/configs/sh7763rdp_defconfig
index 2ec6939caa..9c5acf4ce9 100644
--- a/configs/sh7763rdp_defconfig
+++ b/configs/sh7763rdp_defconfig
@@ -35,6 +35,7 @@ CONFIG_ENV_ADDR_REDUND=0xA0040000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
 CONFIG_SH_ETHER=y
 CONFIG_SCIF_CONSOLE=y
 CONFIG_USE_PRIVATE_LIBGCC=y
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 723ef7bb46..d350429cad 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_CPU_INIT=y
 CONFIG_SYS_THUMB_BUILD=y
-CONFIG_KIRKWOOD=y
+CONFIG_ARCH_KIRKWOOD=y
 CONFIG_SYS_TEXT_BASE=0x600000
 CONFIG_TARGET_SHEEVAPLUG=y
 CONFIG_ENV_SIZE=0x20000
diff --git a/configs/silk_defconfig b/configs/silk_defconfig
index 89ef1d406f..59503bc1ef 100644
--- a/configs/silk_defconfig
+++ b/configs/silk_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk"
 CONFIG_R8A7794=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -73,6 +73,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/sksimx6_defconfig b/configs/sksimx6_defconfig
index 601a29e66f..5a8469b01f 100644
--- a/configs/sksimx6_defconfig
+++ b/configs/sksimx6_defconfig
@@ -4,10 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_MX6_DDRCAL=y
-CONFIG_TARGET_SKSIMX6=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_SKSIMX6=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig
index 722bac152f..cf671646ad 100644
--- a/configs/smdk5250_defconfig
+++ b/configs/smdk5250_defconfig
@@ -7,8 +7,8 @@ CONFIG_SYS_TEXT_BASE=0x43E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SMDK5250=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_SPL=y
 CONFIG_IDENT_STRING=" for SMDK5250"
diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig
index 6ec0beb3f1..9af878dd0e 100644
--- a/configs/smdk5420_defconfig
+++ b/configs/smdk5420_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SMDK5420=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_NR_DRAM_BANKS=7
 CONFIG_SPL=y
 CONFIG_IDENT_STRING=" for SMDK5420"
diff --git a/configs/snow_defconfig b/configs/snow_defconfig
index 81dc72938c..d408e005e1 100644
--- a/configs/snow_defconfig
+++ b/configs/snow_defconfig
@@ -7,15 +7,15 @@ CONFIG_SYS_TEXT_BASE=0x43E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SNOW=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0x12c30000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_IDENT_STRING=" for snow"
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x02023400
+CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig
index 4fd84ad4f8..35316d7c25 100644
--- a/configs/socfpga_agilex_defconfig
+++ b/configs/socfpga_agilex_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x1000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y
@@ -13,10 +14,11 @@ CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_BOOTDELAY=5
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x3fe00000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index 0478a726fb..ce230110e4 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index b6220e4ae8..1633ca1deb 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index 878b409645..3e1a06d942 100644
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_ASKENV=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 349be7205d..dafb5e83d0 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index ed34223a46..64ee602b74 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index ec1abbcc3d..a60df9b5d9 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
 CONFIG_TARGET_SOCFPGA_IS1=y
@@ -19,7 +20,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index a5179693f6..157efea522 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -17,7 +18,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index fcb38f1a41..df30c7c5f0 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -11,8 +11,8 @@ CONFIG_ENV_OFFSET_REDUND=0x120000
 # CONFIG_SPL_LIBDISK_SUPPORT is not set
 # CONFIG_SPL_SPI_SUPPORT is not set
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
-CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp"
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 # CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
@@ -67,8 +67,8 @@ CONFIG_DM_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_SYS_NAND_USE_FLASH_BBT=y
 CONFIG_NAND_DENALI_DT=y
-CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2
 CONFIG_SPL_NAND_DENALI=y
+CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=2
 # CONFIG_DM_SPI_FLASH is not set
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index 255b0d6ee9..247f3abda1 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 68d57a1138..a9ec97f2f4 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x4400
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y
 CONFIG_SPL_TEXT_BASE=0xFFFF0000
@@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_DFU=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index af7c7bc5de..c95a7fc5e0 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xE0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
 CONFIG_TARGET_SOCFPGA_SR1500=y
@@ -21,10 +22,11 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x40000000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig
index 26db40ffe3..21014f9f8c 100644
--- a/configs/socfpga_stratix10_defconfig
+++ b/configs/socfpga_stratix10_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x1000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x200
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y
@@ -12,10 +13,11 @@ CONFIG_SPL_FS_FAT=y
 CONFIG_SPL_TEXT_BASE=0xFFE00000
 CONFIG_BOOTDELAY=5
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x3fe00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 47fb5a89f5..61b569eb3c 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -1,8 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_SOCFPGA=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y
 CONFIG_ENV_OFFSET_REDUND=0x110000
@@ -23,7 +24,6 @@ CONFIG_VERSION_VARIABLE=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
 CONFIG_CMD_ASKENV=y
 CONFIG_CMD_GREPENV=y
 CONFIG_CMD_EEPROM=y
diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig
index 244822fb9d..5b2d0258e9 100644
--- a/configs/socrates_defconfig
+++ b/configs/socrates_defconfig
@@ -51,7 +51,15 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_DM_PCI=y
diff --git a/configs/som-db5800-som-6867_defconfig b/configs/som-db5800-som-6867_defconfig
index a206fe63db..4d7accc7c4 100644
--- a/configs/som-db5800-som-6867_defconfig
+++ b/configs/som-db5800-som-6867_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x1000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EF000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_DEBUG_UART_BASE=0x3f8
 CONFIG_DEBUG_UART_CLOCK=1843200
diff --git a/configs/somlabs_visionsom_6ull_defconfig b/configs/somlabs_visionsom_6ull_defconfig
index e39c03573a..08469d68b6 100644
--- a/configs/somlabs_visionsom_6ull_defconfig
+++ b/configs/somlabs_visionsom_6ull_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_TARGET_SOMLABS_VISIONSOM_6ULL=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/somlabs/visionsom-6ull/imximage.cfg"
@@ -13,6 +13,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x88000000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig
index 70086c2cbf..40d4aac953 100644
--- a/configs/spear600_defconfig
+++ b/configs/spear600_defconfig
@@ -31,6 +31,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig
index c7bfcada86..e22bd337c3 100644
--- a/configs/spear600_nand_defconfig
+++ b/configs/spear600_nand_defconfig
@@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig
index 854b97a25d..3c26fbe4b0 100644
--- a/configs/spear600_usbtty_defconfig
+++ b/configs/spear600_usbtty_defconfig
@@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig
index ae876149a0..cee23052c7 100644
--- a/configs/spear600_usbtty_nand_defconfig
+++ b/configs/spear600_usbtty_nand_defconfig
@@ -28,6 +28,7 @@ CONFIG_SYS_I2C_DW=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_NATSEMI=y
 CONFIG_PHY_GIGE=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/spring_defconfig b/configs/spring_defconfig
index ceddbf8f7e..ee9cbb71a2 100644
--- a/configs/spring_defconfig
+++ b/configs/spring_defconfig
@@ -7,15 +7,15 @@ CONFIG_SYS_TEXT_BASE=0x43E00000
 CONFIG_ARCH_EXYNOS5=y
 CONFIG_TARGET_SPRING=y
 CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x3FC000
+CONFIG_ENV_SECT_SIZE=0x4000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0x12c30000
 CONFIG_DEBUG_UART_CLOCK=100000000
 CONFIG_IDENT_STRING=" for spring"
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x02023400
+CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_BEST_MATCH=y
diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig
index 52a577f97b..da43317ae5 100644
--- a/configs/stm32f429-discovery_defconfig
+++ b/configs/stm32f429-discovery_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08000000
 CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig
index 24f79b51bf..f67ce3e407 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08000000
 CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig
index 0ab00514d5..082fb0cc19 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08000000
 CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig
index c9e22563a3..be030bfb37 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08008000
 CONFIG_SYS_MALLOC_F_LEN=0xE00
 CONFIG_ENV_SIZE=0x2000
@@ -46,6 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig
index 19a7493d00..09fbcc968f 100644
--- a/configs/stm32f769-disco_defconfig
+++ b/configs/stm32f769-disco_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08008000
 CONFIG_SYS_MALLOC_F_LEN=0xE00
 CONFIG_ENV_SIZE=0x2000
@@ -46,6 +46,7 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_MII=y
diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig
index 6b7a1d6d68..21ea90a2c1 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08000000
 CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig
index 7564d97707..432fce0181 100644
--- a/configs/stm32h743-eval_defconfig
+++ b/configs/stm32h743-eval_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_STM32=y
+CONFIG_ARCH_STM32=y
 CONFIG_SYS_TEXT_BASE=0x08000000
 CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_ENV_SIZE=0x2000
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index c8f1780cab..c7dd2926c9 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -1,11 +1,13 @@
 CONFIG_ARM=y
 CONFIG_ARCH_STM32MP=y
 CONFIG_SYS_MALLOC_F_LEN=0x3000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x280000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_CMD_STM32PROG=y
 CONFIG_ENV_OFFSET_REDUND=0x2C0000
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
@@ -19,22 +21,21 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_EXPORTENV is not set
 # CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0xc0000000
+CONFIG_SYS_MEMTEST_END=0xc4000000
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_MTD=y
 CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -64,10 +65,7 @@ CONFIG_ENV_UBI_VOLUME="uboot_config"
 CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_STM32_ADC=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_RAM=y
-CONFIG_DFU_MTD=y
-CONFIG_DFU_VIRT=y
+CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
 CONFIG_FASTBOOT_BUF_SIZE=0x02000000
@@ -87,6 +85,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
+CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_STM32_FMC2=y
 CONFIG_MTD_SPI_NAND=y
@@ -98,6 +97,7 @@ CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
 CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_PHY=y
@@ -140,4 +140,5 @@ CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=1280
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_ERRNO_STR=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index f830feb306..6106572673 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_STM32MP=y
 CONFIG_SYS_MALLOC_F_LEN=0x3000
 CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_TARGET_DH_STM32MP1_PDK2=y
@@ -11,19 +12,24 @@ CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL_TEXT_BASE=0x2FFC2500
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its"
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_EXPORTENV is not set
 CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0xc0000000
+CONFIG_SYS_MEMTEST_END=0xc4000000
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
@@ -67,6 +73,8 @@ CONFIG_SPL_BLOCK_CACHE=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_VIRT=y
+CONFIG_SET_DFU_ALT_INFO=y
+CONFIG_GPIO_HOG=y
 CONFIG_DM_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_STM32=y
 CONFIG_DM_I2C=y
@@ -76,10 +84,13 @@ CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_STM32_IPCC=y
 CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x50
+CONFIG_SYS_I2C_EEPROM_BUS=3
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_MTD=y
+CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 6c17bd9b20..249646c449 100644
--- a/configs/stm32mp15_optee_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -1,22 +1,31 @@
 CONFIG_ARM=y
 CONFIG_ARCH_STM32MP=y
-CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x3000
-CONFIG_ENV_SECT_SIZE=0x40000
-CONFIG_ENV_OFFSET=0x280000
-CONFIG_TARGET_ST_STM32MP15x=y
-CONFIG_STM32MP1_OPTEE=y
-CONFIG_ENV_OFFSET_REDUND=0x2C0000
+CONFIG_ENV_SIZE=0x4000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_TARGET_DH_STM32MP1_PDK2=y
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI_SUPPORT=y
+# CONFIG_ARMV7_VIRT is not set
+CONFIG_SPL_TEXT_BASE=0x2FFC2500
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its"
 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=3
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MTD_SUPPORT=y
+CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SYS_PROMPT="STM32MP> "
-# CONFIG_CMD_BOOTD is not set
 # CONFIG_CMD_ELF is not set
-# CONFIG_CMD_IMI is not set
-# CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EXPORTENV is not set
-# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_EEPROM=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_ADC=y
@@ -40,31 +49,29 @@ CONFIG_CMD_PMIC=y
 CONFIG_CMD_REGULATOR=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_MTDPARTS=y
-CONFIG_CMD_UBI=y
-CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
-CONFIG_ENV_IS_NOWHERE=y
-CONFIG_ENV_IS_IN_EXT4=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="stm32mp15xx-dhcor-avenger96"
+CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_ENV_IS_IN_UBI=y
+CONFIG_USE_ENV_SPI_BUS=y
+CONFIG_ENV_SPI_BUS=0
+CONFIG_USE_ENV_SPI_CS=y
+CONFIG_ENV_SPI_CS=0
+CONFIG_USE_ENV_SPI_MAX_HZ=y
+CONFIG_ENV_SPI_MAX_HZ=10000000
+CONFIG_USE_ENV_SPI_MODE=y
+CONFIG_ENV_SPI_MODE=0x0
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_EXT4_INTERFACE="mmc"
-CONFIG_ENV_EXT4_DEVICE_AND_PART="0:auto"
-CONFIG_ENV_EXT4_FILE="/uboot.env"
-CONFIG_ENV_UBI_PART="UBI"
-CONFIG_ENV_UBI_VOLUME="uboot_config"
-CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_IP_DEFRAG=y
+CONFIG_TFTP_BLOCKSIZE=1536
 CONFIG_STM32_ADC=y
+CONFIG_SPL_BLOCK_CACHE=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
-CONFIG_DFU_MTD=y
 CONFIG_DFU_VIRT=y
-CONFIG_USB_FUNCTION_FASTBOOT=y
-CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
-CONFIG_FASTBOOT_BUF_SIZE=0x02000000
-CONFIG_FASTBOOT_USB_DEV=1
-CONFIG_FASTBOOT_FLASH=y
-CONFIG_FASTBOOT_FLASH_MMC_DEV=1
+CONFIG_GPIO_HOG=y
 CONFIG_DM_HWSPINLOCK=y
 CONFIG_HWSPINLOCK_STM32=y
 CONFIG_DM_I2C=y
@@ -73,14 +80,13 @@ CONFIG_LED=y
 CONFIG_LED_GPIO=y
 CONFIG_DM_MAILBOX=y
 CONFIG_STM32_IPCC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x53
+CONFIG_SYS_I2C_EEPROM_BUS=2
 CONFIG_DM_MMC=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_MTD=y
-CONFIG_DM_MTD=y
-CONFIG_MTD_RAW_NAND=y
-CONFIG_NAND_STM32_FMC2=y
-CONFIG_MTD_SPI_NAND=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
@@ -88,21 +94,22 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_DM_ETH=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_PHY=y
 CONFIG_PHY_STM32_USBPHYC=y
 CONFIG_PINCONF=y
+# CONFIG_SPL_PINCTRL_FULL is not set
 CONFIG_PINCTRL_STMFX=y
 CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
 CONFIG_PMIC_STPMIC1=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_REGULATOR_STM32_VREFBUF=y
 CONFIG_DM_REGULATOR_STPMIC1=y
 CONFIG_REMOTEPROC_STM32_COPRO=y
-CONFIG_DM_RNG=y
-CONFIG_RNG_STM32MP1=y
 CONFIG_DM_RTC=y
 CONFIG_RTC_STM32=y
 CONFIG_SERIAL_RX_BUFFER=y
@@ -116,10 +123,13 @@ CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
 CONFIG_USB_GADGET=y
-CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
+CONFIG_USB_GADGET_MANUFACTURER="dh"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0483
 CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
 CONFIG_USB_GADGET_DWC2_OTG=y
+CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_USB_HOST_ETHER=y
+CONFIG_USB_ETHER_ASIX=y
 CONFIG_DM_VIDEO=y
 CONFIG_BACKLIGHT_GPIO=y
 CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
@@ -128,4 +138,5 @@ CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=1280
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_LZO=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index d22605f398..ca4a10813b 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -2,9 +2,10 @@ CONFIG_ARM=y
 CONFIG_ARCH_STM32MP=y
 CONFIG_TFABOOT=y
 CONFIG_SYS_MALLOC_F_LEN=0x3000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x280000
+CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_CMD_STM32PROG=y
 CONFIG_ENV_OFFSET_REDUND=0x2C0000
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
@@ -15,15 +16,15 @@ CONFIG_SYS_PROMPT="STM32MP> "
 # CONFIG_CMD_IMPORTENV is not set
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0xc0000000
+CONFIG_SYS_MEMTEST_END=0xc4000000
 CONFIG_CMD_ADC=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
-CONFIG_CMD_MTD=y
 CONFIG_CMD_REMOTEPROC=y
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
@@ -51,10 +52,7 @@ CONFIG_ENV_UBI_VOLUME="uboot_config"
 CONFIG_ENV_UBI_VOLUME_REDUND="uboot_config_r"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_STM32_ADC=y
-CONFIG_DFU_MMC=y
-CONFIG_DFU_RAM=y
-CONFIG_DFU_MTD=y
-CONFIG_DFU_VIRT=y
+CONFIG_SET_DFU_ALT_INFO=y
 CONFIG_USB_FUNCTION_FASTBOOT=y
 CONFIG_FASTBOOT_BUF_ADDR=0xC0000000
 CONFIG_FASTBOOT_BUF_SIZE=0x02000000
@@ -74,6 +72,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
+CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_STM32_FMC2=y
 CONFIG_MTD_SPI_NAND=y
@@ -84,6 +83,7 @@ CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
 CONFIG_DWC_ETH_QOS=y
 CONFIG_PHY=y
@@ -106,6 +106,9 @@ CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_STM32_QSPI=y
 CONFIG_STM32_SPI=y
+CONFIG_TEE=y
+CONFIG_OPTEE=y
+# CONFIG_OPTEE_TA_AVB is not set
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
@@ -124,4 +127,5 @@ CONFIG_VIDEO_STM32=y
 CONFIG_VIDEO_STM32_DSI=y
 CONFIG_VIDEO_STM32_MAX_XRES=1280
 CONFIG_VIDEO_STM32_MAX_YRES=800
+CONFIG_ERRNO_STR=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
diff --git a/configs/stmark2_defconfig b/configs/stmark2_defconfig
index 82c6c131b0..036ff707d1 100644
--- a/configs/stmark2_defconfig
+++ b/configs/stmark2_defconfig
@@ -1,8 +1,8 @@
 CONFIG_M68K=y
 CONFIG_SYS_TEXT_BASE=0x47E00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x40000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_TARGET_STMARK2=y
 CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_SERIAL_BOOT,SYS_INPUT_CLKSRC=30000000"
 # CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/configs/stout_defconfig b/configs/stout_defconfig
index 286d30fc67..cc4a5198aa 100644
--- a/configs/stout_defconfig
+++ b/configs/stout_defconfig
@@ -9,8 +9,9 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_ENV_SIZE=0x40000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0xC0000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_DM_GPIO=y
 CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout"
 CONFIG_R8A7790=y
@@ -30,7 +31,6 @@ CONFIG_SPL_SYS_MALLOC_SIMPLE=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x140000
 CONFIG_SPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
@@ -71,6 +71,7 @@ CONFIG_DM_MTD=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_MTD=y
+CONFIG_BITBANGMII=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ8XXX=y
 CONFIG_DM_ETH=y
diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig
index 1c3146ed18..599438232d 100644
--- a/configs/strider_con_defconfig
+++ b/configs/strider_con_defconfig
@@ -109,6 +109,8 @@ CONFIG_AUTOBOOT_STOP_STR=" "
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00001000
+CONFIG_SYS_MEMTEST_END=0x07f00000
 CONFIG_CMD_FPGAD=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -126,7 +128,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
index 0cea69d0c0..bf52ae701b 100644
--- a/configs/strider_con_dp_defconfig
+++ b/configs/strider_con_dp_defconfig
@@ -109,6 +109,8 @@ CONFIG_AUTOBOOT_STOP_STR=" "
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00001000
+CONFIG_SYS_MEMTEST_END=0x07f00000
 CONFIG_CMD_FPGAD=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -126,7 +128,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig
index 3a5db81a59..d34ca9edd2 100644
--- a/configs/strider_cpu_defconfig
+++ b/configs/strider_cpu_defconfig
@@ -109,6 +109,8 @@ CONFIG_AUTOBOOT_STOP_STR=" "
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00001000
+CONFIG_SYS_MEMTEST_END=0x07f00000
 CONFIG_CMD_FPGAD=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -126,7 +128,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
index 3897d864f9..01cdf0c43f 100644
--- a/configs/strider_cpu_dp_defconfig
+++ b/configs/strider_cpu_dp_defconfig
@@ -109,6 +109,8 @@ CONFIG_AUTOBOOT_STOP_STR=" "
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00001000
+CONFIG_SYS_MEMTEST_END=0x07f00000
 CONFIG_CMD_FPGAD=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -126,7 +128,16 @@ CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_PROTECTION=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_BITBANGMII=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_CONS_INDEX=2
diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig
index 016be7a4fa..54f1cd2bfd 100644
--- a/configs/stv0991_defconfig
+++ b/configs/stv0991_defconfig
@@ -4,8 +4,8 @@ CONFIG_TARGET_STV0991=y
 CONFIG_SYS_TEXT_BASE=0x00010000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x30000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="STV0991"
 CONFIG_BOOTDELAY=3
@@ -18,6 +18,8 @@ CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
 CONFIG_AUTOBOOT_STOP_STR=" "
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00100000
 CONFIG_CMD_SPI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_PING=y
diff --git a/configs/suvd3_defconfig b/configs/suvd3_defconfig
deleted file mode 100644
index 9908ca04a6..0000000000
--- a/configs/suvd3_defconfig
+++ /dev/null
@@ -1,184 +0,0 @@
-CONFIG_PPC=y
-CONFIG_SYS_TEXT_BASE=0xF0000000
-CONFIG_ENV_SIZE=0x4000
-CONFIG_ENV_SECT_SIZE=0x20000
-CONFIG_BOOTCOUNT_BOOTLIMIT=3
-CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
-CONFIG_SYS_CLK_FREQ=66000000
-CONFIG_MPC83xx=y
-CONFIG_HIGH_BATS=y
-CONFIG_TARGET_SUVD3=y
-CONFIG_CORE_PLL_RATIO_25_1=y
-CONFIG_QUICC_MULT_FACTOR_3=y
-CONFIG_BOOT_MEMORY_SPACE_LOW=y
-CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
-CONFIG_BAT0=y
-CONFIG_BAT0_NAME="SDRAM"
-CONFIG_BAT0_BASE=0x00000000
-CONFIG_BAT0_LENGTH_256_MBYTES=y
-CONFIG_BAT0_ACCESS_RW=y
-CONFIG_BAT0_ICACHE_INHIBITED=y
-CONFIG_BAT0_ICACHE_GUARDED=y
-CONFIG_BAT0_DCACHE_INHIBITED=y
-CONFIG_BAT0_DCACHE_GUARDED=y
-CONFIG_BAT0_USER_MODE_VALID=y
-CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT1=y
-CONFIG_BAT1_NAME="IMMR"
-CONFIG_BAT1_BASE=0xE0000000
-CONFIG_BAT1_LENGTH_4_MBYTES=y
-CONFIG_BAT1_ACCESS_RW=y
-CONFIG_BAT1_ICACHE_INHIBITED=y
-CONFIG_BAT1_ICACHE_GUARDED=y
-CONFIG_BAT1_DCACHE_INHIBITED=y
-CONFIG_BAT1_DCACHE_GUARDED=y
-CONFIG_BAT1_USER_MODE_VALID=y
-CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT2=y
-CONFIG_BAT2_NAME="KMBEC_FPGA"
-CONFIG_BAT2_BASE=0xE8000000
-CONFIG_BAT2_LENGTH_128_MBYTES=y
-CONFIG_BAT2_ACCESS_RW=y
-CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
-CONFIG_BAT2_DCACHE_INHIBITED=y
-CONFIG_BAT2_DCACHE_GUARDED=y
-CONFIG_BAT2_USER_MODE_VALID=y
-CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT3=y
-CONFIG_BAT3_NAME="FLASH"
-CONFIG_BAT3_BASE=0xF0000000
-CONFIG_BAT3_LENGTH_256_MBYTES=y
-CONFIG_BAT3_ACCESS_RW=y
-CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y
-CONFIG_BAT3_DCACHE_INHIBITED=y
-CONFIG_BAT3_DCACHE_GUARDED=y
-CONFIG_BAT3_USER_MODE_VALID=y
-CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT4=y
-CONFIG_BAT4_NAME="STACK_IN_DCACHE"
-CONFIG_BAT4_BASE=0xE6000000
-CONFIG_BAT4_ACCESS_RW=y
-CONFIG_BAT4_USER_MODE_VALID=y
-CONFIG_BAT4_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT5=y
-CONFIG_BAT5_NAME="APP1"
-CONFIG_BAT5_BASE=0xA0000000
-CONFIG_BAT5_LENGTH_256_MBYTES=y
-CONFIG_BAT5_ACCESS_RW=y
-CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y
-CONFIG_BAT5_DCACHE_INHIBITED=y
-CONFIG_BAT5_DCACHE_GUARDED=y
-CONFIG_BAT5_USER_MODE_VALID=y
-CONFIG_BAT5_SUPERVISOR_MODE_VALID=y
-CONFIG_BAT6=y
-CONFIG_BAT6_NAME="APP2"
-CONFIG_BAT6_BASE=0xB0000000
-CONFIG_BAT6_LENGTH_256_MBYTES=y
-CONFIG_BAT6_ACCESS_RW=y
-CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y
-CONFIG_BAT6_DCACHE_INHIBITED=y
-CONFIG_BAT6_DCACHE_GUARDED=y
-CONFIG_BAT6_USER_MODE_VALID=y
-CONFIG_BAT6_SUPERVISOR_MODE_VALID=y
-CONFIG_LBLAW0=y
-CONFIG_LBLAW0_BASE=0xF0000000
-CONFIG_LBLAW0_NAME="FLASH"
-CONFIG_LBLAW0_LENGTH_256_MBYTES=y
-CONFIG_LBLAW1=y
-CONFIG_LBLAW1_BASE=0xE8000000
-CONFIG_LBLAW1_NAME="KMBEC_FPGA"
-CONFIG_LBLAW1_LENGTH_128_MBYTES=y
-CONFIG_LBLAW2=y
-CONFIG_LBLAW2_BASE=0xA0000000
-CONFIG_LBLAW2_NAME="APP1"
-CONFIG_LBLAW2_LENGTH_256_MBYTES=y
-CONFIG_LBLAW3=y
-CONFIG_LBLAW3_BASE=0xB0000000
-CONFIG_LBLAW3_NAME="APP2"
-CONFIG_LBLAW3_LENGTH_256_MBYTES=y
-CONFIG_ELBC_BR0_OR0=y
-CONFIG_BR0_OR0_NAME="FLASH"
-CONFIG_BR0_OR0_BASE=0xF0000000
-CONFIG_BR0_PORTSIZE_16BIT=y
-CONFIG_OR0_AM_256_MBYTES=y
-CONFIG_OR0_SCY_5=y
-CONFIG_OR0_CSNT_EARLIER=y
-CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
-CONFIG_OR0_TRLX_RELAXED=y
-CONFIG_OR0_EAD_EXTRA=y
-CONFIG_ELBC_BR1_OR1=y
-CONFIG_BR1_OR1_NAME="KMBEC_FPGA"
-CONFIG_BR1_OR1_BASE=0xE8000000
-CONFIG_OR1_AM_128_MBYTES=y
-CONFIG_OR1_SCY_2=y
-CONFIG_OR1_CSNT_EARLIER=y
-CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y
-CONFIG_OR1_TRLX_RELAXED=y
-CONFIG_OR1_EAD_EXTRA=y
-CONFIG_ELBC_BR2_OR2=y
-CONFIG_BR2_OR2_NAME="APP1"
-CONFIG_BR2_OR2_BASE=0xA0000000
-CONFIG_BR2_PORTSIZE_16BIT=y
-CONFIG_BR2_MACHINE_UPMA=y
-CONFIG_OR2_AM_256_MBYTES=y
-CONFIG_ELBC_BR3_OR3=y
-CONFIG_BR3_OR3_NAME="APP2"
-CONFIG_BR3_OR3_BASE=0xB0000000
-CONFIG_BR3_PORTSIZE_16BIT=y
-CONFIG_OR3_AM_256_MBYTES=y
-CONFIG_OR3_SCY_3=y
-CONFIG_OR3_CSNT_EARLIER=y
-CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y
-CONFIG_OR3_TRLX_RELAXED=y
-CONFIG_HID0_FINAL_EMCP=y
-CONFIG_HID0_FINAL_ICE=y
-CONFIG_HID2_HBE=y
-CONFIG_ACR_PIPE_DEP_4=y
-CONFIG_ACR_RPTCNT_4=y
-CONFIG_ACR_APARK_MASTER=y
-CONFIG_ACR_PARKM_USB_I2C1_BOOT=y
-CONFIG_LCRR_EADC_1=y
-CONFIG_LCRR_CLKDIV_2=y
-# CONFIG_SYS_MALLOC_F is not set
-CONFIG_OF_BOARD_SETUP=y
-CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="SUVD3"
-CONFIG_MISC_INIT_R=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_BOARD_EARLY_INIT_R=y
-CONFIG_LAST_STAGE_INIT=y
-CONFIG_HUSH_PARSER=y
-CONFIG_AUTOBOOT_KEYED=y
-CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n"
-CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_GREPENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_DHCP=y
-CONFIG_CMD_MII=y
-CONFIG_CMD_PING=y
-CONFIG_CMD_JFFS2=y
-CONFIG_CMD_MTDPARTS=y
-CONFIG_MTDIDS_DEFAULT="nor0=boot"
-CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);"
-CONFIG_CMD_UBI=y
-# CONFIG_CMD_UBIFS is not set
-CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
-CONFIG_ENV_ADDR=0xF00C0000
-CONFIG_ENV_ADDR_REDUND=0xF00E0000
-CONFIG_DM=y
-CONFIG_BOOTCOUNT_LIMIT=y
-# CONFIG_MMC is not set
-CONFIG_MTD=y
-CONFIG_MTD_NOR_FLASH=y
-CONFIG_FLASH_CFI_DRIVER=y
-CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
-CONFIG_FLASH_CFI_MTD=y
-CONFIG_SYS_FLASH_PROTECTION=y
-CONFIG_SYS_FLASH_CFI=y
-# CONFIG_PCI is not set
-CONFIG_QE=y
-CONFIG_SYS_NS16550=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 61d4c74324..2ff0e160f7 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_TBS2910=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_TBS2910=y
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_PRE_CON_BUF_ADDR=0x7c000000
@@ -24,6 +24,8 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_BOOTM_VXWORKS is not set
 # CONFIG_CMD_FDT is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x2f400000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig
index 2fc0470b34..d31db78818 100644
--- a/configs/tec-ng_defconfig
+++ b/configs/tec-ng_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/tec_defconfig b/configs/tec_defconfig
index fd7b1b6267..34df740bc5 100644
--- a/configs/tec_defconfig
+++ b/configs/tec_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x1FFE0000
diff --git a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
index 5710ad520a..7a8feee521 100644
--- a/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845-pcie-x4_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EC000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_ENV_OFFSET_REDUND=0x6EE000
 CONFIG_VENDOR_CONGATEC=y
diff --git a/configs/theadorable-x86-conga-qa3-e3845_defconfig b/configs/theadorable-x86-conga-qa3-e3845_defconfig
index a69b9076b6..dbbac6b103 100644
--- a/configs/theadorable-x86-conga-qa3-e3845_defconfig
+++ b/configs/theadorable-x86-conga-qa3-e3845_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EC000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_ENV_OFFSET_REDUND=0x6EE000
 CONFIG_VENDOR_CONGATEC=y
diff --git a/configs/theadorable-x86-dfi-bt700_defconfig b/configs/theadorable-x86-dfi-bt700_defconfig
index 3f63bdeb1c..de9701afe6 100644
--- a/configs/theadorable-x86-dfi-bt700_defconfig
+++ b/configs/theadorable-x86-dfi-bt700_defconfig
@@ -1,8 +1,8 @@
 CONFIG_X86=y
 CONFIG_SYS_TEXT_BASE=0xFFF00000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x6EC000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=8
 CONFIG_ENV_OFFSET_REDUND=0x6EE000
 CONFIG_VENDOR_DFI=y
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 616c07ab54..ab4a460959 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_THEADORABLE=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40004030
+CONFIG_DEBUG_UART=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_FIT=y
 CONFIG_BOOTDELAY=3
@@ -26,7 +27,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x1a000
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig
index 447491f9a6..d81981a827 100644
--- a/configs/thuban_defconfig
+++ b/configs/thuban_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_AM33XX=y
 CONFIG_SYS_MPUCLK=300
 CONFIG_TARGET_THUBAN=y
@@ -27,7 +28,6 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_ARCH_MISC_INIT=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SPL_YMODEM_SUPPORT=y
 # CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is not set
@@ -73,6 +73,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_MTD_UBI_FASTMAP=y
 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
+CONFIG_PHY_SMSC=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
diff --git a/configs/ti814x_evm_defconfig b/configs/ti814x_evm_defconfig
index b7050198ab..71c9119c7d 100644
--- a/configs/ti814x_evm_defconfig
+++ b/configs/ti814x_evm_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_FAT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_MMC_OMAP_HS=y
+CONFIG_PHY_ET1011C=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig
index 034d28ea2d..9e6bcacba5 100644
--- a/configs/tinker-rk3288_defconfig
+++ b/configs/tinker-rk3288_defconfig
@@ -75,12 +75,12 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 CONFIG_DISPLAY=y
 CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig
index 06c5d9b507..daae189fe6 100644
--- a/configs/tinker-s-rk3288_defconfig
+++ b/configs/tinker-s-rk3288_defconfig
@@ -75,12 +75,12 @@ CONFIG_SYSRESET=y
 CONFIG_USB=y
 CONFIG_USB_DWC2=y
 CONFIG_ROCKCHIP_USB2_PHY=y
+CONFIG_USB_KEYBOARD=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_DWC2_OTG=y
 CONFIG_USB_HOST_ETHER=y
 CONFIG_USB_ETHER_ASIX=y
 CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_USB_KEYBOARD=y
 CONFIG_DM_VIDEO=y
 # CONFIG_VIDEO_BPP8 is not set
 CONFIG_DISPLAY=y
diff --git a/configs/titanium_defconfig b/configs/titanium_defconfig
index d1235445f7..f8ba766ec7 100644
--- a/configs/titanium_defconfig
+++ b/configs/titanium_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x17800000
-CONFIG_TARGET_TITANIUM=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_OFFSET=0x1000000
+CONFIG_TARGET_TITANIUM=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0x1080000
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/barco/titanium/imximage.cfg"
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index 2811b2cd37..70e62bf9d9 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -12,6 +12,7 @@ CONFIG_OF_HOSTFILE=y
 CONFIG_DEFAULT_DEVICE_TREE="sandbox"
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_IP_DEFRAG=y
+# CONFIG_ACPIGEN is not set
 CONFIG_AXI=y
 CONFIG_AXI_SANDBOX=y
 # CONFIG_UDP_FUNCTION_FASTBOOT is not set
@@ -26,4 +27,3 @@ CONFIG_SYSRESET=y
 # CONFIG_VIRTIO_PCI is not set
 # CONFIG_VIRTIO_SANDBOX is not set
 # CONFIG_EFI_LOADER is not set
-# CONFIG_ACPIGEN is not set
diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig
index b989b7ff7f..f50d12d154 100644
--- a/configs/topic_miami_defconfig
+++ b/configs/topic_miami_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
@@ -19,10 +20,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_USE_PREBOOT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x18000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig
index 9000d32d29..d2fe64ed9e 100644
--- a/configs/topic_miamilite_defconfig
+++ b/configs/topic_miamilite_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
@@ -19,10 +20,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_USE_PREBOOT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x18000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig
index 30ccf402ab..9afd7f6bca 100644
--- a/configs/topic_miamiplus_defconfig
+++ b/configs/topic_miamiplus_defconfig
@@ -5,6 +5,7 @@ CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
 CONFIG_ENV_SIZE=0x8000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
@@ -19,10 +20,11 @@ CONFIG_BOOTDELAY=0
 CONFIG_USE_PREBOOT=y
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
 CONFIG_SYS_PROMPT="zynq-uboot> "
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x18000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig
index 6d59ba4e66..f9d37b1365 100644
--- a/configs/tplink_wdr4300_defconfig
+++ b/configs/tplink_wdr4300_defconfig
@@ -14,6 +14,8 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_ELF is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80100000
+CONFIG_SYS_MEMTEST_END=0x83f00000
 # CONFIG_CMD_FLASH is not set
 CONFIG_CMD_SPI=y
 CONFIG_CMD_USB=y
diff --git a/configs/tqma6dl_mba6_mmc_defconfig b/configs/tqma6dl_mba6_mmc_defconfig
index d002187209..4e1645dd32 100644
--- a/configs/tqma6dl_mba6_mmc_defconfig
+++ b/configs/tqma6dl_mba6_mmc_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6DL=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
diff --git a/configs/tqma6dl_mba6_spi_defconfig b/configs/tqma6dl_mba6_spi_defconfig
index 7554c3d969..b0596c225e 100644
--- a/configs/tqma6dl_mba6_spi_defconfig
+++ b/configs/tqma6dl_mba6_spi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6DL=y
 CONFIG_TQMA6X_SPI_BOOT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig
index 5c61b75f49..bee5e9e7e3 100644
--- a/configs/tqma6q_mba6_mmc_defconfig
+++ b/configs/tqma6q_mba6_mmc_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_TQMA6=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig
index 745bf17082..f1325a629b 100644
--- a/configs/tqma6q_mba6_spi_defconfig
+++ b/configs/tqma6q_mba6_spi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6X_SPI_BOOT=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_OFFSET_REDUND=0x90000
diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig
index fc60e9a2d1..9d5f451a75 100644
--- a/configs/tqma6s_mba6_mmc_defconfig
+++ b/configs/tqma6s_mba6_mmc_defconfig
@@ -1,8 +1,8 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6S=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_FIT=y
diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig
index 23e3f1abc3..f28548b9a3 100644
--- a/configs/tqma6s_mba6_spi_defconfig
+++ b/configs/tqma6s_mba6_spi_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
-CONFIG_TARGET_TQMA6=y
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_TARGET_TQMA6=y
 CONFIG_TQMA6S=y
 CONFIG_TQMA6X_SPI_BOOT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/tqma6s_wru4_mmc_defconfig b/configs/tqma6s_wru4_mmc_defconfig
index 49dcdec949..73ca9ab2d9 100644
--- a/configs/tqma6s_wru4_mmc_defconfig
+++ b/configs/tqma6s_wru4_mmc_defconfig
@@ -1,11 +1,11 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0x100000
 CONFIG_TARGET_TQMA6=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0x100000
 CONFIG_TQMA6S=y
 CONFIG_WRU4=y
 CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
@@ -68,6 +68,7 @@ CONFIG_PCA9551_LED=y
 CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 # CONFIG_SPECIFY_CONSOLE_INDEX is not set
 CONFIG_MXC_UART=y
diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig
index 6613701e3c..230a3b836d 100644
--- a/configs/trimslice_defconfig
+++ b/configs/trimslice_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFE000
+CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_TEGRA20=y
 CONFIG_TARGET_TRIMSLICE=y
diff --git a/configs/ts4800_defconfig b/configs/ts4800_defconfig
index 5701bfa744..810f0d8d88 100644
--- a/configs/ts4800_defconfig
+++ b/configs/ts4800_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x90008000
-CONFIG_TARGET_TS4800=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_TS4800=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_BOOTDELAY=1
@@ -21,6 +21,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_SPI=y
 CONFIG_MXC_SPI=y
diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig
index d786255d1d..66d475d8bc 100644
--- a/configs/turris_mox_defconfig
+++ b/configs/turris_mox_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_TURRIS_MOX=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DEBUG_UART_BASE=0xd0012000
@@ -14,6 +14,7 @@ CONFIG_DEBUG_UART_CLOCK=25804800
 CONFIG_DEBUG_UART=y
 CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_USE_PREBOOT=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_MISC_INIT_R=y
@@ -37,7 +38,6 @@ CONFIG_CMD_BTRFS=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_MAC_PARTITION=y
 CONFIG_OF_BOARD_FIXUP=y
-CONFIG_OF_BOARD_SETUP=y
 CONFIG_DEFAULT_DEVICE_TREE="armada-3720-turris-mox"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -57,6 +57,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_PHY_MARVELL=y
 CONFIG_PHY_GIGE=y
 CONFIG_MVNETA=y
 CONFIG_PCI=y
diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig
index 29c49686e2..fff98733bf 100644
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -9,17 +9,18 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_TURRIS_OMNIA=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0xF0000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
+CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DEBUG_UART=y
 CONFIG_AHCI=y
-CONFIG_SPL_TEXT_BASE=0x40000030
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
@@ -30,9 +31,10 @@ CONFIG_MISC_INIT_R=y
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_I2C_SUPPORT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00800000
+CONFIG_SYS_MEMTEST_END=0x00ffffff
 CONFIG_CMD_SHA1SUM=y
 CONFIG_CMD_LZMADEC=y
 CONFIG_CMD_GPIO=y
diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig
index 1878182819..ee5bf0bb64 100644
--- a/configs/uDPU_defconfig
+++ b/configs/uDPU_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x00000000
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_MVEBU_ARMADA_37XX=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_ENV_OFFSET=0x180000
+CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DM_GPIO=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=25804800
diff --git a/configs/udoo_defconfig b/configs/udoo_defconfig
index 9f87c72b57..55811962a5 100644
--- a/configs/udoo_defconfig
+++ b/configs/udoo_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_UDOO=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_UDOO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index a2355af9b9..b2333a573b 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_UDOO_NEO=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_UDOO_NEO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig
index 0bc85432df..f4ff2ca306 100644
--- a/configs/uniphier_ld4_sld8_defconfig
+++ b/configs/uniphier_ld4_sld8_defconfig
@@ -49,10 +49,9 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_DENALI_DT=y
-CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
+CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SMC911X=y
-CONFIG_SMC911X_BASE=0x0
 CONFIG_SMC911X_32_BIT=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index 6485ab78fe..c4571d6de1 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -49,9 +49,8 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_DENALI_DT=y
-CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SPL_NAND_DENALI=y
-CONFIG_DM_ETH=y
+CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
 CONFIG_SNI_AVE=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
diff --git a/configs/uniphier_v8_defconfig b/configs/uniphier_v8_defconfig
index 4514468abf..9edb7ec4bf 100644
--- a/configs/uniphier_v8_defconfig
+++ b/configs/uniphier_v8_defconfig
@@ -49,8 +49,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_NAND_DENALI_DT=y
-CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
-CONFIG_DM_ETH=y
 CONFIG_SNI_AVE=y
 CONFIG_PINCONF=y
 CONFIG_SPI=y
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 0c57b7a3dd..65a6047a2f 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -5,8 +5,8 @@ CONFIG_SYS_TEXT_BASE=0x23f00000
 CONFIG_TARGET_USB_A9263=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x2000
+CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_DM_GPIO=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
diff --git a/configs/usbarmory_defconfig b/configs/usbarmory_defconfig
index a0cb3e93bb..0564bdcce1 100644
--- a/configs/usbarmory_defconfig
+++ b/configs/usbarmory_defconfig
@@ -1,14 +1,16 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX5=y
 CONFIG_SYS_TEXT_BASE=0x77800000
-CONFIG_TARGET_USBARMORY=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_USBARMORY=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_DISTRO_DEFAULTS=y
 # CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x70000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/variscite_dart6ul_defconfig b/configs/variscite_dart6ul_defconfig
index 03802950f0..b674d5af68 100644
--- a/configs/variscite_dart6ul_defconfig
+++ b/configs/variscite_dart6ul_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x86000000
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_TARGET_DART_6UL=y
 CONFIG_ENV_SIZE=0x2000
+CONFIG_TARGET_DART_6UL=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=8
diff --git a/configs/ve8313_defconfig b/configs/ve8313_defconfig
index 60d06cfc8f..ed98cd1936 100644
--- a/configs/ve8313_defconfig
+++ b/configs/ve8313_defconfig
@@ -146,7 +146,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
 CONFIG_OF_LIBFDT=y
diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig
index 94211e5091..58fb867e9e 100644
--- a/configs/venice2_defconfig
+++ b/configs/venice2_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x80110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig
index bb94e23ad5..9ff4f1c8ac 100644
--- a/configs/ventana_defconfig
+++ b/configs/ventana_defconfig
@@ -1,5 +1,5 @@
 CONFIG_ARM=y
-CONFIG_TEGRA=y
+CONFIG_ARCH_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x00110000
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xFFFFE000
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index a964e3ccfd..c68b299a95 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -1,17 +1,15 @@
 CONFIG_ARM=y
-CONFIG_SPL_SYS_ICACHE_OFF=y
-CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_IMX8M=y
 CONFIG_SYS_TEXT_BASE=0x40200000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x10000
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xFFFFDE00
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xFFFFDE00
 CONFIG_DM_GPIO=y
 CONFIG_TARGET_VERDIN_IMX8MM=y
 CONFIG_SPL_MMC_SUPPORT=y
@@ -38,6 +36,7 @@ CONFIG_SPL_SEPARATE_BSS=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_POWER_SUPPORT=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
+CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_SYS_PROMPT="Verdin iMX8MM # "
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_ASKENV=y
@@ -45,6 +44,8 @@ CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_IMPORTENV is not set
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x40000000
+CONFIG_SYS_MEMTEST_END=0x80000000
 CONFIG_CMD_CLK=y
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
@@ -94,5 +95,9 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_MXC_UART=y
 CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
 CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
 CONFIG_DM_THERMAL=y
+# CONFIG_WATCHDOG is not set
+CONFIG_IMX_WATCHDOG=y
diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig
index 8628d05e68..49acb34310 100644
--- a/configs/vexpress_aemv8a_juno_defconfig
+++ b/configs/vexpress_aemv8a_juno_defconfig
@@ -18,8 +18,11 @@ CONFIG_SYS_PROMPT="VExpress64# "
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EDITENV is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xff000000
 CONFIG_CMD_ARMFLASH=y
 # CONFIG_CMD_LOADS is not set
+CONFIG_CMD_USB=y
 # CONFIG_CMD_ITEST is not set
 # CONFIG_CMD_SETEXPR is not set
 # CONFIG_CMD_NFS is not set
@@ -28,9 +31,9 @@ CONFIG_CMD_CACHE=y
 CONFIG_CMD_UBI=y
 # CONFIG_ISO_PARTITION is not set
 # CONFIG_EFI_PARTITION is not set
+CONFIG_OF_BOARD=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_ENV_ADDR=0xBFC0000
-CONFIG_DM=y
 # CONFIG_MMC is not set
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
@@ -41,5 +44,7 @@ CONFIG_SYS_FLASH_CFI=y
 CONFIG_SMC911X=y
 CONFIG_SMC911X_BASE=0x018000000
 CONFIG_SMC911X_32_BIT=y
-CONFIG_DM_SERIAL=y
-CONFIG_OF_LIBFDT=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_GENERIC=y
diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig
index b52c761dee..f0ac2f9da3 100644
--- a/configs/vexpress_aemv8a_semi_defconfig
+++ b/configs/vexpress_aemv8a_semi_defconfig
@@ -7,6 +7,7 @@ CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_IDENT_STRING=" vexpress_aemv8a"
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_ANDROID_BOOT_IMAGE=y
 CONFIG_BOOTDELAY=1
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 loglevel=9"
@@ -14,12 +15,13 @@ CONFIG_BOOTARGS="console=ttyAMA0 earlycon=pl011,0x1c090000 debug user_debug=31 l
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SYS_PROMPT="VExpress64# "
-CONFIG_ANDROID_BOOT_IMAGE=y
-CONFIG_CMD_ABOOTIMG=y
 # CONFIG_CMD_CONSOLE is not set
+CONFIG_CMD_ABOOTIMG=y
 # CONFIG_CMD_XIMG is not set
 # CONFIG_CMD_EDITENV is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xff000000
 CONFIG_CMD_ARMFLASH=y
 # CONFIG_CMD_LOADS is not set
 # CONFIG_CMD_ITEST is not set
diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig
index 6bd1f253b6..8234b5d1bb 100644
--- a/configs/vexpress_ca9x4_defconfig
+++ b/configs/vexpress_ca9x4_defconfig
@@ -6,6 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash"
+CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 # CONFIG_CMD_CONSOLE is not set
@@ -34,4 +35,3 @@ CONFIG_SMC911X_32_BIT=y
 CONFIG_BAUDRATE=38400
 CONFIG_CONS_INDEX=0
 CONFIG_OF_LIBFDT=y
-CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb"
diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig
index 84828c91f0..2849ddd9a8 100644
--- a/configs/vf610twr_defconfig
+++ b/configs/vf610twr_defconfig
@@ -15,6 +15,8 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80010000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig
index 27fb40e297..9bf8ea2091 100644
--- a/configs/vf610twr_nand_defconfig
+++ b/configs/vf610twr_nand_defconfig
@@ -15,6 +15,8 @@ CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80010000
+CONFIG_SYS_MEMTEST_END=0x87c00000
 CONFIG_CMD_FUSE=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index d8daadcd27..2684324cac 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -4,8 +4,8 @@ CONFIG_ARCH_AT91=y
 CONFIG_SYS_TEXT_BASE=0x20f00000
 CONFIG_TARGET_VINCO=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_ENV_OFFSET=0x10000
+CONFIG_ENV_SECT_SIZE=0x1000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_VARS_UBOOT_CONFIG=y
 CONFIG_SPI_BOOT=y
@@ -35,6 +35,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_PHY_SMSC=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index bcab7fb83d..a645667a91 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -5,10 +5,10 @@ CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x4000
-CONFIG_MX6_DDRCAL=y
-CONFIG_TARGET_SOFTING_VINING_2000=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_MX6_DDRCAL=y
+CONFIG_TARGET_SOFTING_VINING_2000=y
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -63,6 +63,7 @@ CONFIG_SUPPORT_EMMC_RPMB=y
 CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
 CONFIG_PHY_SMSC=y
 CONFIG_DM_ETH=y
 CONFIG_FEC_MXC=y
diff --git a/configs/vme8349_defconfig b/configs/vme8349_defconfig
index 536c2d1466..66c3c96f2d 100644
--- a/configs/vme8349_defconfig
+++ b/configs/vme8349_defconfig
@@ -117,7 +117,15 @@ CONFIG_ENV_ADDR_REDUND=0xFFFE0000
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_CFI=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_TSEC_ENET=y
 CONFIG_RTC_RX8025=y
 CONFIG_BAUDRATE=9600
diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig
index f9a5fe479b..733b4e82ed 100644
--- a/configs/wandboard_defconfig
+++ b/configs/wandboard_defconfig
@@ -4,12 +4,12 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xC0000
 CONFIG_TARGET_WANDBOARD=y
 CONFIG_SYS_I2C_MXC_I2C1=y
 CONFIG_SYS_I2C_MXC_I2C2=y
 CONFIG_SYS_I2C_MXC_I2C3=y
-CONFIG_ENV_SIZE=0x2000
-CONFIG_ENV_OFFSET=0xC0000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
@@ -17,8 +17,8 @@ CONFIG_NR_DRAM_BANKS=1
 CONFIG_SPL=y
 CONFIG_SPL_LIBDISK_SUPPORT=y
 CONFIG_CMD_HDMIDETECT=y
-CONFIG_AHCI=y
 CONFIG_SPL_TEXT_BASE=0x00908000
+CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SPL_FIT_PRINT=y
diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig
index e731d6ff58..38aeab69f8 100644
--- a/configs/warp7_bl33_defconfig
+++ b/configs/warp7_bl33_defconfig
@@ -15,6 +15,8 @@ CONFIG_BOUNCE_BUFFER=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig
index a5fb48ff1f..70fa486e9e 100644
--- a/configs/warp7_defconfig
+++ b/configs/warp7_defconfig
@@ -21,6 +21,8 @@ CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_XIMG is not set
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0xa0000000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
diff --git a/configs/warp_defconfig b/configs/warp_defconfig
index 69957c98cf..e981f5175b 100644
--- a/configs/warp_defconfig
+++ b/configs/warp_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_WARP=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x60000
+CONFIG_TARGET_WARP=y
 CONFIG_NR_DRAM_BANKS=1
 # CONFIG_CMD_BMODE is not set
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/warp/imximage.cfg"
diff --git a/configs/wb45n_defconfig b/configs/wb45n_defconfig
index fbb039dec9..d2de463aaa 100644
--- a/configs/wb45n_defconfig
+++ b/configs/wb45n_defconfig
@@ -20,6 +20,8 @@ CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x20000000
+CONFIG_SYS_MEMTEST_END=0x23e00000
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_NAND=y
diff --git a/configs/wb50n_defconfig b/configs/wb50n_defconfig
index 25a6edd1d8..86a8549406 100644
--- a/configs/wb50n_defconfig
+++ b/configs/wb50n_defconfig
@@ -20,6 +20,8 @@ CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x21000000
+CONFIG_SYS_MEMTEST_END=0x22000000
 # CONFIG_CMD_FLASH is not set
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_NAND=y
diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig
index 3de8ebbcc7..547f531cf7 100644
--- a/configs/work_92105_defconfig
+++ b/configs/work_92105_defconfig
@@ -45,5 +45,6 @@ CONFIG_MTD=y
 CONFIG_MTD_RAW_NAND=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_ADDR_ENABLE=y
+CONFIG_PHY_SMSC=y
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
diff --git a/configs/x530_defconfig b/configs/x530_defconfig
index c49211df95..67c8fbf663 100644
--- a/configs/x530_defconfig
+++ b/configs/x530_defconfig
@@ -7,16 +7,17 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x2000
 CONFIG_TARGET_X530=y
 CONFIG_ENV_SIZE=0x10000
-CONFIG_ENV_SECT_SIZE=0x40000
 CONFIG_ENV_OFFSET=0x100000
+CONFIG_ENV_SECT_SIZE=0x40000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
-CONFIG_DEBUG_UART=y
 CONFIG_SPL_TEXT_BASE=0x40000030
+CONFIG_DEBUG_UART=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_SILENT_CONSOLE=y
@@ -24,7 +25,6 @@ CONFIG_SILENT_U_BOOT_ONLY=y
 CONFIG_SILENT_CONSOLE_UPDATE_ON_RELOC=y
 CONFIG_MISC_INIT_R=y
 CONFIG_SPL_BOARD_INIT=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x24000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMINFO=y
 # CONFIG_CMD_FLASH is not set
diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig
index 7493972963..a3b71ccc3e 100644
--- a/configs/xilinx_versal_mini_defconfig
+++ b/configs/xilinx_versal_mini_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini_qspi"
 CONFIG_SYS_ICACHE_OFF=y
 CONFIG_ARCH_VERSAL=y
 CONFIG_SYS_TEXT_BASE=0xFFFC0000
-CONFIG_SYS_MALLOC_LEN=0x2000
 CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x2000
 CONFIG_NR_DRAM_BANKS=3
 CONFIG_SYS_MEM_RSVD_FOR_MMU=y
 CONFIG_COUNTER_FREQUENCY=2720000
@@ -38,6 +38,8 @@ CONFIG_SYS_PROMPT="Versal> "
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
 # CONFIG_CMD_ECHO is not set
diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig
index a0a737d678..e25077b000 100644
--- a/configs/xilinx_versal_mini_emmc0_defconfig
+++ b/configs/xilinx_versal_mini_emmc0_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini"
 CONFIG_SYS_ICACHE_OFF=y
 CONFIG_ARCH_VERSAL=y
 CONFIG_SYS_TEXT_BASE=0x10000
-CONFIG_SYS_MALLOC_LEN=0x80000
 CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_COUNTER_FREQUENCY=2720000
 # CONFIG_PSCI_RESET is not set
diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig
index 3a9834fa04..3b477ad103 100644
--- a/configs/xilinx_versal_mini_emmc1_defconfig
+++ b/configs/xilinx_versal_mini_emmc1_defconfig
@@ -3,8 +3,8 @@ CONFIG_SYS_CONFIG_NAME="xilinx_versal_mini"
 CONFIG_SYS_ICACHE_OFF=y
 CONFIG_ARCH_VERSAL=y
 CONFIG_SYS_TEXT_BASE=0x10000
-CONFIG_SYS_MALLOC_LEN=0x80000
 CONFIG_ENV_SIZE=0x80
+CONFIG_SYS_MALLOC_LEN=0x80000
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_COUNTER_FREQUENCY=2720000
 # CONFIG_PSCI_RESET is not set
diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
index e8c3492612..b629f8ba69 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -15,6 +15,8 @@ CONFIG_SYS_PROMPT="Versal> "
 CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
 CONFIG_CMD_DM=y
diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
index 54cbd3e12b..375d54cbad 100644
--- a/configs/xilinx_zynq_virt_defconfig
+++ b/configs/xilinx_zynq_virt_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_SPL_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x4000000
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
 CONFIG_DM_GPIO=y
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
@@ -19,11 +20,12 @@ CONFIG_SPL_STACK_R=y
 CONFIG_SPL_FPGA_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
 # CONFIG_BOOTM_NETBSD is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 CONFIG_CMD_DFU=y
 CONFIG_CMD_FPGA_LOADBP=y
 CONFIG_CMD_FPGA_LOADFS=y
@@ -32,12 +34,17 @@ CONFIG_CMD_FPGA_LOADP=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND_LOCK_UNLOCK=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_CMD_UBI=y
 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706"
 CONFIG_OF_LIST="zynq-zc702 zynq-zc706 zynq-zc770-xm010 zynq-zc770-xm011 zynq-zc770-xm011-x16 zynq-zc770-xm012 zynq-zc770-xm013 zynq-cc108 zynq-microzed zynq-minized zynq-picozed zynq-zed zynq-zturn zynq-zybo zynq-zybo-z7 zynq-dlc20-rev1.0"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig
index 2d9a3b3a5f..c28efa3582 100644
--- a/configs/xilinx_zynqmp_mini_defconfig
+++ b/configs/xilinx_zynqmp_mini_defconfig
@@ -33,6 +33,8 @@ CONFIG_ZYNQMP_PSU_INIT_ENABLED=y
 # CONFIG_CMD_CRC32 is not set
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 # CONFIG_CMD_DM is not set
 # CONFIG_CMD_LOADB is not set
 # CONFIG_CMD_LOADS is not set
diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
index 7b09edd78e..57be5a49f6 100644
--- a/configs/xilinx_zynqmp_virt_defconfig
+++ b/configs/xilinx_zynqmp_virt_defconfig
@@ -25,6 +25,8 @@ CONFIG_CMD_BOOTMENU=y
 CONFIG_CMD_THOR_DOWNLOAD=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_SYS_ALT_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x00000000
+CONFIG_SYS_MEMTEST_END=0x00001000
 CONFIG_CMD_BIND=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_DFU=y
@@ -35,6 +37,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND_LOCK_UNLOCK=y
 CONFIG_CMD_POWEROFF=y
 CONFIG_CMD_SDRAM=y
@@ -45,6 +48,10 @@ CONFIG_CMD_TFTPPUT=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_MTDPARTS_SPREAD=y
+CONFIG_CMD_MTDPARTS_SHOW_NET_SIZES=y
+CONFIG_CMD_UBI=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC"
 CONFIG_OF_LIST="avnet-ultra96-rev1 zynqmp-a2197-revA zynqmp-e-a2197-00-revA zynqmp-g-a2197-00-revA zynqmp-m-a2197-01-revA zynqmp-m-a2197-02-revA zynqmp-m-a2197-03-revA zynqmp-p-a2197-00-revA zynqmp-zc1232-revA zynqmp-zc1254-revA zynqmp-zc1751-xm015-dc1 zynqmp-zc1751-xm016-dc2 zynqmp-zc1751-xm017-dc3 zynqmp-zc1751-xm018-dc4 zynqmp-zc1751-xm019-dc5 zynqmp-zcu100-revC zynqmp-zcu102-rev1.1 zynqmp-zcu102-rev1.0 zynqmp-zcu102-revA zynqmp-zcu102-revB zynqmp-zcu104-revA zynqmp-zcu104-revC zynqmp-zcu106-revA zynqmp-zcu111-revA zynqmp-zcu1275-revA zynqmp-zcu1275-revB zynqmp-zcu1285-revA zynqmp-zcu208-revA zynqmp-zcu216-revA"
diff --git a/configs/xpedite517x_defconfig b/configs/xpedite517x_defconfig
index 2d975fbbaa..caf95458b4 100644
--- a/configs/xpedite517x_defconfig
+++ b/configs/xpedite517x_defconfig
@@ -38,7 +38,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite520x_defconfig b/configs/xpedite520x_defconfig
index c4ca18ced7..8803317225 100644
--- a/configs/xpedite520x_defconfig
+++ b/configs/xpedite520x_defconfig
@@ -38,7 +38,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite537x_defconfig b/configs/xpedite537x_defconfig
index a0b87bd422..88378d6c1f 100644
--- a/configs/xpedite537x_defconfig
+++ b/configs/xpedite537x_defconfig
@@ -41,7 +41,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/xpedite550x_defconfig b/configs/xpedite550x_defconfig
index c685632449..ff46e25215 100644
--- a/configs/xpedite550x_defconfig
+++ b/configs/xpedite550x_defconfig
@@ -39,7 +39,15 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_PHY_BROADCOM=y
+CONFIG_PHY_DAVICOM=y
+CONFIG_PHY_LXT=y
 CONFIG_PHY_MARVELL=y
+CONFIG_PHY_NATSEMI=y
+CONFIG_PHY_REALTEK=y
+CONFIG_PHY_SMSC=y
+CONFIG_PHY_VITESSE=y
 CONFIG_MII=y
 CONFIG_TSEC_ENET=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/xpress_defconfig b/configs/xpress_defconfig
index 124abf19b0..04b0a14f9d 100644
--- a/configs/xpress_defconfig
+++ b/configs/xpress_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX6=y
 CONFIG_SYS_TEXT_BASE=0x87800000
-CONFIG_TARGET_XPRESS=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_XPRESS=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/ccv/xpress/imximage.cfg"
 CONFIG_BOOTDELAY=3
@@ -14,6 +14,8 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
@@ -32,6 +34,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/xpress_spl_defconfig b/configs/xpress_spl_defconfig
index 3df0021df2..7cae666676 100644
--- a/configs/xpress_spl_defconfig
+++ b/configs/xpress_spl_defconfig
@@ -4,9 +4,9 @@ CONFIG_SYS_TEXT_BASE=0x87800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_XPRESS=y
 CONFIG_ENV_SIZE=0x4000
 CONFIG_ENV_OFFSET=0x80000
+CONFIG_TARGET_XPRESS=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -25,6 +25,8 @@ CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x80000000
+CONFIG_SYS_MEMTEST_END=0x90000000
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
@@ -43,6 +45,7 @@ CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_FSL_USDHC=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
+CONFIG_PHY_SMSC=y
 CONFIG_MII=y
 CONFIG_USB=y
 CONFIG_USB_STORAGE=y
diff --git a/configs/zc5202_defconfig b/configs/zc5202_defconfig
index 4c6a765c91..4c298cb4da 100644
--- a/configs/zc5202_defconfig
+++ b/configs/zc5202_defconfig
@@ -4,9 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_ZC5202=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_ZC5202=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -25,9 +26,10 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10800000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -46,6 +48,7 @@ CONFIG_SF_DEFAULT_BUS=3
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=20000000
 CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_MV88E6352_SWITCH=y
 CONFIG_MII=y
 CONFIG_PCI=y
 CONFIG_SPI=y
diff --git a/configs/zc5601_defconfig b/configs/zc5601_defconfig
index faa4c5eb2b..e8f4736541 100644
--- a/configs/zc5601_defconfig
+++ b/configs/zc5601_defconfig
@@ -4,9 +4,10 @@ CONFIG_SYS_TEXT_BASE=0x17800000
 CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_TARGET_ZC5601=y
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x0
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_TARGET_ZC5601=y
 CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_NR_DRAM_BANKS=1
@@ -25,9 +26,10 @@ CONFIG_BOARD_EARLY_INIT_F=y
 CONFIG_SPL_FS_EXT4=y
 CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
 CONFIG_SPL_WATCHDOG_SUPPORT=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_SYS_MEMTEST_START=0x10000000
+CONFIG_SYS_MEMTEST_END=0x10800000
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/zmx25_defconfig b/configs/zmx25_defconfig
index adb80e5b25..24eb20bc22 100644
--- a/configs/zmx25_defconfig
+++ b/configs/zmx25_defconfig
@@ -1,9 +1,9 @@
 CONFIG_ARM=y
 CONFIG_ARCH_MX25=y
 CONFIG_SYS_TEXT_BASE=0xA0000000
-CONFIG_TARGET_ZMX25=y
 CONFIG_ENV_SIZE=0x20000
 CONFIG_ENV_SECT_SIZE=0x20000
+CONFIG_TARGET_ZMX25=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_BOOTDELAY=5
 CONFIG_USE_PREBOOT=y
diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig
index 2b58c461c3..6a01da2e4e 100644
--- a/configs/zynq_cse_nand_defconfig
+++ b/configs/zynq_cse_nand_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_ICACHE_OFF=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0x100000
-CONFIG_SYS_MALLOC_LEN=0x1000
 CONFIG_ENV_SIZE=0x190
+CONFIG_SYS_MALLOC_LEN=0x8000
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig
index 3b4e2f93fa..7b18ba3cd5 100644
--- a/configs/zynq_cse_nor_defconfig
+++ b/configs/zynq_cse_nor_defconfig
@@ -4,8 +4,8 @@ CONFIG_SYS_ICACHE_OFF=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0xFFFC0000
-CONFIG_SYS_MALLOC_LEN=0x1000
 CONFIG_ENV_SIZE=0x190
+CONFIG_SYS_MALLOC_LEN=0x1000
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
 CONFIG_SYS_CUSTOM_LDSCRIPT=y
diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 073e2ce49c..15d8473b27 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -4,8 +4,9 @@ CONFIG_SYS_ICACHE_OFF=y
 CONFIG_SYS_DCACHE_OFF=y
 CONFIG_ARCH_ZYNQ=y
 CONFIG_SYS_TEXT_BASE=0xFFFC0000
-CONFIG_SYS_MALLOC_LEN=0x1000
 CONFIG_ENV_SIZE=0x190
+CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
+CONFIG_SYS_MALLOC_LEN=0x1000
 CONFIG_SPL_STACK_R_ADDR=0x200000
 CONFIG_SPL=y
 CONFIG_DEBUG_UART_BASE=0x0
@@ -22,7 +23,6 @@ CONFIG_USE_PREBOOT=y
 # CONFIG_ARCH_EARLY_INIT_R is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_SPI_LOAD=y
-CONFIG_SYS_SPI_U_BOOT_OFFS=0x100000
 # CONFIG_CMDLINE_EDITING is not set
 # CONFIG_AUTO_COMPLETE is not set
 # CONFIG_SYS_LONGHELP is not set
diff --git a/disk/Kconfig b/disk/Kconfig
index 747275c2ba..cee16a80bc 100644
--- a/disk/Kconfig
+++ b/disk/Kconfig
@@ -53,7 +53,7 @@ config ISO_PARTITION
 	bool "Enable ISO partition table"
 	depends on PARTITIONS
 	default y if DISTRO_DEFAULTS
-	default y if MIPS || TEGRA
+	default y if MIPS || ARCH_TEGRA
 
 config SPL_ISO_PARTITION
 	bool "Enable ISO partition table for SPL"
@@ -75,7 +75,7 @@ config EFI_PARTITION
 	bool "Enable EFI GPT partition table"
 	depends on PARTITIONS
 	default y if DISTRO_DEFAULTS
-	default y if TEGRA
+	default y if ARCH_TEGRA
 	select LIB_UUID
 	help
 	  Say Y here if you would like to use device under U-Boot which
diff --git a/disk/part.c b/disk/part.c
index 4cc2fc19f7..f6a31025dc 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -5,10 +5,12 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <env.h>
 #include <errno.h>
 #include <ide.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <ubifs_uboot.h>
@@ -318,7 +320,7 @@ void part_print(struct blk_desc *dev_desc)
 #endif /* CONFIG_HAVE_BLOCK_DEVICE */
 
 int part_get_info(struct blk_desc *dev_desc, int part,
-		       disk_partition_t *info)
+		       struct disk_partition *info)
 {
 #ifdef CONFIG_HAVE_BLOCK_DEVICE
 	struct part_driver *drv;
@@ -351,7 +353,8 @@ int part_get_info(struct blk_desc *dev_desc, int part,
 	return -1;
 }
 
-int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info)
+int part_get_info_whole_disk(struct blk_desc *dev_desc,
+			     struct disk_partition *info)
 {
 	info->start = 0;
 	info->size = dev_desc->lba;
@@ -431,7 +434,7 @@ cleanup:
 #define PART_AUTO -1
 int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 			     struct blk_desc **dev_desc,
-			     disk_partition_t *info, int allow_whole_dev)
+			     struct disk_partition *info, int allow_whole_dev)
 {
 	int ret = -1;
 	const char *part_str;
@@ -441,7 +444,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 	char *ep;
 	int p;
 	int part;
-	disk_partition_t tmpinfo;
+	struct disk_partition tmpinfo;
 
 #ifdef CONFIG_SANDBOX
 	/*
@@ -646,7 +649,7 @@ cleanup:
 }
 
 int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name,
-			       disk_partition_t *info, int part_type)
+			       struct disk_partition *info, int part_type)
 {
 	struct part_driver *part_drv;
 	int ret;
@@ -671,7 +674,7 @@ int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name,
 }
 
 int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
-			  disk_partition_t *info)
+			  struct disk_partition *info)
 {
 	return part_get_info_by_name_type(dev_desc, name, info, PART_TYPE_ALL);
 }
@@ -693,7 +696,7 @@ int part_get_info_by_name(struct blk_desc *dev_desc, const char *name,
 static int part_get_info_by_dev_and_name(const char *dev_iface,
 					 const char *dev_part_str,
 					 struct blk_desc **dev_desc,
-					 disk_partition_t *part_info)
+					 struct disk_partition *part_info)
 {
 	char *ep;
 	const char *part_str;
@@ -725,7 +728,7 @@ static int part_get_info_by_dev_and_name(const char *dev_iface,
 int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
 					 const char *dev_part_str,
 					 struct blk_desc **dev_desc,
-					 disk_partition_t *part_info)
+					 struct disk_partition *part_info)
 {
 	/* Split the part_name if passed as "$dev_num#part_name". */
 	if (!part_get_info_by_dev_and_name(dev_iface, dev_part_str,
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index 5a2bb718b5..7eea60b564 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -9,6 +9,7 @@
 #include <env.h>
 #include <ide.h>
 #include "part_amiga.h"
+#include <part.h>
 
 #ifdef CONFIG_HAVE_BLOCK_DEVICE
 
@@ -291,7 +292,7 @@ static struct partition_block *find_partition(struct blk_desc *dev_desc,
  * Get info about a partition
  */
 static int part_get_info_amiga(struct blk_desc *dev_desc, int part,
-				    disk_partition_t *info)
+				    struct disk_partition *info)
 {
     struct partition_block *p = find_partition(dev_desc, part-1);
     struct amiga_part_geometry *g;
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 83ff40d310..04f53106f7 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -14,10 +14,12 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <ide.h>
 #include <memalign.h>
 #include "part_dos.h"
+#include <part.h>
 
 #ifdef CONFIG_HAVE_BLOCK_DEVICE
 
@@ -45,9 +47,15 @@ static inline int is_extended(int part_type)
 	    part_type == 0x85);
 }
 
-static inline int is_bootable(dos_partition_t *p)
+static int get_bootable(dos_partition_t *p)
 {
-	return (p->sys_ind == 0xef) || (p->boot_ind == 0x80);
+	int ret = 0;
+
+	if (p->sys_ind == 0xef)
+		ret |= PART_EFI_SYSTEM_PARTITION;
+	if (p->boot_ind == 0x80)
+		ret |= PART_BOOTABLE;
+	return ret;
 }
 
 static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
@@ -60,7 +68,7 @@ static void print_one_part(dos_partition_t *p, lbaint_t ext_part_sector,
 		"u\t%08x-%02x\t%02x%s%s\n",
 		part_num, lba_start, lba_size, disksig, part_num, p->sys_ind,
 		(is_extended(p->sys_ind) ? " Extd" : ""),
-		(is_bootable(p) ? " Boot" : ""));
+		(get_bootable(p) ? " Boot" : ""));
 }
 
 static int test_block_type(unsigned char *buffer)
@@ -207,7 +215,7 @@ static void print_partition_extended(struct blk_desc *dev_desc,
 static int part_get_info_extended(struct blk_desc *dev_desc,
 				  lbaint_t ext_part_sector, lbaint_t relative,
 				  int part_num, int which_part,
-				  disk_partition_t *info, unsigned int disksig)
+				  struct disk_partition *info, uint disksig)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
 	dos_partition_t *pt;
@@ -258,7 +266,7 @@ static int part_get_info_extended(struct blk_desc *dev_desc,
 					      (char *)info->name);
 			/* sprintf(info->type, "%d, pt->sys_ind); */
 			strcpy((char *)info->type, "U-Boot");
-			info->bootable = is_bootable(pt);
+			info->bootable = get_bootable(pt);
 #if CONFIG_IS_ENABLED(PARTITION_UUIDS)
 			sprintf(info->uuid, "%08x-%02x", disksig, part_num);
 #endif
@@ -311,7 +319,7 @@ void part_print_dos(struct blk_desc *dev_desc)
 }
 
 int part_get_info_dos(struct blk_desc *dev_desc, int part,
-		      disk_partition_t *info)
+		      struct disk_partition *info)
 {
 	return part_get_info_extended(dev_desc, 0, 0, 1, part, info, 0);
 }
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b2e157d9c1..de3491821f 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -9,8 +9,13 @@
  *   when CONFIG_SYS_64BIT_LBA is not defined, lbaint_t is 32 bits; this
  *   limits the maximum size of addressable storage to < 2 Terra Bytes
  */
-#include <asm/unaligned.h>
 #include <common.h>
+#include <blk.h>
+#include <log.h>
+#include <part.h>
+#include <uuid.h>
+#include <asm/cache.h>
+#include <asm/unaligned.h>
 #include <command.h>
 #include <fdtdec.h>
 #include <ide.h>
@@ -71,11 +76,15 @@ static char *print_efiname(gpt_entry *pte)
 
 static const efi_guid_t system_guid = PARTITION_SYSTEM_GUID;
 
-static inline int is_bootable(gpt_entry *p)
+static int get_bootable(gpt_entry *p)
 {
-	return p->attributes.fields.legacy_bios_bootable ||
-		!memcmp(&(p->partition_type_guid), &system_guid,
-			sizeof(efi_guid_t));
+	int ret = 0;
+
+	if (!memcmp(&p->partition_type_guid, &system_guid, sizeof(efi_guid_t)))
+		ret |=  PART_EFI_SYSTEM_PARTITION;
+	if (p->attributes.fields.legacy_bios_bootable)
+		ret |=  PART_BOOTABLE;
+	return ret;
 }
 
 static int validate_gpt_header(gpt_header *gpt_h, lbaint_t lba,
@@ -253,7 +262,7 @@ void part_print_efi(struct blk_desc *dev_desc)
 }
 
 int part_get_info_efi(struct blk_desc *dev_desc, int part,
-		      disk_partition_t *info)
+		      struct disk_partition *info)
 {
 	ALLOC_CACHE_ALIGN_BUFFER_PAD(gpt_header, gpt_head, 1, dev_desc->blksz);
 	gpt_entry *gpt_pte = NULL;
@@ -286,7 +295,7 @@ int part_get_info_efi(struct blk_desc *dev_desc, int part,
 	snprintf((char *)info->name, sizeof(info->name), "%s",
 		 print_efiname(&gpt_pte[part - 1]));
 	strcpy((char *)info->type, "U-Boot");
-	info->bootable = is_bootable(&gpt_pte[part - 1]);
+	info->bootable = get_bootable(&gpt_pte[part - 1]);
 #if CONFIG_IS_ENABLED(PARTITION_UUIDS)
 	uuid_bin_to_str(gpt_pte[part - 1].unique_partition_guid.b, info->uuid,
 			UUID_STR_FORMAT_GUID);
@@ -407,7 +416,7 @@ int write_gpt_table(struct blk_desc *dev_desc,
 
 int gpt_fill_pte(struct blk_desc *dev_desc,
 		 gpt_header *gpt_h, gpt_entry *gpt_e,
-		 disk_partition_t *partitions, int parts)
+		 struct disk_partition *partitions, int parts)
 {
 	lbaint_t offset = (lbaint_t)le64_to_cpu(gpt_h->first_usable_lba);
 	lbaint_t last_usable_lba = (lbaint_t)
@@ -501,7 +510,7 @@ int gpt_fill_pte(struct blk_desc *dev_desc,
 		memset(&gpt_e[i].attributes, 0,
 		       sizeof(gpt_entry_attributes));
 
-		if (partitions[i].bootable)
+		if (partitions[i].bootable & PART_BOOTABLE)
 			gpt_e[i].attributes.fields.legacy_bios_bootable = 1;
 
 		/* partition name */
@@ -597,7 +606,7 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,
 }
 
 int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
-		disk_partition_t *partitions, int parts_count)
+		struct disk_partition *partitions, int parts_count)
 {
 	gpt_header *gpt_h;
 	gpt_entry *gpt_e;
@@ -692,7 +701,7 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
 }
 
 int gpt_verify_partitions(struct blk_desc *dev_desc,
-			  disk_partition_t *partitions, int parts,
+			  struct disk_partition *partitions, int parts,
 			  gpt_header *gpt_head, gpt_entry **gpt_pte)
 {
 	char efi_str[PARTNAME_SZ + 1];
diff --git a/disk/part_iso.c b/disk/part_iso.c
index e733227f59..822f2c4d9f 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
+#include <part.h>
+#include <asm/cache.h>
 #include <asm/unaligned.h>
 #include "part_iso.h"
 
@@ -46,7 +49,7 @@ unsigned long iso_dread(struct blk_desc *block_dev, lbaint_t start,
 
 /* only boot records will be listed as valid partitions */
 int part_get_info_iso_verb(struct blk_desc *dev_desc, int part_num,
-			   disk_partition_t *info, int verb)
+			   struct disk_partition *info, int verb)
 {
 	int i,offset,entry_num;
 	unsigned short *chksumbuf;
@@ -199,14 +202,14 @@ found:
 }
 
 static int part_get_info_iso(struct blk_desc *dev_desc, int part_num,
-				  disk_partition_t *info)
+			     struct disk_partition *info)
 {
 	return part_get_info_iso_verb(dev_desc, part_num, info, 0);
 }
 
 static void part_print_iso(struct blk_desc *dev_desc)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 	int i;
 
 	if (part_get_info_iso_verb(dev_desc, 1, &info, 0) == -1) {
@@ -225,7 +228,7 @@ static void part_print_iso(struct blk_desc *dev_desc)
 
 static int part_test_iso(struct blk_desc *dev_desc)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 
 	return part_get_info_iso_verb(dev_desc, 1, &info, 0);
 }
diff --git a/disk/part_mac.c b/disk/part_mac.c
index 8b2c004027..e01ae74566 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -14,9 +14,11 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <memalign.h>
 #include <ide.h>
 #include "part_mac.h"
+#include <part.h>
 
 #ifdef CONFIG_HAVE_BLOCK_DEVICE
 
@@ -214,7 +216,7 @@ static int part_mac_read_pdb(struct blk_desc *dev_desc, int part,
 }
 
 static int part_get_info_mac(struct blk_desc *dev_desc, int part,
-				  disk_partition_t *info)
+				  struct disk_partition *info)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(mac_driver_desc_t, ddesc, 1);
 	ALLOC_CACHE_ALIGN_BUFFER(mac_partition_t, mpart, 1);
diff --git a/doc/README.bootmenu b/doc/README.bootmenu
index ca5099089e..9ff89f2e55 100644
--- a/doc/README.bootmenu
+++ b/doc/README.bootmenu
@@ -1,6 +1,6 @@
 SPDX-License-Identifier: GPL-2.0+
 /*
- * (C) Copyright 2011-2012 Pali Rohár <pali.rohar@gmail.com>
+ * (C) Copyright 2011-2012 Pali Rohár <pali@kernel.org>
  */
 
 ANSI terminal bootmenu command
diff --git a/doc/README.commands b/doc/README.commands
index 4e9e8098fa..716ad227aa 100644
--- a/doc/README.commands
+++ b/doc/README.commands
@@ -3,7 +3,7 @@ Command definition
 
 Commands are added to U-Boot by creating a new command structure.
 This is done by first including command.h, then using the U_BOOT_CMD() or the
-U_BOOT_CMD_COMPLETE macro to fill in a cmd_tbl_t struct.
+U_BOOT_CMD_COMPLETE macro to fill in a struct cmd_tbl struct.
 
 U_BOOT_CMD(name, maxargs, repeatable, command, "usage", "help")
 U_BOOT_CMD_COMPLETE(name, maxargs, repeatable, command, "usage, "help", comp)
@@ -31,7 +31,7 @@ comp:		Pointer to the completion function. May be NULL.
 Sub-command definition
 ----------------------
 
-Likewise an array of cmd_tbl_t holding sub-commands can be created using either
+Likewise an array of struct cmd_tbl holding sub-commands can be created using either
 of the following macros:
 
 * U_BOOT_CMD_MKENT(name, maxargs, repeatable, command, "usage", "help")
@@ -40,14 +40,14 @@ of the following macros:
 
 This table has to be evaluated in the command function of the main command, e.g.
 
-    static cmd_tbl_t cmd_sub[] = {
+    static struct cmd_tbl cmd_sub[] = {
         U_BOOT_CMD_MKENT(foo, CONFIG_SYS_MAXARGS, 1, do_foo, "", ""),
         U_BOOT_CMD_MKENT(bar, CONFIG_SYS_MAXARGS, 1, do_bar, "", ""),
     };
 
-    static int do_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+    static int do_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
     {
-        cmd_tbl_t *cp;
+        struct cmd_tbl *cp;
 
         if (argc < 2)
                 return CMD_RET_USAGE;
@@ -68,7 +68,7 @@ Command function
 ----------------
 
 The command function pointer has to be of type
-int (*cmd)(struct cmd_tbl_s *cmdtp, int flag, int argc, const char *argv[]);
+int (*cmd)(struct cmd_tbl *cmdtp, int flag, int argc, const char *argv[]);
 
 cmdtp:		Table entry describing the command (see above).
 
diff --git a/doc/README.dfu b/doc/README.dfu
index caf1c9998c..4b9f883540 100644
--- a/doc/README.dfu
+++ b/doc/README.dfu
@@ -48,12 +48,12 @@ Configuration Options:
   CONFIG_CMD_DFU
 
 Environment variables:
-  the dfu command use 3 environments variables:
-  "dfu_alt_info" : the DFU setting for the USB download gadget with a comma
+  the dfu command uses 3 environments variables:
+  "dfu_alt_info" : the DFU setting for the USB download gadget with a semicolon
                    separated string of information on each alternate:
                    dfu_alt_info="<alt1>;<alt2>;....;<altN>"
 
-                   when only several device are used, the format is:
+                   when several devices are used, the format is:
                    - <interface> <dev>'='alternate list (';' separated)
                    - each interface is separated by '&'
                 dfu_alt_info=\
@@ -63,7 +63,7 @@ Environment variables:
                    "<interfaceI> <devI>=<altY+1>;....;<altZ>&"
 
   "dfu_bufsiz" : size of the DFU buffer, when absent, use
-                 CONFIG_SYS_DFU_DATA_BUF_SIZE (8MiB by default)
+                 CONFIG_SYS_DFU_DATA_BUF_SIZE (8 MiB by default)
 
   "dfu_hash_algo" : name of the hash algorithm to use
 
@@ -87,12 +87,21 @@ Commands:
   "mmc" (for eMMC and SD card)
     cmd: dfu 0 mmc <dev>
     each element in "dfu_alt_info" =
-      <name> raw <offset> <size>   raw access to mmc device
-      <name> part <dev> <part_id>  raw acces to partition
-      <name> fat <dev> <part_id>   file in FAT partition
-      <name> ext4 <dev> <part_id>  file in EXT4 partition
+      <name> raw <offset> <size> [mmcpart <num>]   raw access to mmc device
+      <name> part <dev> <part_id> [mmcpart <num>]  raw access to partition
+      <name> fat <dev> <part_id> [mmcpart <num>]   file in FAT partition
+      <name> ext4 <dev> <part_id> [mmcpart <num>]  file in EXT4 partition
+
+      with <partid> being the GPT or DOS partition index,
+      with <num> being the eMMC hardware partition number.
+
+    A value of environment variable dfu_alt_info for eMMC could be:
+
+      "u-boot raw 0x3e 0x800 mmcpart 1;bl2 raw 0x1e 0x1d mmcpart 1"
+
+    A value of environment variable dfu_alt_info for SD card could be:
 
-      with <partid> is the GPT or DOS partition index
+      "u-boot raw 0x80 0x800;uImage ext4 0 2"
 
   "nand" (raw slc nand device)
     cmd: dfu 0 nand <dev>
diff --git a/doc/README.nokia_rx51 b/doc/README.nokia_rx51
index 586ed7c1cc..33c275b416 100644
--- a/doc/README.nokia_rx51
+++ b/doc/README.nokia_rx51
@@ -19,7 +19,7 @@ stored ATAGs (see boot order).
 There is support for hardware watchdog. Hardware watchdog is started by
 NOLO so u-boot must kick watchdog to prevent reboot device (but not very
 often, max every 2 seconds). There is also support for framebuffer display
-output with ANSI espace codes and the N900 HW keyboard input. USB tty works
+output with ANSI escape codes and the N900 HW keyboard input. USB tty works
 but is disabled because it prevents the current Maemo kernel from booting.
 
 When U-Boot is starting it enable IBE bit in Auxiliary Control Register,
@@ -36,7 +36,7 @@ Boot from SD or eMMC in this order:
 
  * 1.
    * 1.1 find boot.scr on first fat partition
-   * 1.2 find uImage on first fat parition
+   * 1.2 find uImage on first fat partition
    * 1.3 same order for 2. - 4. fat partition
  * 2. same as 1. but for ext2/3 partition
  * 3. same as 1. but for ext4 partition
@@ -62,21 +62,26 @@ Available additional commands/variables:
  * run trymmcscriptboot - Try to load and boot script ${mmcscriptfile}
  * run trymmckernboot - Try to load and boot kernel image ${mmckernfile}
  * run trymmckerninitrdboot - Try to load and boot kernel image ${mmckernfile}
-			      with initrd image ${mmcinitrdfile}
+                              with initrd image ${mmcinitrdfile}
 
 Additional variables for loading files from mmc:
 
  * mmc ${mmcnum} (0 - external, 1 - internal)
  * partition number ${mmcpart} (1 - 4)
- * parition type ${mmctype} (fat, ext2)
+ * parition type ${mmctype} (fat, ext2, ext4)
 
-Additional varuables for booting kernel:
+Additional variables for booting kernel:
 
  * setup_omap_atag - Add OMAP table into atags structure (needs maemo kernel)
  * setup_console_atag - Enable serial console in OMAP table
  * setup_boot_reason_atag - Change boot reason in OMAP table
  * setup_boot_mode_atag - Change boot mode in OMAP table
 
+ Variable setup_omap_atag is automatically set when booting attached kernel.
+ When variable setup_omap_atag is set, variable setup_console_atag is unset
+ and u-boot standard output is set to serial then setup_console_atag is
+ automatically set to 1. So output from Maemo kernel would go to serial port.
+
 USB TTY:
 
  Maemo kernel 2.6.28 will crash if u-boot enable usb tty. So USB TTY is disabled.
@@ -85,20 +90,13 @@ USB TTY:
  #define CONFIG_USB_TTY
 
 
-ONENAND support:
-
- ONENAND support is disabled because not working yet and cause linux kernel to
- crash or no access to mtd. For enabling ONENAND support add this line at begin
- of file include/configs/nokia_rx51.h
-
- #define ONENAND_SUPPORT
-
-
 UBIFS support:
 
  UBIFS support is disabled, because U-Boot image is too big and cannot be
  flashed with attached zImage to RX-51 kernel nand area. For enabling UBIFS
- support first enable ONENAND support and then add this line at begin of file
- include/configs/nokia_rx51.h
+ support add following lines into file configs/nokia_rx51_defconfig
 
- #define UBIFS_SUPPORT
+ CONFIG_CMD_UBI=y
+ CONFIG_CMD_UBIFS=y
+ CONFIG_MTD_UBI_FASTMAP=y
+ CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT=1
diff --git a/doc/README.rockchip b/doc/README.rockchip
index 9b699b9ae5..154166ec78 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -8,6 +8,10 @@ U-Boot on Rockchip
 
 A wide range of Rockchip SoCs are supported in mainline U-Boot
 
+Warning
+=======
+This document is being moved to doc/board/rockchip, so information on it
+might be incomplete or outdated.
 
 Prerequisites
 =============
@@ -24,75 +28,9 @@ You will need:
    - Suitable ARM cross compiler, e.g.:
         sudo apt-get install gcc-4.7-arm-linux-gnueabi
 
-
 Building
 ========
 
-At present 11 RK3288 boards are supported:
-
-   - EVB RK3288 - use evb-rk3288 configuration
-   - Firefly RK3288 - use firefly-rk3288 configuration
-   - Hisense Chromebook - use chromebook_jerry configuration
-   - Asus C100P Chromebook - use chromebook_minnie configuration
-   - Asus Chromebit - use chromebook_mickey configuration
-   - MiQi RK3288 - use miqi-rk3288 configuration
-   - phyCORE-RK3288 RDK - use phycore-rk3288 configuration
-   - PopMetal RK3288 - use popmetal-rk3288 configuration
-   - Radxa Rock 2 - use rock2 configuration
-   - Tinker RK3288 - use tinker-rk3288 configuration
-   - Vyasa RK3288 - use vyasa-rk3288 configuration
-
-Two RK3036 boards are supported:
-
-   - EVB RK3036 - use evb-rk3036 configuration
-   - Kylin - use kylin_rk3036 configuration
-
-Two RK3308 boards are supported:
-
-   - EVB RK3308 - use evb-rk3308 configuration
-   - ROC-CC-RK3308 - use roc-cc-rk3308 configuration
-
-Two RK3328 board are supported:
-
-   - EVB RK3328 - use evb-rk3328_defconfig
-   - Pine64 Rock64 board - use rock64-rk3328_defconfig
-
-Size RK3399 boards are supported (aarch64):
-
-   - EBV RK3399 - use evb_rk3399 configuration
-   - Firefly RK3399 - use the firefly_rk3399 configuration
-   - Puma - use puma_rk3399 configuration
-   - Ficus - use ficus-rk3399 configuration
-   - Rock960 (Vamrs) - use rock960-rk3399 configuration
-   - Bob - use chromebook_bob configuration
-
-Four RK3368 boards are supported:
-
-   - Sheep - use sheep-rk3368 configuration
-   - Lion - use lion-rk3368 configuration
-   - Geekbox - use geekbox configuration
-   - EVB PX5 - use evb-px5  configuration
-
-One RK3128 board is supported:
-
-   - EVB RK3128 - use evb-rk3128 configuration
-
-One RK3229 board is supported:
-
-   - EVB RK3229 - use evb-rk3229 configuration
-
-Two RV1108 boards are supported:
-
-   - EVB RV1108 - use evb-rv1108 configuration
-   - Elgin R1 - use elgin-rv1108 configuration
-
-One RV3188 baord is supported:
-
-   - Raxda Rock - use rock configuration
-
-
-For example:
-
 1. To build RK3288 board:
 
    CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
diff --git a/doc/README.standalone b/doc/README.standalone
index 28ebde1dec..874ca2f7c6 100644
--- a/doc/README.standalone
+++ b/doc/README.standalone
@@ -40,7 +40,7 @@ Design Notes on Exporting U-Boot Functions to Standalone Applications:
    that returns the ABI version of the running U-Boot. I.e., a
    typical application startup may look like this:
 
-	int my_app (int argc, char * const argv[])
+	int my_app (int argc, char *const argv[])
 	{
 		app_startup (argv);
 		if (get_version () != XF_VERSION)
diff --git a/doc/SPI/README.sandbox-spi b/doc/SPI/README.sandbox-spi
index dfa845cc82..f6a55fe780 100644
--- a/doc/SPI/README.sandbox-spi
+++ b/doc/SPI/README.sandbox-spi
@@ -2,59 +2,37 @@ Sandbox SPI/SPI Flash Implementation
 ====================================
 
 U-Boot supports SPI and SPI flash emulation in sandbox. This must be enabled
-using the --spi_sf paramter when starting U-Boot.
+via a device tree.
 
 For example:
 
-$ make O=sandbox sandbox_config
-$ make O=sandbox
-$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin
-
-The four parameters to spi_sf are:
-
-   SPI bus number (typically 0)
-   SPI chip select number (typically 0)
-   SPI chip to emulate
-   File containing emulated data
+	spi@0 {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0 1>;
+		compatible = "sandbox,spi";
+		cs-gpios = <0>, <&gpio_a 0>;
+		spi.bin@0 {
+			reg = <0>;
+			compatible = "spansion,m25p16", "jedec,spi-nor";
+			spi-max-frequency = <40000000>;
+			sandbox,filename = "spi.bin";
+		};
+	};
 
 Supported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once
 U-Boot it started you can use 'sf' commands as normal. For example:
 
-$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \
-	-c "sf probe; sf test 0 100000; sf read 0 1000 1000; \
-		sf erase 1000 1000; sf write 0 1000 1000"
-
-
-U-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15)
-
-DRAM:  128 MiB
-Using default environment
-
-In:    serial
-Out:   serial
-Err:   serial
-SF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB
-SPI flash test:
-0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps
-1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps
-2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps
-3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps
-Test passed
-0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps
-1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps
-2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps
-3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps
-SF: 4096 bytes @ 0x1000 Read: OK
-SF: 4096 bytes @ 0x1000 Erased: OK
-SF: 4096 bytes @ 0x1000 Written: OK
-
+$ dd if=/dev/zero of=spi.bin bs=1M count=2
+$ u-boot -T
 
 Since the SPI bus is fully implemented as well as the SPI flash connected to
 it, you can also use low-level SPI commands to access the flash. For example
 this reads the device ID from the emulated chip:
 
 => sspi 0 32 9f
-FFEF4018
+SF: Detected m25p16 with page size 256 Bytes, erase size 64 KiB, total 2 MiB
+FF202015
 
 
 Simon Glass
diff --git a/doc/api/dfu.rst b/doc/api/dfu.rst
new file mode 100644
index 0000000000..5bd9e292a5
--- /dev/null
+++ b/doc/api/dfu.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Device firmware update
+======================
+
+.. kernel-doc:: include/dfu.h
+   :internal:
diff --git a/doc/api/efi.rst b/doc/api/efi.rst
index 0667c3aef7..d5114f05b3 100644
--- a/doc/api/efi.rst
+++ b/doc/api/efi.rst
@@ -163,3 +163,12 @@ Unicode Collation protocol
 
 .. kernel-doc:: lib/efi_loader/efi_unicode_collation.c
    :internal:
+
+Unit testing
+------------
+
+The following library functions are provided to support writing UEFI unit tests.
+The should not be used elsewhere.
+
+.. kernel-doc:: include/efi_selftest.h
+   :internal:
diff --git a/doc/api/index.rst b/doc/api/index.rst
index d484c066c5..fd3b5bdc82 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -6,6 +6,8 @@ U-Boot API documentation
 .. toctree::
    :maxdepth: 2
 
+   dfu
    efi
    linker_lists
    serial
+   unicode
diff --git a/doc/api/unicode.rst b/doc/api/unicode.rst
new file mode 100644
index 0000000000..3fb6745f84
--- /dev/null
+++ b/doc/api/unicode.rst
@@ -0,0 +1,7 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Unicode support
+===============
+
+.. kernel-doc:: include/charset.h
+   :internal:
diff --git a/doc/arch/m68k.rst b/doc/arch/m68k.rst
index 34b2593eb8..44e1a5dfa3 100644
--- a/doc/arch/m68k.rst
+++ b/doc/arch/m68k.rst
@@ -35,7 +35,7 @@ development boards.
 Supported CPU families
 ----------------------
 
-Please "make menuconfig" with ARCH=m68k, or check arch/m68k/cpu to see the
+Please "make menuconfig" and select "m68k" or check arch/m68k/cpu to see the
 currently supported processor and families.
 
 
@@ -75,8 +75,8 @@ A bash script similar to the one below may be used:
    board=M5475DFE
 
    make distclean
-   make ARCH=m68k ${board}_defconfig
-   make ARCH=m68k KBUILD_VERBOSE=1
+   make ${board}_defconfig
+   make KBUILD_VERBOSE=1
 
 
 Adopted toolchains
diff --git a/doc/arch/sandbox.rst b/doc/arch/sandbox.rst
index 6a1c6fc552..360f22461a 100644
--- a/doc/arch/sandbox.rst
+++ b/doc/arch/sandbox.rst
@@ -316,19 +316,29 @@ SPI Emulation
 
 Sandbox supports SPI and SPI flash emulation.
 
-This is controlled by the spi_sf argument, the format of which is::
-
-   bus:cs:device:file
-
-   bus    - SPI bus number
-   cs     - SPI chip select number
-   device - SPI device emulation name
-   file   - File on disk containing the data
-
-For example::
-
-   dd if=/dev/zero of=spi.bin bs=1M count=4
-   ./u-boot --spi_sf 0:0:M25P16:spi.bin
+The device can be enabled via a device tree, for example::
+
+    spi@0 {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            reg = <0 1>;
+            compatible = "sandbox,spi";
+            cs-gpios = <0>, <&gpio_a 0>;
+            spi.bin@0 {
+                    reg = <0>;
+                    compatible = "spansion,m25p16", "jedec,spi-nor";
+                    spi-max-frequency = <40000000>;
+                    sandbox,filename = "spi.bin";
+            };
+    };
+
+The file must be created in advance::
+
+   $ dd if=/dev/zero of=spi.bin bs=1M count=2
+   $ u-boot -T
+
+Here, you can use "-T" or "-D" option to specify test.dtb or u-boot.dtb,
+respectively, or "-d <file>" for your own dtb.
 
 With this setup you can issue SPI flash commands as normal::
 
@@ -346,22 +356,6 @@ also use low-level SPI commands::
 This is issuing a READ_ID command and getting back 20 (ST Micro) part
 0x2015 (the M25P16).
 
-Drivers are connected to a particular bus/cs using sandbox's state
-structure (see the 'spi' member). A set of operations must be provided
-for each driver.
-
-
-Configuration settings for the curious are:
-
-CONFIG_SANDBOX_SPI_MAX_BUS:
-  The maximum number of SPI buses supported by the driver (default 1).
-
-CONFIG_SANDBOX_SPI_MAX_CS:
-  The maximum number of chip selects supported by the driver (default 10).
-
-CONFIG_SPI_IDLE_VAL:
-  The idle value on the SPI bus
-
 
 Block Device Emulation
 ----------------------
diff --git a/doc/arch/x86.rst b/doc/arch/x86.rst
index a441738ad1..c6b70ce61a 100644
--- a/doc/arch/x86.rst
+++ b/doc/arch/x86.rst
@@ -712,6 +712,34 @@ to load a 'u-boot-payload.efi', see below test logs on QEMU.
 See :doc:`../uefi/u-boot_on_efi` and :doc:`../uefi/uefi` for details of
 EFI support in U-Boot.
 
+Chain-loading
+-------------
+U-Boot can be chain-loaded from another bootloader, such as coreboot or
+Slim Bootloader. Typically this is done by building for targets 'coreboot' or
+'slimbootloader'.
+
+For example, at present we have a 'coreboot' target but this runs very
+different code from the bare-metal targets, such as coral. There is very little
+in common between them.
+
+It is useful to be able to boot the same U-Boot on a device, with or without a
+first-stage bootloader. For example, with chromebook_coral, it is helpful for
+testing to be able to boot the same U-Boot (complete with FSP) on bare metal
+and from coreboot. It allows checking of things like CPU speed, comparing
+registers, ACPI tables and the like.
+
+To do this you can use ll_boot_init() in appropriate places to skip init that
+has already been done by the previous stage. This works by setting a
+GD_FLG_NO_LL_INIT flag when U-Boot detects that it is running from another
+bootloader.
+
+With this feature, you can build a bare-metal target and boot it from
+coreboot, for example.
+
+Note that this is a development feature only. It is not intended for use in
+production environments. Also it is not currently part of the automated tests
+so may break in the future.
+
 TODO List
 ---------
 - Audio
diff --git a/doc/board/actions/cubieboard7.rst b/doc/board/actions/cubieboard7.rst
index e01d2d0370..74f2b12e41 100644
--- a/doc/board/actions/cubieboard7.rst
+++ b/doc/board/actions/cubieboard7.rst
@@ -102,7 +102,7 @@ Building U-BOOT proper image
 
    $ make clean
    $ export CROSS_COMPILE=aarch64-linux-gnu-
-   $ make ARCH=arm cubieboard7_defconfig
+   $ make cubieboard7_defconfig
    $ make u-boot-dtb.img -j16
 
 u-boot-dtb.img can now be flashed to debian image partition mounted on host machine.
diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst
index fd974229eb..9c44c025a4 100644
--- a/doc/board/coreboot/coreboot.rst
+++ b/doc/board/coreboot/coreboot.rst
@@ -40,3 +40,13 @@ To enable video you must enable these options in coreboot:
 At present it seems that for Minnowboard Max, coreboot does not pass through
 the video information correctly (it always says the resolution is 0x0). This
 works correctly for link though.
+
+64-bit U-Boot
+-------------
+
+In addition to the 32-bit 'coreboot' build there is a 'coreboot64' build. This
+produces an image which can be booted from coreboot (32-bit). Internally it
+works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
+can be useful for running UEFI applications, for example.
+
+This has only been lightly tested.
diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst
index cd9c8d6dc4..7b72fab496 100644
--- a/doc/board/rockchip/rockchip.rst
+++ b/doc/board/rockchip/rockchip.rst
@@ -21,44 +21,60 @@ mainline U-Boot.
 
 List of mainline supported rockchip boards:
 
+* rk3036
+     - Rockchip Evb-RK3036 (evb-rk3036)
+     - Kylin (kylin_rk3036)
+* rk3128
+     - Rockchip Evb-RK3128 (evb-rk3128)
+* rk3229
+     - Rockchip Evb-RK3229 (evb-rk3229)
 * rk3288
-     - Evb-RK3288
-     - Firefly-RK3288
-     - mqmaker MiQi
-     - Phytec RK3288 PCM-947
-     - PopMetal-RK3288
-     - Radxa Rock 2 Square
-     - Tinker-RK3288
-     - Google Jerry
-     - Google Mickey
-     - Google Minnie
-     - Google Speedy
-     - Amarula Vyasa-RK3288
+     - Rockchip Evb-RK3288 (evb-rk3288)
+     - Firefly-RK3288 (firefly-rk3288)
+     - MQmaker MiQi (miqi-rk3288)
+     - Phytec RK3288 PCM-947 (phycore-rk3288)
+     - PopMetal-RK3288 (popmetal-rk3288)
+     - Radxa Rock 2 Square (rock2)
+     - Tinker-RK3288 (tinker-rk3288)
+     - Google Jerry (chromebook_jerry)
+     - Google Mickey (chromebook_mickey)
+     - Google Minnie (chromebook_minnie)
+     - Google Speedy (chromebook_speedy)
+     - Amarula Vyasa-RK3288 (vyasa-rk3288)
+* rk3308
+     - Rockchip Evb-RK3308 (evb-rk3308)
+     - Roc-cc-RK3308 (roc-cc-rk3308)
 * rk3328
-     - Rockchip RK3328 EVB
-     - Pine64 Rock64
+     - Rockchip Evb-RK3328 (evb-rk3328)
+     - Pine64 Rock64 (rock64-rk3328)
+     - Firefly-RK3328 (roc-cc-rk3328)
 * rk3368
-     - GeekBox
-     - PX5 EVB
-     - Rockchip sheep board
-     - Theobroma Systems RK3368-uQ7 SoM
+     - GeekBox (geekbox)
+     - PX5 EVB (evb-px5)
+     - Rockchip Sheep (sheep-rk3368)
+     - Theobroma Systems RK3368-uQ7 SoM - Lion (lion-rk3368)
 * rk3399
-     - 96boards RK3399 Ficus
-     - 96boards Rock960
-     - Firefly-RK3399 Board
-     - Firefly ROC-RK3399-PC Board
-     - FriendlyElec NanoPC-T4
-     - FriendlyElec NanoPi M4
-     - FriendlyARM NanoPi NEO4
-     - Google Bob
-     - Khadas Edge
-     - Khadas Edge-Captain
-     - Khadas Edge-V
-     - Orange Pi RK3399 Board
-     - Pine64 RockPro64
-     - Radxa ROCK Pi 4
-     - Rockchip RK3399 Evaluation Board
-     - Theobroma Systems RK3399-Q7 SoM
+     - 96boards RK3399 Ficus (ficus-rk3399)
+     - 96boards Rock960 (rock960-rk3399)
+     - Firefly-RK3399 (firefly_rk3399)
+     - Firefly ROC-RK3399-PC
+     - FriendlyElec NanoPC-T4 (nanopc-t4-rk3399)
+     - FriendlyElec NanoPi M4 (nanopi-m4-rk3399)
+     - FriendlyARM NanoPi NEO4 (nanopi-neo4-rk3399)
+     - Google Bob (chromebook_bob)
+     - Khadas Edge (khadas-edge-rk3399)
+     - Khadas Edge-Captain (khadas-edge-captain-rk3399)
+     - Khadas Edge-V (hadas-edge-v-rk3399)
+     - Orange Pi RK3399 (orangepi-rk3399)
+     - Pine64 RockPro64 (rockpro64-rk3399)
+     - Radxa ROCK Pi 4 (rock-pi-4-rk3399)
+     - Rockchip Evb-RK3399 (evb_rk3399)
+     - Theobroma Systems RK3399-Q7 SoM - Puma (puma_rk3399)
+* rv1108
+     - Rockchip Evb-rv1108 (evb-rv1108)
+     - Elgin-R1 (elgin-rv1108)
+* rv3188
+     - Radxa Rock (rock)
 
 Building
 --------
@@ -117,14 +133,42 @@ To write an image that boots from an SD card (assumed to be /dev/sda)::
         sudo dd if=u-boot-rockchip.bin of=/dev/sda seek=64
         sync
 
+eMMC
+^^^^
+
+eMMC flash would probe on mmc0 in most of the rockchip platforms.
+
+Create GPT partition layout as defined in configurations::
+
+        mmc dev 0
+        gpt write mmc 0 $partitions
+
+Connect the USB-OTG cable between host and target device.
+
+Launch fastboot at target::
+
+        fastboot 0
+
+Upon successful gadget connection,host show the USB device like::
+
+        lsusb
+        Bus 001 Device 020: ID 2207:330c Fuzhou Rockchip Electronics Company RK3399 in Mask ROM mode
+
+Program the flash::
+
+        sudo fastboot -i 0x2207 flash loader1 idbloader.img
+        sudo fastboot -i 0x2207 flash loader2 u-boot.itb
+
+Note: for rockchip 32-bit platforms the U-Boot proper image
+is u-boot-dtb.img
+
 TODO
 ----
 
 - Add rockchip idbloader image building
 - Add rockchip TPL image building
 - Document SPI flash boot
-- Describe steps for eMMC flashing
 - Add missing SoC's with it boards list
 
 .. Jagan Teki <jagan@amarulasolutions.com>
-.. Fri Jan 10 00:08:40 IST 2020
+.. Sunday 24 May 2020 10:08:41 PM IST
diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst
index 610ba87074..43402cb2e5 100644
--- a/doc/board/sifive/fu540.rst
+++ b/doc/board/sifive/fu540.rst
@@ -39,7 +39,6 @@ Building
 
 .. code-block:: none
 
-   export ARCH=riscv
    export CROSS_COMPILE=<riscv64 toolchain prefix>
 
 3. make sifive_fu540_defconfig
diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
index b3856be9a1..e74f7afdae 100644
--- a/doc/board/st/stm32mp1.rst
+++ b/doc/board/st/stm32mp1.rst
@@ -80,32 +80,16 @@ defconfig_file : stm32mp15_trusted_defconfig
     +             +-------------------------+------------+-------+
     |             |Trusted Firmware-A (TF-A)| U-Boot     | Linux |
     +-------------+-------------------------+------------+-------+
-    | TrustZone   |TF-A secure monitor                           |
+    | TrustZone   |secure monitor                                |
     +-------------+-------------------------+------------+-------+
 
 TF-A performs a full initialization of Secure peripherals and installs a
-secure monitor (BL32=SPMin).
+secure monitor, BL32:
 
-U-Boot is running in normal world and uses TF-A monitor to access
-to secure resources.
-
-The **Trusted** boot chain with **OP-TEE**
-``````````````````````````````````````````
-
-defconfig_file : stm32mp15_optee_defconfig
-
-    +-------------+-------------------------+------------+-------+
-    |  ROM code   | FSBL                    | SSBL       | OS    |
-    +             +-------------------------+------------+-------+
-    |             |Trusted Firmware-A (TF-A)| U-Boot     | Linux |
-    +-------------+-------------------------+------------+-------+
-    | TrustZone   |OP-TEE                                        |
-    +-------------+-------------------------+------------+-------+
+  * SPMin provided by TF-A or
+  * OP-TEE from specific partitions (teeh, teed, teex).
 
-TF-A performs a full initialization of Secure peripherals and installs OP-TEE
-from specific partitions (teeh, teed, teex).
-
-U-Boot is running in normal world and uses OP-TEE monitor to access
+U-Boot is running in normal world and uses the secure monitor to access
 to secure resources.
 
 The **Basic** boot chain
@@ -180,7 +164,6 @@ Build Procedure
    for example: use one output directory for each configuration::
 
    # export KBUILD_OUTPUT=stm32mp15_trusted
-   # export KBUILD_OUTPUT=stm32mp15_optee
    # export KBUILD_OUTPUT=stm32mp15_basic
 
    you can build outside of code directory::
@@ -194,7 +177,6 @@ Build Procedure
    with <defconfig_file>:
 
    - For **trusted** boot mode : **stm32mp15_trusted_defconfig**
-   - For **trusted** with OP-TEE boot mode : **stm32mp15_optee_defconfig**
    - For basic boot mode: stm32mp15_basic_defconfig
 
 5. Configure the device-tree and build the U-Boot image::
@@ -211,8 +193,8 @@ Build Procedure
 
   b) trusted with OP-TEE boot on dk2::
 
-      # export KBUILD_OUTPUT=stm32mp15_optee
-      # make stm32mp15_optee_defconfig
+      # export KBUILD_OUTPUT=stm32mp15_trusted
+      # make stm32mp15_trusted_defconfig
       # make DEVICE_TREE=stm32mp157c-dk2 all
 
   c) basic boot on ev1::
@@ -536,61 +518,49 @@ On EV1 board, booting from SD card, without OP-TEE::
   dev: RAM alt: 0 name: uImage layout: RAM_ADDR
   dev: RAM alt: 1 name: devicetree.dtb layout: RAM_ADDR
   dev: RAM alt: 2 name: uramdisk.image.gz layout: RAM_ADDR
-  dev: eMMC alt: 3 name: sdcard_fsbl1 layout: RAW_ADDR
-  dev: eMMC alt: 4 name: sdcard_fsbl2 layout: RAW_ADDR
-  dev: eMMC alt: 5 name: sdcard_ssbl layout: RAW_ADDR
-  dev: eMMC alt: 6 name: sdcard_bootfs layout: RAW_ADDR
-  dev: eMMC alt: 7 name: sdcard_vendorfs layout: RAW_ADDR
-  dev: eMMC alt: 8 name: sdcard_rootfs layout: RAW_ADDR
-  dev: eMMC alt: 9 name: sdcard_userfs layout: RAW_ADDR
-  dev: eMMC alt: 10 name: emmc_fsbl1 layout: RAW_ADDR
-  dev: eMMC alt: 11 name: emmc_fsbl2 layout: RAW_ADDR
-  dev: eMMC alt: 12 name: emmc_ssbl layout: RAW_ADDR
-  dev: eMMC alt: 13 name: emmc_bootfs layout: RAW_ADDR
-  dev: eMMC alt: 14 name: emmc_vendorfs layout: RAW_ADDR
-  dev: eMMC alt: 15 name: emmc_rootfs layout: RAW_ADDR
-  dev: eMMC alt: 16 name: emmc_userfs layout: RAW_ADDR
-  dev: MTD alt: 17 name: nor_fsbl1 layout: RAW_ADDR
-  dev: MTD alt: 18 name: nor_fsbl2 layout: RAW_ADDR
-  dev: MTD alt: 19 name: nor_ssbl layout: RAW_ADDR
-  dev: MTD alt: 20 name: nor_env layout: RAW_ADDR
-  dev: MTD alt: 21 name: nand_fsbl layout: RAW_ADDR
-  dev: MTD alt: 22 name: nand_ssbl1 layout: RAW_ADDR
-  dev: MTD alt: 23 name: nand_ssbl2 layout: RAW_ADDR
-  dev: MTD alt: 24 name: nand_UBI layout: RAW_ADDR
-  dev: VIRT alt: 25 name: OTP layout: RAW_ADDR
-  dev: VIRT alt: 26 name: PMIC layout: RAW_ADDR
+  dev: eMMC alt: 3 name: mmc0_fsbl1 layout: RAW_ADDR
+  dev: eMMC alt: 4 name: mmc0_fsbl2 layout: RAW_ADDR
+  dev: eMMC alt: 5 name: mmc0_ssbl layout: RAW_ADDR
+  dev: eMMC alt: 6 name: mmc0_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 7 name: mmc0_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 8 name: mmc0_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 9 name: mmc0_userfs layout: RAW_ADDR
+  dev: eMMC alt: 10 name: mmc1_boot1 layout: RAW_ADDR
+  dev: eMMC alt: 11 name: mmc1_boot2 layout: RAW_ADDR
+  dev: eMMC alt: 12 name: mmc1_ssbl layout: RAW_ADDR
+  dev: eMMC alt: 13 name: mmc1_bootfs layout: RAW_ADDR
+  dev: eMMC alt: 14 name: mmc1_vendorfs layout: RAW_ADDR
+  dev: eMMC alt: 15 name: mmc1_rootfs layout: RAW_ADDR
+  dev: eMMC alt: 16 name: mmc1_userfs layout: RAW_ADDR
+  dev: MTD alt: 17 name: nor0 layout: RAW_ADDR
+  dev: MTD alt: 18 name: nand0 layout: RAW_ADDR
+  dev: VIRT alt: 19 name: OTP layout: RAW_ADDR
+  dev: VIRT alt: 20 name: PMIC layout: RAW_ADDR
 
 All the supported device are exported for dfu-util tool::
 
   $> dfu-util -l
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=26, name="PMIC", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=25, name="OTP", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=24, name="nand_UBI", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=23, name="nand_ssbl2", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=22, name="nand_ssbl1", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=21, name="nand_fsbl", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="nor_env", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="nor_ssbl", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nor_fsbl2", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor_fsbl1", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="emmc_userfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="emmc_rootfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="emmc_vendorfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="emmc_bootfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="emmc_ssbl", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="emmc_fsbl2", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="emmc_fsbl1", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="sdcard_userfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="sdcard_rootfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="sdcard_vendorfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="sdcard_bootfs", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="sdcard_ssbl", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="sdcard_fsbl2", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="sdcard_fsbl1", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
-  Found DFU: [0483:5720] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=20, name="PMIC", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=19, name="OTP", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=18, name="nand0", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=17, name="nor0", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=16, name="mmc1_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=15, name="mmc1_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=14, name="mmc1_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=13, name="mmc1_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=12, name="mmc1_ssbl", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=11, name="mmc1_boot2", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=10, name="mmc1_boot1", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=9, name="mmc0_userfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=8, name="mmc0_rootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=7, name="mmc0_vendorfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=6, name="mmc0_bootfs", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=5, name="mmc0_ssbl", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=4, name="mmc0_fsbl2", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=3, name="mmc0_fsbl1", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=2, name="uramdisk.image.gz", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=1, name="devicetree.dtb", serial="002700333338511934383330"
+  Found DFU: [0483:df11] ver=9999, devnum=99, cfg=1, intf=0, alt=0, name="uImage", serial="002700333338511934383330"
 
 You can update the boot device:
 
@@ -614,20 +584,25 @@ You can update the boot device:
   $> dfu-util -d 0483:5720 -a 15 -D st-image-weston-openstlinux-weston-stm32mp1.ext4
   $> dfu-util -d 0483:5720 -a 16 -D st-image-userfs-openstlinux-weston-stm32mp1.ext4
 
-- NOR::
+- you can also dump the OTP and the PMIC NVM with::
+
+  $> dfu-util -d 0483:5720 -a 19 -U otp.bin
+  $> dfu-util -d 0483:5720 -a 20 -U pmic.bin
+
 
-  $> dfu-util -d 0483:5720 -a 17 -D tf-a-stm32mp157c-ev1-trusted.stm32
-  $> dfu-util -d 0483:5720 -a 18 -D tf-a-stm32mp157c-ev1-trusted.stm32
-  $> dfu-util -d 0483:5720 -a 19 -D u-boot-stm32mp157c-ev1-trusted.img
+When the board is booting for nor0 or nand0,
+only the MTD partition on the boot devices are available, for example:
 
-- NAND (UBI partition used for NAND only boot or NOR + NAND boot)::
+- NOR (nor0 = alt 20) & NAND (nand0 = alt 26) ::
 
   $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1-trusted.stm32
-  $> dfu-util -d 0483:5720 -a 22 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1-trusted.stm32
   $> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img
-  $> dfu-util -d 0483:5720 -a 24 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
+  $> dfu-util -d 0483:5720 -a 27 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
 
-- you can also dump the OTP and the PMIC NVM with::
+- NAND (nand0 = alt 21)::
 
-  $> dfu-util -d 0483:5720 -a 25 -U otp.bin
-  $> dfu-util -d 0483:5720 -a 26 -U pmic.bin
+  $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1-trusted.stm32
+  $> dfu-util -d 0483:5720 -a 23 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 24 -D u-boot-stm32mp157c-ev1-trusted.img
+  $> dfu-util -d 0483:5720 -a 25 -D st-image-weston-openstlinux-weston-stm32mp1_nand_4_256_multivolume.ubi
diff --git a/doc/board/toradex/colibri_imx7.rst b/doc/board/toradex/colibri_imx7.rst
index 6fb9526666..a30e721379 100644
--- a/doc/board/toradex/colibri_imx7.rst
+++ b/doc/board/toradex/colibri_imx7.rst
@@ -18,7 +18,6 @@ Build U-Boot
 .. code-block:: bash
 
     $ export CROSS_COMPILE=arm-linux-gnueabi-
-    $ export ARCH=arm
     $ make colibri_imx7_emmc_defconfig # For NAND: colibri_imx7_defconfig
     $ make
 
diff --git a/doc/develop/crash_dumps.rst b/doc/develop/crash_dumps.rst
new file mode 100644
index 0000000000..18696372fc
--- /dev/null
+++ b/doc/develop/crash_dumps.rst
@@ -0,0 +1,122 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright (c) 2020 Heinrich Schuchardt
+
+Analyzing crash dumps
+=====================
+
+When the CPU detects an instruction that it cannot execute it raises an
+interrupt. U-Boot than writes a crash dump. This chapter describes how such
+dump can be analyzed.
+
+Creating a crash dump voluntarily
+---------------------------------
+
+For describing the analysis of a crash dump we need an example. U-Boot comes
+with a command 'exception' that comes in handy here. The command is enabled
+by::
+
+    CONFIG_CMD_EXCEPTION=y
+
+The example output below was recorded when running qemu\_arm64\_defconfig on
+QEMU::
+
+    => exception undefined
+    "Synchronous Abort" handler, esr 0x02000000
+    elr: 00000000000101fc lr : 00000000000214ec (reloc)
+    elr: 000000007ff291fc lr : 000000007ff3a4ec
+    x0 : 000000007ffbd7f8 x1 : 0000000000000000
+    x2 : 0000000000000001 x3 : 000000007eedce18
+    x4 : 000000007ff291fc x5 : 000000007eedce50
+    x6 : 0000000000000064 x7 : 000000007eedce10
+    x8 : 0000000000000000 x9 : 0000000000000004
+    x10: 6db6db6db6db6db7 x11: 000000000000000d
+    x12: 0000000000000006 x13: 000000000001869f
+    x14: 000000007edd7dc0 x15: 0000000000000002
+    x16: 000000007ff291fc x17: 0000000000000000
+    x18: 000000007eed8dc0 x19: 0000000000000000
+    x20: 000000007ffbd7f8 x21: 0000000000000000
+    x22: 000000007eedce10 x23: 0000000000000002
+    x24: 000000007ffd4c80 x25: 0000000000000000
+    x26: 0000000000000000 x27: 0000000000000000
+    x28: 000000007eedce70 x29: 000000007edd7b40
+
+    Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
+    Resetting CPU ...
+
+    resetting ...
+
+The first line provides us with the type of interrupt that occurred.
+(On ARMv8 a synchronous abort is an exception where the return address stored
+in the ESR register indicates the instruction that caused the exception.)
+
+The second line provides the contents of the elr and the lr register after
+subtracting the relocation offset. - U-Boot relocates itself after being
+loaded. - The relocation offset can also be displayed using the bdinfo command.
+
+After the contents of the registers we get a line indicating the machine
+code of the instructions preceding the crash and in parentheses the instruction
+leading to the dump.
+
+Analyzing the code location
+---------------------------
+
+We can convert the instructions in the line starting with 'Code:' into mnemonics
+using the objdump command. To make things easier scripts/decodecode is
+supplied::
+
+    $echo 'Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)' | \
+      CROSS_COMPILE=aarch64-linux-gnu- ARCH=arm64 scripts/decodecode
+    Code: b00003c0 912ad000 940029d6 17ffff52 (e7f7defb)
+    All code
+    ========
+       0:   b00003c0     adrp   x0, 0x79000
+       4:   912ad000     add    x0, x0, #0xab4
+       8:   940029d6     bl     0xa760
+       c:   17ffff52     b      0xfffffffffffffd54
+      10:*  e7f7defb     .inst  0xe7f7defb ; undefined <-- trapping instruction
+
+    Code starting with the faulting instruction
+    ===========================================
+       0:   e7f7defb     .inst  0xe7f7defb ; undefined
+
+Now lets use the locations provided by the elr and lr registers after
+subtracting the relocation offset to find out where in the code the crash
+occurred and from where it was invoked.
+
+File u-boot.map contains the memory layout of the U-Boot binary. Here we find
+these lines::
+
+   .text.do_undefined
+                  0x00000000000101fc        0xc cmd/built-in.o
+   .text.exception_complete
+                  0x0000000000010208       0x90 cmd/built-in.o
+   ...
+   .text.cmd_process
+                  0x00000000000213b8      0x164 common/built-in.o
+                  0x00000000000213b8                cmd_process
+   .text.cmd_process_error
+                  0x000000000002151c       0x40 common/built-in.o
+                  0x000000000002151c                cmd_process_error
+
+So the error occurred at the start of function do\_undefined() and this
+function was invoked from somewhere inside function cmd\_process().
+
+If we want to dive deeper, we can disassemble the U-Boot binary::
+
+    $ aarch64-linux-gnu-objdump -S -D u-boot | less
+
+    00000000000101fc <do_undefined>:
+    {
+            /*
+             * 0xe7f...f.   is undefined in ARM mode
+             * 0xde..       is undefined in Thumb mode
+            */
+            asm volatile (".word 0xe7f7defb\n");
+       101fc:       e7f7defb        .inst   0xe7f7defb ; undefined
+            return CMD_RET_FAILURE;
+    }
+    10200:       52800020        mov     w0, #0x1        // #1
+    10204:       d65f03c0        ret
+
+This example is based on the ARMv8 architecture but the same procedures can be
+used on other architectures as well.
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
new file mode 100644
index 0000000000..072db63b5c
--- /dev/null
+++ b/doc/develop/index.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+Develop U-Boot
+==============
+
+
+.. toctree::
+   :maxdepth: 2
+
+   crash_dumps
diff --git a/doc/device-tree-bindings/device.txt b/doc/device-tree-bindings/device.txt
new file mode 100644
index 0000000000..27bd3978d9
--- /dev/null
+++ b/doc/device-tree-bindings/device.txt
@@ -0,0 +1,36 @@
+Devices
+=======
+
+Device bindings are described by their own individual binding files.
+
+U-Boot provides for some optional properties which are documented here. See
+also hid-over-i2c.txt which describes HID devices. See also
+Documentation/firmware-guide/acpi/enumeration.rst in the Linux kernel for
+the acpi,compatible property.
+
+ - acpi,has-power-resource : (boolean) true if this device has a power resource.
+    This causes an ACPI PowerResource to be written containing the properties
+    provided by this binding, to describe how to handle powering the device up
+    and down using GPIOs
+ - acpi,compatible : compatible string to report
+ - acpi,ddn : Contains the string to use as the _DDN (DOS (Disk Operating
+    System) Device Name)
+ - acpi,hid : Contains the string to use as the HID (Hardware ID)
+    identifier _HID
+ - acpi,uid : _UID value for device
+ - linux,probed : Tells U-Boot to add 'linux,probed' to the ACPI tables so that
+    Linux will only load the driver if the device can be detected (e.g. on I2C
+    bus). Note that this is an out-of-tree Linux feature.
+
+
+Example
+-------
+
+elan_touchscreen: elan-touchscreen@10 {
+	compatible = "i2c-chip";
+	reg = <0x10>;
+	acpi,hid = "ELAN0001";
+	acpi,ddn = "ELAN Touchscreen";
+	interrupts-extended = <&acpi_gpe GPIO_21_IRQ IRQ_TYPE_EDGE_FALLING>;
+	linux,probed;
+};
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
new file mode 100644
index 0000000000..647a0862d4
--- /dev/null
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt
@@ -0,0 +1,320 @@
+* Intel FSP-M configuration
+
+Several Intel platforms require the execution of the Intel FSP (Firmware
+Support Package) for initialization. The FSP consists of multiple parts, one
+of which is the FSP-M (Memory initialization phase).
+
+This binding applies to the FSP-M for the Intel Apollo Lake SoC.
+
+The FSP-M is available on Github [1].
+For detailed information on the FSP-M parameters see the documentation in
+FSP/ApolloLakeFspBinPkg/Docs [2].
+
+The properties of this binding are all optional. If no properties are set the
+values of the FSP-M are used.
+
+[1] https://github.com/IntelFsp/FSP
+[2] https://github.com/IntelFsp/FSP/tree/master/ApolloLakeFspBinPkg/Docs
+
+Optional properties:
+- fspm,serial-debug-port-address: Debug Serial Port Base address
+- fspm,serial-debug-port-type: Debug Serial Port Type
+  0: NONE
+  1: I/O
+  2: MMIO (default)
+- fspm,serial-debug-port-device: Serial Port Debug Device
+  0: SOC UART0
+  1: SOC UART1
+  2: SOC UART2 (default)
+  3: External Device
+- fspm,serial-debug-port-stride-size: Debug Serial Port Stride Size
+  0: 1
+  2: 4 (default)
+- fspm,mrc-fast-boot: Memory Fast Boot
+- fspm,igd: Integrated Graphics Device
+- fspm,igd-dvmt50-pre-alloc: DVMT Pre-Allocated
+  0x02: 64 MB (default)
+  0x03: 96 MB
+  0x04: 128 MB
+  0x05: 160 MB
+  0x06: 192 MB
+  0x07: 224 MB
+  0x08: 256 MB
+  0x09: 288 MB
+  0x0A: 320 MB
+  0x0B: 352 MB
+  0x0C: 384 MB
+  0x0D: 416 MB
+  0x0E: 448 MB
+  0x0F: 480 MB
+  0x10: 512 MB
+- fspm,aperture-size: Aperture Size
+  0x1: 128 MB (default)
+  0x2: 256 MB
+  0x3: 512 MB
+- fspm,gtt-size: GTT Size
+  0x1: 2 MB
+  0x2: 4 MB
+  0x3: 8 MB (default)
+- fspm,primary-video-adaptor: Primary Display
+  0x0: AUTO (default)
+  0x2: IGD
+  0x3: PCI
+- fspm,package: Package
+  0x0: SODIMM (default)
+  0x1: BGA
+  0x2: BGA mirrored (LPDDR3 only)
+  0x3: SODIMM/UDIMM with Rank 1 Mirrored (DDR3L)
+- fspm,profile: Profile
+  0x01: WIO2_800_7_8_8
+  0x02: WIO2_1066_9_10_10
+  0x03: LPDDR3_1066_8_10_10
+  0x04: LPDDR3_1333_10_12_12
+  0x05: LPDDR3_1600_12_15_15
+  0x06: LPDDR3_1866_14_17_17
+  0x07: LPDDR3_2133_16_20_20
+  0x08: LPDDR4_1066_10_10_10
+  0x09: LPDDR4_1600_14_15_15
+  0x0A: LPDDR4_2133_20_20_20
+  0x0B: LPDDR4_2400_24_22_22
+  0x0C: LPDDR4_2666_24_24_24
+  0x0D: LPDDR4_2933_28_27_27
+  0x0E: LPDDR4_3200_28_29_29
+  0x0F: DDR3_1066_6_6_6
+  0x10: DDR3_1066_7_7_7
+  0x11: DDR3_1066_8_8_8
+  0x12: DDR3_1333_7_7_7
+  0x13: DDR3_1333_8_8_8
+  0x14: DDR3_1333_9_9_9
+  0x15: DDR3_1333_10_10_10
+  0x16: DDR3_1600_8_8_8
+  0x17: DDR3_1600_9_9_9
+  0x18: DDR3_1600_10_10_10
+  0x19: DDR3_1600_11_11_11 (default)
+  0x1A: DDR3_1866_10_10_10
+  0x1B: DDR3_1866_11_11_11
+  0x1C: DDR3_1866_12_12_12
+  0x1D: DDR3_1866_13_13_13
+  0x1E: DDR3_2133_11_11_11
+  0x1F: DDR3_2133_12_12_12
+  0x20: DDR3_2133_13_13_13
+  0x21: DDR3_2133_14_14_14
+  0x22: DDR4_1333_10_10_10
+  0x23: DDR4_1600_10_10_10
+  0x24: DDR4_1600_11_11_11
+  0x25: DDR4_1600_12_12_12
+  0x26: DDR4_1866_12_12_12
+  0x27: DDR4_1866_13_13_13
+  0x28: DDR4_1866_14_14_14
+  0x29: DDR4_2133_14_14_14
+  0x2A: DDR4_2133_15_15_15
+  0x2B: DDR4_2133_16_16_16
+  0x2C: DDR4_2400_15_15_15
+  0x2D: DDR4_2400_16_16_16
+  0x2E: DDR4_2400_17_17_17
+  0x2F: DDR4_2400_18_18_18
+- fspm,memory-down: Memory Down
+  0x0: No (default)
+  0x1: Yes
+  0x2: 1MD+SODIMM (for DDR3L only) ACRD
+  0x3: 1x32 LPDDR4
+- fspm,ddr3l-page-size: DDR3LPageSize
+  0x1: 1KB (default)
+  0x2: 2KB
+- fspm,ddr3-lasr: DDR3LASR
+- fspm,scrambler-support: ScramblerSupport
+- fspm,interleaved-mode: InterleavedMode
+- fspm,channel-hash-mask: ChannelHashMask
+- fspm,fspm,slice-hash-mask: SliceHashMask
+- fspm,channels-slices-enable: ChannelsSlices
+- fspm,min-ref-rate2x-enable: MinRefRate2x
+- fspm,dual-rank-support-enable: DualRankSupport
+- fspm,rmt-mode: RmtMode
+- fspm,memory-size-limit: MemorySizeLimit
+- fspm,low-memory-max-value: LowMemoryMaxValue
+- fspm,high-memory-max-value: HighMemoryMaxValue
+- fspm,disable-fast-boot: FastBoot
+- fspm,dimm0-spd-address: DIMM0 SPD Address
+- fspm,dimm1-spd-address: DIMM1 SPD Address
+- fspm,chX-rank-enable: Must be set to enable rank (X = 0-3)
+- fspm,chX-device-width: DRAM device width per DRAM channel (X = 0-3)
+  0: x8
+  1: x16
+  2: x32
+  3: x64
+- fspm,chX-dram-density: Must specify the DRAM device density (X = 0-3)
+  0: 4Gb
+  1: 6Gb
+  2: 8Gb
+  3: 12Gb
+  4: 16Gb
+  5: 2Gb
+- fspm,chX-option: Channel options (X = 0-3)
+- fspm,chX-odt-config: Channel Odt Config (X = 0-3)
+- fspm,chX-mode2-n: Force 2N Mode (X = 0-3)
+  0x0: Auto
+  0x1: Force 2N CMD Timing Mode
+- fspm,chX-odt-levels: Channel Odt Levels (X = 0-3)
+  0: ODT Connected to SoC
+  1: ODT held high
+- fspm,rmt-check-run: RmtCheckRun
+- fspm,rmt-margin-check-scale-high-threshold: RmtMarginCheckScaleHighThreshold
+- fspm,ch-bit-swizzling: Bit_swizzling
+- fspm,msg-level-mask: MsgLevelMask
+- fspm,pre-mem-gpio-table-pin-num: PreMem GPIO Pin Number for each table
+- fspm,pre-mem-gpio-table-ptr: PreMem GPIO Table Pointer
+- fspm,pre-mem-gpio-table-entry-num: PreMem GPIO Table Entry Number
+- fspm,enhance-port8xh-decoding: Enhance the port 8xh decoding
+- fspm,spd-write-enable: SPD Data Write
+- fspm,mrc-data-saving: MRC Training Data Saving
+- fspm,oem-loading-base: OEM File Loading Address
+- fspm,oem-file-name: OEM File Name to Load
+- fspm,mrc-boot-data-ptr:
+- fspm,e-mmc-trace-len: eMMC Trace Length
+  0x0: Long
+  0x1: Short
+- fspm,skip-cse-rbp: Skip CSE RBP to support zero sized IBB
+- fspm,npk-en: Npk Enable
+   0: Disable
+   1: Enable
+   2: Debugger
+   3: Auto (default)
+- fspm,fw-trace-en: FW Trace Enable
+- fspm,fw-trace-destination: FW Trace Destination
+  1: NPK_TRACE_TO_MEMORY
+  2: NPK_TRACE_TO_DCI
+  3: NPK_TRACE_TO_BSSB
+  4: NPK_TRACE_TO_PTI (default)
+- fspm,recover-dump: NPK Recovery Dump
+- fspm,msc0-wrap: Memory Region 0 Buffer WrapAround
+  0: n0-warp
+  1: n1-warp (default)
+- fspm,msc1-wrap: Memory Region 1 Buffer WrapAround
+  0: n0-warp
+  1: n1-warp (default)
+- fspm,msc0-size: Memory Region 0 Buffer Size
+  0: 0MB (default)
+  1: 1MB
+  2: 8MB
+  3: 64MB
+  4: 128MB
+  5: 256MB
+  6: 512MB
+  7: 1GB
+- fspm,msc1-size: Memory Region 1 Buffer Size
+  0: 0MB (default)
+  1: 1MB
+  2: 8MB
+  3: 64MB
+  4: 128MB
+  5: 256MB
+  6: 512MB
+  7: 1GB
+- fspm,pti-mode: PTI Mode
+  0: 0ff
+  1: x4 (default)
+  2: x8
+  3: x12
+  4: x16
+- fspm,pti-training: PTI Training
+  0: off (default)
+  1-6: 1-6
+- fspm,pti-speed:
+  0: full
+  1: half
+  2: quarter (default)
+- fspm,punit-mlvl: Punit Message Level
+  0:
+  1: (default)
+  2-4: 2-4
+- fspm,pmc-mlvl: PMC Message Level
+  0:
+  1: (default)
+  2-4: 2-4
+- fspm,sw-trace-en: SW Trace Enable
+- fspm,periodic-retraining-disable: Periodic Retraining Disable
+- fspm,enable-reset-system: Enable Reset System
+- fspm,enable-s3-heci2: Enable HECI2 in S3 resume path
+- fspm,variable-nvs-buffer-ptr:
+
+Example:
+
+&host_bridge {
+	fspm,package = <PACKAGE_BGA>;
+	fspm,profile = <PROFILE_LPDDR4_2400_24_22_22>;
+	fspm,memory-down = <MEMORY_DOWN_YES>;
+	fspm,scrambler-support = <1>;
+	fspm,interleaved-mode = <INTERLEAVED_MODE_ENABLE>;
+	fspm,channel-hash-mask = <0x36>;
+	fspm,slice-hash-mask = <0x9>;
+	fspm,low-memory-max-value = <2048>;
+	fspm,ch0-rank-enable = <1>;
+	fspm,ch0-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch0-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch0-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch0-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch1-rank-enable = <1>;
+	fspm,ch1-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch1-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch1-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch1-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch2-rank-enable = <1>;
+	fspm,ch2-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch2-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch2-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch2-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,ch3-rank-enable = <1>;
+	fspm,ch3-device-width = <CHX_DEVICE_WIDTH_X16>;
+	fspm,ch3-dram-density = <CHX_DEVICE_DENSITY_8GB>;
+	fspm,ch3-option = <(CHX_OPTION_RANK_INTERLEAVING |
+			   CHX_OPTION_BANK_ADDRESS_HASHING_ENABLE)>;
+	fspm,ch3-odt-config = <CHX_ODT_CONFIG_DDR4_CA_ODT>;
+	fspm,fspm,skip-cse-rbp = <1>;
+
+	fspm,ch-bit-swizzling = /bits/ 8 <
+		/* LP4_PHYS_CH0A */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		6 7 5 4 3 1 0 2
+		/* DQA[8:15] pins of LPDDR4 module */
+		12 10 11 13 14 8 9 15
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		16 22 23 20 18 17 19 21
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		30 28 29 25 24 26 27 31
+
+		/* LP4_PHYS_CH0B */
+		/* DQA[0:7] pins of LPDDR4 module */
+		7 3 5 2 6 0 1 4
+		/* DQA[8:15] pins of LPDDR4 module */
+		 9 14 12 13 10 11 8 15
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		20 22 23 16 19 17 18 21
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		28 24 26 27 29 30 31 25
+
+		/* LP4_PHYS_CH1A */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		2 1 6 7 5 4 3 0
+		/* DQA[8:15] pins of LPDDR4 module */
+		11 10 8 9 12 15 13 14
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		17 23 19 16 21 22 20 18
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		31 29 26 25 28 27 24 30
+
+		/* LP4_PHYS_CH1B */
+
+		/* DQA[0:7] pins of LPDDR4 module */
+		4 3 7 5 6 1 0 2
+		/* DQA[8:15] pins of LPDDR4 module */
+		15 9 8 11 14 13 12 10
+		/* DQB[0:7] pins of LPDDR4 module with offset of 16 */
+		20 23 22 21 18 19 16 17
+		/* DQB[7:15] pins of LPDDR4 module with offset of 16 */
+		25 28 30 31 26 27 24 29>;
+};
diff --git a/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
new file mode 100644
index 0000000000..973d253ada
--- /dev/null
+++ b/doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt
@@ -0,0 +1,483 @@
+* Intel FSP-S configuration
+
+Several Intel platforms require the execution of the Intel FSP (Firmware
+Support Package) for initialization. The FSP consists of multiple parts, one
+of which is the FSP-S (Silicon initialization phase).
+
+This binding applies to the FSP-S for the Intel Apollo Lake SoC.
+
+The FSP-S is available on Github [1].
+For detailed information on the FSP-S parameters see the documentation in
+FSP/ApolloLakeFspBinPkg/Docs [2].
+
+The properties of this binding are all optional. If no properties are set the
+values of the FSP-S are used.
+
+[1] https://github.com/IntelFsp/FSP
+[2] https://github.com/IntelFsp/FSP/tree/master/ApolloLakeFspBinPkg/Docs
+
+Optional properties:
+- fsps,active-processor-cores: ActiveProcessorCores
+- fsps,disable-core1: Disable Core1
+- fsps,disable-core2: Disable Core2
+- fsps,disable-core2: Disable Core3
+- fsps,vmx-enable: VMX Enable
+- fsps,proc-trace-mem-size: Memory region allocation for Processor Trace
+  0xFF: Disable (default)
+- fsps,proc-trace-enable: Enable Processor Trace
+- fsps,eist: Eist
+- fsps,boot-p-state: Boot PState
+  0: HFM (default)
+  1: LFM
+- fsps,enable-cx: CPU power states (C-states)
+- fsps,c1e: Enhanced C-states
+- fsps,bi-proc-hot: Bi-Directional PROCHOT#
+- fsps,pkg-c-state-limit: Max Pkg Cstate
+  0: PkgC0C1
+  1: PkgC2
+  2: PkgC3 (default)
+  3: PkgC6
+  4: PkgC7
+  5: PkgC7s
+  6: PkgC8
+  7: PkgC9
+  8: PkgC10
+  9: PkgCMax
+  254: PkgCpuDefault
+  255: PkgAuto
+- fsps,c-state-auto-demotion: C-State auto-demotion
+  0: Disable C1 and C3 Auto-demotion (default)
+  1: Enable C3/C6/C7 Auto-demotion to C1
+  2: Enable C6/C7 Auto-demotion to C3
+  3: Enable C6/C7 Auto-demotion to C1 and C3
+- fsps,c-state-un-demotion: C-State un-demotion
+  0: Disable C1 and C3 Un-demotion (default)
+  1: Enable C1 Un-demotion
+  2: Enable C3 Un-demotion
+  3: Enable C1 and C3 Un-demotion
+- fsps,max-core-c-state: Max Core C-State
+  0: Unlimited
+  1: C1
+  2: C3
+  3: C6
+  4: C7
+  5: C8
+  6: C9
+  7: C10
+  8: CCx (default)
+- fsps,pkg-c-state-demotion: Package C-State Demotion
+- fsps,pkg-c-state-un-demotion: Package C-State Un-demotion
+- fsps,turbo-mode: Turbo Mode
+- fsps,hda-verb-table-entry-num: SC HDA Verb Table Entry Number
+  0: (default)
+- fsps,hda-verb-table-ptr: SC HDA Verb Table Pointer
+  0x00000000: (default)
+- fsps,p2sb-unhide: Enable/Disable P2SB device hidden
+- fsps,ipu-en: IPU Enable/Disable
+- fsps,ipu-acpi-mode: IMGU ACPI mode selection
+  0: Auto
+  1: IGFX Child device (default)
+  2: ACPI device
+- fsps,force-wake: Enable ForceWake
+- fsps,gtt-mm-adr: GttMmAdr
+  0xbf000000: (default)
+- fsps,gm-adr: GmAdr
+  0xa0000000: (default)
+- fsps,pavp-lock: Enable PavpLock
+- fsps,graphics-freq-modify: Enable GraphicsFreqModify
+- fsps,graphics-freq-req: Enable GraphicsFreqReq
+- fsps,graphics-video-freq: Enable GraphicsVideoFreq
+- fsps,pm-lock: Enable PmLock
+- fsps,dop-clock-gating: Enable DopClockGating
+- fsps,unsolicited-attack-override: Enable UnsolicitedAttackOverride
+- fsps,wopcm-support: Enable WOPCMSupport
+- fsps,wopcm-size: Enable WOPCMSize
+- fsps,power-gating: Enable PowerGating
+- fsps,unit-level-clock-gating: Enable UnitLevelClockGating
+- fsps,fast-boot: Enable FastBoot
+- fsps,dyn-sr: Enable DynSR
+- fsps,sa-ipu-enable: Enable SaIpuEnable
+- fsps,pm-support: GT PM Support
+- fsps,enable-render-standby: RC6(Render Standby)
+- fsps,logo-size: BMP Logo Data Size
+- fsps,logo-ptr: BMP Logo Data Pointer
+- fsps,graphics-config-ptr: Graphics Configuration Data Pointer
+- fsps,pavp-enable: PAVP Enable
+- fsps,pavp-pr3: PAVP PR3
+- fsps,cd-clock: CdClock Frequency selection
+  0: 144MHz
+  1: 288MHz
+  2: 384MHz
+  3: 576MHz
+  4: 624MHz (default)
+- fsps,pei-graphics-peim-init: Enable/Disable PeiGraphicsPeimInit
+- fsps,write-protection-enable: Write Protection Support
+- fsps,read-protection-enable: Read Protection Support
+- fsps,protected-range-limit: Protected Range Limitation
+  0x0FFF: (default)
+- fsps,protected-range-base: Protected Range Base
+  0x0000: (default)
+- fsps,gmm: Enable SC Gaussian Mixture Models
+- fsps,clk-gating-pgcb-clk-trunk: GMM Clock Gating - PGCB Clock Trunk
+- fsps,clk-gating-sb: GMM Clock Gating - Sideband
+- fsps,clk-gating-sb-clk-trunk: GMM Clock Gating - Sideband
+- fsps,clk-gating-sb-clk-partition: GMM Clock Gating - Sideband Clock
+  Partition
+- fsps,clk-gating-core: GMM Clock Gating - Core
+- fsps,clk-gating-dma: GMM Clock Gating - DMA
+- fsps,clk-gating-reg-access: GMM Clock Gating - Register Access
+- fsps,clk-gating-host: GMM Clock Gating - Host
+- fsps,clk-gating-partition: GMM Clock Gating - Partition
+- fsps,clk-gating-trunk: Clock Gating - Trunk
+- fsps,hda-enable: HD Audio Support
+- fsps,dsp-enable: HD Audio DSP Support
+- fsps,pme: Azalia wake-on-ring
+- fsps,hd-audio-io-buffer-ownership: HD-Audio I/O Buffer Ownership
+  0: HD-Audio link owns all the I/O buffers (default)
+  1: HD-Audio link owns 4 I/O buffers and I2S port owns 4 I/O buffers
+  3: I2S port owns all the I/O buffers
+- fsps,hd-audio-io-buffer-voltage: HD-Audio I/O Buffer Voltage
+  0: 3.3V (default)
+  1: 1.8V
+- fsps,hd-audio-vc-type: HD-Audio Virtual Channel Type
+  0: VC0 (default)
+  1: VC1
+- fsps,hd-audio-link-frequency: HD-Audio Link Frequency
+  0: 6MHz (default)
+  1: 12MHz
+  2: 24MHz
+  3: 48MHz
+  4: 96MHz
+  5: Invalid
+- fsps,hd-audio-i-disp-link-frequency: HD-Audio iDisp-Link Frequency
+  0: 6MHz (default)
+  1: 12MHz
+  2: 24MHz
+  3: 48MHz
+  4: 96MHz
+  5: Invalid
+- fsps,hd-audio-i-disp-link-tmode: HD-Audio iDisp-Link T-Mode
+  0: 2T (default)
+  1: 1T
+- fsps,dsp-endpoint-dmic: HD-Audio Disp DMIC
+  0: disable,
+  1: 2ch array (default)
+  2: 4ch array
+- fsps,dsp-endpoint-bluetooth: HD-Audio Bluetooth
+- fsps,dsp-endpoint-i2s-skp: HD-Audio I2S SHK
+- fsps,dsp-endpoint-i2s-hp: HD-Audio I2S HP
+- fsps,audio-ctl-pwr-gate: HD-Audio Controller Power Gating (deprecated)
+- fsps,audio-dsp-pwr-gate: HD-Audio ADSP Power Gating (deprecated)
+- fsps,mmt: HD-Audio CSME Memory Transfers
+  0: VC0 (default)
+  1: VC2
+- fsps,hmt: HD-Audio Host Memory Transfers
+  0: VC0 (default)
+  1: VC2
+- fsps,hd-audio-pwr-gate: HD-Audio Power Gating
+- fsps,hd-audio-clk-gate: HD-Audio Clock Gating
+- fsps,dsp-feature-mask: Bitmask of DSP Feature
+  0x01: WoV
+  0x02: BT Sideband
+  0x04: Codec VAD
+  0x20: BT Intel HFP
+  0x40: BT Intel A2DP
+  0x80: DSP based speech pre-processing disabled
+- fsps,dsp-pp-module-mask: Bitmask of supported DSP Post-Processing Modules
+  0x01: WoV
+  0x02: BT Sideband
+  0x04: Codec VAD
+  0x20: BT Intel HFP
+  0x40: BT Intel A2DP
+  0x80: DSP based speech pre-processing disabled
+- fsps,bios-cfg-lock-down: HD-Audio BIOS Configuration Lock Down
+- fsps,hpet: Enable High Precision Timer
+- fsps,hpet-bdf-valid: Hpet Valid BDF Value
+- fsps,hpet-bus-number: Bus Number of Hpet
+  0xFA: (default)
+- fsps,hpet-device-number: Device Number of Hpet
+  0x1F: (default)
+- fsps,hpet-function-number: Function Number of Hpet
+  0x00: (default)
+- fsps,io-apic-bdf-valid: IoApic Valid BDF Value
+- fsps,io-apic-bus-number: Bus Number of IoApic
+  0xFA: (default)
+- fsps,io-apic-device-number: Device Number of IoApic
+  0x0F: (default)
+- fsps,io-apic-function-number: Function Number of IoApic
+  0x00: (default)
+- fsps,io-apic-entry24-119: IOAPIC Entry 24-119
+- fsps,io-apic-id: IO APIC ID
+  0x01: (default)
+- fsps,io-apic-range-select: IoApic Range
+  0x00: (default)
+- fsps,ish-enable: ISH Controller
+- fsps,bios-interface: BIOS Interface Lock Down
+- fsps,bios-lock: Bios LockDown Enable
+- fsps,spi-eiss: SPI EISS Status
+- fsps,bios-lock-sw-smi-number: BiosLock SWSMI Number
+  0xA9: (default)
+- fsps,lpss-s0ix-enable: LPSS IOSF PMCTL S0ix Enable
+- fsps,i2c-clk-gate-cfg: LPSS I2C Clock Gating Configuration
+- fsps,hsuart-clk-gate-cfg: LPSS HSUART Clock Gating Configuration
+- fsps,spi-clk-gate-cfg: LPSS SPI Clock Gating Configuration
+- fsps,i2cX-enable: 2C Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,hsuartX-enable: UART Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,spiX-enable: SPI UART Device X
+  0: Disabled
+  1: PCI Mode (default)
+  2: ACPI Mode
+- fsps,os-dbg-enable: OS Debug Feature
+- fsps,dci-en: DCI Feature
+- fsps,uart2-kernel-debug-base-address: UART Debug Base Address
+  0x00000000: (default)
+- fsps,pcie-clock-gating-disabled: Enable PCIE Clock Gating
+- fsps,pcie-root-port8xh-decode: Enable PCIE Root Port 8xh Decode
+- fsps,pcie8xh-decode-port-index: PCIE 8xh Decode Port Index
+  0x00: (default)
+- fsps,pcie-root-port-peer-memory-write-enable: Enable PCIE Root Port Peer
+						Memory Write
+- fsps,pcie-aspm-sw-smi-number: PCIE SWSMI Number
+  0xAA: (default)
+- fsps,pcie-root-port-en: PCI Express Root Port
+- fsps,pcie-rp-hide: Hide PCIE Root Port Configuration Space
+- fsps,pcie-rp-slot-implemented: PCIE Root Port Slot Implement
+- fsps,pcie-rp-hot-plug: Hot Plug
+- fsps,pcie-rp-pm-sci: PCIE PM SCI
+- fsps,pcie-rp-ext-sync: PCIE Root Port Extended Sync
+- fsps,pcie-rp-transmitter-half-swing: Transmitter Half Swing
+- fsps,pcie-rp-acs: ACS
+- fsps,pcie-rp-clk-req-supported: Clock Request Support
+- fsps,pcie-rp-clk-req-number: Configure CLKREQ Number
+- fsps,pcie-rp-clk-req-detect: CLKREQ# Detection
+- fsps,advanced-error-reportingt: Advanced Error Reporting
+- fsps,pme-interrupt: PME Interrupt
+- fsps,fatal-error-report: URR
+- fsps,no-fatal-error-report: FER
+- fsps,correctable-error-report: NFER
+- fsps,system-error-on-fatal-error: CER
+- fsps,system-error-on-non-fatal-error: SEFE
+- fsps,system-error-on-correctable-error: SENFE
+- fsps,pcie-rp-speed: SECE
+- fsps,physical-slot-number: PCIe Speed
+  0: Auto (default)
+  1: Gen1
+  2: Gen2
+  3: Gen3
+- fsps,pcie-rp-completion-timeout: Physical Slot Number
+  0x00, 0x01, 0x02, 0x03, 0x04, 0x05 (default)
+- fsps,enable-ptm: PTM Support
+- fsps,pcie-rp-aspm: ASPM
+- fsps,pcie-rp-l1-substates: L1 Substates
+- fsps,pcie-rp-ltr-enable: PCH PCIe LTR
+- fsps,pcie-rp-ltr-config-lock: PCIE LTR Lock
+- fsps,pme-b0-s5-di: PME_B0_S5 Disable bit
+- fsps,pci-clock-run: PCI Clock Run
+- fsps,timer8254-clk-setting: Enable/Disable Timer 8254 Clock Setting
+- fsps,enable-sata: Chipset SATA
+- fsps,sata-mode: SATA Mode Selection
+  0: AHCI (default)
+  1: RAID
+- fsps,sata-salp-support: Aggressive LPM Support
+- fsps,sata-pwr-opt-enable: SATA Power Optimization
+- fsps,e-sata-speed-limit: eSATA Speed Limit
+- fsps,speed-limit: SATA Speed Limit
+  0x1: 1.5Gb/s(Gen 1)
+  0x2: 3Gb/s(Gen 2)
+  0x3: 6Gb/s(Gen 3)
+- fsps,sata-ports-enable: SATA Port
+- fsps,sata-ports-dev-slp: SATA Port DevSlp
+- fsps,sata-ports-hot-plug: SATA Port HotPlug
+- fsps,sata-ports-interlock-sw: Mechanical Presence Switch
+- fsps,sata-ports-external: External SATA Ports
+- fsps,sata-ports-spin-up: Spin Up Device
+- fsps,sata-ports-solid-state-drive: SATA Solid State
+  0: Hard Disk Drive (default)
+  1: Solid State Drive
+- fsps,sata-ports-enable-dito-config: DITO Configuration
+- fsps,sata-ports-dm-val: DM Value
+  0x0F: Maximum (default)
+- fsps,sata-ports-dito-val: DITO Value
+  0x0271 (default)
+- fsps,sub-system-vendor-id: Subsystem Vendor ID
+  0x8086: (default)
+- fsps,sub-system-id: Subsystem ID
+  0x7270: (default)
+- fsps,crid-setting: CRIDSettings
+  0: Disable (default)
+  1: CRID_1
+  2: CRID_2
+  3: CRID_3
+- fsps,reset-select: ResetSelect
+  0x6: warm reset (default)
+  0xE: cold reset
+- fsps,sdcard-enabled: SD Card Support (D27:F0)
+- fsps,e-mmc-enabled: SeMMC Support (D28:F0)
+- fsps,emmc-host-max-speed: eMMC Max Speed
+  0: HS400(default)
+  1: HS200
+  2: DDR50
+- fsps,ufs-enabled: UFS Support (D29:F0)
+- fsps,sdio-enabled: SDIO Support (D30:F0)
+- fsps,gpp-lock: GPP Lock Feature
+- fsps,sirq-enable: Serial IRQ
+- fsps,sirq-mode: Serial IRQ Mode
+  0: Quiet mode (default)
+  1: Continuous mode
+- fsps,start-frame-pulse: Start Frame Pulse Width
+  0: ScSfpw4Clk (default)
+  1: ScSfpw6Clk
+  2: ScSfpw8Clk
+- fsps,smbus-enable: SMBus
+- fsps,arp-enable: SMBus ARP Support
+- fsps,num-rsvd-smbus-addresses: SMBus Table Elements
+  0x0080: (default)
+- fsps,rsvd-smbus-address-table: Reserved SMBus Address Table
+   0x00: (default)
+- fsps,disable-compliance-mode: XHCI Disable Compliance Mode
+- fsps,usb-per-port-ctl: USB Per-Port Control
+- fsps,usb30-mode: xHCI Mode
+  0: Disable
+  1: Enable
+  2: Auto (default)
+- fsps,port-usb20-enable: Enable USB2 ports
+- fsps,port-usb20-over-current-pin: USB20 Over Current Pin
+- fsps,usb-otg: XDCI Support
+  0: Disable
+  1: PCI_Mode (default)
+  2: ACPI_mode
+- fsps,hsic-support-enable: Enable XHCI HSIC Support
+- fsps,port-usb30-enable: Enable USB3 ports
+- fsps,port-usb30-over-current-pin: USB30 Over Current Pin
+- fsps,ssic-port-enable: Enable XHCI SSIC Support
+- fsps,dlane-pwr-gating: SSIC Dlane PowerGating
+- fsps,vtd-enable: VT-d
+- fsps,lock-down-global-smi: SMI Lock bit
+- fsps,reset-wait-timer: HDAudio Delay Timer
+  0x012C: (default)
+- fsps,rtc-lock: RTC Lock Bits
+- fsps,sata-test-mode: SATA Test Mode Selection
+- fsps,ssic-rate: XHCI SSIC RATE
+  1: A Series (default)
+  2: B Series
+- fsps,dynamic-power-gating: SMBus Dynamic Power Gating
+- fsps,pcie-rp-ltr-max-snoop-latency: Max Snoop Latency
+  0x0000: (default)
+- fsps,pcie-rp-snoop-latency-override-mode: Snoop Latency Override
+  0: Disable
+  1: Enable
+  2: Auto (default)
+- fsps,pcie-rp-snoop-latency-override-value: Snoop Latency Value
+  0x003C (default)
+- fsps,pcie-rp-snoop-latency-override-multiplier: Snoop Latency Multiplier
+  0: 1ns
+  1: 32ns
+  2: 1024ns (default)
+  3: 32768ns
+  4: 1048576ns
+  5: 33554432ns
+- fsps,skip-mp-init: Skip Multi-Processor Initialization
+- fsps,dci-auto-detect: DCI Auto Detect
+- fsps,pcie-rp-ltr-max-non-snoop-latency: Max Non-Snoop Latency
+  0x0000: (default)
+- fsps,pcie-rp-non-snoop-latency-override-mode: Non Snoop Latency Override
+- fsps,tco-timer-halt-lock: Halt and Lock TCO Timer
+- fsps,pwr-btn-override-period: Power Button Override Period
+  000: 4s (default)
+  001: 6s
+  010: 8s
+  011: 10s
+  100: 12s
+  101: 14s
+- fsps,pcie-rp-non-snoop-latency-override-value:
+  0x003C: (default)
+- fsps,pcie-rp-non-snoop-latency-override-multiplier: Non Snoop Latency Value
+  0: 1ns
+  1: 32ns
+  2: 1024ns (default)
+  3: 32768ns
+  4: 1048576ns
+  5: 33554432ns
+- fsps,pcie-rp-slot-power-limit-scale: PCIE Root Port Slot Power Limit Scale
+  0x00: (default)
+- fsps,pcie-rp-slot-power-limit-value:
+  0x00: (default)
+- fsps,disable-native-power-button: Power Button Native Mode Disable
+- fsps,power-butter-debounce-mode: Power Button Debounce Mode
+- fsps,sdio-tx-cmd-cntl: SDIO_TX_CMD_DLL_CNTL
+  0x505: (default)
+- fsps,sdio-tx-data-cntl1: SDIO_TX_DATA_DLL_CNTL1
+  0xE: (default)
+- fsps,sdio-tx-data-cntl2: SDIO_TX_DATA_DLL_CNTL2
+  0x22272828: (default)
+- fsps,sdio-rx-cmd-data-cntl1: SDIO_RX_CMD_DATA_DLL_CNTL1
+  0x16161616: (default)
+- fsps,sdio-rx-cmd-data-cntl2: SDIO_RX_CMD_DATA_DLL_CNTL2
+  0x10000: (default)
+- fsps,sdcard-tx-cmd-cntl: SDCARD_TX_CMD_DLL_CNTL
+  0x505 (default)
+- fsps,sdcard-tx-data-cntl1: SDCARD_TX_DATA_DLL_CNTL1
+  0xA13: (default)
+- fsps,sdcard-tx-data-cntl2: SDCARD_TX_DATA_DLL_CNTL2
+  0x24242828: (default)
+- fsps,sdcard-rx-cmd-data-cntl1: SDCARD_RX_CMD_DATA_DLL_CNTL1
+  0x73A3637 (default)
+- fsps,sdcard-rx-strobe-cntl: SDCARD_RX_STROBE_DLL_CNTL
+  0x0: (default)
+- fsps,sdcard-rx-cmd-data-cntl2: SDCARD_RX_CMD_DATA_DLL_CNTL2
+  0x10000: (default)
+- fsps,emmc-tx-cmd-cntl: EMMC_TX_CMD_DLL_CNTL
+  0x505: (default)
+- fsps,emmc-tx-data-cntl1: EMMC_TX_DATA_DLL_CNTL1
+  0xC11: (default)
+- fsps,emmc-tx-data-cntl2: EMMC_TX_DATA_DLL_CNTL2
+  0x1C2A2927: (default)
+- fsps,emmc-rx-cmd-data-cntl1: EMMC_RX_CMD_DATA_DLL_CNTL1
+  0x000D162F: (default)
+- fsps,emmc-rx-strobe-cntl: EMMC_RX_STROBE_DLL_CNTL
+  0x0a0a: (default)
+- fsps,emmc-rx-cmd-data-cntl2: EMMC_RX_CMD_DATA_DLL_CNTL2
+  0x1003b: (default)
+- fsps,emmc-master-sw-cntl: EMMC_MASTER_DLL_CNTL
+  0x001: (default)
+- fsps,pcie-rp-selectable-deemphasis: PCIe Selectable De-emphasis
+  1: -3.5 dB (default)
+  0: -6 dB
+- fsps,monitor-mwait-enable: Monitor Mwait Enable
+- fsps,hd-audio-dsp-uaa-compliance: Universal Audio Architecture
+				    compliance for DSP enabled system
+- fsps,ipc: IRQ Interrupt Polarity Control
+- fsps,sata-ports-disable-dynamic-pg: Disable ModPHY dynamic power gate
+- fsps,init-s3-cpu: Init CPU during S3 resume
+- fsps,skip-punit-init: Skip P-unit Initialization
+- fsps,port-usb20-per-port-tx-pe-half: PerPort Half Bit Pre-emphasis
+- fsps,port-usb20-per-port-pe-txi-set: PerPort HS Pre-emphasis Bias
+- fsps,port-usb20-per-port-txi-set: PerPort HS Transmitter Bias
+- fsps,port-usb20-hs-skew-sel: Select the skew direction for HS transition
+- fsps,port-usb20-i-usb-tx-emphasis-en: PerPort HS Transmitter Emphasis
+- fsps,port-usb20-per-port-rxi-set: PerPort HS Receiver Bias
+- fsps,port-usb20-hs-npre-drv-sel: Delay/skew's strength control for HS driver
+
+Example:
+
+&fsp_s {
+	u-boot,dm-pre-proper;
+
+	fsps,ish-enable = <0>;
+	fsps,enable-sata = <0>;
+	fsps,pcie-root-port-en = [00 00 00 00 00 01];
+	fsps,pcie-rp-hot-plug = [00 00 00 00 00 01];
+	fsps,i2c6-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,i2c7-enable = <I2CX_ENABLE_DISABLED>;
+	fsps,hsuart3-enable = <HSUARTX_ENABLE_DISABLED>;
+	fsps,spi1-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,spi2-enable = <SPIX_ENABLE_DISABLED>;
+	fsps,sdio-enabled = <0>;
+	...
+};
diff --git a/doc/device-tree-bindings/net/phy/atheros.txt b/doc/device-tree-bindings/net/phy/atheros.txt
new file mode 100644
index 0000000000..97e97b8c13
--- /dev/null
+++ b/doc/device-tree-bindings/net/phy/atheros.txt
@@ -0,0 +1,35 @@
+* Qualcomm Atheros PHY Device Tree binding
+
+Required properties:
+- reg: PHY address
+
+Optional properties:
+- qca,clk-out-frequency: Clock frequency of the CLK_25M pin in Hz.
+	Either 25000000, 50000000, 62500000 or 125000000.
+- qca,clk-out-strength: Clock output buffer driver strength.
+    Supported values are defined in dt-bindings/net/qca-ar803x.h
+- qca,keep-pll-enabled: Keep the PLL running if no link is present.
+	Don't go into hibernation mode.
+	Only supported on the AR8031/AR8033.
+- vddio-supply: RGMII I/O voltage regulator
+	Only supported on the AR8031/AR8033.
+
+Optional subnodes:
+- vddio-regulator: Initial data for the VDDIO regulator, as covered
+    doc/device-tree-bindings/regulator/regulator.txt
+
+Example:
+	#include <dt-bindings/net/qca-ar803x.h>
+
+	ethernet-phy@0 {
+		reg = <0>;
+		qca-clk-out-frequency = <125000000>;
+		qca,keep-pll-enabled;
+
+		vddio-supply = <&vddio>;
+
+		vddio: vddio-regulator {
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+		};
+	};
diff --git a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
index 037c5a4be5..8cd23d8c0b 100644
--- a/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
+++ b/doc/device-tree-bindings/phy/phy-mtk-tphy.txt
@@ -7,10 +7,17 @@ controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
 Required properties (controller (parent) node):
  - compatible	: should be one of
 		  "mediatek,generic-tphy-v1"
- - clocks	: (deprecated, use port's clocks instead) a list of phandle +
-		  clock-specifier pairs, one for each entry in clock-names
- - clock-names	: (deprecated, use port's one instead) must contain
-		  "u3phya_ref": for reference clock of usb3.0 analog phy.
+		  "mediatek,generic-tphy-v2"
+
+- #address-cells:	the number of cells used to represent physical
+		base addresses.
+- #size-cells:	the number of cells used to represent the size of an address.
+- ranges:	the address mapping relationship to the parent, defined with
+		- empty value: if optional 'reg' is used.
+		- non-empty value: if optional 'reg' is not used. should set
+			the child's base address to 0, the physical address
+			within parent's address space, and the length of
+			the address map.
 
 Required nodes	: a sub-node is required for each port the controller
 		  provides. Address range information including the usual
@@ -27,12 +34,6 @@ Optional properties (controller (parent) node):
 
 Required properties (port (child) node):
 - reg		: address and length of the register set for the port.
-- clocks	: a list of phandle + clock-specifier pairs, one for each
-		  entry in clock-names
-- clock-names	: must contain
-		  "ref": 48M reference clock for HighSpeed analog phy; and 26M
-			reference clock for SuperSpeed analog phy, sometimes is
-			24M, 25M or 27M, depended on platform.
 - #phy-cells	: should be 1 (See second example)
 		  cell after port phandle is phy type from:
 			- PHY_TYPE_USB2
@@ -40,6 +41,17 @@ Required properties (port (child) node):
 			- PHY_TYPE_PCIE
 			- PHY_TYPE_SATA
 
+Optional properties (port (child) node):
+- clocks	: a list of phandle + clock-specifier pairs, one for each
+		  entry in clock-names
+- clock-names	: may contain
+		  "ref": 48M reference clock for HighSpeed (digital) phy; and 26M
+			reference clock for SuperSpeed (digital) phy, sometimes is
+			24M, 25M or 27M, depended on platform.
+		  "da_ref": the reference clock of analog phy, used if the clocks
+			of analog and digital phys are separated, otherwise uses
+			"ref" clock only if needed.
+
 Example:
 
 	u3phy2: usb-phy@1a244000 {
@@ -84,3 +96,49 @@ usb30: usb@11270000 {
 	phy-names = "usb2-0", "usb3-0";
 	...
 };
+
+Layout differences of banks between TPHY V1 and V2
+-------------------------------------------------------------
+IP V1:
+port        offset    bank
+shared      0x0000    SPLLC
+            0x0100    FMREG
+u2 port0    0x0800    U2PHY_COM
+u3 port0    0x0900    U3PHYD
+            0x0a00    U3PHYD_BANK2
+            0x0b00    U3PHYA
+            0x0c00    U3PHYA_DA
+u2 port1    0x1000    U2PHY_COM
+u3 port1    0x1100    U3PHYD
+            0x1200    U3PHYD_BANK2
+            0x1300    U3PHYA
+            0x1400    U3PHYA_DA
+u2 port2    0x1800    U2PHY_COM
+            ...
+
+IP V2:
+port        offset    bank
+u2 port0    0x0000    MISC
+            0x0100    FMREG
+            0x0300    U2PHY_COM
+u3 port0    0x0700    SPLLC
+            0x0800    CHIP
+            0x0900    U3PHYD
+            0x0a00    U3PHYD_BANK2
+            0x0b00    U3PHYA
+            0x0c00    U3PHYA_DA
+u2 port1    0x1000    MISC
+            0x1100    FMREG
+            0x1300    U2PHY_COM
+u3 port1    0x1700    SPLLC
+            0x1800    CHIP
+            0x1900    U3PHYD
+            0x1a00    U3PHYD_BANK2
+            0x1b00    U3PHYA
+            0x1c00    U3PHYA_DA
+u2 port2    0x2000    MISC
+            ...
+
+    SPLLC shared by u3 ports and FMREG shared by u2 ports on
+TPHY V1 are put back into each port; a new bank MISC for
+u2 ports and CHIP for u3 ports are added on TPHY V2.
diff --git a/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
new file mode 100644
index 0000000000..0447468a2d
--- /dev/null
+++ b/doc/device-tree-bindings/usb/mediatek,mtk-xhci.txt
@@ -0,0 +1,40 @@
+MediaTek xHCI
+
+The device node for USB3 host controller on MediaTek SoCs.
+
+Required properties:
+ - compatible : should be "mediatek,mtk-xhci"
+ - reg : specifies physical base address and size of the registers
+ - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
+ - power-domains : a phandle to USB power domain node to control USB's
+	MTCMOS
+ - vusb33-supply : regulator of USB avdd3.3v
+
+ - clocks : a list of phandle + clock-specifier pairs, one for each
+	entry in clock-names
+ - clock-names : must contain
+	"sys_ck": controller clock used by normal mode,
+	the following ones are optional:
+	"ref_ck": reference clock used by low power mode etc,
+	"mcu_ck": mcu_bus clock for register access,
+	"dma_ck": dma_bus clock for data transfer by DMA,
+	"xhci_ck": controller clock
+
+ - phys : list of all the USB PHYs on this HCD
+ - phy-names: name specifier for the USB PHY
+
+Optional properties:
+ - vbus-supply : reference to the VBUS regulator;
+
+Example:
+xhci: usb@1a0c0000 {
+	compatible = "mediatek,mt7629-xhci", "mediatek,mtk-xhci";
+	reg = <0x1a0c0000 0x1000>, <0x1a0c3e00 0x0100>;
+	reg-names = "mac", "ippc";
+	power-domains = <&scpsys MT7629_POWER_DOMAIN_HIF1>;
+	clocks = <&ssusbsys CLK_SSUSB_SYS_EN>, <&ssusbsys CLK_SSUSB_REF_EN>,
+		 <&ssusbsys CLK_SSUSB_MCU_EN>, <&ssusbsys CLK_SSUSB_DMA_EN>;
+	clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
+	phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
+	status = "disabled";
+};
diff --git a/doc/driver-model/migration.rst b/doc/driver-model/migration.rst
index d1fc0e6a78..de8c1f9e72 100644
--- a/doc/driver-model/migration.rst
+++ b/doc/driver-model/migration.rst
@@ -69,8 +69,6 @@ to move the migration with in the deadline.
 No dm conversion yet::
 
 	drivers/spi/fsl_espi.c
-	drivers/spi/lpc32xx_ssp.c
-	drivers/spi/sh_spi.c
 	drivers/spi/soft_spi_legacy.c
 
 * Status: In progress
diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index b5a70da296..546d2da17d 100644
--- a/doc/feature-removal-schedule.txt
+++ b/doc/feature-removal-schedule.txt
@@ -7,18 +7,6 @@ file.
 
 ---------------------------
 
-What:	Remove unused CONFIG_SYS_MEMTEST_START/END
-When:	Release v2013.10
-
-Why:	As the 'mtest' command is no longer default, a number of platforms
-	have not opted to turn the command back on and thus provide unused
-	defines (which are likely to be propagated to new platforms from
-	copy/paste).  Remove these defines when unused.
-
-Who:	Tom Rini <trini@ti.com>
-
----------------------------
-
 What:	Users of the legacy miiphy_* code
 When:	undetermined
 
diff --git a/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt b/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt
new file mode 100644
index 0000000000..6c70db657b
--- /dev/null
+++ b/doc/imx/ahab/csf_examples/csf_enc_boot_image.txt
@@ -0,0 +1,27 @@
+[Header]
+Target = AHAB
+Version = 1.0
+
+[Install SRK]
+# SRK table generated by srktool
+File = "./release/crts/SRK_1_2_3_4_table.bin"
+# Public key certificate in PEM format
+Source = "./release/crts/SRK1_sha384_secp384r1_v3_usr_crt.pem"
+# Index of the public key certificate within the SRK table (0 .. 3)
+Source index = 0
+# Type of SRK set (NXP or OEM)
+Source set = OEM
+# bitmask of the revoked SRKs
+Revocations = 0x0
+
+[Authenticate Data]
+# Binary to be signed generated by mkimage
+File = "flash.bin"
+# Offsets = Container header  Signature block (printed out by mkimage)
+Offsets   = 0x400             0x590
+
+[Install Secret Key]
+Key = "dek.bin"
+Key Length = 128
+#Key Identifier = 0x1234CAFE
+Image Indexes = 0xFFFFFFFE
diff --git a/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt b/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt
new file mode 100644
index 0000000000..dfea4c8277
--- /dev/null
+++ b/doc/imx/ahab/guides/mx8_mx8x_encrypted_boot.txt
@@ -0,0 +1,293 @@
+         +=========================================================+
+         +      i.MX 8, i.MX 8X Encrypted Boot guide using AHAB    +
+         +=========================================================+
+
+1. AHAB Encrypted Boot process
+-------------------------------
+
+This document describes a step-by-step procedure on how to encrypt and sign a
+bootloader image for i.MX8/8x family devices. It is assumed that the reader
+is familiar with basic AHAB concepts and has already closed the device,
+step-by-step procedure can be found in mx8_mx8x_secure_boot.txt and
+mx8_mx8x_spl_secure_boot.txt guides.
+
+The steps described in this document were based in i.MX8QM device, the same
+concept can be applied to others processors in i.MX8/8X family devices.
+
+1.1 Understanding the encrypted image signature block
+------------------------------------------------------
+
+As described in mx8_mx8x_secure_boot.txt guide a single binary is used to boot
+the device. The imx-mkimage tool combines all the input images in a container
+structure, generating a flash.bin binary.
+
+AHAB is able to decrypt image containers by calling SECO authentication
+functions, the image must be encrypted by CST and the resulting DEK (Data
+Encryption Key) must be encapsulated and included into the container signature
+block:
+
+                +----------------------------+
+                |                            |  ^
+                |                            |  |
+                |      Container header      |  |
+                |                            |  |
+                |                            |  |
+                +---+------------------------+  |
+                | S | Signature block header |  | Signed
+                | i +------------------------+  |
+                | g |                        |  |
+                | n |                        |  |
+                | a |        SRK table       |  |
+                | t |                        |  |
+                | u |                        |  v
+                | r +------------------------+
+                | e |       Signature        |
+                |   +------------------------+
+                | B |                        |
+                | l |        SGK Key         |
+                | o | Certificate (optional) |
+                | c |                        |
+                | k +------------------------+
+                |   |        DEK Blob        |
+                +---+------------------------+
+
+1.1.1 Understanding and generating the DEK blob
+------------------------------------------------
+
+The encrypted boot image requires a DEK blob on each time AHAB is used to
+decrypt an image. The DEK blob is used as a security layer to wrap and store
+the DEK off-chip using the OTPMK which is unique per device.
+
+On i.MX8/8x devices the DEK blob is generated using the SECO API, the following
+funtion is available in U-Boot and can be executed through dek_blob command:
+
+- sc_seco_gen_key_blob(sc_ipc_t ipc, uint32_t id, sc_faddr_t load_addr,
+		       sc_faddr_t export_addr, uint16_t max_size)
+
+Details in API usage can be found in SCFW API guide [1].
+
+1.2 Enabling the encrypted boot support in U-Boot
+--------------------------------------------------
+
+For deploying an encrypted boot image additional U-Boot tools are needed,
+please be sure to have the following features enabled, this can be achieved
+by following one of the methods below:
+
+- Defconfig:
+
+  CONFIG_AHAB_BOOT=y
+  CONFIG_CMD_DEKBLOB=y
+  CONFIG_IMX_SECO_DEK_ENCAP=y
+  CONFIG_FAT_WRITE=y
+
+- Kconfig:
+
+  ARM architecture -> Support i.MX8 AHAB features
+  ARM architecture -> Support the 'dek_blob' command
+  File systems -> Enable FAT filesystem support-> Enable FAT filesystem
+  write support
+
+1.3 Enabling the encrypted boot support in CST
+-----------------------------------------------
+
+The encryption feature is not enabled by default in Code Signing tools (CST).
+The CST backend must be recompiled, execute the following commands to enable
+encryption support in CST:
+
+  $ sudo apt-get install libssl-dev openssl
+  $ cd <CST install directory>/code/back_end/src
+  $ gcc -o cst_encrypted -I ../hdr -L ../../../linux64/lib *.c
+    -lfrontend -lcrypto
+  $ cp cst_encrypted ../../../linux64/bin/
+
+1.4 Preparing the image container
+----------------------------------
+
+The container generation is explained in and mx8_mx8x_secure_boot.txt and
+mx8_mx8x_spl_secure_boot.txt guides. This document is based in imx-mkimage
+flash target (2 containers in flash.bin).
+
+- Assembly flash.bin binary:
+
+  $ make SOC=<SoC Name> flash
+
+The mkimage log is used during the encrypted boot procedure to create the
+Command Sequence File (CSF):
+
+  CST: CONTAINER 0 offset: 0x400
+  CST: CONTAINER 0: Signature Block: offset is at 0x590
+  DONE.
+  Note: Please copy image to offset: IVT_OFFSET + IMAGE_OFFSET
+
+1.6 Creating the CSF description to encrypt the 2nd container
+--------------------------------------------------------------
+
+The csf_enc_boot_image.txt available under ahab/csf_examples/ can be used as
+example for encrypting the flash.bin binary, the main change is the Install
+Secret Key command that must be added after Authenticate Data command.
+
+  [Install Secret Key]
+  Key = "dek.bin"
+  Key Length = 128
+  #Key Identifier = 0x1234CAFE
+  Image Indexes = 0xFFFFFFFE
+
+By default all images are encrypted and image indexes parameter can be used
+to mask the images indexes that must be encrypted, on this example only the
+2nd container will be encrypted.
+
+Optionally users can provide a key identifier that must match the value
+provided during the blob generation, by default its value is zero.
+
+1.7 Encrypting the 2nd container
+---------------------------------
+
+The image is encrypted using the Code Signing Tool. The tool generates the
+encrypted image and a random dek.bin file.
+
+- Encrypt flash.bin binary:
+
+  $ ./cst_encrypted -i csf_enc_boot_image.txt -o enc_flash.bin
+   The DEK BLOB must be inserted at offset 0x7c0 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_boot_image.bin
+
+The output log will be used in a later step to insert the DEK blob into the
+signature block.
+
+1.8 Generating the DEK Blob
+----------------------------
+
+The DEK must be encapsulated into a CAAM blob so it can be included into the
+final encrypted binary. The U-Boot provides a tool called dek_blob which is
+calling the SECO blob encapsulation API.
+
+Copy the dek.bin in SDCard FAT partition and run the following commands from
+U-Boot prompt:
+
+  => mmc list
+     FSL_SDHC: 1 (SD)
+     FSL_SDHC: 2
+  => fatload mmc 1:1 0x80280000 dek.bin
+  => dek_blob 0x80280000 0x80280100 128
+  => fatwrite mmc 1:1 0x80280100 dek_blob.bin 0x48
+
+In host PC copy the generated dek_blob.bin to the CST directory.
+
+1.9 Assembling the encrypted image
+-----------------------------------
+
+The DEK blob generated in the step above have to be inserted into the container
+signature block.
+
+The CSF log is used to determine the DEK Blob offset:
+
+  The DEK BLOB must be inserted at offset 0x7c0 (its expected size is 72 bytes)
+  CSF Processed successfully and signed image available in enc_boot_image.bin
+
+- Insert DEK Blob into container signature block:
+
+  $ dd if=dek_blob.bin of=enc_flash.bin bs=1 seek=$((0x7c0)) conv=notrunc
+
+1.10 Flashing the encrypted boot image
+---------------------------------------
+
+The same offset is used for encrypted boot images, in case booting from
+eMMC/SDCard the offset is 32K.
+
+- Flash encrypted image in SDCard:
+
+  $ sudo dd if=enc_flash.bin of=/dev/sd<x> bs=1K seek=32 && sync
+
+2.0 Encrypting a standalone container
+--------------------------------------
+
+CST is also able to encrypt additional images containers, the steps documented
+in this section are based in OS container but can be also applied to SPL
+targets and 3rd containers.
+
+2.1 Creating the OS container
+------------------------------
+
+As explained in mx8_mx8x_secure_boot.txt guide the imx-mkimage tool is used to
+generate an image container for OS images, the mkimage log is used during the
+encrypted boot procedure to create the Command Sequence File (CSF).
+
+- Creating OS container:
+
+  $ make SOC=<SoC Name> flash_kernel
+   ...
+   CST: CONTAINER 0 offset: 0x0
+   CST: CONTAINER 0: Signature Block: offset is at 0x110
+
+2.2 Creating the CSF description file for standalone container
+---------------------------------------------------------------
+
+The Image Indexes parameter is used to mask the images that are encrypted by
+CST, as a single container is used for OS images the Image Indexes command can
+be commented or set to 0xFFFFFFFF.
+
+  [Install Secret Key]
+  Key = "dek_os.bin"
+  Key Length = 128
+  #Key Identifier = 0x1234CAFE
+  Image Indexes = 0xFFFFFFFF
+
+2.3 Encrypting the standalone container
+----------------------------------------
+
+As explained in section 1.7 the CST generates the encrypted image and a random
+dek.bin file.
+
+- Encrypt the standalone container:
+
+  $ ./cst_encrypted -i csf_linux_img.txt -o enc_flash_os.bin
+   The DEK BLOB must be inserted at offset 0x340 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_flash_os.bin
+
+The output log will be used in a later step to insert the DEK blob into the
+signature block.
+
+2.4 Generating the DEK Blob for standalone container
+----------------------------------------------------
+
+Similar to section 1.8 the DEK must be encapsulated into a CAAM blob so it can
+be included into the final encrypted binary.
+
+Copy the dek_os.bin in SDCard FAT partition and run the following commands from
+U-Boot prompt:
+
+  => mmc list
+     FSL_SDHC: 1 (SD)
+     FSL_SDHC: 2
+  => fatload mmc 1:1 0x80280000 dek_os.bin
+  => dek_blob 0x80280000 0x80280100 128
+  => fatwrite mmc 1:1 0x80280100 dek_blob_os.bin 0x48
+
+In host PC copy the generated dek_blob_os.bin to the CST directory.
+
+2.5 Assembling the encrypted image
+-----------------------------------
+
+The DEK blob generated in the step above have to be inserted into the container
+signature block.
+
+The CSF log is used to determine the DEK Blob offset:
+
+   The DEK BLOB must be inserted at offset 0x340 (its expected size is 72 bytes)
+   CSF Processed successfully and signed image available in enc_flash_os.bin
+
+- Insert DEK Blob into container signature block:
+
+  $ dd if=dek_blob_os.bin of=enc_flash_os.bin bs=1 seek=$((0x340)) conv=notrunc
+
+2.6 Copy encrypted image to SDCard
+-----------------------------------
+
+The encrypted container can be copied to SDCard FAT partition, please note
+that U-Boot requires signed and encrypted containers to be named as
+os_cntr_signed.bin.
+
+  $ sudo cp enc_flash_os.bin /media/UserID/Boot\ imx8/os_cntr_signed.bin
+
+References:
+[1] SCFW API guide: "System Controller Firmware API Reference Guide - Rev 1.5"
diff --git a/doc/index.rst b/doc/index.rst
index cd98be6cc5..fd9f10f28e 100644
--- a/doc/index.rst
+++ b/doc/index.rst
@@ -26,6 +26,17 @@ trying to get it to work optimally on a given system.
 
    build/index
 
+Developer-oriented documentation
+--------------------------------
+
+The following manuals are written for *developers* of the U-Boot - those who
+want to contribute to U-Boot.
+
+.. toctree::
+   :maxdepth: 2
+
+   develop/index
+
 Unified Extensible Firmware (UEFI)
 ----------------------------------
 
diff --git a/doc/uImage.FIT/beaglebone_vboot.txt b/doc/uImage.FIT/beaglebone_vboot.txt
index 685ec1f46d..ebd2068ed3 100644
--- a/doc/uImage.FIT/beaglebone_vboot.txt
+++ b/doc/uImage.FIT/beaglebone_vboot.txt
@@ -67,7 +67,6 @@ or if you just installed gcc-arm-linux-gnueabi then it might be
 
 b. Configure and build U-Boot with verified boot enabled:
 
-   export ARCH=arm
    export UBOOT=/path/to/u-boot
    cd $UBOOT
    # You can add -j10 if you have 10 CPUs to make it faster
diff --git a/doc/uImage.FIT/signature.txt b/doc/uImage.FIT/signature.txt
index 3591225a6e..d4afd755e9 100644
--- a/doc/uImage.FIT/signature.txt
+++ b/doc/uImage.FIT/signature.txt
@@ -481,12 +481,14 @@ openssl. This may require setting up LD_LIBRARY_PATH if engine is not installed
 to openssl's default search paths.
 
 PKCS11 engine support forms "key id" based on "keydir" and with
-"key-name-hint". "key-name-hint" is used as "object" name and "keydir" if
-defined is used to define (prefix for) which PKCS11 source is being used for
-lookup up for the key.
+"key-name-hint". "key-name-hint" is used as "object" name (if not defined in
+keydir). "keydir" (if defined) is used to define (prefix for) which PKCS11 source
+is being used for lookup up for the key.
 
 PKCS11 engine key ids:
    "pkcs11:<keydir>;object=<key-name-hint>;type=<public|private>"
+or, if keydir contains "object="
+   "pkcs11:<keydir>;type=<public|private>"
 or
    "pkcs11:object=<key-name-hint>;type=<public|private>",
 
diff --git a/doc/uefi/uefi.rst b/doc/uefi/uefi.rst
index a35fbd331c..03d6fd0c6a 100644
--- a/doc/uefi/uefi.rst
+++ b/doc/uefi/uefi.rst
@@ -100,79 +100,110 @@ See doc/uImage.FIT/howto.txt for an introduction to FIT images.
 Configuring UEFI secure boot
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-UEFI specification[1] defines a secure way of executing UEFI images
+The UEFI specification[1] defines a secure way of executing UEFI images
 by verifying a signature (or message digest) of image with certificates.
 This feature on U-Boot is enabled with::
 
     CONFIG_UEFI_SECURE_BOOT=y
 
 To make the boot sequence safe, you need to establish a chain of trust;
-In UEFI secure boot, you can make it with the UEFI variables, "PK"
-(Platform Key), "KEK" (Key Exchange Keys), "db" (white list database)
-and "dbx" (black list database).
+In UEFI secure boot the chain trust is defined by the following UEFI variables
 
-There are many online documents that describe what UEFI secure boot is
-and how it works. Please consult some of them for details.
+* PK - Platform Key
+* KEK - Key Exchange Keys
+* db - white list database
+* dbx - black list database
 
-Here is a simple example that you can follow for your initial attempt
-(Please note that the actual steps would absolutely depend on your system
-and environment.):
+An in depth description of UEFI secure boot is beyond the scope of this
+document. Please, refer to the UEFI specification and available online
+documentation. Here is a simple example that you can follow for your initial
+attempt (Please note that the actual steps will depend on your system and
+environment.):
 
-1. Install utility commands on your host
-    * openssl
-    * efitools
-    * sbsigntool
+Install the required tools on your host
 
-2. Create signing keys and key database files on your host
-    for PK::
+* openssl
+* efitools
+* sbsigntool
 
-        $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
-                -keyout PK.key -out PK.crt -nodes -days 365
-        $ cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
-                PK.crt PK.esl;
-        $ sign-efi-sig-list -c PK.crt -k PK.key PK PK.esl PK.auth
+Create signing keys and the key database on your host:
 
-    for KEK::
+The platform key
 
-        $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_KEK/ \
-                -keyout KEK.key -out KEK.crt -nodes -days 365
-        $ cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
-                KEK.crt KEK.esl
-        $ sign-efi-sig-list -c PK.crt -k PK.key KEK KEK.esl KEK.auth
+.. code-block:: bash
 
-    for db::
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_PK/ \
+            -keyout PK.key -out PK.crt -nodes -days 365
+    cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            PK.crt PK.esl;
+    sign-efi-sig-list -c PK.crt -k PK.key PK PK.esl PK.auth
 
-        $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db/ \
-                -keyout db.key -out db.crt -nodes -days 365
-        $ cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
-                db.crt db.esl
-        $ sign-efi-sig-list -c KEK.crt -k KEK.key db db.esl db.auth
+The key exchange keys
 
-    Copy \*.auth to media, say mmc, that is accessible from U-Boot.
+.. code-block:: bash
 
-3. Sign an image with one key in "db" on your host::
+    openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_KEK/ \
+            -keyout KEK.key -out KEK.crt -nodes -days 365
+    cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            KEK.crt KEK.esl
+    sign-efi-sig-list -c PK.crt -k PK.key KEK KEK.esl KEK.auth
 
-    $ sbsign --key db.key --cert db.crt helloworld.efi
+The whitelist database
 
-4. Install keys on your board::
+.. code-block:: bash
 
-    ==> fatload mmc 0:1 <tmpaddr> PK.auth
-    ==> setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize PK
-    ==> fatload mmc 0:1 <tmpaddr> KEK.auth
-    ==> setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize KEK
-    ==> fatload mmc 0:1 <tmpaddr> db.auth
-    ==> setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize db
+    $ openssl req -x509 -sha256 -newkey rsa:2048 -subj /CN=TEST_db/ \
+            -keyout db.key -out db.crt -nodes -days 365
+    $ cert-to-efi-sig-list -g 11111111-2222-3333-4444-123456789abc \
+            db.crt db.esl
+    $ sign-efi-sig-list -c KEK.crt -k KEK.key db db.esl db.auth
 
-5. Set up boot parameters on your board::
+Copy the \*.auth files to media, say mmc, that is accessible from U-Boot.
 
-    ==> efidebug boot add 1 HELLO mmc 0:1 /helloworld.efi.signed ""
+Sign an image with one of the keys in "db" on your host
 
-Then your board runs that image from Boot manager (See below).
+.. code-block:: bash
+
+    sbsign --key db.key --cert db.crt helloworld.efi
+
+Now in U-Boot install the keys on your board::
+
+    fatload mmc 0:1 <tmpaddr> PK.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize PK
+    fatload mmc 0:1 <tmpaddr> KEK.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize KEK
+    fatload mmc 0:1 <tmpaddr> db.auth
+    setenv -e -nv -bs -rt -at -i <tmpaddr>,$filesize db
+
+Set up boot parameters on your board::
+
+    efidebug boot add 1 HELLO mmc 0:1 /helloworld.efi.signed ""
+
+Now your board can run the signed image via the boot manager (see below).
 You can also try this sequence by running Pytest, test_efi_secboot,
-on sandbox::
+on the sandbox
+
+.. code-block:: bash
+
+    cd <U-Boot source directory>
+    pytest.py test/py/tests/test_efi_secboot/test_signed.py --bd sandbox
+
+Using OP-TEE for EFI variables
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Instead of implementing UEFI variable services inside U-Boot they can
+also be provided in the secure world by a module for OP-TEE[1]. The
+interface between U-Boot and OP-TEE for variable services is enabled by
+CONFIG_EFI_MM_COMM_TEE=y.
+
+Tianocore EDK II's standalone management mode driver for variables can
+be linked to OP-TEE for this purpose. This module uses the Replay
+Protected Memory Block (RPMB) of an eMMC device for persisting
+non-volatile variables. When calling the variable services via the
+OP-TEE API U-Boot's OP-TEE supplicant relays calls to the RPMB driver
+which has to be enabled via CONFIG_SUPPORT_EMMC_RPMB=y.
 
-    $ cd <U-Boot source directory>
-    $ pytest.py test/py/tests/test_efi_secboot/test_signed.py --bd sandbox
+[1] https://optee.readthedocs.io/ - OP-TEE documentation
 
 Executing the boot manager
 ~~~~~~~~~~~~~~~~~~~~~~~~~~
diff --git a/drivers/Makefile b/drivers/Makefile
index 4208750428..94e8c5da17 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -91,6 +91,7 @@ obj-y += dfu/
 obj-$(CONFIG_PCH) += pch/
 obj-y += phy/allwinner/
 obj-y += phy/marvell/
+obj-y += phy/rockchip/
 obj-y += rtc/
 obj-y += scsi/
 obj-y += sound/
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index 0a492eba54..d435667258 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -12,6 +12,7 @@
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 #include <adc.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 #define ADC_UCLASS_PLATDATA_SIZE	sizeof(struct adc_uclass_platdata)
diff --git a/drivers/adc/meson-saradc.c b/drivers/adc/meson-saradc.c
index f7c919d3b0..72b0cc4e5b 100644
--- a/drivers/adc/meson-saradc.c
+++ b/drivers/adc/meson-saradc.c
@@ -14,6 +14,8 @@
 #include <regmap.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/math64.h>
 #include <linux/bitfield.h>
 
diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c
index 850142cce3..561740f63b 100644
--- a/drivers/adc/rockchip-saradc.c
+++ b/drivers/adc/rockchip-saradc.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define SARADC_CTRL_CHN_MASK		GENMASK(2, 0)
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
index 2ca0fb4f10..31bbb6f9d6 100644
--- a/drivers/adc/stm32-adc-core.c
+++ b/drivers/adc/stm32-adc-core.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 #include "stm32-adc-core.h"
 
diff --git a/drivers/adc/stm32-adc.c b/drivers/adc/stm32-adc.c
index ca1ac3e757..b12f894a9b 100644
--- a/drivers/adc/stm32-adc.c
+++ b/drivers/adc/stm32-adc.c
@@ -10,6 +10,8 @@
 #include <adc.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 #include "stm32-adc-core.h"
 
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 4cd7420c3c..47cdea1f58 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -9,7 +9,11 @@
  * This driver provides a SCSI interface to SATA.
  */
 #include <common.h>
+#include <blk.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <command.h>
 #include <dm.h>
diff --git a/drivers/ata/ahci_mvebu.c b/drivers/ata/ahci_mvebu.c
index 48a9d00d14..8be1826d40 100644
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <ahci.h>
 #include <dm.h>
+#include <log.h>
 
 /*
  * Dummy implementation that can be overwritten by a board
diff --git a/drivers/ata/ahci_sunxi.c b/drivers/ata/ahci_sunxi.c
index 77b932aa03..58e345d998 100644
--- a/drivers/ata/ahci_sunxi.c
+++ b/drivers/ata/ahci_sunxi.c
@@ -1,10 +1,12 @@
 #include <common.h>
 #include <ahci.h>
 #include <dm.h>
+#include <log.h>
 #include <scsi.h>
 #include <errno.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 #define AHCI_PHYCS0R 0x00c0
 #define AHCI_PHYCS1R 0x00c4
diff --git a/drivers/ata/dwc_ahsata.c b/drivers/ata/dwc_ahsata.c
index c2e28fe518..562e982e32 100644
--- a/drivers/ata/dwc_ahsata.c
+++ b/drivers/ata/dwc_ahsata.c
@@ -6,20 +6,25 @@
 
 #include <common.h>
 #include <ahci.h>
+#include <blk.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <dwc_ahsata.h>
 #include <fis.h>
 #include <libata.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <part.h>
 #include <sata.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/mach-imx/sata.h>
 #include <linux/bitops.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include "dwc_ahsata_priv.h"
 
@@ -223,7 +228,7 @@ static int ahci_host_init(struct ahci_uc_priv *uc_priv)
 
 		/* Wait for COMINIT bit 26 (DIAG_X) in SERR */
 		timeout = 1000;
-		while (!(readl(&port_mmio->serr) | SATA_PORT_SERR_DIAG_X)
+		while (!(readl(&port_mmio->serr) & SATA_PORT_SERR_DIAG_X)
 			&& --timeout)
 			;
 		if (timeout <= 0) {
@@ -450,7 +455,6 @@ static int ahci_port_start(struct ahci_uc_priv *uc_priv, u8 port)
 
 	mem = (u32)malloc(AHCI_PORT_PRIV_DMA_SZ + 1024);
 	if (!mem) {
-		free(pp);
 		printf("No mem for table!\n");
 		return -ENOMEM;
 	}
@@ -847,6 +851,9 @@ static int ahci_init_one(int pdev)
 	struct ahci_uc_priv *uc_priv = NULL;
 
 	uc_priv = malloc(sizeof(struct ahci_uc_priv));
+	if (!uc_priv)
+		return -ENOMEM;
+
 	memset(uc_priv, 0, sizeof(struct ahci_uc_priv));
 	uc_priv->dev = pdev;
 
@@ -871,6 +878,8 @@ static int ahci_init_one(int pdev)
 	return 0;
 
 err_out:
+	if (uc_priv)
+		free(uc_priv);
 	return rc;
 }
 
@@ -914,6 +923,9 @@ int reset_sata(int dev)
 	while (readl(&host_mmio->ghc) & SATA_HOST_GHC_HR)
 		udelay(100);
 
+	free(uc_priv);
+	memset(&sata_dev_desc[dev], 0, sizeof(struct blk_desc));
+
 	return 0;
 }
 
diff --git a/drivers/ata/fsl_sata.c b/drivers/ata/fsl_sata.c
index c6680dc1c9..8c6726a621 100644
--- a/drivers/ata/fsl_sata.c
+++ b/drivers/ata/fsl_sata.c
@@ -6,9 +6,11 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <console.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <asm/fsl_serdes.h>
@@ -16,6 +18,7 @@
 #include <libata.h>
 #include <fis.h>
 #include <sata.h>
+#include <linux/delay.h>
 #include "fsl_sata.h"
 
 #if CONFIG_IS_ENABLED(BLK)
diff --git a/drivers/ata/mvsata_ide.c b/drivers/ata/mvsata_ide.c
index 38181235af..41f9a91617 100644
--- a/drivers/ata/mvsata_ide.c
+++ b/drivers/ata/mvsata_ide.c
@@ -7,10 +7,11 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
-#if defined(CONFIG_ORION5X)
+#if defined(CONFIG_ARCH_ORION5X)
 #include <asm/arch/orion5x.h>
-#elif defined(CONFIG_KIRKWOOD)
+#elif defined(CONFIG_ARCH_KIRKWOOD)
 #include <asm/arch/soc.h>
 #elif defined(CONFIG_ARCH_MVEBU)
 #include <linux/mbus.h>
diff --git a/drivers/ata/sata.c b/drivers/ata/sata.c
index e384b805b2..6a38d50024 100644
--- a/drivers/ata/sata.c
+++ b/drivers/ata/sata.c
@@ -11,7 +11,9 @@
 
 #include <common.h>
 #include <ahci.h>
+#include <blk.h>
 #include <dm.h>
+#include <part.h>
 #include <sata.h>
 
 #ifndef CONFIG_AHCI
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
index 2d496305d0..77508aa5bc 100644
--- a/drivers/ata/sata_ceva.c
+++ b/drivers/ata/sata_ceva.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ahci.h>
+#include <log.h>
 #include <scsi.h>
 #include <asm/io.h>
 #include <linux/ioport.h>
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 6019ac089e..b2b5c699ad 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -33,20 +33,25 @@
 
 #include <common.h>
 #include <ahci.h>
+#include <blk.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <fis.h>
 #include <libata.h>
 #include <malloc.h>
 #include <sata.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <linux/mbus.h>
 
 #include <asm/arch/soc.h>
-#if defined(CONFIG_KIRKWOOD)
+#if defined(CONFIG_ARCH_KIRKWOOD)
 #define SATAHC_BASE		KW_SATA_BASE
 #else
 #define SATAHC_BASE		MVEBU_AXP_SATA_BASE
diff --git a/drivers/ata/sata_sandbox.c b/drivers/ata/sata_sandbox.c
index a28ac56ccd..e64cc4a5c1 100644
--- a/drivers/ata/sata_sandbox.c
+++ b/drivers/ata/sata_sandbox.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 
 int init_sata(int dev)
 {
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 71ee0c04ef..6896fa8771 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <pci.h>
 #include <command.h>
 #include <asm/byteorder.h>
@@ -16,6 +17,7 @@
 #include <sata.h>
 #include <libata.h>
 #include <sata.h>
+#include <linux/delay.h>
 
 #if CONFIG_IS_ENABLED(BLK)
 #include <dm.h>
diff --git a/drivers/ata/sata_sil3114.c b/drivers/ata/sata_sil3114.c
index 41635742a8..4d3a680f17 100644
--- a/drivers/ata/sata_sil3114.c
+++ b/drivers/ata/sata_sil3114.c
@@ -8,6 +8,9 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <log.h>
+#include <part.h>
 #include <pci.h>
 #include <command.h>
 #include <config.h>
@@ -16,6 +19,7 @@
 #include <ide.h>
 #include <sata.h>
 #include <libata.h>
+#include <linux/delay.h>
 #include "sata_sil3114.h"
 
 /* Convert sectorsize to wordsize */
@@ -61,9 +65,9 @@ static int sata_bus_softreset (int num)
 
 	port[num].ctl_reg = 0x08;	/*Default value of control reg */
 	writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
-	udelay (10);
+	udelay(10);
 	writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
-	udelay (10);
+	udelay(10);
 	writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
 
 	/* spec mandates ">= 2ms" before checking status.
@@ -118,7 +122,7 @@ static void sata_identify (int num, int dev)
 	cmd = ATA_CMD_ID_ATA;	/*Device Identify Command */
 	writeb (cmd, port[num].ioaddr.command_addr);
 	readb (port[num].ioaddr.altstatus_addr);
-	udelay (10);
+	udelay(10);
 
 	status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000, 0);
 	if (status & ATA_ERR) {
@@ -191,7 +195,7 @@ static void set_Feature_cmd (int num, int dev)
 	writeb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
 	writeb (ATA_CMD_SET_FEATURES, port[num].ioaddr.command_addr);
 
-	udelay (50);
+	udelay(50);
 	msleep (150);
 
 	status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000, 0);
@@ -389,7 +393,7 @@ static u8 wait_for_irq (int num, unsigned int max)
 		if (readl (port) & VND_TF_CNST_INTST) {
 			break;
 		}
-		udelay (1000);
+		udelay(1000);
 		max--;
 	} while ((max > 0));
 
@@ -405,7 +409,7 @@ static u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits,
 		if (!((status = sata_chk_status (ioaddr, usealtstatus)) & bits)) {
 			break;
 		}
-		udelay (1000);
+		udelay(1000);
 		max--;
 	} while ((status & bits) && (max > 0));
 
@@ -426,7 +430,7 @@ static void msleep (int count)
 	int i;
 
 	for (i = 0; i < count; i++)
-		udelay (1000);
+		udelay(1000);
 }
 
 /* Read up to 255 sectors
@@ -613,7 +617,7 @@ ulong sata_write (int device, ulong block, lbaint_t blkcnt, const void *buff)
 
 		output_data (&port[num].ioaddr, buffer, ATA_SECTOR_WORDS);
 		readb (port[num].ioaddr.altstatus_addr);
-		udelay (50);
+		udelay(50);
 
 		++n;
 		++blknr;
diff --git a/drivers/axi/axi-emul-uclass.c b/drivers/axi/axi-emul-uclass.c
index 06c42006ee..b28351f1ad 100644
--- a/drivers/axi/axi-emul-uclass.c
+++ b/drivers/axi/axi-emul-uclass.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <axi.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <asm/axi.h>
 
diff --git a/drivers/axi/ihs_axi.c b/drivers/axi/ihs_axi.c
index 690aa7796b..3945511090 100644
--- a/drivers/axi/ihs_axi.c
+++ b/drivers/axi/ihs_axi.c
@@ -10,7 +10,10 @@
 #include <common.h>
 #include <axi.h>
 #include <dm.h>
+#include <log.h>
 #include <regmap.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /**
  * struct ihs_axi_regs - Structure for the register map of a IHS AXI device
diff --git a/drivers/axi/sandbox_store.c b/drivers/axi/sandbox_store.c
index a6f483ed25..42bcae6af2 100644
--- a/drivers/axi/sandbox_store.c
+++ b/drivers/axi/sandbox_store.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <axi.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 
 /**
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
index fb806b53d4..9c7f14e98f 100644
--- a/drivers/bios_emulator/atibios.c
+++ b/drivers/bios_emulator/atibios.c
@@ -48,8 +48,10 @@
 #include <common.h>
 #include <bios_emul.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <vbe.h>
+#include <linux/delay.h>
 #include "biosemui.h"
 
 /* Length of the BIOS image */
diff --git a/drivers/block/blk-uclass.c b/drivers/block/blk-uclass.c
index 7c39aa5f2f..b19375cbc8 100644
--- a/drivers/block/blk-uclass.c
+++ b/drivers/block/blk-uclass.c
@@ -7,7 +7,9 @@
 #include <common.h>
 #include <blk.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
+#include <part.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass-internal.h>
diff --git a/drivers/block/blk_legacy.c b/drivers/block/blk_legacy.c
index 0c343f7b64..e3ee778c29 100644
--- a/drivers/block/blk_legacy.c
+++ b/drivers/block/blk_legacy.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <part.h>
 #include <linux/err.h>
 
 struct blk_driver *blk_driver_lookup_type(int if_type)
diff --git a/drivers/block/blkcache.c b/drivers/block/blkcache.c
index ea40929e3e..b6fc72fe98 100644
--- a/drivers/block/blkcache.c
+++ b/drivers/block/blkcache.c
@@ -4,8 +4,9 @@
  * Author: Eric Nelson<eric@nelint.com>
  *
  */
-#include <config.h>
 #include <common.h>
+#include <blk.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <linux/ctype.h>
diff --git a/drivers/block/ide.c b/drivers/block/ide.c
index 67cc4fbc02..a766b5cf03 100644
--- a/drivers/block/ide.c
+++ b/drivers/block/ide.c
@@ -6,10 +6,14 @@
 
 #include <common.h>
 #include <ata.h>
+#include <blk.h>
 #include <dm.h>
 #include <ide.h>
+#include <log.h>
+#include <part.h>
 #include <watchdog.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #ifdef __PPC__
 # define EIEIO		__asm__ volatile ("eieio")
diff --git a/drivers/board/gazerbeam.c b/drivers/board/gazerbeam.c
index 85de4e440c..ed50fc530c 100644
--- a/drivers/board/gazerbeam.c
+++ b/drivers/board/gazerbeam.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <board.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/gpio.h>
 
 #include "gazerbeam.h"
diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig
index 0356f8ba18..c8e6fa7f89 100644
--- a/drivers/bootcount/Kconfig
+++ b/drivers/bootcount/Kconfig
@@ -27,6 +27,8 @@ config BOOTCOUNT_GENERIC
 
 config BOOTCOUNT_EXT
 	bool "Boot counter on EXT filesystem"
+	depends on FS_EXT4
+	select EXT4_WRITE
 	help
 	  Add support for maintaining boot count in a file on an EXT
 	  filesystem.
diff --git a/drivers/bootcount/bootcount-uclass.c b/drivers/bootcount/bootcount-uclass.c
index 0689db7a5b..34ac08d59a 100644
--- a/drivers/bootcount/bootcount-uclass.c
+++ b/drivers/bootcount/bootcount-uclass.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <bootcount.h>
+#include <log.h>
 
 int dm_bootcount_get(struct udevice *dev, u32 *bootcount)
 {
diff --git a/drivers/bootcount/bootcount.c b/drivers/bootcount/bootcount.c
index 655dfaf59c..e8db8542f9 100644
--- a/drivers/bootcount/bootcount.c
+++ b/drivers/bootcount/bootcount.c
@@ -6,6 +6,7 @@
 
 #include <bootcount.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/compiler.h>
 
 #if !defined(CONFIG_DM_BOOTCOUNT)
diff --git a/drivers/bootcount/bootcount_ram.c b/drivers/bootcount/bootcount_ram.c
index 9c678e25f4..078c84d5ec 100644
--- a/drivers/bootcount/bootcount_ram.c
+++ b/drivers/bootcount/bootcount_ram.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/bootcount/i2c-eeprom.c b/drivers/bootcount/i2c-eeprom.c
index ee760a2742..a3aa0cf559 100644
--- a/drivers/bootcount/i2c-eeprom.c
+++ b/drivers/bootcount/i2c-eeprom.c
@@ -8,6 +8,7 @@
 #include <bootcount.h>
 #include <dm.h>
 #include <i2c_eeprom.h>
+#include <log.h>
 
 static const u8 bootcount_magic = 0xbc;
 
diff --git a/drivers/bootcount/rtc.c b/drivers/bootcount/rtc.c
index db89fa3a35..076a8bb2be 100644
--- a/drivers/bootcount/rtc.c
+++ b/drivers/bootcount/rtc.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <bootcount.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 
 static const u8 bootcount_magic = 0xbc;
diff --git a/drivers/cache/cache-l2x0.c b/drivers/cache/cache-l2x0.c
index 226824c283..a1556fbf17 100644
--- a/drivers/cache/cache-l2x0.c
+++ b/drivers/cache/cache-l2x0.c
@@ -36,6 +36,8 @@ static void l2c310_of_parse_and_init(struct udevice *dev)
 	if (dev_read_bool(dev, "arm,shared-override"))
 		saved_reg |= L310_SHARED_ATT_OVERRIDE_ENABLE;
 
+	writel(saved_reg, &regs->pl310_aux_ctrl);
+
 	saved_reg = readl(&regs->pl310_tag_latency_ctrl);
 	if (!dev_read_u32_array(dev, "arm,tag-latency", tag, 3))
 		saved_reg |= L310_LATENCY_CTRL_RD(tag[0] - 1) |
diff --git a/drivers/cache/cache-ncore.c b/drivers/cache/cache-ncore.c
index 0aab7ee191..3beff780de 100644
--- a/drivers/cache/cache-ncore.c
+++ b/drivers/cache/cache-ncore.c
@@ -8,6 +8,7 @@
 #include <wait_bit.h>
 
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* Directory */
 #define DIRUSFER		0x80010
diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c
index 1373e7c387..51c074bfe2 100644
--- a/drivers/cache/cache-v5l2.c
+++ b/drivers/cache/cache-v5l2.c
@@ -11,6 +11,7 @@
 #include <hang.h>
 #include <asm/io.h>
 #include <dm/ofnode.h>
+#include <linux/bitops.h>
 
 struct l2cache {
 	volatile u64	configure;
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 1992d4a4b4..8b8b719999 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -100,10 +100,11 @@ config CLK_TI_SCI
 	  managed by the TI System Controller, say Y here. Otherwise, say N.
 
 config CLK_HSDK
-	bool "Enable cgu clock driver for HSDK"
-	depends on CLK
+	bool "Enable cgu clock driver for HSDK boards"
+	depends on CLK && TARGET_HSDK
 	help
-	  Enable this to support the cgu clocks on Synopsys ARC HSDK
+	  Enable this to support the cgu clocks on Synopsys ARC HSDK and
+	  Synopsys ARC HSDK-4xD boards
 
 config CLK_VERSAL
 	bool "Enable clock driver support for Versal"
diff --git a/drivers/clk/altera/clk-agilex.c b/drivers/clk/altera/clk-agilex.c
index 5fedec549d..0042958f4c 100644
--- a/drivers/clk/altera/clk-agilex.c
+++ b/drivers/clk/altera/clk-agilex.c
@@ -4,12 +4,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/util.h>
 #include <dt-bindings/clock/agilex-clock.h>
+#include <linux/bitops.h>
 
 #include <asm/arch/clock_manager.h>
 
diff --git a/drivers/clk/altera/clk-agilex.h b/drivers/clk/altera/clk-agilex.h
index d93328ef29..cd68ebc438 100644
--- a/drivers/clk/altera/clk-agilex.h
+++ b/drivers/clk/altera/clk-agilex.h
@@ -6,6 +6,10 @@
 #ifndef	_CLK_AGILEX_
 #define	_CLK_AGILEX_
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 #define CM_REG_READL(plat, reg)				\
 	readl((plat)->regs + (reg))
 
diff --git a/drivers/clk/altera/clk-arria10.c b/drivers/clk/altera/clk-arria10.c
index 694a9427e1..ede0be299d 100644
--- a/drivers/clk/altera/clk-arria10.c
+++ b/drivers/clk/altera/clk-arria10.c
@@ -12,6 +12,7 @@
 #include <dm/devres.h>
 #include <dm/lists.h>
 #include <dm/util.h>
+#include <linux/bitops.h>
 
 #include <asm/arch/clock_manager.h>
 
diff --git a/drivers/clk/aspeed/clk_ast2500.c b/drivers/clk/aspeed/clk_ast2500.c
index f4a441ad68..ccfeded30c 100644
--- a/drivers/clk/aspeed/clk_ast2500.c
+++ b/drivers/clk/aspeed/clk_ast2500.c
@@ -6,10 +6,12 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/scu_ast2500.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/ast2500-scu.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 /*
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index a80f259a72..c0610940c3 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index f9adef2eaa..76b1958670 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <mach/at91_pmc.h>
 #include "pmc.h"
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index c3cb2ba014..af9d724369 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <clk-uclass.h>
+#include <log.h>
 #include <dm/device.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index f5808449a6..9d9d77d861 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <dm/util.h>
 #include "pmc.h"
diff --git a/drivers/clk/clk-cdce9xx.c b/drivers/clk/clk-cdce9xx.c
index f1f76b0a4d..fd47872ab9 100644
--- a/drivers/clk/clk-cdce9xx.c
+++ b/drivers/clk/clk-cdce9xx.c
@@ -14,6 +14,7 @@
 #include <clk-uclass.h>
 #include <i2c.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #define MAX_NUMBER_OF_PLLS		4
 #define MAX_NUMER_OF_OUTPUTS		9
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index d79ae367b8..2a68719eb6 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -18,6 +18,7 @@
 #include <dm/uclass.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
+#include <linux/bug.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
 #include <linux/log2.h>
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 6415c2f1b9..23c1f2c4ba 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -13,6 +13,7 @@
 #include <clk-uclass.h>
 #include <dm/device.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/clk-provider.h>
 #include <clk.h>
 #include "clk.h"
diff --git a/drivers/clk/clk-hsdk-cgu.c b/drivers/clk/clk-hsdk-cgu.c
index 3035c5fb38..3eb93a55fc 100644
--- a/drivers/clk/clk-hsdk-cgu.c
+++ b/drivers/clk/clk-hsdk-cgu.c
@@ -13,7 +13,14 @@
 #include <clk-uclass.h>
 #include <div64.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/io.h>
+#include <asm/arcregs.h>
+
+#include <dt-bindings/clock/snps,hsdk-cgu.h>
 
 /*
  * Synopsys ARC HSDK clock tree.
@@ -126,45 +133,41 @@
 #define PARENT_RATE_27			27000000 /* fixed clock - xtal */
 #define CGU_MAX_CLOCKS			27
 
-#define CGU_SYS_CLOCKS			16
-#define MAX_AXI_CLOCKS			4
-
-#define CGU_TUN_CLOCKS			4
-#define MAX_TUN_CLOCKS			6
+#define MAX_FREQ_VARIATIONS		6
 
-struct hsdk_tun_idiv_cfg {
-	u32 oft;
-	u8  val[MAX_TUN_CLOCKS];
+struct hsdk_idiv_cfg {
+	const u32 oft;
+	const u8  val[MAX_FREQ_VARIATIONS];
 };
 
-struct hsdk_tun_clk_cfg {
-	const u32 clk_rate[MAX_TUN_CLOCKS];
-	const u32 pll_rate[MAX_TUN_CLOCKS];
-	const struct hsdk_tun_idiv_cfg idiv[CGU_TUN_CLOCKS];
+struct hsdk_div_full_cfg {
+	const u32 clk_rate[MAX_FREQ_VARIATIONS];
+	const u32 pll_rate[MAX_FREQ_VARIATIONS];
+	const struct hsdk_idiv_cfg idiv[];
 };
 
-static const struct hsdk_tun_clk_cfg tun_clk_cfg = {
+static const struct hsdk_div_full_cfg hsdk_4xd_tun_clk_cfg = {
 	{ 25000000,  50000000,  75000000,  100000000, 125000000, 150000000 },
 	{ 600000000, 600000000, 600000000, 600000000, 750000000, 600000000 }, {
 	{ CGU_TUN_IDIV_TUN,	{ 24,	12,	8,	6,	6,	4 } },
 	{ CGU_TUN_IDIV_ROM,	{ 4,	4,	4,	4,	5,	4 } },
 	{ CGU_TUN_IDIV_PWM,	{ 8,	8,	8,	8,	10,	8 } },
-	{ CGU_TUN_IDIV_TIMER,	{ 12,	12,	12,	12,	15,	12 } }
+	{ CGU_TUN_IDIV_TIMER,	{ 12,	12,	12,	12,	15,	12 } },
+	{ /* last one */ }
 	}
 };
 
-struct hsdk_sys_idiv_cfg {
-	u32 oft;
-	u8  val[MAX_AXI_CLOCKS];
-};
-
-struct hsdk_axi_clk_cfg {
-	const u32 clk_rate[MAX_AXI_CLOCKS];
-	const u32 pll_rate[MAX_AXI_CLOCKS];
-	const struct hsdk_sys_idiv_cfg idiv[CGU_SYS_CLOCKS];
+static const struct hsdk_div_full_cfg hsdk_tun_clk_cfg = {
+	{ 25000000,  50000000,  75000000,  100000000, 125000000, 150000000 },
+	{ 600000000, 600000000, 600000000, 600000000, 750000000, 600000000 }, {
+	{ CGU_TUN_IDIV_TUN,	{ 24,	12,	8,	6,	6,	4 } },
+	{ CGU_TUN_IDIV_ROM,	{ 4,	4,	4,	4,	5,	4 } },
+	{ CGU_TUN_IDIV_PWM,	{ 8,	8,	8,	8,	10,	8 } },
+	{ /* last one */ }
+	}
 };
 
-static const struct hsdk_axi_clk_cfg axi_clk_cfg = {
+static const struct hsdk_div_full_cfg axi_clk_cfg = {
 	{ 200000000,	400000000,	600000000,	800000000 },
 	{ 800000000,	800000000,	600000000,	800000000 }, {
 	{ CGU_SYS_IDIV_APB,	 { 4,	4,	3,	4 } },	/* APB */
@@ -182,16 +185,17 @@ static const struct hsdk_axi_clk_cfg axi_clk_cfg = {
 	{ CGU_SYS_IDIV_SPI_REF,	 { 24,	24,	18,	24 } },	/* SPI-REF */
 	{ CGU_SYS_IDIV_I2C_REF,	 { 4,	4,	3,	4 } },	/* I2C-REF */
 	{ CGU_SYS_IDIV_UART_REF, { 24,	24,	18,	24 } },	/* UART-REF */
-	{ CGU_SYS_IDIV_EBI_REF,	 { 16,	16,	12,	16 } }	/* EBI-REF */
+	{ CGU_SYS_IDIV_EBI_REF,	 { 16,	16,	12,	16 } },	/* EBI-REF */
+	{ /* last one */ }
 	}
 };
 
 struct hsdk_pll_cfg {
-	u32 rate;
-	u32 idiv;
-	u32 fbdiv;
-	u32 odiv;
-	u32 band;
+	const u32 rate;
+	const u8  idiv;
+	const u8  fbdiv;
+	const u8  odiv;
+	const u8  band;
 };
 
 static const struct hsdk_pll_cfg asdt_pll_cfg[] = {
@@ -227,28 +231,35 @@ static const struct hsdk_pll_cfg hdmi_pll_cfg[] = {
 	{}
 };
 
-struct hsdk_cgu_clk {
-	/* CGU block register */
-	void __iomem *cgu_regs;
-	/* CREG block register */
-	void __iomem *creg_regs;
-
+struct hsdk_cgu_domain {
 	/* PLLs registers */
-	void __iomem *regs;
+	void __iomem *pll_regs;
 	/* PLLs special registers */
 	void __iomem *spec_regs;
 	/* PLLs devdata */
-	const struct hsdk_pll_devdata *pll_devdata;
+	const struct hsdk_pll_devdata *pll;
 
 	/* Dividers registers */
 	void __iomem *idiv_regs;
 };
 
+struct hsdk_cgu_clk {
+	const struct cgu_clk_map *map;
+	/* CGU block register */
+	void __iomem *cgu_regs;
+	/* CREG block register */
+	void __iomem *creg_regs;
+
+	/* The domain we are working with */
+	struct hsdk_cgu_domain curr_domain;
+};
+
 struct hsdk_pll_devdata {
 	const u32 parent_rate;
-	const struct hsdk_pll_cfg *pll_cfg;
-	int (*update_rate)(struct hsdk_cgu_clk *clk, unsigned long rate,
-			   const struct hsdk_pll_cfg *cfg);
+	const struct hsdk_pll_cfg *const pll_cfg;
+	const int (*const update_rate)(struct hsdk_cgu_clk *clk,
+				       unsigned long rate,
+				       const struct hsdk_pll_cfg *cfg);
 };
 
 static int hsdk_pll_core_update_rate(struct hsdk_cgu_clk *, unsigned long,
@@ -277,80 +288,110 @@ static const struct hsdk_pll_devdata hdmi_pll_dat = {
 static ulong idiv_set(struct clk *, ulong);
 static ulong cpu_clk_set(struct clk *, ulong);
 static ulong axi_clk_set(struct clk *, ulong);
-static ulong tun_clk_set(struct clk *, ulong);
+static ulong tun_hsdk_set(struct clk *, ulong);
+static ulong tun_h4xd_set(struct clk *, ulong);
 static ulong idiv_get(struct clk *);
 static int idiv_off(struct clk *);
 static ulong pll_set(struct clk *, ulong);
 static ulong pll_get(struct clk *);
 
-struct hsdk_cgu_clock_map {
-	u32 cgu_pll_oft;
-	u32 creg_div_oft;
-	u32 cgu_div_oft;
-	const struct hsdk_pll_devdata *pll_devdata;
-	ulong (*get_rate)(struct clk *clk);
-	ulong (*set_rate)(struct clk *clk, ulong rate);
-	int (*disable)(struct clk *clk);
+struct cgu_clk_map {
+	const u32 cgu_pll_oft;
+	const u32 cgu_div_oft;
+	const struct hsdk_pll_devdata *const pll_devdata;
+	const ulong (*const get_rate)(struct clk *clk);
+	const ulong (*const set_rate)(struct clk *clk, ulong rate);
+	const int (*const disable)(struct clk *clk);
+};
+
+static const struct cgu_clk_map hsdk_clk_map[] = {
+	[CLK_ARC_PLL]        = { CGU_ARC_PLL,  0,                      &core_pll_dat, pll_get,  pll_set,      NULL     },
+	[CLK_ARC]            = { CGU_ARC_PLL,  CGU_ARC_IDIV,           &core_pll_dat, idiv_get, cpu_clk_set,  idiv_off },
+	[CLK_DDR_PLL]        = { CGU_DDR_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_SYS_PLL]        = { CGU_SYS_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_SYS_APB]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_APB,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_AXI]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_AXI,       &sdt_pll_dat,  idiv_get, axi_clk_set,  idiv_off },
+	[CLK_SYS_ETH]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_ETH,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_USB]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_USB,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SDIO]       = { CGU_SYS_PLL,  CGU_SYS_IDIV_SDIO,      &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_HDMI]       = { CGU_SYS_PLL,  CGU_SYS_IDIV_HDMI,      &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_GFX_CORE]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_GFX_CORE,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_GFX_DMA]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_GFX_DMA,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_GFX_CFG]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_GFX_CFG,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_DMAC_CORE]  = { CGU_SYS_PLL,  CGU_SYS_IDIV_DMAC_CORE, &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_DMAC_CFG]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_DMAC_CFG,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SDIO_REF]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_SDIO_REF,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SPI_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_SPI_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_I2C_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_I2C_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_UART_REF]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_UART_REF,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_EBI_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_EBI_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_PLL]        = { CGU_TUN_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_TUN_TUN]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_TUN,       &sdt_pll_dat,  idiv_get, tun_hsdk_set, idiv_off },
+	[CLK_TUN_ROM]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_ROM,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_PWM]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_PWM,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_TIMER]      = { /* missing in HSDK */ },
+	[CLK_HDMI_PLL]       = { CGU_HDMI_PLL, 0,                      &hdmi_pll_dat, pll_get,  pll_set,      NULL     },
+	[CLK_HDMI]           = { CGU_HDMI_PLL, CGU_HDMI_IDIV_APB,      &hdmi_pll_dat, idiv_get, idiv_set,     idiv_off }
 };
 
-static const struct hsdk_cgu_clock_map clock_map[] = {
-	{ CGU_ARC_PLL, 0, 0, &core_pll_dat, pll_get, pll_set, NULL },
-	{ CGU_ARC_PLL, 0, CGU_ARC_IDIV, &core_pll_dat, idiv_get, cpu_clk_set, idiv_off },
-	{ CGU_DDR_PLL, 0, 0, &sdt_pll_dat, pll_get, pll_set, NULL },
-	{ CGU_SYS_PLL, 0, 0, &sdt_pll_dat, pll_get, pll_set, NULL },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_APB, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_AXI, &sdt_pll_dat, idiv_get, axi_clk_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_ETH, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_USB, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_SDIO, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_HDMI, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_GFX_CORE, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_GFX_DMA, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_GFX_CFG, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_DMAC_CORE, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_DMAC_CFG, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_SDIO_REF, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_SPI_REF, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_I2C_REF, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_UART_REF, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_SYS_PLL, 0, CGU_SYS_IDIV_EBI_REF, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_TUN_PLL, 0, 0, &sdt_pll_dat, pll_get, pll_set, NULL },
-	{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_TUN, &sdt_pll_dat, idiv_get, tun_clk_set, idiv_off },
-	{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_ROM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_PWM, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_TUN_PLL, 0, CGU_TUN_IDIV_TIMER, &sdt_pll_dat, idiv_get, idiv_set, idiv_off },
-	{ CGU_HDMI_PLL, 0, 0, &hdmi_pll_dat, pll_get, pll_set, NULL },
-	{ CGU_HDMI_PLL, 0, CGU_HDMI_IDIV_APB, &hdmi_pll_dat, idiv_get, idiv_set, idiv_off }
+static const struct cgu_clk_map hsdk_4xd_clk_map[] = {
+	[CLK_ARC_PLL]        = { CGU_ARC_PLL,  0,                      &core_pll_dat, pll_get,  pll_set,      NULL     },
+	[CLK_ARC]            = { CGU_ARC_PLL,  CGU_ARC_IDIV,           &core_pll_dat, idiv_get, cpu_clk_set,  idiv_off },
+	[CLK_DDR_PLL]        = { CGU_DDR_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_SYS_PLL]        = { CGU_SYS_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_SYS_APB]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_APB,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_AXI]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_AXI,       &sdt_pll_dat,  idiv_get, axi_clk_set,  idiv_off },
+	[CLK_SYS_ETH]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_ETH,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_USB]        = { CGU_SYS_PLL,  CGU_SYS_IDIV_USB,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SDIO]       = { CGU_SYS_PLL,  CGU_SYS_IDIV_SDIO,      &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_HDMI]       = { CGU_SYS_PLL,  CGU_SYS_IDIV_HDMI,      &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_GFX_CORE]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_GFX_CORE,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_GFX_DMA]    = { /* missing in HSDK-4xD */ },
+	[CLK_SYS_GFX_CFG]    = { /* missing in HSDK-4xD */ },
+	[CLK_SYS_DMAC_CORE]  = { CGU_SYS_PLL,  CGU_SYS_IDIV_DMAC_CORE, &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_DMAC_CFG]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_DMAC_CFG,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SDIO_REF]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_SDIO_REF,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_SPI_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_SPI_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_I2C_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_I2C_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_UART_REF]   = { CGU_SYS_PLL,  CGU_SYS_IDIV_UART_REF,  &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_SYS_EBI_REF]    = { CGU_SYS_PLL,  CGU_SYS_IDIV_EBI_REF,   &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_PLL]        = { CGU_TUN_PLL,  0,                      &sdt_pll_dat,  pll_get,  pll_set,      NULL     },
+	[CLK_TUN_TUN]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_TUN,       &sdt_pll_dat,  idiv_get, tun_h4xd_set, idiv_off },
+	[CLK_TUN_ROM]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_ROM,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_PWM]        = { CGU_TUN_PLL,  CGU_TUN_IDIV_PWM,       &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_TUN_TIMER]      = { CGU_TUN_PLL,  CGU_TUN_IDIV_TIMER,     &sdt_pll_dat,  idiv_get, idiv_set,     idiv_off },
+	[CLK_HDMI_PLL]       = { CGU_HDMI_PLL, 0,                      &hdmi_pll_dat, pll_get,  pll_set,      NULL     },
+	[CLK_HDMI]           = { CGU_HDMI_PLL, CGU_HDMI_IDIV_APB,      &hdmi_pll_dat, idiv_get, idiv_set,     idiv_off }
 };
 
 static inline void hsdk_idiv_write(struct hsdk_cgu_clk *clk, u32 val)
 {
-	iowrite32(val, clk->idiv_regs);
+	iowrite32(val, clk->curr_domain.idiv_regs);
 }
 
 static inline u32 hsdk_idiv_read(struct hsdk_cgu_clk *clk)
 {
-	return ioread32(clk->idiv_regs);
+	return ioread32(clk->curr_domain.idiv_regs);
 }
 
 static inline void hsdk_pll_write(struct hsdk_cgu_clk *clk, u32 reg, u32 val)
 {
-	iowrite32(val, clk->regs + reg);
+	iowrite32(val, clk->curr_domain.pll_regs + reg);
 }
 
 static inline u32 hsdk_pll_read(struct hsdk_cgu_clk *clk, u32 reg)
 {
-	return ioread32(clk->regs + reg);
+	return ioread32(clk->curr_domain.pll_regs + reg);
 }
 
 static inline void hsdk_pll_spcwrite(struct hsdk_cgu_clk *clk, u32 reg, u32 val)
 {
-	iowrite32(val, clk->spec_regs + reg);
+	iowrite32(val, clk->curr_domain.spec_regs + reg);
 }
 
 static inline u32 hsdk_pll_spcread(struct hsdk_cgu_clk *clk, u32 reg)
 {
-	return ioread32(clk->spec_regs + reg);
+	return ioread32(clk->curr_domain.spec_regs + reg);
 }
 
 static inline void hsdk_pll_set_cfg(struct hsdk_cgu_clk *clk,
@@ -359,10 +400,10 @@ static inline void hsdk_pll_set_cfg(struct hsdk_cgu_clk *clk,
 	u32 val = 0;
 
 	/* Powerdown and Bypass bits should be cleared */
-	val |= cfg->idiv << CGU_PLL_CTRL_IDIV_SHIFT;
-	val |= cfg->fbdiv << CGU_PLL_CTRL_FBDIV_SHIFT;
-	val |= cfg->odiv << CGU_PLL_CTRL_ODIV_SHIFT;
-	val |= cfg->band << CGU_PLL_CTRL_BAND_SHIFT;
+	val |= (u32)cfg->idiv << CGU_PLL_CTRL_IDIV_SHIFT;
+	val |= (u32)cfg->fbdiv << CGU_PLL_CTRL_FBDIV_SHIFT;
+	val |= (u32)cfg->odiv << CGU_PLL_CTRL_ODIV_SHIFT;
+	val |= (u32)cfg->band << CGU_PLL_CTRL_BAND_SHIFT;
 
 	pr_debug("write configurarion: %#x\n", val);
 
@@ -385,7 +426,7 @@ static ulong pll_get(struct clk *sclk)
 	u64 rate;
 	u32 idiv, fbdiv, odiv;
 	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
-	u32 parent_rate = clk->pll_devdata->parent_rate;
+	u32 parent_rate = clk->curr_domain.pll->parent_rate;
 
 	val = hsdk_pll_read(clk, CGU_PLL_CTRL);
 
@@ -417,7 +458,7 @@ static unsigned long hsdk_pll_round_rate(struct clk *sclk, unsigned long rate)
 	int i;
 	unsigned long best_rate;
 	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
-	const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;
+	const struct hsdk_pll_cfg *pll_cfg = clk->curr_domain.pll->pll_cfg;
 
 	if (pll_cfg[0].rate == 0)
 		return -EINVAL;
@@ -493,19 +534,17 @@ static ulong pll_set(struct clk *sclk, ulong rate)
 	int i;
 	unsigned long best_rate;
 	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
-	const struct hsdk_pll_cfg *pll_cfg = clk->pll_devdata->pll_cfg;
+	const struct hsdk_pll_devdata *pll = clk->curr_domain.pll;
+	const struct hsdk_pll_cfg *pll_cfg = pll->pll_cfg;
 
 	best_rate = hsdk_pll_round_rate(sclk, rate);
 
-	for (i = 0; pll_cfg[i].rate != 0; i++) {
-		if (pll_cfg[i].rate == best_rate) {
-			return clk->pll_devdata->update_rate(clk, best_rate,
-							     &pll_cfg[i]);
-		}
-	}
+	for (i = 0; pll_cfg[i].rate != 0; i++)
+		if (pll_cfg[i].rate == best_rate)
+			return pll->update_rate(clk, best_rate, &pll_cfg[i]);
 
 	pr_err("invalid rate=%ld Hz, parent_rate=%d Hz\n", best_rate,
-	       clk->pll_devdata->parent_rate);
+	       pll->parent_rate);
 
 	return -EINVAL;
 }
@@ -546,8 +585,13 @@ static ulong cpu_clk_set(struct clk *sclk, ulong rate)
 	return ret;
 }
 
-/* Special behavior: wen we set this clock we set both idiv and pll and all pll dividers */
-static ulong axi_clk_set(struct clk *sclk, ulong rate)
+/*
+ * Special behavior:
+ * when we set these clocks we set both PLL and all idiv dividers related to
+ * this PLL domain.
+ */
+static ulong common_div_clk_set(struct clk *sclk, ulong rate,
+				const struct hsdk_div_full_cfg *cfg)
 {
 	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
 	ulong pll_rate;
@@ -556,71 +600,52 @@ static ulong axi_clk_set(struct clk *sclk, ulong rate)
 
 	pll_rate = pll_get(sclk);
 
-	for (i = 0; i < MAX_AXI_CLOCKS; i++) {
-		if (axi_clk_cfg.clk_rate[i] == rate) {
+	for (i = 0; i < MAX_FREQ_VARIATIONS; i++) {
+		/* unused freq variations are filled with 0 */
+		if (!cfg->clk_rate[i])
+			break;
+
+		if (cfg->clk_rate[i] == rate) {
 			freq_idx = i;
 			break;
 		}
 	}
 
 	if (freq_idx < 0) {
-		pr_err("axi clk: invalid rate=%ld Hz\n", rate);
+		pr_err("clk: invalid rate=%ld Hz\n", rate);
 		return -EINVAL;
 	}
 
 	/* configure PLL before dividers */
-	if (axi_clk_cfg.pll_rate[freq_idx] < pll_rate)
-		ret = pll_set(sclk, axi_clk_cfg.pll_rate[freq_idx]);
+	if (cfg->pll_rate[freq_idx] < pll_rate)
+		ret = pll_set(sclk, cfg->pll_rate[freq_idx]);
 
 	/* configure SYS dividers */
-	for (i = 0; i < CGU_SYS_CLOCKS; i++) {
-		clk->idiv_regs = clk->cgu_regs + axi_clk_cfg.idiv[i].oft;
-		hsdk_idiv_write(clk, axi_clk_cfg.idiv[i].val[freq_idx]);
+	for (i = 0; cfg->idiv[i].oft != 0; i++) {
+		clk->curr_domain.idiv_regs = clk->cgu_regs + cfg->idiv[i].oft;
+		hsdk_idiv_write(clk, cfg->idiv[i].val[freq_idx]);
 	}
 
 	/* configure PLL after dividers */
-	if (axi_clk_cfg.pll_rate[freq_idx] >= pll_rate)
-		ret = pll_set(sclk, axi_clk_cfg.pll_rate[freq_idx]);
+	if (cfg->pll_rate[freq_idx] >= pll_rate)
+		ret = pll_set(sclk, cfg->pll_rate[freq_idx]);
 
 	return ret;
 }
 
-static ulong tun_clk_set(struct clk *sclk, ulong rate)
+static ulong axi_clk_set(struct clk *sclk, ulong rate)
 {
-	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
-	ulong pll_rate;
-	int i, freq_idx = -1;
-	ulong ret = 0;
-
-	pll_rate = pll_get(sclk);
-
-	for (i = 0; i < MAX_TUN_CLOCKS; i++) {
-		if (tun_clk_cfg.clk_rate[i] == rate) {
-			freq_idx = i;
-			break;
-		}
-	}
-
-	if (freq_idx < 0) {
-		pr_err("tun clk: invalid rate=%ld Hz\n", rate);
-		return -EINVAL;
-	}
-
-	/* configure PLL before dividers */
-	if (tun_clk_cfg.pll_rate[freq_idx] < pll_rate)
-		ret = pll_set(sclk, tun_clk_cfg.pll_rate[freq_idx]);
-
-	/* configure SYS dividers */
-	for (i = 0; i < CGU_TUN_CLOCKS; i++) {
-		clk->idiv_regs = clk->cgu_regs + tun_clk_cfg.idiv[i].oft;
-		hsdk_idiv_write(clk, tun_clk_cfg.idiv[i].val[freq_idx]);
-	}
+	return common_div_clk_set(sclk, rate, &axi_clk_cfg);
+}
 
-	/* configure PLL after dividers */
-	if (tun_clk_cfg.pll_rate[freq_idx] >= pll_rate)
-		ret = pll_set(sclk, tun_clk_cfg.pll_rate[freq_idx]);
+static ulong tun_hsdk_set(struct clk *sclk, ulong rate)
+{
+	return common_div_clk_set(sclk, rate, &hsdk_tun_clk_cfg);
+}
 
-	return ret;
+static ulong tun_h4xd_set(struct clk *sclk, ulong rate)
+{
+	return common_div_clk_set(sclk, rate, &hsdk_4xd_tun_clk_cfg);
 }
 
 static ulong idiv_set(struct clk *sclk, ulong rate)
@@ -661,37 +686,50 @@ static int hsdk_prepare_clock_tree_branch(struct clk *sclk)
 	if (sclk->id >= CGU_MAX_CLOCKS)
 		return -EINVAL;
 
-	clk->pll_devdata = clock_map[sclk->id].pll_devdata;
-	clk->regs = clk->cgu_regs + clock_map[sclk->id].cgu_pll_oft;
-	clk->spec_regs = clk->creg_regs + clock_map[sclk->id].creg_div_oft;
-	clk->idiv_regs = clk->cgu_regs + clock_map[sclk->id].cgu_div_oft;
+	/* clocks missing in current map have their entry zeroed */
+	if (!clk->map[sclk->id].pll_devdata)
+		return -EINVAL;
+
+	clk->curr_domain.pll = clk->map[sclk->id].pll_devdata;
+	clk->curr_domain.pll_regs = clk->cgu_regs + clk->map[sclk->id].cgu_pll_oft;
+	clk->curr_domain.spec_regs = clk->creg_regs;
+	clk->curr_domain.idiv_regs = clk->cgu_regs + clk->map[sclk->id].cgu_div_oft;
 
 	return 0;
 }
 
 static ulong hsdk_cgu_get_rate(struct clk *sclk)
 {
+	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
+
 	if (hsdk_prepare_clock_tree_branch(sclk))
 		return -EINVAL;
 
-	return clock_map[sclk->id].get_rate(sclk);
+	return clk->map[sclk->id].get_rate(sclk);
 }
 
 static ulong hsdk_cgu_set_rate(struct clk *sclk, ulong rate)
 {
+	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
+
 	if (hsdk_prepare_clock_tree_branch(sclk))
 		return -EINVAL;
 
-	return clock_map[sclk->id].set_rate(sclk, rate);
+	if (clk->map[sclk->id].set_rate)
+		return clk->map[sclk->id].set_rate(sclk, rate);
+
+	return -ENOTSUPP;
 }
 
 static int hsdk_cgu_disable(struct clk *sclk)
 {
+	struct hsdk_cgu_clk *clk = dev_get_priv(sclk->dev);
+
 	if (hsdk_prepare_clock_tree_branch(sclk))
 		return -EINVAL;
 
-	if (clock_map[sclk->id].disable)
-		return clock_map[sclk->id].disable(sclk);
+	if (clk->map[sclk->id].disable)
+		return clk->map[sclk->id].disable(sclk);
 
 	return -ENOTSUPP;
 }
@@ -704,16 +742,23 @@ static const struct clk_ops hsdk_cgu_ops = {
 
 static int hsdk_cgu_clk_probe(struct udevice *dev)
 {
-	struct hsdk_cgu_clk *pll_clk = dev_get_priv(dev);
+	struct hsdk_cgu_clk *hsdk_clk = dev_get_priv(dev);
+
+	BUILD_BUG_ON(ARRAY_SIZE(hsdk_clk_map) != CGU_MAX_CLOCKS);
+	BUILD_BUG_ON(ARRAY_SIZE(hsdk_4xd_clk_map) != CGU_MAX_CLOCKS);
 
-	BUILD_BUG_ON(ARRAY_SIZE(clock_map) != CGU_MAX_CLOCKS);
+	/* Choose which clock map to use in runtime */
+	if ((read_aux_reg(ARC_AUX_IDENTITY) & 0xFF) == 0x52)
+		hsdk_clk->map = hsdk_clk_map;
+	else
+		hsdk_clk->map = hsdk_4xd_clk_map;
 
-	pll_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
-	if (!pll_clk->cgu_regs)
+	hsdk_clk->cgu_regs = (void __iomem *)devfdt_get_addr_index(dev, 0);
+	if (!hsdk_clk->cgu_regs)
 		return -EINVAL;
 
-	pll_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
-	if (!pll_clk->creg_regs)
+	hsdk_clk->creg_regs = (void __iomem *)devfdt_get_addr_index(dev, 1);
+	if (!hsdk_clk->creg_regs)
 		return -EINVAL;
 
 	return 0;
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index b9d2ae6778..c69cce0565 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -27,6 +27,7 @@
 #include <clk-uclass.h>
 #include <dm/device.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/clk-provider.h>
 #include <clk.h>
 #include "clk.h"
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index 82241d9f3f..7a9a645137 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -12,6 +12,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <clk-uclass.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device_compat.h>
 #include <linux/err.h>
diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index 71878474eb..9ffc2243cb 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -12,9 +12,11 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/devres.h>
 #include <dm/read.h>
+#include <linux/bug.h>
 #include <linux/clk-provider.h>
 #include <linux/err.h>
 
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 4c477a488e..0f55ba751c 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <clk-uclass.h>
+#include <log.h>
 #include <dm/device.h>
 #include <dm/uclass.h>
 #include <dm/lists.h>
diff --git a/drivers/clk/clk_bcm6345.c b/drivers/clk/clk_bcm6345.c
index f01ec9a859..b850b9fc06 100644
--- a/drivers/clk/clk_bcm6345.c
+++ b/drivers/clk/clk_bcm6345.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MAX_CLKS	32
 
diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c
index 0c49ee0798..2318dcf6a4 100644
--- a/drivers/clk/clk_boston.c
+++ b/drivers/clk/clk_boston.c
@@ -9,6 +9,7 @@
 #include <dt-bindings/clock/boston-clock.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 struct clk_boston {
 	struct regmap *regmap;
diff --git a/drivers/clk/clk_pic32.c b/drivers/clk/clk_pic32.c
index 79469c454f..dc46de2a7c 100644
--- a/drivers/clk/clk_pic32.c
+++ b/drivers/clk/clk_pic32.c
@@ -12,6 +12,8 @@
 #include <wait_bit.h>
 #include <dm/lists.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <mach/pic32.h>
 #include <dt-bindings/clock/microchip,clock.h>
 
diff --git a/drivers/clk/clk_sandbox_ccf.c b/drivers/clk/clk_sandbox_ccf.c
index 3543bea70d..0619d04f0e 100644
--- a/drivers/clk/clk_sandbox_ccf.c
+++ b/drivers/clk/clk_sandbox_ccf.c
@@ -13,6 +13,7 @@
 #include <asm/clk.h>
 #include <clk-uclass.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/clk-provider.h>
 #include <sandbox-clk.h>
 #include <linux/err.h>
diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index cbcfe3a89d..93722f74ae 100644
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -7,7 +7,9 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <stm32_rcc.h>
+#include <linux/bitops.h>
 
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
diff --git a/drivers/clk/clk_stm32h7.c b/drivers/clk/clk_stm32h7.c
index 18d06b333d..5e6abca56f 100644
--- a/drivers/clk/clk_stm32h7.c
+++ b/drivers/clk/clk_stm32h7.c
@@ -7,10 +7,12 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <dm/root.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/stm32h7-clks.h>
 
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 50df8425bf..6c5eddbd9a 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -7,11 +7,14 @@
 #include <clk-uclass.h>
 #include <div64.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <regmap.h>
 #include <spl.h>
 #include <syscon.h>
 #include <time.h>
 #include <vsprintf.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <dt-bindings/clock/stm32mp1-clks.h>
@@ -954,10 +957,11 @@ static ulong stm32mp1_clk_get(struct stm32mp1_clk_priv *priv, int p)
 		case RCC_MPCKSELR_PLL:
 		case RCC_MPCKSELR_PLL_MPUDIV:
 			clock = stm32mp1_read_pll_freq(priv, _PLL1, _DIV_P);
-			if (p == RCC_MPCKSELR_PLL_MPUDIV) {
+			if ((reg & RCC_SELR_SRC_MASK) ==
+			    RCC_MPCKSELR_PLL_MPUDIV) {
 				reg = readl(priv->base + RCC_MPCKDIVR);
-				clock /= stm32mp1_mpu_div[reg &
-							  RCC_MPUDIV_MASK];
+				clock >>= stm32mp1_mpu_div[reg &
+					RCC_MPUDIV_MASK];
 			}
 			break;
 		}
diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c
index d3673a5c8b..2fb3171d71 100644
--- a/drivers/clk/clk_versal.c
+++ b/drivers/clk/clk_versal.c
@@ -5,6 +5,9 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
 #include <linux/bitfield.h>
@@ -503,6 +506,9 @@ static u64 versal_clock_calc(u32 clk_id)
 	     NODE_CLASS_MASK) == NODE_SUBCLASS_CLOCK_REF)
 		return versal_clock_ref(clk_id);
 
+	if (!parent_id)
+		return 0;
+
 	clk_rate = versal_clock_calc(parent_id);
 
 	if (versal_clock_div(clk_id)) {
@@ -526,7 +532,7 @@ static int versal_clock_get_rate(u32 clk_id, u64 *clk_rate)
 	     NODE_CLASS_MASK) == NODE_SUBCLASS_CLOCK_OUT &&
 	    ((clk_id >> NODE_CLASS_SHIFT) &
 	     NODE_CLASS_MASK) == NODE_CLASS_CLOCK) {
-		if (!versal_clock_gate(clk_id))
+		if (!versal_clock_gate(clk_id) && !versal_clock_mux(clk_id))
 			return -EINVAL;
 		*clk_rate = versal_clock_calc(clk_id);
 		return 0;
diff --git a/drivers/clk/clk_vexpress_osc.c b/drivers/clk/clk_vexpress_osc.c
index 82e589e239..b48319bba6 100644
--- a/drivers/clk/clk_vexpress_osc.c
+++ b/drivers/clk/clk_vexpress_osc.c
@@ -8,10 +8,12 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <errno.h>
 #include <misc.h>
+#include <linux/bitops.h>
 
 #define CLK_FUNCTION		BIT(20)
 
diff --git a/drivers/clk/clk_zynq.c b/drivers/clk/clk_zynq.c
index 4ca1cc0d52..a699a3664c 100644
--- a/drivers/clk/clk_zynq.c
+++ b/drivers/clk/clk_zynq.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <errno.h>
diff --git a/drivers/clk/clk_zynqmp.c b/drivers/clk/clk_zynqmp.c
index e0eb897da8..2313ac0bc0 100644
--- a/drivers/clk/clk_zynqmp.c
+++ b/drivers/clk/clk_zynqmp.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
diff --git a/drivers/clk/ics8n3qv01.c b/drivers/clk/ics8n3qv01.c
index e85ab1f9a0..4f80bf6e52 100644
--- a/drivers/clk/ics8n3qv01.c
+++ b/drivers/clk/ics8n3qv01.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <clk-uclass.h>
 #include <i2c.h>
+#include <log.h>
 
 const long long ICS8N3QV01_FREF = 114285000;
 const long long ICS8N3QV01_FREF_LL = 114285000LL;
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index 3e99c528de..494156751d 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <malloc.h>
 #include <clk-uclass.h>
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index bd0d3e4f47..11d194363d 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dt-bindings/clock/imx6qdl-clock.h>
diff --git a/drivers/clk/imx/clk-imx8.c b/drivers/clk/imx/clk-imx8.c
index 671054d9be..27a652a625 100644
--- a/drivers/clk/imx/clk-imx8.c
+++ b/drivers/clk/imx/clk-imx8.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index fc41a028f6..66c9601b0c 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -8,6 +8,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dt-bindings/clock/imx8mm-clock.h>
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
index eb43971ae6..2d8e373131 100644
--- a/drivers/clk/imx/clk-imx8mn.c
+++ b/drivers/clk/imx/clk-imx8mn.c
@@ -8,6 +8,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dt-bindings/clock/imx8mn-clock.h>
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index a2693d2f7a..3d7aebb8e5 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -8,6 +8,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dt-bindings/clock/imx8mp-clock.h>
diff --git a/drivers/clk/imx/clk-imx8qm.c b/drivers/clk/imx/clk-imx8qm.c
index a6b09d2109..54fb09fda4 100644
--- a/drivers/clk/imx/clk-imx8qm.c
+++ b/drivers/clk/imx/clk-imx8qm.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/clock.h>
 #include <dt-bindings/clock/imx8qm-clock.h>
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c
index 0db4539a1f..e6b2fb40da 100644
--- a/drivers/clk/imx/clk-imx8qxp.c
+++ b/drivers/clk/imx/clk-imx8qxp.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/clock.h>
 #include <dt-bindings/clock/imx8qxp-clock.h>
diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 329f4580c5..594093ee5f 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -8,6 +8,7 @@
 #include <clk.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dt-bindings/clock/imxrt1050-clock.h>
@@ -255,7 +256,7 @@ static int imxrt1050_clk_probe(struct udevice *dev)
 	clk_dm(IMXRT1050_CLK_SEMC,
 	       imx_clk_gate2("semc", "semc_podf", base + 0x74, 4));
 	clk_dm(IMXRT1050_CLK_LCDIF,
-	       imx_clk_gate2("lcdif", "lcdif_podf", base + 0x70, 28));
+	       imx_clk_gate2("lcdif", "lcdif_podf", base + 0x74, 10));
 
 	struct clk *clk, *clk1;
 
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
index 1673eb26b2..b0ccb6c8ed 100644
--- a/drivers/clk/imx/clk-pll14xx.c
+++ b/drivers/clk/imx/clk-pll14xx.c
@@ -11,7 +11,9 @@
 #include <clk-uclass.h>
 #include <dm/device.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/clk-provider.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/iopoll.h>
 #include <clk.h>
diff --git a/drivers/clk/mediatek/clk-mt7622.c b/drivers/clk/mediatek/clk-mt7622.c
index a5b61a190b..dc0ba71f10 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch-mediatek/reset.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt7622-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mt7623.c b/drivers/clk/mediatek/clk-mt7623.c
index dfce32e283..a15fb45e8e 100644
--- a/drivers/clk/mediatek/clk-mt7623.c
+++ b/drivers/clk/mediatek/clk-mt7623.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch-mediatek/reset.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt7623-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mt7629.c b/drivers/clk/mediatek/clk-mt7629.c
index 858be85d15..5b2aa5f200 100644
--- a/drivers/clk/mediatek/clk-mt7629.c
+++ b/drivers/clk/mediatek/clk-mt7629.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch-mediatek/reset.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt7629-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mt8512.c b/drivers/clk/mediatek/clk-mt8512.c
index cb168f146b..ad254d1cce 100644
--- a/drivers/clk/mediatek/clk-mt8512.c
+++ b/drivers/clk/mediatek/clk-mt8512.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt8512-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mt8516.c b/drivers/clk/mediatek/clk-mt8516.c
index 071bf69b19..cd1db25783 100644
--- a/drivers/clk/mediatek/clk-mt8516.c
+++ b/drivers/clk/mediatek/clk-mt8516.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt8516-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mt8518.c b/drivers/clk/mediatek/clk-mt8518.c
index 76f7b3b361..985a0c1de5 100644
--- a/drivers/clk/mediatek/clk-mt8518.c
+++ b/drivers/clk/mediatek/clk-mt8518.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <dt-bindings/clock/mt8518-clk.h>
+#include <linux/bitops.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c
index c52537cedf..388471b03a 100644
--- a/drivers/clk/mediatek/clk-mtk.c
+++ b/drivers/clk/mediatek/clk-mtk.c
@@ -11,6 +11,8 @@
 #include <div64.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include "clk-mtk.h"
 
diff --git a/drivers/clk/mediatek/clk-mtk.h b/drivers/clk/mediatek/clk-mtk.h
index c7dc980861..95a23d14a8 100644
--- a/drivers/clk/mediatek/clk-mtk.h
+++ b/drivers/clk/mediatek/clk-mtk.h
@@ -7,6 +7,7 @@
 #ifndef __DRV_CLK_MTK_H
 #define __DRV_CLK_MTK_H
 
+#include <linux/bitops.h>
 #define CLK_XTAL			0
 #define MHZ				(1000 * 1000)
 
diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c
index 4b0028d04b..6ef8b418d7 100644
--- a/drivers/clk/meson/axg.c
+++ b/drivers/clk/meson/axg.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock-axg.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
@@ -14,6 +15,7 @@
 #include <syscon.h>
 #include <div64.h>
 #include <dt-bindings/clock/axg-clkc.h>
+#include <linux/bitops.h>
 #include "clk_meson.h"
 #include <linux/err.h>
 
diff --git a/drivers/clk/meson/clk_meson.h b/drivers/clk/meson/clk_meson.h
index 7adc55a980..ef72a416c1 100644
--- a/drivers/clk/meson/clk_meson.h
+++ b/drivers/clk/meson/clk_meson.h
@@ -10,6 +10,7 @@
 
 /* Gate Structure */
 
+#include <linux/bitops.h>
 struct meson_gate {
 	unsigned int reg;
 	unsigned int bit;
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
index 6089f8474e..bf2f357435 100644
--- a/drivers/clk/meson/g12a.c
+++ b/drivers/clk/meson/g12a.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock-g12a.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
@@ -14,6 +15,8 @@
 #include <syscon.h>
 #include <div64.h>
 #include <dt-bindings/clock/g12a-clkc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include "clk_meson.h"
diff --git a/drivers/clk/meson/gxbb.c b/drivers/clk/meson/gxbb.c
index 5ef4dd794d..b9353c053e 100644
--- a/drivers/clk/meson/gxbb.c
+++ b/drivers/clk/meson/gxbb.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock-gx.h>
 #include <asm/io.h>
 #include <clk-uclass.h>
@@ -14,6 +15,7 @@
 #include <regmap.h>
 #include <syscon.h>
 #include <dt-bindings/clock/gxbb-clkc.h>
+#include <linux/bitops.h>
 #include "clk_meson.h"
 #include <linux/err.h>
 
diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c
index 4183db2845..8d96ec767a 100644
--- a/drivers/clk/mpc83xx_clk.c
+++ b/drivers/clk/mpc83xx_clk.c
@@ -7,11 +7,14 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <clock_legacy.h>
+#include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <vsprintf.h>
 #include <dm/lists.h>
 #include <dt-bindings/clk/mpc83xx-clk.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 
 #include "mpc83xx_clk.h"
 
@@ -390,7 +393,8 @@ U_BOOT_DRIVER(mpc83xx_clk) = {
 	.bind = mpc83xx_clk_bind,
 };
 
-static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_clocks(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	int i;
 	char buf[32];
diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h
index 7fb8802920..8a31a4c868 100644
--- a/drivers/clk/mpc83xx_clk.h
+++ b/drivers/clk/mpc83xx_clk.h
@@ -17,6 +17,7 @@
  * @RAT_2_5_TO_1: Ratio 2.5:1
  * @RAT_3_TO_1:   Ratio 3:1
  */
+#include <linux/bitops.h>
 enum ratio {
 	RAT_UNK,
 	RAT_BYP,
diff --git a/drivers/clk/mvebu/armada-37xx-periph.c b/drivers/clk/mvebu/armada-37xx-periph.c
index 855f979b4f..223da22c1b 100644
--- a/drivers/clk/mvebu/armada-37xx-periph.c
+++ b/drivers/clk/mvebu/armada-37xx-periph.c
@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #define TBG_SEL		0x0
 #define DIV_SEL0	0x4
diff --git a/drivers/clk/owl/clk_owl.c b/drivers/clk/owl/clk_owl.c
index 5607b2b7b5..9715fce162 100644
--- a/drivers/clk/owl/clk_owl.c
+++ b/drivers/clk/owl/clk_owl.c
@@ -17,6 +17,8 @@
 #include <asm/arch-owl/regs_s700.h>
 #include <dt-bindings/clock/actions,s700-cmu.h>
 #endif
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 void owl_clk_init(struct owl_clk_priv *priv)
 {
diff --git a/drivers/clk/owl/clk_owl.h b/drivers/clk/owl/clk_owl.h
index b8d33624c5..cf896bdb98 100644
--- a/drivers/clk/owl/clk_owl.h
+++ b/drivers/clk/owl/clk_owl.h
@@ -11,6 +11,9 @@
 #define _OWL_CLK_H_
 
 #include <clk-uclass.h>
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
 
 enum owl_soc {
 	S700,
diff --git a/drivers/clk/renesas/clk-rcar-gen2.c b/drivers/clk/renesas/clk-rcar-gen2.c
index bfd7620dae..3ed0aa92cb 100644
--- a/drivers/clk/renesas/clk-rcar-gen2.c
+++ b/drivers/clk/renesas/clk-rcar-gen2.c
@@ -14,6 +14,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 
 #include <dt-bindings/clock/renesas-cpg-mssr.h>
diff --git a/drivers/clk/renesas/clk-rcar-gen3.c b/drivers/clk/renesas/clk-rcar-gen3.c
index a2011dd37c..15e3833756 100644
--- a/drivers/clk/renesas/clk-rcar-gen3.c
+++ b/drivers/clk/renesas/clk-rcar-gen3.c
@@ -14,8 +14,10 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/renesas-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7790-cpg-mssr.c b/drivers/clk/renesas/r8a7790-cpg-mssr.c
index b62b8753cd..7451f53ba3 100644
--- a/drivers/clk/renesas/r8a7790-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7790-cpg-mssr.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7791-cpg-mssr.c b/drivers/clk/renesas/r8a7791-cpg-mssr.c
index e11c02e6e8..25fd489609 100644
--- a/drivers/clk/renesas/r8a7791-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7791-cpg-mssr.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7792-cpg-mssr.c b/drivers/clk/renesas/r8a7792-cpg-mssr.c
index fb18ee7aed..d47ab99e88 100644
--- a/drivers/clk/renesas/r8a7792-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7792-cpg-mssr.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7794-cpg-mssr.c b/drivers/clk/renesas/r8a7794-cpg-mssr.c
index b6be1bc032..7093e0d42c 100644
--- a/drivers/clk/renesas/r8a7794-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7794-cpg-mssr.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index ab4747ee14..dcd96ad017 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 253a9143b7..89dc141239 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a77965-cpg-mssr.c b/drivers/clk/renesas/r8a77965-cpg-mssr.c
index bd36ea3b6d..6ed88295c9 100644
--- a/drivers/clk/renesas/r8a77965-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77965-cpg-mssr.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a77970-cpg-mssr.c b/drivers/clk/renesas/r8a77970-cpg-mssr.c
index 961eb7fb60..df07120171 100644
--- a/drivers/clk/renesas/r8a77970-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77970-cpg-mssr.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a77980-cpg-mssr.c b/drivers/clk/renesas/r8a77980-cpg-mssr.c
index c076ac771f..c8d7a9469b 100644
--- a/drivers/clk/renesas/r8a77980-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77980-cpg-mssr.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a77990-cpg-mssr.c b/drivers/clk/renesas/r8a77990-cpg-mssr.c
index 3168de20f9..357e7b534d 100644
--- a/drivers/clk/renesas/r8a77990-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77990-cpg-mssr.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c
index 1c79370982..d62aeba635 100644
--- a/drivers/clk/renesas/r8a77995-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 7698613877..7c1222f6c8 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -13,8 +13,10 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #include <dt-bindings/clock/renesas-cpg-mssr.h>
 
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 5b7012d37c..b669dec594 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -13,6 +13,7 @@
 #ifndef __DRIVERS_CLK_RENESAS_CPG_MSSR__
 #define __DRIVERS_CLK_RENESAS_CPG_MSSR__
 
+#include <linux/bitops.h>
 struct cpg_mssr_info {
 	const struct cpg_core_clk	*core_clk;
 	unsigned int			core_clk_size;
diff --git a/drivers/clk/rockchip/clk_pll.c b/drivers/clk/rockchip/clk_pll.c
index c4b45314ec..83d45c75ee 100644
--- a/drivers/clk/rockchip/clk_pll.c
+++ b/drivers/clk/rockchip/clk_pll.c
@@ -7,10 +7,12 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <div64.h>
+#include <linux/delay.h>
 
 static struct rockchip_pll_rate_table rockchip_auto_table;
 
diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
index b88534145e..71916dbf3b 100644
--- a/drivers/clk/rockchip/clk_px30.c
+++ b/drivers/clk/rockchip/clk_px30.c
@@ -8,6 +8,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
@@ -16,6 +17,8 @@
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/px30-cru.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/clk/rockchip/clk_rk3036.c b/drivers/clk/rockchip/clk_rk3036.c
index 6e085c4136..274572f70c 100644
--- a/drivers/clk/rockchip/clk_rk3036.c
+++ b/drivers/clk/rockchip/clk_rk3036.c
@@ -7,6 +7,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -15,7 +16,9 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3036-cru.h>
+#include <linux/delay.h>
 #include <linux/log2.h>
+#include <linux/stringify.h>
 
 enum {
 	VCO_MAX_HZ	= 2400U * 1000000,
diff --git a/drivers/clk/rockchip/clk_rk3128.c b/drivers/clk/rockchip/clk_rk3128.c
index a6f7902941..61f823e254 100644
--- a/drivers/clk/rockchip/clk_rk3128.c
+++ b/drivers/clk/rockchip/clk_rk3128.c
@@ -7,6 +7,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -16,6 +17,7 @@
 #include <bitfield.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3128-cru.h>
+#include <linux/delay.h>
 #include <linux/log2.h>
 
 enum {
diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c
index 2b82a40d28..11e3bd33cb 100644
--- a/drivers/clk/rockchip/clk_rk3188.c
+++ b/drivers/clk/rockchip/clk_rk3188.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <syscon.h>
@@ -21,8 +22,10 @@
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass-internal.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/log2.h>
+#include <linux/stringify.h>
 
 enum rk3188_clk_type {
 	RK3188_CRU,
diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c
index ef33adbf29..054b2fd349 100644
--- a/drivers/clk/rockchip/clk_rk322x.c
+++ b/drivers/clk/rockchip/clk_rk322x.c
@@ -7,6 +7,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -15,7 +16,10 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3228-cru.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/log2.h>
+#include <linux/stringify.h>
 
 enum {
 	VCO_MAX_HZ	= 3200U * 1000000,
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c
index 81cdb8ee9c..a1dd642eef 100644
--- a/drivers/clk/rockchip/clk_rk3288.c
+++ b/drivers/clk/rockchip/clk_rk3288.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <syscon.h>
@@ -22,8 +23,11 @@
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass-internal.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/log2.h>
+#include <linux/stringify.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/clk/rockchip/clk_rk3308.c b/drivers/clk/rockchip/clk_rk3308.c
index c0f1285e4c..d3633b6979 100644
--- a/drivers/clk/rockchip/clk_rk3308.c
+++ b/drivers/clk/rockchip/clk_rk3308.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <div64.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -16,6 +17,7 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3308-cru.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/clk/rockchip/clk_rk3328.c b/drivers/clk/rockchip/clk_rk3328.c
index 8e867c58df..02d3b08efa 100644
--- a/drivers/clk/rockchip/clk_rk3328.c
+++ b/drivers/clk/rockchip/clk_rk3328.c
@@ -8,6 +8,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
@@ -17,6 +18,8 @@
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3328-cru.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 struct pll_div {
 	u32 refdiv;
diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c
index 2cce1b967d..d1804c6e16 100644
--- a/drivers/clk/rockchip/clk_rk3368.c
+++ b/drivers/clk/rockchip/clk_rk3368.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <syscon.h>
@@ -20,6 +21,8 @@
 #include <asm/io.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3368-cru.h>
+#include <linux/delay.h>
+#include <linux/stringify.h>
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct rk3368_clk_plat {
diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 1f62376595..22c373a623 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <syscon.h>
@@ -19,6 +20,8 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rk3399-cru.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #if CONFIG_IS_ENABLED(OF_PLATDATA)
 struct rk3399_clk_plat {
@@ -725,7 +728,7 @@ static ulong rk3399_mmc_get_clk(struct rockchip_cru *cru, uint clk_id)
 		div = 2;
 		break;
 	case SCLK_EMMC:
-		con = readl(&cru->clksel_con[21]);
+		con = readl(&cru->clksel_con[22]);
 		div = 1;
 		break;
 	default:
@@ -996,6 +999,9 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 		break;
 	case ACLK_VOP1:
 	case HCLK_VOP1:
+	case HCLK_SD:
+	case SCLK_UPHY0_TCPDCORE:
+	case SCLK_UPHY1_TCPDCORE:
 		/**
 		 * assigned-clocks handling won't require for vopl, so
 		 * return 0 to satisfy clk_set_defaults during device probe.
@@ -1070,12 +1076,202 @@ static int __maybe_unused rk3399_clk_set_parent(struct clk *clk,
 	return -ENOENT;
 }
 
+static int rk3399_clk_enable(struct clk *clk)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case SCLK_MAC:
+		rk_clrreg(&priv->cru->clkgate_con[5], BIT(5));
+		break;
+	case SCLK_MAC_RX:
+		rk_clrreg(&priv->cru->clkgate_con[5], BIT(8));
+		break;
+	case SCLK_MAC_TX:
+		rk_clrreg(&priv->cru->clkgate_con[5], BIT(9));
+		break;
+	case SCLK_MACREF:
+		rk_clrreg(&priv->cru->clkgate_con[5], BIT(7));
+		break;
+	case SCLK_MACREF_OUT:
+		rk_clrreg(&priv->cru->clkgate_con[5], BIT(6));
+		break;
+	case SCLK_USB2PHY0_REF:
+		rk_clrreg(&priv->cru->clkgate_con[6], BIT(5));
+		break;
+	case SCLK_USB2PHY1_REF:
+		rk_clrreg(&priv->cru->clkgate_con[6], BIT(6));
+		break;
+	case ACLK_GMAC:
+		rk_clrreg(&priv->cru->clkgate_con[32], BIT(0));
+		break;
+	case PCLK_GMAC:
+		rk_clrreg(&priv->cru->clkgate_con[32], BIT(2));
+		break;
+	case SCLK_USB3OTG0_REF:
+		rk_clrreg(&priv->cru->clkgate_con[12], BIT(1));
+		break;
+	case SCLK_USB3OTG1_REF:
+		rk_clrreg(&priv->cru->clkgate_con[12], BIT(2));
+		break;
+	case SCLK_USB3OTG0_SUSPEND:
+		rk_clrreg(&priv->cru->clkgate_con[12], BIT(3));
+		break;
+	case SCLK_USB3OTG1_SUSPEND:
+		rk_clrreg(&priv->cru->clkgate_con[12], BIT(4));
+		break;
+	case ACLK_USB3OTG0:
+		rk_clrreg(&priv->cru->clkgate_con[30], BIT(1));
+		break;
+	case ACLK_USB3OTG1:
+		rk_clrreg(&priv->cru->clkgate_con[30], BIT(2));
+		break;
+	case ACLK_USB3_RKSOC_AXI_PERF:
+		rk_clrreg(&priv->cru->clkgate_con[30], BIT(3));
+		break;
+	case ACLK_USB3:
+		rk_clrreg(&priv->cru->clkgate_con[12], BIT(0));
+		break;
+	case ACLK_USB3_GRF:
+		rk_clrreg(&priv->cru->clkgate_con[30], BIT(4));
+		break;
+	case HCLK_HOST0:
+		rk_clrreg(&priv->cru->clksel_con[20], BIT(5));
+		break;
+	case HCLK_HOST0_ARB:
+		rk_clrreg(&priv->cru->clksel_con[20], BIT(6));
+		break;
+	case HCLK_HOST1:
+		rk_clrreg(&priv->cru->clksel_con[20], BIT(7));
+		break;
+	case HCLK_HOST1_ARB:
+		rk_clrreg(&priv->cru->clksel_con[20], BIT(8));
+		break;
+	case SCLK_UPHY0_TCPDPHY_REF:
+		rk_clrreg(&priv->cru->clkgate_con[13], BIT(4));
+		break;
+	case SCLK_UPHY0_TCPDCORE:
+		rk_clrreg(&priv->cru->clkgate_con[13], BIT(5));
+		break;
+	case SCLK_UPHY1_TCPDPHY_REF:
+		rk_clrreg(&priv->cru->clkgate_con[13], BIT(6));
+		break;
+	case SCLK_UPHY1_TCPDCORE:
+		rk_clrreg(&priv->cru->clkgate_con[13], BIT(7));
+		break;
+	case SCLK_PCIEPHY_REF:
+		rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+		break;
+	default:
+		debug("%s: unsupported clk %ld\n", __func__, clk->id);
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
+static int rk3399_clk_disable(struct clk *clk)
+{
+	struct rk3399_clk_priv *priv = dev_get_priv(clk->dev);
+
+	switch (clk->id) {
+	case SCLK_MAC:
+		rk_setreg(&priv->cru->clkgate_con[5], BIT(5));
+		break;
+	case SCLK_MAC_RX:
+		rk_setreg(&priv->cru->clkgate_con[5], BIT(8));
+		break;
+	case SCLK_MAC_TX:
+		rk_setreg(&priv->cru->clkgate_con[5], BIT(9));
+		break;
+	case SCLK_MACREF:
+		rk_setreg(&priv->cru->clkgate_con[5], BIT(7));
+		break;
+	case SCLK_MACREF_OUT:
+		rk_setreg(&priv->cru->clkgate_con[5], BIT(6));
+		break;
+	case SCLK_USB2PHY0_REF:
+		rk_setreg(&priv->cru->clkgate_con[6], BIT(5));
+		break;
+	case SCLK_USB2PHY1_REF:
+		rk_setreg(&priv->cru->clkgate_con[6], BIT(6));
+		break;
+	case ACLK_GMAC:
+		rk_setreg(&priv->cru->clkgate_con[32], BIT(0));
+		break;
+	case PCLK_GMAC:
+		rk_setreg(&priv->cru->clkgate_con[32], BIT(2));
+		break;
+	case SCLK_USB3OTG0_REF:
+		rk_setreg(&priv->cru->clkgate_con[12], BIT(1));
+		break;
+	case SCLK_USB3OTG1_REF:
+		rk_setreg(&priv->cru->clkgate_con[12], BIT(2));
+		break;
+	case SCLK_USB3OTG0_SUSPEND:
+		rk_setreg(&priv->cru->clkgate_con[12], BIT(3));
+		break;
+	case SCLK_USB3OTG1_SUSPEND:
+		rk_setreg(&priv->cru->clkgate_con[12], BIT(4));
+		break;
+	case ACLK_USB3OTG0:
+		rk_setreg(&priv->cru->clkgate_con[30], BIT(1));
+		break;
+	case ACLK_USB3OTG1:
+		rk_setreg(&priv->cru->clkgate_con[30], BIT(2));
+		break;
+	case ACLK_USB3_RKSOC_AXI_PERF:
+		rk_setreg(&priv->cru->clkgate_con[30], BIT(3));
+		break;
+	case ACLK_USB3:
+		rk_setreg(&priv->cru->clkgate_con[12], BIT(0));
+		break;
+	case ACLK_USB3_GRF:
+		rk_setreg(&priv->cru->clkgate_con[30], BIT(4));
+		break;
+	case HCLK_HOST0:
+		rk_setreg(&priv->cru->clksel_con[20], BIT(5));
+		break;
+	case HCLK_HOST0_ARB:
+		rk_setreg(&priv->cru->clksel_con[20], BIT(6));
+		break;
+	case HCLK_HOST1:
+		rk_setreg(&priv->cru->clksel_con[20], BIT(7));
+		break;
+	case HCLK_HOST1_ARB:
+		rk_setreg(&priv->cru->clksel_con[20], BIT(8));
+		break;
+	case SCLK_UPHY0_TCPDPHY_REF:
+		rk_setreg(&priv->cru->clkgate_con[13], BIT(4));
+		break;
+	case SCLK_UPHY0_TCPDCORE:
+		rk_setreg(&priv->cru->clkgate_con[13], BIT(5));
+		break;
+	case SCLK_UPHY1_TCPDPHY_REF:
+		rk_setreg(&priv->cru->clkgate_con[13], BIT(6));
+		break;
+	case SCLK_UPHY1_TCPDCORE:
+		rk_setreg(&priv->cru->clkgate_con[13], BIT(7));
+		break;
+	case SCLK_PCIEPHY_REF:
+		rk_clrreg(&priv->cru->clksel_con[18], BIT(10));
+		break;
+	default:
+		debug("%s: unsupported clk %ld\n", __func__, clk->id);
+		return -ENOENT;
+	}
+
+	return 0;
+}
+
 static struct clk_ops rk3399_clk_ops = {
 	.get_rate = rk3399_clk_get_rate,
 	.set_rate = rk3399_clk_set_rate,
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 	.set_parent = rk3399_clk_set_parent,
 #endif
+	.enable = rk3399_clk_enable,
+	.disable = rk3399_clk_disable,
 };
 
 #ifdef CONFIG_SPL_BUILD
diff --git a/drivers/clk/rockchip/clk_rv1108.c b/drivers/clk/rockchip/clk_rv1108.c
index da9c48b962..aa1d98ca2a 100644
--- a/drivers/clk/rockchip/clk_rv1108.c
+++ b/drivers/clk/rockchip/clk_rv1108.c
@@ -9,6 +9,7 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -17,6 +18,8 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
 #include <dt-bindings/clock/rv1108-cru.h>
+#include <linux/delay.h>
+#include <linux/stringify.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/clk/sifive/fu540-prci.c b/drivers/clk/sifive/fu540-prci.c
index 8847178001..67e21b6746 100644
--- a/drivers/clk/sifive/fu540-prci.c
+++ b/drivers/clk/sifive/fu540-prci.c
@@ -35,6 +35,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <errno.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #include <linux/math64.h>
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
index 7a96d1708e..67507c5ab1 100644
--- a/drivers/clk/sunxi/clk_a10.c
+++ b/drivers/clk/sunxi/clk_a10.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun4i-a10-ccu.h>
 #include <dt-bindings/reset/sun4i-a10-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a10_gates[] = {
 	[CLK_AHB_OTG]		= GATE(0x060, BIT(0)),
diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
index 33d41d47b0..d11a4b5f03 100644
--- a/drivers/clk/sunxi/clk_a10s.c
+++ b/drivers/clk/sunxi/clk_a10s.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun5i-ccu.h>
 #include <dt-bindings/reset/sun5i-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a10s_gates[] = {
 	[CLK_AHB_OTG]		= GATE(0x060, BIT(0)),
diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
index c16019215e..4d562bfe42 100644
--- a/drivers/clk/sunxi/clk_a23.c
+++ b/drivers/clk/sunxi/clk_a23.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a23_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
index 4ec3c2ae89..4a9454eebe 100644
--- a/drivers/clk/sunxi/clk_a31.c
+++ b/drivers/clk/sunxi/clk_a31.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun6i-a31-ccu.h>
 #include <dt-bindings/reset/sun6i-a31-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a31_gates[] = {
 	[CLK_AHB1_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk/sunxi/clk_a64.c
index f94e8aa754..d96cb1aac1 100644
--- a/drivers/clk/sunxi/clk_a64.c
+++ b/drivers/clk/sunxi/clk_a64.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <linux/bitops.h>
 
 static const struct ccu_clk_gate a64_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_a80.c b/drivers/clk/sunxi/clk_a80.c
index fb76aad528..80d7407037 100644
--- a/drivers/clk/sunxi/clk_a80.c
+++ b/drivers/clk/sunxi/clk_a80.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun9i-a80-ccu.h>
 #include <dt-bindings/reset/sun9i-a80-ccu.h>
+#include <linux/bitops.h>
 
 static const struct ccu_clk_gate a80_gates[] = {
 	[CLK_SPI0]		= GATE(0x430, BIT(31)),
diff --git a/drivers/clk/sunxi/clk_a83t.c b/drivers/clk/sunxi/clk_a83t.c
index 2be87a31fd..d6f23ddc77 100644
--- a/drivers/clk/sunxi/clk_a83t.c
+++ b/drivers/clk/sunxi/clk_a83t.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate a83t_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 6111a13f1c..7e844f4ff1 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun8i-h3-ccu.h>
 #include <dt-bindings/reset/sun8i-h3-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate h3_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 105c15d869..a1cb8952d3 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun50i-h6-ccu.h>
 #include <dt-bindings/reset/sun50i-h6-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate h6_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x84c, BIT(0)),
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index 44abc4f536..ac360b2beb 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun8i-r40-ccu.h>
 #include <dt-bindings/reset/sun8i-r40-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate r40_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/sunxi/clk_sunxi.c b/drivers/clk/sunxi/clk_sunxi.c
index 6d4aeb5315..41934cd826 100644
--- a/drivers/clk/sunxi/clk_sunxi.c
+++ b/drivers/clk/sunxi/clk_sunxi.c
@@ -8,9 +8,11 @@
 #include <clk-uclass.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <asm/arch/ccu.h>
+#include <linux/bitops.h>
 #include <linux/log2.h>
 
 static const struct ccu_clk_gate *priv_to_gate(struct ccu_priv *priv,
diff --git a/drivers/clk/sunxi/clk_v3s.c b/drivers/clk/sunxi/clk_v3s.c
index 789ac72026..b79446cc4f 100644
--- a/drivers/clk/sunxi/clk_v3s.c
+++ b/drivers/clk/sunxi/clk_v3s.c
@@ -11,6 +11,7 @@
 #include <asm/arch/ccu.h>
 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
+#include <linux/bitops.h>
 
 static struct ccu_clk_gate v3s_gates[] = {
 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
diff --git a/drivers/clk/tegra/tegra-car-clk.c b/drivers/clk/tegra/tegra-car-clk.c
index 6083f14e75..09a7cf470c 100644
--- a/drivers/clk/tegra/tegra-car-clk.c
+++ b/drivers/clk/tegra/tegra-car-clk.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/clock.h>
 #include <asm/arch-tegra/clk_rst.h>
diff --git a/drivers/clk/tegra/tegra186-clk.c b/drivers/clk/tegra/tegra186-clk.c
index 612fb1b972..5a98a3f3f0 100644
--- a/drivers/clk/tegra/tegra186-clk.c
+++ b/drivers/clk/tegra/tegra186-clk.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <misc.h>
 #include <asm/arch-tegra/bpmp_abi.h>
 
diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c
index 9f24050992..c9ec523080 100644
--- a/drivers/clk/uniphier/clk-uniphier-core.c
+++ b/drivers/clk/uniphier/clk-uniphier-core.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 
diff --git a/drivers/core/acpi.c b/drivers/core/acpi.c
index ba50d688fe..8ae61575dd 100644
--- a/drivers/core/acpi.c
+++ b/drivers/core/acpi.c
@@ -10,9 +10,19 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/acpi.h>
+#include <dm/device-internal.h>
 #include <dm/root.h>
 
+/* Type of method to call */
+enum method_t {
+	METHOD_WRITE_TABLES,
+};
+
+/* Prototype for all methods */
+typedef int (*acpi_method)(const struct udevice *dev, struct acpi_ctx *ctx);
+
 int acpi_copy_name(char *out_name, const char *name)
 {
 	strncpy(out_name, name, ACPI_NAME_LEN);
@@ -31,3 +41,56 @@ int acpi_get_name(const struct udevice *dev, char *out_name)
 
 	return -ENOSYS;
 }
+
+acpi_method acpi_get_method(struct udevice *dev, enum method_t method)
+{
+	struct acpi_ops *aops;
+
+	aops = device_get_acpi_ops(dev);
+	if (aops) {
+		switch (method) {
+		case METHOD_WRITE_TABLES:
+			return aops->write_tables;
+		}
+	}
+
+	return NULL;
+}
+
+int acpi_recurse_method(struct acpi_ctx *ctx, struct udevice *parent,
+			enum method_t method)
+{
+	struct udevice *dev;
+	acpi_method func;
+	int ret;
+
+	func = acpi_get_method(parent, method);
+	if (func) {
+		log_debug("\n");
+		log_debug("- %s %p\n", parent->name, func);
+		ret = device_ofdata_to_platdata(parent);
+		if (ret)
+			return log_msg_ret("ofdata", ret);
+		ret = func(parent, ctx);
+		if (ret)
+			return log_msg_ret("func", ret);
+	}
+	device_foreach_child(dev, parent) {
+		ret = acpi_recurse_method(ctx, dev, method);
+		if (ret)
+			return log_msg_ret("recurse", ret);
+	}
+
+	return 0;
+}
+
+int acpi_write_dev_tables(struct acpi_ctx *ctx)
+{
+	int ret;
+
+	log_debug("Writing device tables\n");
+	ret = acpi_recurse_method(ctx, dm_root(), METHOD_WRITE_TABLES);
+	log_debug("Writing finished, err=%d\n", ret);
+
+	return ret;
+}
diff --git a/drivers/core/device.c b/drivers/core/device.c
index 0157bb1fe0..a7408d9c76 100644
--- a/drivers/core/device.c
+++ b/drivers/core/device.c
@@ -10,11 +10,13 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/io.h>
 #include <clk.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
diff --git a/drivers/core/devres.c b/drivers/core/devres.c
index 457e1309c5..88244698b0 100644
--- a/drivers/core/devres.c
+++ b/drivers/core/devres.c
@@ -10,6 +10,7 @@
 #define LOG_CATEGORY LOGC_DEVRES
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/compat.h>
 #include <linux/kernel.h>
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 33811e62f7..dfcb868f65 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/device-internal.h>
 
diff --git a/drivers/core/lists.c b/drivers/core/lists.c
index c7db14ed56..5beba9181c 100644
--- a/drivers/core/lists.c
+++ b/drivers/core/lists.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <dm/device.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index ea3ee8bd63..922e78f99b 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -20,7 +20,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
+#include <linux/bug.h>
 #include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <linux/ctype.h>
diff --git a/drivers/core/of_addr.c b/drivers/core/of_addr.c
index 4e256d9926..ca34d84922 100644
--- a/drivers/core/of_addr.c
+++ b/drivers/core/of_addr.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/bug.h>
 #include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
diff --git a/drivers/core/of_extra.c b/drivers/core/of_extra.c
index f1f393c359..6420e6ec44 100644
--- a/drivers/core/of_extra.c
+++ b/drivers/core/of_extra.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <dm/of_access.h>
 #include <dm/of_extra.h>
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 20871a6815..c37afa1fe6 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/libfdt.h>
 #include <dm/of_access.h>
@@ -474,6 +475,17 @@ ofnode ofnode_get_chosen_node(const char *name)
 	return ofnode_path(prop);
 }
 
+int ofnode_get_child_count(ofnode parent)
+{
+	ofnode child;
+	int num = 0;
+
+	ofnode_for_each_subnode(child, parent)
+		num++;
+
+	return num;
+}
+
 static int decode_timing_property(ofnode node, const char *name,
 				  struct timing_entry *result)
 {
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 47b8e03446..047089c886 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -4,12 +4,12 @@
  * Written by Simon Glass <sjg@chromium.org>
  */
 
-#include <asm/types.h>
-#include <asm/io.h>
 #include <common.h>
 #include <dm.h>
-#include <mapmem.h>
 #include <dm/of_access.h>
+#include <mapmem.h>
+#include <asm/types.h>
+#include <asm/io.h>
 
 int dev_read_u32(const struct udevice *dev, const char *propname, u32 *outp)
 {
@@ -352,3 +352,8 @@ fdt_addr_t dev_read_addr_pci(const struct udevice *dev)
 
 	return addr;
 }
+
+int dev_get_child_count(const struct udevice *dev)
+{
+	return ofnode_get_child_count(dev_ofnode(dev));
+}
diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index a974744a61..4a214eff7c 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <mapmem.h>
diff --git a/drivers/core/root.c b/drivers/core/root.c
index 14df16c280..7d257ea887 100644
--- a/drivers/core/root.c
+++ b/drivers/core/root.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/libfdt.h>
 #include <dm/device.h>
diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c
index 15f0e42a85..b5cd763b6b 100644
--- a/drivers/core/syscon-uclass.c
+++ b/drivers/core/syscon-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <syscon.h>
 #include <dm.h>
 #include <errno.h>
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 6849302936..2ab419cfe4 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device.h>
 #include <dm/device-internal.h>
diff --git a/drivers/cpu/bmips_cpu.c b/drivers/cpu/bmips_cpu.c
index fc047473f5..2649c5c6e9 100644
--- a/drivers/cpu/bmips_cpu.c
+++ b/drivers/cpu/bmips_cpu.c
@@ -11,7 +11,9 @@
 #include <cpu.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define REV_CHIPID_SHIFT		16
 #define REV_CHIPID_MASK			(0xffff << REV_CHIPID_SHIFT)
diff --git a/drivers/cpu/cpu-uclass.c b/drivers/cpu/cpu-uclass.c
index 457f77b7c8..7418c26ed8 100644
--- a/drivers/cpu/cpu-uclass.c
+++ b/drivers/cpu/cpu-uclass.c
@@ -8,8 +8,10 @@
 #include <cpu.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <dm/root.h>
+#include <linux/err.h>
 
 int cpu_probe_all(void)
 {
@@ -34,6 +36,39 @@ int cpu_probe_all(void)
 	return 0;
 }
 
+int cpu_is_current(struct udevice *cpu)
+{
+	struct cpu_ops *ops = cpu_get_ops(cpu);
+
+	if (ops->is_current) {
+		if (ops->is_current(cpu))
+			return 1;
+	}
+
+	return -ENOSYS;
+}
+
+struct udevice *cpu_get_current_dev(void)
+{
+	struct udevice *cpu;
+	int ret;
+
+	uclass_foreach_dev_probe(UCLASS_CPU, cpu) {
+		if (cpu_is_current(cpu) > 0)
+			return cpu;
+	}
+
+	/* If can't find current cpu device, use the first dev instead */
+	ret = uclass_first_device_err(UCLASS_CPU, &cpu);
+	if (ret) {
+		debug("%s: Could not get CPU device (err = %d)\n",
+		      __func__, ret);
+		return NULL;
+	}
+
+	return cpu;
+}
+
 int cpu_get_desc(struct udevice *dev, char *buf, int size)
 {
 	struct cpu_ops *ops = cpu_get_ops(dev);
diff --git a/drivers/cpu/cpu_sandbox.c b/drivers/cpu/cpu_sandbox.c
index 05b384f6a4..30a12e5a53 100644
--- a/drivers/cpu/cpu_sandbox.c
+++ b/drivers/cpu/cpu_sandbox.c
@@ -36,11 +36,20 @@ int cpu_sandbox_get_vendor(struct udevice *dev, char *buf, int size)
 	return 0;
 }
 
+int cpu_sandbox_is_current(struct udevice *dev)
+{
+	if (!strcmp(dev->name, "cpu-test1"))
+		return 1;
+
+	return 0;
+}
+
 static const struct cpu_ops cpu_sandbox_ops = {
 	.get_desc = cpu_sandbox_get_desc,
 	.get_info = cpu_sandbox_get_info,
 	.get_count = cpu_sandbox_get_count,
 	.get_vendor = cpu_sandbox_get_vendor,
+	.is_current = cpu_sandbox_is_current,
 };
 
 int cpu_sandbox_probe(struct udevice *dev)
diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c
index 95653683ac..6345cd0815 100644
--- a/drivers/cpu/imx8_cpu.c
+++ b/drivers/cpu/imx8_cpu.c
@@ -7,10 +7,12 @@
 #include <cpu.h>
 #include <dm.h>
 #include <thermal.h>
+#include <asm/system.h>
 #include <asm/arch/sci/sci.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/arch-imx/cpu.h>
 #include <asm/armv8/cpu.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -18,8 +20,10 @@ struct cpu_imx_platdata {
 	const char *name;
 	const char *rev;
 	const char *type;
+	u32 cpu_rsrc;
 	u32 cpurev;
 	u32 freq_mhz;
+	u32 mpidr;
 };
 
 const char *get_imx8_type(u32 imxtype)
@@ -42,32 +46,43 @@ const char *get_imx8_rev(u32 rev)
 		return "A";
 	case CHIP_REV_B:
 		return "B";
+	case CHIP_REV_C:
+		return "C";
 	default:
 		return "?";
 	}
 }
 
-const char *get_core_name(void)
+static void set_core_data(struct udevice *dev)
 {
-	if (is_cortex_a35())
-		return "A35";
-	else if (is_cortex_a53())
-		return "A53";
-	else if (is_cortex_a72())
-		return "A72";
-	else
-		return "?";
+	struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+
+	if (device_is_compatible(dev, "arm,cortex-a35")) {
+		plat->cpu_rsrc = SC_R_A35;
+		plat->name = "A35";
+	} else if (device_is_compatible(dev, "arm,cortex-a53")) {
+		plat->cpu_rsrc = SC_R_A53;
+		plat->name = "A53";
+	} else if (device_is_compatible(dev, "arm,cortex-a72")) {
+		plat->cpu_rsrc = SC_R_A72;
+		plat->name = "A72";
+	} else {
+		plat->cpu_rsrc = SC_R_A53;
+		plat->name = "?";
+	}
 }
 
 #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
-static int cpu_imx_get_temp(void)
+static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
 {
 	struct udevice *thermal_dev;
 	int cpu_tmp, ret;
+	int idx = 1; /* use "cpu-thermal0" device */
 
-	ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
-					&thermal_dev);
+	if (plat->cpu_rsrc == SC_R_A72)
+		idx = 2; /* use "cpu-thermal1" device */
 
+	ret = uclass_get_device(UCLASS_THERMAL, idx, &thermal_dev);
 	if (!ret) {
 		ret = thermal_get_temp(thermal_dev, &cpu_tmp);
 		if (ret)
@@ -79,7 +94,7 @@ static int cpu_imx_get_temp(void)
 	return cpu_tmp;
 }
 #else
-static int cpu_imx_get_temp(void)
+static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
 {
 	return 0;
 }
@@ -88,7 +103,7 @@ static int cpu_imx_get_temp(void)
 int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
 {
 	struct cpu_imx_platdata *plat = dev_get_platdata(dev);
-	int ret;
+	int ret, temp;
 
 	if (size < 100)
 		return -ENOSPC;
@@ -97,9 +112,13 @@ int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
 		       plat->type, plat->rev, plat->name, plat->freq_mhz);
 
 	if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
+		temp = cpu_imx_get_temp(plat);
 		buf = buf + ret;
 		size = size - ret;
-		ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
+		if (temp != 0xdeadbeef)
+			ret = snprintf(buf, size, " at %dC", temp);
+		else
+			ret = snprintf(buf, size, " - invalid sensor data");
 	}
 
 	snprintf(buf + ret, size - ret, "\n");
@@ -118,7 +137,24 @@ static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
 
 static int cpu_imx_get_count(struct udevice *dev)
 {
-	return 4;
+	ofnode node;
+	int num = 0;
+
+	ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
+		const char *device_type;
+
+		if (!ofnode_is_available(node))
+			continue;
+
+		device_type = ofnode_read_string(node, "device_type");
+		if (!device_type)
+			continue;
+
+		if (!strcmp(device_type, "cpu"))
+			num++;
+	}
+
+	return num;
 }
 
 static int cpu_imx_get_vendor(struct udevice *dev,  char *buf, int size)
@@ -127,27 +163,38 @@ static int cpu_imx_get_vendor(struct udevice *dev,  char *buf, int size)
 	return 0;
 }
 
+static int cpu_imx_is_current(struct udevice *dev)
+{
+	struct cpu_imx_platdata *plat = dev_get_platdata(dev);
+
+	if (plat->mpidr == (read_mpidr() & 0xffff))
+		return 1;
+
+	return 0;
+}
+
 static const struct cpu_ops cpu_imx8_ops = {
 	.get_desc	= cpu_imx_get_desc,
 	.get_info	= cpu_imx_get_info,
 	.get_count	= cpu_imx_get_count,
 	.get_vendor	= cpu_imx_get_vendor,
+	.is_current	= cpu_imx_is_current,
 };
 
 static const struct udevice_id cpu_imx8_ids[] = {
 	{ .compatible = "arm,cortex-a35" },
 	{ .compatible = "arm,cortex-a53" },
+	{ .compatible = "arm,cortex-a72" },
 	{ }
 };
 
-static ulong imx8_get_cpu_rate(void)
+static ulong imx8_get_cpu_rate(struct udevice *dev)
 {
+	struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 	ulong rate;
 	int ret;
-	int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
-		   SC_R_A53 : SC_R_A72;
 
-	ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
+	ret = sc_pm_get_clock_rate(-1, plat->cpu_rsrc, SC_PM_CLK_CPU,
 				   (sc_pm_clock_rate_t *)&rate);
 	if (ret) {
 		printf("Could not read CPU frequency: %d\n", ret);
@@ -162,12 +209,18 @@ static int imx8_cpu_probe(struct udevice *dev)
 	struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 	u32 cpurev;
 
+	set_core_data(dev);
 	cpurev = get_cpu_rev();
 	plat->cpurev = cpurev;
-	plat->name = get_core_name();
 	plat->rev = get_imx8_rev(cpurev & 0xFFF);
 	plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
-	plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
+	plat->freq_mhz = imx8_get_cpu_rate(dev) / 1000000;
+	plat->mpidr = dev_read_addr(dev);
+	if (plat->mpidr == FDT_ADDR_T_NONE) {
+		printf("%s: Failed to get CPU reg property\n", __func__);
+		return -EINVAL;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/cpu/mpc83xx_cpu.c b/drivers/cpu/mpc83xx_cpu.c
index 1e58457742..f8a84bae9d 100644
--- a/drivers/cpu/mpc83xx_cpu.c
+++ b/drivers/cpu/mpc83xx_cpu.c
@@ -9,7 +9,9 @@
 #include <clk.h>
 #include <cpu.h>
 #include <dm.h>
+#include <log.h>
 #include <vsprintf.h>
+#include <linux/bitops.h>
 
 #include "mpc83xx_cpu.h"
 
diff --git a/drivers/cpu/riscv_cpu.c b/drivers/cpu/riscv_cpu.c
index 28ad0aa30f..cb04f5638d 100644
--- a/drivers/cpu/riscv_cpu.c
+++ b/drivers/cpu/riscv_cpu.c
@@ -7,8 +7,10 @@
 #include <cpu.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/crypto/ace_sha.c b/drivers/crypto/ace_sha.c
index 34611056ec..261d3efe84 100644
--- a/drivers/crypto/ace_sha.c
+++ b/drivers/crypto/ace_sha.c
@@ -5,6 +5,8 @@
  */
 #include <common.h>
 #include "ace_sha.h"
+#include <log.h>
+#include <rand.h>
 
 #ifdef CONFIG_SHA_HW_ACCEL
 #include <u-boot/sha256.h>
diff --git a/drivers/crypto/fsl/error.c b/drivers/crypto/fsl/error.c
index 731c748443..c76574919c 100644
--- a/drivers/crypto/fsl/error.c
+++ b/drivers/crypto/fsl/error.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include "desc.h"
 #include "jr.h"
diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c
index 0531b1b735..d6bd861251 100644
--- a/drivers/crypto/fsl/fsl_blob.c
+++ b/drivers/crypto/fsl/fsl_blob.c
@@ -6,9 +6,11 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <fsl_sec.h>
+#include <asm/cache.h>
 #include <linux/errno.h>
 #include "jobdesc.h"
 #include "desc.h"
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index 74e38ca759..953deec9ff 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include "jobdesc.h"
@@ -13,6 +14,7 @@
 #include "jr.h"
 #include "fsl_hash.h"
 #include <hw_sha.h>
+#include <asm/cache.h>
 #include <linux/errno.h>
 
 #define CRYPTO_MAX_ALG_NAME	80
diff --git a/drivers/crypto/fsl/fsl_rsa.c b/drivers/crypto/fsl/fsl_rsa.c
index 0cb3c6b5f2..ed2a54f6ec 100644
--- a/drivers/crypto/fsl/fsl_rsa.c
+++ b/drivers/crypto/fsl/fsl_rsa.c
@@ -7,6 +7,7 @@
 #include <config.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/types.h>
 #include <malloc.h>
 #include "jobdesc.h"
diff --git a/drivers/crypto/fsl/jobdesc.c b/drivers/crypto/fsl/jobdesc.c
index 637ef29f15..2f35e0c90b 100644
--- a/drivers/crypto/fsl/jobdesc.c
+++ b/drivers/crypto/fsl/jobdesc.c
@@ -13,6 +13,7 @@
 #include "desc_constr.h"
 #include "jobdesc.h"
 #include "rsa_caam.h"
+#include <asm/cache.h>
 
 #if defined(CONFIG_MX6) || defined(CONFIG_MX7)
 /*!
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c
index aa84f2cee0..e2d9216cfc 100644
--- a/drivers/crypto/fsl/jr.c
+++ b/drivers/crypto/fsl/jr.c
@@ -7,13 +7,16 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include "fsl_sec.h"
 #include "jr.h"
 #include "jobdesc.h"
 #include "desc_constr.h"
 #include <time.h>
+#include <asm/cache.h>
 #ifdef CONFIG_FSL_CORENET
+#include <asm/cache.h>
 #include <asm/fsl_pamu.h>
 #endif
 
diff --git a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
index c9b571a461..4ce85b3224 100644
--- a/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
+++ b/drivers/crypto/rsa_mod_exp/mod_exp_sw.c
@@ -7,6 +7,7 @@
 #include <config.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <u-boot/rsa-mod-exp.h>
 
 static int mod_exp_sw(struct udevice *dev, const uint8_t *sig, uint32_t sig_len,
@@ -31,6 +32,7 @@ U_BOOT_DRIVER(mod_exp_sw) = {
 	.name	= "mod_exp_sw",
 	.id	= UCLASS_MOD_EXP,
 	.ops	= &mod_exp_ops_sw,
+	.flags	= DM_FLAG_PRE_RELOC,
 };
 
 U_BOOT_DEVICE(mod_exp_sw) = {
diff --git a/drivers/ddr/altera/sdram_agilex.c b/drivers/ddr/altera/sdram_agilex.c
index 626fb724d4..a0f25d1179 100644
--- a/drivers/ddr/altera/sdram_agilex.c
+++ b/drivers/ddr/altera/sdram_agilex.c
@@ -10,6 +10,7 @@
 #include <div64.h>
 #include <fdtdec.h>
 #include <hang.h>
+#include <log.h>
 #include <ram.h>
 #include <reset.h>
 #include "sdram_soc64.h"
diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c
index 2fd50b7ae5..3c58f59f3a 100644
--- a/drivers/ddr/altera/sdram_arria10.c
+++ b/drivers/ddr/altera/sdram_arria10.c
@@ -7,14 +7,19 @@
 #include <cpu_func.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <wait_bit.h>
 #include <watchdog.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/fpga_manager.h>
 #include <asm/arch/misc.h>
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/sdram.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/kernel.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ddr/altera/sdram_gen5.c b/drivers/ddr/altera/sdram_gen5.c
index 314c7aea00..1360bd0a3b 100644
--- a/drivers/ddr/altera/sdram_gen5.c
+++ b/drivers/ddr/altera/sdram_gen5.c
@@ -7,6 +7,7 @@
 #include <errno.h>
 #include <div64.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <reset.h>
 #include <watchdog.h>
@@ -14,6 +15,7 @@
 #include <asm/arch/reset_manager.h>
 #include <asm/arch/sdram.h>
 #include <asm/arch/system_manager.h>
+#include <asm/bitops.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 0b36d6c027..91f76e03c2 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -12,6 +12,7 @@
 #include <fdtdec.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <reset.h>
 #include "sdram_s10.h"
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index 1f7ead0c67..491f689c44 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -11,6 +11,8 @@
 #include <div64.h>
 #include <fdtdec.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <reset.h>
 #include "sdram_soc64.h"
@@ -18,6 +20,7 @@
 #include <asm/arch/firewall.h>
 #include <asm/arch/system_manager.h>
 #include <asm/arch/reset_manager.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/sizes.h>
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index 35bda9b34c..2dbde49a9c 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/sdram.h>
 #include <errno.h>
diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c
index e9eaa1e0af..629ba6784e 100644
--- a/drivers/ddr/fsl/arm_ddr_gen3.c
+++ b/drivers/ddr/fsl/arm_ddr_gen3.c
@@ -6,12 +6,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
 #include <fsl_immap.h>
 #include <fsl_ddr.h>
 #include <asm/arch/clock.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 98ccbb70de..2d3fb1953b 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -15,6 +15,8 @@
 #include <fsl_errata.h>
 #include <fsl_ddr.h>
 #include <fsl_immap.h>
+#include <log.h>
+#include <asm/bitops.h>
 #include <asm/io.h>
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
 	defined(CONFIG_ARM)
diff --git a/drivers/ddr/fsl/ddr1_dimm_params.c b/drivers/ddr/fsl/ddr1_dimm_params.c
index 50fd998425..e5481eaa0d 100644
--- a/drivers/ddr/fsl/ddr1_dimm_params.c
+++ b/drivers/ddr/fsl/ddr1_dimm_params.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
+#include <asm/bitops.h>
 
 #include <fsl_ddr.h>
 
diff --git a/drivers/ddr/fsl/ddr2_dimm_params.c b/drivers/ddr/fsl/ddr2_dimm_params.c
index ad91ba63a8..3b78118a9d 100644
--- a/drivers/ddr/fsl/ddr2_dimm_params.c
+++ b/drivers/ddr/fsl/ddr2_dimm_params.c
@@ -5,6 +5,8 @@
 
 #include <common.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
+#include <asm/bitops.h>
 
 #include <fsl_ddr.h>
 /*
diff --git a/drivers/ddr/fsl/ddr3_dimm_params.c b/drivers/ddr/fsl/ddr3_dimm_params.c
index 47b4d7663f..8464438c54 100644
--- a/drivers/ddr/fsl/ddr3_dimm_params.c
+++ b/drivers/ddr/fsl/ddr3_dimm_params.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
 
 #include <fsl_ddr.h>
 
diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c
index 2aa53d116f..e2bdc12ef2 100644
--- a/drivers/ddr/fsl/ddr4_dimm_params.c
+++ b/drivers/ddr/fsl/ddr4_dimm_params.c
@@ -12,6 +12,8 @@
 
 #include <common.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
+#include <linux/bug.h>
 
 #include <fsl_ddr.h>
 
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index 17a4a8282b..eab5b82b23 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
@@ -15,6 +16,7 @@
 	defined(CONFIG_ARM)
 #include <asm/arch/clock.h>
 #endif
+#include <linux/delay.h>
 
 #define CTLR_INTLV_MASK	0x20000000
 
diff --git a/drivers/ddr/fsl/fsl_mmdc.c b/drivers/ddr/fsl/fsl_mmdc.c
index 08285120ca..cbd625b7ee 100644
--- a/drivers/ddr/fsl/fsl_mmdc.c
+++ b/drivers/ddr/fsl/fsl_mmdc.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <fsl_mmdc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 static void set_wait_for_bits_clear(void *ptr, u32 value, u32 bits)
 {
diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c
index 8e171e67fe..2f76beb2db 100644
--- a/drivers/ddr/fsl/interactive.c
+++ b/drivers/ddr/fsl/interactive.c
@@ -13,7 +13,10 @@
 
 #include <common.h>
 #include <cli.h>
+#include <command.h>
 #include <env.h>
+#include <log.h>
+#include <asm/bitops.h>
 #include <linux/ctype.h>
 #include <asm/types.h>
 #include <asm/io.h>
diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c
index df5bdb6e08..d299d763db 100644
--- a/drivers/ddr/fsl/lc_common_dimm_params.c
+++ b/drivers/ddr/fsl/lc_common_dimm_params.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
+#include <asm/bitops.h>
 
 #include <fsl_ddr.h>
 
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index 0aa6aedae7..84139b85c3 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -14,6 +14,9 @@
 #include <i2c.h>
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
+#include <init.h>
+#include <log.h>
+#include <asm/bitops.h>
 
 /*
  * CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY is the physical address from the view
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
index 1ab15c98f1..572f3703d5 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen1.c
@@ -4,8 +4,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
index 54c10a860a..d7b8064e5f 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen2.c
@@ -7,6 +7,7 @@
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
index a9b085db8c..ab8d2deaf9 100644
--- a/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
+++ b/drivers/ddr/fsl/mpc85xx_ddr_gen3.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
 #include <asm/processor.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/mpc86xx_ddr.c b/drivers/ddr/fsl/mpc86xx_ddr.c
index 934b72b08c..43ed1ba432 100644
--- a/drivers/ddr/fsl/mpc86xx_ddr.c
+++ b/drivers/ddr/fsl/mpc86xx_ddr.c
@@ -4,8 +4,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <fsl_ddr_sdram.h>
+#include <linux/delay.h>
 
 #if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
 #error Invalid setting for CONFIG_CHIP_SELECTS_PER_CTRL
diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c
index b9179315f2..c000a45f8e 100644
--- a/drivers/ddr/fsl/options.c
+++ b/drivers/ddr/fsl/options.c
@@ -8,6 +8,7 @@
 #include <env.h>
 #include <hwconfig.h>
 #include <fsl_ddr_sdram.h>
+#include <log.h>
 
 #include <fsl_ddr.h>
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index b27079670d..ac4f8d2732 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -8,9 +8,11 @@
 #include <asm/fsl_law.h>
 #endif
 #include <div64.h>
+#include <linux/delay.h>
 
 #include <fsl_ddr.h>
 #include <fsl_immap.h>
+#include <log.h>
 #include <asm/io.h>
 #if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) || \
 	defined(CONFIG_ARM)
diff --git a/drivers/ddr/imx/imx8m/ddr_init.c b/drivers/ddr/imx/imx8m/ddr_init.c
index af8c1427d2..bbddee6ca8 100644
--- a/drivers/ddr/imx/imx8m/ddr_init.c
+++ b/drivers/ddr/imx/imx8m/ddr_init.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/ddr.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/ddr/imx/imx8m/ddrphy_train.c b/drivers/ddr/imx/imx8m/ddrphy_train.c
index 306af82504..f2a997b50a 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_train.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_train.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/kernel.h>
 #include <asm/arch/ddr.h>
 #include <asm/arch/lpddr4_define.h>
diff --git a/drivers/ddr/imx/imx8m/ddrphy_utils.c b/drivers/ddr/imx/imx8m/ddrphy_utils.c
index 9ac7ca923c..d5eef53573 100644
--- a/drivers/ddr/imx/imx8m/ddrphy_utils.c
+++ b/drivers/ddr/imx/imx8m/ddrphy_utils.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/ddr.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c
index b3e63834ca..5ebf54f5f4 100644
--- a/drivers/ddr/imx/imx8m/helper.c
+++ b/drivers/ddr/imx/imx8m/helper.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <errno.h>
diff --git a/drivers/ddr/marvell/a38x/ddr3_debug.c b/drivers/ddr/marvell/a38x/ddr3_debug.c
index f5fc964d6f..22e0cc4d91 100644
--- a/drivers/ddr/marvell/a38x/ddr3_debug.c
+++ b/drivers/ddr/marvell/a38x/ddr3_debug.c
@@ -6,6 +6,7 @@
 #include "ddr3_init.h"
 #include "mv_ddr_training_db.h"
 #include "mv_ddr_regs.h"
+#include <log.h>
 
 u8 is_reg_dump = 0;
 u8 debug_pbs = DEBUG_LEVEL_ERROR;
diff --git a/drivers/ddr/marvell/a38x/ddr3_training.c b/drivers/ddr/marvell/a38x/ddr3_training.c
index 9718f18c30..34cc170910 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training.c
@@ -7,6 +7,8 @@
 #include "mv_ddr_common.h"
 #include "mv_ddr_training_db.h"
 #include "mv_ddr_regs.h"
+#include <log.h>
+#include <linux/delay.h>
 
 #define GET_CS_FROM_MASK(mask)	(cs_mask2_num[mask])
 #define CS_CBE_VALUE(cs_num)	(cs_cbe_reg[cs_num])
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
index 1eababeebd..979f3530b7 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_ip_engine.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_regs.h"
 #include "ddr_training_ip_db.h"
 #include <image.h>
+#include <linux/delay.h>
 
 #define PATTERN_1	0x55555555
 #define PATTERN_2	0xaaaaaaaa
diff --git a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
index 7f7df6794a..dadb06b318 100644
--- a/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_leveling.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_training_db.h"
 #include "ddr_training_ip_db.h"
 #include "mv_ddr_regs.h"
+#include <linux/delay.h>
 
 #define WL_ITERATION_NUM	10
 
diff --git a/drivers/ddr/marvell/a38x/mv_ddr_plat.c b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
index cc7942d0ba..72f0dfbbbb 100644
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -7,6 +7,7 @@
 #include "mv_ddr_training_db.h"
 #include "mv_ddr_regs.h"
 #include "mv_ddr_sys_env_lib.h"
+#include <linux/delay.h>
 
 #define DDR_INTERFACES_NUM		1
 #define DDR_INTERFACE_OCTETS_NUM	5
diff --git a/drivers/ddr/marvell/axp/ddr3_dfs.c b/drivers/ddr/marvell/axp/ddr3_dfs.c
index ba899592f8..b58c0fe01e 100644
--- a/drivers/ddr/marvell/axp/ddr3_dfs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dfs.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_dqs.c b/drivers/ddr/marvell/axp/ddr3_dqs.c
index 0a64dde884..0db94212b9 100644
--- a/drivers/ddr/marvell/axp/ddr3_dqs.c
+++ b/drivers/ddr/marvell/axp/ddr3_dqs.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_hw_training.c b/drivers/ddr/marvell/axp/ddr3_hw_training.c
index cc3a77c850..35d98faf58 100644
--- a/drivers/ddr/marvell/axp/ddr3_hw_training.c
+++ b/drivers/ddr/marvell/axp/ddr3_hw_training.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_init.h"
 #include "ddr3_hw_training.h"
diff --git a/drivers/ddr/marvell/axp/ddr3_init.c b/drivers/ddr/marvell/axp/ddr3_init.c
index 30ad5d4151..607f3e12c3 100644
--- a/drivers/ddr/marvell/axp/ddr3_init.c
+++ b/drivers/ddr/marvell/axp/ddr3_init.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_init.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_pbs.c b/drivers/ddr/marvell/axp/ddr3_pbs.c
index e44f08d26a..069a42fbf5 100644
--- a/drivers/ddr/marvell/axp/ddr3_pbs.c
+++ b/drivers/ddr/marvell/axp/ddr3_pbs.c
@@ -9,6 +9,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"
 
diff --git a/drivers/ddr/marvell/axp/ddr3_read_leveling.c b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
index bf8d67616a..30a5c35488 100644
--- a/drivers/ddr/marvell/axp/ddr3_read_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_read_leveling.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/ddr/marvell/axp/ddr3_write_leveling.c b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
index cd364edabb..d4add44777 100644
--- a/drivers/ddr/marvell/axp/ddr3_write_leveling.c
+++ b/drivers/ddr/marvell/axp/ddr3_write_leveling.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "ddr3_hw_training.h"
 
diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c
index 31e6582655..17bfe6a7bf 100644
--- a/drivers/ddr/marvell/axp/xor.c
+++ b/drivers/ddr/marvell/axp/xor.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/demo/demo-shape.c b/drivers/demo/demo-shape.c
index 98b644680c..8686c99845 100644
--- a/drivers/demo/demo-shape.c
+++ b/drivers/demo/demo-shape.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm-demo.h>
 #include <asm/io.h>
diff --git a/drivers/demo/demo-uclass.c b/drivers/demo/demo-uclass.c
index 3b8439b836..6c36f03254 100644
--- a/drivers/demo/demo-uclass.c
+++ b/drivers/demo/demo-uclass.c
@@ -11,6 +11,7 @@
 #include <dm-demo.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <linux/list.h>
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 174fb588a6..5d45d7d7c2 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -81,5 +81,10 @@ config DFU_VIRT
 	  used at board level to manage specific behavior
 	  (OTP update for example).
 
+config SET_DFU_ALT_INFO
+	bool "Dynamic set of DFU alternate information"
+	help
+	  This option allows to call the function set_dfu_alt_info to
+	  dynamically build dfu_alt_info in board.
 endif
 endmenu
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index df50196dfd..a298c2c439 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <env.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <fat.h>
diff --git a/drivers/dfu/dfu_mmc.c b/drivers/dfu/dfu_mmc.c
index 0d495a785b..691d01c7eb 100644
--- a/drivers/dfu/dfu_mmc.c
+++ b/drivers/dfu/dfu_mmc.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <div64.h>
@@ -14,6 +15,7 @@
 #include <ext4fs.h>
 #include <fat.h>
 #include <mmc.h>
+#include <part.h>
 
 static unsigned char *dfu_file_buf;
 static u64 dfu_file_buf_len;
@@ -369,7 +371,7 @@ int dfu_fill_entity_mmc(struct dfu_entity *dfu, char *devstr, char *s)
 					simple_strtoul(s, NULL, 0);
 
 	} else if (!strcmp(entity_type, "part")) {
-		disk_partition_t partinfo;
+		struct disk_partition partinfo;
 		struct blk_desc *blk_dev = mmc_get_blk_desc(mmc);
 		int mmcdev = second_arg;
 		int mmcpart = third_arg;
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/dfu_nand.c
index 58b94348c9..b8d24d203b 100644
--- a/drivers/dfu/dfu_nand.c
+++ b/drivers/dfu/dfu_nand.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <div64.h>
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index 0fdbfae434..318e43c179 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <malloc.h>
 #include <errno.h>
 #include <div64.h>
diff --git a/drivers/dfu/dfu_tftp.c b/drivers/dfu/dfu_tftp.c
index e5b35bfd5f..ffae4bb54f 100644
--- a/drivers/dfu/dfu_tftp.c
+++ b/drivers/dfu/dfu_tftp.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <dfu.h>
diff --git a/drivers/dfu/dfu_virt.c b/drivers/dfu/dfu_virt.c
index ea8c71f100..62605bcde5 100644
--- a/drivers/dfu/dfu_virt.c
+++ b/drivers/dfu/dfu_virt.c
@@ -5,6 +5,7 @@
 #include <common.h>
 #include <dfu.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 
 int __weak dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 4f37ba7d35..1993c1d31d 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -44,7 +44,7 @@ config TI_EDMA3
 
 config APBH_DMA
 	bool "Support APBH DMA"
-	depends on MX23 || MX28 || MX6 || MX7
+	depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
 	help
 	  Enable APBH DMA driver.
 
diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 15133128be..da988f6bb6 100644
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -7,9 +7,12 @@
  *
  * Based on code from LTIB:
  * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2017 NXP
+ *
  */
 
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <linux/list.h>
 
 #include <common.h>
@@ -88,7 +91,7 @@ void mxs_dma_flush_desc(struct mxs_dma_desc *desc)
 	uint32_t addr;
 	uint32_t size;
 
-	addr = (uint32_t)desc;
+	addr = (uintptr_t)desc;
 	size = roundup(sizeof(struct mxs_dma_desc), MXS_DMA_ALIGNMENT);
 
 	flush_dcache_range(addr, addr + size);
@@ -215,16 +218,17 @@ static int mxs_dma_reset(int channel)
 #if defined(CONFIG_MX23)
 	uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
 	uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
-	uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
-	uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
+#elif defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7) || \
+	defined(CONFIG_IMX8) || defined(CONFIG_IMX8M)
+	u32 setreg = (uintptr_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
+	u32 offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif
 
 	ret = mxs_dma_validate_chan(channel);
 	if (ret)
 		return ret;
 
-	writel(1 << (channel + offset), setreg);
+	writel(1 << (channel + offset), (uintptr_t)setreg);
 
 	return 0;
 }
diff --git a/drivers/dma/bcm6348-iudma.c b/drivers/dma/bcm6348-iudma.c
index d99460f2fb..91172d483c 100644
--- a/drivers/dma/bcm6348-iudma.c
+++ b/drivers/dma/bcm6348-iudma.c
@@ -20,10 +20,14 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <dma-uclass.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <net.h>
 #include <reset.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define DMA_RX_DESC	6
 #define DMA_TX_DESC	1
diff --git a/drivers/dma/dma-uclass.c b/drivers/dma/dma-uclass.c
index 9d5a7fc796..8cbb364042 100644
--- a/drivers/dma/dma-uclass.c
+++ b/drivers/dma/dma-uclass.c
@@ -12,7 +12,9 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <dm/read.h>
 #include <dma-uclass.h>
 #include <dt-structs.h>
diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c
index 3a15121200..443e4b2366 100644
--- a/drivers/dma/keystone_nav.c
+++ b/drivers/dma/keystone_nav.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/ti-common/keystone_nav.h>
+#include <linux/delay.h>
 
 struct qm_config qm_memmap = {
 	.stat_cfg	= CONFIG_KSNAV_QM_QUEUE_STATUS_BASE,
diff --git a/drivers/dma/lpc32xx_dma.c b/drivers/dma/lpc32xx_dma.c
index d3ce141eef..ab58e97bfe 100644
--- a/drivers/dma/lpc32xx_dma.c
+++ b/drivers/dma/lpc32xx_dma.c
@@ -9,11 +9,14 @@
 
 #include <common.h>
 #include <errno.h>
+#include <init.h>
 #include <asm/arch/dma.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/sys_proto.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* DMA controller channel register structure */
 struct dmac_chan_reg {
diff --git a/drivers/dma/sandbox-dma-test.c b/drivers/dma/sandbox-dma-test.c
index 234a7d2134..838596b24b 100644
--- a/drivers/dma/sandbox-dma-test.c
+++ b/drivers/dma/sandbox-dma-test.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/read.h>
 #include <dma-uclass.h>
diff --git a/drivers/dma/ti-edma3.c b/drivers/dma/ti-edma3.c
index 7e11b13e45..77c4ba9530 100644
--- a/drivers/dma/ti-edma3.c
+++ b/drivers/dma/ti-edma3.c
@@ -8,6 +8,7 @@
  * Author: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
  */
 
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
diff --git a/drivers/dma/ti/k3-udma-hwdef.h b/drivers/dma/ti/k3-udma-hwdef.h
index c88399a815..5d50bbcb03 100644
--- a/drivers/dma/ti/k3-udma-hwdef.h
+++ b/drivers/dma/ti/k3-udma-hwdef.h
@@ -12,6 +12,7 @@
 #ifndef K3_NAVSS_UDMA_HWDEF_H_
 #define K3_NAVSS_UDMA_HWDEF_H_
 
+#include <linux/bitops.h>
 #define UDMA_PSIL_DST_THREAD_ID_OFFSET 0x8000
 
 /* Global registers */
diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c
index a0e536ae5e..2ce16c8e27 100644
--- a/drivers/dma/ti/k3-udma.c
+++ b/drivers/dma/ti/k3-udma.c
@@ -7,9 +7,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/bitops.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/dma-mapping.h>
 #include <dm.h>
 #include <dm/device_compat.h>
diff --git a/drivers/fastboot/fb_command.c b/drivers/fastboot/fb_command.c
index 3c4acfecf6..49f6a61c37 100644
--- a/drivers/fastboot/fb_command.c
+++ b/drivers/fastboot/fb_command.c
@@ -10,6 +10,7 @@
 #include <fastboot-internal.h>
 #include <fb_mmc.h>
 #include <fb_nand.h>
+#include <flash.h>
 #include <part.h>
 #include <stdlib.h>
 
diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c
index 95cb434189..52da34b1e3 100644
--- a/drivers/fastboot/fb_getvar.c
+++ b/drivers/fastboot/fb_getvar.c
@@ -10,6 +10,7 @@
 #include <fb_mmc.h>
 #include <fb_nand.h>
 #include <fs.h>
+#include <part.h>
 #include <version.h>
 
 static void getvar_version(char *var_parameter, char *response);
@@ -103,7 +104,7 @@ static int getvar_get_part_info(const char *part_name, char *response,
 	int r;
 # if CONFIG_IS_ENABLED(FASTBOOT_FLASH_MMC)
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
+	struct disk_partition part_info;
 
 	r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info,
 				       response);
@@ -219,7 +220,7 @@ static void getvar_partition_type(char *part_name, char *response)
 {
 	int r;
 	struct blk_desc *dev_desc;
-	disk_partition_t part_info;
+	struct disk_partition part_info;
 
 	r = fastboot_mmc_get_part_info(part_name, &dev_desc, &part_info,
 				       response);
diff --git a/drivers/fastboot/fb_mmc.c b/drivers/fastboot/fb_mmc.c
index d7cf9f4aac..b2f8932e1c 100644
--- a/drivers/fastboot/fb_mmc.c
+++ b/drivers/fastboot/fb_mmc.c
@@ -10,7 +10,10 @@
 #include <fastboot.h>
 #include <fastboot-internal.h>
 #include <fb_mmc.h>
+#include <flash.h>
 #include <image-sparse.h>
+#include <image.h>
+#include <log.h>
 #include <part.h>
 #include <mmc.h>
 #include <div64.h>
@@ -26,7 +29,7 @@ struct fb_mmc_sparse {
 };
 
 static int part_get_info_by_name_or_alias(struct blk_desc *dev_desc,
-		const char *name, disk_partition_t *info)
+		const char *name, struct disk_partition *info)
 {
 	int ret;
 
@@ -97,9 +100,9 @@ static lbaint_t fb_mmc_sparse_reserve(struct sparse_storage *info,
 	return blkcnt;
 }
 
-static void write_raw_image(struct blk_desc *dev_desc, disk_partition_t *info,
-		const char *part_name, void *buffer,
-		u32 download_bytes, char *response)
+static void write_raw_image(struct blk_desc *dev_desc,
+			    struct disk_partition *info, const char *part_name,
+			    void *buffer, u32 download_bytes, char *response)
 {
 	lbaint_t blkcnt;
 	lbaint_t blks;
@@ -210,7 +213,7 @@ static void fb_mmc_boot1_ops(struct blk_desc *dev_desc, void *buffer,
  * @return Boot image header sectors count or 0 on error
  */
 static lbaint_t fb_mmc_get_boot_header(struct blk_desc *dev_desc,
-				       disk_partition_t *info,
+				       struct disk_partition *info,
 				       struct andr_img_hdr *hdr,
 				       char *response)
 {
@@ -270,7 +273,7 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
 	u32 kernel_sector_start;
 	u32 kernel_sectors;
 	u32 sectors_per_page;
-	disk_partition_t info;
+	struct disk_partition info;
 	int res;
 
 	puts("Flashing zImage\n");
@@ -366,12 +369,12 @@ static int fb_mmc_update_zimage(struct blk_desc *dev_desc,
  *
  * @part_name: Named partition to lookup
  * @dev_desc: Pointer to returned blk_desc pointer
- * @part_info: Pointer to returned disk_partition_t
+ * @part_info: Pointer to returned struct disk_partition
  * @response: Pointer to fastboot response buffer
  */
 int fastboot_mmc_get_part_info(const char *part_name,
 			       struct blk_desc **dev_desc,
-			       disk_partition_t *part_info, char *response)
+			       struct disk_partition *part_info, char *response)
 {
 	int r;
 
@@ -406,7 +409,7 @@ void fastboot_mmc_flash_write(const char *cmd, void *download_buffer,
 			      u32 download_bytes, char *response)
 {
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 
 	dev_desc = blk_get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV);
 	if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) {
@@ -523,7 +526,7 @@ void fastboot_mmc_erase(const char *cmd, char *response)
 {
 	int ret;
 	struct blk_desc *dev_desc;
-	disk_partition_t info;
+	struct disk_partition info;
 	lbaint_t blks, blks_start, blks_size, grp_size;
 	struct mmc *mmc = find_mmc_device(CONFIG_FASTBOOT_FLASH_MMC_DEV);
 
diff --git a/drivers/fastboot/fb_nand.c b/drivers/fastboot/fb_nand.c
index 6756ea769f..eb8a36f292 100644
--- a/drivers/fastboot/fb_nand.c
+++ b/drivers/fastboot/fb_nand.c
@@ -6,6 +6,8 @@
 
 #include <config.h>
 #include <common.h>
+#include <blk.h>
+#include <flash.h>
 
 #include <fastboot.h>
 #include <image-sparse.h>
diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c
index c37642569d..2bdf7771f6 100644
--- a/drivers/firmware/firmware-zynqmp.c
+++ b/drivers/firmware/firmware-zynqmp.c
@@ -7,7 +7,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <zynqmp_firmware.h>
+#include <asm/cache.h>
+#include <asm/ptrace.h>
 
 #if defined(CONFIG_ZYNQMP_IPI)
 #include <mailbox.h>
diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c
index 394f30fa88..e0d66d74f5 100644
--- a/drivers/firmware/psci.c
+++ b/drivers/firmware/psci.c
@@ -7,10 +7,13 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
 #include <irq_func.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <efi_loader.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <linux/arm-smccc.h>
 #include <linux/errno.h>
@@ -131,7 +134,7 @@ void reset_misc(void)
 #endif /* CONFIG_PSCI_RESET */
 
 #ifdef CONFIG_CMD_POWEROFF
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	do_psci_probe();
 
diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c
index c3f95b252f..15f5b0b14c 100644
--- a/drivers/firmware/ti_sci.c
+++ b/drivers/firmware/ti_sci.c
@@ -10,11 +10,13 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <mailbox.h>
 #include <malloc.h>
 #include <dm/device.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/soc/ti/k3-sec-proxy.h>
diff --git a/drivers/firmware/ti_sci.h b/drivers/firmware/ti_sci.h
index 24b4d1c794..327bb820f3 100644
--- a/drivers/firmware/ti_sci.h
+++ b/drivers/firmware/ti_sci.h
@@ -15,6 +15,7 @@
 #define __TI_SCI_H
 
 /* Generic Messages */
+#include <linux/bitops.h>
 #define TI_SCI_MSG_ENABLE_WDT		0x0000
 #define TI_SCI_MSG_WAKE_RESET		0x0001
 #define TI_SCI_MSG_VERSION		0x0002
diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c
index 5afd42a97b..aca8049c56 100644
--- a/drivers/fpga/ACEX1K.c
+++ b/drivers/fpga/ACEX1K.c
@@ -10,6 +10,7 @@
 #include <common.h>		/* core U-Boot definitions */
 #include <console.h>
 #include <ACEX1K.h>		/* ACEX device family */
+#include <linux/delay.h>
 
 /* Define FPGA_DEBUG to get debug printf's */
 #ifdef	FPGA_DEBUG
diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c
index 7c8f518509..bb27b3778f 100644
--- a/drivers/fpga/altera.c
+++ b/drivers/fpga/altera.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <errno.h>
 #include <ACEX1K.h>
+#include <log.h>
 #include <stratixII.h>
 
 /* Define FPGA_DEBUG to 1 to get debug printf's */
diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c
index c929cd2cc5..3b008facb8 100644
--- a/drivers/fpga/cyclon2.c
+++ b/drivers/fpga/cyclon2.c
@@ -8,6 +8,7 @@
 #include <common.h>		/* core U-Boot definitions */
 #include <altera.h>
 #include <ACEX1K.h>		/* ACEX device family */
+#include <linux/delay.h>
 
 /* Define FPGA_DEBUG to get debug printf's */
 #ifdef	FPGA_DEBUG
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index 0917871d49..fe3dfa1233 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -6,6 +6,8 @@
 
 /* Generic FPGA support */
 #include <common.h>             /* core U-Boot definitions */
+#include <init.h>
+#include <log.h>
 #include <xilinx.h>             /* xilinx specific definitions */
 #include <altera.h>             /* altera specific definitions */
 #include <lattice.h>
diff --git a/drivers/fpga/ivm_core.c b/drivers/fpga/ivm_core.c
index 6c6e5c385a..adc60919f3 100644
--- a/drivers/fpga/ivm_core.c
+++ b/drivers/fpga/ivm_core.c
@@ -30,6 +30,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/string.h>
 #include <malloc.h>
 #include <lattice.h>
diff --git a/drivers/fpga/lattice.c b/drivers/fpga/lattice.c
index 30bec7feef..e292d991cd 100644
--- a/drivers/fpga/lattice.c
+++ b/drivers/fpga/lattice.c
@@ -11,9 +11,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <fpga.h>
 #include <lattice.h>
+#include <linux/delay.h>
 
 static lattice_board_specific_func *pfns;
 static const char *fpga_image;
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index 2853581b97..dfd3cbb461 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -2,6 +2,8 @@
 /*
  * Copyright (C) 2017-2019 Intel Corporation <www.intel.com>
  */
+#include <image.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/fpga_manager.h>
 #include <asm/arch/reset_manager.h>
@@ -16,6 +18,8 @@
 #include <fs_loader.h>
 #include <wait_bit.h>
 #include <watchdog.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define CFGWDTH_32	1
 #define MIN_BITSTREAM_SIZECHECK	230
diff --git a/drivers/fpga/stratix10.c b/drivers/fpga/stratix10.c
index d8e32508d4..da8fa315e3 100644
--- a/drivers/fpga/stratix10.c
+++ b/drivers/fpga/stratix10.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <altera.h>
+#include <log.h>
 #include <asm/arch/mailbox_s10.h>
+#include <linux/delay.h>
 
 #define RECONFIG_STATUS_POLL_RESP_TIMEOUT_MS		60000
 #define RECONFIG_STATUS_INTERVAL_DELAY_US		1000000
diff --git a/drivers/fpga/stratixII.c b/drivers/fpga/stratixII.c
index 12d8dd19bf..b450a81072 100644
--- a/drivers/fpga/stratixII.c
+++ b/drivers/fpga/stratixII.c
@@ -6,6 +6,7 @@
 
 #include <common.h>		/* core U-Boot definitions */
 #include <altera.h>
+#include <linux/delay.h>
 
 int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
 			   int isSerial, int isSecure);
@@ -116,9 +117,9 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
 
 	/* 2. Strat burn cycle by deasserting config for t_CFG and waiting t_CF2CK after reaserted */
 	fns->config (0, 1, cookie);
-	udelay (5);		/* nCONFIG low pulse width 2usec */
+	udelay(5);		/* nCONFIG low pulse width 2usec */
 	fns->config (1, 1, cookie);
-	udelay (100);		/* nCONFIG high to first rising edge on DCLK */
+	udelay(100);		/* nCONFIG high to first rising edge on DCLK */
 
 	/* 3. Start the Data cycle with clk deasserted */
 	bytecount = 0;
@@ -168,7 +169,7 @@ int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
 
 	/* 4. Set one last clock and check conf done signal */
 	fns->clk (1, 1, cookie);
-	udelay (100);
+	udelay(100);
 	if (!fns->done (cookie)) {
 		printf (" error!.\n");
 		fns->abort (cookie);
diff --git a/drivers/fpga/stratixv.c b/drivers/fpga/stratixv.c
index 236a730804..abae3b5b75 100644
--- a/drivers/fpga/stratixv.c
+++ b/drivers/fpga/stratixv.c
@@ -5,8 +5,10 @@
 
 #include <common.h>
 #include <altera.h>
+#include <log.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 
 /* Write the RBF data to FPGA via SPI */
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index 6c69ab7802..b96519e1a4 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -6,10 +6,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/arch/sys_proto.h>
 #include <memalign.h>
 #include <versalpl.h>
 #include <zynqmp_firmware.h>
+#include <asm/cache.h>
 
 static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 {
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index 395736875f..b3e0537bab 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -15,6 +15,7 @@
 #include <common.h>
 #include <console.h>
 #include <virtex2.h>
+#include <linux/delay.h>
 
 #if 0
 #define FPGA_DEBUG
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index 4b0334b6be..cbebefb55f 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <fpga.h>
+#include <log.h>
 #include <virtex2.h>
 #include <spartan2.h>
 #include <spartan3.h>
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 4a826e4a71..2ac4e38952 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -8,8 +8,11 @@
 #include <console.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <zynqmppl.h>
 #include <zynqmp_firmware.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 #include <asm/arch/sys_proto.h>
 #include <memalign.h>
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 21624f715b..dcfe513eeb 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -9,9 +9,12 @@
 #include <common.h>
 #include <console.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <fs.h>
 #include <zynqpl.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2081520f42..d87f6cc105 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -318,7 +318,7 @@ config PIC32_GPIO
 
 config STM32_GPIO
 	bool "ST STM32 GPIO driver"
-	depends on DM_GPIO && (STM32 || ARCH_STM32MP)
+	depends on DM_GPIO && (ARCH_STM32 || ARCH_STM32MP)
 	default y
 	help
 	  Device model driver support for STM32 GPIO controller. It should be
diff --git a/drivers/gpio/adi_gpio2.c b/drivers/gpio/adi_gpio2.c
index 9d293b6994..d0849c85c3 100644
--- a/drivers/gpio/adi_gpio2.c
+++ b/drivers/gpio/adi_gpio2.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 
diff --git a/drivers/gpio/atmel_pio4.c b/drivers/gpio/atmel_pio4.c
index a3f5e7a2e0..455944d547 100644
--- a/drivers/gpio/atmel_pio4.c
+++ b/drivers/gpio/atmel_pio4.c
@@ -12,6 +12,7 @@
 #include <malloc.h>
 #include <asm/arch/hardware.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <mach/gpio.h>
 #include <mach/atmel_pio4.h>
 
diff --git a/drivers/gpio/bcm6345_gpio.c b/drivers/gpio/bcm6345_gpio.c
index 71a978cf40..5da11d988e 100644
--- a/drivers/gpio/bcm6345_gpio.c
+++ b/drivers/gpio/bcm6345_gpio.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 struct bcm6345_gpio_priv {
 	void __iomem *reg_dirout;
diff --git a/drivers/gpio/cortina_gpio.c b/drivers/gpio/cortina_gpio.c
index e2374ce1e7..055907c1a1 100644
--- a/drivers/gpio/cortina_gpio.c
+++ b/drivers/gpio/cortina_gpio.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/compiler.h>
 
diff --git a/drivers/gpio/dwapb_gpio.c b/drivers/gpio/dwapb_gpio.c
index e3439eebb5..e5e3518194 100644
--- a/drivers/gpio/dwapb_gpio.c
+++ b/drivers/gpio/dwapb_gpio.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/gpio.h>
 #include <asm/gpio.h>
@@ -18,6 +19,7 @@
 #include <dm/root.h>
 #include <errno.h>
 #include <reset.h>
+#include <linux/bitops.h>
 
 #define GPIO_SWPORT_DR(p)	(0x00 + (p) * 0xc)
 #define GPIO_SWPORT_DDR(p)	(0x04 + (p) * 0xc)
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c
index 9dc4cd6042..c49a041059 100644
--- a/drivers/gpio/gpio-rcar.c
+++ b/drivers/gpio/gpio-rcar.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include "../pinctrl/renesas/sh_pfc.h"
 
 #define GPIO_IOINTSEL	0x00	/* General IO/Interrupt Switching Register */
diff --git a/drivers/gpio/gpio-rza1.c b/drivers/gpio/gpio-rza1.c
index ce2453e2ba..21a87d645c 100644
--- a/drivers/gpio/gpio-rza1.c
+++ b/drivers/gpio/gpio-rza1.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define P(bank)			(0x0000 + (bank) * 4)
 #define PSR(bank)		(0x0100 + (bank) * 4)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
index 757ab7106e..9eeab22eef 100644
--- a/drivers/gpio/gpio-uclass.c
+++ b/drivers/gpio/gpio-uclass.c
@@ -5,7 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
-#include <dm/device_compat.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/uclass-internal.h>
@@ -14,6 +14,7 @@
 #include <fdtdec.h>
 #include <malloc.h>
 #include <asm/gpio.h>
+#include <dm/device_compat.h>
 #include <linux/bug.h>
 #include <linux/ctype.h>
 
@@ -526,6 +527,21 @@ int dm_gpio_set_value(const struct gpio_desc *desc, int value)
 
 	if (desc->flags & GPIOD_ACTIVE_LOW)
 		value = !value;
+
+	/*
+	 * Emulate open drain by not actively driving the line high or
+	 * Emulate open source by not actively driving the line low
+	 */
+	if ((desc->flags & GPIOD_OPEN_DRAIN && value) ||
+	    (desc->flags & GPIOD_OPEN_SOURCE && !value))
+		return gpio_get_ops(desc->dev)->direction_input(desc->dev,
+								desc->offset);
+	else if (desc->flags & GPIOD_OPEN_DRAIN ||
+		 desc->flags & GPIOD_OPEN_SOURCE)
+		return gpio_get_ops(desc->dev)->direction_output(desc->dev,
+								desc->offset,
+								value);
+
 	gpio_get_ops(desc->dev)->set_value(desc->dev, desc->offset, value);
 	return 0;
 }
diff --git a/drivers/gpio/hi6220_gpio.c b/drivers/gpio/hi6220_gpio.c
index 97a0417891..95de2ae366 100644
--- a/drivers/gpio/hi6220_gpio.c
+++ b/drivers/gpio/hi6220_gpio.c
@@ -9,6 +9,7 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <errno.h>
+#include <linux/bitops.h>
 
 static int hi6220_gpio_direction_input(struct udevice *dev, unsigned int gpio)
 {
diff --git a/drivers/gpio/hsdk-creg-gpio.c b/drivers/gpio/hsdk-creg-gpio.c
index 800027f18e..d9df804f63 100644
--- a/drivers/gpio/hsdk-creg-gpio.c
+++ b/drivers/gpio/hsdk-creg-gpio.c
@@ -9,11 +9,13 @@
  * warranty of any kind, whether express or implied.
  */
 
+#include <log.h>
 #include <asm-generic/gpio.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <linux/bitops.h>
 #include <linux/printk.h>
 
 #define DRV_NAME	"gpio_creg"
diff --git a/drivers/gpio/intel_broadwell_gpio.c b/drivers/gpio/intel_broadwell_gpio.c
index 37299ecd0d..95f8b2ba6c 100644
--- a/drivers/gpio/intel_broadwell_gpio.c
+++ b/drivers/gpio/intel_broadwell_gpio.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pch.h>
 #include <pci.h>
 #include <syscon.h>
diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c
index 67b8b80b9d..711fea1b58 100644
--- a/drivers/gpio/intel_gpio.c
+++ b/drivers/gpio/intel_gpio.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <p2sb.h>
 #include <pch.h>
 #include <pci.h>
diff --git a/drivers/gpio/intel_ich6_gpio.c b/drivers/gpio/intel_ich6_gpio.c
index ad08b3aa79..73d98fde55 100644
--- a/drivers/gpio/intel_ich6_gpio.c
+++ b/drivers/gpio/intel_ich6_gpio.c
@@ -30,6 +30,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pch.h>
 #include <pci.h>
 #include <asm/cpu.h>
diff --git a/drivers/gpio/mscc_sgpio.c b/drivers/gpio/mscc_sgpio.c
index c65ca81728..780d77b2f8 100644
--- a/drivers/gpio/mscc_sgpio.c
+++ b/drivers/gpio/mscc_sgpio.c
@@ -9,11 +9,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <errno.h>
 #include <clk.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define MSCC_SGPIOS_PER_BANK	32
diff --git a/drivers/gpio/mt7621_gpio.c b/drivers/gpio/mt7621_gpio.c
index 54d313d6f1..612413e17b 100644
--- a/drivers/gpio/mt7621_gpio.c
+++ b/drivers/gpio/mt7621_gpio.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/drivers/gpio/mvebu_gpio.c b/drivers/gpio/mvebu_gpio.c
index e8b1c5965c..770cbf6b60 100644
--- a/drivers/gpio/mvebu_gpio.c
+++ b/drivers/gpio/mvebu_gpio.c
@@ -8,6 +8,7 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <errno.h>
+#include <linux/bitops.h>
 
 #define MVEBU_GPIOS_PER_BANK	32
 
diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c
index 405e9ac135..815339a156 100644
--- a/drivers/gpio/mxs_gpio.c
+++ b/drivers/gpio/mxs_gpio.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/iomux.h>
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index fda8054d53..4ab8cee2d1 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <i2c.h>
 #include <pca953x.h>
 
@@ -192,7 +193,7 @@ static int pca953x_info(uint8_t chip)
 	return 0;
 }
 
-static cmd_tbl_t cmd_pca953x[] = {
+static struct cmd_tbl cmd_pca953x[] = {
 	U_BOOT_CMD_MKENT(device, 3, 0, (void *)PCA953X_CMD_DEVICE, "", ""),
 	U_BOOT_CMD_MKENT(output, 4, 0, (void *)PCA953X_CMD_OUTPUT, "", ""),
 	U_BOOT_CMD_MKENT(input, 3, 0, (void *)PCA953X_CMD_INPUT, "", ""),
@@ -200,13 +201,14 @@ static cmd_tbl_t cmd_pca953x[] = {
 	U_BOOT_CMD_MKENT(info, 2, 0, (void *)PCA953X_CMD_INFO, "", ""),
 };
 
-static int do_pca953x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_pca953x(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	static uint8_t chip = CONFIG_SYS_I2C_PCA953X_ADDR;
 	int ret = CMD_RET_USAGE, val;
 	ulong ul_arg2 = 0;
 	ulong ul_arg3 = 0;
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	c = find_cmd_tbl(argv[1], cmd_pca953x, ARRAY_SIZE(cmd_pca953x));
 
diff --git a/drivers/gpio/pca953x_gpio.c b/drivers/gpio/pca953x_gpio.c
index d06b834a3b..fd17d1a591 100644
--- a/drivers/gpio/pca953x_gpio.c
+++ b/drivers/gpio/pca953x_gpio.c
@@ -28,6 +28,7 @@
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <linux/bitops.h>
 
 #define PCA953X_INPUT           0
 #define PCA953X_OUTPUT          1
diff --git a/drivers/gpio/pcf8575_gpio.c b/drivers/gpio/pcf8575_gpio.c
index e93f640488..1b9a18fe5d 100644
--- a/drivers/gpio/pcf8575_gpio.c
+++ b/drivers/gpio/pcf8575_gpio.c
@@ -26,7 +26,9 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm-generic/gpio.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/gpio/pic32_gpio.c b/drivers/gpio/pic32_gpio.c
index d8789e7607..bb1ad256fa 100644
--- a/drivers/gpio/pic32_gpio.c
+++ b/drivers/gpio/pic32_gpio.c
@@ -10,6 +10,7 @@
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <mach/pic32.h>
 
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
index 74a773c099..51df5367ea 100644
--- a/drivers/gpio/pm8916_gpio.c
+++ b/drivers/gpio/pm8916_gpio.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <spmi/spmi.h>
 #include <asm/io.h>
diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c
index e4b5383d0f..258f13395d 100644
--- a/drivers/gpio/s5p_gpio.c
+++ b/drivers/gpio/s5p_gpio.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c
index 9549c74c2b..98b7fa4bb3 100644
--- a/drivers/gpio/sandbox.c
+++ b/drivers/gpio/sandbox.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/gpio.h>
 #include <dm/device_compat.h>
diff --git a/drivers/gpio/sh_pfc.c b/drivers/gpio/sh_pfc.c
index 6320a6280d..0653171af4 100644
--- a/drivers/gpio/sh_pfc.c
+++ b/drivers/gpio/sh_pfc.c
@@ -10,10 +10,13 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/bitops.h>
 #include <asm/io.h>
 #include <sh_pfc.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 
 static struct pinmux_info *gpioc;
 
diff --git a/drivers/gpio/sifive-gpio.c b/drivers/gpio/sifive-gpio.c
index 76d5a1d34e..24da3b3c23 100644
--- a/drivers/gpio/sifive-gpio.c
+++ b/drivers/gpio/sifive-gpio.c
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <errno.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 
 static int sifive_gpio_probe(struct udevice *dev)
 {
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index f55f834e7d..4f710b6b6a 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -8,11 +8,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/stm32.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 
@@ -20,7 +22,6 @@
 #define MODE_BITS_MASK			3
 #define BSRR_BIT(gpio_pin, value)	BIT(gpio_pin + (value ? 0 : 16))
 
-#ifndef CONFIG_SPL_BUILD
 /*
  * convert gpio offset to gpio index taking into account gpio holes
  * into gpio bank
@@ -147,7 +148,6 @@ static const struct dm_gpio_ops gpio_stm32_ops = {
 	.set_value		= stm32_gpio_set_value,
 	.get_function		= stm32_gpio_get_function,
 };
-#endif
 
 static int gpio_stm32_probe(struct udevice *dev)
 {
@@ -162,7 +162,6 @@ static int gpio_stm32_probe(struct udevice *dev)
 
 	priv->regs = (struct stm32_gpio_regs *)addr;
 
-#ifndef CONFIG_SPL_BUILD
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
 	struct ofnode_phandle_args args;
 	const char *name;
@@ -195,7 +194,7 @@ static int gpio_stm32_probe(struct udevice *dev)
 	dev_dbg(dev, "addr = 0x%p bank_name = %s gpio_count = %d gpio_range = 0x%x\n",
 		(u32 *)priv->regs, uc_priv->bank_name, uc_priv->gpio_count,
 		priv->gpio_range);
-#endif
+
 	ret = clk_get_by_index(dev, 0, &clk);
 	if (ret < 0)
 		return ret;
@@ -215,9 +214,7 @@ U_BOOT_DRIVER(gpio_stm32) = {
 	.name	= "gpio_stm32",
 	.id	= UCLASS_GPIO,
 	.probe	= gpio_stm32_probe,
-#ifndef CONFIG_SPL_BUILD
 	.ops	= &gpio_stm32_ops,
-#endif
 	.flags	= DM_UC_FLAG_SEQ_ALIAS,
 	.priv_auto_alloc_size	= sizeof(struct stm32_gpio_priv),
 };
diff --git a/drivers/gpio/tca642x.c b/drivers/gpio/tca642x.c
index 730460a999..463cfe879a 100644
--- a/drivers/gpio/tca642x.c
+++ b/drivers/gpio/tca642x.c
@@ -21,6 +21,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <i2c.h>
 #include <tca642x.h>
 
@@ -212,7 +213,7 @@ static int tca642x_info(uchar chip)
 	return 0;
 }
 
-static cmd_tbl_t cmd_tca642x[] = {
+static struct cmd_tbl cmd_tca642x[] = {
 	U_BOOT_CMD_MKENT(device, 3, 0, (void *)TCA642X_CMD_DEVICE, "", ""),
 	U_BOOT_CMD_MKENT(output, 4, 0, (void *)TCA642X_CMD_OUTPUT, "", ""),
 	U_BOOT_CMD_MKENT(input, 3, 0, (void *)TCA642X_CMD_INPUT, "", ""),
@@ -220,7 +221,8 @@ static cmd_tbl_t cmd_tca642x[] = {
 	U_BOOT_CMD_MKENT(info, 2, 0, (void *)TCA642X_CMD_INFO, "", ""),
 };
 
-static int do_tca642x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_tca642x(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	static uchar chip = CONFIG_SYS_I2C_TCA642X_ADDR;
 	int ret = CMD_RET_USAGE, val;
@@ -228,7 +230,7 @@ static int do_tca642x(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	uint8_t bank_shift;
 	ulong ul_arg2 = 0;
 	ulong ul_arg3 = 0;
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 
 	c = find_cmd_tbl(argv[1], cmd_tca642x, ARRAY_SIZE(cmd_tca642x));
 
diff --git a/drivers/gpio/tegra186_gpio_priv.h b/drivers/gpio/tegra186_gpio_priv.h
index ac8df27c46..3e686beedc 100644
--- a/drivers/gpio/tegra186_gpio_priv.h
+++ b/drivers/gpio/tegra186_gpio_priv.h
@@ -10,6 +10,7 @@
  * For each GPIO, there are a set of registers than affect it, all packed
  * back-to-back.
  */
+#include <linux/bitops.h>
 #define TEGRA186_GPIO_ENABLE_CONFIG				0x00
 #define TEGRA186_GPIO_ENABLE_CONFIG_ENABLE			BIT(0)
 #define TEGRA186_GPIO_ENABLE_CONFIG_OUT				BIT(1)
diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c
index a730f5c4fe..912577a571 100644
--- a/drivers/gpio/tegra_gpio.c
+++ b/drivers/gpio/tegra_gpio.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <errno.h>
 #include <fdtdec.h>
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 2389abee37..014f120d60 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/list.h>
 #include <asm/io.h>
diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
index fe3b2c3b1a..d0e90b8d63 100644
--- a/drivers/gpio/zynq_gpio.c
+++ b/drivers/gpio/zynq_gpio.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <dm.h>
 #include <fdtdec.h>
diff --git a/drivers/hwspinlock/hwspinlock-uclass.c b/drivers/hwspinlock/hwspinlock-uclass.c
index 61d226bcbb..9da79455ed 100644
--- a/drivers/hwspinlock/hwspinlock-uclass.c
+++ b/drivers/hwspinlock/hwspinlock-uclass.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <hwspinlock.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <linux/compat.h>
diff --git a/drivers/hwspinlock/stm32_hwspinlock.c b/drivers/hwspinlock/stm32_hwspinlock.c
index 74afb4aec2..8be585a0c8 100644
--- a/drivers/hwspinlock/stm32_hwspinlock.c
+++ b/drivers/hwspinlock/stm32_hwspinlock.c
@@ -9,6 +9,7 @@
 #include <hwspinlock.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define STM32_MUTEX_COREID	BIT(8)
 #define STM32_MUTEX_LOCK_BIT	BIT(31)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index e42b6516bf..f8b18de8f3 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -402,7 +402,7 @@ config SYS_I2C_STM32F7
 
 config SYS_I2C_TEGRA
 	bool "NVIDIA Tegra internal I2C controller"
-	depends on TEGRA
+	depends on ARCH_TEGRA
 	help
 	  Support for NVIDIA I2C controller available in Tegra SoCs.
 
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index c84d75ac92..214362d04b 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -11,8 +11,10 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/scu_ast2500.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #include "ast_i2c.h"
diff --git a/drivers/i2c/at91_i2c.h b/drivers/i2c/at91_i2c.h
index 87f02bfaf3..3915af8372 100644
--- a/drivers/i2c/at91_i2c.h
+++ b/drivers/i2c/at91_i2c.h
@@ -1,6 +1,7 @@
 #ifndef _AT91_I2C_H
 #define _AT91_I2C_H
 
+#include <linux/bitops.h>
 #define	TWI_CR_START		BIT(0)	/* Send a Start Condition */
 #define	TWI_CR_MSEN		BIT(2)	/* Master Transfer Enable */
 #define	TWI_CR_STOP		BIT(1)	/* Send a Stop Condition */
diff --git a/drivers/i2c/cros_ec_ldo.c b/drivers/i2c/cros_ec_ldo.c
index 501e602b27..c593540ac1 100644
--- a/drivers/i2c/cros_ec_ldo.c
+++ b/drivers/i2c/cros_ec_ldo.c
@@ -9,6 +9,7 @@
 #include <cros_ec.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/tps65090.h>
 
 static int cros_ec_ldo_set_bus_speed(struct udevice *dev, unsigned int speed)
diff --git a/drivers/i2c/davinci_i2c.c b/drivers/i2c/davinci_i2c.c
index edc40f706c..f8e9d003e6 100644
--- a/drivers/i2c/davinci_i2c.c
+++ b/drivers/i2c/davinci_i2c.c
@@ -14,9 +14,11 @@
 #include <common.h>
 #include <i2c.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/i2c_defs.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "davinci_i2c.h"
 
 #ifdef CONFIG_DM_I2C
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c
index 088a6f3efb..3616e2105f 100644
--- a/drivers/i2c/designware_i2c.c
+++ b/drivers/i2c/designware_i2c.c
@@ -8,14 +8,22 @@
 #include <clk.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <reset.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "designware_i2c.h"
 #include <dm/device_compat.h>
 #include <linux/err.h>
 
+/*
+ * This assigned unique hex value is constant and is derived from the two ASCII
+ * letters 'DW' followed by a 16-bit unsigned number
+ */
+#define DW_I2C_COMP_TYPE	0x44570140
+
 #ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED
 static int  dw_i2c_enable(struct i2c_regs *i2c_base, bool enable)
 {
@@ -197,18 +205,24 @@ static int dw_i2c_calc_timing(struct dw_i2c *priv, enum i2c_speed_mode mode,
 	return 0;
 }
 
-static int calc_bus_speed(struct dw_i2c *priv, int speed, ulong bus_clk,
-			  struct dw_i2c_speed_config *config)
+/**
+ * calc_bus_speed() - Calculate the config to use for a particular i2c speed
+ *
+ * @priv: Private information for the driver (NULL if not using driver model)
+ * @i2c_base: Registers for the I2C controller
+ * @speed: Required i2c speed in Hz
+ * @bus_clk: Input clock to the I2C controller in Hz (e.g. IC_CLK)
+ * @config: Returns the config to use for this speed
+ * @return 0 if OK, -ve on error
+ */
+static int calc_bus_speed(struct dw_i2c *priv, struct i2c_regs *regs, int speed,
+			  ulong bus_clk, struct dw_i2c_speed_config *config)
 {
 	const struct dw_scl_sda_cfg *scl_sda_cfg = NULL;
-	struct i2c_regs *regs = priv->regs;
 	enum i2c_speed_mode i2c_spd;
-	u32 comp_param1;
 	int spk_cnt;
 	int ret;
 
-	comp_param1 = readl(&regs->comp_param1);
-
 	if (priv)
 		scl_sda_cfg = priv->scl_sda_cfg;
 	/* Allow high speed if there is no config, or the config allows it */
@@ -223,6 +237,9 @@ static int calc_bus_speed(struct dw_i2c *priv, int speed, ulong bus_clk,
 
 	/* Check is high speed possible and fall back to fast mode if not */
 	if (i2c_spd == IC_SPEED_MODE_HIGH) {
+		u32 comp_param1;
+
+		comp_param1 = readl(&regs->comp_param1);
 		if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
 				!= DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH)
 			i2c_spd = IC_SPEED_MODE_FAST;
@@ -258,11 +275,14 @@ static int calc_bus_speed(struct dw_i2c *priv, int speed, ulong bus_clk,
 	return 0;
 }
 
-/*
- * _dw_i2c_set_bus_speed - Set the i2c speed
- * @speed:	required i2c speed
+/**
+ * _dw_i2c_set_bus_speed() - Set the i2c speed
  *
- * Set the i2c speed.
+ * @priv: Private information for the driver (NULL if not using driver model)
+ * @i2c_base: Registers for the I2C controller
+ * @speed: Required i2c speed in Hz
+ * @bus_clk: Input clock to the I2C controller in Hz (e.g. IC_CLK)
+ * @return 0 if OK, -ve on error
  */
 static int _dw_i2c_set_bus_speed(struct dw_i2c *priv, struct i2c_regs *i2c_base,
 				 unsigned int speed, unsigned int bus_clk)
@@ -272,7 +292,7 @@ static int _dw_i2c_set_bus_speed(struct dw_i2c *priv, struct i2c_regs *i2c_base,
 	unsigned int ena;
 	int ret;
 
-	ret = calc_bus_speed(priv, speed, bus_clk, &config);
+	ret = calc_bus_speed(priv, i2c_base, speed, bus_clk, &config);
 	if (ret)
 		return ret;
 
@@ -752,6 +772,17 @@ int designware_i2c_ofdata_to_platdata(struct udevice *bus)
 int designware_i2c_probe(struct udevice *bus)
 {
 	struct dw_i2c *priv = dev_get_priv(bus);
+	uint comp_type;
+
+	comp_type = readl(&priv->regs->comp_type);
+	if (comp_type != DW_I2C_COMP_TYPE) {
+		log_err("I2C bus %s has unknown type %#x\n", bus->name,
+			comp_type);
+		return -ENXIO;
+	}
+
+	log_info("I2C bus %s version %#x\n", bus->name,
+		 readl(&priv->regs->comp_version));
 
 	return __dw_i2c_init(priv->regs, 0, 0);
 }
diff --git a/drivers/i2c/designware_i2c.h b/drivers/i2c/designware_i2c.h
index 7ee236193d..dc9a6ccb63 100644
--- a/drivers/i2c/designware_i2c.h
+++ b/drivers/i2c/designware_i2c.h
@@ -10,6 +10,7 @@
 #include <clk.h>
 #include <i2c.h>
 #include <reset.h>
+#include <linux/bitops.h>
 
 struct i2c_regs {
 	u32 ic_con;		/* 0x00 */
diff --git a/drivers/i2c/designware_i2c_pci.c b/drivers/i2c/designware_i2c_pci.c
index 50f03e3d90..bd34ec0b47 100644
--- a/drivers/i2c/designware_i2c_pci.c
+++ b/drivers/i2c/designware_i2c_pci.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <spl.h>
 #include <asm/lpss.h>
 #include "designware_i2c.h"
diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c
index 9f201c66d0..4fc9d90580 100644
--- a/drivers/i2c/exynos_hs_i2c.c
+++ b/drivers/i2c/exynos_hs_i2c.c
@@ -9,9 +9,11 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/pinmux.h>
+#include <linux/delay.h>
 #include "s3c24x0_i2c.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index 097c54388f..da933452f5 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -9,12 +9,14 @@
 #include <common.h>
 #include <command.h>
 #include <i2c.h>		/* Functional interface */
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/fsl_i2c.h>	/* HW definitions */
 #include <clk.h>
 #include <dm.h>
 #include <mapmem.h>
+#include <linux/delay.h>
 
 /* The maximum number of microseconds we will wait until another master has
  * released the bus.  If not defined in the board header file, then use a
diff --git a/drivers/i2c/i2c-cdns.c b/drivers/i2c/i2c-cdns.c
index ac15da2c67..024c63c4ea 100644
--- a/drivers/i2c/i2c-cdns.c
+++ b/drivers/i2c/i2c-cdns.c
@@ -9,6 +9,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/io.h>
 #include <linux/errno.h>
diff --git a/drivers/i2c/i2c-emul-uclass.c b/drivers/i2c/i2c-emul-uclass.c
index ae5aae03e7..1b70e14054 100644
--- a/drivers/i2c/i2c-emul-uclass.c
+++ b/drivers/i2c/i2c-emul-uclass.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index 07fdd343f2..cfdeadc752 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -9,7 +9,9 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 #define DEFAULT_UDELAY	5
 #define RETRIES		0
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index e9ec388576..8bc69e870f 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -14,6 +15,7 @@
 #if CONFIG_IS_ENABLED(DM_GPIO)
 #include <asm/gpio.h>
 #endif
+#include <linux/delay.h>
 
 #define I2C_MAX_OFFSET_LEN	4
 
@@ -514,7 +516,7 @@ int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
 	udelay(delay);
 
 	/*  Toggle SCL until slave release SDA */
-	while (scl_count-- >= 0) {
+	for (; scl_count; --scl_count) {
 		i2c_gpio_set_pin(scl_pin, 1);
 		udelay(delay);
 		i2c_gpio_set_pin(scl_pin, 0);
diff --git a/drivers/i2c/i2c-versatile.c b/drivers/i2c/i2c-versatile.c
index f523844204..62831522bd 100644
--- a/drivers/i2c/i2c-versatile.c
+++ b/drivers/i2c/i2c-versatile.c
@@ -11,6 +11,8 @@
 #include <i2c.h>
 #include <asm/io.h>
 #include <clk.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #define I2C_CONTROL_REG		0x00
diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c
index 234277a299..da50d86cc8 100644
--- a/drivers/i2c/i2c_core.c
+++ b/drivers/i2c/i2c_core.c
@@ -9,6 +9,7 @@
  */
 #include <common.h>
 #include <i2c.h>
+#include <linker_lists.h>
 
 struct i2c_adapter *i2c_get_adapter(int index)
 {
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index f7b59d36f9..cec38538da 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -12,7 +12,10 @@
 #else
 #include <gdsys_fpga.h>
 #endif
+#include <log.h>
 #include <asm/unaligned.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_DM_I2C
 struct ihs_i2c_priv {
diff --git a/drivers/i2c/imx_lpi2c.c b/drivers/i2c/imx_lpi2c.c
index 62e68046d6..c8e42e05f5 100644
--- a/drivers/i2c/imx_lpi2c.c
+++ b/drivers/i2c/imx_lpi2c.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
diff --git a/drivers/i2c/intel_i2c.c b/drivers/i2c/intel_i2c.c
index f5509fef16..3b79cb40cd 100644
--- a/drivers/i2c/intel_i2c.c
+++ b/drivers/i2c/intel_i2c.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/io.h>
 
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
index 8e31481c0f..4edcba2911 100644
--- a/drivers/i2c/kona_i2c.c
+++ b/drivers/i2c/kona_i2c.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/arch/sysmap.h>
 #include <asm/kona-common/clk.h>
diff --git a/drivers/i2c/lpc32xx_i2c.c b/drivers/i2c/lpc32xx_i2c.c
index a95b5cc902..6af2e975cf 100644
--- a/drivers/i2c/lpc32xx_i2c.c
+++ b/drivers/i2c/lpc32xx_i2c.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <i2c.h>
 #include <linux/errno.h>
diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index bcf45160d8..e070caf43f 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -3,10 +3,13 @@
  * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com>
  */
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <clk.h>
 #include <dm.h>
 #include <i2c.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #define I2C_TIMEOUT_MS		100
diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
index 5029c71adc..584d0a4fef 100644
--- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
+++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
@@ -8,8 +8,10 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/i2c/muxes/i2c-mux-gpio.c b/drivers/i2c/muxes/i2c-mux-gpio.c
index 0575bd8937..83dcb40213 100644
--- a/drivers/i2c/muxes/i2c-mux-gpio.c
+++ b/drivers/i2c/muxes/i2c-mux-gpio.c
@@ -17,6 +17,7 @@
 #include <fdtdec.h>
 #include <i2c.h>
 #include <linux/errno.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/i2c/muxes/i2c-mux-uclass.c b/drivers/i2c/muxes/i2c-mux-uclass.c
index 9a3dd7ec4a..26897554b0 100644
--- a/drivers/i2c/muxes/i2c-mux-uclass.c
+++ b/drivers/i2c/muxes/i2c-mux-uclass.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/lists.h>
 #include <dm/root.h>
diff --git a/drivers/i2c/muxes/pca954x.c b/drivers/i2c/muxes/pca954x.c
index cc8afc93b5..7360e162ee 100644
--- a/drivers/i2c/muxes/pca954x.c
+++ b/drivers/i2c/muxes/pca954x.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <asm-generic/gpio.h>
diff --git a/drivers/i2c/mv_i2c.c b/drivers/i2c/mv_i2c.c
index 63665f0952..59675d8d57 100644
--- a/drivers/i2c/mv_i2c.c
+++ b/drivers/i2c/mv_i2c.c
@@ -19,7 +19,9 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "mv_i2c.h"
 
 /* All transfers are described by this data structure */
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 382cf4b304..d3cc9b9d83 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -9,6 +9,8 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
@@ -25,9 +27,9 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 
 #ifndef CONFIG_DM_I2C
-#if defined(CONFIG_ORION5X)
+#if defined(CONFIG_ARCH_ORION5X)
 #include <asm/arch/orion5x.h>
-#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
+#elif (defined(CONFIG_ARCH_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
 #include <asm/arch/soc.h>
 #elif defined(CONFIG_ARCH_SUNXI)
 #include <asm/arch/i2c.h>
@@ -821,7 +823,7 @@ static int mvtwsi_i2c_bind(struct udevice *bus)
 	struct mvtwsi_registers *twsi = devfdt_get_addr_ptr(bus);
 
 	/* Disable the hidden slave in i2c0 of these platforms */
-	if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_KIRKWOOD))
+	if ((IS_ENABLED(CONFIG_ARMADA_38X) || IS_ENABLED(CONFIG_ARCH_KIRKWOOD))
 			&& bus->req_seq == 0)
 		twsi_disable_i2c_slave(twsi);
 
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index a03c465c8f..3b0d27e6cd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -14,11 +14,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/mach-imx/mxc_i2c.h>
+#include <asm/mach-imx/sys_proto.h>
 #include <asm/io.h>
 #include <i2c.h>
 #include <watchdog.h>
@@ -747,6 +750,14 @@ void bus_i2c_init(int index, int speed, int unused,
 		return;
 	}
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (i2c_fused((ulong)mxc_i2c_buses[index].base)) {
+			printf("SoC fuse indicates I2C@0x%lx is unavailable.\n",
+			       (ulong)mxc_i2c_buses[index].base);
+			return;
+		}
+	}
+
 	/*
 	 * Warning: Be careful to allow the assignment to a static
 	 * variable here. This function could be called while U-Boot is
@@ -892,6 +903,14 @@ static int mxc_i2c_probe(struct udevice *bus)
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (i2c_fused((ulong)addr)) {
+			printf("SoC fuse indicates I2C@0x%lx is unavailable.\n",
+			       (ulong)addr);
+			return -ENODEV;
+		}
+	}
+
 	i2c_bus->base = addr;
 	i2c_bus->index = bus->seq;
 	i2c_bus->bus = bus;
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c
index 6e7d24d727..8592a819c4 100644
--- a/drivers/i2c/omap24xx_i2c.c
+++ b/drivers/i2c/omap24xx_i2c.c
@@ -41,6 +41,8 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/omap_i2c.h>
diff --git a/drivers/i2c/rcar_i2c.c b/drivers/i2c/rcar_i2c.c
index b877602aab..4267bbfa5a 100644
--- a/drivers/i2c/rcar_i2c.c
+++ b/drivers/i2c/rcar_i2c.c
@@ -18,6 +18,8 @@
 #include <asm/io.h>
 #include <wait_bit.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define RCAR_I2C_ICSCR			0x00 /* slave ctrl */
 #define RCAR_I2C_ICMCR			0x04 /* master ctrl */
diff --git a/drivers/i2c/rcar_iic.c b/drivers/i2c/rcar_iic.c
index 2a82eb0b76..cad0a623d3 100644
--- a/drivers/i2c/rcar_iic.c
+++ b/drivers/i2c/rcar_iic.c
@@ -14,6 +14,8 @@
 #include <dm.h>
 #include <i2c.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 struct rcar_iic_priv {
 	void __iomem		*base;
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 32b2ee8578..fa6f69f400 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -11,11 +11,13 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/i2c.h>
 #include <asm/arch-rockchip/periph.h>
 #include <dm/pinctrl.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 
 /* i2c timerout */
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 68bf93b324..5907217981 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
+#include <log.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/pinmux.h>
diff --git a/drivers/i2c/sandbox_i2c.c b/drivers/i2c/sandbox_i2c.c
index 1a4521d5b8..f4ae2397a0 100644
--- a/drivers/i2c/sandbox_i2c.c
+++ b/drivers/i2c/sandbox_i2c.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/test.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 834f1f2179..f857307e6a 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -9,7 +9,9 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index 9ad1c281ff..1031066b8c 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -25,6 +25,7 @@
 #endif
 #endif
 #include <i2c.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_SOFT_I2C_GPIO_SCL)
 # include <asm/gpio.h>
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index fc5c1221e1..ada8f4095e 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -7,7 +7,10 @@
 #include <clk.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <reset.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <dm/device.h>
 #include <linux/err.h>
diff --git a/drivers/i2c/tegra186_bpmp_i2c.c b/drivers/i2c/tegra186_bpmp_i2c.c
index 793f3f59b5..37204718ca 100644
--- a/drivers/i2c/tegra186_bpmp_i2c.c
+++ b/drivers/i2c/tegra186_bpmp_i2c.c
@@ -6,8 +6,10 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <misc.h>
 #include <asm/arch-tegra/bpmp_abi.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c
index 66a0148254..65b3734348 100644
--- a/drivers/i2c/tegra_i2c.c
+++ b/drivers/i2c/tegra_i2c.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/io.h>
 #include <clk.h>
 #include <reset.h>
@@ -18,6 +19,7 @@
 #endif
 #include <asm/arch/gpio.h>
 #include <asm/arch-tegra/tegra_i2c.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 enum i2c_type {
diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index a3bdd9fa34..a17e55e997 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -21,7 +21,7 @@ config DM_KEYBOARD
 	  input and update LEDs if the keyboard has them.
 
 config SPL_DM_KEYBOARD
-	bool "Enable driver model keyboard support"
+	bool "Enable driver model keyboard support for SPL"
 	depends on SPL_DM
 	help
 	  This adds a uclass for keyboards and implements keyboard support
@@ -30,7 +30,7 @@ config SPL_DM_KEYBOARD
 	  input and update LEDs if the keyboard has them.
 
 config TPL_DM_KEYBOARD
-	bool "Enable driver model keyboard support"
+	bool "Enable driver model keyboard support for TPL"
 	depends on TPL_DM
 	help
 	  This adds a uclass for keyboards and implements keyboard support
diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c
index 8c1a25c73f..6f12ec8b0a 100644
--- a/drivers/input/cros_ec_keyb.c
+++ b/drivers/input/cros_ec_keyb.c
@@ -12,6 +12,7 @@
 #include <input.h>
 #include <keyboard.h>
 #include <key_matrix.h>
+#include <log.h>
 #include <stdio_dev.h>
 
 enum {
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
index 98015899f2..7beaccca2c 100644
--- a/drivers/input/i8042.c
+++ b/drivers/input/i8042.c
@@ -13,7 +13,9 @@
 #include <i8042.h>
 #include <input.h>
 #include <keyboard.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/input/input.c b/drivers/input/input.c
index 6ab378b979..da264f4166 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <env.h>
 #include <errno.h>
+#include <log.h>
 #include <stdio_dev.h>
 #include <input.h>
 #ifdef CONFIG_DM_KEYBOARD
diff --git a/drivers/input/key_matrix.c b/drivers/input/key_matrix.c
index 8951e128ec..4631728b8b 100644
--- a/drivers/input/key_matrix.c
+++ b/drivers/input/key_matrix.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <key_matrix.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/input.h>
 
diff --git a/drivers/input/keyboard-uclass.c b/drivers/input/keyboard-uclass.c
index db1a515036..f19934e6bb 100644
--- a/drivers/input/keyboard-uclass.c
+++ b/drivers/input/keyboard-uclass.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <keyboard.h>
+#include <log.h>
 
 static int keyboard_start(struct stdio_dev *sdev)
 {
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c
index 70429b94a4..3409bb61d5 100644
--- a/drivers/input/tegra-kbc.c
+++ b/drivers/input/tegra-kbc.c
@@ -10,12 +10,14 @@
 #include <input.h>
 #include <keyboard.h>
 #include <key_matrix.h>
+#include <log.h>
 #include <stdio_dev.h>
 #include <tegra-kbc.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/funcmux.h>
 #include <asm/arch-tegra/timer.h>
+#include <linux/delay.h>
 #include <linux/input.h>
 
 enum {
diff --git a/drivers/led/led_bcm6328.c b/drivers/led/led_bcm6328.c
index 7be4badbac..52946835de 100644
--- a/drivers/led/led_bcm6328.c
+++ b/drivers/led/led_bcm6328.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <led.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/lists.h>
 
diff --git a/drivers/led/led_bcm6358.c b/drivers/led/led_bcm6358.c
index 01b86b756e..307d418a17 100644
--- a/drivers/led/led_bcm6358.c
+++ b/drivers/led/led_bcm6358.c
@@ -7,8 +7,10 @@
 #include <dm.h>
 #include <errno.h>
 #include <led.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/lists.h>
+#include <linux/delay.h>
 
 #define LEDS_MAX		32
 #define LEDS_WAIT		100
diff --git a/drivers/led/led_bcm6858.c b/drivers/led/led_bcm6858.c
index 27a76fcaf0..b415d8b2b4 100644
--- a/drivers/led/led_bcm6858.c
+++ b/drivers/led/led_bcm6858.c
@@ -11,8 +11,10 @@
 #include <dm.h>
 #include <errno.h>
 #include <led.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/lists.h>
+#include <linux/bitops.h>
 
 #define LEDS_MAX		32
 #define LEDS_WAIT		100
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index af6b8245c9..ef9b61ee62 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <led.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/gpio.h>
 #include <dm/lists.h>
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 85c2a829ae..dd4b0ac0c3 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -19,7 +19,7 @@ config SANDBOX_MBOX
 
 config TEGRA_HSP
 	bool "Enable Tegra HSP controller support"
-	depends on DM_MAILBOX && TEGRA
+	depends on DM_MAILBOX && ARCH_TEGRA
 	help
 	  This enables support for the NVIDIA Tegra HSP Hw module, which
 	  implements doorbells, mailboxes, semaphores, and shared interrupts.
diff --git a/drivers/mailbox/k3-sec-proxy.c b/drivers/mailbox/k3-sec-proxy.c
index a560209f03..3f9afaed32 100644
--- a/drivers/mailbox/k3-sec-proxy.c
+++ b/drivers/mailbox/k3-sec-proxy.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
diff --git a/drivers/mailbox/mailbox-uclass.c b/drivers/mailbox/mailbox-uclass.c
index 291f5c218e..c972d84608 100644
--- a/drivers/mailbox/mailbox-uclass.c
+++ b/drivers/mailbox/mailbox-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mailbox.h>
 #include <mailbox-uclass.h>
 #include <malloc.h>
diff --git a/drivers/mailbox/sandbox-mbox.c b/drivers/mailbox/sandbox-mbox.c
index 25e23eb05b..19704dd5da 100644
--- a/drivers/mailbox/sandbox-mbox.c
+++ b/drivers/mailbox/sandbox-mbox.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mailbox-uclass.h>
 #include <malloc.h>
 #include <asm/io.h>
diff --git a/drivers/mailbox/stm32-ipcc.c b/drivers/mailbox/stm32-ipcc.c
index 13e642ab70..b8bf356b4a 100644
--- a/drivers/mailbox/stm32-ipcc.c
+++ b/drivers/mailbox/stm32-ipcc.c
@@ -6,10 +6,12 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <mailbox-uclass.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 /*
  * IPCC has one set of registers per CPU
diff --git a/drivers/mailbox/tegra-hsp.c b/drivers/mailbox/tegra-hsp.c
index 60f6a38321..f82e6d3d16 100644
--- a/drivers/mailbox/tegra-hsp.c
+++ b/drivers/mailbox/tegra-hsp.c
@@ -4,11 +4,13 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <mailbox-uclass.h>
 #include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <linux/bitops.h>
 
 #define TEGRA_HSP_INT_DIMENSIONING		0x380
 #define TEGRA_HSP_INT_DIMENSIONING_NSI_SHIFT	16
diff --git a/drivers/mailbox/zynqmp-ipi.c b/drivers/mailbox/zynqmp-ipi.c
index 17b46545f5..f206a27a79 100644
--- a/drivers/mailbox/zynqmp-ipi.c
+++ b/drivers/mailbox/zynqmp-ipi.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <mailbox-uclass.h>
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 766402745d..81ed9eb209 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -310,7 +310,7 @@ config STM32MP_FUSE
 
 config STM32_RCC
 	bool "Enable RCC driver for the STM32 SoC's family"
-	depends on (STM32 || ARCH_STM32MP) && MISC
+	depends on (ARCH_STM32 || ARCH_STM32MP) && MISC
 	help
 	  Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
 	  block) is responsible of the management of the clock and reset
diff --git a/drivers/misc/altera_sysid.c b/drivers/misc/altera_sysid.c
index eff33f7343..387c70b070 100644
--- a/drivers/misc/altera_sysid.c
+++ b/drivers/misc/altera_sysid.c
@@ -44,7 +44,7 @@ void display_sysid(void)
 	printf("SYSID: %08x, %s", sysid[0], asc);
 }
 
-int do_sysid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_sysid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	display_sysid();
 	return 0;
diff --git a/drivers/misc/atsha204a-i2c.c b/drivers/misc/atsha204a-i2c.c
index 116c0661e7..422ea6f3e5 100644
--- a/drivers/misc/atsha204a-i2c.c
+++ b/drivers/misc/atsha204a-i2c.c
@@ -15,6 +15,8 @@
 #include <i2c.h>
 #include <errno.h>
 #include <atsha204a-i2c.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 
 #define ATSHA204A_TWLO			60
diff --git a/drivers/misc/cros_ec.c b/drivers/misc/cros_ec.c
index fa9984f6bd..a5534b1667 100644
--- a/drivers/misc/cros_ec.c
+++ b/drivers/misc/cros_ec.c
@@ -18,11 +18,14 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <flash.h>
 #include <i2c.h>
 #include <cros_ec.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
index cdd55f5aa8..c00f5f764a 100644
--- a/drivers/misc/cros_ec_i2c.c
+++ b/drivers/misc/cros_ec_i2c.c
@@ -16,6 +16,7 @@
 #include <dm.h>
 #include <i2c.h>
 #include <cros_ec.h>
+#include <log.h>
 
 #ifdef DEBUG_TRACE
 #define debug_trace(fmt, b...)	debug(fmt, #b)
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
index 71d03bfba2..4ad6c8ca66 100644
--- a/drivers/misc/cros_ec_lpc.c
+++ b/drivers/misc/cros_ec_lpc.c
@@ -16,6 +16,7 @@
 #include <dm.h>
 #include <command.h>
 #include <cros_ec.h>
+#include <log.h>
 #include <asm/io.h>
 
 #ifdef DEBUG_TRACE
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c
index 9dd6a18b2b..c9fa7abd71 100644
--- a/drivers/misc/cros_ec_sandbox.c
+++ b/drivers/misc/cros_ec_sandbox.c
@@ -11,6 +11,7 @@
 #include <ec_commands.h>
 #include <errno.h>
 #include <hash.h>
+#include <log.h>
 #include <os.h>
 #include <u-boot/sha256.h>
 #include <spi.h>
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
index be510704c4..153f971bde 100644
--- a/drivers/misc/cros_ec_spi.c
+++ b/drivers/misc/cros_ec_spi.c
@@ -16,6 +16,7 @@
 #include <cros_ec.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <spi.h>
 
 int cros_ec_spi_packet(struct udevice *udev, int out_bytes, int in_bytes)
diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c
index bf20a833ec..a2a5291565 100644
--- a/drivers/misc/ds4510.c
+++ b/drivers/misc/ds4510.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <i2c.h>
 #include <command.h>
+#include <linux/delay.h>
 #include "ds4510.h"
 
 enum {
@@ -233,7 +234,7 @@ static int ds4510_info(uint8_t chip)
 	return 0;
 }
 
-cmd_tbl_t cmd_ds4510[] = {
+struct cmd_tbl cmd_ds4510[] = {
 	U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
 	U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
 	U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
@@ -246,10 +247,10 @@ cmd_tbl_t cmd_ds4510[] = {
 	U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
 };
 
-int do_ds4510(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ds4510(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	static uint8_t chip = 0x51;
-	cmd_tbl_t *c;
+	struct cmd_tbl *c;
 	ulong ul_arg2 = 0;
 	ulong ul_arg3 = 0;
 	int tmp;
diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c
index 92c8d68f7c..a195dc5eb1 100644
--- a/drivers/misc/esm_pmic.c
+++ b/drivers/misc/esm_pmic.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <power/pmic.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #define INT_ESM_REG		0x6c
 #define INT_ESM_MASK		0x3f
diff --git a/drivers/misc/fs_loader.c b/drivers/misc/fs_loader.c
index 88e486e9d5..56406aa1dd 100644
--- a/drivers/misc/fs_loader.c
+++ b/drivers/misc/fs_loader.c
@@ -10,6 +10,7 @@
 #include <blk.h>
 #include <fs.h>
 #include <fs_loader.h>
+#include <log.h>
 #include <linux/string.h>
 #include <mapmem.h>
 #include <malloc.h>
diff --git a/drivers/misc/fsl_ifc.c b/drivers/misc/fsl_ifc.c
index 0dbf304487..8fdaacd5e0 100644
--- a/drivers/misc/fsl_ifc.c
+++ b/drivers/misc/fsl_ifc.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <fsl_ifc.h>
+#include <part.h>
 
 #ifdef CONFIG_TFABOOT
 struct ifc_regs ifc_cfg_default_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
diff --git a/drivers/misc/fsl_iim.c b/drivers/misc/fsl_iim.c
index f8075db8d5..85cc3c26b2 100644
--- a/drivers/misc/fsl_iim.c
+++ b/drivers/misc/fsl_iim.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <fuse.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/drivers/misc/fsl_portals.c b/drivers/misc/fsl_portals.c
index 45eed22f6e..632430e420 100644
--- a/drivers/misc/fsl_portals.c
+++ b/drivers/misc/fsl_portals.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <fdt_support.h>
 
diff --git a/drivers/misc/fsl_sec_mon.c b/drivers/misc/fsl_sec_mon.c
index e9f351dc3a..321bd27fd3 100644
--- a/drivers/misc/fsl_sec_mon.c
+++ b/drivers/misc/fsl_sec_mon.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <fsl_sec_mon.h>
+#include <linux/delay.h>
 
 static u32 get_sec_mon_state(void)
 {
diff --git a/drivers/misc/gdsys_ioep.c b/drivers/misc/gdsys_ioep.c
index 7f17095cc5..69e16a06a0 100644
--- a/drivers/misc/gdsys_ioep.c
+++ b/drivers/misc/gdsys_ioep.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <misc.h>
 #include <regmap.h>
 
diff --git a/drivers/misc/gdsys_ioep.h b/drivers/misc/gdsys_ioep.h
index 4d9524b6b6..f195388eda 100644
--- a/drivers/misc/gdsys_ioep.h
+++ b/drivers/misc/gdsys_ioep.h
@@ -15,6 +15,7 @@
  * @bc:                 Block counter (filled in by FPGA).
  * @packet_length:      Length of the packet's payload bytes.
  */
+#include <linux/bitops.h>
 struct io_generic_packet {
 	u16 target_address;
 	u16 source_address;
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
index 94a21e08af..b4c721c6fe 100644
--- a/drivers/misc/gdsys_soc.c
+++ b/drivers/misc/gdsys_soc.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/lists.h>
 
 #include "gdsys_soc.h"
diff --git a/drivers/misc/i2c_eeprom.c b/drivers/misc/i2c_eeprom.c
index ef5f103c98..45c34d388c 100644
--- a/drivers/misc/i2c_eeprom.c
+++ b/drivers/misc/i2c_eeprom.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <eeprom.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <dm.h>
@@ -17,6 +18,7 @@ struct i2c_eeprom_drv_data {
 	u32 pagesize; /* page size in bytes */
 	u32 addr_offset_mask; /* bits in addr used for offset overflow */
 	u32 offset_len; /* size in bytes of offset */
+	u32 start_offset; /* valid start offset inside memory, by default 0 */
 };
 
 int i2c_eeprom_read(struct udevice *dev, int offset, uint8_t *buf, int size)
@@ -147,7 +149,11 @@ static int i2c_eeprom_std_probe(struct udevice *dev)
 	i2c_set_chip_addr_offset_mask(dev, data->addr_offset_mask);
 
 	/* Verify that the chip is functional */
-	ret = i2c_eeprom_read(dev, 0, &test_byte, 1);
+	/*
+	 * Not all eeproms start from offset 0. Valid offset is available
+	 * in the platform data struct.
+	 */
+	ret = i2c_eeprom_read(dev, data->start_offset, &test_byte, 1);
 	if (ret)
 		return -ENODEV;
 
@@ -215,6 +221,7 @@ static const struct i2c_eeprom_drv_data atmel24mac402_data = {
 	.pagesize = 16,
 	.addr_offset_mask = 0,
 	.offset_len = 1,
+	.start_offset = 0x80,
 };
 
 static const struct i2c_eeprom_drv_data atmel24c32_data = {
diff --git a/drivers/misc/i2c_eeprom_emul.c b/drivers/misc/i2c_eeprom_emul.c
index 16758a0ef9..6be76ad02e 100644
--- a/drivers/misc/i2c_eeprom_emul.c
+++ b/drivers/misc/i2c_eeprom_emul.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/test.h>
 
diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c
index f9e4b27a27..00d34a3adc 100644
--- a/drivers/misc/ihs_fpga.c
+++ b/drivers/misc/ihs_fpga.c
@@ -11,8 +11,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <regmap.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include "ihs_fpga.h"
 
diff --git a/drivers/misc/imx8/fuse.c b/drivers/misc/imx8/fuse.c
index 1309215d4d..4d7f2f524d 100644
--- a/drivers/misc/imx8/fuse.c
+++ b/drivers/misc/imx8/fuse.c
@@ -15,8 +15,13 @@ DECLARE_GLOBAL_DATA_PTR;
 #define FSL_ECC_WORD_START_1	 0x10
 #define FSL_ECC_WORD_END_1	 0x10F
 
+#ifdef CONFIG_IMX8QM
+#define FSL_ECC_WORD_START_2	 0x1A0
+#define FSL_ECC_WORD_END_2	 0x1FF
+#elif defined(CONFIG_IMX8QXP)
 #define FSL_ECC_WORD_START_2	 0x220
 #define FSL_ECC_WORD_END_2	 0x31F
+#endif
 
 #define FSL_QXP_FUSE_GAP_START	 0x110
 #define FSL_QXP_FUSE_GAP_END	 0x21F
diff --git a/drivers/misc/imx8/scu.c b/drivers/misc/imx8/scu.c
index a7654a7817..ee635eb947 100644
--- a/drivers/misc/imx8/scu.c
+++ b/drivers/misc/imx8/scu.c
@@ -6,12 +6,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/root.h>
 #include <dm/device-internal.h>
 #include <asm/arch/sci/sci.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 #include <misc.h>
 
@@ -74,7 +76,7 @@ static int mu_hal_receivemsg(struct mu_type *base, u32 reg_index, u32 *msg)
 	assert(reg_index < MU_TR_COUNT);
 
 	/* Wait RX register to be full. */
-	ret = readl_poll_timeout(&base->sr, val, val & mask, 10000);
+	ret = readl_poll_timeout(&base->sr, val, val & mask, 1000000);
 	if (ret < 0) {
 		printf("%s timeout\n", __func__);
 		return -ETIMEDOUT;
diff --git a/drivers/misc/imx8/scu_api.c b/drivers/misc/imx8/scu_api.c
index 3ad21c1ea0..3e38edbf5d 100644
--- a/drivers/misc/imx8/scu_api.c
+++ b/drivers/misc/imx8/scu_api.c
@@ -174,6 +174,28 @@ sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt)
 	return !!result;
 }
 
+int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	int size = sizeof(struct sc_rpc_msg_s);
+	struct sc_rpc_msg_s msg;
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 2U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_PM);
+	RPC_FUNC(&msg) = (u8)(PM_FUNC_RESOURCE_RESET);
+
+	RPC_U16(&msg, 0U) = (u16)(resource);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s: resource:%d res:%d\n",
+		       __func__, resource, RPC_R8(&msg));
+
+	return ret;
+}
+
 /* PAD */
 int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val)
 {
@@ -200,6 +222,34 @@ int sc_pad_set(sc_ipc_t ipc, sc_pad_t pad, u32 val)
 	return ret;
 }
 
+int sc_pad_get(sc_ipc_t ipc, sc_pad_t pad, u32 *val)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	int size = sizeof(struct sc_rpc_msg_s);
+	struct sc_rpc_msg_s msg;
+	int ret;
+
+	if (!dev)
+		hang();
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 2U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_PAD);
+	RPC_FUNC(&msg) = (u8)(PAD_FUNC_GET);
+
+	RPC_U16(&msg, 0U) = (u16)(pad);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s: pad:%d: res:%d\n",
+		       __func__, pad, RPC_R8(&msg));
+
+	if (val)
+		*val = (u32)RPC_U32(&msg, 0U);
+
+	return ret;
+}
+
 /* MISC */
 int sc_misc_set_control(sc_ipc_t ipc, sc_rsrc_t resource,
 			sc_ctrl_t ctrl, u32 val)
@@ -948,3 +998,147 @@ int sc_seco_gen_key_blob(sc_ipc_t ipc, u32 id, sc_faddr_t load_addr,
 
 	return ret;
 }
+
+int sc_seco_get_mp_key(sc_ipc_t ipc, sc_faddr_t dst_addr,
+			u16 dst_size)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	struct sc_rpc_msg_s msg;
+	int size = sizeof(struct sc_rpc_msg_s);
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 4U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+	RPC_FUNC(&msg) = (u8)(SECO_FUNC_GET_MP_KEY);
+
+	RPC_U32(&msg, 0U) = (u32)(dst_addr >> 32ULL);
+	RPC_U32(&msg, 4U) = (u32)(dst_addr);
+	RPC_U16(&msg, 8U) = (u16)(dst_size);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s, dst_addr:0x%llx, res:%d\n",
+		       __func__, dst_addr, RPC_R8(&msg));
+
+	return ret;
+}
+
+int sc_seco_update_mpmr(sc_ipc_t ipc, sc_faddr_t addr, u8 size_m,
+			u8 lock)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	struct sc_rpc_msg_s msg;
+	int size = sizeof(struct sc_rpc_msg_s);
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 4U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+	RPC_FUNC(&msg) = (u8)(SECO_FUNC_UPDATE_MPMR);
+
+	RPC_U32(&msg, 0U) = (u32)(addr >> 32ULL);
+	RPC_U32(&msg, 4U) = (u32)(addr);
+	RPC_U8(&msg, 8U) = (u8)(size_m);
+	RPC_U8(&msg, 9U) = (u8)(lock);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s, addr:0x%llx, size_m:%x, lock:0x%x, res:%d\n",
+		       __func__, addr, size_m, lock, RPC_R8(&msg));
+	return ret;
+}
+
+int sc_seco_get_mp_sign(sc_ipc_t ipc, sc_faddr_t msg_addr,
+			u16 msg_size, sc_faddr_t dst_addr,
+			u16 dst_size)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	struct sc_rpc_msg_s msg;
+	int size = sizeof(struct sc_rpc_msg_s);
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 6U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+	RPC_FUNC(&msg) = (u8)(SECO_FUNC_GET_MP_SIGN);
+
+	RPC_U32(&msg, 0U) = (u32)(msg_addr >> 32ULL);
+	RPC_U32(&msg, 4U) = (u32)(msg_addr);
+	RPC_U32(&msg, 8U) = (u32)(dst_addr >> 32ULL);
+	RPC_U32(&msg, 12U) = (u32)(dst_addr);
+	RPC_U16(&msg, 16U) = (u16)(msg_size);
+	RPC_U16(&msg, 18U) = (u16)(dst_size);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s, msg_addr:0x%llx, msg_size:%x, dst_addr:0x%llx,"
+		       "dst_size:%x, res:%d\n", __func__, msg_addr, msg_size,
+		       dst_addr, dst_size, RPC_R8(&msg));
+
+	return ret;
+}
+
+int sc_seco_secvio_config(sc_ipc_t ipc, u8 id, u8 access,
+			  u32 *data0, u32 *data1, u32 *data2, u32 *data3,
+			  u32 *data4, u8 size)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	struct sc_rpc_msg_s msg;
+	int msg_size = sizeof(struct sc_rpc_msg_s);
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 7U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+	RPC_FUNC(&msg) = (u8)(SECO_FUNC_SECVIO_CONFIG);
+
+	RPC_U32(&msg, 0U) = (u32)(*data0);
+	RPC_U32(&msg, 4U) = (u32)(*data1);
+	RPC_U32(&msg, 8U) = (u32)(*data2);
+	RPC_U32(&msg, 12U) = (u32)(*data3);
+	RPC_U32(&msg, 16U) = (u32)(*data4);
+	RPC_U8(&msg, 20U) = (u8)(id);
+	RPC_U8(&msg, 21U) = (u8)(access);
+	RPC_U8(&msg, 22U) = (u8)(size);
+
+	ret = misc_call(dev, SC_FALSE, &msg, msg_size, &msg, msg_size);
+	if (ret)
+		printf("%s, id:0x%x, access:%x, res:%d\n",
+		       __func__, id, access, RPC_R8(&msg));
+
+	*data0 = (u32)RPC_U32(&msg, 0U);
+	*data1 = (u32)RPC_U32(&msg, 4U);
+	*data2 = (u32)RPC_U32(&msg, 8U);
+	*data3 = (u32)RPC_U32(&msg, 12U);
+	*data4 = (u32)RPC_U32(&msg, 16U);
+
+	return ret;
+}
+
+int sc_seco_secvio_dgo_config(sc_ipc_t ipc, u8 id, u8 access, u32 *data)
+{
+	struct udevice *dev = gd->arch.scu_dev;
+	struct sc_rpc_msg_s msg;
+	int size = sizeof(struct sc_rpc_msg_s);
+	int ret;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SIZE(&msg) = 3U;
+	RPC_SVC(&msg) = (u8)(SC_RPC_SVC_SECO);
+	RPC_FUNC(&msg) = (u8)(SECO_FUNC_SECVIO_DGO_CONFIG);
+
+	RPC_U32(&msg, 0U) = (u32)(*data);
+	RPC_U8(&msg, 4U) = (u8)(id);
+	RPC_U8(&msg, 5U) = (u8)(access);
+
+	ret = misc_call(dev, SC_FALSE, &msg, size, &msg, size);
+	if (ret)
+		printf("%s, id:0x%x, access:%x, res:%d\n",
+		       __func__, id, access, RPC_R8(&msg));
+
+	if (data)
+		*data = RPC_U32(&msg, 0U);
+
+	return ret;
+}
diff --git a/drivers/misc/irq-uclass.c b/drivers/misc/irq-uclass.c
index 61aa10e465..16dc0be75c 100644
--- a/drivers/misc/irq-uclass.c
+++ b/drivers/misc/irq-uclass.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <irq.h>
+#include <log.h>
 #include <dm/device-internal.h>
 
 int irq_route_pmc_gpio_gpe(struct udevice *dev, uint pmc_gpe_num)
diff --git a/drivers/misc/jz4780_efuse.c b/drivers/misc/jz4780_efuse.c
index bc3dc93af2..1fba3271db 100644
--- a/drivers/misc/jz4780_efuse.c
+++ b/drivers/misc/jz4780_efuse.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/unaligned.h>
 #include <errno.h>
+#include <linux/bitops.h>
 #include <mach/jz4780.h>
 #include <wait_bit.h>
 
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index d8048e1b70..408c89315a 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -14,6 +14,7 @@
 #include <i2c.h>
 #include <k3-avs.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 
 #define AM6_VTM_DEVINFO(i)	(priv->base + 0x100 + 0x20 * (i))
diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c
index 8f270f3b5c..cc2a23dd66 100644
--- a/drivers/misc/k3_esm.c
+++ b/drivers/misc/k3_esm.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #define ESM_SFT_RST			0x0c
 #define ESM_SFT_RST_KEY			0x0f
diff --git a/drivers/misc/microchip_flexcom.c b/drivers/misc/microchip_flexcom.c
index 4cff160d88..44a8b180a4 100644
--- a/drivers/misc/microchip_flexcom.c
+++ b/drivers/misc/microchip_flexcom.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <misc.h>
 #include <asm/io.h>
 #include <linux/err.h>
diff --git a/drivers/misc/mpc83xx_serdes.c b/drivers/misc/mpc83xx_serdes.c
index d572dda3c1..ab1e34e6f4 100644
--- a/drivers/misc/mpc83xx_serdes.c
+++ b/drivers/misc/mpc83xx_serdes.c
@@ -11,8 +11,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mapmem.h>
 #include <misc.h>
+#include <linux/delay.h>
 
 #include "mpc83xx_serdes.h"
 
diff --git a/drivers/misc/mpc83xx_serdes.h b/drivers/misc/mpc83xx_serdes.h
index 89ea1dbab7..2a13c5892b 100644
--- a/drivers/misc/mpc83xx_serdes.h
+++ b/drivers/misc/mpc83xx_serdes.h
@@ -18,6 +18,7 @@
  *			lane E) field of the SRCSCR0
  * @SRDSCR0_TXEQE_SATA: Bitmask to set the TXEQE to the value used for SATA
  */
+#include <linux/bitops.h>
 enum srdscr0_mask {
 	SRDSCR0_DPPA        = BIT(31 - 16),
 	SRDSCR0_DPPE        = BIT(31 - 20),
diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c
index 80cd8dceda..926c62c8a1 100644
--- a/drivers/misc/mxc_ocotp.c
+++ b/drivers/misc/mxc_ocotp.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <fuse.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/misc/mxs_ocotp.c b/drivers/misc/mxs_ocotp.c
index 21cae02118..facc720c8e 100644
--- a/drivers/misc/mxs_ocotp.c
+++ b/drivers/misc/mxs_ocotp.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <fuse.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c
index 9fe0aca342..06b1e8d9ad 100644
--- a/drivers/misc/p2sb-uclass.c
+++ b/drivers/misc/p2sb-uclass.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <p2sb.h>
diff --git a/drivers/misc/p2sb_emul.c b/drivers/misc/p2sb_emul.c
index 02f7a7ea67..a4b6dba516 100644
--- a/drivers/misc/p2sb_emul.c
+++ b/drivers/misc/p2sb_emul.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <axi.h>
 #include <dm.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/test.h>
 #include <p2sb.h>
diff --git a/drivers/misc/qfw.c b/drivers/misc/qfw.c
index 81e26614d3..f6eb6583ed 100644
--- a/drivers/misc/qfw.c
+++ b/drivers/misc/qfw.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <qfw.h>
 #include <asm/io.h>
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 2520c6a38e..46ce6305fe 100644
--- a/drivers/misc/rockchip-efuse.c
+++ b/drivers/misc/rockchip-efuse.c
@@ -43,8 +43,8 @@ struct rockchip_efuse_platdata {
 };
 
 #if defined(DEBUG)
-static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
-		       int argc, char * const argv[])
+static int dump_efuses(struct cmd_tbl *cmdtp, int flag,
+		       int argc, char *const argv[])
 {
 	/*
 	 * N.B.: This function is tailored towards the RK3399 and assumes that
diff --git a/drivers/misc/stm32_rcc.c b/drivers/misc/stm32_rcc.c
index 980b84453e..b82fe54c60 100644
--- a/drivers/misc/stm32_rcc.c
+++ b/drivers/misc/stm32_rcc.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <misc.h>
 #include <stm32_rcc.h>
 #include <dm/device-internal.h>
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index 97e2afa676..07c67577d5 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/test.h>
 #include <linux/ctype.h>
diff --git a/drivers/misc/tegra186_bpmp.c b/drivers/misc/tegra186_bpmp.c
index ce2b925173..18da138507 100644
--- a/drivers/misc/tegra186_bpmp.c
+++ b/drivers/misc/tegra186_bpmp.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <time.h>
 #include <dm/lists.h>
@@ -13,6 +14,7 @@
 #include <misc.h>
 #include <asm/arch-tegra/bpmp_abi.h>
 #include <asm/arch-tegra/ivc.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define BPMP_IVC_FRAME_COUNT 1
diff --git a/drivers/misc/tegra_car.c b/drivers/misc/tegra_car.c
index db05c8917f..0ddbb3c619 100644
--- a/drivers/misc/tegra_car.c
+++ b/drivers/misc/tegra_car.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <dm/root.h>
 
diff --git a/drivers/misc/vexpress_config.c b/drivers/misc/vexpress_config.c
index 53d7e1d154..02e5b586e2 100644
--- a/drivers/misc/vexpress_config.c
+++ b/drivers/misc/vexpress_config.c
@@ -9,6 +9,7 @@
 #include <malloc.h>
 #include <dm/read.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 #include <misc.h>
 
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 8f0df568b9..3c4f057373 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -616,7 +616,7 @@ config MMC_SDHCI_TANGIER
 
 config MMC_SDHCI_TEGRA
 	bool "SDHCI platform support for the Tegra SD/MMC Controller"
-	depends on TEGRA
+	depends on ARCH_TEGRA
 	select BOUNCE_BUFFER
 	default y
 	help
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index ca76e1f559..cbc531dc53 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -13,6 +13,7 @@
 #include <regmap.h>
 #include <sdhci.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 /* CTL_CFG Registers */
diff --git a/drivers/mmc/arm_pl180_mmci.c b/drivers/mmc/arm_pl180_mmci.c
index d396afc14c..846622892a 100644
--- a/drivers/mmc/arm_pl180_mmci.c
+++ b/drivers/mmc/arm_pl180_mmci.c
@@ -14,6 +14,7 @@
 #include "common.h"
 #include <clk.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <dm/device_compat.h>
@@ -22,6 +23,7 @@
 #include <asm-generic/gpio.h>
 
 #include "arm_pl180_mmci.h"
+#include <linux/delay.h>
 
 #ifdef CONFIG_DM_MMC
 #include <dm.h>
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index 39c93db275..dc3dffb657 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -38,6 +38,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/bcm2835_sdhost.c b/drivers/mmc/bcm2835_sdhost.c
index 8cebf99c58..c4876e81f8 100644
--- a/drivers/mmc/bcm2835_sdhost.c
+++ b/drivers/mmc/bcm2835_sdhost.c
@@ -37,7 +37,10 @@
 #include <asm/arch/mbox.h>
 #include <asm/unaligned.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/sizes.h>
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index ef5cd4e723..2408a687d2 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <asm/arch/sdmmc_defs.h>
 #include <asm-generic/gpio.h>
+#include <linux/delay.h>
 
 #define DAVINCI_MAX_BLOCKS	(32)
 #define WATCHDOG_COUNT		(100000)
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 1224540811..7702f4be3f 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -9,11 +9,14 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <mmc.h>
 #include <dwmmc.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 #define PAGE_SIZE 4096
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 386781da03..d5d955846c 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -20,9 +20,12 @@
 #include <malloc.h>
 #include <fsl_esdhc.h>
 #include <fdt_support.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c
index 6bca2a9c82..588d6a9d76 100644
--- a/drivers/mmc/fsl_esdhc_imx.c
+++ b/drivers/mmc/fsl_esdhc_imx.c
@@ -17,9 +17,13 @@
 #include <cpu_func.h>
 #include <errno.h>
 #include <hwconfig.h>
+#include <log.h>
 #include <mmc.h>
 #include <part.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include <malloc.h>
diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c
index 9c15eb36d6..b37523e26f 100644
--- a/drivers/mmc/ftsdc010_mci.c
+++ b/drivers/mmc/ftsdc010_mci.c
@@ -11,9 +11,11 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <mmc.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/errno.h>
 #include <asm/byteorder.h>
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 93b88d17d4..9d20e28383 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -11,10 +11,12 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <mmc.h>
 #include <part.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/byteorder.h>
 #include <asm/arch/clk.h>
diff --git a/drivers/mmc/iproc_sdhci.c b/drivers/mmc/iproc_sdhci.c
index c2319b4134..91e2e3f0b8 100644
--- a/drivers/mmc/iproc_sdhci.c
+++ b/drivers/mmc/iproc_sdhci.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <malloc.h>
 #include <sdhci.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/mmc/jz_mmc.c b/drivers/mmc/jz_mmc.c
index 8d4f886cb4..d3f1eddf45 100644
--- a/drivers/mmc/jz_mmc.c
+++ b/drivers/mmc/jz_mmc.c
@@ -13,6 +13,8 @@
 #include <asm/unaligned.h>
 #include <errno.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <mach/jz4780.h>
 #include <wait_bit.h>
 
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
index f5e1f2cbbd..2bbe673b91 100644
--- a/drivers/mmc/kona_sdhci.c
+++ b/drivers/mmc/kona_sdhci.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <sdhci.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/kona-common/clk.h>
 
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index 86c1a7164a..b7f793cd04 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -14,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/sd_emmc.h>
+#include <linux/delay.h>
 #include <linux/log2.h>
 
 static inline void *get_regbase(const struct mmc *mmc)
diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
index f313bc1734..c5b7872900 100644
--- a/drivers/mmc/mmc-uclass.c
+++ b/drivers/mmc/mmc-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <mmc.h>
 #include <dm.h>
 #include <dm/device-internal.h>
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 523c055967..620bb93064 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -8,12 +8,16 @@
 
 #include <config.h>
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <errno.h>
 #include <mmc.h>
 #include <part.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 #include <malloc.h>
 #include <memalign.h>
diff --git a/drivers/mmc/mmc_boot.c b/drivers/mmc/mmc_boot.c
index 64dc147a47..0a74b1fb77 100644
--- a/drivers/mmc/mmc_boot.c
+++ b/drivers/mmc/mmc_boot.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <mmc.h>
 #include "mmc_private.h"
 
diff --git a/drivers/mmc/mmc_legacy.c b/drivers/mmc/mmc_legacy.c
index b0f5cf58a2..2bb12ceeaf 100644
--- a/drivers/mmc/mmc_legacy.c
+++ b/drivers/mmc/mmc_legacy.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include "mmc_private.h"
diff --git a/drivers/mmc/mmc_spi.c b/drivers/mmc/mmc_spi.c
index c693fb2d17..e76ab54838 100644
--- a/drivers/mmc/mmc_spi.c
+++ b/drivers/mmc/mmc_spi.c
@@ -8,10 +8,12 @@
  */
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <mmc.h>
 #include <stdlib.h>
+#include <linux/bitops.h>
 #include <u-boot/crc.h>
 #include <linux/crc7.h>
 #include <asm/byteorder.h>
diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c
index b52ff9f3bc..6a4453ca02 100644
--- a/drivers/mmc/mmc_write.c
+++ b/drivers/mmc/mmc_write.c
@@ -8,6 +8,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <blk.h>
 #include <dm.h>
 #include <part.h>
 #include <div64.h>
diff --git a/drivers/mmc/mvebu_mmc.c b/drivers/mmc/mvebu_mmc.c
index 958ac17954..8e7745e233 100644
--- a/drivers/mmc/mvebu_mmc.c
+++ b/drivers/mmc/mvebu_mmc.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <mmc.h>
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 9414eff42b..e3c352b44a 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -21,8 +21,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 4d0dc33936..8636cd713a 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -25,6 +25,7 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <mmc.h>
@@ -33,6 +34,7 @@
 #if defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)
 #include <palmas.h>
 #endif
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/mmc_host_def.h>
 #ifdef CONFIG_OMAP54XX
@@ -48,6 +50,8 @@
 #endif
 #include <dm.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include <thermal.h>
diff --git a/drivers/mmc/pxa_mmc_gen.c b/drivers/mmc/pxa_mmc_gen.c
index a4dcdb5cff..cc6014703c 100644
--- a/drivers/mmc/pxa_mmc_gen.c
+++ b/drivers/mmc/pxa_mmc_gen.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/regs-mmc.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <malloc.h>
diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c
index 88a7160b0a..d6ea99d2ce 100644
--- a/drivers/mmc/renesas-sdhi.c
+++ b/drivers/mmc/renesas-sdhi.c
@@ -7,11 +7,14 @@
 #include <bouncebuf.h>
 #include <clk.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
 #include <linux/dma-direction.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index a0e1be8794..638107a7ff 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -9,12 +9,14 @@
 #include <dt-structs.h>
 #include <dwmmc.h>
 #include <errno.h>
+#include <log.h>
 #include <mapmem.h>
 #include <pwrseq.h>
 #include <syscon.h>
 #include <asm/gpio.h>
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/periph.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 struct rockchip_mmc_plat {
diff --git a/drivers/mmc/rpmb.c b/drivers/mmc/rpmb.c
index ee6dbe30db..ea7e506666 100644
--- a/drivers/mmc/rpmb.c
+++ b/drivers/mmc/rpmb.c
@@ -9,6 +9,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <memalign.h>
 #include <mmc.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
index b5fe828dd6..24f599e868 100644
--- a/drivers/mmc/s5p_sdhci.c
+++ b/drivers/mmc/s5p_sdhci.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <sdhci.h>
 #include <fdtdec.h>
diff --git a/drivers/mmc/sandbox_mmc.c b/drivers/mmc/sandbox_mmc.c
index 899952d773..e86ea8fe09 100644
--- a/drivers/mmc/sandbox_mmc.c
+++ b/drivers/mmc/sandbox_mmc.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <mmc.h>
 #include <asm/test.h>
 
diff --git a/drivers/mmc/sdhci-cadence.c b/drivers/mmc/sdhci-cadence.c
index 2d38c2270e..7b5010b655 100644
--- a/drivers/mmc/sdhci-cadence.c
+++ b/drivers/mmc/sdhci-cadence.c
@@ -8,6 +8,8 @@
 #include <dm.h>
 #include <dm/device_compat.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/sizes.h>
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 520c9f9feb..92cc8434af 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -11,11 +11,16 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <sdhci.h>
 #include <dm.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
+#include <phys2bus.h>
 
 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 {
@@ -150,7 +155,8 @@ static void sdhci_prepare_dma(struct sdhci_host *host, struct mmc_data *data,
 					  mmc_get_dma_dir(data));
 
 	if (host->flags & USE_SDMA) {
-		sdhci_writel(host, host->start_addr, SDHCI_DMA_ADDRESS);
+		sdhci_writel(host, phys_to_bus((ulong)host->start_addr),
+				SDHCI_DMA_ADDRESS);
 	} else if (host->flags & (USE_ADMA | USE_ADMA64)) {
 		sdhci_prepare_adma_table(host, data);
 
@@ -204,7 +210,7 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data)
 				start_addr &=
 				~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
 				start_addr += SDHCI_DEFAULT_BOUNDARY_SIZE;
-				sdhci_writel(host, start_addr,
+				sdhci_writel(host, phys_to_bus((ulong)start_addr),
 					     SDHCI_DMA_ADDRESS);
 			}
 		}
@@ -739,13 +745,12 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
 	debug("%s, caps: 0x%x\n", __func__, caps);
 
 #ifdef CONFIG_MMC_SDHCI_SDMA
-	if (!(caps & SDHCI_CAN_DO_SDMA)) {
-		printf("%s: Your controller doesn't support SDMA!!\n",
-		       __func__);
-		return -EINVAL;
+	if ((caps & SDHCI_CAN_DO_SDMA)) {
+		host->flags |= USE_SDMA;
+	} else {
+		debug("%s: Your controller doesn't support SDMA!!\n",
+		      __func__);
 	}
-
-	host->flags |= USE_SDMA;
 #endif
 #if CONFIG_IS_ENABLED(MMC_SDHCI_ADMA)
 	if (!(caps & SDHCI_CAN_DO_ADMA2)) {
@@ -839,8 +844,7 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host,
 		cfg->host_caps &= ~MMC_MODE_HS_52MHz;
 	}
 
-	if (!(cfg->voltages & MMC_VDD_165_195) ||
-	    (host->quirks & SDHCI_QUIRK_NO_1_8_V))
+	if (!(cfg->voltages & MMC_VDD_165_195))
 		caps_1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 |
 			    SDHCI_SUPPORT_DDR50);
 
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 29bbb4b3a6..2e994d0178 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -7,6 +7,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <watchdog.h>
 #include <command.h>
 #include <mmc.h>
@@ -14,6 +15,8 @@
 #include <dm.h>
 #include <malloc.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/compat.h>
 #include <linux/io.h>
diff --git a/drivers/mmc/sh_sdhi.c b/drivers/mmc/sh_sdhi.c
index 2202158c88..772fe943e4 100644
--- a/drivers/mmc/sh_sdhi.c
+++ b/drivers/mmc/sh_sdhi.c
@@ -10,10 +10,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <dm.h>
+#include <part.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/compat.h>
 #include <linux/io.h>
diff --git a/drivers/mmc/socfpga_dw_mmc.c b/drivers/mmc/socfpga_dw_mmc.c
index 786cdc700a..892222d27d 100644
--- a/drivers/mmc/socfpga_dw_mmc.c
+++ b/drivers/mmc/socfpga_dw_mmc.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/clock_manager.h>
 #include <asm/arch/system_manager.h>
 #include <clk.h>
diff --git a/drivers/mmc/sti_sdhci.c b/drivers/mmc/sti_sdhci.c
index d6c75ea601..9bcd8ce5f6 100644
--- a/drivers/mmc/sti_sdhci.c
+++ b/drivers/mmc/sti_sdhci.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mmc.h>
 #include <reset-uclass.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 6f3b2ad653..6d50356217 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -9,7 +9,12 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/bitops.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <mmc.h>
 #include <reset.h>
@@ -674,7 +679,7 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
 	cfg->f_max = dev_read_u32_default(dev, "max-frequency", 52000000);
 	cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
 	cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
-	cfg->name = "STM32 SDMMC2";
+	cfg->name = "STM32 SD/MMC";
 
 	cfg->host_caps = 0;
 	if (cfg->f_max > 25000000)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index 9f426661c4..0e03b07ce5 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b/drivers/mmc/sunxi_mmc.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <mmc.h>
 #include <clk.h>
@@ -20,6 +21,7 @@
 #include <asm/arch/gpio.h>
 #include <asm/arch/mmc.h>
 #include <asm-generic/gpio.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_DM_MMC
 struct sunxi_mmc_variant {
diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
index 2b041562a6..cc78a2f2f0 100644
--- a/drivers/mmc/tegra_mmc.c
+++ b/drivers/mmc/tegra_mmc.c
@@ -10,10 +10,13 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <mmc.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/tegra_mmc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA210)
 #include <asm/arch/clock.h>
diff --git a/drivers/mmc/tmio-common.c b/drivers/mmc/tmio-common.c
index 1dc13db9ea..20cd237ef0 100644
--- a/drivers/mmc/tmio-common.c
+++ b/drivers/mmc/tmio-common.c
@@ -13,6 +13,7 @@
 #include <dm/device_compat.h>
 #include <dm/pinctrl.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h
index 2f671df4bc..9062300c64 100644
--- a/drivers/mmc/tmio-common.h
+++ b/drivers/mmc/tmio-common.h
@@ -7,6 +7,7 @@
 #ifndef __TMIO_COMMON_H__
 #define __TMIO_COMMON_H__
 
+#include <linux/bitops.h>
 #define TMIO_SD_CMD			0x000	/* command */
 #define   TMIO_SD_CMD_NOSTOP		BIT(14)	/* No automatic CMD12 issue */
 #define   TMIO_SD_CMD_MULTI		BIT(13)	/* multiple block transfer */
diff --git a/drivers/mmc/xenon_sdhci.c b/drivers/mmc/xenon_sdhci.c
index 829b75683b..e765dd384a 100644
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -17,6 +17,8 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <sdhci.h>
diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
index da3ff53da1..de404aa956 100644
--- a/drivers/mmc/zynq_sdhci.c
+++ b/drivers/mmc/zynq_sdhci.c
@@ -9,7 +9,9 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 #include "mmc_private.h"
+#include <log.h>
 #include <dm/device_compat.h>
 #include <linux/err.h>
 #include <linux/libfdt.h>
@@ -22,14 +24,12 @@ DECLARE_GLOBAL_DATA_PTR;
 struct arasan_sdhci_plat {
 	struct mmc_config cfg;
 	struct mmc mmc;
-	unsigned int f_max;
 };
 
 struct arasan_sdhci_priv {
 	struct sdhci_host *host;
 	u8 deviceid;
 	u8 bank;
-	u8 no_1p8;
 };
 
 #if defined(CONFIG_ARCH_ZYNQMP)
@@ -238,8 +238,11 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE;
 #endif
 
-	if (priv->no_1p8)
-		host->quirks |= SDHCI_QUIRK_NO_1_8_V;
+	plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
+
+	ret = mmc_of_parse(dev, &plat->cfg);
+	if (ret)
+		return ret;
 
 	host->max_clk = clock;
 
@@ -247,7 +250,7 @@ static int arasan_sdhci_probe(struct udevice *dev)
 	host->mmc->dev = dev;
 	host->mmc->priv = host;
 
-	ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max,
+	ret = sdhci_setup_cfg(&plat->cfg, host, plat->cfg.f_max,
 			      CONFIG_ZYNQ_SDHCI_MIN_FREQ);
 	if (ret)
 		return ret;
@@ -258,7 +261,6 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 {
-	struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
 	struct arasan_sdhci_priv *priv = dev_get_priv(dev);
 
 	priv->host = calloc(1, sizeof(struct sdhci_host));
@@ -277,10 +279,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 
 	priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1);
 	priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1);
-	priv->no_1p8 = dev_read_bool(dev, "no-1-8-v");
 
-	plat->f_max = dev_read_u32_default(dev, "max-frequency",
-					   CONFIG_ZYNQ_SDHCI_MAX_FREQ);
 	return 0;
 }
 
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 5e7571cf3d..348b43e653 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -22,6 +22,13 @@ config MTD_NOR_FLASH
 	help
 	  Enable support for parallel NOR flash.
 
+config SYS_MTDPARTS_RUNTIME
+	bool "Allow MTDPARTS to be configured at runtime"
+	depends on MTD
+	help
+	  This option allows to call the function board_mtdparts_default to
+	  dynamically build the variables mtdids and mtdparts at runtime.
+
 config FLASH_CFI_DRIVER
 	bool "Enable CFI Flash driver"
 	help
diff --git a/drivers/mtd/altera_qspi.c b/drivers/mtd/altera_qspi.c
index 1d32febe07..cd4d32959a 100644
--- a/drivers/mtd/altera_qspi.c
+++ b/drivers/mtd/altera_qspi.c
@@ -9,8 +9,10 @@
 #include <errno.h>
 #include <fdt_support.h>
 #include <flash.h>
+#include <log.h>
 #include <mtd.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 4ce183b6f3..b7289ba539 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -22,12 +22,16 @@
 #include <env.h>
 #include <errno.h>
 #include <fdt_support.h>
+#include <flash.h>
+#include <init.h>
 #include <irq_func.h>
+#include <log.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/byteorder.h>
 #include <asm/unaligned.h>
 #include <env_internal.h>
+#include <linux/delay.h>
 #include <mtd/cfi_flash.h>
 #include <watchdog.h>
 
diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index f59b2bc62f..859c7fd4ec 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -12,6 +12,8 @@
 /*#define DEBUG*/
 
 #include <common.h>
+#include <flash.h>
+#include <log.h>
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/byteorder.h>
diff --git a/drivers/mtd/mtd_uboot.c b/drivers/mtd/mtd_uboot.c
index db20a6b0b2..9360d4ed17 100644
--- a/drivers/mtd/mtd_uboot.c
+++ b/drivers/mtd/mtd_uboot.c
@@ -5,6 +5,7 @@
  */
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device.h>
 #include <dm/uclass-internal.h>
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 5621c3fd26..684bc94998 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -10,6 +10,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -20,6 +21,7 @@
 #include <asm/div64.h>
 #else
 #include <div64.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #endif
 
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index f8d3f4d246..1a4dec34d9 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -9,6 +9,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/module.h>
 #include <linux/kernel.h>
@@ -27,6 +28,8 @@
 #include <linux/gfp.h>
 #include <linux/slab.h>
 #else
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/err.h>
 #include <ubi_uboot.h>
 #endif
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 56acdbf65b..d1f6029b2b 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -9,6 +9,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/module.h>
 #include <linux/types.h>
@@ -20,6 +21,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <linux/compat.h>
 #include <ubi_uboot.h>
diff --git a/drivers/mtd/mw_eeprom.c b/drivers/mtd/mw_eeprom.c
index 6a3a6f6751..9837733bee 100644
--- a/drivers/mtd/mw_eeprom.c
+++ b/drivers/mtd/mw_eeprom.c
@@ -3,6 +3,7 @@
 #include <common.h>
 #include <eeprom.h>
 #include <asm/ic/ssi.h>
+#include <linux/delay.h>
 
 /*
  * Serial EEPROM opcodes, including start bit
diff --git a/drivers/mtd/nand/bbt.c b/drivers/mtd/nand/bbt.c
index 133670cb19..84d60b8652 100644
--- a/drivers/mtd/nand/bbt.c
+++ b/drivers/mtd/nand/bbt.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/mtd/nand.h>
 #ifndef __UBOOT__
 #include <linux/slab.h>
diff --git a/drivers/mtd/nand/core.c b/drivers/mtd/nand/core.c
index bc0accf8c6..6fbd24ba74 100644
--- a/drivers/mtd/nand/core.c
+++ b/drivers/mtd/nand/core.c
@@ -14,6 +14,7 @@
 #include <linux/compat.h>
 #include <linux/module.h>
 #endif
+#include <linux/bitops.h>
 #include <linux/mtd/nand.h>
 
 /**
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 23201ca720..06b2ff972c 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -121,15 +121,6 @@ config NAND_DENALI_DT
 	  Enable the driver for NAND flash on platforms using a Denali NAND
 	  controller as a DT device.
 
-config NAND_DENALI_SPARE_AREA_SKIP_BYTES
-	int "Number of bytes skipped in OOB area"
-	depends on NAND_DENALI
-	range 0 63
-	help
-	  This option specifies the number of bytes to skip from the beginning
-	  of OOB area before last ECC sector data starts.  This is potentially
-	  used to preserve the bad block marker in the OOB area.
-
 config NAND_LPC32XX_SLC
 	bool "Support LPC32XX_SLC controller"
 	help
@@ -259,12 +250,12 @@ config NAND_MXC
 
 config NAND_MXS
 	bool "MXS NAND support"
-	depends on MX23 || MX28 || MX6 || MX7
+	depends on MX23 || MX28 || MX6 || MX7 || IMX8 || IMX8M
 	select SYS_NAND_SELF_INIT
 	imply CMD_NAND
 	select APBH_DMA
-	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7
-	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7
+	select APBH_DMA_BURST if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
+	select APBH_DMA_BURST8 if ARCH_MX6 || ARCH_MX7 || ARCH_IMX8 || ARCH_IMX8M
 	help
 	  This enables NAND driver for the NAND flash controller on the
 	  MXS processors.
@@ -404,6 +395,15 @@ config SPL_NAND_DENALI
 	  This is a small implementation of the Denali NAND controller
 	  for use on SPL.
 
+config NAND_DENALI_SPARE_AREA_SKIP_BYTES
+	int "Number of bytes skipped in OOB area"
+	depends on SPL_NAND_DENALI
+	range 0 63
+	help
+	  This option specifies the number of bytes to skip from the beginning
+	  of OOB area before last ECC sector data starts.  This is potentially
+	  used to preserve the bad block marker in the OOB area.
+
 config SPL_NAND_SIMPLE
 	bool "Use simple SPL NAND driver"
 	depends on !SPL_NAND_AM33XX_BCH
diff --git a/drivers/mtd/nand/raw/am335x_spl_bch.c b/drivers/mtd/nand/raw/am335x_spl_bch.c
index ba2f33a96e..b6fc5f29c7 100644
--- a/drivers/mtd/nand/raw/am335x_spl_bch.c
+++ b/drivers/mtd/nand/raw/am335x_spl_bch.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/mtd/nand_ecc.h>
 
 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
diff --git a/drivers/mtd/nand/raw/arasan_nfc.c b/drivers/mtd/nand/raw/arasan_nfc.c
index 110c32b396..6c1d64054c 100644
--- a/drivers/mtd/nand/raw/arasan_nfc.c
+++ b/drivers/mtd/nand/raw/arasan_nfc.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/rawnand.h>
diff --git a/drivers/mtd/nand/raw/atmel_nand.c b/drivers/mtd/nand/raw/atmel_nand.c
index 996d3dbb71..5e95901e27 100644
--- a/drivers/mtd/nand/raw/atmel_nand.c
+++ b/drivers/mtd/nand/raw/atmel_nand.c
@@ -11,10 +11,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <asm/arch/gpio.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 
 #include <malloc.h>
 #include <nand.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
index ea7c65a1f6..6313403cd6 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm63158_nand.c
@@ -4,6 +4,7 @@
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/io.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
index e2f5452c27..cd4b24a51a 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6368_nand.c
@@ -4,6 +4,7 @@
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
index 0f1a28e476..aa042bef15 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm68360_nand.c
@@ -4,6 +4,7 @@
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
index 3a136155dd..0788455090 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6838_nand.c
@@ -4,6 +4,7 @@
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/io.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
index 6aca011db2..818eae8a7c 100644
--- a/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
+++ b/drivers/mtd/nand/raw/brcmnand/bcm6858_nand.c
@@ -4,6 +4,7 @@
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/io.h>
diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
index 7bdebf5869..48c0ca69de 100644
--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
@@ -19,6 +19,8 @@
 #include <clk.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/err.h>
 #include <linux/ioport.h>
 #include <linux/completion.h>
diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c
index 724bbee752..4416b8fa1e 100644
--- a/drivers/mtd/nand/raw/davinci_nand.c
+++ b/drivers/mtd/nand/raw/davinci_nand.c
@@ -29,6 +29,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <nand.h>
 #include <dm/uclass.h>
diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c
index b525b1be54..15e90291de 100644
--- a/drivers/mtd/nand/raw/denali.c
+++ b/drivers/mtd/nand/raw/denali.c
@@ -5,12 +5,18 @@
  * Copyright (C) 2009-2010, Intel Corporation and its suppliers.
  */
 
+#include <common.h>
 #include <dm.h>
 #include <malloc.h>
 #include <nand.h>
+#include <asm/cache.h>
+#include <asm/dma-mapping.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/dma-direction.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
 #include <linux/errno.h>
@@ -1089,6 +1095,7 @@ static void denali_hw_init(struct denali_nand_info *denali)
 	iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE);
 
 	iowrite32(0xffff, denali->reg + SPARE_AREA_MARKER);
+	iowrite32(WRITE_PROTECT__FLAG, denali->reg + WRITE_PROTECT);
 }
 
 int denali_calc_ecc_bytes(int step_size, int strength)
diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/raw/denali_dt.c
index 41b93e660a..2728e8098f 100644
--- a/drivers/mtd/nand/raw/denali_dt.c
+++ b/drivers/mtd/nand/raw/denali_dt.c
@@ -7,6 +7,8 @@
 #include <clk.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <linux/printk.h>
diff --git a/drivers/mtd/nand/raw/denali_spl.c b/drivers/mtd/nand/raw/denali_spl.c
index b8b29812aa..f72142817e 100644
--- a/drivers/mtd/nand/raw/denali_spl.c
+++ b/drivers/mtd/nand/raw/denali_spl.c
@@ -5,8 +5,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/unaligned.h>
+#include <linux/delay.h>
 #include <linux/mtd/rawnand.h>
 #include "denali.h"
 
diff --git a/drivers/mtd/nand/raw/fsl_ifc_spl.c b/drivers/mtd/nand/raw/fsl_ifc_spl.c
index 0983fbced3..b7e37416a4 100644
--- a/drivers/mtd/nand/raw/fsl_ifc_spl.c
+++ b/drivers/mtd/nand/raw/fsl_ifc_spl.c
@@ -10,6 +10,7 @@
 #include <cpu_func.h>
 #include <asm/io.h>
 #include <fsl_ifc.h>
+#include <part.h>
 #include <linux/mtd/rawnand.h>
 #ifdef CONFIG_CHAIN_OF_TRUST
 #include <fsl_validate.h>
diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c
index dfbdbca3ae..6c86a7e767 100644
--- a/drivers/mtd/nand/raw/fsl_upm.c
+++ b/drivers/mtd/nand/raw/fsl_upm.c
@@ -8,7 +8,9 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/fsl_upm.h>
diff --git a/drivers/mtd/nand/raw/kmeter1_nand.c b/drivers/mtd/nand/raw/kmeter1_nand.c
index 7103300060..cf33f2863e 100644
--- a/drivers/mtd/nand/raw/kmeter1_nand.c
+++ b/drivers/mtd/nand/raw/kmeter1_nand.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <nand.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define CONFIG_NAND_MODE_REG	(void *)(CONFIG_SYS_NAND_BASE + 0x20000)
 #define CONFIG_NAND_DATA_REG	(void *)(CONFIG_SYS_NAND_BASE + 0x30000)
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
index 79d1489dc7..b3232ed59d 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_mlc.c
@@ -21,6 +21,7 @@
 
 #include <common.h>
 #include <nand.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <nand.h>
diff --git a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
index 8615b112a2..9cca3c55cc 100644
--- a/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
+++ b/drivers/mtd/nand/raw/lpc32xx_nand_slc.c
@@ -11,7 +11,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <nand.h>
+#include <linux/bug.h>
 #include <linux/mtd/nand_ecc.h>
 #include <linux/errno.h>
 #include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/mxc_nand.c b/drivers/mtd/nand/raw/mxc_nand.c
index cf97e0f74f..59cef20575 100644
--- a/drivers/mtd/nand/raw/mxc_nand.c
+++ b/drivers/mtd/nand/raw/mxc_nand.c
@@ -6,7 +6,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <nand.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <asm/io.h>
 #if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c
index fe8097c146..a7852a841c 100644
--- a/drivers/mtd/nand/raw/mxs_nand.c
+++ b/drivers/mtd/nand/raw/mxs_nand.c
@@ -10,11 +10,13 @@
  *
  * Copyright (C) 2010 Freescale Semiconductor, Inc.
  * Copyright (C) 2008 Embedded Alley Solutions, Inc.
+ * Copyright 2017-2019 NXP
  */
 
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <asm/cache.h>
 #include <linux/mtd/rawnand.h>
 #include <linux/sizes.h>
 #include <linux/types.h>
@@ -30,7 +32,8 @@
 
 #define	MXS_NAND_DMA_DESCRIPTOR_COUNT		4
 
-#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
+#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_IMX8) || \
+	defined(CONFIG_IMX8M)
 #define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT	2
 #else
 #define	MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT	0
@@ -54,21 +57,21 @@ struct nand_ecclayout fake_ecc_layout;
 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 static void mxs_nand_flush_data_buf(struct mxs_nand_info *info)
 {
-	uint32_t addr = (uint32_t)info->data_buf;
+	uint32_t addr = (uintptr_t)info->data_buf;
 
 	flush_dcache_range(addr, addr + info->data_buf_size);
 }
 
 static void mxs_nand_inval_data_buf(struct mxs_nand_info *info)
 {
-	uint32_t addr = (uint32_t)info->data_buf;
+	uint32_t addr = (uintptr_t)info->data_buf;
 
 	invalidate_dcache_range(addr, addr + info->data_buf_size);
 }
 
 static void mxs_nand_flush_cmd_buf(struct mxs_nand_info *info)
 {
-	uint32_t addr = (uint32_t)info->cmd_buf;
+	uint32_t addr = (uintptr_t)info->cmd_buf;
 
 	flush_dcache_range(addr, addr + MXS_NAND_COMMAND_BUFFER_SIZE);
 }
@@ -112,53 +115,32 @@ static uint32_t mxs_nand_aux_status_offset(void)
 	return (MXS_NAND_METADATA_SIZE + 0x3) & ~0x3;
 }
 
-static inline int mxs_nand_calc_mark_offset(struct bch_geometry *geo,
-					    uint32_t page_data_size)
+static inline bool mxs_nand_bbm_in_data_chunk(struct bch_geometry *geo, struct mtd_info *mtd,
+		unsigned int *chunk_num)
 {
-	uint32_t chunk_data_size_in_bits = geo->ecc_chunk_size * 8;
-	uint32_t chunk_ecc_size_in_bits = geo->ecc_strength * geo->gf_len;
-	uint32_t chunk_total_size_in_bits;
-	uint32_t block_mark_chunk_number;
-	uint32_t block_mark_chunk_bit_offset;
-	uint32_t block_mark_bit_offset;
+	unsigned int i, j;
 
-	chunk_total_size_in_bits =
-			chunk_data_size_in_bits + chunk_ecc_size_in_bits;
-
-	/* Compute the bit offset of the block mark within the physical page. */
-	block_mark_bit_offset = page_data_size * 8;
-
-	/* Subtract the metadata bits. */
-	block_mark_bit_offset -= MXS_NAND_METADATA_SIZE * 8;
-
-	/*
-	 * Compute the chunk number (starting at zero) in which the block mark
-	 * appears.
-	 */
-	block_mark_chunk_number =
-			block_mark_bit_offset / chunk_total_size_in_bits;
-
-	/*
-	 * Compute the bit offset of the block mark within its chunk, and
-	 * validate it.
-	 */
-	block_mark_chunk_bit_offset = block_mark_bit_offset -
-			(block_mark_chunk_number * chunk_total_size_in_bits);
+	if (geo->ecc_chunk0_size != geo->ecc_chunkn_size) {
+		dev_err(this->dev, "The size of chunk0 must equal to chunkn\n");
+		return false;
+	}
 
-	if (block_mark_chunk_bit_offset > chunk_data_size_in_bits)
-		return -EINVAL;
+	i = (mtd->writesize * 8 - MXS_NAND_METADATA_SIZE * 8) /
+		(geo->gf_len * geo->ecc_strength +
+				geo->ecc_chunkn_size * 8);
 
-	/*
-	 * Now that we know the chunk number in which the block mark appears,
-	 * we can subtract all the ECC bits that appear before it.
-	 */
-	block_mark_bit_offset -=
-		block_mark_chunk_number * chunk_ecc_size_in_bits;
+	j = (mtd->writesize * 8 - MXS_NAND_METADATA_SIZE * 8) -
+		(geo->gf_len * geo->ecc_strength +
+				geo->ecc_chunkn_size * 8) * i;
 
-	geo->block_mark_byte_offset = block_mark_bit_offset >> 3;
-	geo->block_mark_bit_offset = block_mark_bit_offset & 0x7;
+	if (j < geo->ecc_chunkn_size * 8) {
+		*chunk_num = i + 1;
+		dev_dbg(this->dev, "Set ecc to %d and bbm in chunk %d\n",
+			geo->ecc_strength, *chunk_num);
+		return true;
+	}
 
-	return 0;
+	return false;
 }
 
 static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
@@ -168,6 +150,7 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
+	unsigned int block_mark_bit_offset;
 
 	switch (ecc_step) {
 	case SZ_512:
@@ -180,45 +163,51 @@ static inline int mxs_nand_calc_ecc_layout_by_info(struct bch_geometry *geo,
 		return -EINVAL;
 	}
 
-	geo->ecc_chunk_size = ecc_step;
+	geo->ecc_chunk0_size = ecc_step;
+	geo->ecc_chunkn_size = ecc_step;
 	geo->ecc_strength = round_up(ecc_strength, 2);
 
 	/* Keep the C >= O */
-	if (geo->ecc_chunk_size < mtd->oobsize)
+	if (geo->ecc_chunkn_size < mtd->oobsize)
 		return -EINVAL;
 
 	if (geo->ecc_strength > nand_info->max_ecc_strength_supported)
 		return -EINVAL;
 
-	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
+	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size;
+
+	/* For bit swap. */
+	block_mark_bit_offset = mtd->writesize * 8 -
+		(geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
+				+ MXS_NAND_METADATA_SIZE * 8);
+
+	geo->block_mark_byte_offset = block_mark_bit_offset / 8;
+	geo->block_mark_bit_offset  = block_mark_bit_offset % 8;
 
 	return 0;
 }
 
-static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
+static inline int mxs_nand_legacy_calc_ecc_layout(struct bch_geometry *geo,
 					   struct mtd_info *mtd)
 {
 	struct nand_chip *chip = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
+	unsigned int block_mark_bit_offset;
 
 	/* The default for the length of Galois Field. */
 	geo->gf_len = 13;
 
 	/* The default for chunk size. */
-	geo->ecc_chunk_size = 512;
+	geo->ecc_chunk0_size = 512;
+	geo->ecc_chunkn_size = 512;
 
-	if (geo->ecc_chunk_size < mtd->oobsize) {
+	if (geo->ecc_chunkn_size < mtd->oobsize) {
 		geo->gf_len = 14;
-		geo->ecc_chunk_size *= 2;
+		geo->ecc_chunk0_size *= 2;
+		geo->ecc_chunkn_size *= 2;
 	}
 
-	if (mtd->oobsize > geo->ecc_chunk_size) {
-		printf("Not support the NAND chips whose oob size is larger then %d bytes!\n",
-		       geo->ecc_chunk_size);
-		return -EINVAL;
-	}
-
-	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
+	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size;
 
 	/*
 	 * Determine the ECC layout with the formula:
@@ -234,6 +223,84 @@ static inline int mxs_nand_calc_ecc_layout(struct bch_geometry *geo,
 	geo->ecc_strength = min(round_down(geo->ecc_strength, 2),
 				nand_info->max_ecc_strength_supported);
 
+	block_mark_bit_offset = mtd->writesize * 8 -
+		(geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
+				+ MXS_NAND_METADATA_SIZE * 8);
+
+	geo->block_mark_byte_offset = block_mark_bit_offset / 8;
+	geo->block_mark_bit_offset  = block_mark_bit_offset % 8;
+
+	return 0;
+}
+
+static inline int mxs_nand_calc_ecc_for_large_oob(struct bch_geometry *geo,
+					   struct mtd_info *mtd)
+{
+	struct nand_chip *chip = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
+	unsigned int block_mark_bit_offset;
+	unsigned int max_ecc;
+	unsigned int bbm_chunk;
+	unsigned int i;
+
+	/* sanity check for the minimum ecc nand required */
+	if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
+		return -EINVAL;
+	geo->ecc_strength = chip->ecc_strength_ds;
+
+	/* calculate the maximum ecc platform can support*/
+	geo->gf_len = 14;
+	geo->ecc_chunk0_size = 1024;
+	geo->ecc_chunkn_size = 1024;
+	geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunkn_size;
+	max_ecc = ((mtd->oobsize - MXS_NAND_METADATA_SIZE) * 8)
+			/ (geo->gf_len * geo->ecc_chunk_count);
+	max_ecc = min(round_down(max_ecc, 2),
+				nand_info->max_ecc_strength_supported);
+
+
+	/* search a supported ecc strength that makes bbm */
+	/* located in data chunk  */
+	geo->ecc_strength = chip->ecc_strength_ds;
+	while (!(geo->ecc_strength > max_ecc)) {
+		if (mxs_nand_bbm_in_data_chunk(geo, mtd, &bbm_chunk))
+			break;
+		geo->ecc_strength += 2;
+	}
+
+	/* if none of them works, keep using the minimum ecc */
+	/* nand required but changing ecc page layout  */
+	if (geo->ecc_strength > max_ecc) {
+		geo->ecc_strength = chip->ecc_strength_ds;
+		/* add extra ecc for meta data */
+		geo->ecc_chunk0_size = 0;
+		geo->ecc_chunk_count = (mtd->writesize / geo->ecc_chunkn_size) + 1;
+		geo->ecc_for_meta = 1;
+		/* check if oob can afford this extra ecc chunk */
+		if (mtd->oobsize * 8 < MXS_NAND_METADATA_SIZE * 8 +
+				geo->gf_len * geo->ecc_strength
+				* geo->ecc_chunk_count) {
+			printf("unsupported NAND chip with new layout\n");
+			return -EINVAL;
+		}
+
+		/* calculate in which chunk bbm located */
+		bbm_chunk = (mtd->writesize * 8 - MXS_NAND_METADATA_SIZE * 8 -
+			geo->gf_len * geo->ecc_strength) /
+			(geo->gf_len * geo->ecc_strength +
+					geo->ecc_chunkn_size * 8) + 1;
+	}
+
+	/* calculate the number of ecc chunk behind the bbm */
+	i = (mtd->writesize / geo->ecc_chunkn_size) - bbm_chunk + 1;
+
+	block_mark_bit_offset = mtd->writesize * 8 -
+		(geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - i)
+				+ MXS_NAND_METADATA_SIZE * 8);
+
+	geo->block_mark_byte_offset = block_mark_bit_offset / 8;
+	geo->block_mark_bit_offset  = block_mark_bit_offset % 8;
+
 	return 0;
 }
 
@@ -548,6 +615,45 @@ static uint8_t mxs_nand_read_byte(struct mtd_info *mtd)
 	return buf;
 }
 
+static bool mxs_nand_erased_page(struct mtd_info *mtd, struct nand_chip *nand,
+				 u8 *buf, int chunk, int page)
+{
+	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+	struct bch_geometry *geo = &nand_info->bch_geometry;
+	unsigned int flip_bits = 0, flip_bits_noecc = 0;
+	unsigned int threshold;
+	unsigned int base = geo->ecc_chunkn_size * chunk;
+	u32 *dma_buf = (u32 *)buf;
+	int i;
+
+	threshold = geo->gf_len / 2;
+	if (threshold > geo->ecc_strength)
+		threshold = geo->ecc_strength;
+
+	for (i = 0; i < geo->ecc_chunkn_size; i++) {
+		flip_bits += hweight8(~buf[base + i]);
+		if (flip_bits > threshold)
+			return false;
+	}
+
+	nand->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
+	nand->read_buf(mtd, buf, mtd->writesize);
+
+	for (i = 0; i < mtd->writesize / 4; i++) {
+		flip_bits_noecc += hweight32(~dma_buf[i]);
+		if (flip_bits_noecc > threshold)
+			return false;
+	}
+
+	mtd->ecc_stats.corrected += flip_bits;
+
+	memset(buf, 0xff, mtd->writesize);
+
+	printf("The page(%d) is an erased page(%d,%d,%d,%d).\n", page, chunk, threshold, flip_bits, flip_bits_noecc);
+
+	return true;
+}
+
 /*
  * Read a page from NAND.
  */
@@ -557,11 +663,13 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 {
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
 	struct bch_geometry *geo = &nand_info->bch_geometry;
+	struct mxs_bch_regs *bch_regs = nand_info->bch_regs;
 	struct mxs_dma_desc *d;
 	uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
 	uint32_t corrected = 0, failed = 0;
 	uint8_t	*status;
 	int i, ret;
+	int flag = 0;
 
 	/* Compile the DMA descriptor - wait for ready. */
 	d = mxs_nand_get_dma_desc(nand_info);
@@ -603,6 +711,12 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 	d->cmd.pio_words[4] = (dma_addr_t)nand_info->data_buf;
 	d->cmd.pio_words[5] = (dma_addr_t)nand_info->oob_buf;
 
+	if (nand_info->en_randomizer) {
+		d->cmd.pio_words[2] |= GPMI_ECCCTRL_RANDOMIZER_ENABLE |
+				       GPMI_ECCCTRL_RANDOMIZER_TYPE2;
+		d->cmd.pio_words[3] |= (page % 256) << 16;
+	}
+
 	mxs_dma_desc_append(channel, d);
 
 	/* Compile the DMA descriptor - disable the BCH block. */
@@ -651,6 +765,8 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 		goto rtn;
 	}
 
+	mxs_nand_return_dma_descs(nand_info);
+
 	/* Invalidate caches */
 	mxs_nand_inval_data_buf(nand_info);
 
@@ -663,10 +779,19 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 		if (status[i] == 0x00)
 			continue;
 
-		if (status[i] == 0xff)
+		if (status[i] == 0xff) {
+			if (!nand_info->en_randomizer &&
+			    (is_mx6dqp() || is_mx7() || is_mx6ul() ||
+			     is_imx8() || is_imx8m()))
+				if (readl(&bch_regs->hw_bch_debug1))
+					flag = 1;
 			continue;
+		}
 
 		if (status[i] == 0xfe) {
+			if (mxs_nand_erased_page(mtd, nand,
+						 nand_info->data_buf, i, page))
+				break;
 			failed++;
 			continue;
 		}
@@ -693,6 +818,8 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
 
 	memcpy(buf, nand_info->data_buf, mtd->writesize);
 
+	if (flag)
+		memset(buf, 0xff, mtd->writesize);
 rtn:
 	mxs_nand_return_dma_descs(nand_info);
 
@@ -741,7 +868,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
 	d->cmd.pio_words[4] = (dma_addr_t)nand_info->data_buf;
 	d->cmd.pio_words[5] = (dma_addr_t)nand_info->oob_buf;
 
-	if (is_mx7() && nand_info->en_randomizer) {
+	if (nand_info->en_randomizer) {
 		d->cmd.pio_words[2] |= GPMI_ECCCTRL_RANDOMIZER_ENABLE |
 				       GPMI_ECCCTRL_RANDOMIZER_TYPE2;
 		/*
@@ -751,7 +878,7 @@ static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
 		 * The value is between 0-255. For additional details
 		 * check 9.6.6.4 of i.MX7D Applications Processor reference
 		 */
-		d->cmd.pio_words[3] |= (page % 255) << 16;
+		d->cmd.pio_words[3] |= (page % 256) << 16;
 	}
 
 	mxs_dma_desc_append(channel, d);
@@ -983,18 +1110,23 @@ static int mxs_nand_set_geometry(struct mtd_info *mtd, struct bch_geometry *geo)
 	struct nand_chip *nand = mtd_to_nand(mtd);
 	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
 
-	if (chip->ecc.strength > 0 && chip->ecc.size > 0)
-		return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
-				chip->ecc.strength, chip->ecc.size);
+	if (chip->ecc_strength_ds > nand_info->max_ecc_strength_supported) {
+		printf("unsupported NAND chip, minimum ecc required %d\n"
+			, chip->ecc_strength_ds);
+		return -EINVAL;
+	}
 
-	if (nand_info->use_minimum_ecc ||
-		mxs_nand_calc_ecc_layout(geo, mtd)) {
-		if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
-			return -EINVAL;
+	if ((!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0) &&
+	     mtd->oobsize < 1024) || nand_info->legacy_bch_geometry) {
+		dev_warn(this->dev, "use legacy bch geometry\n");
+		return mxs_nand_legacy_calc_ecc_layout(geo, mtd);
+	}
+
+	if (mtd->oobsize > 1024 || chip->ecc_step_ds < mtd->oobsize)
+		return mxs_nand_calc_ecc_for_large_oob(geo, mtd);
 
-		return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
+	return mxs_nand_calc_ecc_layout_by_info(geo, mtd,
 				chip->ecc_strength_ds, chip->ecc_step_ds);
-	}
 
 	return 0;
 }
@@ -1025,8 +1157,6 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	if (ret)
 		return ret;
 
-	mxs_nand_calc_mark_offset(geo, mtd->writesize);
-
 	/* Configure BCH and set NFC geometry */
 	mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
 
@@ -1034,7 +1164,7 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	tmp = (geo->ecc_chunk_count - 1) << BCH_FLASHLAYOUT0_NBLOCKS_OFFSET;
 	tmp |= MXS_NAND_METADATA_SIZE << BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
 	tmp |= (geo->ecc_strength >> 1) << BCH_FLASHLAYOUT0_ECC0_OFFSET;
-	tmp |= geo->ecc_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
+	tmp |= geo->ecc_chunk0_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
 	tmp |= (geo->gf_len == 14 ? 1 : 0) <<
 		BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET;
 	writel(tmp, &bch_regs->hw_bch_flash0layout0);
@@ -1043,12 +1173,18 @@ int mxs_nand_setup_ecc(struct mtd_info *mtd)
 	tmp = (mtd->writesize + mtd->oobsize)
 		<< BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
 	tmp |= (geo->ecc_strength >> 1) << BCH_FLASHLAYOUT1_ECCN_OFFSET;
-	tmp |= geo->ecc_chunk_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
+	tmp |= geo->ecc_chunkn_size >> MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT;
 	tmp |= (geo->gf_len == 14 ? 1 : 0) <<
 		BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET;
 	writel(tmp, &bch_regs->hw_bch_flash0layout1);
 	nand_info->bch_flash0layout1 = tmp;
 
+	/* Set erase threshold to ecc strength for mx6ul, mx6qp and mx7 */
+	if (is_mx6dqp() || is_mx7() ||
+	    is_mx6ul() || is_imx8() || is_imx8m())
+		writel(BCH_MODE_ERASE_THRESHOLD(geo->ecc_strength),
+		       &bch_regs->hw_bch_mode);
+
 	/* Set *all* chip selects to use layout 0 */
 	writel(0, &bch_regs->hw_bch_layoutselect);
 
@@ -1184,7 +1320,7 @@ int mxs_nand_init_spl(struct nand_chip *nand)
 	nand_info->gpmi_regs = (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
 	nand_info->bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
 
-	if (is_mx6sx() || is_mx7())
+	if (is_mx6sx() || is_mx7() || is_imx8() || is_imx8m())
 		nand_info->max_ecc_strength_supported = 62;
 	else
 		nand_info->max_ecc_strength_supported = 40;
@@ -1268,7 +1404,7 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info)
 
 	nand->ecc.layout	= &fake_ecc_layout;
 	nand->ecc.mode		= NAND_ECC_HW;
-	nand->ecc.size		= nand_info->bch_geometry.ecc_chunk_size;
+	nand->ecc.size		= nand_info->bch_geometry.ecc_chunkn_size;
 	nand->ecc.strength	= nand_info->bch_geometry.ecc_strength;
 
 	/* second phase scan */
@@ -1347,12 +1483,14 @@ void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l)
 			BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET);
 	l->eccn = (tmp & BCH_FLASHLAYOUT1_ECCN_MASK) >>
 			BCH_FLASHLAYOUT1_ECCN_OFFSET;
+	l->gf_len = (tmp & BCH_FLASHLAYOUT1_GF13_0_GF14_1_MASK) >>
+		     BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET;
 }
 
 /*
  * Set BCH to specific layout used by ROM bootloader to read FCB.
  */
-void mxs_nand_mode_fcb(struct mtd_info *mtd)
+void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd)
 {
 	u32 tmp;
 	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
@@ -1386,6 +1524,43 @@ void mxs_nand_mode_fcb(struct mtd_info *mtd)
 }
 
 /*
+ * Set BCH to specific layout used by ROM bootloader to read FCB.
+ */
+void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd)
+{
+	u32 tmp;
+	struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
+	struct nand_chip *nand = mtd_to_nand(mtd);
+	struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
+
+	/* no randomizer in this setting*/
+	nand_info->en_randomizer = 0;
+
+	mtd->writesize = 1024;
+	mtd->oobsize = 1576 - 1024;
+
+	/* 8 ecc_chunks_*/
+	tmp = 7	<< BCH_FLASHLAYOUT0_NBLOCKS_OFFSET;
+	/* 32 bytes for metadata */
+	tmp |= 32 << BCH_FLASHLAYOUT0_META_SIZE_OFFSET;
+	/* using ECC40 level to be performed */
+	tmp |= 0x14 << BCH_FLASHLAYOUT0_ECC0_OFFSET;
+	/* 0x20 * 4 bytes of the data0 block */
+	tmp |= 0x20 << BCH_FLASHLAYOUT0_DATA0_SIZE_OFFSET;
+	tmp |= 0 << BCH_FLASHLAYOUT0_GF13_0_GF14_1_OFFSET;
+	writel(tmp, &bch_regs->hw_bch_flash0layout0);
+
+	/* 1024 for data + 552 for OOB */
+	tmp = 1576 << BCH_FLASHLAYOUT1_PAGE_SIZE_OFFSET;
+	/* using ECC40 level to be performed */
+	tmp |= 0x14 << BCH_FLASHLAYOUT1_ECCN_OFFSET;
+	/* 0x20 * 4 bytes of the data0 block */
+	tmp |= 0x20 << BCH_FLASHLAYOUT1_DATAN_SIZE_OFFSET;
+	tmp |= 0 << BCH_FLASHLAYOUT1_GF13_0_GF14_1_OFFSET;
+	writel(tmp, &bch_regs->hw_bch_flash0layout1);
+}
+
+/*
  * Restore BCH to normal settings.
  */
 void mxs_nand_mode_normal(struct mtd_info *mtd)
diff --git a/drivers/mtd/nand/raw/mxs_nand_dt.c b/drivers/mtd/nand/raw/mxs_nand_dt.c
index 8ad7d618c6..43dbe9e66e 100644
--- a/drivers/mtd/nand/raw/mxs_nand_dt.c
+++ b/drivers/mtd/nand/raw/mxs_nand_dt.c
@@ -2,6 +2,8 @@
  * NXP GPMI NAND flash driver (DT initialization)
  *
  * Copyright (C) 2018 Toradex
+ * Copyright 2019 NXP
+ *
  * Authors:
  * Stefan Agner <stefan.agner@toradex.com>
  *
@@ -14,6 +16,7 @@
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <linux/printk.h>
+#include <clk.h>
 
 #include <mxs_nand.h>
 
@@ -25,19 +28,39 @@ static const struct mxs_nand_dt_data mxs_nand_imx6q_data = {
 	.max_ecc_strength_supported = 40,
 };
 
+static const struct mxs_nand_dt_data mxs_nand_imx6sx_data = {
+	.max_ecc_strength_supported = 62,
+};
+
 static const struct mxs_nand_dt_data mxs_nand_imx7d_data = {
 	.max_ecc_strength_supported = 62,
 };
 
+static const struct mxs_nand_dt_data mxs_nand_imx8qxp_data = {
+	.max_ecc_strength_supported = 62,
+};
+
 static const struct udevice_id mxs_nand_dt_ids[] = {
 	{
 		.compatible = "fsl,imx6q-gpmi-nand",
 		.data = (unsigned long)&mxs_nand_imx6q_data,
 	},
 	{
+		.compatible = "fsl,imx6qp-gpmi-nand",
+		.data = (unsigned long)&mxs_nand_imx6q_data,
+	},
+	{
+		.compatible = "fsl,imx6sx-gpmi-nand",
+		.data = (unsigned long)&mxs_nand_imx6sx_data,
+	},
+	{
 		.compatible = "fsl,imx7d-gpmi-nand",
 		.data = (unsigned long)&mxs_nand_imx7d_data,
 	},
+	{
+		.compatible = "fsl,imx8qxp-gpmi-nand",
+		.data = (unsigned long)&mxs_nand_imx8qxp_data,
+	},
 	{ /* sentinel */ }
 };
 
@@ -69,6 +92,74 @@ static int mxs_nand_dt_probe(struct udevice *dev)
 
 	info->use_minimum_ecc = dev_read_bool(dev, "fsl,use-minimum-ecc");
 
+	info->legacy_bch_geometry = dev_read_bool(dev, "fsl,legacy-bch-geometry");
+
+	if (IS_ENABLED(CONFIG_CLK) && IS_ENABLED(CONFIG_IMX8)) {
+		/* Assigned clock already set clock */
+		struct clk gpmi_clk;
+
+		ret = clk_get_by_name(dev, "gpmi_io", &gpmi_clk);
+		if (ret < 0) {
+			debug("Can't get gpmi io clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_enable(&gpmi_clk);
+		if (ret < 0) {
+			debug("Can't enable gpmi io clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_get_by_name(dev, "gpmi_apb", &gpmi_clk);
+		if (ret < 0) {
+			debug("Can't get gpmi_apb clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_enable(&gpmi_clk);
+		if (ret < 0) {
+			debug("Can't enable gpmi_apb clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_get_by_name(dev, "gpmi_bch", &gpmi_clk);
+		if (ret < 0) {
+			debug("Can't get gpmi_bch clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_enable(&gpmi_clk);
+		if (ret < 0) {
+			debug("Can't enable gpmi_bch clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_get_by_name(dev, "gpmi_apb_bch", &gpmi_clk);
+		if (ret < 0) {
+			debug("Can't get gpmi_apb_bch clk: %d\n", ret);
+			return ret;
+		}
+
+		ret = clk_enable(&gpmi_clk);
+		if (ret < 0) {
+			debug("Can't enable gpmi_apb_bch clk: %d\n", ret);
+			return ret;
+		}
+
+		/* this clock is used for apbh_dma, since the apbh dma does not support DM,
+		  * we optionally enable it here
+		  */
+		ret = clk_get_by_name(dev, "gpmi_apbh_dma", &gpmi_clk);
+		if (ret < 0) {
+			debug("Can't get gpmi_apbh_dma clk: %d\n", ret);
+		} else {
+			ret = clk_enable(&gpmi_clk);
+			if (ret < 0) {
+				debug("Can't enable gpmi_apbh_dma clk: %d\n", ret);
+			}
+		}
+	}
+
 	return mxs_nand_init_ctrl(info);
 }
 
diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c
index a653dfa5ed..46dc29df36 100644
--- a/drivers/mtd/nand/raw/mxs_nand_spl.c
+++ b/drivers/mtd/nand/raw/mxs_nand_spl.c
@@ -1,12 +1,17 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2014 Gateworks Corporation
+ * Copyright 2019 NXP
  * Author: Tim Harvey <tharvey@gateworks.com>
  */
 #include <common.h>
+#include <log.h>
 #include <nand.h>
 #include <malloc.h>
 #include <mxs_nand.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 static struct mtd_info *mtd;
@@ -38,6 +43,12 @@ static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
 	if (command == NAND_CMD_READ0) {
 		chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
 		chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
+	} else if (command == NAND_CMD_RNDOUT) {
+		/* No ready / busy check necessary */
+		chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART,
+			       NAND_NCE | NAND_CLE);
+		chip->cmd_ctrl(mtd, NAND_CMD_NONE,
+			       NAND_NCE);
 	}
 
 	/* wait for nand ready */
@@ -212,23 +223,39 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
 	unsigned int page;
 	unsigned int nand_page_per_block;
 	unsigned int sz = 0;
+	u8 *page_buf = NULL;
+	u32 page_off;
 
 	chip = mtd_to_nand(mtd);
 	if (!chip->numchips)
 		return -ENODEV;
+
+	page_buf = malloc(mtd->writesize);
+	if (!page_buf)
+		return -ENOMEM;
+
 	page = offs >> chip->page_shift;
+	page_off = offs & (mtd->writesize - 1);
 	nand_page_per_block = mtd->erasesize / mtd->writesize;
 
-	debug("%s offset:0x%08x len:%d page:%d\n", __func__, offs, size, page);
+	debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page);
 
-	size = roundup(size, mtd->writesize);
-	while (sz < size) {
-		if (mxs_read_page_ecc(mtd, buf, page) < 0)
+	while (size) {
+		if (mxs_read_page_ecc(mtd, page_buf, page) < 0)
 			return -1;
-		sz += mtd->writesize;
+
+		if (size > (mtd->writesize - page_off))
+			sz = (mtd->writesize - page_off);
+		else
+			sz = size;
+
+		memcpy(buf, page_buf + page_off, sz);
+
 		offs += mtd->writesize;
 		page++;
-		buf += mtd->writesize;
+		buf += (mtd->writesize - page_off);
+		page_off = 0;
+		size -= sz;
 
 		/*
 		 * Check if we have crossed a block boundary, and if so
@@ -242,12 +269,16 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
 			while (is_badblock(mtd, offs, 1)) {
 				page = page + nand_page_per_block;
 				/* Check i we've reached the end of flash. */
-				if (page >= mtd->size >> chip->page_shift)
+				if (page >= mtd->size >> chip->page_shift) {
+					free(page_buf);
 					return -ENOMEM;
+				}
 			}
 		}
 	}
 
+	free(page_buf);
+
 	return 0;
 }
 
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 49d5e261b5..698968bc11 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -32,9 +32,13 @@
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 #include <fdtdec.h>
 #endif
+#include <log.h>
 #include <malloc.h>
 #include <watchdog.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/nand/raw/nand_bbt.c b/drivers/mtd/nand/raw/nand_bbt.c
index a6e6e0ef6d..911472e91e 100644
--- a/drivers/mtd/nand/raw/nand_bbt.c
+++ b/drivers/mtd/nand/raw/nand_bbt.c
@@ -58,8 +58,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/bbm.h>
diff --git a/drivers/mtd/nand/raw/nand_bch.c b/drivers/mtd/nand/raw/nand_bch.c
index 11a22e021d..734d1c6204 100644
--- a/drivers/mtd/nand/raw/nand_bch.c
+++ b/drivers/mtd/nand/raw/nand_bch.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <dm/devres.h>
 /*#include <asm/io.h>*/
 #include <linux/types.h>
diff --git a/drivers/mtd/nand/raw/nand_util.c b/drivers/mtd/nand/raw/nand_util.c
index f3c8f7f2cb..5b74ef0dfd 100644
--- a/drivers/mtd/nand/raw/nand_util.c
+++ b/drivers/mtd/nand/raw/nand_util.c
@@ -20,10 +20,12 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <watchdog.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <div64.h>
+#include <asm/cache.h>
 #include <dm/devres.h>
 
 #include <linux/errno.h>
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 6a050501b0..97fd5690f5 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <asm/arch/mem.h>
diff --git a/drivers/mtd/nand/raw/pxa3xx_nand.c b/drivers/mtd/nand/raw/pxa3xx_nand.c
index 7e3346dfcc..a30e82166b 100644
--- a/drivers/mtd/nand/raw/pxa3xx_nand.c
+++ b/drivers/mtd/nand/raw/pxa3xx_nand.c
@@ -12,6 +12,9 @@
 #include <nand.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <asm/io.h>
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 1c212daa1d..3306bd8ac9 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -7,8 +7,11 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <nand.h>
 #include <reset.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/iopoll.h>
 #include <linux/ioport.h>
diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c
index 9b99be10e6..004b6f17a5 100644
--- a/drivers/mtd/nand/raw/sunxi_nand.c
+++ b/drivers/mtd/nand/raw/sunxi_nand.c
@@ -31,6 +31,8 @@
 #include <nand.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #include <linux/kernel.h>
diff --git a/drivers/mtd/nand/raw/sunxi_nand_spl.c b/drivers/mtd/nand/raw/sunxi_nand_spl.c
index 6cde9814c4..85d8013b1a 100644
--- a/drivers/mtd/nand/raw/sunxi_nand_spl.c
+++ b/drivers/mtd/nand/raw/sunxi_nand_spl.c
@@ -9,7 +9,9 @@
 #include <common.h>
 #include <config.h>
 #include <nand.h>
+#include <linux/bitops.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 
 /* registers */
 #define NFC_CTL                    0x00000000
diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c
index ae699d1da5..b9f5bdd953 100644
--- a/drivers/mtd/nand/raw/tegra_nand.c
+++ b/drivers/mtd/nand/raw/tegra_nand.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <memalign.h>
 #include <nand.h>
@@ -14,6 +15,8 @@
 #include <asm/arch/funcmux.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <dm/device_compat.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <fdtdec.h>
diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c
index 0aea83dac0..fa59455210 100644
--- a/drivers/mtd/nand/raw/zynq_nand.c
+++ b/drivers/mtd/nand/raw/zynq_nand.c
@@ -7,8 +7,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <nand.h>
 #include <linux/ioport.h>
@@ -845,7 +847,7 @@ static void zynq_nand_cmd_function(struct mtd_info *mtd, unsigned int command,
 	if (curr_cmd->end_cmd_valid == ZYNQ_NAND_CMD_PHASE)
 		end_cmd_valid = 1;
 
-	if (curr_cmd->end_cmd == NAND_CMD_NONE)
+	if (curr_cmd->end_cmd == (u8)NAND_CMD_NONE)
 		end_cmd = 0x0;
 	else
 		end_cmd = curr_cmd->end_cmd;
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index dd6bacae34..6c65b187e8 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0
 
-spinand-objs := core.o gigadevice.o macronix.o micron.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o toshiba.o winbond.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index cd624ec6ae..93371fdde0 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -26,6 +26,8 @@
 #include <spi-mem.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/mtd/spinand.h>
 #endif
 
@@ -835,6 +837,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 	&gigadevice_spinand_manufacturer,
 	&macronix_spinand_manufacturer,
 	&micron_spinand_manufacturer,
+	&toshiba_spinand_manufacturer,
 	&winbond_spinand_manufacturer,
 };
 
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
index 67d092be2c..215f09acc3 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
@@ -10,6 +10,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #endif
+#include <linux/bug.h>
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_MACRONIX		0xC2
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
index 687306e33e..04de51cb46 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -11,6 +11,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #endif
+#include <linux/bitops.h>
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_MICRON		0x2c
diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
new file mode 100644
index 0000000000..c2cd3b426b
--- /dev/null
+++ b/drivers/mtd/nand/spi/toshiba.c
@@ -0,0 +1,289 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018 exceet electronics GmbH
+ * Copyright (c) 2018 Kontron Electronics GmbH
+ *
+ * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
+ */
+
+#ifndef __UBOOT__
+#include <malloc.h>
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/bug.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_TOSHIBA		0x98
+#define TOSH_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_x4_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_x4_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+/**
+ * Backward compatibility for 1st generation Serial NAND devices
+ * which don't support Quad Program Load operation.
+ */
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
+				     struct mtd_oob_region *region)
+{
+	if (section > 0)
+		return -ERANGE;
+
+	region->offset = mtd->oobsize / 2;
+	region->length = mtd->oobsize / 2;
+
+	return 0;
+}
+
+static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
+				      struct mtd_oob_region *region)
+{
+	if (section > 0)
+		return -ERANGE;
+
+	/* 2 bytes reserved for BBM */
+	region->offset = 2;
+	region->length = (mtd->oobsize / 2) - 2;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
+	.ecc = tx58cxgxsxraix_ooblayout_ecc,
+	.rfree = tx58cxgxsxraix_ooblayout_free,
+};
+
+static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
+				      u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+	u8 mbf = 0;
+	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+	case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
+		/*
+		 * Let's try to retrieve the real maximum number of bitflips
+		 * in order to avoid forcing the wear-leveling layer to move
+		 * data around if it's not necessary.
+		 */
+		if (spi_mem_exec_op(spinand->slave, &op))
+			return nand->eccreq.strength;
+
+		mbf >>= 4;
+
+		if (WARN_ON(mbf > nand->eccreq.strength || !mbf))
+			return nand->eccreq.strength;
+
+		return mbf;
+
+	default:
+		break;
+	}
+
+	return -EINVAL;
+}
+
+static const struct spinand_info toshiba_spinand_table[] = {
+	/* 3.3V 1Gb (1st generation) */
+	SPINAND_INFO("TC58CVG0S3HRAIG", 0xC2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 3.3V 2Gb (1st generation) */
+	SPINAND_INFO("TC58CVG1S3HRAIG", 0xCB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 3.3V 4Gb (1st generation) */
+	SPINAND_INFO("TC58CVG2S0HRAIG", 0xCD,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 1Gb (1st generation) */
+	SPINAND_INFO("TC58CYG0S3HRAIG", 0xB2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 2Gb (1st generation) */
+	SPINAND_INFO("TC58CYG1S3HRAIG", 0xBB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 4Gb (1st generation) */
+	SPINAND_INFO("TC58CYG2S0HRAIG", 0xBD,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     0,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+
+	/*
+	 * 2nd generation serial nand has HOLD_D which is equivalent to
+	 * QE_BIT.
+	 */
+	/* 3.3V 1Gb (2nd generation) */
+	SPINAND_INFO("TC58CVG0S3HRAIJ", 0xE2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 3.3V 2Gb (2nd generation) */
+	SPINAND_INFO("TC58CVG1S3HRAIJ", 0xEB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 3.3V 4Gb (2nd generation) */
+	SPINAND_INFO("TC58CVG2S0HRAIJ", 0xED,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 3.3V 8Gb (2nd generation) */
+	SPINAND_INFO("TH58CVG3S0HRAIJ", 0xE4,
+		     NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 1Gb (2nd generation) */
+	SPINAND_INFO("TC58CYG0S3HRAIJ", 0xD2,
+		     NAND_MEMORG(1, 2048, 128, 64, 1024, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 2Gb (2nd generation) */
+	SPINAND_INFO("TC58CYG1S3HRAIJ", 0xDB,
+		     NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 4Gb (2nd generation) */
+	SPINAND_INFO("TC58CYG2S0HRAIJ", 0xDD,
+		     NAND_MEMORG(1, 4096, 256, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+	/* 1.8V 8Gb (2nd generation) */
+	SPINAND_INFO("TH58CYG3S0HRAIJ", 0xD4,
+		     NAND_MEMORG(1, 4096, 256, 64, 4096, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_x4_variants,
+					      &update_cache_x4_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
+				     tx58cxgxsxraix_ecc_get_status)),
+};
+
+static int toshiba_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * Toshiba SPI NAND read ID needs a dummy byte,
+	 * so the first byte in id is garbage.
+	 */
+	if (id[1] != SPINAND_MFR_TOSHIBA)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, toshiba_spinand_table,
+				     ARRAY_SIZE(toshiba_spinand_table),
+				     id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
+	.detect = toshiba_spinand_detect,
+};
+
+const struct spinand_manufacturer toshiba_spinand_manufacturer = {
+	.id = SPINAND_MFR_TOSHIBA,
+	.name = "Toshiba",
+	.ops = &toshiba_spinand_manuf_ops,
+};
diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
index 6ede98c85d..c119486efb 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
@@ -12,6 +12,7 @@
 #include <linux/device.h>
 #include <linux/kernel.h>
 #endif
+#include <linux/bitops.h>
 #include <linux/mtd/spinand.h>
 
 #define SPINAND_MFR_WINBOND		0xEF
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 693bb78b87..36daef01ae 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -20,8 +20,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <watchdog.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include "linux/mtd/flashchip.h"
diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c
index cde342aaec..eca9edff60 100644
--- a/drivers/mtd/onenand/onenand_bbt.c
+++ b/drivers/mtd/onenand/onenand_bbt.c
@@ -15,6 +15,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/onenand.h>
diff --git a/drivers/mtd/onenand/onenand_spl.c b/drivers/mtd/onenand/onenand_spl.c
index c4983d15d5..ab6f1a8be3 100644
--- a/drivers/mtd/onenand/onenand_spl.c
+++ b/drivers/mtd/onenand/onenand_spl.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/mtd/onenand_regs.h>
 #include <onenand_uboot.h>
 
diff --git a/drivers/mtd/pic32_flash.c b/drivers/mtd/pic32_flash.c
index 8fff818e42..a58a2c4b6c 100644
--- a/drivers/mtd/pic32_flash.c
+++ b/drivers/mtd/pic32_flash.c
@@ -10,7 +10,9 @@
 #include <dm.h>
 #include <fdt_support.h>
 #include <flash.h>
+#include <init.h>
 #include <irq_func.h>
+#include <linux/bitops.h>
 #include <mach/pic32.h>
 #include <wait_bit.h>
 
diff --git a/drivers/mtd/renesas_rpc_hf.c b/drivers/mtd/renesas_rpc_hf.c
index fc2aa22d7f..65320c7ed9 100644
--- a/drivers/mtd/renesas_rpc_hf.c
+++ b/drivers/mtd/renesas_rpc_hf.c
@@ -19,6 +19,7 @@
 #include <flash.h>
 #include <mtd.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 #include <mtd/cfi_flash.h>
 
 #define RPC_CMNCR		0x0000	/* R/W */
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 084c66e984..8cbe97ee20 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <os.h>
diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c
index 5ebcca590a..9ce2ecb99a 100644
--- a/drivers/mtd/spi/sf-uclass.c
+++ b/drivers/mtd/spi/sf-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi_flash.h>
@@ -29,15 +30,6 @@ int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len)
 	return log_ret(sf_get_ops(dev)->erase(dev, offset, len));
 }
 
-int spl_flash_get_sw_write_prot(struct udevice *dev)
-{
-	struct dm_spi_flash_ops *ops = sf_get_ops(dev);
-
-	if (!ops->get_sw_write_prot)
-		return -ENOSYS;
-	return log_ret(ops->get_sw_write_prot(dev));
-}
-
 /*
  * TODO(sjg@chromium.org): This is an old-style function. We should remove
  * it when all SPI flash drivers use dm
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c
index 55fb4bd31a..27d847d421 100644
--- a/drivers/mtd/spi/sf_dataflash.c
+++ b/drivers/mtd/spi/sf_dataflash.c
@@ -10,9 +10,12 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <flash.h>
+#include <log.h>
 #include <spi.h>
 #include <spi_flash.h>
 #include <div64.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/math64.h>
 
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 940b2e4c9e..dabd40a4cc 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -9,6 +9,7 @@
 #ifndef _SF_INTERNAL_H_
 #define _SF_INTERNAL_H_
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 #include <linux/compiler.h>
 
@@ -74,12 +75,18 @@ extern const struct flash_info spi_nor_ids[];
 #define JEDEC_MFR(info)	((info)->id[0])
 #define JEDEC_ID(info)		(((info)->id[1]) << 8 | ((info)->id[2]))
 
-/* Get software write-protect value (BP bits) */
-int spi_flash_cmd_get_sw_write_prot(struct spi_flash *flash);
-
-
 #if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
 int spi_flash_mtd_register(struct spi_flash *flash);
 void spi_flash_mtd_unregister(void);
+#else
+static inline int spi_flash_mtd_register(struct spi_flash *flash)
+{
+	return 0;
+}
+
+static inline void spi_flash_mtd_unregister(void)
+{
+}
 #endif
+
 #endif /* _SF_INTERNAL_H_ */
diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c
index 68c36002be..987fac2501 100644
--- a/drivers/mtd/spi/sf_mtd.c
+++ b/drivers/mtd/spi/sf_mtd.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <malloc.h>
 #include <linux/errno.h>
 #include <linux/mtd/mtd.h>
diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c
index 72b6ee702d..3548d6319b 100644
--- a/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi_flash.h>
@@ -44,9 +45,8 @@ static int spi_flash_probe_slave(struct spi_flash *flash)
 	if (ret)
 		goto err_read_id;
 
-#if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
-	ret = spi_flash_mtd_register(flash);
-#endif
+	if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
+		ret = spi_flash_mtd_register(flash);
 
 err_read_id:
 	spi_release_bus(spi);
@@ -83,9 +83,9 @@ struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
 
 void spi_flash_free(struct spi_flash *flash)
 {
-#if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
-	spi_flash_mtd_unregister();
-#endif
+	if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
+		spi_flash_mtd_unregister();
+
 	spi_free_slave(flash->spi);
 	free(flash);
 }
@@ -130,31 +130,22 @@ static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
 	return mtd->_erase(mtd, &instr);
 }
 
-static int spi_flash_std_get_sw_write_prot(struct udevice *dev)
-{
-	struct spi_flash *flash = dev_get_uclass_priv(dev);
-
-	return spi_flash_cmd_get_sw_write_prot(flash);
-}
-
 int spi_flash_std_probe(struct udevice *dev)
 {
 	struct spi_slave *slave = dev_get_parent_priv(dev);
-	struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
 	struct spi_flash *flash;
 
 	flash = dev_get_uclass_priv(dev);
 	flash->dev = dev;
 	flash->spi = slave;
-	debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
 	return spi_flash_probe_slave(flash);
 }
 
 static int spi_flash_std_remove(struct udevice *dev)
 {
-#if CONFIG_IS_ENABLED(SPI_FLASH_MTD)
-	spi_flash_mtd_unregister();
-#endif
+	if (CONFIG_IS_ENABLED(SPI_FLASH_MTD))
+		spi_flash_mtd_unregister();
+
 	return 0;
 }
 
@@ -162,7 +153,6 @@ static const struct dm_spi_flash_ops spi_flash_std_ops = {
 	.read = spi_flash_std_read,
 	.write = spi_flash_std_write,
 	.erase = spi_flash_std_erase,
-	.get_sw_write_prot = spi_flash_std_get_sw_write_prot,
 };
 
 static const struct udevice_id spi_flash_std_ids[] = {
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 7b6ad495ac..1e3f51d2ac 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -10,8 +10,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/log2.h>
@@ -56,8 +58,7 @@ static int spi_nor_read_reg(struct spi_nor *nor, u8 code, u8 *val, int len)
 
 	ret = spi_nor_read_write_reg(nor, &op, val);
 	if (ret < 0)
-		dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
-			code);
+		dev_dbg(nor->dev, "error %d reading %x\n", ret, code);
 
 	return ret;
 }
@@ -325,6 +326,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info,
 	case SNOR_MFR_MICRON:
 		/* Some Micron need WREN command; all will accept it */
 		need_wren = true;
+	case SNOR_MFR_ISSI:
 	case SNOR_MFR_MACRONIX:
 	case SNOR_MFR_WINBOND:
 		if (need_wren)
@@ -1233,6 +1235,12 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 	size_t page_offset, page_remain, i;
 	ssize_t ret;
 
+#ifdef CONFIG_SPI_FLASH_SST
+	/* sst nor chips use AAI word program */
+	if (nor->info->flags & SST_WRITE)
+		return sst_write(mtd, to, len, retlen, buf);
+#endif
+
 	dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
 
 	if (!len)
@@ -1246,11 +1254,8 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to, size_t len,
 		 * If page_size is a power of two, the offset can be quickly
 		 * calculated with an AND operation. On the other cases we
 		 * need to do a modulus operation (more expensive).
-		 * Power of two numbers have only one bit set and we can use
-		 * the instruction hweight32 to detect if we need to do a
-		 * modulus (do_div()) or not.
 		 */
-		if (hweight32(nor->page_size) == 1) {
+		if (is_power_of_2(nor->page_size)) {
 			page_offset = addr & (nor->page_size - 1);
 		} else {
 			u64 aux = addr;
@@ -1376,7 +1381,8 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
 	/* Check current Quad Enable bit value. */
 	ret = read_cr(nor);
 	if (ret < 0) {
-		dev_dbg(dev, "error while reading configuration register\n");
+		dev_dbg(nor->dev,
+			"error while reading configuration register\n");
 		return -EINVAL;
 	}
 
@@ -1388,7 +1394,7 @@ static int spansion_read_cr_quad_enable(struct spi_nor *nor)
 	/* Keep the current value of the Status Register. */
 	ret = read_sr(nor);
 	if (ret < 0) {
-		dev_dbg(dev, "error while reading status register\n");
+		dev_dbg(nor->dev, "error while reading status register\n");
 		return -EINVAL;
 	}
 	sr_cr[0] = ret;
@@ -2071,7 +2077,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor,
 		err = spi_nor_read_sfdp(nor, sizeof(header),
 					psize, param_headers);
 		if (err < 0) {
-			dev_err(dev, "failed to read SFDP parameter headers\n");
+			dev_err(nor->dev,
+				"failed to read SFDP parameter headers\n");
 			goto exit;
 		}
 	}
@@ -2101,7 +2108,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor,
 
 		switch (SFDP_PARAM_HEADER_ID(param_header)) {
 		case SFDP_SECTOR_MAP_ID:
-			dev_info(dev, "non-uniform erase sector maps are not supported yet.\n");
+			dev_info(nor->dev,
+				 "non-uniform erase sector maps are not supported yet.\n");
 			break;
 
 		case SFDP_SST_ID:
@@ -2113,7 +2121,8 @@ static int spi_nor_parse_sfdp(struct spi_nor *nor,
 		}
 
 		if (err) {
-			dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
+			dev_warn(nor->dev,
+				 "Failed to parse optional parameter table: %04x\n",
 				 SFDP_PARAM_HEADER_ID(param_header));
 			/*
 			 * Let's not drop all information we extracted so far
@@ -2527,6 +2536,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	mtd->size = params.size;
 	mtd->_erase = spi_nor_erase;
 	mtd->_read = spi_nor_read;
+	mtd->_write = spi_nor_write;
 
 #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
 	/* NOR protection support for STmicro/Micron chips and similar */
@@ -2550,13 +2560,7 @@ int spi_nor_scan(struct spi_nor *nor)
 		nor->flash_unlock = sst26_unlock;
 		nor->flash_is_locked = sst26_is_locked;
 	}
-
-	/* sst nor chips use AAI word program */
-	if (info->flags & SST_WRITE)
-		mtd->_write = sst_write;
-	else
 #endif
-		mtd->_write = spi_nor_write;
 
 	if (info->flags & USE_FSR)
 		nor->flags |= SNOR_F_USE_FSR;
@@ -2611,7 +2615,7 @@ int spi_nor_scan(struct spi_nor *nor)
 	}
 
 	if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
-		dev_dbg(dev, "address width is too large: %u\n",
+		dev_dbg(nor->dev, "address width is too large: %u\n",
 			nor->addr_width);
 		return -EINVAL;
 	}
@@ -2637,14 +2641,3 @@ int spi_nor_scan(struct spi_nor *nor)
 
 	return 0;
 }
-
-/* U-Boot specific functions, need to extend MTD to support these */
-int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor)
-{
-	int sr = read_sr(nor);
-
-	if (sr < 0)
-		return sr;
-
-	return (sr >> 2) & 7;
-}
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index abdf560e02..114ebacde1 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -135,7 +135,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("is25wp256",  0x9d7019, 0, 64 * 1024, 512,
-			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	/* Macronix */
@@ -159,6 +160,7 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("mx66u2g45g",  0xc2253c, 0, 64 * 1024, 4096, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 	{ INFO("mx66l1g45g",  0xc2201b, 0, 64 * 1024, 2048, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("mx25l1633e", 0xc22415, 0, 64 * 1024,   32, SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES | SECT_4K) },
+	{ INFO("mx25r6435f", 0xc22817, 0, 64 * 1024,   128,  SECT_4K) },
 #endif
 
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
@@ -183,8 +185,8 @@ const struct flash_info spi_nor_ids[] = {
 	{ INFO("n25q00",      0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("n25q00a",     0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ INFO("mt25qu02g",   0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
-	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_4B_OPCODES) },
-	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu512aba", 0x2c5b1a, 0,  128 * 1024,  512, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
+	{ INFO("mt35xu02g",  0x2c5b1c, 0, 128 * 1024,  2048, USE_FSR | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES) },
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
 	/* Spansion/Cypress -- single (large) sector size only, at least
@@ -192,9 +194,10 @@ const struct flash_info spi_nor_ids[] = {
 	 */
 	{ INFO("s25sl032p",  0x010215, 0x4d00,  64 * 1024,  64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("s25sl064p",  0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
-	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
+	{ INFO("s25fl256s0", 0x010219, 0x4d00, 256 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl256s1", 0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ INFO6("s25fl512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO6("s25fl512s",  0x010220, 0x4d0080, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ INFO6("s25fs512s",  0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_256k",  0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_64k",  0x010220, 0x4d01, 64 * 1024, 1024, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ INFO("s25fl512s_512k", 0x010220, 0x4f00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
diff --git a/drivers/mtd/spi/spi-nor-tiny.c b/drivers/mtd/spi/spi-nor-tiny.c
index ccc0ab07af..9f676c649d 100644
--- a/drivers/mtd/spi/spi-nor-tiny.c
+++ b/drivers/mtd/spi/spi-nor-tiny.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <linux/err.h>
 #include <linux/errno.h>
@@ -797,9 +798,3 @@ int spi_nor_scan(struct spi_nor *nor)
 
 	return 0;
 }
-
-/* U-Boot specific functions, need to extend MTD to support these */
-int spi_flash_cmd_get_sw_write_prot(struct spi_nor *nor)
-{
-	return -ENOTSUPP;
-}
diff --git a/drivers/mtd/st_smi.c b/drivers/mtd/st_smi.c
index d29a71595d..7c652e6c53 100644
--- a/drivers/mtd/st_smi.c
+++ b/drivers/mtd/st_smi.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <flash.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mtd/st_smi.h>
 
diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c
index fd0d5506e8..95afa2d6bc 100644
--- a/drivers/mtd/stm32_flash.c
+++ b/drivers/mtd/stm32_flash.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
 #include "stm32_flash.h"
diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c
index f02a06fc35..e488caa554 100644
--- a/drivers/mtd/ubi/attach.c
+++ b/drivers/mtd/ubi/attach.c
@@ -70,6 +70,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #include <linux/slab.h>
@@ -78,6 +79,7 @@
 #include <u-boot/crc.h>
 #else
 #include <div64.h>
+#include <linux/bug.h>
 #include <linux/err.h>
 #endif
 
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index 7de65bc7c3..61e38ba1ab 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -17,6 +17,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/module.h>
 #include <linux/moduleparam.h>
diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c
index 8428278e21..9d4337bcff 100644
--- a/drivers/mtd/ubi/eba.c
+++ b/drivers/mtd/ubi/eba.c
@@ -29,6 +29,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/slab.h>
 #include <linux/crc32.h>
diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index a3f5e3e1a9..b54b56375b 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
@@ -7,6 +7,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/err.h>
@@ -15,6 +16,7 @@
 #include <div64.h>
 #include <malloc.h>
 #include <ubi_uboot.h>
+#include <linux/bug.h>
 #endif
 
 #include <linux/compat.h>
diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c
index 8ba22d8142..b8b878b918 100644
--- a/drivers/mtd/ubi/io.c
+++ b/drivers/mtd/ubi/io.c
@@ -74,6 +74,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/err.h>
diff --git a/drivers/mtd/ubi/misc.c b/drivers/mtd/ubi/misc.c
index 3f7ee59c94..81275deaeb 100644
--- a/drivers/mtd/ubi/misc.c
+++ b/drivers/mtd/ubi/misc.c
@@ -7,6 +7,7 @@
 
 /* Here we keep miscellaneous functions which are used all over the UBI code */
 
+#include <log.h>
 #include <malloc.h>
 #include <ubi_uboot.h>
 #include "ubi.h"
diff --git a/drivers/mtd/ubi/upd.c b/drivers/mtd/ubi/upd.c
index 0f7951c859..28a362aa14 100644
--- a/drivers/mtd/ubi/upd.c
+++ b/drivers/mtd/ubi/upd.c
@@ -26,6 +26,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <malloc.h>
 #include <linux/uaccess.h>
 #else
diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c
index 2114abbe7c..0bfedd0deb 100644
--- a/drivers/mtd/ubi/vmt.c
+++ b/drivers/mtd/ubi/vmt.c
@@ -11,6 +11,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #include <linux/slab.h>
diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c
index 123c2f344d..a2b5352cb2 100644
--- a/drivers/mtd/ubi/vtbl.c
+++ b/drivers/mtd/ubi/vtbl.c
@@ -46,6 +46,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/err.h>
@@ -54,6 +55,7 @@
 #include <u-boot/crc.h>
 #else
 #include <ubi_uboot.h>
+#include <linux/bug.h>
 #endif
 
 #include <linux/err.h>
diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c
index 4038b7f04e..bae402418f 100644
--- a/drivers/mtd/ubi/wl.c
+++ b/drivers/mtd/ubi/wl.c
@@ -86,6 +86,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/slab.h>
 #include <linux/crc32.h>
diff --git a/drivers/mtd/ubispl/ubispl.c b/drivers/mtd/ubispl/ubispl.c
index 00102fcf74..03b31f002b 100644
--- a/drivers/mtd/ubispl/ubispl.c
+++ b/drivers/mtd/ubispl/ubispl.c
@@ -9,9 +9,11 @@
 
 #include <common.h>
 #include <errno.h>
+#include <linux/bug.h>
 #include <u-boot/crc.h>
 #include <ubispl.h>
 
+#include <linux/bitops.h>
 #include <linux/crc32.h>
 
 #include "ubispl.h"
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 4d1013c984..0b08de0ef4 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -57,6 +57,12 @@ config MDIO_MUX_SANDBOX
 
 	  This driver is used for testing in test/dm/mdio.c
 
+config DM_ETH_PHY
+	bool "Enable Driver Model for Ethernet Generic PHY drivers"
+	depends on DM
+	help
+	  Enable driver model for Ethernet Generic PHY .
+
 menuconfig NETDEVICES
 	bool "Network device support"
 	depends on NET
@@ -301,9 +307,23 @@ config FSLDMAFEC
 	  This driver supports the network interface units in the
 	  ColdFire family.
 
+config KS8851_MLL
+	bool "Microchip KS8851-MLL controller driver"
+	help
+	  The Microchip KS8851 parallel bus external ethernet interface chip.
+
+if KS8851_MLL
+if !DM_ETH
+config KS8851_MLL_BASEADDR
+	hex "Microchip KS8851-MLL Base Address"
+	help
+	  Define this to hold the physical address of the device (I/O space)
+endif #DM_ETH
+endif #KS8851_MLL
+
 config MVGBE
 	bool "Marvell Orion5x/Kirkwood network interface support"
-	depends on KIRKWOOD || ORION5X
+	depends on ARCH_KIRKWOOD || ARCH_ORION5X
 	select PHYLIB if DM_ETH
 	help
 	  This driver supports the network interface units in the
@@ -388,11 +408,13 @@ config SMC911X
 
 if SMC911X
 
+if !DM_ETH
 config SMC911X_BASE
 	hex "SMC911X Base Address"
 	help
 	  Define this to hold the physical address
 	  of the device (I/O space)
+endif #DM_ETH
 
 choice
 	prompt "SMC911X bus width"
@@ -640,4 +662,11 @@ config MVMDIO
 
 	  This driver is used by the MVPP2 and MVNETA drivers.
 
+config FSL_LS_MDIO
+	bool "NXP Layerscape MDIO interface support"
+	depends on DM_MDIO
+	help
+	  This driver supports the MDIO bus found on the Fman 10G Ethernet MACs and
+	  on the mEMAC (which supports both Clauses 22 and 45).
+
 endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 6e0a68834d..383ed1c64f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_ETH_DESIGNWARE) += designware.o
 obj-$(CONFIG_ETH_DESIGNWARE_SOCFPGA) += dwmac_socfpga.o
 obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
 obj-$(CONFIG_DNET) += dnet.o
+obj-$(CONFIG_DM_ETH_PHY) += eth-phy-uclass.o
 obj-$(CONFIG_E1000) += e1000.o
 obj-$(CONFIG_E1000_SPI) += e1000_spi.o
 obj-$(CONFIG_EEPRO100) += eepro100.o
@@ -83,3 +84,4 @@ obj-y += mscc_eswitch/
 obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
 obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
 obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
+obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
diff --git a/drivers/net/ag7xxx.c b/drivers/net/ag7xxx.c
index e3a7222efb..3b5d11f956 100644
--- a/drivers/net/ag7xxx.c
+++ b/drivers/net/ag7xxx.c
@@ -11,9 +11,14 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <miiphy.h>
 #include <malloc.h>
+#include <net.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mii.h>
 #include <wait_bit.h>
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
index a511068d9a..93b26da392 100644
--- a/drivers/net/altera_tse.c
+++ b/drivers/net/altera_tse.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <memalign.h>
 #include <miiphy.h>
 #include <net.h>
diff --git a/drivers/net/altera_tse.h b/drivers/net/altera_tse.h
index 2b1af81429..79509b8084 100644
--- a/drivers/net/altera_tse.h
+++ b/drivers/net/altera_tse.h
@@ -11,6 +11,7 @@
 #ifndef _ALTERA_TSE_H_
 #define _ALTERA_TSE_H_
 
+#include <linux/bitops.h>
 #define __packed_1_    __packed __aligned(1)
 
 /* dma type */
diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c
index da6662c7ee..3ee119bcbc 100644
--- a/drivers/net/armada100_fec.c
+++ b/drivers/net/armada100_fec.c
@@ -10,12 +10,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <netdev.h>
 #include <asm/types.h>
 #include <asm/byteorder.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/mii.h>
 #include <asm/io.h>
diff --git a/drivers/net/at91_emac.c b/drivers/net/at91_emac.c
index 3233478571..4e4ad61da4 100644
--- a/drivers/net/at91_emac.c
+++ b/drivers/net/at91_emac.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/at91_emac.h>
@@ -17,6 +18,7 @@
 #include <netdev.h>
 #include <malloc.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 
 #undef MII_DEBUG
diff --git a/drivers/net/ax88180.c b/drivers/net/ax88180.c
index 261fde00c1..28cb41272a 100644
--- a/drivers/net/ax88180.c
+++ b/drivers/net/ax88180.c
@@ -39,8 +39,10 @@
  */
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include "ax88180.h"
 
@@ -117,7 +119,7 @@ static int ax88180_phy_reset (struct eth_device *dev)
 
 	/* Wait for the reset to complete, or time out (500 ms) */
 	while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) {
-		udelay (1000);
+		udelay(1000);
 		if (--delay_cnt == 0) {
 			printf ("Failed to reset PHY!\n");
 			return -1;
@@ -176,7 +178,7 @@ static int ax88180_poll_tx_complete (struct eth_device *dev)
 		if ((tmpval & txbs_txdp) == 0)
 			break;
 
-		udelay (100);
+		udelay(100);
 	}
 
 	if (TimeOutCnt)
@@ -341,7 +343,7 @@ static void ax88180_media_config (struct eth_device *dev)
 		if (bmsr_val & BMSR_LSTATUS) {
 			break;
 		}
-		udelay (100);
+		udelay(100);
 	}
 
 	bmsr_val = ax88180_mdio_read (dev, MII_BMSR);
@@ -363,7 +365,7 @@ static void ax88180_media_config (struct eth_device *dev)
 				if (bmsr_val & BMSR_ANEGCOMPLETE) {
 					break;
 				}
-				udelay (100);
+				udelay(100);
 			}
 		} else
 			debug ("ax88180: Auto-negotiation is disabled.\n");
@@ -679,7 +681,7 @@ static void ax88180_read_mac_addr (struct eth_device *dev)
 		tmp_regval = INW (dev, PROMCTRL);
 		if ((tmp_regval & RELOAD_EEPROM) == 0)
 			break;
-		udelay (1000);
+		udelay(1000);
 	}
 
 	/* Get MAC addresses */
diff --git a/drivers/net/ax88796.c b/drivers/net/ax88796.c
index 01c1ae2729..d161f0e09c 100644
--- a/drivers/net/ax88796.c
+++ b/drivers/net/ax88796.c
@@ -3,6 +3,7 @@
  * (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
  */
 #include <common.h>
+#include <linux/delay.h>
 #include "ax88796.h"
 
 /*
diff --git a/drivers/net/bcm-sf2-eth-gmac.c b/drivers/net/bcm-sf2-eth-gmac.c
index 6a25f67c30..3caf0f3310 100644
--- a/drivers/net/bcm-sf2-eth-gmac.c
+++ b/drivers/net/bcm-sf2-eth-gmac.c
@@ -12,10 +12,14 @@
 #include <config.h>
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <phy.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
 
 #include "bcm-sf2-eth.h"
 #include "bcm-sf2-eth-gmac.h"
diff --git a/drivers/net/bcm-sf2-eth.c b/drivers/net/bcm-sf2-eth.c
index 11f937032f..2998d57c72 100644
--- a/drivers/net/bcm-sf2-eth.c
+++ b/drivers/net/bcm-sf2-eth.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <config.h>
+#include <linux/delay.h>
 
 #include <phy.h>
 #include <miiphy.h>
diff --git a/drivers/net/bcm6348-eth.c b/drivers/net/bcm6348-eth.c
index fe3532930a..9ddc0f938f 100644
--- a/drivers/net/bcm6348-eth.c
+++ b/drivers/net/bcm6348-eth.c
@@ -10,6 +10,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <dma.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <net.h>
diff --git a/drivers/net/bcm6368-eth.c b/drivers/net/bcm6368-eth.c
index 1200049007..648fafd3e0 100644
--- a/drivers/net/bcm6368-eth.c
+++ b/drivers/net/bcm6368-eth.c
@@ -10,6 +10,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <dma.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <net.h>
@@ -17,6 +18,7 @@
 #include <wait_bit.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 
 #define ETH_PORT_STR			"brcm,enetsw-port"
 
diff --git a/drivers/net/bcmgenet.c b/drivers/net/bcmgenet.c
index 8f4848aec6..11b6148ab6 100644
--- a/drivers/net/bcmgenet.c
+++ b/drivers/net/bcmgenet.c
@@ -16,11 +16,15 @@
  * we only support v5, as used in the Raspberry Pi 4.
  */
 
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <clk.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <malloc.h>
 #include <miiphy.h>
@@ -448,7 +452,10 @@ static int bcmgenet_adjust_link(struct bcmgenet_eth_priv *priv)
 	}
 
 	clrsetbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, OOB_DISABLE,
-			RGMII_LINK | RGMII_MODE_EN | ID_MODE_DIS);
+			RGMII_LINK | RGMII_MODE_EN);
+
+	if (phy_dev->interface == PHY_INTERFACE_MODE_RGMII)
+		setbits_32(priv->mac_reg + EXT_RGMII_OOB_CTRL, ID_MODE_DIS);
 
 	writel(speed << CMD_SPEED_SHIFT, (priv->mac_reg + UMAC_CMD));
 
diff --git a/drivers/net/calxedaxgmac.c b/drivers/net/calxedaxgmac.c
index 1b7c94f654..5dad69c0b7 100644
--- a/drivers/net/calxedaxgmac.c
+++ b/drivers/net/calxedaxgmac.c
@@ -5,7 +5,9 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <net.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <asm/io.h>
 
diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c
index 9331cdf938..7ec95be6fc 100644
--- a/drivers/net/cs8900.c
+++ b/drivers/net/cs8900.c
@@ -25,9 +25,11 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <asm/io.h>
 #include <net.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include "cs8900.h"
 
 #undef DEBUG
diff --git a/drivers/net/dc2114x.c b/drivers/net/dc2114x.c
index 43c2253f10..c55358ef83 100644
--- a/drivers/net/dc2114x.c
+++ b/drivers/net/dc2114x.c
@@ -6,25 +6,24 @@
 #include <net.h>
 #include <netdev.h>
 #include <pci.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
-#undef DEBUG_SROM
-#undef DEBUG_SROM2
+#define SROM_DLEVEL	0
 
 #undef UPDATE_SROM
 
-/* PCI Registers.
- */
-#define PCI_CFDA_PSM		0x43
+/* PCI Registers. */
+#define PCI_CFDA_PSM	0x43
 
 #define CFRV_RN		0x000000f0	/* Revision Number */
 
 #define WAKEUP		0x00		/* Power Saving Wakeup */
 #define SLEEP		0x80		/* Power Saving Sleep Mode */
 
-#define DC2114x_BRK	0x0020		/* CFRV break between DC21142 & DC21143 */
+#define DC2114x_BRK	0x0020	/* CFRV break between DC21142 & DC21143 */
 
-/* Ethernet chip registers.
- */
+/* Ethernet chip registers. */
 #define DE4X5_BMR	0x000		/* Bus Mode Register */
 #define DE4X5_TPD	0x008		/* Transmit Poll Demand Reg */
 #define DE4X5_RRBA	0x018		/* RX Ring Base Address Reg */
@@ -34,8 +33,7 @@
 #define DE4X5_SICR	0x068		/* SIA Connectivity Register */
 #define DE4X5_APROM	0x048		/* Ethernet Address PROM */
 
-/* Register bits.
- */
+/* Register bits. */
 #define BMR_SWR		0x00000001	/* Software Reset */
 #define STS_TS		0x00700000	/* Transmit Process State */
 #define STS_RS		0x000e0000	/* Receive Process State */
@@ -45,8 +43,7 @@
 #define OMR_SDP		0x02000000	/* SD Polarity - MUST BE ASSERTED */
 #define OMR_PM		0x00000080	/* Pass All Multicast */
 
-/* Descriptor bits.
- */
+/* Descriptor bits. */
 #define R_OWN		0x80000000	/* Own Bit */
 #define RD_RER		0x02000000	/* Receive End Of Ring */
 #define RD_LS		0x00000100	/* Last Descriptor */
@@ -63,12 +60,12 @@
 #define SROM_READ_CMD	6
 #define SROM_ERASE_CMD	7
 
-#define SROM_HWADD	    0x0014	/* Hardware Address offset in SROM */
+#define SROM_HWADD	0x0014		/* Hardware Address offset in SROM */
 #define SROM_RD		0x00004000	/* Read from Boot ROM */
-#define EE_DATA_WRITE	      0x04	/* EEPROM chip data in. */
-#define EE_WRITE_0	    0x4801
-#define EE_WRITE_1	    0x4805
-#define EE_DATA_READ	      0x08	/* EEPROM chip data out. */
+#define EE_DATA_WRITE	0x04		/* EEPROM chip data in. */
+#define EE_WRITE_0	0x4801
+#define EE_WRITE_1	0x4805
+#define EE_DATA_READ	0x08		/* EEPROM chip data out. */
 #define SROM_SR		0x00000800	/* Select Serial ROM when set */
 
 #define DT_IN		0x00000004	/* Serial Data In */
@@ -77,48 +74,14 @@
 
 #define POLL_DEMAND	1
 
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-#define RESET_DM9102(dev) {\
-    unsigned long i;\
-    i=INL(dev, 0x0);\
-    udelay(1000);\
-    OUTL(dev, i | BMR_SWR, DE4X5_BMR);\
-    udelay(1000);\
-}
+#if defined(CONFIG_E500)
+#define phys_to_bus(a) (a)
 #else
-#define RESET_DE4X5(dev) {\
-    int i;\
-    i=INL(dev, DE4X5_BMR);\
-    udelay(1000);\
-    OUTL(dev, i | BMR_SWR, DE4X5_BMR);\
-    udelay(1000);\
-    OUTL(dev, i, DE4X5_BMR);\
-    udelay(1000);\
-    for (i=0;i<5;i++) {INL(dev, DE4X5_BMR); udelay(10000);}\
-    udelay(1000);\
-}
+#define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, a)
 #endif
 
-#define START_DE4X5(dev) {\
-    s32 omr; \
-    omr = INL(dev, DE4X5_OMR);\
-    omr |= OMR_ST | OMR_SR;\
-    OUTL(dev, omr, DE4X5_OMR);		/* Enable the TX and/or RX */\
-}
-
-#define STOP_DE4X5(dev) {\
-    s32 omr; \
-    omr = INL(dev, DE4X5_OMR);\
-    omr &= ~(OMR_ST|OMR_SR);\
-    OUTL(dev, omr, DE4X5_OMR);		/* Disable the TX and/or RX */ \
-}
-
 #define NUM_RX_DESC PKTBUFSRX
-#ifndef CONFIG_TULIP_FIX_DAVICOM
-	#define NUM_TX_DESC 1			/* Number of TX descriptors   */
-#else
-	#define NUM_TX_DESC 4
-#endif
+#define NUM_TX_DESC 1			/* Number of TX descriptors   */
 #define RX_BUFF_SZ  PKTSIZE_ALIGN
 
 #define TOUT_LOOP   1000000
@@ -132,455 +95,117 @@ struct de4x5_desc {
 	u32 next;
 };
 
-static struct de4x5_desc rx_ring[NUM_RX_DESC] __attribute__ ((aligned(32))); /* RX descriptor ring         */
-static struct de4x5_desc tx_ring[NUM_TX_DESC] __attribute__ ((aligned(32))); /* TX descriptor ring         */
-static int rx_new;                             /* RX descriptor ring pointer */
-static int tx_new;                             /* TX descriptor ring pointer */
+/* RX and TX descriptor ring */
+static struct de4x5_desc rx_ring[NUM_RX_DESC] __aligned(32);
+static struct de4x5_desc tx_ring[NUM_TX_DESC] __aligned(32);
+static int rx_new;	/* RX descriptor ring pointer */
+static int tx_new;	/* TX descriptor ring pointer */
 
-static char rxRingSize;
-static char txRingSize;
+static char rx_ring_size;
+static char tx_ring_size;
 
-#if defined(UPDATE_SROM) || !defined(CONFIG_TULIP_FIX_DAVICOM)
-static void  sendto_srom(struct eth_device* dev, u_int command, u_long addr);
-static int   getfrom_srom(struct eth_device* dev, u_long addr);
-static int   do_eeprom_cmd(struct eth_device *dev, u_long ioaddr,int cmd,int cmd_len);
-static int   do_read_eeprom(struct eth_device *dev,u_long ioaddr,int location,int addr_len);
-#endif	/* UPDATE_SROM || !CONFIG_TULIP_FIX_DAVICOM */
-#ifdef UPDATE_SROM
-static int   write_srom(struct eth_device *dev, u_long ioaddr, int index, int new_value);
-static void  update_srom(struct eth_device *dev, bd_t *bis);
-#endif
-#ifndef CONFIG_TULIP_FIX_DAVICOM
-static int   read_srom(struct eth_device *dev, u_long ioaddr, int index);
-static void  read_hw_addr(struct eth_device* dev, bd_t * bis);
-#endif	/* CONFIG_TULIP_FIX_DAVICOM */
-static void  send_setup_frame(struct eth_device* dev, bd_t * bis);
-
-static int   dc21x4x_init(struct eth_device* dev, bd_t* bis);
-static int   dc21x4x_send(struct eth_device *dev, void *packet, int length);
-static int   dc21x4x_recv(struct eth_device* dev);
-static void  dc21x4x_halt(struct eth_device* dev);
-#ifdef CONFIG_TULIP_SELECT_MEDIA
-extern void  dc21x4x_select_media(struct eth_device* dev);
-#endif
-
-#if defined(CONFIG_E500)
-#define phys_to_bus(a) (a)
-#else
-#define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, a)
-#endif
-
-static int INL(struct eth_device* dev, u_long addr)
+static u32 dc2114x_inl(struct eth_device *dev, u32 addr)
 {
-	return le32_to_cpu(*(volatile u_long *)(addr + dev->iobase));
+	return le32_to_cpu(*(volatile u32 *)(addr + dev->iobase));
 }
 
-static void OUTL(struct eth_device* dev, int command, u_long addr)
+static void dc2114x_outl(struct eth_device *dev, u32 command, u32 addr)
 {
-	*(volatile u_long *)(addr + dev->iobase) = cpu_to_le32(command);
+	*(volatile u32 *)(addr + dev->iobase) = cpu_to_le32(command);
 }
 
-static struct pci_device_id supported[] = {
-	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST },
-	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142 },
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-	{ PCI_VENDOR_ID_DAVICOM, PCI_DEVICE_ID_DAVICOM_DM9102A },
-#endif
-	{ }
-};
-
-int dc21x4x_initialize(bd_t *bis)
+static void reset_de4x5(struct eth_device *dev)
 {
-	int			idx=0;
-	int			card_number = 0;
-	unsigned int		cfrv;
-	unsigned char		timer;
-	pci_dev_t		devbusfn;
-	unsigned int		iobase;
-	unsigned short		status;
-	struct eth_device*	dev;
-
-	while(1) {
-		devbusfn =  pci_find_devices(supported, idx++);
-		if (devbusfn == -1) {
-			break;
-		}
-
-		/* Get the chip configuration revision register. */
-		pci_read_config_dword(devbusfn, PCI_REVISION_ID, &cfrv);
-
-#ifndef CONFIG_TULIP_FIX_DAVICOM
-		if ((cfrv & CFRV_RN) < DC2114x_BRK ) {
-			printf("Error: The chip is not DC21143.\n");
-			continue;
-		}
-#endif
-
-		pci_read_config_word(devbusfn, PCI_COMMAND, &status);
-		status |=
-#ifdef CONFIG_TULIP_USE_IO
-		  PCI_COMMAND_IO |
-#else
-		  PCI_COMMAND_MEMORY |
-#endif
-		  PCI_COMMAND_MASTER;
-		pci_write_config_word(devbusfn, PCI_COMMAND, status);
-
-		pci_read_config_word(devbusfn, PCI_COMMAND, &status);
-#ifdef CONFIG_TULIP_USE_IO
-		if (!(status & PCI_COMMAND_IO)) {
-			printf("Error: Can not enable I/O access.\n");
-			continue;
-		}
-#else
-		if (!(status & PCI_COMMAND_MEMORY)) {
-			printf("Error: Can not enable MEMORY access.\n");
-			continue;
-		}
-#endif
-
-		if (!(status & PCI_COMMAND_MASTER)) {
-			printf("Error: Can not enable Bus Mastering.\n");
-			continue;
-		}
-
-		/* Check the latency timer for values >= 0x60. */
-		pci_read_config_byte(devbusfn, PCI_LATENCY_TIMER, &timer);
-
-		if (timer < 0x60) {
-			pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x60);
-		}
-
-#ifdef CONFIG_TULIP_USE_IO
-		/* read BAR for memory space access */
-		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
-		iobase &= PCI_BASE_ADDRESS_IO_MASK;
-#else
-		/* read BAR for memory space access */
-		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase);
-		iobase &= PCI_BASE_ADDRESS_MEM_MASK;
-#endif
-		debug ("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
-
-		dev = (struct eth_device*) malloc(sizeof *dev);
-
-		if (!dev) {
-			printf("Can not allocalte memory of dc21x4x\n");
-			break;
-		}
-		memset(dev, 0, sizeof(*dev));
-
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-		sprintf(dev->name, "Davicom#%d", card_number);
-#else
-		sprintf(dev->name, "dc21x4x#%d", card_number);
-#endif
-
-#ifdef CONFIG_TULIP_USE_IO
-		dev->iobase = pci_io_to_phys(devbusfn, iobase);
-#else
-		dev->iobase = pci_mem_to_phys(devbusfn, iobase);
-#endif
-		dev->priv   = (void*) devbusfn;
-		dev->init   = dc21x4x_init;
-		dev->halt   = dc21x4x_halt;
-		dev->send   = dc21x4x_send;
-		dev->recv   = dc21x4x_recv;
-
-		/* Ensure we're not sleeping. */
-		pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
-
-		udelay(10 * 1000);
-
-#ifndef CONFIG_TULIP_FIX_DAVICOM
-		read_hw_addr(dev, bis);
-#endif
-		eth_register(dev);
-
-		card_number++;
+	u32 i;
+
+	i = dc2114x_inl(dev, DE4X5_BMR);
+	mdelay(1);
+	dc2114x_outl(dev, i | BMR_SWR, DE4X5_BMR);
+	mdelay(1);
+	dc2114x_outl(dev, i, DE4X5_BMR);
+	mdelay(1);
+
+	for (i = 0; i < 5; i++) {
+		dc2114x_inl(dev, DE4X5_BMR);
+		mdelay(10);
 	}
 
-	return card_number;
+	mdelay(1);
 }
 
-static int dc21x4x_init(struct eth_device* dev, bd_t* bis)
+static void start_de4x5(struct eth_device *dev)
 {
-	int		i;
-	int		devbusfn = (int) dev->priv;
+	u32 omr;
 
-	/* Ensure we're not sleeping. */
-	pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
-
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-	RESET_DM9102(dev);
-#else
-	RESET_DE4X5(dev);
-#endif
-
-	if ((INL(dev, DE4X5_STS) & (STS_TS | STS_RS)) != 0) {
-		printf("Error: Cannot reset ethernet controller.\n");
-		return -1;
-	}
-
-#ifdef CONFIG_TULIP_SELECT_MEDIA
-	dc21x4x_select_media(dev);
-#else
-	OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);
-#endif
-
-	for (i = 0; i < NUM_RX_DESC; i++) {
-		rx_ring[i].status = cpu_to_le32(R_OWN);
-		rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
-		rx_ring[i].buf = cpu_to_le32(
-			phys_to_bus((u32)net_rx_packets[i]));
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-		rx_ring[i].next = cpu_to_le32(
-			phys_to_bus((u32)&rx_ring[(i + 1) % NUM_RX_DESC]));
-#else
-		rx_ring[i].next = 0;
-#endif
-	}
-
-	for (i=0; i < NUM_TX_DESC; i++) {
-		tx_ring[i].status = 0;
-		tx_ring[i].des1 = 0;
-		tx_ring[i].buf = 0;
-
-#ifdef CONFIG_TULIP_FIX_DAVICOM
-	tx_ring[i].next = cpu_to_le32(phys_to_bus((u32) &tx_ring[(i+1) % NUM_TX_DESC]));
-#else
-		tx_ring[i].next = 0;
-#endif
-	}
-
-	rxRingSize = NUM_RX_DESC;
-	txRingSize = NUM_TX_DESC;
-
-	/* Write the end of list marker to the descriptor lists. */
-	rx_ring[rxRingSize - 1].des1 |= cpu_to_le32(RD_RER);
-	tx_ring[txRingSize - 1].des1 |= cpu_to_le32(TD_TER);
-
-	/* Tell the adapter where the TX/RX rings are located. */
-	OUTL(dev, phys_to_bus((u32) &rx_ring), DE4X5_RRBA);
-	OUTL(dev, phys_to_bus((u32) &tx_ring), DE4X5_TRBA);
-
-	START_DE4X5(dev);
-
-	tx_new = 0;
-	rx_new = 0;
-
-	send_setup_frame(dev, bis);
-
-	return 0;
+	omr = dc2114x_inl(dev, DE4X5_OMR);
+	omr |= OMR_ST | OMR_SR;
+	dc2114x_outl(dev, omr, DE4X5_OMR);	/* Enable the TX and/or RX */
 }
 
-static int dc21x4x_send(struct eth_device *dev, void *packet, int length)
+static void stop_de4x5(struct eth_device *dev)
 {
-	int		status = -1;
-	int		i;
+	u32 omr;
 
-	if (length <= 0) {
-		printf("%s: bad packet size: %d\n", dev->name, length);
-		goto Done;
-	}
-
-	for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-		if (i >= TOUT_LOOP) {
-			printf("%s: tx error buffer not ready\n", dev->name);
-			goto Done;
-		}
-	}
-
-	tx_ring[tx_new].buf    = cpu_to_le32(phys_to_bus((u32) packet));
-	tx_ring[tx_new].des1   = cpu_to_le32(TD_TER | TD_LS | TD_FS | length);
-	tx_ring[tx_new].status = cpu_to_le32(T_OWN);
-
-	OUTL(dev, POLL_DEMAND, DE4X5_TPD);
-
-	for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-		if (i >= TOUT_LOOP) {
-			printf(".%s: tx buffer not ready\n", dev->name);
-			goto Done;
-		}
-	}
-
-	if (le32_to_cpu(tx_ring[tx_new].status) & TD_ES) {
-#if 0 /* test-only */
-		printf("TX error status = 0x%08X\n",
-			le32_to_cpu(tx_ring[tx_new].status));
-#endif
-		tx_ring[tx_new].status = 0x0;
-		goto Done;
-	}
-
-	status = length;
-
- Done:
-    tx_new = (tx_new+1) % NUM_TX_DESC;
-	return status;
+	omr = dc2114x_inl(dev, DE4X5_OMR);
+	omr &= ~(OMR_ST | OMR_SR);
+	dc2114x_outl(dev, omr, DE4X5_OMR);	/* Disable the TX and/or RX */
 }
 
-static int dc21x4x_recv(struct eth_device* dev)
+/* SROM Read and write routines. */
+static void sendto_srom(struct eth_device *dev, u_int command, u_long addr)
 {
-	s32		status;
-	int		length    = 0;
-
-	for ( ; ; ) {
-		status = (s32)le32_to_cpu(rx_ring[rx_new].status);
-
-		if (status & R_OWN) {
-			break;
-		}
-
-		if (status & RD_LS) {
-			/* Valid frame status.
-			 */
-			if (status & RD_ES) {
-
-				/* There was an error.
-				 */
-				printf("RX error status = 0x%08X\n", status);
-			} else {
-				/* A valid frame received.
-				 */
-				length = (le32_to_cpu(rx_ring[rx_new].status) >> 16);
-
-				/* Pass the packet up to the protocol
-				 * layers.
-				 */
-				net_process_received_packet(
-					net_rx_packets[rx_new], length - 4);
-			}
-
-			/* Change buffer ownership for this frame, back
-			 * to the adapter.
-			 */
-			rx_ring[rx_new].status = cpu_to_le32(R_OWN);
-		}
-
-		/* Update entry information.
-		 */
-		rx_new = (rx_new + 1) % rxRingSize;
-	}
-
-	return length;
-}
-
-static void dc21x4x_halt(struct eth_device* dev)
-{
-	int		devbusfn = (int) dev->priv;
-
-	STOP_DE4X5(dev);
-	OUTL(dev, 0, DE4X5_SICR);
-
-	pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
-}
-
-static void send_setup_frame(struct eth_device* dev, bd_t *bis)
-{
-	int		i;
-	char	setup_frame[SETUP_FRAME_LEN];
-	char	*pa = &setup_frame[0];
-
-	memset(pa, 0xff, SETUP_FRAME_LEN);
-
-	for (i = 0; i < ETH_ALEN; i++) {
-		*(pa + (i & 1)) = dev->enetaddr[i];
-		if (i & 0x01) {
-			pa += 4;
-		}
-	}
-
-	for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-		if (i >= TOUT_LOOP) {
-			printf("%s: tx error buffer not ready\n", dev->name);
-			goto Done;
-		}
-	}
-
-	tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32) &setup_frame[0]));
-	tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_SET| SETUP_FRAME_LEN);
-	tx_ring[tx_new].status = cpu_to_le32(T_OWN);
-
-	OUTL(dev, POLL_DEMAND, DE4X5_TPD);
-
-	for(i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
-		if (i >= TOUT_LOOP) {
-			printf("%s: tx buffer not ready\n", dev->name);
-			goto Done;
-		}
-	}
-
-	if (le32_to_cpu(tx_ring[tx_new].status) != 0x7FFFFFFF) {
-		printf("TX error status2 = 0x%08X\n", le32_to_cpu(tx_ring[tx_new].status));
-	}
-	tx_new = (tx_new+1) % NUM_TX_DESC;
-
-Done:
-	return;
-}
-
-#if defined(UPDATE_SROM) || !defined(CONFIG_TULIP_FIX_DAVICOM)
-/* SROM Read and write routines.
- */
-static void
-sendto_srom(struct eth_device* dev, u_int command, u_long addr)
-{
-	OUTL(dev, command, addr);
+	dc2114x_outl(dev, command, addr);
 	udelay(1);
 }
 
-static int
-getfrom_srom(struct eth_device* dev, u_long addr)
+static int getfrom_srom(struct eth_device *dev, u_long addr)
 {
-	s32 tmp;
+	u32 tmp = dc2114x_inl(dev, addr);
 
-	tmp = INL(dev, addr);
 	udelay(1);
-
 	return tmp;
 }
 
 /* Note: this routine returns extra data bits for size detection. */
-static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location, int addr_len)
+static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location,
+			  int addr_len)
 {
-	int i;
-	unsigned retval = 0;
 	int read_cmd = location | (SROM_READ_CMD << addr_len);
+	unsigned int retval = 0;
+	int i;
 
 	sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
 	sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
-#ifdef DEBUG_SROM
-	printf(" EEPROM read at %d ", location);
-#endif
+	debug_cond(SROM_DLEVEL >= 1, " EEPROM read at %d ", location);
 
 	/* Shift the read command bits out. */
 	for (i = 4 + addr_len; i >= 0; i--) {
 		short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
-		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval, ioaddr);
+
+		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval,
+			    ioaddr);
 		udelay(10);
-		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK, ioaddr);
+		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | dataval | DT_CLK,
+			    ioaddr);
 		udelay(10);
-#ifdef DEBUG_SROM2
-		printf("%X", getfrom_srom(dev, ioaddr) & 15);
-#endif
-		retval = (retval << 1) | ((getfrom_srom(dev, ioaddr) & EE_DATA_READ) ? 1 : 0);
+		debug_cond(SROM_DLEVEL >= 2, "%X",
+			   getfrom_srom(dev, ioaddr) & 15);
+		retval = (retval << 1) |
+			 !!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
 	}
 
 	sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
-#ifdef DEBUG_SROM2
-	printf(" :%X:", getfrom_srom(dev, ioaddr) & 15);
-#endif
+	debug_cond(SROM_DLEVEL >= 2, " :%X:", getfrom_srom(dev, ioaddr) & 15);
 
 	for (i = 16; i > 0; i--) {
 		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
 		udelay(10);
-#ifdef DEBUG_SROM2
-		printf("%X", getfrom_srom(dev, ioaddr) & 15);
-#endif
-		retval = (retval << 1) | ((getfrom_srom(dev, ioaddr) & EE_DATA_READ) ? 1 : 0);
+		debug_cond(SROM_DLEVEL >= 2, "%X",
+			   getfrom_srom(dev, ioaddr) & 15);
+		retval = (retval << 1) |
+			 !!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
 		sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 		udelay(10);
 	}
@@ -588,145 +213,115 @@ static int do_read_eeprom(struct eth_device *dev, u_long ioaddr, int location, i
 	/* Terminate the EEPROM access. */
 	sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
 
-#ifdef DEBUG_SROM2
-	printf(" EEPROM value at %d is %5.5x.\n", location, retval);
-#endif
+	debug_cond(SROM_DLEVEL >= 2, " EEPROM value at %d is %5.5x.\n",
+		   location, retval);
 
 	return retval;
 }
-#endif	/* UPDATE_SROM || !CONFIG_TULIP_FIX_DAVICOM */
 
-/* This executes a generic EEPROM command, typically a write or write
+/*
+ * This executes a generic EEPROM command, typically a write or write
  * enable. It returns the data output from the EEPROM, and thus may
  * also be used for reads.
  */
-#if defined(UPDATE_SROM) || !defined(CONFIG_TULIP_FIX_DAVICOM)
-static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr, int cmd, int cmd_len)
+static int do_eeprom_cmd(struct eth_device *dev, u_long ioaddr, int cmd,
+			 int cmd_len)
 {
-	unsigned retval = 0;
+	unsigned int retval = 0;
 
-#ifdef DEBUG_SROM
-	printf(" EEPROM op 0x%x: ", cmd);
-#endif
+	debug_cond(SROM_DLEVEL >= 1, " EEPROM op 0x%x: ", cmd);
 
-	sendto_srom(dev,SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
+	sendto_srom(dev, SROM_RD | SROM_SR | DT_CS | DT_CLK, ioaddr);
 
 	/* Shift the command bits out. */
 	do {
-		short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
-		sendto_srom(dev,dataval, ioaddr);
+		short dataval = (cmd & BIT(cmd_len)) ? EE_WRITE_1 : EE_WRITE_0;
+
+		sendto_srom(dev, dataval, ioaddr);
 		udelay(10);
 
-#ifdef DEBUG_SROM2
-		printf("%X", getfrom_srom(dev,ioaddr) & 15);
-#endif
+		debug_cond(SROM_DLEVEL >= 2, "%X",
+			   getfrom_srom(dev, ioaddr) & 15);
 
-		sendto_srom(dev,dataval | DT_CLK, ioaddr);
+		sendto_srom(dev, dataval | DT_CLK, ioaddr);
 		udelay(10);
-		retval = (retval << 1) | ((getfrom_srom(dev,ioaddr) & EE_DATA_READ) ? 1 : 0);
+		retval = (retval << 1) |
+			 !!(getfrom_srom(dev, ioaddr) & EE_DATA_READ);
 	} while (--cmd_len >= 0);
-	sendto_srom(dev,SROM_RD | SROM_SR | DT_CS, ioaddr);
+
+	sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
 
 	/* Terminate the EEPROM access. */
-	sendto_srom(dev,SROM_RD | SROM_SR, ioaddr);
+	sendto_srom(dev, SROM_RD | SROM_SR, ioaddr);
 
-#ifdef DEBUG_SROM
-	printf(" EEPROM result is 0x%5.5x.\n", retval);
-#endif
+	debug_cond(SROM_DLEVEL >= 1, " EEPROM result is 0x%5.5x.\n", retval);
 
 	return retval;
 }
-#endif	/* UPDATE_SROM || !CONFIG_TULIP_FIX_DAVICOM */
 
-#ifndef CONFIG_TULIP_FIX_DAVICOM
 static int read_srom(struct eth_device *dev, u_long ioaddr, int index)
 {
-	int ee_addr_size = do_read_eeprom(dev, ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
+	int ee_addr_size;
 
-	return do_eeprom_cmd(dev, ioaddr,
-			     (((SROM_READ_CMD << ee_addr_size) | index) << 16)
-			     | 0xffff, 3 + ee_addr_size + 16);
+	ee_addr_size = (do_read_eeprom(dev, ioaddr, 0xff, 8) & BIT(18)) ? 8 : 6;
+
+	return do_eeprom_cmd(dev, ioaddr, 0xffff |
+			     (((SROM_READ_CMD << ee_addr_size) | index) << 16),
+			     3 + ee_addr_size + 16);
 }
-#endif	/* CONFIG_TULIP_FIX_DAVICOM */
 
 #ifdef UPDATE_SROM
-static int write_srom(struct eth_device *dev, u_long ioaddr, int index, int new_value)
+static int write_srom(struct eth_device *dev, u_long ioaddr, int index,
+		      int new_value)
 {
-	int ee_addr_size = do_read_eeprom(dev, ioaddr, 0xff, 8) & 0x40000 ? 8 : 6;
-	int i;
 	unsigned short newval;
+	int ee_addr_size;
+	int i;
 
-	udelay(10*1000); /* test-only */
+	ee_addr_size = (do_read_eeprom(dev, ioaddr, 0xff, 8) & BIT(18)) ? 8 : 6;
 
-#ifdef DEBUG_SROM
-	printf("ee_addr_size=%d.\n", ee_addr_size);
-	printf("Writing new entry 0x%4.4x to offset %d.\n", new_value, index);
-#endif
+	udelay(10 * 1000); /* test-only */
+
+	debug_cond(SROM_DLEVEL >= 1, "ee_addr_size=%d.\n", ee_addr_size);
+	debug_cond(SROM_DLEVEL >= 1,
+		   "Writing new entry 0x%4.4x to offset %d.\n",
+		   new_value, index);
 
 	/* Enable programming modes. */
-	do_eeprom_cmd(dev, ioaddr, (0x4f << (ee_addr_size-4)), 3+ee_addr_size);
+	do_eeprom_cmd(dev, ioaddr, 0x4f << (ee_addr_size - 4),
+		      3 + ee_addr_size);
 
 	/* Do the actual write. */
-	do_eeprom_cmd(dev, ioaddr,
-		      (((SROM_WRITE_CMD<<ee_addr_size)|index) << 16) | new_value,
+	do_eeprom_cmd(dev, ioaddr, new_value |
+		      (((SROM_WRITE_CMD << ee_addr_size) | index) << 16),
 		      3 + ee_addr_size + 16);
 
 	/* Poll for write finished. */
 	sendto_srom(dev, SROM_RD | SROM_SR | DT_CS, ioaddr);
-	for (i = 0; i < 10000; i++)			/* Typical 2000 ticks */
+	for (i = 0; i < 10000; i++) {	/* Typical 2000 ticks */
 		if (getfrom_srom(dev, ioaddr) & EE_DATA_READ)
 			break;
+	}
 
-#ifdef DEBUG_SROM
-	printf(" Write finished after %d ticks.\n", i);
-#endif
+	debug_cond(SROM_DLEVEL >= 1, " Write finished after %d ticks.\n", i);
 
 	/* Disable programming. */
-	do_eeprom_cmd(dev, ioaddr, (0x40 << (ee_addr_size-4)), 3 + ee_addr_size);
+	do_eeprom_cmd(dev, ioaddr, (0x40 << (ee_addr_size - 4)),
+		      3 + ee_addr_size);
 
 	/* And read the result. */
 	newval = do_eeprom_cmd(dev, ioaddr,
-			       (((SROM_READ_CMD<<ee_addr_size)|index) << 16)
+			       (((SROM_READ_CMD << ee_addr_size) | index) << 16)
 			       | 0xffff, 3 + ee_addr_size + 16);
-#ifdef DEBUG_SROM
-	printf("  New value at offset %d is %4.4x.\n", index, newval);
-#endif
-	return 1;
-}
-#endif
-
-#ifndef CONFIG_TULIP_FIX_DAVICOM
-static void read_hw_addr(struct eth_device *dev, bd_t *bis)
-{
-	u_short tmp, *p = (u_short *)(&dev->enetaddr[0]);
-	int i, j = 0;
 
-	for (i = 0; i < (ETH_ALEN >> 1); i++) {
-		tmp = read_srom(dev, DE4X5_APROM, ((SROM_HWADD >> 1) + i));
-		*p = le16_to_cpu(tmp);
-		j += *p++;
-	}
+	debug_cond(SROM_DLEVEL >= 1, "  New value at offset %d is %4.4x.\n",
+		   index, newval);
 
-	if ((j == 0) || (j == 0x2fffd)) {
-		memset (dev->enetaddr, 0, ETH_ALEN);
-		debug ("Warning: can't read HW address from SROM.\n");
-		goto Done;
-	}
-
-	return;
-
-Done:
-#ifdef UPDATE_SROM
-	update_srom(dev, bis);
-#endif
-	return;
+	return 1;
 }
-#endif	/* CONFIG_TULIP_FIX_DAVICOM */
 
-#ifdef UPDATE_SROM
 static void update_srom(struct eth_device *dev, bd_t *bis)
 {
-	int i;
 	static unsigned short eeprom[0x40] = {
 		0x140b, 0x6610, 0x0000, 0x0000,	/* 00 */
 		0x0000, 0x0000, 0x0000, 0x0000,	/* 04 */
@@ -746,16 +341,318 @@ static void update_srom(struct eth_device *dev, bd_t *bis)
 		0x0000, 0x0000, 0x0000, 0x4e07,	/* 3c */
 	};
 	uchar enetaddr[6];
+	int i;
 
 	/* Ethernet Addr... */
 	if (!eth_env_get_enetaddr("ethaddr", enetaddr))
 		return;
+
 	eeprom[0x0a] = (enetaddr[1] << 8) | enetaddr[0];
 	eeprom[0x0b] = (enetaddr[3] << 8) | enetaddr[2];
 	eeprom[0x0c] = (enetaddr[5] << 8) | enetaddr[4];
 
-	for (i=0; i<0x40; i++) {
+	for (i = 0; i < 0x40; i++)
 		write_srom(dev, DE4X5_APROM, i, eeprom[i]);
+}
+#endif /* UPDATE_SROM */
+
+static void send_setup_frame(struct eth_device *dev, bd_t *bis)
+{
+	char setup_frame[SETUP_FRAME_LEN];
+	char *pa = &setup_frame[0];
+	int i;
+
+	memset(pa, 0xff, SETUP_FRAME_LEN);
+
+	for (i = 0; i < ETH_ALEN; i++) {
+		*(pa + (i & 1)) = dev->enetaddr[i];
+		if (i & 0x01)
+			pa += 4;
+	}
+
+	for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+		if (i < TOUT_LOOP)
+			continue;
+
+		printf("%s: tx error buffer not ready\n", dev->name);
+		return;
+	}
+
+	tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32)&setup_frame[0]));
+	tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_SET | SETUP_FRAME_LEN);
+	tx_ring[tx_new].status = cpu_to_le32(T_OWN);
+
+	dc2114x_outl(dev, POLL_DEMAND, DE4X5_TPD);
+
+	for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+		if (i < TOUT_LOOP)
+			continue;
+
+		printf("%s: tx buffer not ready\n", dev->name);
+		return;
+	}
+
+	if (le32_to_cpu(tx_ring[tx_new].status) != 0x7FFFFFFF) {
+		printf("TX error status2 = 0x%08X\n",
+		       le32_to_cpu(tx_ring[tx_new].status));
+	}
+
+	tx_new = (tx_new + 1) % NUM_TX_DESC;
+}
+
+static int dc21x4x_send(struct eth_device *dev, void *packet, int length)
+{
+	int status = -1;
+	int i;
+
+	if (length <= 0) {
+		printf("%s: bad packet size: %d\n", dev->name, length);
+		goto done;
+	}
+
+	for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+		if (i < TOUT_LOOP)
+			continue;
+
+		printf("%s: tx error buffer not ready\n", dev->name);
+		goto done;
+	}
+
+	tx_ring[tx_new].buf = cpu_to_le32(phys_to_bus((u32)packet));
+	tx_ring[tx_new].des1 = cpu_to_le32(TD_TER | TD_LS | TD_FS | length);
+	tx_ring[tx_new].status = cpu_to_le32(T_OWN);
+
+	dc2114x_outl(dev, POLL_DEMAND, DE4X5_TPD);
+
+	for (i = 0; tx_ring[tx_new].status & cpu_to_le32(T_OWN); i++) {
+		if (i < TOUT_LOOP)
+			continue;
+
+		printf(".%s: tx buffer not ready\n", dev->name);
+		goto done;
+	}
+
+	if (le32_to_cpu(tx_ring[tx_new].status) & TD_ES) {
+		tx_ring[tx_new].status = 0x0;
+		goto done;
+	}
+
+	status = length;
+
+done:
+	tx_new = (tx_new + 1) % NUM_TX_DESC;
+	return status;
+}
+
+static int dc21x4x_recv(struct eth_device *dev)
+{
+	int length = 0;
+	u32 status;
+
+	while (true) {
+		status = le32_to_cpu(rx_ring[rx_new].status);
+
+		if (status & R_OWN)
+			break;
+
+		if (status & RD_LS) {
+			/* Valid frame status. */
+			if (status & RD_ES) {
+				/* There was an error. */
+				printf("RX error status = 0x%08X\n", status);
+			} else {
+				/* A valid frame received. */
+				length = (le32_to_cpu(rx_ring[rx_new].status)
+					  >> 16);
+
+				/* Pass the packet up to the protocol layers */
+				net_process_received_packet
+					(net_rx_packets[rx_new], length - 4);
+			}
+
+			/*
+			 * Change buffer ownership for this frame,
+			 * back to the adapter.
+			 */
+			rx_ring[rx_new].status = cpu_to_le32(R_OWN);
+		}
+
+		/* Update entry information. */
+		rx_new = (rx_new + 1) % rx_ring_size;
+	}
+
+	return length;
+}
+
+static int dc21x4x_init(struct eth_device *dev, bd_t *bis)
+{
+	int i;
+	int devbusfn = (int)dev->priv;
+
+	/* Ensure we're not sleeping. */
+	pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
+
+	reset_de4x5(dev);
+
+	if (dc2114x_inl(dev, DE4X5_STS) & (STS_TS | STS_RS)) {
+		printf("Error: Cannot reset ethernet controller.\n");
+		return -1;
+	}
+
+	dc2114x_outl(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR);
+
+	for (i = 0; i < NUM_RX_DESC; i++) {
+		rx_ring[i].status = cpu_to_le32(R_OWN);
+		rx_ring[i].des1 = cpu_to_le32(RX_BUFF_SZ);
+		rx_ring[i].buf =
+			cpu_to_le32(phys_to_bus((u32)net_rx_packets[i]));
+		rx_ring[i].next = 0;
+	}
+
+	for (i = 0; i < NUM_TX_DESC; i++) {
+		tx_ring[i].status = 0;
+		tx_ring[i].des1 = 0;
+		tx_ring[i].buf = 0;
+		tx_ring[i].next = 0;
 	}
+
+	rx_ring_size = NUM_RX_DESC;
+	tx_ring_size = NUM_TX_DESC;
+
+	/* Write the end of list marker to the descriptor lists. */
+	rx_ring[rx_ring_size - 1].des1 |= cpu_to_le32(RD_RER);
+	tx_ring[tx_ring_size - 1].des1 |= cpu_to_le32(TD_TER);
+
+	/* Tell the adapter where the TX/RX rings are located. */
+	dc2114x_outl(dev, phys_to_bus((u32)&rx_ring), DE4X5_RRBA);
+	dc2114x_outl(dev, phys_to_bus((u32)&tx_ring), DE4X5_TRBA);
+
+	start_de4x5(dev);
+
+	tx_new = 0;
+	rx_new = 0;
+
+	send_setup_frame(dev, bis);
+
+	return 0;
+}
+
+static void dc21x4x_halt(struct eth_device *dev)
+{
+	int devbusfn = (int)dev->priv;
+
+	stop_de4x5(dev);
+	dc2114x_outl(dev, 0, DE4X5_SICR);
+
+	pci_write_config_byte(devbusfn, PCI_CFDA_PSM, SLEEP);
+}
+
+static void read_hw_addr(struct eth_device *dev, bd_t *bis)
+{
+	u_short tmp, *p = (u_short *)(&dev->enetaddr[0]);
+	int i, j = 0;
+
+	for (i = 0; i < (ETH_ALEN >> 1); i++) {
+		tmp = read_srom(dev, DE4X5_APROM, (SROM_HWADD >> 1) + i);
+		*p = le16_to_cpu(tmp);
+		j += *p++;
+	}
+
+	if (!j || j == 0x2fffd) {
+		memset(dev->enetaddr, 0, ETH_ALEN);
+		debug("Warning: can't read HW address from SROM.\n");
+#ifdef UPDATE_SROM
+		update_srom(dev, bis);
+#endif
+	}
+}
+
+static struct pci_device_id supported[] = {
+	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TULIP_FAST },
+	{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142 },
+	{ }
+};
+
+int dc21x4x_initialize(bd_t *bis)
+{
+	struct eth_device *dev;
+	unsigned short status;
+	unsigned char timer;
+	unsigned int iobase;
+	int card_number = 0;
+	pci_dev_t devbusfn;
+	unsigned int cfrv;
+	int idx = 0;
+
+	while (1) {
+		devbusfn = pci_find_devices(supported, idx++);
+		if (devbusfn == -1)
+			break;
+
+		/* Get the chip configuration revision register. */
+		pci_read_config_dword(devbusfn, PCI_REVISION_ID, &cfrv);
+
+		if ((cfrv & CFRV_RN) < DC2114x_BRK) {
+			printf("Error: The chip is not DC21143.\n");
+			continue;
+		}
+
+		pci_read_config_word(devbusfn, PCI_COMMAND, &status);
+		status |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
+		pci_write_config_word(devbusfn, PCI_COMMAND, status);
+
+		pci_read_config_word(devbusfn, PCI_COMMAND, &status);
+		if (!(status & PCI_COMMAND_MEMORY)) {
+			printf("Error: Can not enable MEMORY access.\n");
+			continue;
+		}
+
+		if (!(status & PCI_COMMAND_MASTER)) {
+			printf("Error: Can not enable Bus Mastering.\n");
+			continue;
+		}
+
+		/* Check the latency timer for values >= 0x60. */
+		pci_read_config_byte(devbusfn, PCI_LATENCY_TIMER, &timer);
+
+		if (timer < 0x60) {
+			pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER,
+					      0x60);
+		}
+
+		/* read BAR for memory space access */
+		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase);
+		iobase &= PCI_BASE_ADDRESS_MEM_MASK;
+		debug("dc21x4x: DEC 21142 PCI Device @0x%x\n", iobase);
+
+		dev = (struct eth_device *)malloc(sizeof(*dev));
+		if (!dev) {
+			printf("Can not allocalte memory of dc21x4x\n");
+			break;
+		}
+
+		memset(dev, 0, sizeof(*dev));
+
+		sprintf(dev->name, "dc21x4x#%d", card_number);
+
+		dev->iobase = pci_mem_to_phys(devbusfn, iobase);
+		dev->priv = (void *)devbusfn;
+		dev->init = dc21x4x_init;
+		dev->halt = dc21x4x_halt;
+		dev->send = dc21x4x_send;
+		dev->recv = dc21x4x_recv;
+
+		/* Ensure we're not sleeping. */
+		pci_write_config_byte(devbusfn, PCI_CFDA_PSM, WAKEUP);
+
+		udelay(10 * 1000);
+
+		read_hw_addr(dev, bis);
+
+		eth_register(dev);
+
+		card_number++;
+	}
+
+	return card_number;
 }
-#endif	/* UPDATE_SROM */
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index baac277a84..b89a68afe4 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -13,13 +13,17 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <miiphy.h>
 #include <malloc.h>
+#include <net.h>
 #include <pci.h>
 #include <reset.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <asm/io.h>
diff --git a/drivers/net/designware.h b/drivers/net/designware.h
index 3519a4167a..ffaf5a14d0 100644
--- a/drivers/net/designware.h
+++ b/drivers/net/designware.h
@@ -7,6 +7,9 @@
 #ifndef _DW_ETH_H
 #define _DW_ETH_H
 
+#include <asm/cache.h>
+#include <net.h>
+
 #if CONFIG_IS_ENABLED(DM_GPIO)
 #include <asm-generic/gpio.h>
 #endif
diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c
index a6c0a2452f..d575a62592 100644
--- a/drivers/net/dm9000x.c
+++ b/drivers/net/dm9000x.c
@@ -54,6 +54,7 @@ TODO: external MII is not functional, only internal at the moment.
 #include <net.h>
 #include <asm/io.h>
 #include <dm9000.h>
+#include <linux/delay.h>
 
 #include "dm9000x.h"
 
diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c
index 933d1fc2f1..98e9b2c663 100644
--- a/drivers/net/dnet.c
+++ b/drivers/net/dnet.c
@@ -9,6 +9,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 
 #ifndef CONFIG_DNET_AUTONEG_TIMEOUT
 #define CONFIG_DNET_AUTONEG_TIMEOUT	5000000	/* default value */
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 63f2086dec..3f4437069b 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -31,6 +31,7 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <miiphy.h>
@@ -39,8 +40,16 @@
 #include <phy.h>
 #include <reset.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <eth_phy.h>
+#ifdef CONFIG_ARCH_IMX8M
+#include <asm/arch/clock.h>
+#include <asm/mach-imx/sys_proto.h>
+#endif
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* Core registers */
 
@@ -80,6 +89,7 @@ struct eqos_mac_regs {
 #define EQOS_MAC_CONFIGURATION_PS			BIT(15)
 #define EQOS_MAC_CONFIGURATION_FES			BIT(14)
 #define EQOS_MAC_CONFIGURATION_DM			BIT(13)
+#define EQOS_MAC_CONFIGURATION_LM			BIT(12)
 #define EQOS_MAC_CONFIGURATION_TE			BIT(1)
 #define EQOS_MAC_CONFIGURATION_RE			BIT(0)
 
@@ -101,11 +111,19 @@ struct eqos_mac_regs {
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_SHIFT			0
 #define EQOS_MAC_RXQ_CTRL2_PSRQ0_MASK			0xff
 
+#define EQOS_MAC_HW_FEATURE0_MMCSEL_SHIFT		8
+#define EQOS_MAC_HW_FEATURE0_HDSEL_SHIFT		2
+#define EQOS_MAC_HW_FEATURE0_GMIISEL_SHIFT		1
+#define EQOS_MAC_HW_FEATURE0_MIISEL_SHIFT		0
+
 #define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_SHIFT		6
 #define EQOS_MAC_HW_FEATURE1_TXFIFOSIZE_MASK		0x1f
 #define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_SHIFT		0
 #define EQOS_MAC_HW_FEATURE1_RXFIFOSIZE_MASK		0x1f
 
+#define EQOS_MAC_HW_FEATURE3_ASP_SHIFT			28
+#define EQOS_MAC_HW_FEATURE3_ASP_MASK			0x3
+
 #define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT			21
 #define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT			16
 #define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT			8
@@ -153,6 +171,8 @@ struct eqos_mtl_regs {
 #define EQOS_MTL_RXQ0_OPERATION_MODE_RFA_MASK		0x3f
 #define EQOS_MTL_RXQ0_OPERATION_MODE_EHFC		BIT(7)
 #define EQOS_MTL_RXQ0_OPERATION_MODE_RSF		BIT(5)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FEP		BIT(4)
+#define EQOS_MTL_RXQ0_OPERATION_MODE_FUP		BIT(3)
 
 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_SHIFT			16
 #define EQOS_MTL_RXQ0_DEBUG_PRXQ_MASK			0x7fff
@@ -367,7 +387,7 @@ static void eqos_inval_desc_tegra186(void *desc)
 #endif
 }
 
-static void eqos_inval_desc_stm32(void *desc)
+static void eqos_inval_desc_generic(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
@@ -385,7 +405,7 @@ static void eqos_flush_desc_tegra186(void *desc)
 #endif
 }
 
-static void eqos_flush_desc_stm32(void *desc)
+static void eqos_flush_desc_generic(void *desc)
 {
 #ifndef CONFIG_SYS_NONCACHED_MEMORY
 	unsigned long start = rounddown((unsigned long)desc, ARCH_DMA_MINALIGN);
@@ -404,7 +424,7 @@ static void eqos_inval_buffer_tegra186(void *buf, size_t size)
 	invalidate_dcache_range(start, end);
 }
 
-static void eqos_inval_buffer_stm32(void *buf, size_t size)
+static void eqos_inval_buffer_generic(void *buf, size_t size)
 {
 	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
 	unsigned long end = roundup((unsigned long)buf + size,
@@ -418,7 +438,7 @@ static void eqos_flush_buffer_tegra186(void *buf, size_t size)
 	flush_cache((unsigned long)buf, size);
 }
 
-static void eqos_flush_buffer_stm32(void *buf, size_t size)
+static void eqos_flush_buffer_generic(void *buf, size_t size)
 {
 	unsigned long start = rounddown((unsigned long)buf, ARCH_DMA_MINALIGN);
 	unsigned long end = roundup((unsigned long)buf + size,
@@ -521,6 +541,7 @@ static int eqos_mdio_write(struct mii_dev *bus, int mdio_addr, int mdio_devad,
 
 static int eqos_start_clks_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 
@@ -561,10 +582,12 @@ static int eqos_start_clks_tegra186(struct udevice *dev)
 		pr_err("clk_enable(clk_tx) failed: %d", ret);
 		goto err_disable_clk_ptp_ref;
 	}
+#endif
 
 	debug("%s: OK\n", __func__);
 	return 0;
 
+#ifdef CONFIG_CLK
 err_disable_clk_ptp_ref:
 	clk_disable(&eqos->clk_ptp_ref);
 err_disable_clk_rx:
@@ -576,10 +599,12 @@ err_disable_clk_slave_bus:
 err:
 	debug("%s: FAILED: %d\n", __func__, ret);
 	return ret;
+#endif
 }
 
 static int eqos_start_clks_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	int ret;
 
@@ -610,10 +635,12 @@ static int eqos_start_clks_stm32(struct udevice *dev)
 			goto err_disable_clk_tx;
 		}
 	}
+#endif
 
 	debug("%s: OK\n", __func__);
 	return 0;
 
+#ifdef CONFIG_CLK
 err_disable_clk_tx:
 	clk_disable(&eqos->clk_tx);
 err_disable_clk_rx:
@@ -623,10 +650,17 @@ err_disable_clk_master_bus:
 err:
 	debug("%s: FAILED: %d\n", __func__, ret);
 	return ret;
+#endif
+}
+
+static int eqos_start_clks_imx(struct udevice *dev)
+{
+	return 0;
 }
 
 static void eqos_stop_clks_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -636,12 +670,14 @@ static void eqos_stop_clks_tegra186(struct udevice *dev)
 	clk_disable(&eqos->clk_rx);
 	clk_disable(&eqos->clk_master_bus);
 	clk_disable(&eqos->clk_slave_bus);
+#endif
 
 	debug("%s: OK\n", __func__);
 }
 
 static void eqos_stop_clks_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -651,10 +687,16 @@ static void eqos_stop_clks_stm32(struct udevice *dev)
 	clk_disable(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_disable(&eqos->clk_ck);
+#endif
 
 	debug("%s: OK\n", __func__);
 }
 
+static void eqos_stop_clks_imx(struct udevice *dev)
+{
+	/* empty */
+}
+
 static int eqos_start_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -722,6 +764,11 @@ static int eqos_start_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_start_resets_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_stop_resets_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -749,6 +796,11 @@ static int eqos_stop_resets_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_stop_resets_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_calibrate_pads_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -803,16 +855,38 @@ static int eqos_disable_calibration_tegra186(struct udevice *dev)
 
 static ulong eqos_get_tick_clk_rate_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	return clk_get_rate(&eqos->clk_slave_bus);
+#else
+	return 0;
+#endif
 }
 
 static ulong eqos_get_tick_clk_rate_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	return clk_get_rate(&eqos->clk_master_bus);
+#else
+	return 0;
+#endif
+}
+
+__weak u32 imx_get_eqos_csr_clk(void)
+{
+	return 100 * 1000000;
+}
+__weak int imx_eqos_txclk_set_rate(unsigned long rate)
+{
+	return 0;
+}
+
+static ulong eqos_get_tick_clk_rate_imx(struct udevice *dev)
+{
+	return imx_get_eqos_csr_clk();
 }
 
 static int eqos_calibrate_pads_stm32(struct udevice *dev)
@@ -820,11 +894,21 @@ static int eqos_calibrate_pads_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_calibrate_pads_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_disable_calibration_stm32(struct udevice *dev)
 {
 	return 0;
 }
 
+static int eqos_disable_calibration_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_set_full_duplex(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -889,6 +973,7 @@ static int eqos_set_mii_speed_10(struct udevice *dev)
 
 static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 	ulong rate;
 	int ret;
@@ -915,6 +1000,7 @@ static int eqos_set_tx_clk_speed_tegra186(struct udevice *dev)
 		pr_err("clk_set_rate(tx_clk, %lu) failed: %d", rate, ret);
 		return ret;
 	}
+#endif
 
 	return 0;
 }
@@ -924,6 +1010,38 @@ static int eqos_set_tx_clk_speed_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_set_tx_clk_speed_imx(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	ulong rate;
+	int ret;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	switch (eqos->phy->speed) {
+	case SPEED_1000:
+		rate = 125 * 1000 * 1000;
+		break;
+	case SPEED_100:
+		rate = 25 * 1000 * 1000;
+		break;
+	case SPEED_10:
+		rate = 2.5 * 1000 * 1000;
+		break;
+	default:
+		pr_err("invalid speed %d", eqos->phy->speed);
+		return -EINVAL;
+	}
+
+	ret = imx_eqos_txclk_set_rate(rate);
+	if (ret < 0) {
+		pr_err("imx (tx_clk, %lu) failed: %d", rate, ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int eqos_adjust_link(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1031,6 +1149,16 @@ static int eqos_write_hwaddr(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_read_rom_hwaddr(struct udevice *dev)
+{
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+
+#ifdef CONFIG_ARCH_IMX8M
+	imx_get_mac_from_fuse(dev->req_seq, pdata->enetaddr);
+#endif
+	return !is_valid_ethaddr(pdata->enetaddr);
+}
+
 static int eqos_start(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1083,7 +1211,14 @@ static int eqos_start(struct udevice *dev)
 	 * don't need to reconnect/reconfigure again
 	 */
 	if (!eqos->phy) {
-		eqos->phy = phy_connect(eqos->mii, eqos->phyaddr, dev,
+		int addr = -1;
+#ifdef CONFIG_DM_ETH_PHY
+		addr = eth_phy_get_addr(dev);
+#endif
+#ifdef DWC_NET_PHYADDR
+		addr = DWC_NET_PHYADDR;
+#endif
+		eqos->phy = phy_connect(eqos->mii, addr, dev,
 					eqos->config->interface(dev));
 		if (!eqos->phy) {
 			pr_err("phy_connect() failed");
@@ -1123,6 +1258,7 @@ static int eqos_start(struct udevice *dev)
 	}
 
 	/* Configure MTL */
+	writel(0x60, &eqos->mtl_regs->txq0_quantum_weight - 0x100);
 
 	/* Enable Store and Forward mode for TX */
 	/* Program Tx operating mode */
@@ -1136,7 +1272,9 @@ static int eqos_start(struct udevice *dev)
 
 	/* Enable Store and Forward mode for RX, since no jumbo frame */
 	setbits_le32(&eqos->mtl_regs->rxq0_operation_mode,
-		     EQOS_MTL_RXQ0_OPERATION_MODE_RSF);
+		     EQOS_MTL_RXQ0_OPERATION_MODE_RSF |
+		     EQOS_MTL_RXQ0_OPERATION_MODE_FEP |
+		     EQOS_MTL_RXQ0_OPERATION_MODE_FUP);
 
 	/* Transmit/Receive queue fifo size; use all RAM for 1 queue */
 	val = readl(&eqos->mac_regs->hw_feature1);
@@ -1212,6 +1350,19 @@ static int eqos_start(struct udevice *dev)
 			eqos->config->config_mac <<
 			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
 
+	clrsetbits_le32(&eqos->mac_regs->rxq_ctrl0,
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_MASK <<
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT,
+			0x2 <<
+			EQOS_MAC_RXQ_CTRL0_RXQ0EN_SHIFT);
+
+	/* Multicast and Broadcast Queue Enable */
+	setbits_le32(&eqos->mac_regs->unused_0a4,
+		     0x00100000);
+	/* enable promise mode */
+	setbits_le32(&eqos->mac_regs->unused_004[1],
+		     0x1);
+
 	/* Set TX flow control parameters */
 	/* Set Pause Time */
 	setbits_le32(&eqos->mac_regs->q0_tx_flow_ctrl,
@@ -1288,9 +1439,13 @@ static int eqos_start(struct udevice *dev)
 		struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
 		rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
 					     (i * EQOS_MAX_PACKET_SIZE));
-		rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+		rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+		mb();
+		eqos->config->ops->eqos_flush_desc(rx_desc);
+		eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf +
+						(i * EQOS_MAX_PACKET_SIZE),
+						EQOS_MAX_PACKET_SIZE);
 	}
-	eqos->config->ops->eqos_flush_desc(eqos->descs);
 
 	writel(0, &eqos->dma_regs->ch0_txdesc_list_haddress);
 	writel((ulong)eqos->tx_descs, &eqos->dma_regs->ch0_txdesc_list_address);
@@ -1303,14 +1458,12 @@ static int eqos_start(struct udevice *dev)
 	       &eqos->dma_regs->ch0_rxdesc_ring_length);
 
 	/* Enable everything */
-
-	setbits_le32(&eqos->mac_regs->configuration,
-		     EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE);
-
 	setbits_le32(&eqos->dma_regs->ch0_tx_control,
 		     EQOS_DMA_CH0_TX_CONTROL_ST);
 	setbits_le32(&eqos->dma_regs->ch0_rx_control,
 		     EQOS_DMA_CH0_RX_CONTROL_SR);
+	setbits_le32(&eqos->mac_regs->configuration,
+		     EQOS_MAC_CONFIGURATION_TE | EQOS_MAC_CONFIGURATION_RE);
 
 	/* TX tail pointer not written until we need to TX a packet */
 	/*
@@ -1419,7 +1572,8 @@ static int eqos_send(struct udevice *dev, void *packet, int length)
 	tx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_FD | EQOS_DESC3_LD | length;
 	eqos->config->ops->eqos_flush_desc(tx_desc);
 
-	writel((ulong)(tx_desc + 1), &eqos->dma_regs->ch0_txdesc_tail_pointer);
+	writel((ulong)(&(eqos->tx_descs[eqos->tx_desc_idx])),
+		&eqos->dma_regs->ch0_txdesc_tail_pointer);
 
 	for (i = 0; i < 1000000; i++) {
 		eqos->config->ops->eqos_inval_desc(tx_desc);
@@ -1442,6 +1596,7 @@ static int eqos_recv(struct udevice *dev, int flags, uchar **packetp)
 	debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
 
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+	eqos->config->ops->eqos_inval_desc(rx_desc);
 	if (rx_desc->des3 & EQOS_DESC3_OWN) {
 		debug("%s: RX packet not available\n", __func__);
 		return -EAGAIN;
@@ -1473,7 +1628,14 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 		return -EINVAL;
 	}
 
+	eqos->config->ops->eqos_inval_buffer(packet, length);
+
 	rx_desc = &(eqos->rx_descs[eqos->rx_desc_idx]);
+
+	rx_desc->des0 = 0;
+	mb();
+	eqos->config->ops->eqos_flush_desc(rx_desc);
+	eqos->config->ops->eqos_inval_buffer(packet, length);
 	rx_desc->des0 = (u32)(ulong)packet;
 	rx_desc->des1 = 0;
 	rx_desc->des2 = 0;
@@ -1482,7 +1644,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
 	 * writes to the rest of the descriptor too.
 	 */
 	mb();
-	rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
+	rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
 	eqos->config->ops->eqos_flush_desc(rx_desc);
 
 	writel((ulong)rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);
@@ -1536,6 +1698,9 @@ static int eqos_probe_resources_core(struct udevice *dev)
 	}
 	debug("%s: rx_pkt=%p\n", __func__, eqos->rx_pkt);
 
+	eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf,
+			EQOS_MAX_PACKET_SIZE * EQOS_DESCRIPTORS_RX);
+
 	debug("%s: OK\n", __func__);
 	return 0;
 
@@ -1741,17 +1906,52 @@ static phy_interface_t eqos_get_interface_tegra186(struct udevice *dev)
 	return PHY_INTERFACE_MODE_MII;
 }
 
+static int eqos_probe_resources_imx(struct udevice *dev)
+{
+	struct eqos_priv *eqos = dev_get_priv(dev);
+	phy_interface_t interface;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	interface = eqos->config->interface(dev);
+
+	if (interface == PHY_INTERFACE_MODE_NONE) {
+		pr_err("Invalid PHY interface\n");
+		return -EINVAL;
+	}
+
+	debug("%s: OK\n", __func__);
+	return 0;
+}
+
+static phy_interface_t eqos_get_interface_imx(struct udevice *dev)
+{
+	const char *phy_mode;
+	phy_interface_t interface = PHY_INTERFACE_MODE_NONE;
+
+	debug("%s(dev=%p):\n", __func__, dev);
+
+	phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode",
+			       NULL);
+	if (phy_mode)
+		interface = phy_get_interface_by_name(phy_mode);
+
+	return interface;
+}
+
 static int eqos_remove_resources_tegra186(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
 
+#ifdef CONFIG_CLK
 	clk_free(&eqos->clk_tx);
 	clk_free(&eqos->clk_ptp_ref);
 	clk_free(&eqos->clk_rx);
 	clk_free(&eqos->clk_slave_bus);
 	clk_free(&eqos->clk_master_bus);
+#endif
 	dm_gpio_free(dev, &eqos->phy_reset_gpio);
 	reset_free(&eqos->reset_ctl);
 
@@ -1761,6 +1961,7 @@ static int eqos_remove_resources_tegra186(struct udevice *dev)
 
 static int eqos_remove_resources_stm32(struct udevice *dev)
 {
+#ifdef CONFIG_CLK
 	struct eqos_priv *eqos = dev_get_priv(dev);
 
 	debug("%s(dev=%p):\n", __func__, dev);
@@ -1770,6 +1971,7 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	clk_free(&eqos->clk_master_bus);
 	if (clk_valid(&eqos->clk_ck))
 		clk_free(&eqos->clk_ck);
+#endif
 
 	if (dm_gpio_is_valid(&eqos->phy_reset_gpio))
 		dm_gpio_free(dev, &eqos->phy_reset_gpio);
@@ -1778,6 +1980,11 @@ static int eqos_remove_resources_stm32(struct udevice *dev)
 	return 0;
 }
 
+static int eqos_remove_resources_imx(struct udevice *dev)
+{
+	return 0;
+}
+
 static int eqos_probe(struct udevice *dev)
 {
 	struct eqos_priv *eqos = dev_get_priv(dev);
@@ -1810,23 +2017,32 @@ static int eqos_probe(struct udevice *dev)
 		goto err_remove_resources_core;
 	}
 
-	eqos->mii = mdio_alloc();
+#ifdef CONFIG_DM_ETH_PHY
+	eqos->mii = eth_phy_get_mdio_bus(dev);
+#endif
 	if (!eqos->mii) {
-		pr_err("mdio_alloc() failed");
-		ret = -ENOMEM;
-		goto err_remove_resources_tegra;
-	}
-	eqos->mii->read = eqos_mdio_read;
-	eqos->mii->write = eqos_mdio_write;
-	eqos->mii->priv = eqos;
-	strcpy(eqos->mii->name, dev->name);
+		eqos->mii = mdio_alloc();
+		if (!eqos->mii) {
+			pr_err("mdio_alloc() failed");
+			ret = -ENOMEM;
+			goto err_remove_resources_tegra;
+		}
+		eqos->mii->read = eqos_mdio_read;
+		eqos->mii->write = eqos_mdio_write;
+		eqos->mii->priv = eqos;
+		strcpy(eqos->mii->name, dev->name);
 
-	ret = mdio_register(eqos->mii);
-	if (ret < 0) {
-		pr_err("mdio_register() failed: %d", ret);
-		goto err_free_mdio;
+		ret = mdio_register(eqos->mii);
+		if (ret < 0) {
+			pr_err("mdio_register() failed: %d", ret);
+			goto err_free_mdio;
+		}
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_set_mdio_bus(dev, eqos->mii);
+#endif
+
 	debug("%s: OK\n", __func__);
 	return 0;
 
@@ -1864,6 +2080,7 @@ static const struct eth_ops eqos_ops = {
 	.recv = eqos_recv,
 	.free_pkt = eqos_free_pkt,
 	.write_hwaddr = eqos_write_hwaddr,
+	.read_rom_hwaddr	= eqos_read_rom_hwaddr,
 };
 
 static struct eqos_ops eqos_tegra186_ops = {
@@ -1894,10 +2111,10 @@ static const struct eqos_config eqos_tegra186_config = {
 };
 
 static struct eqos_ops eqos_stm32_ops = {
-	.eqos_inval_desc = eqos_inval_desc_stm32,
-	.eqos_flush_desc = eqos_flush_desc_stm32,
-	.eqos_inval_buffer = eqos_inval_buffer_stm32,
-	.eqos_flush_buffer = eqos_flush_buffer_stm32,
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
 	.eqos_probe_resources = eqos_probe_resources_stm32,
 	.eqos_remove_resources = eqos_remove_resources_stm32,
 	.eqos_stop_resets = eqos_stop_resets_stm32,
@@ -1920,6 +2137,33 @@ static const struct eqos_config eqos_stm32_config = {
 	.ops = &eqos_stm32_ops
 };
 
+static struct eqos_ops eqos_imx_ops = {
+	.eqos_inval_desc = eqos_inval_desc_generic,
+	.eqos_flush_desc = eqos_flush_desc_generic,
+	.eqos_inval_buffer = eqos_inval_buffer_generic,
+	.eqos_flush_buffer = eqos_flush_buffer_generic,
+	.eqos_probe_resources = eqos_probe_resources_imx,
+	.eqos_remove_resources = eqos_remove_resources_imx,
+	.eqos_stop_resets = eqos_stop_resets_imx,
+	.eqos_start_resets = eqos_start_resets_imx,
+	.eqos_stop_clks = eqos_stop_clks_imx,
+	.eqos_start_clks = eqos_start_clks_imx,
+	.eqos_calibrate_pads = eqos_calibrate_pads_imx,
+	.eqos_disable_calibration = eqos_disable_calibration_imx,
+	.eqos_set_tx_clk_speed = eqos_set_tx_clk_speed_imx,
+	.eqos_get_tick_clk_rate = eqos_get_tick_clk_rate_imx
+};
+
+struct eqos_config eqos_imx_config = {
+	.reg_access_always_ok = false,
+	.mdio_wait = 10000,
+	.swr_wait = 50,
+	.config_mac = EQOS_MAC_RXQ_CTRL0_RXQ0EN_ENABLED_DCB,
+	.config_mac_mdio = EQOS_MAC_MDIO_ADDRESS_CR_250_300,
+	.interface = eqos_get_interface_imx,
+	.ops = &eqos_imx_ops
+};
+
 static const struct udevice_id eqos_ids[] = {
 	{
 		.compatible = "nvidia,tegra186-eqos",
@@ -1929,6 +2173,10 @@ static const struct udevice_id eqos_ids[] = {
 		.compatible = "snps,dwmac-4.20a",
 		.data = (ulong)&eqos_stm32_config
 	},
+	{
+		.compatible = "fsl,imx-eqos",
+		.data = (ulong)&eqos_imx_config
+	},
 
 	{ }
 };
@@ -1936,7 +2184,7 @@ static const struct udevice_id eqos_ids[] = {
 U_BOOT_DRIVER(eth_eqos) = {
 	.name = "eth_eqos",
 	.id = UCLASS_ETH,
-	.of_match = eqos_ids,
+	.of_match = of_match_ptr(eqos_ids),
 	.probe = eqos_probe,
 	.remove = eqos_remove,
 	.ops = &eqos_ops,
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index 9212920549..008da4ab3e 100644
--- a/drivers/net/e1000.c
+++ b/drivers/net/e1000.c
@@ -30,13 +30,18 @@ tested on both gig copper and gig fiber boards
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <net.h>
 #include <pci.h>
+#include <linux/delay.h>
 #include "e1000.h"
+#include <asm/cache.h>
 
 #define TOUT_LOOP   100000
 
@@ -5759,8 +5764,8 @@ struct e1000_hw *e1000_find_card(unsigned int cardnum)
 #endif /* !CONFIG_DM_ETH */
 
 #ifdef CONFIG_CMD_E1000
-static int do_e1000(cmd_tbl_t *cmdtp, int flag,
-		int argc, char * const argv[])
+static int do_e1000(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	unsigned char *mac = NULL;
 #ifdef CONFIG_DM_ETH
diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
index 2ae3085515..19ed4777d9 100644
--- a/drivers/net/e1000.h
+++ b/drivers/net/e1000.h
@@ -74,8 +74,8 @@ void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t *eecd);
 #endif
 
 #ifdef CONFIG_E1000_SPI
-int do_e1000_spi(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[]);
+int do_e1000_spi(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+		 int argc, char *const argv[]);
 #endif
 
 /* Enumerated types specific to the e1000 hardware */
diff --git a/drivers/net/e1000_spi.c b/drivers/net/e1000_spi.c
index 52b3c79794..4fcc65d978 100644
--- a/drivers/net/e1000_spi.c
+++ b/drivers/net/e1000_spi.c
@@ -1,5 +1,7 @@
 #include <common.h>
+#include <command.h>
 #include <console.h>
+#include <linux/delay.h>
 #include "e1000.h"
 #include <malloc.h>
 #include <linux/compiler.h>
@@ -315,8 +317,8 @@ static int e1000_spi_eeprom_program(struct e1000_hw *hw,
 	return 0;
 }
 
-static int do_e1000_spi_show(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[])
+static int do_e1000_spi_show(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+			     int argc, char *const argv[])
 {
 	unsigned int length = 0;
 	u16 i, offset = 0;
@@ -384,8 +386,8 @@ static int do_e1000_spi_show(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
 	return 0;
 }
 
-static int do_e1000_spi_dump(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[])
+static int do_e1000_spi_dump(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+			     int argc, char *const argv[])
 {
 	unsigned int length;
 	u16 offset;
@@ -429,8 +431,8 @@ static int do_e1000_spi_dump(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
 	return 0;
 }
 
-static int do_e1000_spi_program(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[])
+static int do_e1000_spi_program(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+				int argc, char *const argv[])
 {
 	unsigned int length;
 	const void *source;
@@ -464,8 +466,8 @@ static int do_e1000_spi_program(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
 	return 0;
 }
 
-static int do_e1000_spi_checksum(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[])
+static int do_e1000_spi_checksum(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+				 int argc, char *const argv[])
 {
 	uint16_t i, length, checksum = 0, checksum_reg;
 	uint16_t *buffer;
@@ -540,8 +542,8 @@ static int do_e1000_spi_checksum(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
 	return 0;
 }
 
-int do_e1000_spi(cmd_tbl_t *cmdtp, struct e1000_hw *hw,
-		int argc, char * const argv[])
+int do_e1000_spi(struct cmd_tbl *cmdtp, struct e1000_hw *hw,
+		 int argc, char *const argv[])
 {
 	if (argc < 1) {
 		cmd_usage(cmdtp);
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c
index 2fe0ba6e20..e186ab4e5f 100644
--- a/drivers/net/eepro100.c
+++ b/drivers/net/eepro100.c
@@ -11,6 +11,7 @@
 #include <asm/io.h>
 #include <pci.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 
 #undef DEBUG
 
@@ -462,7 +463,7 @@ int eepro100_initialize (bd_t * bis)
 		 */
 		pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x20);
 
-		udelay (10 * 1000);
+		udelay(10 * 1000);
 
 		read_hw_addr (dev, bis);
 	}
@@ -480,10 +481,10 @@ static int eepro100_init (struct eth_device *dev, bd_t * bis)
 	/* Reset the ethernet controller
 	 */
 	OUTL (dev, I82559_SELECTIVE_RESET, SCBPort);
-	udelay (20);
+	udelay(20);
 
 	OUTL (dev, I82559_RESET, SCBPort);
-	udelay (20);
+	udelay(20);
 
 	if (!wait_for_eepro100 (dev)) {
 		printf ("Error: Can not reset ethernet controller.\n");
@@ -721,10 +722,10 @@ static void eepro100_halt (struct eth_device *dev)
 	/* Reset the ethernet controller
 	 */
 	OUTL (dev, I82559_SELECTIVE_RESET, SCBPort);
-	udelay (20);
+	udelay(20);
 
 	OUTL (dev, I82559_RESET, SCBPort);
-	udelay (20);
+	udelay(20);
 
 	if (!wait_for_eepro100 (dev)) {
 		printf ("Error: Can not reset ethernet controller.\n");
@@ -760,19 +761,19 @@ static int read_eeprom (struct eth_device *dev, int location, int addr_len)
 		short dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
 
 		OUTW (dev, EE_ENB | dataval, SCBeeprom);
-		udelay (1);
+		udelay(1);
 		OUTW (dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom);
-		udelay (1);
+		udelay(1);
 	}
 	OUTW (dev, EE_ENB, SCBeeprom);
 
 	for (i = 15; i >= 0; i--) {
 		OUTW (dev, EE_ENB | EE_SHIFT_CLK, SCBeeprom);
-		udelay (1);
+		udelay(1);
 		retval = (retval << 1) |
 				((INW (dev, SCBeeprom) & EE_DATA_READ) ? 1 : 0);
 		OUTW (dev, EE_ENB, SCBeeprom);
-		udelay (1);
+		udelay(1);
 	}
 
 	/* Terminate the EEPROM access. */
diff --git a/drivers/net/ep93xx_eth.c b/drivers/net/ep93xx_eth.c
index ecb34b2450..894ffc9d2b 100644
--- a/drivers/net/ep93xx_eth.c
+++ b/drivers/net/ep93xx_eth.c
@@ -18,10 +18,13 @@
 
 #include <command.h>
 #include <common.h>
+#include <log.h>
+#include <net.h>
 #include <asm/arch/ep93xx.h>
 #include <asm/io.h>
 #include <malloc.h>
 #include <miiphy.h>
+#include <linux/bug.h>
 #include <linux/types.h>
 #include "ep93xx_eth.h"
 
diff --git a/drivers/net/eth-phy-uclass.c b/drivers/net/eth-phy-uclass.c
new file mode 100644
index 0000000000..b383f45527
--- /dev/null
+++ b/drivers/net/eth-phy-uclass.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <net.h>
+#include <dm/device-internal.h>
+#include <dm/uclass-internal.h>
+#include <dm/lists.h>
+
+struct eth_phy_device_priv {
+	struct mii_dev *mdio_bus;
+};
+
+int eth_phy_binds_nodes(struct udevice *eth_dev)
+{
+	ofnode mdio_node, phy_node;
+	const char *node_name;
+	int ret;
+
+	mdio_node = dev_read_subnode(eth_dev, "mdio");
+	if (!ofnode_valid(mdio_node)) {
+		debug("%s: %s mdio subnode not found!", __func__,
+		      eth_dev->name);
+		return -ENXIO;
+	}
+
+	ofnode_for_each_subnode(phy_node, mdio_node) {
+		node_name = ofnode_get_name(phy_node);
+
+		debug("* Found child node: '%s'\n", node_name);
+
+		ret = device_bind_driver_to_node(eth_dev,
+						 "eth_phy_generic_drv",
+						 node_name, phy_node, NULL);
+		if (ret) {
+			debug("  - Eth phy binding error: %d\n", ret);
+			continue;
+		}
+
+		debug("  - bound phy device: '%s'\n", node_name);
+	}
+
+	return 0;
+}
+
+int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus)
+{
+	struct udevice *dev;
+	struct eth_phy_device_priv *uc_priv;
+
+	for (uclass_first_device(UCLASS_ETH_PHY, &dev); dev;
+	     uclass_next_device(&dev)) {
+		if (dev->parent == eth_dev) {
+			uc_priv = (struct eth_phy_device_priv *)(dev->uclass_priv);
+
+			if (!uc_priv->mdio_bus)
+				uc_priv->mdio_bus = mdio_bus;
+		}
+	}
+
+	return 0;
+}
+
+struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev)
+{
+	int ret;
+	struct udevice *phy_dev;
+	struct eth_phy_device_priv *uc_priv;
+
+	/* Will probe the parent of phy device, then phy device */
+	ret = uclass_get_device_by_phandle(UCLASS_ETH_PHY, eth_dev,
+					   "phy-handle", &phy_dev);
+	if (!ret) {
+		if (eth_dev != phy_dev->parent) {
+			/*
+			 * phy_dev is shared and controlled by
+			 * other eth controller
+			 */
+			uc_priv = (struct eth_phy_device_priv *)(phy_dev->uclass_priv);
+			if (uc_priv->mdio_bus)
+				printf("Get shared mii bus on %s\n", eth_dev->name);
+			else
+				printf("Can't get shared mii bus on %s\n", eth_dev->name);
+
+			return uc_priv->mdio_bus;
+		}
+	} else {
+		printf("FEC: can't find phy-handle\n");
+	}
+
+	return NULL;
+}
+
+int eth_phy_get_addr(struct udevice *dev)
+{
+	struct ofnode_phandle_args phandle_args;
+	int reg;
+
+	if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
+				       &phandle_args)) {
+		debug("Failed to find phy-handle");
+		return -ENODEV;
+	}
+
+	reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
+
+	return reg;
+}
+
+UCLASS_DRIVER(eth_phy_generic) = {
+	.id		= UCLASS_ETH_PHY,
+	.name		= "eth_phy_generic",
+	.per_device_auto_alloc_size = sizeof(struct eth_phy_device_priv),
+};
+
+U_BOOT_DRIVER(eth_phy_generic_drv) = {
+	.name		= "eth_phy_generic_drv",
+	.id		= UCLASS_ETH_PHY,
+};
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index be5d9add61..81d0f3d7f8 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/platform_data/net_ethoc.h>
 #include <linux/io.h>
 #include <malloc.h>
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index bc5b63d788..9ae2db033e 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -11,11 +11,14 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <miiphy.h>
 #include <net.h>
 #include <netdev.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 #include <asm/io.h>
@@ -28,6 +31,7 @@
 #include <asm-generic/gpio.h>
 
 #include "fec_mxc.h"
+#include <eth_phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -503,6 +507,16 @@ static int fec_open(struct eth_device *edev)
 	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN,
 	       &fec->eth->ecntrl);
 
+#ifdef FEC_ENET_ENABLE_TXC_DELAY
+	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_TXC_DLY,
+	       &fec->eth->ecntrl);
+#endif
+
+#ifdef FEC_ENET_ENABLE_RXC_DELAY
+	writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_RXC_DLY,
+	       &fec->eth->ecntrl);
+#endif
+
 #if defined(CONFIG_MX25) || defined(CONFIG_MX53) || defined(CONFIG_MX6SL)
 	udelay(100);
 
@@ -1194,6 +1208,13 @@ int fecmxc_initialize_multi(bd_t *bd, int dev_id, int phy_id, uint32_t addr)
 #endif
 	int ret;
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (enet_fused((ulong)addr)) {
+			printf("SoC fuse indicates Ethernet@0x%x is unavailable.\n", addr);
+			return -ENODEV;
+		}
+	}
+
 #ifdef CONFIG_FEC_MXC_MDIO_BASE
 	/*
 	 * The i.MX28 has two ethernet interfaces, but they are not equal.
@@ -1332,6 +1353,13 @@ static int fecmxc_probe(struct udevice *dev)
 	uint32_t start;
 	int ret;
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (enet_fused((ulong)priv->eth)) {
+			printf("SoC fuse indicates Ethernet@0x%lx is unavailable.\n", (ulong)priv->eth);
+			return -ENODEV;
+		}
+	}
+
 	if (IS_ENABLED(CONFIG_IMX8)) {
 		ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk);
 		if (ret < 0) {
@@ -1420,16 +1448,27 @@ static int fecmxc_probe(struct udevice *dev)
 	fec_reg_setup(priv);
 
 	priv->dev_id = dev->seq;
+
+#ifdef CONFIG_DM_ETH_PHY
+	bus = eth_phy_get_mdio_bus(dev);
+#endif
+
+	if (!bus) {
 #ifdef CONFIG_FEC_MXC_MDIO_BASE
-	bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq);
+		bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq);
 #else
-	bus = fec_get_miibus((ulong)priv->eth, dev->seq);
+		bus = fec_get_miibus((ulong)priv->eth, dev->seq);
 #endif
+	}
 	if (!bus) {
 		ret = -ENOMEM;
 		goto err_mii;
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_set_mdio_bus(dev, bus);
+#endif
+
 	priv->bus = bus;
 	priv->interface = pdata->phy_interface;
 	switch (priv->interface) {
diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h
index 159aec8967..0e8f08a51a 100644
--- a/drivers/net/fec_mxc.h
+++ b/drivers/net/fec_mxc.h
@@ -188,6 +188,8 @@ struct ethernet_regs {
 #define FEC_ECNTRL_ETHER_EN		0x00000002	/* enable the FEC */
 #define FEC_ECNTRL_SPEED		0x00000020
 #define FEC_ECNTRL_DBSWAP		0x00000100
+#define FEC_ECNTRL_TXC_DLY		0x00010000	/* TXC delayed */
+#define FEC_ECNTRL_RXC_DLY		0x00020000	/* RXC delayed */
 
 #define FEC_X_WMRK_STRFWD		0x00000100
 
@@ -271,8 +273,6 @@ struct fec_priv {
 	u32 clk_rate;
 };
 
-void imx_get_mac_from_fuse(int dev_id, unsigned char *mac);
-
 /**
  * @brief Numbers of buffer descriptors for receiving
  *
diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c
index 4c78a4d63f..c51a65cb94 100644
--- a/drivers/net/fm/dtsec.c
+++ b/drivers/net/fm/dtsec.c
@@ -9,6 +9,7 @@
 #include <fsl_dtsec.h>
 #include <fsl_mdio.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 #include "fm.h"
 
diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c
index 88019c9a88..62396d3a16 100644
--- a/drivers/net/fm/eth.c
+++ b/drivers/net/fm/eth.c
@@ -1,10 +1,19 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2009-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  *	Dave Liu <daveliu@freescale.com>
  */
 #include <common.h>
+#include <log.h>
+#include <part.h>
 #include <asm/io.h>
+#ifdef CONFIG_DM_ETH
+#include <dm.h>
+#include <dm/ofnode.h>
+#include <linux/compat.h>
+#include <phy_interface.h>
+#endif
 #include <malloc.h>
 #include <net.h>
 #include <hwconfig.h>
@@ -15,11 +24,14 @@
 #include <fsl_dtsec.h>
 #include <fsl_tgec.h>
 #include <fsl_memac.h>
+#include <linux/delay.h>
 
 #include "fm.h"
 
+#ifndef CONFIG_DM_ETH
 static struct eth_device *devlist[NUM_FM_PORTS];
 static int num_controllers;
+#endif
 
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
 
@@ -37,10 +49,18 @@ static void dtsec_configure_serdes(struct fm_eth *priv)
 #ifdef CONFIG_SYS_FMAN_V3
 	u32 value;
 	struct mii_dev bus;
-	bus.priv = priv->mac->phyregs;
 	bool sgmii_2500 = (priv->enet_if ==
 			PHY_INTERFACE_MODE_SGMII_2500) ? true : false;
-	int i = 0;
+	int i = 0, j;
+
+#ifndef CONFIG_DM_ETH
+	bus.priv = priv->mac->phyregs;
+#else
+	bus.priv = priv->pcs_mdio;
+	bus.read = memac_mdio_read;
+	bus.write = memac_mdio_write;
+	bus.reset = memac_mdio_reset;
+#endif
 
 qsgmii_loop:
 	/* SGMII IF mode + AN enable only for 1G SGMII, not for 2.5G */
@@ -51,6 +71,10 @@ qsgmii_loop:
 	else
 		value = PHY_SGMII_IF_MODE_SGMII | PHY_SGMII_IF_MODE_AN;
 
+	for (j = 0; j <= 3; j++)
+		debug("dump PCS reg %#x: %#x\n", j,
+		      memac_mdio_read(&bus, i, MDIO_DEVAD_NONE, j));
+
 	memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value);
 
 	/* Dev ability according to SGMII specification */
@@ -98,9 +122,8 @@ qsgmii_loop:
 #endif
 }
 
-static void dtsec_init_phy(struct eth_device *dev)
+static void dtsec_init_phy(struct fm_eth *fm_eth)
 {
-	struct fm_eth *fm_eth = dev->priv;
 #ifndef CONFIG_SYS_FMAN_V3
 	struct dtsec *regs = (struct dtsec *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
 
@@ -114,10 +137,10 @@ static void dtsec_init_phy(struct eth_device *dev)
 		dtsec_configure_serdes(fm_eth);
 }
 
+#ifndef CONFIG_DM_ETH
 #ifdef CONFIG_PHYLIB
-static int tgec_is_fibre(struct eth_device *dev)
+static int tgec_is_fibre(struct fm_eth *fm)
 {
-	struct fm_eth *fm = dev->priv;
 	char phyopt[20];
 
 	sprintf(phyopt, "fsl_fm%d_xaui_phy", fm->fm_index + 1);
@@ -125,6 +148,7 @@ static int tgec_is_fibre(struct eth_device *dev)
 	return hwconfig_arg_cmp(phyopt, "xfi");
 }
 #endif
+#endif /* CONFIG_DM_ETH */
 #endif
 
 static u16 muram_readw(u16 *addr)
@@ -168,6 +192,8 @@ static void bmi_rx_port_disable(struct fm_bmi_rx_port *rx_port)
 	/* wait until the rx port is not busy */
 	while ((in_be32(&rx_port->fmbm_rst) & FMBM_RST_BSY) && timeout--)
 		;
+	if (!timeout)
+		printf("%s - timeout\n", __func__);
 }
 
 static void bmi_rx_port_init(struct fm_bmi_rx_port *rx_port)
@@ -196,6 +222,8 @@ static void bmi_tx_port_disable(struct fm_bmi_tx_port *tx_port)
 	/* wait until the tx port is not busy */
 	while ((in_be32(&tx_port->fmbm_tst) & FMBM_TST_BSY) && timeout--)
 		;
+	if (!timeout)
+		printf("%s - timeout\n", __func__);
 }
 
 static void bmi_tx_port_init(struct fm_bmi_tx_port *tx_port)
@@ -435,23 +463,39 @@ static void fmc_tx_port_graceful_stop_disable(struct fm_eth *fm_eth)
 	sync();
 }
 
+#ifndef CONFIG_DM_ETH
 static int fm_eth_open(struct eth_device *dev, bd_t *bd)
+#else
+static int fm_eth_open(struct udevice *dev)
+#endif
 {
-	struct fm_eth *fm_eth;
+#ifndef CONFIG_DM_ETH
+	struct fm_eth *fm_eth = dev->priv;
+#else
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+	struct fm_eth *fm_eth = dev_get_priv(dev);
+#endif
+	unsigned char *enetaddr;
 	struct fsl_enet_mac *mac;
 #ifdef CONFIG_PHYLIB
 	int ret;
 #endif
 
-	fm_eth = (struct fm_eth *)dev->priv;
 	mac = fm_eth->mac;
 
+#ifndef CONFIG_DM_ETH
+	enetaddr = &dev->enetaddr[0];
+#else
+	enetaddr = pdata->enetaddr;
+#endif
+
 	/* setup the MAC address */
-	if (dev->enetaddr[0] & 0x01) {
-		printf("%s: MacAddress is multcast address\n",	__func__);
-		return 1;
+	if (enetaddr[0] & 0x01) {
+		printf("%s: MacAddress is multicast address\n",	__func__);
+		enetaddr[0] = 0;
+		enetaddr[5] = fm_eth->num;
 	}
-	mac->set_mac_addr(mac, dev->enetaddr);
+	mac->set_mac_addr(mac, enetaddr);
 
 	/* enable bmi Rx port */
 	setbits_be32(&fm_eth->rx_port->fmbm_rcfg, FMBM_RCFG_EN);
@@ -466,8 +510,12 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
 	if (fm_eth->phydev) {
 		ret = phy_startup(fm_eth->phydev);
 		if (ret) {
+#ifndef CONFIG_DM_ETH
 			printf("%s: Could not initialize\n",
 			       fm_eth->phydev->dev->name);
+#else
+			printf("%s: Could not initialize\n", dev->name);
+#endif
 			return ret;
 		}
 	} else {
@@ -481,6 +529,8 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
 
 	/* set the MAC-PHY mode */
 	mac->set_if_mode(mac, fm_eth->enet_if, fm_eth->phydev->speed);
+	debug("MAC IF mode %d, speed %d, link %d\n", fm_eth->enet_if,
+	      fm_eth->phydev->speed, fm_eth->phydev->link);
 
 	if (!fm_eth->phydev->link)
 		printf("%s: No link.\n", fm_eth->phydev->dev->name);
@@ -488,7 +538,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd)
 	return fm_eth->phydev->link ? 0 : -1;
 }
 
+#ifndef CONFIG_DM_ETH
 static void fm_eth_halt(struct eth_device *dev)
+#else
+static void fm_eth_halt(struct udevice *dev)
+#endif
 {
 	struct fm_eth *fm_eth;
 	struct fsl_enet_mac *mac;
@@ -511,7 +565,11 @@ static void fm_eth_halt(struct eth_device *dev)
 #endif
 }
 
+#ifndef CONFIG_DM_ETH
 static int fm_eth_send(struct eth_device *dev, void *buf, int len)
+#else
+static int fm_eth_send(struct udevice *dev, void *buf, int len)
+#endif
 {
 	struct fm_eth *fm_eth;
 	struct fm_port_global_pram *pram;
@@ -569,20 +627,50 @@ static int fm_eth_send(struct eth_device *dev, void *buf, int len)
 	return 1;
 }
 
-static int fm_eth_recv(struct eth_device *dev)
+static struct fm_port_bd *fm_eth_free_one(struct fm_eth *fm_eth,
+					  struct fm_port_bd *rxbd)
 {
-	struct fm_eth *fm_eth;
 	struct fm_port_global_pram *pram;
-	struct fm_port_bd *rxbd, *rxbd_base;
-	u16 status, len;
-	u32 buf_lo, buf_hi;
-	u8 *data;
+	struct fm_port_bd *rxbd_base;
 	u16 offset_out;
-	int ret = 1;
 
-	fm_eth = (struct fm_eth *)dev->priv;
 	pram = fm_eth->rx_pram;
-	rxbd = fm_eth->cur_rxbd;
+
+	/* clear the RxBDs */
+	muram_writew(&rxbd->status, RxBD_EMPTY);
+	muram_writew(&rxbd->len, 0);
+	sync();
+
+	/* advance RxBD */
+	rxbd++;
+	rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring;
+	if (rxbd >= (rxbd_base + RX_BD_RING_SIZE))
+		rxbd = rxbd_base;
+
+	/* update RxQD */
+	offset_out = muram_readw(&pram->rxqd.offset_out);
+	offset_out += sizeof(struct fm_port_bd);
+	if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size))
+		offset_out = 0;
+	muram_writew(&pram->rxqd.offset_out, offset_out);
+	sync();
+
+	return rxbd;
+}
+
+#ifndef CONFIG_DM_ETH
+static int fm_eth_recv(struct eth_device *dev)
+#else
+static int fm_eth_recv(struct udevice *dev, int flags, uchar **packetp)
+#endif
+{
+	struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
+	struct fm_port_bd *rxbd = fm_eth->cur_rxbd;
+	u32 buf_lo, buf_hi;
+	u16 status, len;
+	int ret = -1;
+	u8 *data;
+
 	status = muram_readw(&rxbd->status);
 
 	while (!(status & RxBD_EMPTY)) {
@@ -591,38 +679,40 @@ static int fm_eth_recv(struct eth_device *dev)
 			buf_lo = in_be32(&rxbd->buf_ptr_lo);
 			data = (u8 *)((ulong)(buf_hi << 16) << 16 | buf_lo);
 			len = muram_readw(&rxbd->len);
+#ifndef CONFIG_DM_ETH
 			net_process_received_packet(data, len);
+#else
+			*packetp = data;
+			return len;
+#endif
 		} else {
 			printf("%s: Rx error\n", dev->name);
 			ret = 0;
 		}
 
-		/* clear the RxBDs */
-		muram_writew(&rxbd->status, RxBD_EMPTY);
-		muram_writew(&rxbd->len, 0);
-		sync();
+		/* free current bd, advance to next one */
+		rxbd = fm_eth_free_one(fm_eth, rxbd);
 
-		/* advance RxBD */
-		rxbd++;
-		rxbd_base = (struct fm_port_bd *)fm_eth->rx_bd_ring;
-		if (rxbd >= (rxbd_base + RX_BD_RING_SIZE))
-			rxbd = rxbd_base;
 		/* read next status */
 		status = muram_readw(&rxbd->status);
-
-		/* update RxQD */
-		offset_out = muram_readw(&pram->rxqd.offset_out);
-		offset_out += sizeof(struct fm_port_bd);
-		if (offset_out >= muram_readw(&pram->rxqd.bd_ring_size))
-			offset_out = 0;
-		muram_writew(&pram->rxqd.offset_out, offset_out);
-		sync();
 	}
 	fm_eth->cur_rxbd = (void *)rxbd;
 
 	return ret;
 }
 
+#ifdef CONFIG_DM_ETH
+static int fm_eth_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+	struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
+
+	fm_eth->cur_rxbd = fm_eth_free_one(fm_eth, fm_eth->cur_rxbd);
+
+	return 0;
+}
+#endif /* CONFIG_DM_ETH */
+
+#ifndef CONFIG_DM_ETH
 static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
 {
 	struct fsl_enet_mac *mac;
@@ -678,22 +768,75 @@ static int fm_eth_init_mac(struct fm_eth *fm_eth, struct ccsr_fman *reg)
 
 	return 0;
 }
+#else /* CONFIG_DM_ETH */
+static int fm_eth_init_mac(struct fm_eth *fm_eth, void *reg)
+{
+#ifndef CONFIG_SYS_FMAN_V3
+	void *mdio;
+#endif
+
+	fm_eth->mac = kzalloc(sizeof(*fm_eth->mac), GFP_KERNEL);
+	if (!fm_eth->mac)
+		return -ENOMEM;
 
-static int init_phy(struct eth_device *dev)
+#ifndef CONFIG_SYS_FMAN_V3
+	mdio = fman_mdio(fm_eth->dev->parent, fm_eth->mac_type, fm_eth->num);
+	debug("MDIO %d @ %p\n", fm_eth->num, mdio);
+#endif
+
+	switch (fm_eth->mac_type) {
+#ifdef CONFIG_SYS_FMAN_V3
+	case FM_MEMAC:
+		init_memac(fm_eth->mac, reg, NULL, MAX_RXBUF_LEN);
+		break;
+#else
+	case FM_DTSEC:
+		init_dtsec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN);
+		break;
+	case FM_TGEC:
+		init_tgec(fm_eth->mac, reg, mdio, MAX_RXBUF_LEN);
+		break;
+#endif
+	}
+
+	return 0;
+}
+#endif /* CONFIG_DM_ETH */
+
+static int init_phy(struct fm_eth *fm_eth)
 {
-	struct fm_eth *fm_eth = dev->priv;
 #ifdef CONFIG_PHYLIB
+	u32 supported = PHY_GBIT_FEATURES;
+#ifndef CONFIG_DM_ETH
 	struct phy_device *phydev = NULL;
-	u32 supported;
+#endif
+
+	if (fm_eth->type == FM_ETH_10G_E)
+		supported = PHY_10G_FEATURES;
+	if (fm_eth->enet_if == PHY_INTERFACE_MODE_SGMII_2500)
+		supported |= SUPPORTED_2500baseX_Full;
 #endif
 
 	if (fm_eth->type == FM_ETH_1G_E)
-		dtsec_init_phy(dev);
+		dtsec_init_phy(fm_eth);
 
+#ifdef CONFIG_DM_ETH
+#ifdef CONFIG_PHYLIB
+#ifdef CONFIG_DM_MDIO
+	fm_eth->phydev = dm_eth_phy_connect(fm_eth->dev);
+	if (!fm_eth->phydev)
+		return -ENODEV;
+#endif
+	fm_eth->phydev->advertising &= supported;
+	fm_eth->phydev->supported &= supported;
+
+	phy_config(fm_eth->phydev);
+#endif
+#else /* CONFIG_DM_ETH */
 #ifdef CONFIG_PHYLIB
 	if (fm_eth->bus) {
-		phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, dev,
-					fm_eth->enet_if);
+		phydev = phy_connect(fm_eth->bus, fm_eth->phyaddr, fm_eth->dev,
+				     fm_eth->enet_if);
 		if (!phydev) {
 			printf("Failed to connect\n");
 			return -1;
@@ -711,7 +854,7 @@ static int init_phy(struct eth_device *dev)
 	} else {
 		supported = SUPPORTED_10000baseT_Full;
 
-		if (tgec_is_fibre(dev))
+		if (tgec_is_fibre(fm_eth))
 			phydev->port = PORT_FIBRE;
 	}
 
@@ -722,10 +865,11 @@ static int init_phy(struct eth_device *dev)
 
 	phy_config(phydev);
 #endif
-
+#endif /* CONFIG_DM_ETH */
 	return 0;
 }
 
+#ifndef CONFIG_DM_ETH
 int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
 {
 	struct eth_device *dev;
@@ -784,7 +928,7 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
 	if (ret)
 		return ret;
 
-	init_phy(dev);
+	init_phy(fm_eth);
 
 	/* clear the ethernet address */
 	for (i = 0; i < 6; i++)
@@ -793,3 +937,201 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info)
 
 	return 0;
 }
+#else /* CONFIG_DM_ETH */
+#ifdef CONFIG_PHYLIB
+phy_interface_t fman_read_sys_if(struct udevice *dev)
+{
+	const char *if_str;
+
+	if_str = ofnode_read_string(dev->node, "phy-connection-type");
+	debug("MAC system interface mode %s\n", if_str);
+
+	return phy_get_interface_by_name(if_str);
+}
+#endif
+
+static int fm_eth_bind(struct udevice *dev)
+{
+	char mac_name[11];
+	u32 fm, num;
+
+	if (ofnode_read_u32(ofnode_get_parent(dev->node), "cell-index", &fm)) {
+		printf("FMan node property cell-index missing\n");
+		return -EINVAL;
+	}
+
+	if (dev && dev_read_u32(dev, "cell-index", &num)) {
+		printf("FMan MAC node property cell-index missing\n");
+		return -EINVAL;
+	}
+
+	sprintf(mac_name, "fm%d-mac%d", fm + 1, num + 1);
+	device_set_name(dev, mac_name);
+
+	debug("%s - binding %s\n", __func__, mac_name);
+
+	return 0;
+}
+
+static struct udevice *fm_get_internal_mdio(struct udevice *dev)
+{
+	struct ofnode_phandle_args phandle = {.node = ofnode_null()};
+	struct udevice *mdiodev;
+
+	if (dev_read_phandle_with_args(dev, "pcsphy-handle", NULL,
+				       0, 0, &phandle) ||
+	    !ofnode_valid(phandle.node)) {
+		if (dev_read_phandle_with_args(dev, "tbi-handle", NULL,
+					       0, 0, &phandle) ||
+		    !ofnode_valid(phandle.node)) {
+			printf("Issue reading pcsphy-handle/tbi-handle for MAC %s\n",
+			       dev->name);
+			return NULL;
+		}
+	}
+
+	if (uclass_get_device_by_ofnode(UCLASS_MDIO,
+					ofnode_get_parent(phandle.node),
+					&mdiodev)) {
+		printf("can't find MDIO bus for node %s\n",
+		       ofnode_get_name(ofnode_get_parent(phandle.node)));
+		return NULL;
+	}
+	debug("Found internal MDIO bus %p\n", mdiodev);
+
+	return mdiodev;
+}
+
+static int fm_eth_probe(struct udevice *dev)
+{
+	struct fm_eth *fm_eth = (struct fm_eth *)dev->priv;
+	struct ofnode_phandle_args args;
+	void *reg;
+	int ret, index;
+
+	debug("%s enter for dev %p fm_eth %p - %s\n", __func__, dev, fm_eth,
+	      (dev) ? dev->name : "-");
+
+	if (fm_eth->dev) {
+		printf("%s already probed, exit\n", (dev) ? dev->name : "-");
+		return 0;
+	}
+
+	fm_eth->dev = dev;
+	fm_eth->fm_index = fman_id(dev->parent);
+	reg = (void *)(uintptr_t)dev_read_addr(dev);
+	fm_eth->mac_type = dev_get_driver_data(dev);
+#ifdef CONFIG_PHYLIB
+	fm_eth->enet_if = fman_read_sys_if(dev);
+#else
+	fm_eth->enet_if = PHY_INTERFACE_MODE_SGMII;
+	printf("%s: warning - unable to determine interface type\n", __func__);
+#endif
+	switch (fm_eth->mac_type) {
+#ifndef CONFIG_SYS_FMAN_V3
+	case FM_TGEC:
+		fm_eth->type = FM_ETH_10G_E;
+		break;
+	case FM_DTSEC:
+#else
+	case FM_MEMAC:
+		/* default to 1G, 10G is indicated by port property in dts */
+#endif
+		fm_eth->type = FM_ETH_1G_E;
+		break;
+	}
+
+	if (dev_read_u32(dev, "cell-index", &fm_eth->num)) {
+		printf("FMan MAC node property cell-index missing\n");
+		return -EINVAL;
+	}
+
+	if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL,
+				       0, 0, &args))
+		goto ports_ref_failure;
+	index = ofnode_read_u32_default(args.node, "cell-index", 0);
+	if (index <= 0)
+		goto ports_ref_failure;
+	fm_eth->rx_port = fman_port(dev->parent, index);
+
+	if (ofnode_read_bool(args.node, "fsl,fman-10g-port"))
+		fm_eth->type = FM_ETH_10G_E;
+
+	if (dev_read_phandle_with_args(dev, "fsl,fman-ports", NULL,
+				       0, 1, &args))
+		goto ports_ref_failure;
+	index = ofnode_read_u32_default(args.node, "cell-index", 0);
+	if (index <= 0)
+		goto ports_ref_failure;
+	fm_eth->tx_port = fman_port(dev->parent, index);
+
+	/* set the ethernet max receive length */
+	fm_eth->max_rx_len = MAX_RXBUF_LEN;
+
+	switch (fm_eth->enet_if) {
+	case PHY_INTERFACE_MODE_QSGMII:
+		/* all PCS blocks are accessed on one controller */
+		if (fm_eth->num != 0)
+			break;
+	case PHY_INTERFACE_MODE_SGMII:
+	case PHY_INTERFACE_MODE_SGMII_2500:
+		fm_eth->pcs_mdio = fm_get_internal_mdio(dev);
+		break;
+	default:
+		break;
+	}
+
+	/* init global mac structure */
+	ret = fm_eth_init_mac(fm_eth, reg);
+	if (ret)
+		return ret;
+
+	/* startup the FM im */
+	ret = fm_eth_startup(fm_eth);
+
+	if (!ret)
+		ret = init_phy(fm_eth);
+
+	return ret;
+
+ports_ref_failure:
+	printf("Issue reading fsl,fman-ports for MAC %s\n", dev->name);
+	return -ENOENT;
+}
+
+static int fm_eth_remove(struct udevice *dev)
+{
+	return 0;
+}
+
+static const struct eth_ops fm_eth_ops = {
+	.start = fm_eth_open,
+	.send = fm_eth_send,
+	.recv = fm_eth_recv,
+	.free_pkt = fm_eth_free_pkt,
+	.stop = fm_eth_halt,
+};
+
+static const struct udevice_id fm_eth_ids[] = {
+#ifdef CONFIG_SYS_FMAN_V3
+	{ .compatible = "fsl,fman-memac", .data = FM_MEMAC },
+#else
+	{ .compatible = "fsl,fman-dtsec", .data = FM_DTSEC },
+	{ .compatible = "fsl,fman-xgec", .data = FM_TGEC },
+#endif
+	{}
+};
+
+U_BOOT_DRIVER(eth_fman) = {
+	.name = "eth_fman",
+	.id = UCLASS_ETH,
+	.of_match = fm_eth_ids,
+	.bind = fm_eth_bind,
+	.probe = fm_eth_probe,
+	.remove = fm_eth_remove,
+	.ops = &fm_eth_ops,
+	.priv_auto_alloc_size = sizeof(struct fm_eth),
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif /* CONFIG_DM_ETH */
diff --git a/drivers/net/fm/fdt.c b/drivers/net/fm/fdt.c
index a6b0d87415..242d27a34e 100644
--- a/drivers/net/fm/fdt.c
+++ b/drivers/net/fm/fdt.c
@@ -4,6 +4,7 @@
  */
 #include <asm/io.h>
 #include <env.h>
+#include <fdt_support.h>
 #include <fsl_qe.h>	/* For struct qe_firmware */
 #include <u-boot/crc.h>
 
diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c
index 7a081b9d03..8ab1816395 100644
--- a/drivers/net/fm/fm.c
+++ b/drivers/net/fm/fm.c
@@ -9,6 +9,9 @@
 #include <asm/io.h>
 #include <linux/errno.h>
 #include <u-boot/crc.h>
+#ifdef CONFIG_DM_ETH
+#include <dm.h>
+#endif
 
 #include "fm.h"
 #include <fsl_qe.h>		/* For struct qe_firmware */
@@ -529,3 +532,80 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 	return fm_init_bmi(index, &reg->fm_bmi_common);
 }
 #endif
+
+#ifdef CONFIG_DM_ETH
+struct fman_priv {
+	struct ccsr_fman *reg;
+	unsigned int fman_id;
+};
+
+static const struct udevice_id fman_ids[] = {
+	{ .compatible = "fsl,fman" },
+	{}
+};
+
+static int fman_probe(struct udevice *dev)
+{
+	struct fman_priv *priv = dev_get_priv(dev);
+
+	priv->reg = (struct ccsr_fman *)(uintptr_t)dev_read_addr(dev);
+
+	if (dev_read_u32(dev, "cell-index", &priv->fman_id)) {
+		printf("FMan node property cell-index missing\n");
+		return -EINVAL;
+	}
+
+	return fm_init_common(priv->fman_id, priv->reg);
+}
+
+static int fman_remove(struct udevice *dev)
+{
+	return 0;
+}
+
+int fman_id(struct udevice *dev)
+{
+	struct fman_priv *priv = dev_get_priv(dev);
+
+	return priv->fman_id;
+}
+
+void *fman_port(struct udevice *dev, int num)
+{
+	struct fman_priv *priv = dev_get_priv(dev);
+
+	return &priv->reg->port[num - 1].fm_bmi;
+}
+
+void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num)
+{
+	struct fman_priv *priv = dev_get_priv(dev);
+	void *res = NULL;
+
+	switch (type) {
+#ifdef CONFIG_SYS_FMAN_V3
+	case FM_MEMAC:
+		res = &priv->reg->memac[num].fm_memac_mdio;
+		break;
+#else
+	case FM_DTSEC:
+		res = &priv->reg->mac_1g[num].fm_mdio.miimcfg;
+		break;
+	case FM_TGEC:
+		res = &priv->reg->mac_10g[num].fm_10gec_mdio;
+		break;
+#endif
+	}
+	return res;
+}
+
+U_BOOT_DRIVER(fman) = {
+	.name = "fman",
+	.id = UCLASS_SIMPLE_BUS,
+	.of_match = fman_ids,
+	.probe = fman_probe,
+	.remove = fman_remove,
+	.priv_auto_alloc_size = sizeof(struct fman_priv),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif /* CONFIG_DM_ETH */
diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h
index e5deaf52c5..2379b3a11c 100644
--- a/drivers/net/fm/fm.h
+++ b/drivers/net/fm/fm.h
@@ -57,6 +57,18 @@ struct fm_port_bd {
 #define TxBD_READY		0x8000
 #define TxBD_LAST		BD_LAST
 
+#ifdef CONFIG_DM_ETH
+enum fm_mac_type {
+#ifdef CONFIG_SYS_FMAN_V3
+	FM_MEMAC,
+#else
+	FM_DTSEC,
+	FM_TGEC,
+#endif
+};
+#endif
+
+/* Fman ethernet private struct */
 /* Rx/Tx queue descriptor */
 struct fm_port_qd {
 	u16 gen;
@@ -101,6 +113,11 @@ int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info);
 phy_interface_t fman_port_enet_if(enum fm_port port);
 void fman_disable_port(enum fm_port port);
 void fman_enable_port(enum fm_port port);
+int fman_id(struct udevice *dev);
+void *fman_port(struct udevice *dev, int num);
+#ifdef CONFIG_DM_ETH
+void *fman_mdio(struct udevice *dev, enum fm_mac_type type, int num);
+#endif
 
 struct fsl_enet_mac {
 	void *base; /* MAC controller registers base address */
@@ -126,7 +143,13 @@ struct fm_eth {
 	struct mii_dev *bus;
 	struct phy_device *phydev;
 	int phyaddr;
+#ifndef CONFIG_DM_ETH
 	struct eth_device *dev;
+#else
+	enum fm_mac_type mac_type;
+	struct udevice *dev;
+	struct udevice *pcs_mdio;
+#endif
 	int max_rx_len;
 	struct fm_port_global_pram *rx_pram; /* Rx parameter table */
 	struct fm_port_global_pram *tx_pram; /* Tx parameter table */
diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c
index f896e80b6d..2cc8bbfb10 100644
--- a/drivers/net/fm/init.c
+++ b/drivers/net/fm/init.c
@@ -4,17 +4,20 @@
  */
 #include <errno.h>
 #include <common.h>
+#include <net.h>
 #include <asm/io.h>
 #include <fdt_support.h>
 #include <fsl_mdio.h>
 #ifdef CONFIG_FSL_LAYERSCAPE
 #include <asm/arch/fsl_serdes.h>
+#include <linux/libfdt.h>
 #else
 #include <asm/fsl_serdes.h>
 #endif
 
 #include "fm.h"
 
+#ifndef CONFIG_DM_ETH
 struct fm_eth_info fm_info[] = {
 #if (CONFIG_SYS_NUM_FM1_DTSEC >= 1)
 	FM_DTSEC_INFO_INITIALIZER(1, 1),
@@ -380,3 +383,4 @@ int is_qsgmii_riser_card(struct mii_dev *bus, int phy_base_addr,
 
 	return 0;
 }
+#endif /* CONFIG_DM_ETH */
diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c
index bed8f14aee..0f0f7b0732 100644
--- a/drivers/net/fm/memac.c
+++ b/drivers/net/fm/memac.c
@@ -8,6 +8,7 @@
 #define MAXFRM_MASK	0x0000ffff
 
 #include <common.h>
+#include <log.h>
 #include <phy.h>
 #include <asm/types.h>
 #include <asm/io.h>
@@ -137,6 +138,7 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
 void init_memac(struct fsl_enet_mac *mac, void *base,
 		void *phyregs, int max_rx_len)
 {
+	debug("%s: @ %p, mdio @ %p\n", __func__, base, phyregs);
 	mac->base = base;
 	mac->phyregs = phyregs;
 	mac->max_rx_len = max_rx_len;
diff --git a/drivers/net/fm/memac_phy.c b/drivers/net/fm/memac_phy.c
index c2ef1b4e73..4cbfbc70ab 100644
--- a/drivers/net/fm/memac_phy.c
+++ b/drivers/net/fm/memac_phy.c
@@ -22,6 +22,12 @@
 #define memac_setbits_32(a, v)	setbits_be32(a, v)
 #endif
 
+#ifdef CONFIG_DM_ETH
+struct fm_mdio_priv {
+	struct memac_mdio_controller *regs;
+};
+#endif
+
 static u32 memac_in_32(u32 *reg)
 {
 #ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
@@ -39,10 +45,23 @@ static u32 memac_in_32(u32 *reg)
 int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
 			int regnum, u16 value)
 {
+	struct memac_mdio_controller *regs;
 	u32 mdio_ctl;
-	struct memac_mdio_controller *regs = bus->priv;
 	u32 c45 = 1; /* Default to 10G interface */
 
+#ifndef CONFIG_DM_ETH
+	regs = bus->priv;
+#else
+	struct fm_mdio_priv *priv;
+
+	if (!bus->priv)
+		return -EINVAL;
+	priv = dev_get_priv(bus->priv);
+	regs = priv->regs;
+	debug("memac_mdio_write(regs %p, port %d, dev %d, reg %d, val %#x)\n",
+	      regs, port_addr, dev_addr, regnum, value);
+#endif
+
 	if (dev_addr == MDIO_DEVAD_NONE) {
 		c45 = 0; /* clause 22 */
 		dev_addr = regnum & 0x1f;
@@ -84,13 +103,26 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
 int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
 			int regnum)
 {
+	struct memac_mdio_controller *regs;
 	u32 mdio_ctl;
-	struct memac_mdio_controller *regs = bus->priv;
 	u32 c45 = 1;
 
+#ifndef CONFIG_DM_ETH
+	regs = bus->priv;
+#else
+	struct fm_mdio_priv *priv;
+
+	if (!bus->priv)
+		return -EINVAL;
+	priv = dev_get_priv(bus->priv);
+	regs = priv->regs;
+#endif
+
 	if (dev_addr == MDIO_DEVAD_NONE) {
+#ifndef CONFIG_DM_ETH
 		if (!strcmp(bus->name, DEFAULT_FM_TGEC_MDIO_NAME))
 			return 0xffff;
+#endif
 		c45 = 0; /* clause 22 */
 		dev_addr = regnum & 0x1f;
 		memac_clrbits_32(&regs->mdio_stat, MDIO_STAT_ENC);
@@ -133,6 +165,7 @@ int memac_mdio_reset(struct mii_dev *bus)
 	return 0;
 }
 
+#ifndef CONFIG_DM_ETH
 int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)
 {
 	struct mii_dev *bus = mdio_alloc();
@@ -167,3 +200,105 @@ int fm_memac_mdio_init(bd_t *bis, struct memac_mdio_info *info)
 
 	return mdio_register(bus);
 }
+
+#else /* CONFIG_DM_ETH */
+#if defined(CONFIG_PHYLIB) && defined(CONFIG_DM_MDIO)
+static int fm_mdio_read(struct udevice *dev, int addr, int devad, int reg)
+{
+	struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
+						 NULL;
+
+	if (pdata && pdata->mii_bus)
+		return memac_mdio_read(pdata->mii_bus, addr, devad, reg);
+
+	return -1;
+}
+
+static int fm_mdio_write(struct udevice *dev, int addr, int devad, int reg,
+			 u16 val)
+{
+	struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
+						 NULL;
+
+	if (pdata && pdata->mii_bus)
+		return memac_mdio_write(pdata->mii_bus, addr, devad, reg, val);
+
+	return -1;
+}
+
+static int fm_mdio_reset(struct udevice *dev)
+{
+	struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
+						 NULL;
+
+	if (pdata && pdata->mii_bus)
+		return memac_mdio_reset(pdata->mii_bus);
+
+	return -1;
+}
+
+static const struct mdio_ops fm_mdio_ops = {
+	.read = fm_mdio_read,
+	.write = fm_mdio_write,
+	.reset = fm_mdio_reset,
+};
+
+static const struct udevice_id fm_mdio_ids[] = {
+	{ .compatible = "fsl,fman-memac-mdio" },
+	{}
+};
+
+static int fm_mdio_probe(struct udevice *dev)
+{
+	struct fm_mdio_priv *priv = (dev) ? dev_get_priv(dev) : NULL;
+	struct mdio_perdev_priv *pdata = (dev) ? dev_get_uclass_priv(dev) :
+						 NULL;
+
+	if (!dev) {
+		printf("%s dev = NULL\n", __func__);
+		return -1;
+	}
+	if (!priv) {
+		printf("dev_get_priv(dev %p) = NULL\n", dev);
+		return -1;
+	}
+	priv->regs = (void *)(uintptr_t)dev_read_addr(dev);
+	debug("%s priv %p @ regs %p, pdata %p\n", __func__,
+	      priv, priv->regs, pdata);
+
+	/*
+	 * On some platforms like B4860, default value of MDIO_CLK_DIV bits
+	 * in mdio_stat(mdio_cfg) register generates MDIO clock too high
+	 * (much higher than 2.5MHz), violating the IEEE specs.
+	 * On other platforms like T1040, default value of MDIO_CLK_DIV bits
+	 * is zero, so MDIO clock is disabled.
+	 * So, for proper functioning of MDIO, MDIO_CLK_DIV bits needs to
+	 * be properly initialized.
+	 * The default NEG bit should be '1' as per FMANv3 RM, but on platforms
+	 * like T2080QDS, this bit default is '0', which leads to MDIO failure
+	 * on XAUI PHY, so set this bit definitely.
+	 */
+	if (priv && priv->regs && priv->regs->mdio_stat)
+		memac_setbits_32(&priv->regs->mdio_stat,
+				 MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG);
+
+	return 0;
+}
+
+static int fm_mdio_remove(struct udevice *dev)
+{
+	return 0;
+}
+
+U_BOOT_DRIVER(fman_mdio) = {
+	.name = "fman_mdio",
+	.id = UCLASS_MDIO,
+	.of_match = fm_mdio_ids,
+	.probe = fm_mdio_probe,
+	.remove = fm_mdio_remove,
+	.ops = &fm_mdio_ops,
+	.priv_auto_alloc_size = sizeof(struct fm_mdio_priv),
+	.platdata_auto_alloc_size = sizeof(struct mdio_perdev_priv),
+};
+#endif /* CONFIG_PHYLIB && CONFIG_DM_MDIO */
+#endif /* CONFIG_DM_ETH */
diff --git a/drivers/net/fm/tgec.c b/drivers/net/fm/tgec.c
index 9f2f6f6d5b..9cc9f3fde3 100644
--- a/drivers/net/fm/tgec.c
+++ b/drivers/net/fm/tgec.c
@@ -12,6 +12,7 @@
 #include <asm/types.h>
 #include <asm/io.h>
 #include <fsl_tgec.h>
+#include <linux/delay.h>
 
 #include "fm.h"
 
diff --git a/drivers/net/fsl-mc/dpio/qbman_portal.c b/drivers/net/fsl-mc/dpio/qbman_portal.c
index e161b4e077..44ce00041e 100644
--- a/drivers/net/fsl-mc/dpio/qbman_portal.c
+++ b/drivers/net/fsl-mc/dpio/qbman_portal.c
@@ -3,8 +3,10 @@
  * Copyright (C) 2014 Freescale Semiconductor
  */
 
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/clock.h>
+#include <linux/bug.h>
 #include "qbman_portal.h"
 
 /* QBMan portal management command codes */
diff --git a/drivers/net/fsl-mc/dpio/qbman_private.h b/drivers/net/fsl-mc/dpio/qbman_private.h
index ded11a643e..53f1300eaf 100644
--- a/drivers/net/fsl-mc/dpio/qbman_private.h
+++ b/drivers/net/fsl-mc/dpio/qbman_private.h
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <linux/bug.h>
 #include <linux/types.h>
 #include <asm/atomic.h>
 #include <malloc.h>
diff --git a/drivers/net/fsl-mc/dpio/qbman_sys.h b/drivers/net/fsl-mc/dpio/qbman_sys.h
index cdced68110..8be38e11a8 100644
--- a/drivers/net/fsl-mc/dpio/qbman_sys.h
+++ b/drivers/net/fsl-mc/dpio/qbman_sys.h
@@ -20,6 +20,7 @@
 
 /* Trace the 3 different classes of read/write access to QBMan. #undef as
  * required. */
+#include <linux/bug.h>
 #undef QBMAN_CCSR_TRACE
 #undef QBMAN_CINH_TRACE
 #undef QBMAN_CENA_TRACE
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index 07bbcc9b23..e516c3c145 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -1,16 +1,19 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2017-2018 NXP
+ * Copyright 2017-2018, 2020 NXP
  */
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <errno.h>
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/bug.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <net.h>
 #include <fdt_support.h>
@@ -174,9 +177,21 @@ enum mc_fixup_type {
 };
 
 static int mc_fixup_mac_addr(void *blob, int nodeoffset,
+#ifdef CONFIG_DM_ETH
+			     const char *propname, struct udevice *eth_dev,
+#else
 			     const char *propname, struct eth_device *eth_dev,
+#endif
 			     enum mc_fixup_type type)
 {
+#ifdef CONFIG_DM_ETH
+	struct eth_pdata *plat = dev_get_platdata(eth_dev);
+	unsigned char *enetaddr = plat->enetaddr;
+	int eth_index = eth_dev->seq;
+#else
+	unsigned char *enetaddr = eth_dev->enetaddr;
+	int eth_index = eth_dev->index;
+#endif
 	int err = 0, len = 0, size, i;
 	unsigned char env_enetaddr[ARP_HLEN];
 	unsigned int enetaddr_32[ARP_HLEN];
@@ -184,23 +199,22 @@ static int mc_fixup_mac_addr(void *blob, int nodeoffset,
 
 	switch (type) {
 	case MC_FIXUP_DPL:
-	/* DPL likes its addresses on 32 * ARP_HLEN bits */
-	for (i = 0; i < ARP_HLEN; i++)
-		enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]);
-	val = enetaddr_32;
-	len = sizeof(enetaddr_32);
-	break;
-
+		/* DPL likes its addresses on 32 * ARP_HLEN bits */
+		for (i = 0; i < ARP_HLEN; i++)
+			enetaddr_32[i] = cpu_to_fdt32(enetaddr[i]);
+		val = enetaddr_32;
+		len = sizeof(enetaddr_32);
+		break;
 	case MC_FIXUP_DPC:
-	val = eth_dev->enetaddr;
-	len = ARP_HLEN;
-	break;
+		val = enetaddr;
+		len = ARP_HLEN;
+		break;
 	}
 
 	/* MAC address property present */
 	if (fdt_get_property(blob, nodeoffset, propname, NULL)) {
 		/* u-boot MAC addr randomly assigned - leave the present one */
-		if (!eth_env_get_enetaddr_by_index("eth", eth_dev->index,
+		if (!eth_env_get_enetaddr_by_index("eth", eth_index,
 						   env_enetaddr))
 			return err;
 	} else {
@@ -250,7 +264,11 @@ const char *dpl_get_connection_endpoint(void *blob, char *endpoint)
 }
 
 static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,
+#ifdef CONFIG_DM_ETH
+				 struct udevice *eth_dev)
+#else
 				 struct eth_device *eth_dev)
+#endif
 {
 	int objoff = fdt_path_offset(blob, "/objects");
 	int dpmacoff = -1, dpnioff = -1;
@@ -302,7 +320,7 @@ void fdt_fixup_mc_ddr(u64 *base, u64 *size)
 void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 {
 	u32 *prop;
-	u32 iommu_map[4];
+	u32 iommu_map[4], phandle;
 	int offset;
 	int lenp;
 
@@ -331,10 +349,29 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)
 
 	fdt_setprop_inplace(blob, offset, "iommu-map",
 			    iommu_map, sizeof(iommu_map));
+
+	/* get phandle to MSI controller */
+	prop = (u32 *)fdt_getprop(blob, offset, "msi-parent", 0);
+	if (!prop) {
+		debug("\n%s: ERROR: missing msi-parent\n", __func__);
+		return;
+	}
+	phandle = fdt32_to_cpu(*prop);
+
+	/* also set msi-map property */
+	fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_START);
+	fdt_appendprop_u32(blob, offset, "msi-map", phandle);
+	fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_START);
+	fdt_appendprop_u32(blob, offset, "msi-map", FSL_DPAA2_STREAM_ID_END -
+			   FSL_DPAA2_STREAM_ID_START + 1);
 }
 
 static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
+#ifdef CONFIG_DM_ETH
+				 struct udevice *eth_dev)
+#else
 				 struct eth_device *eth_dev)
+#endif
 {
 	int nodeoffset = fdt_path_offset(blob, "/board_info/ports"), noff;
 	int err = 0;
@@ -377,8 +414,13 @@ static int mc_fixup_dpc_mac_addr(void *blob, int dpmac_id,
 static int mc_fixup_mac_addrs(void *blob, enum mc_fixup_type type)
 {
 	int i, err = 0, ret = 0;
-	char ethname[ETH_NAME_LEN];
+#ifdef CONFIG_DM_ETH
+#define ETH_NAME_LEN 20
+	struct udevice *eth_dev;
+#else
 	struct eth_device *eth_dev;
+#endif
+	char ethname[ETH_NAME_LEN];
 
 	for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) {
 		/* port not enabled */
@@ -439,8 +481,19 @@ static int mc_fixup_dpc(u64 dpc_addr)
 
 	/* fixup MAC addresses for dpmac ports */
 	nodeoffset = fdt_path_offset(blob, "/board_info/ports");
-	if (nodeoffset < 0)
-		goto out;
+	if (nodeoffset < 0) {
+		err = fdt_increase_size(blob, 512);
+		if (err) {
+			printf("fdt_increase_size: err=%s\n",
+			       fdt_strerror(err));
+			goto out;
+		}
+		nodeoffset = fdt_path_offset(blob, "/board_info");
+		if (nodeoffset < 0)
+			nodeoffset = fdt_add_subnode(blob, 0, "board_info");
+
+		nodeoffset = fdt_add_subnode(blob, nodeoffset, "ports");
+	}
 
 	err = mc_fixup_mac_addrs(blob, MC_FIXUP_DPC);
 
@@ -1720,7 +1773,8 @@ err:
 	return err;
 }
 
-static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	int err = 0;
 	if (argc < 3)
diff --git a/drivers/net/fsl-mc/mc_sys.c b/drivers/net/fsl-mc/mc_sys.c
index fddf5cb023..b5ae2ea3eb 100644
--- a/drivers/net/fsl-mc/mc_sys.c
+++ b/drivers/net/fsl-mc/mc_sys.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <errno.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define MC_CMD_HDR_READ_CMDID(_hdr) \
 	((uint16_t)mc_dec((_hdr), MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S))
diff --git a/drivers/net/fsl_enetc.c b/drivers/net/fsl_enetc.c
index bee73153d0..2929ae7209 100644
--- a/drivers/net/fsl_enetc.c
+++ b/drivers/net/fsl_enetc.c
@@ -7,11 +7,16 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <fdt_support.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <net.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <pci.h>
 #include <miiphy.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 
 #include "fsl_enetc.h"
 
diff --git a/drivers/net/fsl_enetc.h b/drivers/net/fsl_enetc.h
index 48c3005cb3..37e7e85843 100644
--- a/drivers/net/fsl_enetc.h
+++ b/drivers/net/fsl_enetc.h
@@ -7,6 +7,7 @@
 #ifndef _ENETC_H
 #define _ENETC_H
 
+#include <linux/bitops.h>
 #define enetc_dbg(dev, fmt, args...)	debug("%s:" fmt, dev->name, ##args)
 
 /* PCI function IDs */
diff --git a/drivers/net/fsl_ls_mdio.c b/drivers/net/fsl_ls_mdio.c
new file mode 100644
index 0000000000..6d8332d19a
--- /dev/null
+++ b/drivers/net/fsl_ls_mdio.c
@@ -0,0 +1,146 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 NXP
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <miiphy.h>
+#include <asm/io.h>
+#include <fsl_memac.h>
+
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+#define memac_out_32(a, v)	out_le32(a, v)
+#define memac_clrbits_32(a, v)	clrbits_le32(a, v)
+#define memac_setbits_32(a, v)	setbits_le32(a, v)
+#else
+#define memac_out_32(a, v)	out_be32(a, v)
+#define memac_clrbits_32(a, v)	clrbits_be32(a, v)
+#define memac_setbits_32(a, v)	setbits_be32(a, v)
+#endif
+
+static u32 memac_in_32(u32 *reg)
+{
+#ifdef CONFIG_SYS_MEMAC_LITTLE_ENDIAN
+	return in_le32(reg);
+#else
+	return in_be32(reg);
+#endif
+}
+
+struct fsl_ls_mdio_priv {
+	void *regs_base;
+};
+
+static u32 fsl_ls_mdio_setup_operation(struct udevice *dev, int addr, int devad,
+				       int reg)
+{
+	struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
+	struct memac_mdio_controller *regs;
+	u32 mdio_ctl;
+	u32 c45 = 1;
+
+	regs = (struct memac_mdio_controller *)(priv->regs_base);
+	if (devad == MDIO_DEVAD_NONE) {
+		c45 = 0; /* clause 22 */
+		devad = reg & 0x1f;
+		memac_clrbits_32(&regs->mdio_stat, MDIO_STAT_ENC);
+	} else {
+		memac_setbits_32(&regs->mdio_stat, MDIO_STAT_ENC);
+	}
+
+	/* Wait till the bus is free */
+	while ((memac_in_32(&regs->mdio_stat)) & MDIO_STAT_BSY)
+		;
+
+	/* Set the Port and Device Addrs */
+	mdio_ctl = MDIO_CTL_PORT_ADDR(addr) | MDIO_CTL_DEV_ADDR(devad);
+	memac_out_32(&regs->mdio_ctl, mdio_ctl);
+
+	/* Set the register address */
+	if (c45)
+		memac_out_32(&regs->mdio_addr, reg & 0xffff);
+
+	/* Wait till the bus is free */
+	while ((memac_in_32(&regs->mdio_stat)) & MDIO_STAT_BSY)
+		;
+
+	return mdio_ctl;
+}
+
+static int dm_fsl_ls_mdio_read(struct udevice *dev, int addr,
+			       int devad, int reg)
+{
+	struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
+	struct memac_mdio_controller *regs;
+	u32 mdio_ctl;
+
+	regs = (struct memac_mdio_controller *)(priv->regs_base);
+	mdio_ctl = fsl_ls_mdio_setup_operation(dev, addr, devad, reg);
+
+	/* Initiate the read */
+	mdio_ctl |= MDIO_CTL_READ;
+	memac_out_32(&regs->mdio_ctl, mdio_ctl);
+
+	/* Wait till the MDIO write is complete */
+	while ((memac_in_32(&regs->mdio_data)) & MDIO_DATA_BSY)
+		;
+
+	/* Return all Fs if nothing was there */
+	if (memac_in_32(&regs->mdio_stat) & MDIO_STAT_RD_ER)
+		return 0xffff;
+
+	return memac_in_32(&regs->mdio_data) & 0xffff;
+}
+
+static int dm_fsl_ls_mdio_write(struct udevice *dev, int addr, int devad,
+				int reg, u16 val)
+{
+	struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
+	struct memac_mdio_controller *regs;
+
+	regs = (struct memac_mdio_controller *)(priv->regs_base);
+	fsl_ls_mdio_setup_operation(dev, addr, devad, reg);
+
+	/* Write the value to the register */
+	memac_out_32(&regs->mdio_data, MDIO_DATA(val));
+
+	/* Wait till the MDIO write is complete */
+	while ((memac_in_32(&regs->mdio_data)) & MDIO_DATA_BSY)
+		;
+
+	return 0;
+}
+
+static const struct mdio_ops fsl_ls_mdio_ops = {
+	.read = dm_fsl_ls_mdio_read,
+	.write = dm_fsl_ls_mdio_write,
+};
+
+static int fsl_ls_mdio_probe(struct udevice *dev)
+{
+	struct fsl_ls_mdio_priv *priv = dev_get_priv(dev);
+	struct memac_mdio_controller *regs;
+
+	priv->regs_base = dev_read_addr_ptr(dev);
+	regs = (struct memac_mdio_controller *)(priv->regs_base);
+
+	memac_setbits_32(&regs->mdio_stat,
+			 MDIO_STAT_CLKDIV(258) | MDIO_STAT_NEG);
+
+	return 0;
+}
+
+static const struct udevice_id fsl_ls_mdio_of_ids[] = {
+	{ .compatible = "fsl,ls-mdio" },
+};
+
+U_BOOT_DRIVER(fsl_ls_mdio) = {
+	.name = "fsl_ls_mdio",
+	.id = UCLASS_MDIO,
+	.of_match = fsl_ls_mdio_of_ids,
+	.probe = fsl_ls_mdio_probe,
+	.ops = &fsl_ls_mdio_ops,
+	.priv_auto_alloc_size = sizeof(struct fsl_ls_mdio_priv),
+};
diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c
index 45954cecb6..73e92b7a0d 100644
--- a/drivers/net/fsl_mcdmafec.c
+++ b/drivers/net/fsl_mcdmafec.c
@@ -18,6 +18,7 @@
 #include <config.h>
 #include <net.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <asm/immap.h>
 #include <asm/fsl_mcdmafec.h>
diff --git a/drivers/net/ftgmac100.c b/drivers/net/ftgmac100.c
index 40e6b3ba39..e4d08f2ba0 100644
--- a/drivers/net/ftgmac100.c
+++ b/drivers/net/ftgmac100.c
@@ -11,14 +11,18 @@
  * Copyright (C) 2018, IBM Corporation.
  */
 
+#include <common.h>
 #include <clk.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <net.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
 
diff --git a/drivers/net/ftgmac100.h b/drivers/net/ftgmac100.h
index 9a789e4d5b..f7874ae68b 100644
--- a/drivers/net/ftgmac100.h
+++ b/drivers/net/ftgmac100.h
@@ -13,6 +13,7 @@
 #define __FTGMAC100_H
 
 /* The registers offset table of ftgmac100 */
+#include <linux/bitops.h>
 struct ftgmac100 {
 	unsigned int	isr;		/* 0x00 */
 	unsigned int	ier;		/* 0x04 */
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 24bb45f351..4aae7c43fe 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -12,6 +12,7 @@
 #include <env.h>
 #include <malloc.h>
 #include <net.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 
 #include "ftmac100.h"
diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c
index 84082407d2..835346cb07 100644
--- a/drivers/net/ftmac110.c
+++ b/drivers/net/ftmac110.c
@@ -8,8 +8,10 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
+#include <asm/cache.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <linux/dma-mapping.h>
diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c
index e152faf083..8d95ee15ff 100644
--- a/drivers/net/gmac_rockchip.c
+++ b/drivers/net/gmac_rockchip.c
@@ -8,6 +8,8 @@
 #include <common.h>
 #include <dm.h>
 #include <clk.h>
+#include <log.h>
+#include <net.h>
 #include <phy.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -24,6 +26,7 @@
 #include <asm/arch-rockchip/grf_rv1108.h>
 #include <dm/pinctrl.h>
 #include <dt-bindings/clock/rk3288-cru.h>
+#include <linux/bitops.h>
 #include "designware.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/net/higmacv300.c b/drivers/net/higmacv300.c
index 0c1dd6834a..2aae7f4863 100644
--- a/drivers/net/higmacv300.c
+++ b/drivers/net/higmacv300.c
@@ -4,11 +4,15 @@
  */
 
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <common.h>
 #include <console.h>
+#include <linux/bitops.h>
 #include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <miiphy.h>
 #include <net.h>
diff --git a/drivers/net/ks8851_mll.c b/drivers/net/ks8851_mll.c
index 718a7dd019..3ff173ad33 100644
--- a/drivers/net/ks8851_mll.c
+++ b/drivers/net/ks8851_mll.c
@@ -4,134 +4,66 @@
  * Copyright (c) 2011 Roberto Cerati <roberto.cerati@bticino.it>
  */
 
+#include <log.h>
 #include <asm/io.h>
 #include <common.h>
 #include <command.h>
 #include <malloc.h>
 #include <net.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 
 #include "ks8851_mll.h"
 
 #define DRIVERNAME			"ks8851_mll"
 
-#define MAX_RECV_FRAMES			32
-#define MAX_BUF_SIZE			2048
-#define TX_BUF_SIZE			2000
 #define RX_BUF_SIZE			2000
 
-static const struct chip_id chip_ids[] =  {
-	{CIDER_ID, "KSZ8851"},
-	{0, NULL},
-};
-
-/*
- * union ks_tx_hdr - tx header data
- * @txb: The header as bytes
- * @txw: The header as 16bit, little-endian words
- *
- * A dual representation of the tx header data to allow
- * access to individual bytes, and to allow 16bit accesses
- * with 16bit alignment.
- */
-union ks_tx_hdr {
-	u8      txb[4];
-	__le16  txw[2];
-};
-
 /*
  * struct ks_net - KS8851 driver private data
- * @net_device	: The network device we're bound to
- * @txh		: temporaly buffer to save status/length.
- * @frame_head_info	: frame header information for multi-pkt rx.
- * @statelock	: Lock on this structure for tx list.
- * @msg_enable	: The message flags controlling driver output (see ethtool).
- * @frame_cnt	: number of frames received.
+ * @dev		: legacy non-DM ethernet device structure
+ * @iobase	: register base
  * @bus_width	: i/o bus width.
- * @irq		: irq number assigned to this device.
- * @rc_rxqcr	: Cached copy of KS_RXQCR.
- * @rc_txcr	: Cached copy of KS_TXCR.
- * @rc_ier	: Cached copy of KS_IER.
  * @sharedbus	: Multipex(addr and data bus) mode indicator.
- * @cmd_reg_cache	: command register cached.
- * @cmd_reg_cache_int	: command register cached. Used in the irq handler.
- * @promiscuous	: promiscuous mode indicator.
- * @all_mcast	: mutlicast indicator.
- * @mcast_lst_size	: size of multicast list.
- * @mcast_lst		: multicast list.
- * @mcast_bits		: multicast enabed.
- * @mac_addr		: MAC address assigned to this device.
- * @fid			: frame id.
- * @extra_byte		: number of extra byte prepended rx pkt.
- * @enabled		: indicator this device works.
+ * @extra_byte	: number of extra byte prepended rx pkt.
  */
-
-/* Receive multiplex framer header info */
-struct type_frame_head {
-	u16	sts;         /* Frame status */
-	u16	len;         /* Byte count */
-} fr_h_i[MAX_RECV_FRAMES];
-
 struct ks_net {
-	struct net_device	*netdev;
-	union ks_tx_hdr		txh;
-	struct type_frame_head	*frame_head_info;
-	u32			msg_enable;
-	u32			frame_cnt;
+#ifndef CONFIG_DM_ETH
+	struct eth_device	dev;
+#endif
+	phys_addr_t		iobase;
 	int			bus_width;
-	int			irq;
-	u16			rc_rxqcr;
-	u16			rc_txcr;
-	u16			rc_ier;
 	u16			sharedbus;
-	u16			cmd_reg_cache;
-	u16			cmd_reg_cache_int;
-	u16			promiscuous;
-	u16			all_mcast;
-	u16			mcast_lst_size;
-	u8			mcast_lst[MAX_MCAST_LST][MAC_ADDR_LEN];
-	u8			mcast_bits[HW_MCAST_SIZE];
-	u8			mac_addr[6];
-	u8                      fid;
+	u16			rxfc;
 	u8			extra_byte;
-	u8			enabled;
-} ks_str, *ks;
+};
 
 #define BE3             0x8000      /* Byte Enable 3 */
 #define BE2             0x4000      /* Byte Enable 2 */
 #define BE1             0x2000      /* Byte Enable 1 */
 #define BE0             0x1000      /* Byte Enable 0 */
 
-static u8 ks_rdreg8(struct eth_device *dev, u16 offset)
+static u8 ks_rdreg8(struct ks_net *ks, u16 offset)
 {
 	u8 shift_bit = offset & 0x03;
 	u8 shift_data = (offset & 1) << 3;
 
-	writew(offset | (BE0 << shift_bit), dev->iobase + 2);
-
-	return (u8)(readw(dev->iobase) >> shift_data);
-}
-
-static u16 ks_rdreg16(struct eth_device *dev, u16 offset)
-{
-	writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2);
+	writew(offset | (BE0 << shift_bit), ks->iobase + 2);
 
-	return readw(dev->iobase);
+	return (u8)(readw(ks->iobase) >> shift_data);
 }
 
-static void ks_wrreg8(struct eth_device *dev, u16 offset, u8 val)
+static u16 ks_rdreg16(struct ks_net *ks, u16 offset)
 {
-	u8 shift_bit = (offset & 0x03);
-	u16 value_write = (u16)(val << ((offset & 1) << 3));
+	writew(offset | ((BE1 | BE0) << (offset & 0x02)), ks->iobase + 2);
 
-	writew(offset | (BE0 << shift_bit), dev->iobase + 2);
-	writew(value_write, dev->iobase);
+	return readw(ks->iobase);
 }
 
-static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val)
+static void ks_wrreg16(struct ks_net *ks, u16 offset, u16 val)
 {
-	writew(offset | ((BE1 | BE0) << (offset & 0x02)), dev->iobase + 2);
-	writew(val, dev->iobase);
+	writew(offset | ((BE1 | BE0) << (offset & 0x02)), ks->iobase + 2);
+	writew(val, ks->iobase);
 }
 
 /*
@@ -141,12 +73,12 @@ static void ks_wrreg16(struct eth_device *dev, u16 offset, u16 val)
  * @wptr: buffer address to save data
  * @len: length in byte to read
  */
-static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len)
+static inline void ks_inblk(struct ks_net *ks, u16 *wptr, u32 len)
 {
 	len >>= 1;
 
 	while (len--)
-		*wptr++ = readw(dev->iobase);
+		*wptr++ = readw(ks->iobase);
 }
 
 /*
@@ -155,42 +87,42 @@ static inline void ks_inblk(struct eth_device *dev, u16 *wptr, u32 len)
  * @wptr: buffer address
  * @len: length in byte to write
  */
-static inline void ks_outblk(struct eth_device *dev, u16 *wptr, u32 len)
+static inline void ks_outblk(struct ks_net *ks, u16 *wptr, u32 len)
 {
 	len >>= 1;
 
 	while (len--)
-		writew(*wptr++, dev->iobase);
+		writew(*wptr++, ks->iobase);
 }
 
-static void ks_enable_int(struct eth_device *dev)
+static void ks_enable_int(struct ks_net *ks)
 {
-	ks_wrreg16(dev, KS_IER, ks->rc_ier);
+	ks_wrreg16(ks, KS_IER, IRQ_LCI | IRQ_TXI | IRQ_RXI);
 }
 
-static void ks_set_powermode(struct eth_device *dev, unsigned pwrmode)
+static void ks_set_powermode(struct ks_net *ks, unsigned int pwrmode)
 {
-	unsigned pmecr;
+	unsigned int pmecr;
 
-	ks_rdreg16(dev, KS_GRR);
-	pmecr = ks_rdreg16(dev, KS_PMECR);
+	ks_rdreg16(ks, KS_GRR);
+	pmecr = ks_rdreg16(ks, KS_PMECR);
 	pmecr &= ~PMECR_PM_MASK;
 	pmecr |= pwrmode;
 
-	ks_wrreg16(dev, KS_PMECR, pmecr);
+	ks_wrreg16(ks, KS_PMECR, pmecr);
 }
 
 /*
  * ks_read_config - read chip configuration of bus width.
  * @ks: The chip information
  */
-static void ks_read_config(struct eth_device *dev)
+static void ks_read_config(struct ks_net *ks)
 {
 	u16 reg_data = 0;
 
 	/* Regardless of bus width, 8 bit read should always work. */
-	reg_data = ks_rdreg8(dev, KS_CCR) & 0x00FF;
-	reg_data |= ks_rdreg8(dev, KS_CCR + 1) << 8;
+	reg_data = ks_rdreg8(ks, KS_CCR) & 0x00FF;
+	reg_data |= ks_rdreg8(ks, KS_CCR + 1) << 8;
 
 	/* addr/data bus are multiplexed */
 	ks->sharedbus = (reg_data & CCR_SHARED) == CCR_SHARED;
@@ -224,58 +156,58 @@ static void ks_read_config(struct eth_device *dev)
  * not currently specify the exact sequence, we have chosen something
  * that seems to work with our device.
  */
-static void ks_soft_reset(struct eth_device *dev, unsigned op)
+static void ks_soft_reset(struct ks_net *ks, unsigned int op)
 {
 	/* Disable interrupt first */
-	ks_wrreg16(dev, KS_IER, 0x0000);
-	ks_wrreg16(dev, KS_GRR, op);
+	ks_wrreg16(ks, KS_IER, 0x0000);
+	ks_wrreg16(ks, KS_GRR, op);
 	mdelay(10);	/* wait a short time to effect reset */
-	ks_wrreg16(dev, KS_GRR, 0);
+	ks_wrreg16(ks, KS_GRR, 0);
 	mdelay(1);	/* wait for condition to clear */
 }
 
-void ks_enable_qmu(struct eth_device *dev)
+void ks_enable_qmu(struct ks_net *ks)
 {
 	u16 w;
 
-	w = ks_rdreg16(dev, KS_TXCR);
+	w = ks_rdreg16(ks, KS_TXCR);
 
 	/* Enables QMU Transmit (TXCR). */
-	ks_wrreg16(dev, KS_TXCR, w | TXCR_TXE);
+	ks_wrreg16(ks, KS_TXCR, w | TXCR_TXE);
 
 	/* Enable RX Frame Count Threshold and Auto-Dequeue RXQ Frame */
-	w = ks_rdreg16(dev, KS_RXQCR);
-	ks_wrreg16(dev, KS_RXQCR, w | RXQCR_RXFCTE);
+	w = ks_rdreg16(ks, KS_RXQCR);
+	ks_wrreg16(ks, KS_RXQCR, w | RXQCR_RXFCTE);
 
 	/* Enables QMU Receive (RXCR1). */
-	w = ks_rdreg16(dev, KS_RXCR1);
-	ks_wrreg16(dev, KS_RXCR1, w | RXCR1_RXE);
+	w = ks_rdreg16(ks, KS_RXCR1);
+	ks_wrreg16(ks, KS_RXCR1, w | RXCR1_RXE);
 }
 
-static void ks_disable_qmu(struct eth_device *dev)
+static void ks_disable_qmu(struct ks_net *ks)
 {
 	u16 w;
 
-	w = ks_rdreg16(dev, KS_TXCR);
+	w = ks_rdreg16(ks, KS_TXCR);
 
 	/* Disables QMU Transmit (TXCR). */
 	w &= ~TXCR_TXE;
-	ks_wrreg16(dev, KS_TXCR, w);
+	ks_wrreg16(ks, KS_TXCR, w);
 
 	/* Disables QMU Receive (RXCR1). */
-	w = ks_rdreg16(dev, KS_RXCR1);
+	w = ks_rdreg16(ks, KS_RXCR1);
 	w &= ~RXCR1_RXE;
-	ks_wrreg16(dev, KS_RXCR1, w);
+	ks_wrreg16(ks, KS_RXCR1, w);
 }
 
-static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len)
+static inline void ks_read_qmu(struct ks_net *ks, u16 *buf, u32 len)
 {
 	u32 r = ks->extra_byte & 0x1;
 	u32 w = ks->extra_byte - r;
 
 	/* 1. set sudo DMA mode */
-	ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI);
-	ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff);
+	ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI);
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_SDA);
 
 	/*
 	 * 2. read prepend data
@@ -285,50 +217,42 @@ static inline void ks_read_qmu(struct eth_device *dev, u16 *buf, u32 len)
 	 */
 
 	if (r)
-		ks_rdreg8(dev, 0);
+		ks_rdreg8(ks, 0);
 
-	ks_inblk(dev, buf, w + 2 + 2);
+	ks_inblk(ks, buf, w + 2 + 2);
 
 	/* 3. read pkt data */
-	ks_inblk(dev, buf, ALIGN(len, 4));
+	ks_inblk(ks, buf, ALIGN(len, 4));
 
 	/* 4. reset sudo DMA Mode */
-	ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff);
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL);
 }
 
-static void ks_rcv(struct eth_device *dev, uchar **pv_data)
+static int ks_rcv(struct ks_net *ks, uchar *data)
 {
-	struct type_frame_head *frame_hdr = ks->frame_head_info;
-	int i;
+	u16 sts, len;
 
-	ks->frame_cnt = ks_rdreg16(dev, KS_RXFCTR) >> 8;
+	if (!ks->rxfc)
+		ks->rxfc = ks_rdreg16(ks, KS_RXFCTR) >> 8;
 
-	/* read all header information */
-	for (i = 0; i < ks->frame_cnt; i++) {
-		/* Checking Received packet status */
-		frame_hdr->sts = ks_rdreg16(dev, KS_RXFHSR);
-		/* Get packet len from hardware */
-		frame_hdr->len = ks_rdreg16(dev, KS_RXFHBCR);
-		frame_hdr++;
-	}
+	if (!ks->rxfc)
+		return 0;
 
-	frame_hdr = ks->frame_head_info;
-	while (ks->frame_cnt--) {
-		if ((frame_hdr->sts & RXFSHR_RXFV) &&
-		    (frame_hdr->len < RX_BUF_SIZE) &&
-		    frame_hdr->len) {
-			/* read data block including CRC 4 bytes */
-			ks_read_qmu(dev, (u16 *)(*pv_data), frame_hdr->len);
-
-			/* net_rx_packets buffer size is ok (*pv_data) */
-			net_process_received_packet(*pv_data, frame_hdr->len);
-			pv_data++;
-		} else {
-			ks_wrreg16(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_RRXEF));
-			printf(DRIVERNAME ": bad packet\n");
-		}
-		frame_hdr++;
+	/* Checking Received packet status */
+	sts = ks_rdreg16(ks, KS_RXFHSR);
+	/* Get packet len from hardware */
+	len = ks_rdreg16(ks, KS_RXFHBCR);
+
+	if ((sts & RXFSHR_RXFV) && len && (len < RX_BUF_SIZE)) {
+		/* read data block including CRC 4 bytes */
+		ks_read_qmu(ks, (u16 *)data, len);
+		ks->rxfc--;
+		return len - 4;
 	}
+
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_RRXEF);
+	printf(DRIVERNAME ": bad packet\n");
+	return 0;
 }
 
 /*
@@ -337,13 +261,13 @@ static void ks_rcv(struct eth_device *dev, uchar **pv_data)
  *
  * Read and check the TX/RX memory selftest information.
  */
-static int ks_read_selftest(struct eth_device *dev)
+static int ks_read_selftest(struct ks_net *ks)
 {
 	u16 both_done = MBIR_TXMBF | MBIR_RXMBF;
 	u16 mbir;
 	int ret = 0;
 
-	mbir = ks_rdreg16(dev, KS_MBIR);
+	mbir = ks_rdreg16(ks, KS_MBIR);
 
 	if ((mbir & both_done) != both_done) {
 		printf(DRIVERNAME ": Memory selftest not finished\n");
@@ -365,61 +289,55 @@ static int ks_read_selftest(struct eth_device *dev)
 	return ret;
 }
 
-static void ks_setup(struct eth_device *dev)
+static void ks_setup(struct ks_net *ks)
 {
 	u16 w;
 
 	/* Setup Transmit Frame Data Pointer Auto-Increment (TXFDPR) */
-	ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI);
+	ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
 
 	/* Setup Receive Frame Data Pointer Auto-Increment */
-	ks_wrreg16(dev, KS_RXFDPR, RXFDPR_RXFPAI);
+	ks_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI);
 
 	/* Setup Receive Frame Threshold - 1 frame (RXFCTFC) */
-	ks_wrreg16(dev, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK);
+	ks_wrreg16(ks, KS_RXFCTR, 1 & RXFCTR_THRESHOLD_MASK);
 
 	/* Setup RxQ Command Control (RXQCR) */
-	ks->rc_rxqcr = RXQCR_CMD_CNTL;
-	ks_wrreg16(dev, KS_RXQCR, ks->rc_rxqcr);
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL);
 
 	/*
 	 * set the force mode to half duplex, default is full duplex
 	 * because if the auto-negotiation fails, most switch uses
 	 * half-duplex.
 	 */
-	w = ks_rdreg16(dev, KS_P1MBCR);
+	w = ks_rdreg16(ks, KS_P1MBCR);
 	w &= ~P1MBCR_FORCE_FDX;
-	ks_wrreg16(dev, KS_P1MBCR, w);
+	ks_wrreg16(ks, KS_P1MBCR, w);
 
 	w = TXCR_TXFCE | TXCR_TXPE | TXCR_TXCRC | TXCR_TCGIP;
-	ks_wrreg16(dev, KS_TXCR, w);
+	ks_wrreg16(ks, KS_TXCR, w);
 
 	w = RXCR1_RXFCE | RXCR1_RXBE | RXCR1_RXUE | RXCR1_RXME | RXCR1_RXIPFCC;
 
 	/* Normal mode */
 	w |= RXCR1_RXPAFMA;
 
-	ks_wrreg16(dev, KS_RXCR1, w);
+	ks_wrreg16(ks, KS_RXCR1, w);
 }
 
-static void ks_setup_int(struct eth_device *dev)
+static void ks_setup_int(struct ks_net *ks)
 {
-	ks->rc_ier = 0x00;
-
 	/* Clear the interrupts status of the hardware. */
-	ks_wrreg16(dev, KS_ISR, 0xffff);
-
-	/* Enables the interrupts of the hardware. */
-	ks->rc_ier = (IRQ_LCI | IRQ_TXI | IRQ_RXI);
+	ks_wrreg16(ks, KS_ISR, 0xffff);
 }
 
-static int ks8851_mll_detect_chip(struct eth_device *dev)
+static int ks8851_mll_detect_chip(struct ks_net *ks)
 {
-	unsigned short val, i;
+	unsigned short val;
 
-	ks_read_config(dev);
+	ks_read_config(ks);
 
-	val = ks_rdreg16(dev, KS_CIDER);
+	val = ks_rdreg16(ks, KS_CIDER);
 
 	if (val == 0xffff) {
 		/* Special case -- no chip present */
@@ -432,107 +350,95 @@ static int ks8851_mll_detect_chip(struct eth_device *dev)
 
 	debug("Read back KS8851 id 0x%x\n", val);
 
-	/* only one entry in the table */
-	val &= 0xfff0;
-	for (i = 0; chip_ids[i].id != 0; i++) {
-		if (chip_ids[i].id == val)
-			break;
-	}
-	if (!chip_ids[i].id) {
+	if ((val & 0xfff0) != CIDER_ID) {
 		printf(DRIVERNAME ": Unknown chip ID %04x\n", val);
 		return -1;
 	}
 
-	dev->priv = (void *)&chip_ids[i];
-
 	return 0;
 }
 
-static void ks8851_mll_reset(struct eth_device *dev)
+static void ks8851_mll_reset(struct ks_net *ks)
 {
 	/* wake up powermode to normal mode */
-	ks_set_powermode(dev, PMECR_PM_NORMAL);
+	ks_set_powermode(ks, PMECR_PM_NORMAL);
 	mdelay(1);	/* wait for normal mode to take effect */
 
 	/* Disable interrupt and reset */
-	ks_soft_reset(dev, GRR_GSR);
+	ks_soft_reset(ks, GRR_GSR);
 
 	/* turn off the IRQs and ack any outstanding */
-	ks_wrreg16(dev, KS_IER, 0x0000);
-	ks_wrreg16(dev, KS_ISR, 0xffff);
+	ks_wrreg16(ks, KS_IER, 0x0000);
+	ks_wrreg16(ks, KS_ISR, 0xffff);
 
 	/* shutdown RX/TX QMU */
-	ks_disable_qmu(dev);
+	ks_disable_qmu(ks);
 }
 
-static void ks8851_mll_phy_configure(struct eth_device *dev)
+static void ks8851_mll_phy_configure(struct ks_net *ks)
 {
 	u16 data;
 
-	ks_setup(dev);
-	ks_setup_int(dev);
+	ks_setup(ks);
+	ks_setup_int(ks);
 
 	/* Probing the phy */
-	data = ks_rdreg16(dev, KS_OBCR);
-	ks_wrreg16(dev, KS_OBCR, data | OBCR_ODS_16MA);
+	data = ks_rdreg16(ks, KS_OBCR);
+	ks_wrreg16(ks, KS_OBCR, data | OBCR_ODS_16MA);
 
 	debug(DRIVERNAME ": phy initialized\n");
 }
 
-static void ks8851_mll_enable(struct eth_device *dev)
+static void ks8851_mll_enable(struct ks_net *ks)
 {
-	ks_wrreg16(dev, KS_ISR, 0xffff);
-	ks_enable_int(dev);
-	ks_enable_qmu(dev);
+	ks_wrreg16(ks, KS_ISR, 0xffff);
+	ks_enable_int(ks);
+	ks_enable_qmu(ks);
 }
 
-static int ks8851_mll_init(struct eth_device *dev, bd_t *bd)
+static int ks8851_mll_init_common(struct ks_net *ks)
 {
-	struct chip_id *id = dev->priv;
-
-	debug(DRIVERNAME ": detected %s controller\n", id->name);
-
-	if (ks_read_selftest(dev)) {
+	if (ks_read_selftest(ks)) {
 		printf(DRIVERNAME ": Selftest failed\n");
 		return -1;
 	}
 
-	ks8851_mll_reset(dev);
+	ks8851_mll_reset(ks);
 
 	/* Configure the PHY, initialize the link state */
-	ks8851_mll_phy_configure(dev);
+	ks8851_mll_phy_configure(ks);
 
-	/* static allocation of private informations */
-	ks->frame_head_info = fr_h_i;
+	ks->rxfc = 0;
 
 	/* Turn on Tx + Rx */
-	ks8851_mll_enable(dev);
+	ks8851_mll_enable(ks);
 
 	return 0;
 }
 
-static void ks_write_qmu(struct eth_device *dev, u8 *pdata, u16 len)
+static void ks_write_qmu(struct ks_net *ks, u8 *pdata, u16 len)
 {
+	__le16 txw[2];
 	/* start header at txb[0] to align txw entries */
-	ks->txh.txw[0] = 0;
-	ks->txh.txw[1] = cpu_to_le16(len);
+	txw[0] = 0;
+	txw[1] = cpu_to_le16(len);
 
 	/* 1. set sudo-DMA mode */
-	ks_wrreg16(dev, KS_TXFDPR, TXFDPR_TXFPAI);
-	ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr | RXQCR_SDA) & 0xff);
-	/* 2. write status/lenth info */
-	ks_outblk(dev, ks->txh.txw, 4);
+	ks_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI);
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL | RXQCR_SDA);
+	/* 2. write status/length info */
+	ks_outblk(ks, txw, 4);
 	/* 3. write pkt data */
-	ks_outblk(dev, (u16 *)pdata, ALIGN(len, 4));
+	ks_outblk(ks, (u16 *)pdata, ALIGN(len, 4));
 	/* 4. reset sudo-DMA mode */
-	ks_wrreg8(dev, KS_RXQCR, (ks->rc_rxqcr & ~RXQCR_SDA) & 0xff);
+	ks_wrreg16(ks, KS_RXQCR, RXQCR_CMD_CNTL);
 	/* 5. Enqueue Tx(move the pkt from TX buffer into TXQ) */
-	ks_wrreg16(dev, KS_TXQCR, TXQCR_METFE);
+	ks_wrreg16(ks, KS_TXQCR, TXQCR_METFE);
 	/* 6. wait until TXQCR_METFE is auto-cleared */
-	do { } while (ks_rdreg16(dev, KS_TXQCR) & TXQCR_METFE);
+	do { } while (ks_rdreg16(ks, KS_TXQCR) & TXQCR_METFE);
 }
 
-static int ks8851_mll_send(struct eth_device *dev, void *packet, int length)
+static int ks8851_mll_send_common(struct ks_net *ks, void *packet, int length)
 {
 	u8 *data = (u8 *)packet;
 	u16 tmplen = (u16)length;
@@ -542,19 +448,19 @@ static int ks8851_mll_send(struct eth_device *dev, void *packet, int length)
 	 * Extra space are required:
 	 * 4 byte for alignment, 4 for status/length, 4 for CRC
 	 */
-	retv = ks_rdreg16(dev, KS_TXMIR) & 0x1fff;
+	retv = ks_rdreg16(ks, KS_TXMIR) & 0x1fff;
 	if (retv >= tmplen + 12) {
-		ks_write_qmu(dev, data, tmplen);
+		ks_write_qmu(ks, data, tmplen);
 		return 0;
-	} else {
-		printf(DRIVERNAME ": failed to send packet: No buffer\n");
-		return -1;
 	}
+
+	printf(DRIVERNAME ": failed to send packet: No buffer\n");
+	return -1;
 }
 
-static void ks8851_mll_halt(struct eth_device *dev)
+static void ks8851_mll_halt_common(struct ks_net *ks)
 {
-	ks8851_mll_reset(dev);
+	ks8851_mll_reset(ks);
 }
 
 /*
@@ -563,70 +469,208 @@ static void ks8851_mll_halt(struct eth_device *dev)
  * needs to be enough to prevent a packet being discarded while
  * we are processing the previous one.
  */
-static int ks8851_mll_recv(struct eth_device *dev)
+static int ks8851_mll_recv_common(struct ks_net *ks, uchar *data)
 {
 	u16 status;
+	int ret = 0;
+
+	status = ks_rdreg16(ks, KS_ISR);
 
-	status = ks_rdreg16(dev, KS_ISR);
+	ks_wrreg16(ks, KS_ISR, status);
 
-	ks_wrreg16(dev, KS_ISR, status);
+	if (ks->rxfc || (status & IRQ_RXI))
+		ret = ks_rcv(ks, data);
 
-	if ((status & IRQ_RXI))
-		ks_rcv(dev, (uchar **)net_rx_packets);
+	if (status & IRQ_LDI) {
+		u16 pmecr = ks_rdreg16(ks, KS_PMECR);
 
-	if ((status & IRQ_LDI)) {
-		u16 pmecr = ks_rdreg16(dev, KS_PMECR);
 		pmecr &= ~PMECR_WKEVT_MASK;
-		ks_wrreg16(dev, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
+		ks_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK);
 	}
 
-	return 0;
+	return ret;
 }
 
-static int ks8851_mll_write_hwaddr(struct eth_device *dev)
+static void ks8851_mll_write_hwaddr_common(struct ks_net *ks, u8 enetaddr[6])
 {
 	u16 addrl, addrm, addrh;
 
-	addrh = (dev->enetaddr[0] << 8) | dev->enetaddr[1];
-	addrm = (dev->enetaddr[2] << 8) | dev->enetaddr[3];
-	addrl = (dev->enetaddr[4] << 8) | dev->enetaddr[5];
+	addrh = (enetaddr[0] << 8) | enetaddr[1];
+	addrm = (enetaddr[2] << 8) | enetaddr[3];
+	addrl = (enetaddr[4] << 8) | enetaddr[5];
+
+	ks_wrreg16(ks, KS_MARH, addrh);
+	ks_wrreg16(ks, KS_MARM, addrm);
+	ks_wrreg16(ks, KS_MARL, addrl);
+}
+
+#ifndef CONFIG_DM_ETH
+static int ks8851_mll_init(struct eth_device *dev, bd_t *bd)
+{
+	struct ks_net *ks = container_of(dev, struct ks_net, dev);
+
+	return ks8851_mll_init_common(ks);
+}
+
+static void ks8851_mll_halt(struct eth_device *dev)
+{
+	struct ks_net *ks = container_of(dev, struct ks_net, dev);
+
+	ks8851_mll_halt_common(ks);
+}
+
+static int ks8851_mll_send(struct eth_device *dev, void *packet, int length)
+{
+	struct ks_net *ks = container_of(dev, struct ks_net, dev);
+
+	return ks8851_mll_send_common(ks, packet, length);
+}
+
+static int ks8851_mll_recv(struct eth_device *dev)
+{
+	struct ks_net *ks = container_of(dev, struct ks_net, dev);
+	int ret;
+
+	ret = ks8851_mll_recv_common(ks, net_rx_packets[0]);
+	if (ret)
+		net_process_received_packet(net_rx_packets[0], ret);
+
+	return ret;
+}
+
+static int ks8851_mll_write_hwaddr(struct eth_device *dev)
+{
+	struct ks_net *ks = container_of(dev, struct ks_net, dev);
 
-	ks_wrreg16(dev, KS_MARH, addrh);
-	ks_wrreg16(dev, KS_MARM, addrm);
-	ks_wrreg16(dev, KS_MARL, addrl);
+	ks8851_mll_write_hwaddr_common(ks, ks->dev.enetaddr);
 
 	return 0;
 }
 
 int ks8851_mll_initialize(u8 dev_num, int base_addr)
 {
-	struct eth_device *dev;
+	struct ks_net *ks;
+
+	ks = calloc(1, sizeof(*ks));
+	if (!ks)
+		return -ENOMEM;
+
+	ks->iobase = base_addr;
 
-	dev = malloc(sizeof(*dev));
-	if (!dev) {
-		printf("Error: Failed to allocate memory\n");
+	/* Try to detect chip. Will fail if not present. */
+	if (ks8851_mll_detect_chip(ks)) {
+		free(ks);
 		return -1;
 	}
-	memset(dev, 0, sizeof(*dev));
 
-	dev->iobase = base_addr;
+	ks->dev.init = ks8851_mll_init;
+	ks->dev.halt = ks8851_mll_halt;
+	ks->dev.send = ks8851_mll_send;
+	ks->dev.recv = ks8851_mll_recv;
+	ks->dev.write_hwaddr = ks8851_mll_write_hwaddr;
+	sprintf(ks->dev.name, "%s-%hu", DRIVERNAME, dev_num);
+
+	eth_register(&ks->dev);
+
+	return 0;
+}
+#else	/* ifdef CONFIG_DM_ETH */
+static int ks8851_start(struct udevice *dev)
+{
+	struct ks_net *ks = dev_get_priv(dev);
+
+	return ks8851_mll_init_common(ks);
+}
+
+static void ks8851_stop(struct udevice *dev)
+{
+	struct ks_net *ks = dev_get_priv(dev);
 
-	ks = &ks_str;
+	ks8851_mll_halt_common(ks);
+}
+
+static int ks8851_send(struct udevice *dev, void *packet, int length)
+{
+	struct ks_net *ks = dev_get_priv(dev);
+	int ret;
+
+	ret = ks8851_mll_send_common(ks, packet, length);
+
+	return ret ? 0 : -ETIMEDOUT;
+}
+
+static int ks8851_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+	struct ks_net *ks = dev_get_priv(dev);
+	uchar *data = net_rx_packets[0];
+	int ret;
+
+	ret = ks8851_mll_recv_common(ks, data);
+	if (ret)
+		*packetp = (void *)data;
+
+	return ret ? ret : -EAGAIN;
+}
+
+static int ks8851_write_hwaddr(struct udevice *dev)
+{
+	struct ks_net *ks = dev_get_priv(dev);
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+
+	ks8851_mll_write_hwaddr_common(ks, pdata->enetaddr);
+
+	return 0;
+}
+
+static int ks8851_bind(struct udevice *dev)
+{
+	return device_set_name(dev, dev->name);
+}
+
+static int ks8851_probe(struct udevice *dev)
+{
+	struct ks_net *ks = dev_get_priv(dev);
 
 	/* Try to detect chip. Will fail if not present. */
-	if (ks8851_mll_detect_chip(dev)) {
-		free(dev);
-		return -1;
-	}
+	ks8851_mll_detect_chip(ks);
 
-	dev->init = ks8851_mll_init;
-	dev->halt = ks8851_mll_halt;
-	dev->send = ks8851_mll_send;
-	dev->recv = ks8851_mll_recv;
-	dev->write_hwaddr = ks8851_mll_write_hwaddr;
-	sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
+	return 0;
+}
+
+static int ks8851_ofdata_to_platdata(struct udevice *dev)
+{
+	struct ks_net *ks = dev_get_priv(dev);
+	struct eth_pdata *pdata = dev_get_platdata(dev);
 
-	eth_register(dev);
+	pdata->iobase = devfdt_get_addr(dev);
+	ks->iobase = pdata->iobase;
 
 	return 0;
 }
+
+static const struct eth_ops ks8851_ops = {
+	.start		= ks8851_start,
+	.stop		= ks8851_stop,
+	.send		= ks8851_send,
+	.recv		= ks8851_recv,
+	.write_hwaddr	= ks8851_write_hwaddr,
+};
+
+static const struct udevice_id ks8851_ids[] = {
+	{ .compatible = "micrel,ks8851-mll" },
+	{ }
+};
+
+U_BOOT_DRIVER(ks8851) = {
+	.name		= "eth_ks8851",
+	.id		= UCLASS_ETH,
+	.of_match	= ks8851_ids,
+	.bind		= ks8851_bind,
+	.ofdata_to_platdata = ks8851_ofdata_to_platdata,
+	.probe		= ks8851_probe,
+	.ops		= &ks8851_ops,
+	.priv_auto_alloc_size = sizeof(struct ks_net),
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.flags		= DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
diff --git a/drivers/net/lan91c96.c b/drivers/net/lan91c96.c
index c08bd21f95..13900f10b1 100644
--- a/drivers/net/lan91c96.c
+++ b/drivers/net/lan91c96.c
@@ -48,6 +48,7 @@
 #include <command.h>
 #include <env.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include "lan91c96.h"
 #include <net.h>
 #include <linux/compiler.h>
@@ -211,7 +212,7 @@ static void smc_reset(struct eth_device *dev)
 	SMC_SELECT_BANK(dev, 0);
 	SMC_outw(dev, LAN91C96_RCR_SOFT_RST, LAN91C96_RCR);
 
-	udelay (10);
+	udelay(10);
 
 	/* Disable transmit and receive functionality */
 	SMC_outw(dev, 0, LAN91C96_RCR);
@@ -438,7 +439,7 @@ static int smc_send_packet(struct eth_device *dev, void *packet,
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw(dev, LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY)
-			udelay (10);
+			udelay(10);
 
 		PRINTK2("MMU ready\n");
 
@@ -455,7 +456,7 @@ static int smc_send_packet(struct eth_device *dev, void *packet,
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw(dev, LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY)
-			udelay (10);
+			udelay(10);
 
 		PRINTK2 ("MMU ready\n");
 	}
@@ -600,13 +601,13 @@ static int smc_rcv(struct eth_device *dev)
 	}
 
 	while (SMC_inw(dev, LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY)
-		udelay (1);		/* Wait until not busy */
+		udelay(1);		/* Wait until not busy */
 
 	/*  error or good, tell the card to get rid of this packet */
 	SMC_outw(dev, LAN91C96_MMUCR_RELEASE_RX, LAN91C96_MMU);
 
 	while (SMC_inw(dev, LAN91C96_MMU) & LAN91C96_MMUCR_NO_BUSY)
-		udelay (1);		/* Wait until not busy */
+		udelay(1);		/* Wait until not busy */
 
 	if (!is_error) {
 		/* Pass the packet up to the protocol layers. */
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.c b/drivers/net/ldpaa_eth/ldpaa_eth.c
index a3b9c152b2..116b307b67 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.c
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.c
@@ -6,19 +6,36 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/types.h>
 #include <malloc.h>
 #include <net.h>
 #include <hwconfig.h>
 #include <phy.h>
+#include <miiphy.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <fsl-mc/fsl_dpmac.h>
+#include <linux/delay.h>
 
 #include <fsl-mc/ldpaa_wriop.h>
 #include "ldpaa_eth.h"
 
 #ifdef CONFIG_PHYLIB
+#ifdef CONFIG_DM_ETH
+static void init_phy(struct udevice *dev)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+
+	priv->phy = dm_eth_phy_connect(dev);
+
+	if (!priv->phy)
+		return;
+
+	phy_config(priv->phy);
+}
+#else
 static int init_phy(struct eth_device *dev)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv;
@@ -63,6 +80,7 @@ static int init_phy(struct eth_device *dev)
 	return ret;
 }
 #endif
+#endif
 
 #ifdef DEBUG
 
@@ -128,9 +146,15 @@ static void ldpaa_eth_get_dpni_counter(void)
 	}
 }
 
+#ifdef CONFIG_DM_ETH
+static void ldpaa_eth_get_dpmac_counter(struct udevice *dev)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+#else
 static void ldpaa_eth_get_dpmac_counter(struct eth_device *net_dev)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
+#endif
 	int err = 0;
 	u64 value;
 
@@ -263,9 +287,16 @@ error:
 	return;
 }
 
+#ifdef CONFIG_DM_ETH
+static int ldpaa_eth_pull_dequeue_rx(struct udevice *dev,
+				     int flags, uchar **packetp)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+#else
 static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)dev->priv;
+#endif
 	const struct ldpaa_dq *dq;
 	const struct dpaa_fd *fd;
 	int i = 5, err = 0, status;
@@ -322,9 +353,15 @@ static int ldpaa_eth_pull_dequeue_rx(struct eth_device *dev)
 	return err;
 }
 
+#ifdef CONFIG_DM_ETH
+static int ldpaa_eth_tx(struct udevice *dev, void *buf, int len)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+#else
 static int ldpaa_eth_tx(struct eth_device *net_dev, void *buf, int len)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
+#endif
 	struct dpaa_fd fd;
 	u64 buffer_start;
 	int data_offset, err;
@@ -400,15 +437,33 @@ error:
 	return err;
 }
 
+static struct phy_device *ldpaa_get_phydev(struct ldpaa_eth_priv *priv)
+{
+#ifdef CONFIG_DM_ETH
+	return priv->phy;
+#else
+#ifdef CONFIG_PHYLIB
+	struct phy_device *phydev = NULL;
+	int phy_num;
+
+	/* start the phy devices one by one and update the dpmac state */
+	for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
+		phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
+		if (phydev)
+			return phydev;
+	}
+	return NULL;
+#endif
+	return NULL;
+#endif
+}
+
 static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
 				 struct dpmac_link_state *state)
 {
 	phy_interface_t enet_if;
-	int phys_detected;
-#ifdef CONFIG_PHYLIB
 	struct phy_device *phydev = NULL;
-	int err, phy_num;
-#endif
+	int err;
 
 	/* let's start off with maximum capabilities */
 	enet_if = wriop_get_enet_if(priv->dpmac_id);
@@ -420,39 +475,28 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
 		state->rate = SPEED_1000;
 		break;
 	}
-	state->up = 1;
 
-	phys_detected = 0;
-#ifdef CONFIG_PHYLIB
+	state->up = 1;
 	state->options |= DPMAC_LINK_OPT_AUTONEG;
+	phydev = ldpaa_get_phydev(priv);
 
-	/* start the phy devices one by one and update the dpmac state */
-	for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
-		phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
-		if (!phydev)
-			continue;
-
-		phys_detected++;
+	if (phydev) {
 		err = phy_startup(phydev);
 		if (err) {
 			printf("%s: Could not initialize\n", phydev->dev->name);
 			state->up = 0;
-			break;
-		}
-		if (phydev->link) {
+		} else if (phydev->link) {
 			state->rate = min(state->rate, (uint32_t)phydev->speed);
 			if (!phydev->duplex)
 				state->options |= DPMAC_LINK_OPT_HALF_DUPLEX;
 			if (!phydev->autoneg)
 				state->options &= ~DPMAC_LINK_OPT_AUTONEG;
 		} else {
-			/* break out of loop even if one phy is down */
 			state->up = 0;
-			break;
 		}
 	}
-#endif
-	if (!phys_detected)
+
+	if (!phydev)
 		state->options &= ~DPMAC_LINK_OPT_AUTONEG;
 
 	if (!state->up) {
@@ -464,9 +508,16 @@ static int ldpaa_get_dpmac_state(struct ldpaa_eth_priv *priv,
 	return 0;
 }
 
+#ifdef CONFIG_DM_ETH
+static int ldpaa_eth_open(struct udevice *dev)
+{
+	struct eth_pdata *plat = dev_get_platdata(dev);
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+#else
 static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
+#endif
 	struct dpmac_link_state	dpmac_link_state = { 0 };
 #ifdef DEBUG
 	struct dpni_link_state link_state;
@@ -474,8 +525,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)
 	int err = 0;
 	struct dpni_queue d_queue;
 
+#ifdef CONFIG_DM_ETH
+	if (eth_is_active(dev))
+		return 0;
+#else
 	if (net_dev->state == ETH_STATE_ACTIVE)
 		return 0;
+#endif
 
 	if (get_mc_boot_status() != 0) {
 		printf("ERROR (MC is not booted)\n");
@@ -515,8 +571,13 @@ static int ldpaa_eth_open(struct eth_device *net_dev, bd_t *bd)
 	if (err)
 		goto err_dpni_bind;
 
+#ifdef CONFIG_DM_ETH
+	err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
+				dflt_dpni->dpni_handle, plat->enetaddr);
+#else
 	err = dpni_add_mac_addr(dflt_mc_io, MC_CMD_NO_FLAGS,
 				dflt_dpni->dpni_handle, net_dev->enetaddr);
+#endif
 	if (err) {
 		printf("dpni_add_mac_addr() failed\n");
 		return err;
@@ -589,23 +650,35 @@ err_dpmac_setup:
 	return err;
 }
 
+#ifdef CONFIG_DM_ETH
+static void ldpaa_eth_stop(struct udevice *dev)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+#else
 static void ldpaa_eth_stop(struct eth_device *net_dev)
 {
 	struct ldpaa_eth_priv *priv = (struct ldpaa_eth_priv *)net_dev->priv;
-	int err = 0;
-#ifdef CONFIG_PHYLIB
-	struct phy_device *phydev = NULL;
-	int phy_num;
 #endif
+	struct phy_device *phydev = NULL;
+	int err = 0;
 
+#ifdef CONFIG_DM_ETH
+	if (!eth_is_active(dev))
+		return;
+#else
 	if ((net_dev->state == ETH_STATE_PASSIVE) ||
 	    (net_dev->state == ETH_STATE_INIT))
 		return;
+#endif
 
 #ifdef DEBUG
 	ldpaa_eth_get_dpni_counter();
+#ifdef CONFIG_DM_ETH
+	ldpaa_eth_get_dpmac_counter(dev);
+#else
 	ldpaa_eth_get_dpmac_counter(net_dev);
 #endif
+#endif
 
 	err = dprc_disconnect(dflt_mc_io, MC_CMD_NO_FLAGS,
 			      dflt_dprc_handle, &dpmac_endpoint);
@@ -628,13 +701,9 @@ static void ldpaa_eth_stop(struct eth_device *net_dev)
 	if (err < 0)
 		printf("dpni_disable() failed\n");
 
-#ifdef CONFIG_PHYLIB
-	for (phy_num = 0; phy_num < WRIOP_MAX_PHY_NUM; phy_num++) {
-		phydev = wriop_get_phy_dev(priv->dpmac_id, phy_num);
-		if (phydev)
-			phy_shutdown(phydev);
-	}
-#endif
+	phydev = ldpaa_get_phydev(priv);
+	if (phydev)
+		phy_shutdown(phydev);
 
 	/* Free DPBP handle and reset. */
 	ldpaa_dpbp_free();
@@ -1027,6 +1096,107 @@ static int ldpaa_dpni_bind(struct ldpaa_eth_priv *priv)
 	return 0;
 }
 
+#ifdef CONFIG_DM_ETH
+static int ldpaa_eth_probe(struct udevice *dev)
+{
+	struct ofnode_phandle_args phandle;
+
+	/* Nothing to do if there is no "phy-handle" in the DTS node */
+	if (dev_read_phandle_with_args(dev, "phy-handle", NULL,
+				       0, 0, &phandle)) {
+		return 0;
+	}
+
+	init_phy(dev);
+
+	return 0;
+}
+
+static uint32_t ldpaa_eth_get_dpmac_id(struct udevice *dev)
+{
+	int port_node = dev_of_offset(dev);
+
+	return fdtdec_get_uint(gd->fdt_blob, port_node, "reg", -1);
+}
+
+static const char *ldpaa_eth_get_phy_mode_str(struct udevice *dev)
+{
+	int port_node = dev_of_offset(dev);
+	const char *phy_mode_str;
+
+	phy_mode_str = fdt_getprop(gd->fdt_blob, port_node,
+				   "phy-connection-type", NULL);
+	if (phy_mode_str)
+		return phy_mode_str;
+
+	phy_mode_str = fdt_getprop(gd->fdt_blob, port_node, "phy-mode", NULL);
+	return phy_mode_str;
+}
+
+static int ldpaa_eth_bind(struct udevice *dev)
+{
+	const char *phy_mode_str = NULL;
+	uint32_t dpmac_id;
+	char eth_name[16];
+	int phy_mode = -1;
+
+	phy_mode_str = ldpaa_eth_get_phy_mode_str(dev);
+	if (phy_mode_str)
+		phy_mode = phy_get_interface_by_name(phy_mode_str);
+	if (phy_mode == -1) {
+		dev_err(dev, "incorrect phy mode\n");
+		return -EINVAL;
+	}
+
+	dpmac_id = ldpaa_eth_get_dpmac_id(dev);
+	if (dpmac_id == -1) {
+		dev_err(dev, "missing reg field from the dpmac node\n");
+		return -EINVAL;
+	}
+
+	sprintf(eth_name, "DPMAC%d@%s", dpmac_id, phy_mode_str);
+	device_set_name(dev, eth_name);
+
+	return 0;
+}
+
+static int ldpaa_eth_ofdata_to_platdata(struct udevice *dev)
+{
+	struct ldpaa_eth_priv *priv = dev_get_priv(dev);
+	const char *phy_mode_str;
+
+	priv->dpmac_id = ldpaa_eth_get_dpmac_id(dev);
+	phy_mode_str = ldpaa_eth_get_phy_mode_str(dev);
+	priv->phy_mode = phy_get_interface_by_name(phy_mode_str);
+
+	return 0;
+}
+
+static const struct eth_ops ldpaa_eth_ops = {
+	.start	= ldpaa_eth_open,
+	.send	= ldpaa_eth_tx,
+	.recv	= ldpaa_eth_pull_dequeue_rx,
+	.stop	= ldpaa_eth_stop,
+};
+
+static const struct udevice_id ldpaa_eth_of_ids[] = {
+	{ .compatible = "fsl,qoriq-mc-dpmac" },
+};
+
+U_BOOT_DRIVER(ldpaa_eth) = {
+	.name = "ldpaa_eth",
+	.id = UCLASS_ETH,
+	.of_match = ldpaa_eth_of_ids,
+	.ofdata_to_platdata = ldpaa_eth_ofdata_to_platdata,
+	.bind = ldpaa_eth_bind,
+	.probe = ldpaa_eth_probe,
+	.ops = &ldpaa_eth_ops,
+	.priv_auto_alloc_size = sizeof(struct ldpaa_eth_priv),
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+};
+
+#else
+
 static int ldpaa_eth_netdev_init(struct eth_device *net_dev,
 				 phy_interface_t enet_if)
 {
@@ -1099,3 +1269,4 @@ err_netdev_init:
 
 	return err;
 }
+#endif
diff --git a/drivers/net/ldpaa_eth/ldpaa_eth.h b/drivers/net/ldpaa_eth/ldpaa_eth.h
index 3f9154b5bb..e90513e56f 100644
--- a/drivers/net/ldpaa_eth/ldpaa_eth.h
+++ b/drivers/net/ldpaa_eth/ldpaa_eth.h
@@ -116,7 +116,13 @@ struct ldpaa_fas {
 					 LDPAA_ETH_FAS_TIDE)
 
 struct ldpaa_eth_priv {
+#ifdef CONFIG_DM_ETH
+	struct phy_device *phy;
+	int phy_mode;
+	bool started;
+#else
 	struct eth_device *net_dev;
+#endif
 	uint32_t dpmac_id;
 	uint16_t dpmac_handle;
 
diff --git a/drivers/net/lpc32xx_eth.c b/drivers/net/lpc32xx_eth.c
index ec5184edf8..f68daaaff5 100644
--- a/drivers/net/lpc32xx_eth.c
+++ b/drivers/net/lpc32xx_eth.c
@@ -7,10 +7,12 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/types.h>
 #include <asm/system.h>
diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index bd588cab06..424ca59707 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -6,6 +6,8 @@
 #include <clk.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/delay.h>
 
 /*
  * The u-boot networking stack is a little weird.  It seems like the
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
index 8caf0ba6b1..697549301f 100644
--- a/drivers/net/mcffec.c
+++ b/drivers/net/mcffec.c
@@ -19,6 +19,7 @@
 #include <miiphy.h>
 #include <asm/fec.h>
 #include <asm/immap.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 
 #undef	ET_DEBUG
diff --git a/drivers/net/mcfmii.c b/drivers/net/mcfmii.c
index 3b8ee07c13..393605512d 100644
--- a/drivers/net/mcfmii.c
+++ b/drivers/net/mcfmii.c
@@ -8,6 +8,7 @@
 #include <config.h>
 #include <net.h>
 #include <netdev.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_MCF547x_8x
 #include <asm/fsl_mcdmafec.h>
diff --git a/drivers/net/mdio_mux_i2creg.c b/drivers/net/mdio_mux_i2creg.c
index 3e82898f46..cc02b5ffd4 100644
--- a/drivers/net/mdio_mux_i2creg.c
+++ b/drivers/net/mdio_mux_i2creg.c
@@ -6,6 +6,7 @@
 
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <miiphy.h>
 #include <i2c.h>
 
diff --git a/drivers/net/mpc8xx_fec.c b/drivers/net/mpc8xx_fec.c
index 69b2174ab3..f9f7dd7cb3 100644
--- a/drivers/net/mpc8xx_fec.c
+++ b/drivers/net/mpc8xx_fec.c
@@ -12,6 +12,7 @@
 #include <netdev.h>
 #include <asm/cpm_8xx.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #include <phy.h>
 #include <linux/mii.h>
diff --git a/drivers/net/mscc_eswitch/jr2_switch.c b/drivers/net/mscc_eswitch/jr2_switch.c
index 33dd002146..1c9a401de8 100644
--- a/drivers/net/mscc_eswitch/jr2_switch.c
+++ b/drivers/net/mscc_eswitch/jr2_switch.c
@@ -10,6 +10,8 @@
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <miiphy.h>
diff --git a/drivers/net/mscc_eswitch/luton_switch.c b/drivers/net/mscc_eswitch/luton_switch.c
index 9d24c005c1..1d46d0e5e1 100644
--- a/drivers/net/mscc_eswitch/luton_switch.c
+++ b/drivers/net/mscc_eswitch/luton_switch.c
@@ -10,6 +10,7 @@
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <miiphy.h>
diff --git a/drivers/net/mscc_eswitch/mscc_mac_table.c b/drivers/net/mscc_eswitch/mscc_mac_table.c
index 833e233aa5..25b9cad42c 100644
--- a/drivers/net/mscc_eswitch/mscc_mac_table.c
+++ b/drivers/net/mscc_eswitch/mscc_mac_table.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2018 Microsemi Corporation
  */
 
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include "mscc_mac_table.h"
 
diff --git a/drivers/net/mscc_eswitch/mscc_miim.c b/drivers/net/mscc_eswitch/mscc_miim.c
index d8ee8df47b..6687787b1a 100644
--- a/drivers/net/mscc_eswitch/mscc_miim.c
+++ b/drivers/net/mscc_eswitch/mscc_miim.c
@@ -5,6 +5,7 @@
 
 #include <miiphy.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 #include "mscc_miim.h"
 
 #define MIIM_STATUS			0x0
diff --git a/drivers/net/mscc_eswitch/mscc_xfer.c b/drivers/net/mscc_eswitch/mscc_xfer.c
index f412901f1d..6f74746457 100644
--- a/drivers/net/mscc_eswitch/mscc_xfer.c
+++ b/drivers/net/mscc_eswitch/mscc_xfer.c
@@ -3,6 +3,9 @@
  * Copyright (c) 2018 Microsemi Corporation
  */
 
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include "mscc_xfer.h"
 
diff --git a/drivers/net/mscc_eswitch/ocelot_switch.c b/drivers/net/mscc_eswitch/ocelot_switch.c
index fe48f371c3..2a48dc6a19 100644
--- a/drivers/net/mscc_eswitch/ocelot_switch.c
+++ b/drivers/net/mscc_eswitch/ocelot_switch.c
@@ -6,10 +6,12 @@
 #include <common.h>
 #include <config.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <miiphy.h>
diff --git a/drivers/net/mscc_eswitch/serval_switch.c b/drivers/net/mscc_eswitch/serval_switch.c
index f05fa42ff3..d8ee1a7698 100644
--- a/drivers/net/mscc_eswitch/serval_switch.c
+++ b/drivers/net/mscc_eswitch/serval_switch.c
@@ -6,10 +6,12 @@
 #include <common.h>
 #include <config.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <miiphy.h>
diff --git a/drivers/net/mscc_eswitch/servalt_switch.c b/drivers/net/mscc_eswitch/servalt_switch.c
index bf95a38354..1cf2273142 100644
--- a/drivers/net/mscc_eswitch/servalt_switch.c
+++ b/drivers/net/mscc_eswitch/servalt_switch.c
@@ -10,6 +10,7 @@
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/ioport.h>
 #include <miiphy.h>
diff --git a/drivers/net/mt7628-eth.c b/drivers/net/mt7628-eth.c
index 404a046422..64f1c8c828 100644
--- a/drivers/net/mt7628-eth.c
+++ b/drivers/net/mt7628-eth.c
@@ -16,13 +16,17 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <net.h>
 #include <reset.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 /* Ethernet frame engine register */
diff --git a/drivers/net/mtk_eth.c b/drivers/net/mtk_eth.c
index 5ffcc5313d..86f1360ae3 100644
--- a/drivers/net/mtk_eth.c
+++ b/drivers/net/mtk_eth.c
@@ -9,15 +9,19 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
+#include <net.h>
 #include <regmap.h>
 #include <reset.h>
 #include <syscon.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/ioport.h>
 #include <linux/mdio.h>
diff --git a/drivers/net/mtk_eth.h b/drivers/net/mtk_eth.h
index f2940c9996..be74ac27ea 100644
--- a/drivers/net/mtk_eth.h
+++ b/drivers/net/mtk_eth.h
@@ -10,6 +10,7 @@
 #define _MTK_ETH_H_
 
 /* Frame Engine Register Bases */
+#include <linux/bitops.h>
 #define PDMA_BASE			0x0800
 #define GDMA1_BASE			0x0500
 #define GDMA2_BASE			0x1500
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 037e59ec6e..7974dfc78d 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -13,20 +13,22 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/types.h>
 #include <asm/system.h>
 #include <asm/byteorder.h>
 #include <asm/arch/cpu.h>
 
-#if defined(CONFIG_KIRKWOOD)
+#if defined(CONFIG_ARCH_KIRKWOOD)
 #include <asm/arch/soc.h>
-#elif defined(CONFIG_ORION5X)
+#elif defined(CONFIG_ARCH_ORION5X)
 #include <asm/arch/orion5x.h>
 #endif
 
diff --git a/drivers/net/mvmdio.c b/drivers/net/mvmdio.c
index ec6805e536..a8e93e80fc 100644
--- a/drivers/net/mvmdio.c
+++ b/drivers/net/mvmdio.c
@@ -12,6 +12,7 @@
 #include <phy.h>
 #include <asm/io.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 
 #define MVMDIO_SMI_DATA_SHIFT		0
 #define MVMDIO_SMI_PHY_ADDR_SHIFT	16
diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index d737400a20..092f619bd5 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -15,13 +15,18 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <net.h>
 #include <netdev.h>
 #include <config.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <phy.h>
 #include <miiphy.h>
diff --git a/drivers/net/mvpp2.c b/drivers/net/mvpp2.c
index fcd24868af..19b9375ee2 100644
--- a/drivers/net/mvpp2.c
+++ b/drivers/net/mvpp2.c
@@ -16,6 +16,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <asm/cache.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
@@ -25,6 +26,9 @@
 #include <config.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <phy.h>
@@ -33,6 +37,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
 #include <linux/compat.h>
+#include <linux/libfdt.h>
 #include <linux/mbus.h>
 #include <asm-generic/gpio.h>
 #include <fdt_support.h>
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index 86f689802e..bf6fa8f2ba 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -56,6 +56,7 @@
 #include <netdev.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/delay.h>
 
 /* defines */
 #define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
diff --git a/drivers/net/ne2000.c b/drivers/net/ne2000.c
index e6cd3e9ba0..28a99bb8c4 100644
--- a/drivers/net/ne2000.c
+++ b/drivers/net/ne2000.c
@@ -74,6 +74,7 @@ Add SNMP
 
 #include <common.h>
 #include <command.h>
+#include <linux/delay.h>
 
 /* NE2000 base header file */
 #include "ne2000_base.h"
diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c
index a240d06ad4..55145da2bb 100644
--- a/drivers/net/ne2000_base.c
+++ b/drivers/net/ne2000_base.c
@@ -75,6 +75,7 @@ Add SNMP
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <linux/compiler.h>
diff --git a/drivers/net/ne2000_base.h b/drivers/net/ne2000_base.h
index eee0956fdb..2493608a5a 100644
--- a/drivers/net/ne2000_base.h
+++ b/drivers/net/ne2000_base.h
@@ -106,6 +106,7 @@ are GPL, so this is, of course, GPL.
 #endif
 
 /* timeout for tx/rx in s */
+#include <linux/delay.h>
 #define TOUT 5
 /* Ether MAC address size */
 #define ETHER_ADDR_LEN 6
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 73005ff94d..f1d0630d02 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <stdio_dev.h>
 #include <net.h>
 
diff --git a/drivers/net/ns8382x.c b/drivers/net/ns8382x.c
index ea7ece54b6..c292abad07 100644
--- a/drivers/net/ns8382x.c
+++ b/drivers/net/ns8382x.c
@@ -51,11 +51,13 @@
 
 /* Includes */
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/delay.h>
 
 /* defines */
 #define DSIZE     0x00000FFF
diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index b2823701a4..1daafbe2b9 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -9,10 +9,12 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <pci.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include "pch_gbe.h"
 
 #if !defined(CONFIG_PHYLIB)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index b4ad11d3fa..260a5a38cf 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -8,11 +8,14 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/delay.h>
 
 #define	PCNET_DEBUG_LEVEL	0	/* 0=off, 1=init, 2=rx/tx */
 
@@ -21,10 +24,6 @@
 #define PCNET_DEBUG2(fmt,args...)	\
 	debug_cond(PCNET_DEBUG_LEVEL > 1, fmt ,##args)
 
-#if !defined(CONF_PCNET_79C973) && defined(CONF_PCNET_79C975)
-#error "Macro for PCnet chip version is not defined!"
-#endif
-
 /*
  * Set the number of Tx and Rx buffers, using Log_2(# buffers).
  * Reasonable default values are 4 Tx buffers, and 16 Rx buffers.
@@ -95,37 +94,49 @@ static pcnet_priv_t *lp;
 
 static u16 pcnet_read_csr(struct eth_device *dev, int index)
 {
-	outw(index, dev->iobase + PCNET_RAP);
-	return inw(dev->iobase + PCNET_RDP);
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	writew(index, base + PCNET_RAP);
+	return readw(base + PCNET_RDP);
 }
 
 static void pcnet_write_csr(struct eth_device *dev, int index, u16 val)
 {
-	outw(index, dev->iobase + PCNET_RAP);
-	outw(val, dev->iobase + PCNET_RDP);
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	writew(index, base + PCNET_RAP);
+	writew(val, base + PCNET_RDP);
 }
 
 static u16 pcnet_read_bcr(struct eth_device *dev, int index)
 {
-	outw(index, dev->iobase + PCNET_RAP);
-	return inw(dev->iobase + PCNET_BDP);
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	writew(index, base + PCNET_RAP);
+	return readw(base + PCNET_BDP);
 }
 
 static void pcnet_write_bcr(struct eth_device *dev, int index, u16 val)
 {
-	outw(index, dev->iobase + PCNET_RAP);
-	outw(val, dev->iobase + PCNET_BDP);
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	writew(index, base + PCNET_RAP);
+	writew(val, base + PCNET_BDP);
 }
 
 static void pcnet_reset(struct eth_device *dev)
 {
-	inw(dev->iobase + PCNET_RESET);
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	readw(base + PCNET_RESET);
 }
 
 static int pcnet_check(struct eth_device *dev)
 {
-	outw(88, dev->iobase + PCNET_RAP);
-	return inw(dev->iobase + PCNET_RAP) == 88;
+	void __iomem *base = (void __iomem *)dev->iobase;
+
+	writew(88, base + PCNET_RAP);
+	return readw(base + PCNET_RAP) == 88;
 }
 
 static int pcnet_init (struct eth_device *dev, bd_t * bis);
@@ -183,14 +194,14 @@ int pcnet_initialize(bd_t *bis)
 		/*
 		 * Setup the PCI device.
 		 */
-		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &bar);
-		dev->iobase = pci_io_to_phys(devbusfn, bar);
+		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &bar);
+		dev->iobase = pci_mem_to_phys(devbusfn, bar);
 		dev->iobase &= ~0xf;
 
 		PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%lx: ",
 			     dev->name, devbusfn, (unsigned long)dev->iobase);
 
-		command = PCI_COMMAND_IO | PCI_COMMAND_MASTER;
+		command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
 		pci_write_config_word(devbusfn, PCI_COMMAND, command);
 		pci_read_config_word(devbusfn, PCI_COMMAND, &status);
 		if ((status & command) != command) {
@@ -254,16 +265,12 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
 	case 0x2621:
 		chipname = "PCnet/PCI II 79C970A";	/* PCI */
 		break;
-#ifdef CONFIG_PCNET_79C973
 	case 0x2625:
 		chipname = "PCnet/FAST III 79C973";	/* PCI */
 		break;
-#endif
-#ifdef CONFIG_PCNET_79C975
 	case 0x2627:
 		chipname = "PCnet/FAST III 79C975";	/* PCI */
 		break;
-#endif
 	default:
 		printf("%s: PCnet version %#x not supported\n",
 		       dev->name, chip_version);
@@ -340,7 +347,9 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
 		addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
 					       sizeof(*lp->uc));
 		flush_dcache_range(addr, addr + sizeof(*lp->uc));
-		addr = UNCACHED_SDRAM(addr);
+		addr = (unsigned long)map_physmem(addr,
+				roundup(sizeof(*lp->uc), ARCH_DMA_MINALIGN),
+				MAP_NOCACHE);
 		lp->uc = (struct pcnet_uncached_priv *)addr;
 
 		addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
diff --git a/drivers/net/pfe_eth/pfe_cmd.c b/drivers/net/pfe_eth/pfe_cmd.c
index dd8c68d57d..1e69525cb7 100644
--- a/drivers/net/pfe_eth/pfe_cmd.c
+++ b/drivers/net/pfe_eth/pfe_cmd.c
@@ -9,6 +9,10 @@
  * @brief PFE utility commands
  */
 
+#include <common.h>
+#include <command.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 
 static inline void pfe_command_help(void)
@@ -16,7 +20,7 @@ static inline void pfe_command_help(void)
 	printf("Usage: pfe [pe | status | expt ] <options>\n");
 }
 
-static void pfe_command_pe(int argc, char * const argv[])
+static void pfe_command_pe(int argc, char *const argv[])
 {
 	if (argc >= 3 && strcmp(argv[2], "pmem") == 0) {
 		if (argc >= 4 && strcmp(argv[3], "read") == 0) {
@@ -271,7 +275,7 @@ static void  bmu(int id, void *base)
 #define PEMBOX_ADDR_TMU		0x290
 #define	PESTATUS_ADDR_UTIL	0x0
 
-static void pfe_pe_status(int argc, char * const argv[])
+static void pfe_pe_status(int argc, char *const argv[])
 {
 	int do_clear = 0;
 	u32 id;
@@ -336,7 +340,7 @@ static void pfe_pe_status(int argc, char * const argv[])
 	}
 }
 
-static void pfe_command_status(int argc, char * const argv[])
+static void pfe_command_status(int argc, char *const argv[])
 {
 	if (argc >= 3 && strcmp(argv[2], "pe") == 0) {
 		pfe_pe_status(argc, argv);
@@ -370,7 +374,7 @@ static const char *register_names[EXPT_REG_COUNT] = {
 		" r12", " r13", " r14", " r15"
 };
 
-static void pfe_command_expt(int argc, char * const argv[])
+static void pfe_command_expt(int argc, char *const argv[])
 {
 	unsigned int id, i, val, addr;
 
@@ -414,7 +418,7 @@ static void send_dummy_pkt_to_hif(void)
 	writel(buf, TMU_PHY_INQ_PKTINFO);
 }
 
-static void pfe_command_stop(int argc, char * const argv[])
+static void pfe_command_stop(int argc, char *const argv[])
 {
 	int pfe_pe_id, hif_stop_loop = 10;
 	u32 rx_status;
@@ -462,8 +466,8 @@ static void pfe_command_stop(int argc, char * const argv[])
 }
 #endif
 
-static int pfe_command(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int pfe_command(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[])
 {
 	if (argc == 1 || strcmp(argv[1], "help") == 0) {
 		pfe_command_help();
diff --git a/drivers/net/pfe_eth/pfe_driver.c b/drivers/net/pfe_eth/pfe_driver.c
index f70a235217..6f443b4ea8 100644
--- a/drivers/net/pfe_eth/pfe_driver.c
+++ b/drivers/net/pfe_eth/pfe_driver.c
@@ -4,7 +4,9 @@
  * Copyright 2017 NXP
  */
 
+#include <log.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <net/pfe_eth/pfe_firmware.h>
 
diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c
index 1b5d11ef32..718e24f14d 100644
--- a/drivers/net/pfe_eth/pfe_eth.c
+++ b/drivers/net/pfe_eth/pfe_eth.c
@@ -6,9 +6,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/platform_data/pfe_dm_eth.h>
 #include <net.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <net/pfe_eth/pfe_mdio.h>
 
diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c
index 13112d9c1a..0493cfe872 100644
--- a/drivers/net/pfe_eth/pfe_firmware.c
+++ b/drivers/net/pfe_eth/pfe_firmware.c
@@ -10,7 +10,10 @@
  * files.
  */
 
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
+#include <linux/bitops.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <net/pfe_eth/pfe_firmware.h>
 #ifdef CONFIG_CHAIN_OF_TRUST
diff --git a/drivers/net/pfe_eth/pfe_hw.c b/drivers/net/pfe_eth/pfe_hw.c
index 7137ac154a..722f5c238f 100644
--- a/drivers/net/pfe_eth/pfe_hw.c
+++ b/drivers/net/pfe_eth/pfe_hw.c
@@ -3,6 +3,8 @@
  * Copyright 2015-2016 Freescale Semiconductor, Inc.
  * Copyright 2017 NXP
  */
+#include <log.h>
+#include <linux/bitops.h>
 #include <net/pfe_eth/pfe_eth.h>
 #include <net/pfe_eth/pfe/pfe_hw.h>
 
diff --git a/drivers/net/pfe_eth/pfe_mdio.c b/drivers/net/pfe_eth/pfe_mdio.c
index b990e7fbe2..3228b8df49 100644
--- a/drivers/net/pfe_eth/pfe_mdio.c
+++ b/drivers/net/pfe_eth/pfe_mdio.c
@@ -5,9 +5,11 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/platform_data/pfe_dm_eth.h>
 #include <net.h>
+#include <linux/delay.h>
 #include <net/pfe_eth/pfe_eth.h>
 
 extern struct gemac_s gem_info[];
diff --git a/drivers/net/phy/aquantia.c b/drivers/net/phy/aquantia.c
index 8ece926dd3..68cd3d03fd 100644
--- a/drivers/net/phy/aquantia.c
+++ b/drivers/net/phy/aquantia.c
@@ -8,7 +8,11 @@
 #include <config.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <net.h>
 #include <phy.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <u-boot/crc.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
diff --git a/drivers/net/phy/atheros.c b/drivers/net/phy/atheros.c
index 3783d155e7..13f7275d17 100644
--- a/drivers/net/phy/atheros.c
+++ b/drivers/net/phy/atheros.c
@@ -4,85 +4,330 @@
  *
  * Copyright 2011, 2013 Freescale Semiconductor, Inc.
  * author Andy Fleming
+ * Copyright (c) 2019 Michael Walle <michael@walle.cc>
  */
 #include <common.h>
 #include <phy.h>
+#include <dm/device_compat.h>
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <dt-bindings/net/qca-ar803x.h>
 
 #define AR803x_PHY_DEBUG_ADDR_REG	0x1d
 #define AR803x_PHY_DEBUG_DATA_REG	0x1e
 
+/* Debug registers */
+#define AR803x_DEBUG_REG_0		0x0
+#define AR803x_RGMII_RX_CLK_DLY		BIT(15)
+
 #define AR803x_DEBUG_REG_5		0x5
-#define AR803x_RGMII_TX_CLK_DLY		0x100
+#define AR803x_RGMII_TX_CLK_DLY		BIT(8)
 
-#define AR803x_DEBUG_REG_0		0x0
-#define AR803x_RGMII_RX_CLK_DLY		0x8000
+#define AR803x_DEBUG_REG_1F		0x1f
+#define AR803x_PLL_ON			BIT(2)
+#define AR803x_RGMII_1V8		BIT(3)
+
+/* CLK_25M register is at MMD 7, address 0x8016 */
+#define AR803x_CLK_25M_SEL_REG		0x8016
+
+#define AR803x_CLK_25M_MASK		GENMASK(4, 2)
+#define AR803x_CLK_25M_25MHZ_XTAL	0
+#define AR803x_CLK_25M_25MHZ_DSP	1
+#define AR803x_CLK_25M_50MHZ_PLL	2
+#define AR803x_CLK_25M_50MHZ_DSP	3
+#define AR803x_CLK_25M_62_5MHZ_PLL	4
+#define AR803x_CLK_25M_62_5MHZ_DSP	5
+#define AR803x_CLK_25M_125MHZ_PLL	6
+#define AR803x_CLK_25M_125MHZ_DSP	7
+#define AR8035_CLK_25M_MASK		GENMASK(4, 3)
+
+#define AR803x_CLK_25M_DR_MASK		GENMASK(8, 7)
+#define AR803x_CLK_25M_DR_FULL		0
+#define AR803x_CLK_25M_DR_HALF		1
+#define AR803x_CLK_25M_DR_QUARTER	2
+
+#define AR8021_PHY_ID 0x004dd040
+#define AR8031_PHY_ID 0x004dd074
+#define AR8035_PHY_ID 0x004dd072
+
+struct ar803x_priv {
+	int flags;
+#define AR803x_FLAG_KEEP_PLL_ENABLED	BIT(0) /* don't turn off internal PLL */
+#define AR803x_FLAG_RGMII_1V8		BIT(1) /* use 1.8V RGMII I/O voltage */
+	u16 clk_25m_reg;
+	u16 clk_25m_mask;
+};
+
+static int ar803x_debug_reg_read(struct phy_device *phydev, u16 reg)
+{
+	int ret;
+
+	ret = phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
+			reg);
+	if (ret < 0)
+		return ret;
+
+	return phy_read(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG);
+}
+
+static int ar803x_debug_reg_mask(struct phy_device *phydev, u16 reg,
+				 u16 clear, u16 set)
+{
+	int val;
+
+	val = ar803x_debug_reg_read(phydev, reg);
+	if (val < 0)
+		return val;
+
+	val &= 0xffff;
+	val &= ~clear;
+	val |= set;
+
+	return phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
+			 val);
+}
+
+static int ar803x_enable_rx_delay(struct phy_device *phydev, bool on)
+{
+	u16 clear = 0, set = 0;
+
+	if (on)
+		set = AR803x_RGMII_RX_CLK_DLY;
+	else
+		clear = AR803x_RGMII_RX_CLK_DLY;
+
+	return ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_0, clear, set);
+}
+
+static int ar803x_enable_tx_delay(struct phy_device *phydev, bool on)
+{
+	u16 clear = 0, set = 0;
+
+	if (on)
+		set = AR803x_RGMII_TX_CLK_DLY;
+	else
+		clear = AR803x_RGMII_TX_CLK_DLY;
+
+	return ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_5, clear, set);
+}
 
 static int ar8021_config(struct phy_device *phydev)
 {
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x00, 0x1200);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);
+	phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR,
+		  BMCR_ANENABLE | BMCR_ANRESTART);
+
+	ar803x_enable_tx_delay(phydev, true);
 
 	phydev->supported = phydev->drv->features;
 	return 0;
 }
 
-static int ar8031_config(struct phy_device *phydev)
+static int ar803x_delay_config(struct phy_device *phydev)
 {
+	int ret;
+
 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
-	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
-			  AR803x_DEBUG_REG_5);
-		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
-			  AR803x_RGMII_TX_CLK_DLY);
-	}
+	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+		ret = ar803x_enable_tx_delay(phydev, true);
+	else
+		ret = ar803x_enable_tx_delay(phydev, false);
 
 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
-	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
-		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,
-			  AR803x_DEBUG_REG_0);
-		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,
-			  AR803x_RGMII_RX_CLK_DLY);
-	}
+	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
+		ret = ar803x_enable_rx_delay(phydev, true);
+	else
+		ret = ar803x_enable_rx_delay(phydev, false);
 
-	phydev->supported = phydev->drv->features;
+	return ret;
+}
 
-	genphy_config_aneg(phydev);
-	genphy_restart_aneg(phydev);
+static int ar803x_regs_config(struct phy_device *phydev)
+{
+	struct ar803x_priv *priv = phydev->priv;
+	u16 set = 0, clear = 0;
+	int val;
+	int ret;
+
+	/* no configuration available */
+	if (!priv)
+		return 0;
+
+	/*
+	 * Only supported on the AR8031, AR8035 has strappings for the PLL mode
+	 * as well as the RGMII voltage.
+	 */
+	if (phydev->drv->uid == AR8031_PHY_ID) {
+		if (priv->flags & AR803x_FLAG_KEEP_PLL_ENABLED)
+			set |= AR803x_PLL_ON;
+		else
+			clear |= AR803x_PLL_ON;
+
+		if (priv->flags & AR803x_FLAG_RGMII_1V8)
+			set |= AR803x_RGMII_1V8;
+		else
+			clear |= AR803x_RGMII_1V8;
+
+		ret = ar803x_debug_reg_mask(phydev, AR803x_DEBUG_REG_1F, clear,
+					    set);
+		if (ret < 0)
+			return ret;
+	}
+
+	/* save the write access if the mask is empty */
+	if (priv->clk_25m_mask) {
+		val = phy_read_mmd(phydev, MDIO_MMD_AN, AR803x_CLK_25M_SEL_REG);
+		if (val < 0)
+			return val;
+		val &= ~priv->clk_25m_mask;
+		val |= priv->clk_25m_reg;
+		ret = phy_write_mmd(phydev, MDIO_MMD_AN,
+				    AR803x_CLK_25M_SEL_REG, val);
+		if (ret < 0)
+			return ret;
+	}
 
 	return 0;
 }
 
-static int ar8035_config(struct phy_device *phydev)
+static int ar803x_of_init(struct phy_device *phydev)
 {
-	int regval;
-
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);
-	regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));
-
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-	regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);
-	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));
-
-	if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
-	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
-		/* select debug reg 5 */
-		phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5);
-		/* enable tx delay */
-		phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100);
+#if defined(CONFIG_DM_ETH)
+	struct ar803x_priv *priv;
+	ofnode node, vddio_reg_node;
+	u32 strength, freq, min_uV, max_uV;
+	int sel;
+
+	node = phy_get_ofnode(phydev);
+	if (!ofnode_valid(node))
+		return -EINVAL;
+
+	priv = malloc(sizeof(*priv));
+	if (!priv)
+		return -ENOMEM;
+	memset(priv, 0, sizeof(*priv));
+
+	phydev->priv = priv;
+
+	debug("%s: found PHY node: %s\n", __func__, ofnode_get_name(node));
+
+	if (ofnode_read_bool(node, "qca,keep-pll-enabled"))
+		priv->flags |= AR803x_FLAG_KEEP_PLL_ENABLED;
+
+	/*
+	 * We can't use the regulator framework because the regulator is
+	 * a subnode of the PHY. So just read the two properties we are
+	 * interested in.
+	 */
+	vddio_reg_node = ofnode_find_subnode(node, "vddio-regulator");
+	if (ofnode_valid(vddio_reg_node)) {
+		min_uV = ofnode_read_u32_default(vddio_reg_node,
+						 "regulator-min-microvolt", 0);
+		max_uV = ofnode_read_u32_default(vddio_reg_node,
+						 "regulator-max-microvolt", 0);
+
+		if (min_uV != max_uV) {
+			free(priv);
+			return -EINVAL;
+		}
+
+		switch (min_uV) {
+		case 1500000:
+			break;
+		case 1800000:
+			priv->flags |= AR803x_FLAG_RGMII_1V8;
+			break;
+		default:
+			free(priv);
+			return -EINVAL;
+		}
+	}
+
+	/*
+	 * Get the CLK_25M frequency from the device tree. Only XTAL and PLL
+	 * sources are supported right now. There is also the possibilty to use
+	 * the DSP as frequency reference, this is used for synchronous
+	 * ethernet.
+	 */
+	if (!ofnode_read_u32(node, "qca,clk-out-frequency", &freq)) {
+		switch (freq) {
+		case 25000000:
+			sel = AR803x_CLK_25M_25MHZ_XTAL;
+			break;
+		case 50000000:
+			sel = AR803x_CLK_25M_50MHZ_PLL;
+			break;
+		case 62500000:
+			sel = AR803x_CLK_25M_62_5MHZ_PLL;
+			break;
+		case 125000000:
+			sel = AR803x_CLK_25M_125MHZ_PLL;
+			break;
+		default:
+			dev_err(phydev->dev,
+				"invalid qca,clk-out-frequency\n");
+			free(priv);
+			return -EINVAL;
+		}
+
+		priv->clk_25m_mask |= AR803x_CLK_25M_MASK;
+		priv->clk_25m_reg |= FIELD_PREP(AR803x_CLK_25M_MASK, sel);
+		/*
+		 * Fixup for the AR8035 which only has two bits. The two
+		 * remaining bits map to the same frequencies.
+		 */
+		if (phydev->drv->uid == AR8035_PHY_ID) {
+			u16 clear = AR803x_CLK_25M_MASK & AR8035_CLK_25M_MASK;
+
+			priv->clk_25m_mask &= ~clear;
+			priv->clk_25m_reg &= ~clear;
+		}
 	}
 
-	if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
-	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {
-		/* select debug reg 0 */
-		phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0);
-		/* enable rx delay */
-		phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000);
+	if (phydev->drv->uid == AR8031_PHY_ID &&
+	    !ofnode_read_u32(node, "qca,clk-out-strength", &strength)) {
+		switch (strength) {
+		case AR803X_STRENGTH_FULL:
+			sel = AR803x_CLK_25M_DR_FULL;
+			break;
+		case AR803X_STRENGTH_HALF:
+			sel = AR803x_CLK_25M_DR_HALF;
+			break;
+		case AR803X_STRENGTH_QUARTER:
+			sel = AR803x_CLK_25M_DR_QUARTER;
+			break;
+		default:
+			dev_err(phydev->dev,
+				"invalid qca,clk-out-strength\n");
+			free(priv);
+			return -EINVAL;
+		}
+		priv->clk_25m_mask |= AR803x_CLK_25M_DR_MASK;
+		priv->clk_25m_reg |= FIELD_PREP(AR803x_CLK_25M_DR_MASK, sel);
 	}
 
+	debug("%s: flags=%x clk_25m_reg=%04x clk_25m_mask=%04x\n", __func__,
+	      priv->flags, priv->clk_25m_reg, priv->clk_25m_mask);
+#endif
+
+	return 0;
+}
+
+static int ar803x_config(struct phy_device *phydev)
+{
+	int ret;
+
+	ret = ar803x_of_init(phydev);
+	if (ret < 0)
+		return ret;
+
+	ret = ar803x_delay_config(phydev);
+	if (ret < 0)
+		return ret;
+
+	ret = ar803x_regs_config(phydev);
+	if (ret < 0)
+		return ret;
+
 	phydev->supported = phydev->drv->features;
 
 	genphy_config_aneg(phydev);
@@ -93,8 +338,8 @@ static int ar8035_config(struct phy_device *phydev)
 
 static struct phy_driver AR8021_driver =  {
 	.name = "AR8021",
-	.uid = 0x4dd040,
-	.mask = 0x4ffff0,
+	.uid = AR8021_PHY_ID,
+	.mask = 0xfffffff0,
 	.features = PHY_GBIT_FEATURES,
 	.config = ar8021_config,
 	.startup = genphy_startup,
@@ -103,20 +348,20 @@ static struct phy_driver AR8021_driver =  {
 
 static struct phy_driver AR8031_driver =  {
 	.name = "AR8031/AR8033",
-	.uid = 0x4dd074,
+	.uid = AR8031_PHY_ID,
 	.mask = 0xffffffef,
 	.features = PHY_GBIT_FEATURES,
-	.config = ar8031_config,
+	.config = ar803x_config,
 	.startup = genphy_startup,
 	.shutdown = genphy_shutdown,
 };
 
 static struct phy_driver AR8035_driver =  {
 	.name = "AR8035",
-	.uid = 0x4dd072,
+	.uid = AR8035_PHY_ID,
 	.mask = 0xffffffef,
 	.features = PHY_GBIT_FEATURES,
-	.config = ar8035_config,
+	.config = ar803x_config,
 	.startup = genphy_startup,
 	.shutdown = genphy_shutdown,
 };
diff --git a/drivers/net/phy/b53.c b/drivers/net/phy/b53.c
index 30c4812d82..21da53c7e5 100644
--- a/drivers/net/phy/b53.c
+++ b/drivers/net/phy/b53.c
@@ -23,6 +23,9 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <errno.h>
 #include <malloc.h>
@@ -627,7 +630,7 @@ int phy_b53_init(void)
 	return 0;
 }
 
-int do_b53_reg_read(const char *name, int argc, char * const argv[])
+int do_b53_reg_read(const char *name, int argc, char *const argv[])
 {
 	u8 page, offset, width;
 	struct mii_dev *bus;
@@ -681,7 +684,7 @@ int do_b53_reg_read(const char *name, int argc, char * const argv[])
 	return ret;
 }
 
-int do_b53_reg_write(const char *name, int argc, char * const argv[])
+int do_b53_reg_write(const char *name, int argc, char *const argv[])
 {
 	u8 page, offset, width;
 	struct mii_dev *bus;
@@ -727,7 +730,7 @@ int do_b53_reg_write(const char *name, int argc, char * const argv[])
 	return ret;
 }
 
-int do_b53_reg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_b53_reg(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const char *cmd, *mdioname;
 	int ret = 0;
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 3399fd2366..566fcb8de7 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -7,6 +7,7 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 /* Broadcom BCM54xx -- taken from linux sungem_phy */
 #define MIIM_BCM54xx_AUXCNTL			0x18
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c
index ec81dab3f6..dbc20b1405 100644
--- a/drivers/net/phy/cortina.c
+++ b/drivers/net/phy/cortina.c
@@ -9,8 +9,10 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/ctype.h>
+#include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/err.h>
 #include <phy.h>
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 50804c130e..d435cc1e6c 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -4,8 +4,10 @@
  *
  */
 #include <common.h>
+#include <log.h>
 #include <phy.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <malloc.h>
 
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 93cf44ad4c..a62c695c5c 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -8,6 +8,8 @@
 #include <common.h>
 #include <errno.h>
 #include <phy.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define PHY_AUTONEGOTIATE_TIMEOUT 5000
 
diff --git a/drivers/net/phy/micrel_ksz8xxx.c b/drivers/net/phy/micrel_ksz8xxx.c
index e27fc45a28..98a0c83e68 100644
--- a/drivers/net/phy/micrel_ksz8xxx.c
+++ b/drivers/net/phy/micrel_ksz8xxx.c
@@ -12,6 +12,7 @@
 #include <fdtdec.h>
 #include <micrel.h>
 #include <phy.h>
+#include <linux/bitops.h>
 
 static struct phy_driver KSZ804_driver = {
 	.name = "Micrel KSZ804",
diff --git a/drivers/net/phy/micrel_ksz90x1.c b/drivers/net/phy/micrel_ksz90x1.c
index 0105fc5af1..f0032e8ce1 100644
--- a/drivers/net/phy/micrel_ksz90x1.c
+++ b/drivers/net/phy/micrel_ksz90x1.c
@@ -383,8 +383,8 @@ static int ksz9031_config(struct phy_device *phydev)
 
 static struct phy_driver ksz9031_driver = {
 	.name = "Micrel ksz9031",
-	.uid  = 0x221620,
-	.mask = 0xfffff0,
+	.uid  = PHY_ID_KSZ9031,
+	.mask = MII_KSZ9x31_SILICON_REV_MASK,
 	.features = PHY_GBIT_FEATURES,
 	.config   = &ksz9031_config,
 	.startup  = &ksz90xx_startup,
@@ -393,9 +393,67 @@ static struct phy_driver ksz9031_driver = {
 	.readext = &ksz9031_phy_extread,
 };
 
+/*
+ * KSZ9131
+ */
+static int ksz9131_config(struct phy_device *phydev)
+{
+	/* TBD: Implement Skew values for dts */
+
+	/* add an option to disable the gigabit feature of this PHY */
+	if (env_get("disable_giga")) {
+		unsigned features;
+		unsigned bmcr;
+
+		/* disable speed 1000 in features supported by the PHY */
+		features = phydev->drv->features;
+		features &= ~(SUPPORTED_1000baseT_Half |
+				SUPPORTED_1000baseT_Full);
+		phydev->advertising = phydev->supported = features;
+
+		/* disable speed 1000 in Basic Control Register */
+		bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
+		bmcr &= ~(1 << 6);
+		phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, bmcr);
+
+		/* disable speed 1000 in 1000Base-T Control Register */
+		phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0);
+
+		/* start autoneg */
+		genphy_config_aneg(phydev);
+		genphy_restart_aneg(phydev);
+
+		return 0;
+	}
+
+	return genphy_config(phydev);
+}
+
+static struct phy_driver ksz9131_driver = {
+	.name = "Micrel ksz9031",
+	.uid  = PHY_ID_KSZ9131,
+	.mask = MII_KSZ9x31_SILICON_REV_MASK,
+	.features = PHY_GBIT_FEATURES,
+	.config   = &ksz9131_config,
+	.startup  = &ksz90xx_startup,
+	.shutdown = &genphy_shutdown,
+	.writeext = &ksz9031_phy_extwrite,
+	.readext = &ksz9031_phy_extread,
+};
+
+int ksz9xx1_phy_get_id(struct phy_device *phydev)
+{
+	unsigned int phyid;
+
+	get_phy_id(phydev->bus, phydev->addr, MDIO_DEVAD_NONE, &phyid);
+
+	return phyid;
+}
+
 int phy_micrel_ksz90x1_init(void)
 {
 	phy_register(&ksz9021_driver);
 	phy_register(&ksz9031_driver);
+	phy_register(&ksz9131_driver);
 	return 0;
 }
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 72bbda5469..709979f48c 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -9,9 +9,11 @@
  *
  */
 
+#include <log.h>
 #include <miiphy.h>
 #include <bitfield.h>
 #include <time.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 
 /* Microsemi PHY ID's */
diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
index 5aff7ed397..7eff37b244 100644
--- a/drivers/net/phy/mv88e61xx.c
+++ b/drivers/net/phy/mv88e61xx.c
@@ -30,6 +30,9 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <bitfield.h>
 #include <errno.h>
diff --git a/drivers/net/phy/mv88e6352.c b/drivers/net/phy/mv88e6352.c
index 6fe08b80c1..62a7f19214 100644
--- a/drivers/net/phy/mv88e6352.c
+++ b/drivers/net/phy/mv88e6352.c
@@ -5,7 +5,10 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <mv88e6352.h>
 
@@ -230,7 +233,7 @@ int mv88e_sw_reset(const char *devname, u8 phy_addr)
 	return -ETIMEDOUT;
 }
 
-int do_mvsw_reg_read(const char *name, int argc, char * const argv[])
+int do_mvsw_reg_read(const char *name, int argc, char *const argv[])
 {
 	u16 value = 0, phyaddr, reg, port;
 	int ret;
@@ -245,7 +248,7 @@ int do_mvsw_reg_read(const char *name, int argc, char * const argv[])
 	return ret;
 }
 
-int do_mvsw_reg_write(const char *name, int argc, char * const argv[])
+int do_mvsw_reg_write(const char *name, int argc, char *const argv[])
 {
 	u16 value = 0, phyaddr, reg, port;
 	int ret;
@@ -261,7 +264,7 @@ int do_mvsw_reg_write(const char *name, int argc, char * const argv[])
 }
 
 
-int do_mvsw_reg(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_mvsw_reg(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 	const char *cmd, *ethname;
diff --git a/drivers/net/phy/ncsi.c b/drivers/net/phy/ncsi.c
index adc3ac033e..bf1e832be9 100644
--- a/drivers/net/phy/ncsi.c
+++ b/drivers/net/phy/ncsi.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <phy.h>
 #include <net/ncsi.h>
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 505d3ab659..cce09c47f9 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -10,12 +10,15 @@
 #include <common.h>
 #include <console.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <command.h>
 #include <miiphy.h>
 #include <phy.h>
 #include <errno.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/compiler.h>
 
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 8f1d759632..b4612c1cfd 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <linux/bitops.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 #define PHY_RTL8211x_FORCE_MASTER BIT(1)
 #define PHY_RTL8211E_PINE64_GIGABIT_FIX BIT(2)
@@ -56,6 +57,7 @@
 
 #define MIIM_RTL8211F_PAGE_SELECT      0x1f
 #define MIIM_RTL8211F_TX_DELAY		0x100
+#define MIIM_RTL8211F_RX_DELAY		0x8
 #define MIIM_RTL8211F_LCR		0x10
 
 static int rtl8211f_phy_extread(struct phy_device *phydev, int addr,
@@ -183,6 +185,16 @@ static int rtl8211f_config(struct phy_device *phydev)
 		reg &= ~MIIM_RTL8211F_TX_DELAY;
 
 	phy_write(phydev, MDIO_DEVAD_NONE, 0x11, reg);
+
+	/* enable RX-delay for rgmii-id and rgmii-rxid, otherwise disable it */
+	reg = phy_read(phydev, MDIO_DEVAD_NONE, 0x15);
+	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
+	    phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
+		reg |= MIIM_RTL8211F_RX_DELAY;
+	else
+		reg &= ~MIIM_RTL8211F_RX_DELAY;
+	phy_write(phydev, MDIO_DEVAD_NONE, 0x15, reg);
+
 	/* restore to default page 0 */
 	phy_write(phydev, MDIO_DEVAD_NONE,
 		  MIIM_RTL8211F_PAGE_SELECT, 0x0);
diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c
index 49d6a1ad90..60049c2074 100644
--- a/drivers/net/phy/teranetics.c
+++ b/drivers/net/phy/teranetics.c
@@ -7,6 +7,7 @@
  */
 #include <common.h>
 #include <phy.h>
+#include <linux/delay.h>
 
 #ifndef CONFIG_PHYLIB_10G
 #error The Teranetics PHY needs 10G support
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c
index 8c20da2682..e2feb17048 100644
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -6,6 +6,7 @@
  */
 
 #include <dm.h>
+#include <log.h>
 #include <phy.h>
 #include <config.h>
 #include <common.h>
diff --git a/drivers/net/phy/xilinx_phy.c b/drivers/net/phy/xilinx_phy.c
index 3aa8891efe..39dbfdb7da 100644
--- a/drivers/net/phy/xilinx_phy.c
+++ b/drivers/net/phy/xilinx_phy.c
@@ -7,6 +7,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <phy.h>
 #include <dm.h>
 
diff --git a/drivers/net/pic32_eth.c b/drivers/net/pic32_eth.c
index e966be038a..6a2084947b 100644
--- a/drivers/net/pic32_eth.c
+++ b/drivers/net/pic32_eth.c
@@ -7,6 +7,7 @@
 #include <cpu_func.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <miiphy.h>
@@ -14,6 +15,7 @@
 #include <time.h>
 #include <wait_bit.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 
 #include "pic32_eth.h"
diff --git a/drivers/net/pic32_eth.h b/drivers/net/pic32_eth.h
index 823c565a9b..7b873bc772 100644
--- a/drivers/net/pic32_eth.h
+++ b/drivers/net/pic32_eth.h
@@ -7,6 +7,7 @@
 #ifndef __MICROCHIP_PIC32_ETH_H_
 #define __MICROCHIP_PIC32_ETH_H_
 
+#include <linux/bitops.h>
 #include <mach/pic32.h>
 
 /* Ethernet */
diff --git a/drivers/net/pic32_mdio.c b/drivers/net/pic32_mdio.c
index 1aa5b1d8da..d4049cfea5 100644
--- a/drivers/net/pic32_mdio.c
+++ b/drivers/net/pic32_mdio.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "pic32_eth.h"
 
 static int pic32_mdio_write(struct mii_dev *bus,
diff --git a/drivers/net/ravb.c b/drivers/net/ravb.c
index fb4a628d63..393ee9bb81 100644
--- a/drivers/net/ravb.c
+++ b/drivers/net/ravb.c
@@ -13,8 +13,12 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <miiphy.h>
 #include <malloc.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <wait_bit.h>
 #include <asm/io.h>
diff --git a/drivers/net/rtl8139.c b/drivers/net/rtl8139.c
index bb59629f81..0daeefa489 100644
--- a/drivers/net/rtl8139.c
+++ b/drivers/net/rtl8139.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
 /*
  * rtl8139.c : U-Boot driver for the RealTek RTL8139
  *
@@ -8,81 +9,81 @@
  */
 
 /* rtl8139.c - etherboot driver for the Realtek 8139 chipset
-
-  ported from the linux driver written by Donald Becker
-  by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
-
-  This software may be used and distributed according to the terms
-  of the GNU Public License, incorporated herein by reference.
-
-  changes to the original driver:
-  - removed support for interrupts, switching to polling mode (yuck!)
-  - removed support for the 8129 chip (external MII)
-
-*/
+ *
+ * ported from the linux driver written by Donald Becker
+ * by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
+ *
+ * changes to the original driver:
+ * - removed support for interrupts, switching to polling mode (yuck!)
+ * - removed support for the 8129 chip (external MII)
+ */
 
 /*********************************************************************/
 /* Revision History						     */
 /*********************************************************************/
 
 /*
-  28 Dec 2002	ken_yap@users.sourceforge.net (Ken Yap)
-     Put in virt_to_bus calls to allow Etherboot relocation.
-
-  06 Apr 2001	ken_yap@users.sourceforge.net (Ken Yap)
-     Following email from Hyun-Joon Cha, added a disable routine, otherwise
-     NIC remains live and can crash the kernel later.
-
-  4 Feb 2000	espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
-     Shuffled things around, removed the leftovers from the 8129 support
-     that was in the Linux driver and added a bit more 8139 definitions.
-     Moved the 8K receive buffer to a fixed, available address outside the
-     0x98000-0x9ffff range.  This is a bit of a hack, but currently the only
-     way to make room for the Etherboot features that need substantial amounts
-     of code like the ANSI console support.  Currently the buffer is just below
-     0x10000, so this even conforms to the tagged boot image specification,
-     which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000.  My
-     interpretation of this "reserved" is that Etherboot may do whatever it
-     likes, as long as its environment is kept intact (like the BIOS
-     variables).  Hopefully fixed rtl_poll() once and for all.	The symptoms
-     were that if Etherboot was left at the boot menu for several minutes, the
-     first eth_poll failed.  Seems like I am the only person who does this.
-     First of all I fixed the debugging code and then set out for a long bug
-     hunting session.  It took me about a week full time work - poking around
-     various places in the driver, reading Don Becker's and Jeff Garzik's Linux
-     driver and even the FreeBSD driver (what a piece of crap!) - and
-     eventually spotted the nasty thing: the transmit routine was acknowledging
-     each and every interrupt pending, including the RxOverrun and RxFIFIOver
-     interrupts.  This confused the RTL8139 thoroughly.	 It destroyed the
-     Rx ring contents by dumping the 2K FIFO contents right where we wanted to
-     get the next packet.  Oh well, what fun.
-
-  18 Jan 2000	mdc@thinguin.org (Marty Connor)
-     Drastically simplified error handling.  Basically, if any error
-     in transmission or reception occurs, the card is reset.
-     Also, pointed all transmit descriptors to the same buffer to
-     save buffer space.	 This should decrease driver size and avoid
-     corruption because of exceeding 32K during runtime.
-
-  28 Jul 1999	(Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
-     rtl_poll was quite broken: it used the RxOK interrupt flag instead
-     of the RxBufferEmpty flag which often resulted in very bad
-     transmission performace - below 1kBytes/s.
-
-*/
+ * 28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
+ *    Put in virt_to_bus calls to allow Etherboot relocation.
+ *
+ * 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
+ *    Following email from Hyun-Joon Cha, added a disable routine, otherwise
+ *    NIC remains live and can crash the kernel later.
+ *
+ * 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
+ *    Shuffled things around, removed the leftovers from the 8129 support
+ *    that was in the Linux driver and added a bit more 8139 definitions.
+ *    Moved the 8K receive buffer to a fixed, available address outside the
+ *    0x98000-0x9ffff range. This is a bit of a hack, but currently the only
+ *    way to make room for the Etherboot features that need substantial amounts
+ *    of code like the ANSI console support. Currently the buffer is just below
+ *    0x10000, so this even conforms to the tagged boot image specification,
+ *    which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
+ *    interpretation of this "reserved" is that Etherboot may do whatever it
+ *    likes, as long as its environment is kept intact (like the BIOS
+ *    variables). Hopefully fixed rtl8139_recv() once and for all. The symptoms
+ *    were that if Etherboot was left at the boot menu for several minutes, the
+ *    first eth_poll failed. Seems like I am the only person who does this.
+ *    First of all I fixed the debugging code and then set out for a long bug
+ *    hunting session. It took me about a week full time work - poking around
+ *    various places in the driver, reading Don Becker's and Jeff Garzik's Linux
+ *    driver and even the FreeBSD driver (what a piece of crap!) - and
+ *    eventually spotted the nasty thing: the transmit routine was acknowledging
+ *    each and every interrupt pending, including the RxOverrun and RxFIFIOver
+ *    interrupts. This confused the RTL8139 thoroughly. It destroyed the
+ *    Rx ring contents by dumping the 2K FIFO contents right where we wanted to
+ *    get the next packet. Oh well, what fun.
+ *
+ * 18 Jan 2000 mdc@thinguin.org (Marty Connor)
+ *    Drastically simplified error handling. Basically, if any error
+ *    in transmission or reception occurs, the card is reset.
+ *    Also, pointed all transmit descriptors to the same buffer to
+ *    save buffer space. This should decrease driver size and avoid
+ *    corruption because of exceeding 32K during runtime.
+ *
+ * 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
+ *    rtl8139_recv was quite broken: it used the RxOK interrupt flag instead
+ *    of the RxBufferEmpty flag which often resulted in very bad
+ *    transmission performace - below 1kBytes/s.
+ *
+ */
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/types.h>
 
 #define RTL_TIMEOUT	100000
 
-/* PCI Tuning Parameters
-   Threshold is bytes transferred to chip before transmission starts. */
+/* PCI Tuning Parameters */
+/* Threshold is bytes transferred to chip before transmission starts. */
 #define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
 #define RX_FIFO_THRESH	4	/* Rx buffer level before first PCI xfer.  */
 #define RX_DMA_BURST	4	/* Maximum PCI burst, '4' is 256 bytes */
@@ -99,173 +100,103 @@
 #define phys_to_bus(a)	pci_phys_to_mem((pci_dev_t)dev->priv, a)
 
 /* Symbolic offsets to registers. */
-enum RTL8139_registers {
-	MAC0=0,			/* Ethernet hardware address. */
-	MAR0=8,			/* Multicast filter. */
-	TxStatus0=0x10,		/* Transmit status (four 32bit registers). */
-	TxAddr0=0x20,		/* Tx descriptors (also four 32bit). */
-	RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
-	ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
-	IntrMask=0x3C, IntrStatus=0x3E,
-	TxConfig=0x40, RxConfig=0x44,
-	Timer=0x48,		/* general-purpose counter. */
-	RxMissed=0x4C,		/* 24 bits valid, write clears. */
-	Cfg9346=0x50, Config0=0x51, Config1=0x52,
-	TimerIntrReg=0x54,	/* intr if gp counter reaches this value */
-	MediaStatus=0x58,
-	Config3=0x59,
-	MultiIntr=0x5C,
-	RevisionID=0x5E,	/* revision of the RTL8139 chip */
-	TxSummary=0x60,
-	MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
-	NWayExpansion=0x6A,
-	DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
-	NWayTestReg=0x70,
-	RxCnt=0x72,		/* packet received counter */
-	CSCR=0x74,		/* chip status and configuration register */
-	PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80,	/* undocumented */
-	/* from 0x84 onwards are a number of power management/wakeup frame
-	 * definitions we will probably never need to know about.  */
-};
-
-enum ChipCmdBits {
-	CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
-
-/* Interrupt register bits, using my own meaningful names. */
-enum IntrStatusBits {
-	PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
-	RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
-	TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
-};
-enum TxStatusBits {
-	TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
-	TxOutOfWindow=0x20000000, TxAborted=0x40000000,
-	TxCarrierLost=0x80000000,
-};
-enum RxStatusBits {
-	RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
-	RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
-	RxBadAlign=0x0002, RxStatusOK=0x0001,
-};
-
-enum MediaStatusBits {
-	MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
-	MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
-};
-
-enum MIIBMCRBits {
-	BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
-	BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
-};
-
-enum CSCRBits {
-	CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
-	CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
-	CSCR_LinkDownCmd=0x0f3c0,
-};
-
-/* Bits in RxConfig. */
-enum rx_mode_bits {
-	RxCfgWrap=0x80,
-	AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
-	AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
-};
+/* Ethernet hardware address. */
+#define RTL_REG_MAC0				0x00
+/* Multicast filter. */
+#define RTL_REG_MAR0				0x08
+/* Transmit status (four 32bit registers). */
+#define RTL_REG_TXSTATUS0			0x10
+/* Tx descriptors (also four 32bit). */
+#define RTL_REG_TXADDR0				0x20
+#define RTL_REG_RXBUF				0x30
+#define RTL_REG_RXEARLYCNT			0x34
+#define RTL_REG_RXEARLYSTATUS			0x36
+#define RTL_REG_CHIPCMD				0x37
+#define RTL_REG_CHIPCMD_CMDRESET		BIT(4)
+#define RTL_REG_CHIPCMD_CMDRXENB		BIT(3)
+#define RTL_REG_CHIPCMD_CMDTXENB		BIT(2)
+#define RTL_REG_CHIPCMD_RXBUFEMPTY		BIT(0)
+#define RTL_REG_RXBUFPTR			0x38
+#define RTL_REG_RXBUFADDR			0x3A
+#define RTL_REG_INTRMASK			0x3C
+#define RTL_REG_INTRSTATUS			0x3E
+#define RTL_REG_INTRSTATUS_PCIERR		BIT(15)
+#define RTL_REG_INTRSTATUS_PCSTIMEOUT		BIT(14)
+#define RTL_REG_INTRSTATUS_CABLELENCHANGE	BIT(13)
+#define RTL_REG_INTRSTATUS_RXFIFOOVER		BIT(6)
+#define RTL_REG_INTRSTATUS_RXUNDERRUN		BIT(5)
+#define RTL_REG_INTRSTATUS_RXOVERFLOW		BIT(4)
+#define RTL_REG_INTRSTATUS_TXERR		BIT(3)
+#define RTL_REG_INTRSTATUS_TXOK			BIT(2)
+#define RTL_REG_INTRSTATUS_RXERR		BIT(1)
+#define RTL_REG_INTRSTATUS_RXOK			BIT(0)
+#define RTL_REG_TXCONFIG			0x40
+#define RTL_REG_RXCONFIG			0x44
+#define RTL_REG_RXCONFIG_RXCFGWRAP		BIT(7)
+#define RTL_REG_RXCONFIG_ACCEPTERR		BIT(5)
+#define RTL_REG_RXCONFIG_ACCEPTRUNT		BIT(4)
+#define RTL_REG_RXCONFIG_ACCEPTBROADCAST	BIT(3)
+#define RTL_REG_RXCONFIG_ACCEPTMULTICAST	BIT(2)
+#define RTL_REG_RXCONFIG_ACCEPTMYPHYS		BIT(1)
+#define RTL_REG_RXCONFIG_ACCEPTALLPHYS		BIT(0)
+/* general-purpose counter. */
+#define RTL_REG_TIMER				0x48
+/* 24 bits valid, write clears. */
+#define RTL_REG_RXMISSED			0x4C
+#define RTL_REG_CFG9346				0x50
+#define RTL_REG_CONFIG0				0x51
+#define RTL_REG_CONFIG1				0x52
+/* intr if gp counter reaches this value */
+#define RTL_REG_TIMERINTRREG			0x54
+#define RTL_REG_MEDIASTATUS			0x58
+#define RTL_REG_MEDIASTATUS_MSRTXFLOWENABLE	BIT(7)
+#define RTL_REG_MEDIASTATUS_MSRRXFLOWENABLE	BIT(6)
+#define RTL_REG_MEDIASTATUS_MSRSPEED10		BIT(3)
+#define RTL_REG_MEDIASTATUS_MSRLINKFAIL		BIT(2)
+#define RTL_REG_MEDIASTATUS_MSRRXPAUSEFLAG	BIT(1)
+#define RTL_REG_MEDIASTATUS_MSRTXPAUSEFLAG	BIT(0)
+#define RTL_REG_CONFIG3				0x59
+#define RTL_REG_MULTIINTR			0x5C
+/* revision of the RTL8139 chip */
+#define RTL_REG_REVISIONID			0x5E
+#define RTL_REG_TXSUMMARY			0x60
+#define RTL_REG_MII_BMCR			0x62
+#define RTL_REG_MII_BMSR			0x64
+#define RTL_REG_NWAYADVERT			0x66
+#define RTL_REG_NWAYLPAR			0x68
+#define RTL_REG_NWAYEXPANSION			0x6A
+#define RTL_REG_DISCONNECTCNT			0x6C
+#define RTL_REG_FALSECARRIERCNT			0x6E
+#define RTL_REG_NWAYTESTREG			0x70
+/* packet received counter */
+#define RTL_REG_RXCNT				0x72
+/* chip status and configuration register */
+#define RTL_REG_CSCR				0x74
+#define RTL_REG_PHYPARM1			0x78
+#define RTL_REG_TWISTERPARM			0x7c
+/* undocumented */
+#define RTL_REG_PHYPARM2			0x80
+/*
+ * from 0x84 onwards are a number of power management/wakeup frame
+ * definitions we will probably never need to know about.
+ */
 
+#define RTL_STS_RXMULTICAST			BIT(15)
+#define RTL_STS_RXPHYSICAL			BIT(14)
+#define RTL_STS_RXBROADCAST			BIT(13)
+#define RTL_STS_RXBADSYMBOL			BIT(5)
+#define RTL_STS_RXRUNT				BIT(4)
+#define RTL_STS_RXTOOLONG			BIT(3)
+#define RTL_STS_RXCRCERR			BIT(2)
+#define RTL_STS_RXBADALIGN			BIT(1)
+#define RTL_STS_RXSTATUSOK			BIT(0)
+
+static unsigned int cur_rx, cur_tx;
 static int ioaddr;
-static unsigned int cur_rx,cur_tx;
 
 /* The RTL8139 can only transmit from a contiguous, aligned memory block.  */
-static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
-static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
-
-static int rtl8139_probe(struct eth_device *dev, bd_t *bis);
-static int read_eeprom(int location, int addr_len);
-static void rtl_reset(struct eth_device *dev);
-static int rtl_transmit(struct eth_device *dev, void *packet, int length);
-static int rtl_poll(struct eth_device *dev);
-static void rtl_disable(struct eth_device *dev);
-static int rtl_bcast_addr(struct eth_device *dev, const u8 *bcast_mac, int join)
-{
-	return (0);
-}
-
-static struct pci_device_id supported[] = {
-       {PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139},
-       {PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_8139},
-       {}
-};
-
-int rtl8139_initialize(bd_t *bis)
-{
-	pci_dev_t devno;
-	int card_number = 0;
-	struct eth_device *dev;
-	u32 iobase;
-	int idx=0;
-
-	while(1){
-		/* Find RTL8139 */
-		if ((devno = pci_find_devices(supported, idx++)) < 0)
-			break;
-
-		pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
-		iobase &= ~0xf;
-
-		debug ("rtl8139: REALTEK RTL8139 @0x%x\n", iobase);
-
-		dev = (struct eth_device *)malloc(sizeof *dev);
-		if (!dev) {
-			printf("Can not allocate memory of rtl8139\n");
-			break;
-		}
-		memset(dev, 0, sizeof(*dev));
-
-		sprintf (dev->name, "RTL8139#%d", card_number);
-
-		dev->priv = (void *) devno;
-		dev->iobase = (int)bus_to_phys(iobase);
-		dev->init = rtl8139_probe;
-		dev->halt = rtl_disable;
-		dev->send = rtl_transmit;
-		dev->recv = rtl_poll;
-		dev->mcast = rtl_bcast_addr;
-
-		eth_register (dev);
-
-		card_number++;
-
-		pci_write_config_byte (devno, PCI_LATENCY_TIMER, 0x20);
-
-		udelay (10 * 1000);
-	}
-
-	return card_number;
-}
-
-static int rtl8139_probe(struct eth_device *dev, bd_t *bis)
-{
-	int i;
-	int addr_len;
-	unsigned short *ap = (unsigned short *)dev->enetaddr;
-
-	ioaddr = dev->iobase;
-
-	/* Bring the chip out of low-power mode. */
-	outb(0x00, ioaddr + Config1);
-
-	addr_len = read_eeprom(0,8) == 0x8129 ? 8 : 6;
-	for (i = 0; i < 3; i++)
-		*ap++ = le16_to_cpu (read_eeprom(i + 7, addr_len));
-
-	rtl_reset(dev);
-
-	if (inb(ioaddr + MediaStatus) & MSRLinkFail) {
-		printf("Cable not connected or other link failure\n");
-		return -1 ;
-	}
-
-	return 0;
-}
+static unsigned char tx_buffer[TX_BUF_SIZE] __aligned(4);
+static unsigned char rx_ring[RX_BUF_LEN + 16] __aligned(4);
 
 /* Serial EEPROM section. */
 
@@ -278,51 +209,57 @@ static int rtl8139_probe(struct eth_device *dev, bd_t *bis)
 #define EE_DATA_READ	0x01	/* EEPROM chip data out. */
 #define EE_ENB		(0x80 | EE_CS)
 
-/*
-	Delay between EEPROM clock transitions.
-	No extra delay is needed with 33MHz PCI, but 66MHz may change this.
-*/
-
-#define eeprom_delay()	inl(ee_addr)
-
 /* The EEPROM commands include the alway-set leading bit. */
-#define EE_WRITE_CMD	(5)
-#define EE_READ_CMD	(6)
-#define EE_ERASE_CMD	(7)
+#define EE_WRITE_CMD	5
+#define EE_READ_CMD	6
+#define EE_ERASE_CMD	7
 
-static int read_eeprom(int location, int addr_len)
+static void rtl8139_eeprom_delay(uintptr_t regbase)
 {
-	int i;
+	/*
+	 * Delay between EEPROM clock transitions.
+	 * No extra delay is needed with 33MHz PCI, but 66MHz may change this.
+	 */
+	inl(regbase + RTL_REG_CFG9346);
+}
+
+static int rtl8139_read_eeprom(unsigned int location, unsigned int addr_len)
+{
+	unsigned int read_cmd = location | (EE_READ_CMD << addr_len);
+	uintptr_t ee_addr = ioaddr + RTL_REG_CFG9346;
 	unsigned int retval = 0;
-	long ee_addr = ioaddr + Cfg9346;
-	int read_cmd = location | (EE_READ_CMD << addr_len);
+	u8 dataval;
+	int i;
 
 	outb(EE_ENB & ~EE_CS, ee_addr);
 	outb(EE_ENB, ee_addr);
-	eeprom_delay();
+	rtl8139_eeprom_delay(ioaddr);
 
 	/* Shift the read command bits out. */
 	for (i = 4 + addr_len; i >= 0; i--) {
-		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
+		dataval = (read_cmd & BIT(i)) ? EE_DATA_WRITE : 0;
 		outb(EE_ENB | dataval, ee_addr);
-		eeprom_delay();
+		rtl8139_eeprom_delay(ioaddr);
 		outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
-		eeprom_delay();
+		rtl8139_eeprom_delay(ioaddr);
 	}
+
 	outb(EE_ENB, ee_addr);
-	eeprom_delay();
+	rtl8139_eeprom_delay(ioaddr);
 
 	for (i = 16; i > 0; i--) {
 		outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
-		eeprom_delay();
-		retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
+		rtl8139_eeprom_delay(ioaddr);
+		retval <<= 1;
+		retval |= inb(ee_addr) & EE_DATA_READ;
 		outb(EE_ENB, ee_addr);
-		eeprom_delay();
+		rtl8139_eeprom_delay(ioaddr);
 	}
 
 	/* Terminate the EEPROM access. */
 	outb(~EE_CS, ee_addr);
-	eeprom_delay();
+	rtl8139_eeprom_delay(ioaddr);
+
 	return retval;
 }
 
@@ -331,149 +268,174 @@ static const unsigned int rtl8139_rx_config =
 	(RX_FIFO_THRESH << 13) |
 	(RX_DMA_BURST << 8);
 
-static void set_rx_mode(struct eth_device *dev) {
-	unsigned int mc_filter[2];
-	int rx_mode;
+static void rtl8139_set_rx_mode(struct eth_device *dev)
+{
 	/* !IFF_PROMISC */
-	rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
-	mc_filter[1] = mc_filter[0] = 0xffffffff;
+	unsigned int rx_mode = RTL_REG_RXCONFIG_ACCEPTBROADCAST |
+			       RTL_REG_RXCONFIG_ACCEPTMULTICAST |
+			       RTL_REG_RXCONFIG_ACCEPTMYPHYS;
 
-	outl(rtl8139_rx_config | rx_mode, ioaddr + RxConfig);
+	outl(rtl8139_rx_config | rx_mode, ioaddr + RTL_REG_RXCONFIG);
 
-	outl(mc_filter[0], ioaddr + MAR0 + 0);
-	outl(mc_filter[1], ioaddr + MAR0 + 4);
+	outl(0xffffffff, ioaddr + RTL_REG_MAR0 + 0);
+	outl(0xffffffff, ioaddr + RTL_REG_MAR0 + 4);
 }
 
-static void rtl_reset(struct eth_device *dev)
+static void rtl8139_hw_reset(struct eth_device *dev)
 {
+	u8 reg;
 	int i;
 
-	outb(CmdReset, ioaddr + ChipCmd);
-
-	cur_rx = 0;
-	cur_tx = 0;
+	outb(RTL_REG_CHIPCMD_CMDRESET, ioaddr + RTL_REG_CHIPCMD);
 
 	/* Give the chip 10ms to finish the reset. */
-	for (i=0; i<100; ++i){
-		if ((inb(ioaddr + ChipCmd) & CmdReset) == 0) break;
-		udelay (100); /* wait 100us */
+	for (i = 0; i < 100; i++) {
+		reg = inb(ioaddr + RTL_REG_CHIPCMD);
+		if (!(reg & RTL_REG_CHIPCMD_CMDRESET))
+			break;
+
+		udelay(100);
 	}
+}
+
+static void rtl8139_reset(struct eth_device *dev)
+{
+	int i;
+
+	cur_rx = 0;
+	cur_tx = 0;
 
+	rtl8139_hw_reset(dev);
 
 	for (i = 0; i < ETH_ALEN; i++)
-		outb(dev->enetaddr[i], ioaddr + MAC0 + i);
+		outb(dev->enetaddr[i], ioaddr + RTL_REG_MAC0 + i);
 
 	/* Must enable Tx/Rx before setting transfer thresholds! */
-	outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
-	outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8),
-		ioaddr + RxConfig);		/* accept no frames yet!  */
-	outl((TX_DMA_BURST<<8)|0x03000000, ioaddr + TxConfig);
-
-	/* The Linux driver changes Config1 here to use a different LED pattern
-	 * for half duplex or full/autodetect duplex (for full/autodetect, the
-	 * outputs are TX/RX, Link10/100, FULL, while for half duplex it uses
-	 * TX/RX, Link100, Link10).  This is messy, because it doesn't match
-	 * the inscription on the mounting bracket.  It should not be changed
-	 * from the configuration EEPROM default, because the card manufacturer
-	 * should have set that to match the card.  */
-
-	debug_cond(DEBUG_RX,
-		"rx ring address is %lX\n",(unsigned long)rx_ring);
-	flush_cache((unsigned long)rx_ring, RX_BUF_LEN);
-	outl(phys_to_bus((int)rx_ring), ioaddr + RxBuf);
+	outb(RTL_REG_CHIPCMD_CMDRXENB | RTL_REG_CHIPCMD_CMDTXENB,
+	     ioaddr + RTL_REG_CHIPCMD);
+
+	/* accept no frames yet! */
+	outl(rtl8139_rx_config, ioaddr + RTL_REG_RXCONFIG);
+	outl((TX_DMA_BURST << 8) | 0x03000000, ioaddr + RTL_REG_TXCONFIG);
+
+	/*
+	 * The Linux driver changes RTL_REG_CONFIG1 here to use a different
+	 * LED pattern for half duplex or full/autodetect duplex (for
+	 * full/autodetect, the outputs are TX/RX, Link10/100, FULL, while
+	 * for half duplex it uses TX/RX, Link100, Link10).  This is messy,
+	 * because it doesn't match the inscription on the mounting bracket.
+	 * It should not be changed from the configuration EEPROM default,
+	 * because the card manufacturer should have set that to match the
+	 * card.
+	 */
+	debug_cond(DEBUG_RX, "rx ring address is %p\n", rx_ring);
 
-	/* If we add multicast support, the MAR0 register would have to be
-	 * initialized to 0xffffffffffffffff (two 32 bit accesses).  Etherboot
-	 * only needs broadcast (for ARP/RARP/BOOTP/DHCP) and unicast.	*/
+	flush_cache((unsigned long)rx_ring, RX_BUF_LEN);
+	outl(phys_to_bus((int)rx_ring), ioaddr + RTL_REG_RXBUF);
 
-	outb(CmdRxEnb | CmdTxEnb, ioaddr + ChipCmd);
+	/*
+	 * If we add multicast support, the RTL_REG_MAR0 register would have
+	 * to be initialized to 0xffffffffffffffff (two 32 bit accesses).
+	 * Etherboot only needs broadcast (for ARP/RARP/BOOTP/DHCP) and
+	 * unicast.
+	 */
+	outb(RTL_REG_CHIPCMD_CMDRXENB | RTL_REG_CHIPCMD_CMDTXENB,
+	     ioaddr + RTL_REG_CHIPCMD);
 
-	outl(rtl8139_rx_config, ioaddr + RxConfig);
+	outl(rtl8139_rx_config, ioaddr + RTL_REG_RXCONFIG);
 
 	/* Start the chip's Tx and Rx process. */
-	outl(0, ioaddr + RxMissed);
+	outl(0, ioaddr + RTL_REG_RXMISSED);
 
-	/* set_rx_mode */
-	set_rx_mode(dev);
+	rtl8139_set_rx_mode(dev);
 
 	/* Disable all known interrupts by setting the interrupt mask. */
-	outw(0, ioaddr + IntrMask);
+	outw(0, ioaddr + RTL_REG_INTRMASK);
 }
 
-static int rtl_transmit(struct eth_device *dev, void *packet, int length)
+static int rtl8139_send(struct eth_device *dev, void *packet, int length)
 {
-	unsigned int status;
-	unsigned long txstatus;
 	unsigned int len = length;
+	unsigned long txstatus;
+	unsigned int status;
 	int i = 0;
 
 	ioaddr = dev->iobase;
 
-	memcpy((char *)tx_buffer, (char *)packet, (int)length);
+	memcpy(tx_buffer, packet, length);
 
 	debug_cond(DEBUG_TX, "sending %d bytes\n", len);
 
-	/* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
-	 * bytes are sent automatically for the FCS, totalling to 64 bytes). */
-	while (len < ETH_ZLEN) {
+	/*
+	 * Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
+	 * bytes are sent automatically for the FCS, totalling to 64 bytes).
+	 */
+	while (len < ETH_ZLEN)
 		tx_buffer[len++] = '\0';
-	}
 
 	flush_cache((unsigned long)tx_buffer, length);
-	outl(phys_to_bus((int)tx_buffer), ioaddr + TxAddr0 + cur_tx*4);
-	outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
-		ioaddr + TxStatus0 + cur_tx*4);
+	outl(phys_to_bus((unsigned long)tx_buffer),
+	     ioaddr + RTL_REG_TXADDR0 + cur_tx * 4);
+	outl(((TX_FIFO_THRESH << 11) & 0x003f0000) | len,
+	     ioaddr + RTL_REG_TXSTATUS0 + cur_tx * 4);
 
 	do {
-		status = inw(ioaddr + IntrStatus);
-		/* Only acknlowledge interrupt sources we can properly handle
-		 * here - the RxOverflow/RxFIFOOver MUST be handled in the
-		 * rtl_poll() function.	 */
-		outw(status & (TxOK | TxErr | PCIErr), ioaddr + IntrStatus);
-		if ((status & (TxOK | TxErr | PCIErr)) != 0) break;
+		status = inw(ioaddr + RTL_REG_INTRSTATUS);
+		/*
+		 * Only acknlowledge interrupt sources we can properly
+		 * handle here - the RTL_REG_INTRSTATUS_RXOVERFLOW/
+		 * RTL_REG_INTRSTATUS_RXFIFOOVER MUST be handled in the
+		 * rtl8139_recv() function.
+		 */
+		status &= RTL_REG_INTRSTATUS_TXOK | RTL_REG_INTRSTATUS_TXERR |
+			  RTL_REG_INTRSTATUS_PCIERR;
+		outw(status, ioaddr + RTL_REG_INTRSTATUS);
+		if (status)
+			break;
+
 		udelay(10);
 	} while (i++ < RTL_TIMEOUT);
 
-	txstatus = inl(ioaddr + TxStatus0 + cur_tx*4);
-
-	if (status & TxOK) {
-		cur_tx = (cur_tx + 1) % NUM_TX_DESC;
+	txstatus = inl(ioaddr + RTL_REG_TXSTATUS0 + cur_tx * 4);
 
+	if (!(status & RTL_REG_INTRSTATUS_TXOK)) {
 		debug_cond(DEBUG_TX,
-			"tx done, status %hX txstatus %lX\n",
-			status, txstatus);
+			   "tx timeout/error (%d usecs), status %hX txstatus %lX\n",
+			   10 * i, status, txstatus);
 
-		return length;
-	} else {
-
-		debug_cond(DEBUG_TX,
-			"tx timeout/error (%d usecs), status %hX txstatus %lX\n",
-			10*i, status, txstatus);
-
-		rtl_reset(dev);
+		rtl8139_reset(dev);
 
 		return 0;
 	}
+
+	cur_tx = (cur_tx + 1) % NUM_TX_DESC;
+
+	debug_cond(DEBUG_TX, "tx done, status %hX txstatus %lX\n",
+		   status, txstatus);
+
+	return length;
 }
 
-static int rtl_poll(struct eth_device *dev)
+static int rtl8139_recv(struct eth_device *dev)
 {
-	unsigned int status;
-	unsigned int ring_offs;
+	const unsigned int rxstat = RTL_REG_INTRSTATUS_RXFIFOOVER |
+				    RTL_REG_INTRSTATUS_RXOVERFLOW |
+				    RTL_REG_INTRSTATUS_RXOK;
 	unsigned int rx_size, rx_status;
-	int length=0;
+	unsigned int ring_offs;
+	unsigned int status;
+	int length = 0;
 
 	ioaddr = dev->iobase;
 
-	if (inb(ioaddr + ChipCmd) & RxBufEmpty) {
+	if (inb(ioaddr + RTL_REG_CHIPCMD) & RTL_REG_CHIPCMD_RXBUFEMPTY)
 		return 0;
-	}
 
-	status = inw(ioaddr + IntrStatus);
+	status = inw(ioaddr + RTL_REG_INTRSTATUS);
 	/* See below for the rest of the interrupt acknowledges.  */
-	outw(status & ~(RxFIFOOver | RxOverflow | RxOK), ioaddr + IntrStatus);
+	outw(status & ~rxstat, ioaddr + RTL_REG_INTRSTATUS);
 
-	debug_cond(DEBUG_RX, "rtl_poll: int %hX ", status);
+	debug_cond(DEBUG_RX, "%s: int %hX ", __func__, status);
 
 	ring_offs = cur_rx % RX_BUF_LEN;
 	/* ring_offs is guaranteed being 4-byte aligned */
@@ -481,52 +443,137 @@ static int rtl_poll(struct eth_device *dev)
 	rx_size = rx_status >> 16;
 	rx_status &= 0xffff;
 
-	if ((rx_status & (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) ||
-	    (rx_size < ETH_ZLEN) || (rx_size > ETH_FRAME_LEN + 4)) {
+	if ((rx_status & (RTL_STS_RXBADSYMBOL | RTL_STS_RXRUNT |
+			  RTL_STS_RXTOOLONG | RTL_STS_RXCRCERR |
+			  RTL_STS_RXBADALIGN)) ||
+	    (rx_size < ETH_ZLEN) ||
+	    (rx_size > ETH_FRAME_LEN + 4)) {
 		printf("rx error %hX\n", rx_status);
-		rtl_reset(dev); /* this clears all interrupts still pending */
+		/* this clears all interrupts still pending */
+		rtl8139_reset(dev);
 		return 0;
 	}
 
 	/* Received a good packet */
 	length = rx_size - 4;	/* no one cares about the FCS */
-	if (ring_offs+4+rx_size-4 > RX_BUF_LEN) {
-		int semi_count = RX_BUF_LEN - ring_offs - 4;
+	if (ring_offs + 4 + rx_size - 4 > RX_BUF_LEN) {
 		unsigned char rxdata[RX_BUF_LEN];
+		int semi_count = RX_BUF_LEN - ring_offs - 4;
 
 		memcpy(rxdata, rx_ring + ring_offs + 4, semi_count);
-		memcpy(&(rxdata[semi_count]), rx_ring, rx_size-4-semi_count);
+		memcpy(&rxdata[semi_count], rx_ring,
+		       rx_size - 4 - semi_count);
 
 		net_process_received_packet(rxdata, length);
 		debug_cond(DEBUG_RX, "rx packet %d+%d bytes",
-			semi_count, rx_size-4-semi_count);
+			   semi_count, rx_size - 4 - semi_count);
 	} else {
 		net_process_received_packet(rx_ring + ring_offs + 4, length);
-		debug_cond(DEBUG_RX, "rx packet %d bytes", rx_size-4);
+		debug_cond(DEBUG_RX, "rx packet %d bytes", rx_size - 4);
 	}
 	flush_cache((unsigned long)rx_ring, RX_BUF_LEN);
 
-	cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
-	outw(cur_rx - 16, ioaddr + RxBufPtr);
-	/* See RTL8139 Programming Guide V0.1 for the official handling of
-	 * Rx overflow situations.  The document itself contains basically no
-	 * usable information, except for a few exception handling rules.  */
-	outw(status & (RxFIFOOver | RxOverflow | RxOK), ioaddr + IntrStatus);
+	cur_rx = ROUND(cur_rx + rx_size + 4, 4);
+	outw(cur_rx - 16, ioaddr + RTL_REG_RXBUFPTR);
+	/*
+	 * See RTL8139 Programming Guide V0.1 for the official handling of
+	 * Rx overflow situations. The document itself contains basically
+	 * no usable information, except for a few exception handling rules.
+	 */
+	outw(status & rxstat, ioaddr + RTL_REG_INTRSTATUS);
+
 	return length;
 }
 
-static void rtl_disable(struct eth_device *dev)
+static int rtl8139_init(struct eth_device *dev, bd_t *bis)
 {
-	int i;
+	unsigned short *ap = (unsigned short *)dev->enetaddr;
+	int addr_len, i;
+	u8 reg;
 
 	ioaddr = dev->iobase;
 
-	/* reset the chip */
-	outb(CmdReset, ioaddr + ChipCmd);
+	/* Bring the chip out of low-power mode. */
+	outb(0x00, ioaddr + RTL_REG_CONFIG1);
 
-	/* Give the chip 10ms to finish the reset. */
-	for (i=0; i<100; ++i){
-		if ((inb(ioaddr + ChipCmd) & CmdReset) == 0) break;
-		udelay (100); /* wait 100us */
+	addr_len = rtl8139_read_eeprom(0, 8) == 0x8129 ? 8 : 6;
+	for (i = 0; i < 3; i++)
+		*ap++ = le16_to_cpu(rtl8139_read_eeprom(i + 7, addr_len));
+
+	rtl8139_reset(dev);
+
+	reg = inb(ioaddr + RTL_REG_MEDIASTATUS);
+	if (reg & RTL_REG_MEDIASTATUS_MSRLINKFAIL) {
+		printf("Cable not connected or other link failure\n");
+		return -1;
 	}
+
+	return 0;
+}
+
+static void rtl8139_stop(struct eth_device *dev)
+{
+	ioaddr = dev->iobase;
+
+	rtl8139_hw_reset(dev);
+}
+
+static int rtl8139_bcast_addr(struct eth_device *dev, const u8 *bcast_mac,
+			      int join)
+{
+	return 0;
+}
+
+static struct pci_device_id supported[] = {
+	{ PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139 },
+	{ PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_8139 },
+	{ }
+};
+
+int rtl8139_initialize(bd_t *bis)
+{
+	struct eth_device *dev;
+	int card_number = 0;
+	pci_dev_t devno;
+	int idx = 0;
+	u32 iobase;
+
+	while (1) {
+		/* Find RTL8139 */
+		devno = pci_find_devices(supported, idx++);
+		if (devno < 0)
+			break;
+
+		pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase);
+		iobase &= ~0xf;
+
+		debug("rtl8139: REALTEK RTL8139 @0x%x\n", iobase);
+
+		dev = (struct eth_device *)malloc(sizeof(*dev));
+		if (!dev) {
+			printf("Can not allocate memory of rtl8139\n");
+			break;
+		}
+		memset(dev, 0, sizeof(*dev));
+
+		sprintf(dev->name, "RTL8139#%d", card_number);
+
+		dev->priv = (void *)devno;
+		dev->iobase = (int)bus_to_phys(iobase);
+		dev->init = rtl8139_init;
+		dev->halt = rtl8139_stop;
+		dev->send = rtl8139_send;
+		dev->recv = rtl8139_recv;
+		dev->mcast = rtl8139_bcast_addr;
+
+		eth_register(dev);
+
+		card_number++;
+
+		pci_write_config_byte(devno, PCI_LATENCY_TIMER, 0x20);
+
+		udelay(10 * 1000);
+	}
+
+	return card_number;
 }
diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 5ccdfdd683..75058fdadc 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -43,14 +43,17 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <net.h>
 #ifndef CONFIG_DM_ETH
 #include <netdev.h>
 #endif
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <pci.h>
+#include <linux/delay.h>
 
 #undef DEBUG_RTL8169
 #undef DEBUG_RTL8169_TX
diff --git a/drivers/net/sandbox-raw.c b/drivers/net/sandbox-raw.c
index 3707ee35eb..4bd94c3103 100644
--- a/drivers/net/sandbox-raw.c
+++ b/drivers/net/sandbox-raw.c
@@ -6,6 +6,7 @@
  * Joe Hershberger <joe.hershberger@ni.com>
  */
 
+#include <log.h>
 #include <asm/eth-raw-os.h>
 #include <common.h>
 #include <dm.h>
diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c
index c136392350..4f7e3d4243 100644
--- a/drivers/net/sandbox.c
+++ b/drivers/net/sandbox.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <asm/eth.h>
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index f8e5d05722..b26fc7b8eb 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -12,10 +12,13 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <netdev.h>
 #include <miiphy.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 
diff --git a/drivers/net/smc91111.c b/drivers/net/smc91111.c
index 5754c3106c..23265eff93 100644
--- a/drivers/net/smc91111.c
+++ b/drivers/net/smc91111.c
@@ -51,6 +51,7 @@
 #include <command.h>
 #include <config.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include "smc91111.h"
 #include <net.h>
 
@@ -266,7 +267,7 @@ static inline void smc_wait_mmu_release_complete (struct eth_device *dev)
 
 	/* assume bank 2 selected */
 	while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
-		udelay (1);	/* Wait until not busy */
+		udelay(1);	/* Wait until not busy */
 		if (++count > 200)
 			break;
 	}
@@ -318,7 +319,7 @@ static void smc_reset (struct eth_device *dev)
 	SMC_SELECT_BANK (dev, 0);
 
 	/* this should pause enough for the chip to be happy */
-	udelay (10);
+	udelay(10);
 
 	/* Disable transmit and receive functionality */
 	SMC_outw (dev, RCR_CLEAR, RCR_REG);
@@ -333,7 +334,7 @@ static void smc_reset (struct eth_device *dev)
 	smc_wait_mmu_release_complete (dev);
 	SMC_outw (dev, MC_RESET, MMU_CMD_REG);
 	while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY)
-		udelay (1);	/* Wait until not busy */
+		udelay(1);	/* Wait until not busy */
 
 	/* Note:  It doesn't seem that waiting for the MMU busy is needed here,
 	   but this is a place where future chipsets _COULD_ break.  Be wary
@@ -564,7 +565,7 @@ again:
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
-			udelay (10);
+			udelay(10);
 		}
 
 		PRINTK2 ("MMU ready\n");
@@ -583,7 +584,7 @@ again:
 
 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (dev, MMU_CMD_REG) & MC_BUSY) {
-			udelay (10);
+			udelay(10);
 		}
 
 		PRINTK2 ("MMU ready\n");
@@ -957,19 +958,19 @@ static word smc_read_phy_register (struct eth_device *dev, byte phyreg)
 	for (i = 0; i < sizeof bits; ++i) {
 		/* Clock Low - output data */
 		SMC_outw (dev, mii_reg | bits[i], MII_REG);
-		udelay (SMC_PHY_CLOCK_DELAY);
+		udelay(SMC_PHY_CLOCK_DELAY);
 
 
 		/* Clock Hi - input data */
 		SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG);
-		udelay (SMC_PHY_CLOCK_DELAY);
+		udelay(SMC_PHY_CLOCK_DELAY);
 		bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI;
 	}
 
 	/* Return to idle state */
 	/* Set clock to low, data to low, and output tristated */
 	SMC_outw (dev, mii_reg, MII_REG);
-	udelay (SMC_PHY_CLOCK_DELAY);
+	udelay(SMC_PHY_CLOCK_DELAY);
 
 	/* Restore original bank select */
 	SMC_SELECT_BANK (dev, oldBank);
@@ -1078,19 +1079,19 @@ static void smc_write_phy_register (struct eth_device *dev, byte phyreg,
 	for (i = 0; i < sizeof bits; ++i) {
 		/* Clock Low - output data */
 		SMC_outw (dev, mii_reg | bits[i], MII_REG);
-		udelay (SMC_PHY_CLOCK_DELAY);
+		udelay(SMC_PHY_CLOCK_DELAY);
 
 
 		/* Clock Hi - input data */
 		SMC_outw (dev, mii_reg | bits[i] | MII_MCLK, MII_REG);
-		udelay (SMC_PHY_CLOCK_DELAY);
+		udelay(SMC_PHY_CLOCK_DELAY);
 		bits[i] |= SMC_inw (dev, MII_REG) & MII_MDI;
 	}
 
 	/* Return to idle state */
 	/* Set clock to low, data to low, and output tristated */
 	SMC_outw (dev, mii_reg, MII_REG);
-	udelay (SMC_PHY_CLOCK_DELAY);
+	udelay(SMC_PHY_CLOCK_DELAY);
 
 	/* Restore original bank select */
 	SMC_SELECT_BANK (dev, oldBank);
diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h
index 013542770d..4c3acba35a 100644
--- a/drivers/net/smc91111.h
+++ b/drivers/net/smc91111.h
@@ -30,6 +30,7 @@
 
 #include <asm/types.h>
 #include <config.h>
+#include <net.h>
 
 /*
  * This function may be called by the board specific initialisation code
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index 257b0385c2..9d2790e561 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -10,84 +10,240 @@
 #include <malloc.h>
 #include <net.h>
 #include <miiphy.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/types.h>
 
 #include "smc911x.h"
 
-u32 pkt_data_pull(struct eth_device *dev, u32 addr) \
-	__attribute__ ((weak, alias ("smc911x_reg_read")));
-void pkt_data_push(struct eth_device *dev, u32 addr, u32 val) \
-	__attribute__ ((weak, alias ("smc911x_reg_write")));
+struct chip_id {
+	u16 id;
+	char *name;
+};
 
-static void smc911x_handle_mac_address(struct eth_device *dev)
+struct smc911x_priv {
+#ifndef CONFIG_DM_ETH
+	struct eth_device	dev;
+#endif
+	phys_addr_t		iobase;
+	const struct chip_id	*chipid;
+	unsigned char		enetaddr[6];
+};
+
+static const struct chip_id chip_ids[] =  {
+	{ CHIP_89218, "LAN89218" },
+	{ CHIP_9115, "LAN9115" },
+	{ CHIP_9116, "LAN9116" },
+	{ CHIP_9117, "LAN9117" },
+	{ CHIP_9118, "LAN9118" },
+	{ CHIP_9211, "LAN9211" },
+	{ CHIP_9215, "LAN9215" },
+	{ CHIP_9216, "LAN9216" },
+	{ CHIP_9217, "LAN9217" },
+	{ CHIP_9218, "LAN9218" },
+	{ CHIP_9220, "LAN9220" },
+	{ CHIP_9221, "LAN9221" },
+	{ 0, NULL },
+};
+
+#define DRIVERNAME "smc911x"
+
+#if defined (CONFIG_SMC911X_32_BIT) && \
+	defined (CONFIG_SMC911X_16_BIT)
+#error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
+	CONFIG_SMC911X_16_BIT shall be set"
+#endif
+
+#if defined (CONFIG_SMC911X_32_BIT)
+static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
+{
+	return readl(priv->iobase + offset);
+}
+
+static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
+{
+	writel(val, priv->iobase + offset);
+}
+#elif defined (CONFIG_SMC911X_16_BIT)
+static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
+{
+	return (readw(priv->iobase + offset) & 0xffff) |
+	       (readw(priv->iobase + offset + 2) << 16);
+}
+static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
+{
+	writew(val & 0xffff, priv->iobase + offset);
+	writew(val >> 16, priv->iobase + offset + 2);
+}
+#else
+#error "SMC911X: undefined bus width"
+#endif /* CONFIG_SMC911X_16_BIT */
+
+static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
+{
+	while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+	smc911x_reg_write(priv, MAC_CSR_CMD,
+			MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
+	while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+
+	return smc911x_reg_read(priv, MAC_CSR_DATA);
+}
+
+static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
+{
+	while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+	smc911x_reg_write(priv, MAC_CSR_DATA, data);
+	smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
+	while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+}
+
+static int smc911x_detect_chip(struct smc911x_priv *priv)
+{
+	unsigned long val, i;
+
+	val = smc911x_reg_read(priv, BYTE_TEST);
+	if (val == 0xffffffff) {
+		/* Special case -- no chip present */
+		return -1;
+	} else if (val != 0x87654321) {
+		printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
+		return -1;
+	}
+
+	val = smc911x_reg_read(priv, ID_REV) >> 16;
+	for (i = 0; chip_ids[i].id != 0; i++) {
+		if (chip_ids[i].id == val) break;
+	}
+	if (!chip_ids[i].id) {
+		printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
+		return -1;
+	}
+
+	priv->chipid = &chip_ids[i];
+
+	return 0;
+}
+
+static void smc911x_reset(struct smc911x_priv *priv)
+{
+	int timeout;
+
+	/*
+	 *  Take out of PM setting first
+	 *  Device is already wake up if PMT_CTRL_READY bit is set
+	 */
+	if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
+		/* Write to the bytetest will take out of powerdown */
+		smc911x_reg_write(priv, BYTE_TEST, 0x0);
+
+		timeout = 10;
+
+		while (timeout-- &&
+			!(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
+			udelay(10);
+		if (timeout < 0) {
+			printf(DRIVERNAME
+				": timeout waiting for PM restore\n");
+			return;
+		}
+	}
+
+	/* Disable interrupts */
+	smc911x_reg_write(priv, INT_EN, 0);
+
+	smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
+
+	timeout = 1000;
+	while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
+		udelay(10);
+
+	if (timeout < 0) {
+		printf(DRIVERNAME ": reset timeout\n");
+		return;
+	}
+
+	/* Reset the FIFO level and flow control settings */
+	smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
+	smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
+
+	/* Set to LED outputs */
+	smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
+}
+
+static void smc911x_handle_mac_address(struct smc911x_priv *priv)
 {
 	unsigned long addrh, addrl;
-	uchar *m = dev->enetaddr;
+	unsigned char *m = priv->enetaddr;
 
 	addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
 	addrh = m[4] | (m[5] << 8);
-	smc911x_set_mac_csr(dev, ADDRL, addrl);
-	smc911x_set_mac_csr(dev, ADDRH, addrh);
+	smc911x_set_mac_csr(priv, ADDRL, addrl);
+	smc911x_set_mac_csr(priv, ADDRH, addrh);
 
 	printf(DRIVERNAME ": MAC %pM\n", m);
 }
 
-static int smc911x_eth_phy_read(struct eth_device *dev,
+static int smc911x_eth_phy_read(struct smc911x_priv *priv,
 				u8 phy, u8 reg, u16 *val)
 {
-	while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
+	while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
 		;
 
-	smc911x_set_mac_csr(dev, MII_ACC, phy << 11 | reg << 6 |
+	smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
 				MII_ACC_MII_BUSY);
 
-	while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
+	while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
 		;
 
-	*val = smc911x_get_mac_csr(dev, MII_DATA);
+	*val = smc911x_get_mac_csr(priv, MII_DATA);
 
 	return 0;
 }
 
-static int smc911x_eth_phy_write(struct eth_device *dev,
+static int smc911x_eth_phy_write(struct smc911x_priv *priv,
 				u8 phy, u8 reg, u16  val)
 {
-	while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
+	while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
 		;
 
-	smc911x_set_mac_csr(dev, MII_DATA, val);
-	smc911x_set_mac_csr(dev, MII_ACC,
+	smc911x_set_mac_csr(priv, MII_DATA, val);
+	smc911x_set_mac_csr(priv, MII_ACC,
 		phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
 
-	while (smc911x_get_mac_csr(dev, MII_ACC) & MII_ACC_MII_BUSY)
+	while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
 		;
 	return 0;
 }
 
-static int smc911x_phy_reset(struct eth_device *dev)
+static int smc911x_phy_reset(struct smc911x_priv *priv)
 {
 	u32 reg;
 
-	reg = smc911x_reg_read(dev, PMT_CTRL);
+	reg = smc911x_reg_read(priv, PMT_CTRL);
 	reg &= ~0xfffff030;
 	reg |= PMT_CTRL_PHY_RST;
-	smc911x_reg_write(dev, PMT_CTRL, reg);
+	smc911x_reg_write(priv, PMT_CTRL, reg);
 
 	mdelay(100);
 
 	return 0;
 }
 
-static void smc911x_phy_configure(struct eth_device *dev)
+static void smc911x_phy_configure(struct smc911x_priv *priv)
 {
 	int timeout;
 	u16 status;
 
-	smc911x_phy_reset(dev);
+	smc911x_phy_reset(priv);
 
-	smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET);
+	smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
 	mdelay(1);
-	smc911x_eth_phy_write(dev, 1, MII_ADVERTISE, 0x01e1);
-	smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_ANENABLE |
+	smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
+	smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
 				BMCR_ANRESTART);
 
 	timeout = 5000;
@@ -96,7 +252,7 @@ static void smc911x_phy_configure(struct eth_device *dev)
 		if ((timeout--) == 0)
 			goto err_out;
 
-		if (smc911x_eth_phy_read(dev, 1, MII_BMSR, &status) != 0)
+		if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
 			goto err_out;
 	} while (!(status & BMSR_LSTATUS));
 
@@ -108,65 +264,65 @@ err_out:
 	printf(DRIVERNAME ": autonegotiation timed out\n");
 }
 
-static void smc911x_enable(struct eth_device *dev)
+static void smc911x_enable(struct smc911x_priv *priv)
 {
 	/* Enable TX */
-	smc911x_reg_write(dev, HW_CFG, 8 << 16 | HW_CFG_SF);
+	smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
 
-	smc911x_reg_write(dev, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
+	smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
 
-	smc911x_reg_write(dev, TX_CFG, TX_CFG_TX_ON);
+	smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
 
 	/* no padding to start of packets */
-	smc911x_reg_write(dev, RX_CFG, 0);
+	smc911x_reg_write(priv, RX_CFG, 0);
 
-	smc911x_set_mac_csr(dev, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
+	smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
 				MAC_CR_HBDIS);
-
 }
 
-static int smc911x_init(struct eth_device *dev, bd_t * bd)
+static int smc911x_init_common(struct smc911x_priv *priv)
 {
-	struct chip_id *id = dev->priv;
+	const struct chip_id *id = priv->chipid;
 
 	printf(DRIVERNAME ": detected %s controller\n", id->name);
 
-	smc911x_reset(dev);
+	smc911x_reset(priv);
 
 	/* Configure the PHY, initialize the link state */
-	smc911x_phy_configure(dev);
+	smc911x_phy_configure(priv);
 
-	smc911x_handle_mac_address(dev);
+	smc911x_handle_mac_address(priv);
 
 	/* Turn on Tx + Rx */
-	smc911x_enable(dev);
+	smc911x_enable(priv);
 
 	return 0;
 }
 
-static int smc911x_send(struct eth_device *dev, void *packet, int length)
+static int smc911x_send_common(struct smc911x_priv *priv,
+			       void *packet, int length)
 {
 	u32 *data = (u32*)packet;
 	u32 tmplen;
 	u32 status;
 
-	smc911x_reg_write(dev, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
+	smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
 				TX_CMD_A_INT_LAST_SEG | length);
-	smc911x_reg_write(dev, TX_DATA_FIFO, length);
+	smc911x_reg_write(priv, TX_DATA_FIFO, length);
 
 	tmplen = (length + 3) / 4;
 
 	while (tmplen--)
-		pkt_data_push(dev, TX_DATA_FIFO, *data++);
+		smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
 
 	/* wait for transmission */
-	while (!((smc911x_reg_read(dev, TX_FIFO_INF) &
+	while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
 					TX_FIFO_INF_TSUSED) >> 16));
 
 	/* get status. Ignore 'no carrier' error, it has no meaning for
 	 * full duplex operation
 	 */
-	status = smc911x_reg_read(dev, TX_STATUS_FIFO) &
+	status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
 			(TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
 			TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
 
@@ -183,117 +339,296 @@ static int smc911x_send(struct eth_device *dev, void *packet, int length)
 	return -1;
 }
 
-static void smc911x_halt(struct eth_device *dev)
+static void smc911x_halt_common(struct smc911x_priv *priv)
 {
-	smc911x_reset(dev);
-	smc911x_handle_mac_address(dev);
+	smc911x_reset(priv);
+	smc911x_handle_mac_address(priv);
 }
 
-static int smc911x_rx(struct eth_device *dev)
+static int smc911x_recv_common(struct smc911x_priv *priv, u32 *data)
 {
-	u32 *data = (u32 *)net_rx_packets[0];
 	u32 pktlen, tmplen;
 	u32 status;
 
-	if ((smc911x_reg_read(dev, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED) >> 16) {
-		status = smc911x_reg_read(dev, RX_STATUS_FIFO);
-		pktlen = (status & RX_STS_PKT_LEN) >> 16;
+	status = smc911x_reg_read(priv, RX_FIFO_INF);
+	if (!(status & RX_FIFO_INF_RXSUSED))
+		return 0;
 
-		smc911x_reg_write(dev, RX_CFG, 0);
+	status = smc911x_reg_read(priv, RX_STATUS_FIFO);
+	pktlen = (status & RX_STS_PKT_LEN) >> 16;
 
-		tmplen = (pktlen + 3) / 4;
-		while (tmplen--)
-			*data++ = pkt_data_pull(dev, RX_DATA_FIFO);
+	smc911x_reg_write(priv, RX_CFG, 0);
 
-		if (status & RX_STS_ES)
-			printf(DRIVERNAME
-				": dropped bad packet. Status: 0x%08x\n",
-				status);
-		else
-			net_process_received_packet(net_rx_packets[0], pktlen);
+	tmplen = (pktlen + 3) / 4;
+	while (tmplen--)
+		*data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
+
+	if (status & RX_STS_ES) {
+		printf(DRIVERNAME
+			": dropped bad packet. Status: 0x%08x\n",
+			status);
+		return 0;
 	}
 
-	return 0;
+	return pktlen;
 }
 
+#ifndef CONFIG_DM_ETH
+
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 /* wrapper for smc911x_eth_phy_read */
 static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
 			       int reg)
 {
-	u16 val = 0;
 	struct eth_device *dev = eth_get_dev_by_name(bus->name);
-	if (dev) {
-		int retval = smc911x_eth_phy_read(dev, phy, reg, &val);
-		if (retval < 0)
-			return retval;
-		return val;
-	}
-	return -ENODEV;
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+	u16 val = 0;
+	int ret;
+
+	if (!dev || !priv)
+		return -ENODEV;
+
+	ret = smc911x_eth_phy_read(priv, phy, reg, &val);
+	if (ret < 0)
+		return ret;
+
+	return val;
 }
+
 /* wrapper for smc911x_eth_phy_write */
 static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
 				int reg, u16 val)
 {
 	struct eth_device *dev = eth_get_dev_by_name(bus->name);
-	if (dev)
-		return smc911x_eth_phy_write(dev, phy, reg, val);
-	return -ENODEV;
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+
+	if (!dev || !priv)
+		return -ENODEV;
+
+	return smc911x_eth_phy_write(priv, phy, reg, val);
+}
+
+static int smc911x_initialize_mii(struct smc911x_priv *priv)
+{
+	struct mii_dev *mdiodev = mdio_alloc();
+	int ret;
+
+	if (!mdiodev)
+		return -ENOMEM;
+
+	strncpy(mdiodev->name, priv->dev.name, MDIO_NAME_LEN);
+	mdiodev->read = smc911x_miiphy_read;
+	mdiodev->write = smc911x_miiphy_write;
+
+	ret = mdio_register(mdiodev);
+	if (ret < 0) {
+		mdio_free(mdiodev);
+		return ret;
+	}
+
+	return 0;
+}
+#else
+static int smc911x_initialize_mii(struct smc911x_priv *priv)
+{
+	return 0;
 }
 #endif
 
+static int smc911x_init(struct eth_device *dev, bd_t *bd)
+{
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+
+	return smc911x_init_common(priv);
+}
+
+static void smc911x_halt(struct eth_device *dev)
+{
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+
+	smc911x_halt_common(priv);
+}
+
+static int smc911x_send(struct eth_device *dev, void *packet, int length)
+{
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+
+	return smc911x_send_common(priv, packet, length);
+}
+
+static int smc911x_recv(struct eth_device *dev)
+{
+	struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
+	u32 *data = (u32 *)net_rx_packets[0];
+	int ret;
+
+	ret = smc911x_recv_common(priv, data);
+	if (ret)
+		net_process_received_packet(net_rx_packets[0], ret);
+
+	return ret;
+}
+
 int smc911x_initialize(u8 dev_num, int base_addr)
 {
 	unsigned long addrl, addrh;
-	struct eth_device *dev;
+	struct smc911x_priv *priv;
+	int ret;
 
-	dev = malloc(sizeof(*dev));
-	if (!dev) {
-		return -1;
-	}
-	memset(dev, 0, sizeof(*dev));
+	priv = calloc(1, sizeof(*priv));
+	if (!priv)
+		return -ENOMEM;
 
-	dev->iobase = base_addr;
+	priv->iobase = base_addr;
+	priv->dev.iobase = base_addr;
 
 	/* Try to detect chip. Will fail if not present. */
-	if (smc911x_detect_chip(dev)) {
-		free(dev);
-		return 0;
+	ret = smc911x_detect_chip(priv);
+	if (ret) {
+		ret = 0;	/* Card not detected is not an error */
+		goto err_detect;
 	}
 
-	addrh = smc911x_get_mac_csr(dev, ADDRH);
-	addrl = smc911x_get_mac_csr(dev, ADDRL);
+	addrh = smc911x_get_mac_csr(priv, ADDRH);
+	addrl = smc911x_get_mac_csr(priv, ADDRL);
 	if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
 		/* address is obtained from optional eeprom */
-		dev->enetaddr[0] = addrl;
-		dev->enetaddr[1] = addrl >>  8;
-		dev->enetaddr[2] = addrl >> 16;
-		dev->enetaddr[3] = addrl >> 24;
-		dev->enetaddr[4] = addrh;
-		dev->enetaddr[5] = addrh >> 8;
+		priv->enetaddr[0] = addrl;
+		priv->enetaddr[1] = addrl >>  8;
+		priv->enetaddr[2] = addrl >> 16;
+		priv->enetaddr[3] = addrl >> 24;
+		priv->enetaddr[4] = addrh;
+		priv->enetaddr[5] = addrh >> 8;
+		memcpy(priv->dev.enetaddr, priv->enetaddr, 6);
 	}
 
-	dev->init = smc911x_init;
-	dev->halt = smc911x_halt;
-	dev->send = smc911x_send;
-	dev->recv = smc911x_rx;
-	sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num);
+	priv->dev.init = smc911x_init;
+	priv->dev.halt = smc911x_halt;
+	priv->dev.send = smc911x_send;
+	priv->dev.recv = smc911x_recv;
+	sprintf(priv->dev.name, "%s-%hu", DRIVERNAME, dev_num);
 
-	eth_register(dev);
+	eth_register(&priv->dev);
 
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
-	int retval;
-	struct mii_dev *mdiodev = mdio_alloc();
-	if (!mdiodev)
-		return -ENOMEM;
-	strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
-	mdiodev->read = smc911x_miiphy_read;
-	mdiodev->write = smc911x_miiphy_write;
-
-	retval = mdio_register(mdiodev);
-	if (retval < 0)
-		return retval;
-#endif
+	ret = smc911x_initialize_mii(priv);
+	if (ret)
+		goto err_mii;
 
 	return 1;
+
+err_mii:
+	eth_unregister(&priv->dev);
+err_detect:
+	free(priv);
+	return ret;
+}
+
+#else	/* ifdef CONFIG_DM_ETH */
+
+static int smc911x_start(struct udevice *dev)
+{
+	struct eth_pdata *plat = dev_get_platdata(dev);
+	struct smc911x_priv *priv = dev_get_priv(dev);
+
+	memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
+
+	return smc911x_init_common(priv);
+}
+
+static void smc911x_stop(struct udevice *dev)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+
+	smc911x_halt_common(priv);
+}
+
+static int smc911x_send(struct udevice *dev, void *packet, int length)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = smc911x_send_common(priv, packet, length);
+
+	return ret ? 0 : -ETIMEDOUT;
+}
+
+static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+	u32 *data = (u32 *)net_rx_packets[0];
+	int ret;
+
+	ret = smc911x_recv_common(priv, data);
+	if (ret)
+		*packetp = (void *)data;
+
+	return ret ? ret : -EAGAIN;
+}
+
+static int smc911x_bind(struct udevice *dev)
+{
+	return device_set_name(dev, dev->name);
 }
+
+static int smc911x_probe(struct udevice *dev)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+	unsigned long addrh, addrl;
+	int ret;
+
+	/* Try to detect chip. Will fail if not present. */
+	ret = smc911x_detect_chip(priv);
+	if (ret)
+		return ret;
+
+	addrh = smc911x_get_mac_csr(priv, ADDRH);
+	addrl = smc911x_get_mac_csr(priv, ADDRL);
+	if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
+		/* address is obtained from optional eeprom */
+		priv->enetaddr[0] = addrl;
+		priv->enetaddr[1] = addrl >>  8;
+		priv->enetaddr[2] = addrl >> 16;
+		priv->enetaddr[3] = addrl >> 24;
+		priv->enetaddr[4] = addrh;
+		priv->enetaddr[5] = addrh >> 8;
+	}
+
+	return 0;
+}
+
+static int smc911x_ofdata_to_platdata(struct udevice *dev)
+{
+	struct smc911x_priv *priv = dev_get_priv(dev);
+	struct eth_pdata *pdata = dev_get_platdata(dev);
+
+	pdata->iobase = devfdt_get_addr(dev);
+	priv->iobase = pdata->iobase;
+
+	return 0;
+}
+
+static const struct eth_ops smc911x_ops = {
+	.start	= smc911x_start,
+	.send	= smc911x_send,
+	.recv	= smc911x_recv,
+	.stop	= smc911x_stop,
+};
+
+static const struct udevice_id smc911x_ids[] = {
+	{ .compatible = "smsc,lan9115" },
+	{ }
+};
+
+U_BOOT_DRIVER(smc911x) = {
+	.name		= "eth_smc911x",
+	.id		= UCLASS_ETH,
+	.of_match	= smc911x_ids,
+	.bind		= smc911x_bind,
+	.ofdata_to_platdata = smc911x_ofdata_to_platdata,
+	.probe		= smc911x_probe,
+	.ops		= &smc911x_ops,
+	.priv_auto_alloc_size = sizeof(struct smc911x_priv),
+	.platdata_auto_alloc_size = sizeof(struct eth_pdata),
+	.flags		= DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index 3145fbde2b..0a27f3c43e 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -8,46 +8,7 @@
 #ifndef _SMC911X_H_
 #define _SMC911X_H_
 
-#include <linux/types.h>
-
-#define DRIVERNAME "smc911x"
-
-#if defined (CONFIG_SMC911X_32_BIT) && \
-	defined (CONFIG_SMC911X_16_BIT)
-#error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
-	CONFIG_SMC911X_16_BIT shall be set"
-#endif
-
-#if defined (CONFIG_SMC911X_32_BIT)
-static inline u32 __smc911x_reg_read(struct eth_device *dev, u32 offset)
-{
-	return *(volatile u32*)(dev->iobase + offset);
-}
-u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
-	__attribute__((weak, alias("__smc911x_reg_read")));
-
-static inline void __smc911x_reg_write(struct eth_device *dev,
-					u32 offset, u32 val)
-{
-	*(volatile u32*)(dev->iobase + offset) = val;
-}
-void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
-	__attribute__((weak, alias("__smc911x_reg_write")));
-#elif defined (CONFIG_SMC911X_16_BIT)
-static inline u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
-{
-	volatile u16 *addr_16 = (u16 *)(dev->iobase + offset);
-	return ((*addr_16 & 0x0000ffff) | (*(addr_16 + 1) << 16));
-}
-static inline void smc911x_reg_write(struct eth_device *dev,
-					u32 offset, u32 val)
-{
-	*(volatile u16 *)(dev->iobase + offset) = (u16)val;
-	*(volatile u16 *)(dev->iobase + offset + 2) = (u16)(val >> 16);
-}
-#else
-#error "SMC911X: undefined bus width"
-#endif /* CONFIG_SMC911X_16_BIT */
+#include <net.h>
 
 /* Below are the register offsets and bit definitions
  * of the Lan911x memory space
@@ -380,120 +341,4 @@ static inline void smc911x_reg_write(struct eth_device *dev,
 #define CHIP_9220	0x9220
 #define CHIP_9221	0x9221
 
-struct chip_id {
-	u16 id;
-	char *name;
-};
-
-static const struct chip_id chip_ids[] =  {
-	{ CHIP_89218, "LAN89218" },
-	{ CHIP_9115, "LAN9115" },
-	{ CHIP_9116, "LAN9116" },
-	{ CHIP_9117, "LAN9117" },
-	{ CHIP_9118, "LAN9118" },
-	{ CHIP_9211, "LAN9211" },
-	{ CHIP_9215, "LAN9215" },
-	{ CHIP_9216, "LAN9216" },
-	{ CHIP_9217, "LAN9217" },
-	{ CHIP_9218, "LAN9218" },
-	{ CHIP_9220, "LAN9220" },
-	{ CHIP_9221, "LAN9221" },
-	{ 0, NULL },
-};
-
-static u32 smc911x_get_mac_csr(struct eth_device *dev, u8 reg)
-{
-	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
-		;
-	smc911x_reg_write(dev, MAC_CSR_CMD,
-			MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
-	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
-		;
-
-	return smc911x_reg_read(dev, MAC_CSR_DATA);
-}
-
-static void smc911x_set_mac_csr(struct eth_device *dev, u8 reg, u32 data)
-{
-	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
-		;
-	smc911x_reg_write(dev, MAC_CSR_DATA, data);
-	smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
-	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
-		;
-}
-
-static int smc911x_detect_chip(struct eth_device *dev)
-{
-	unsigned long val, i;
-
-	val = smc911x_reg_read(dev, BYTE_TEST);
-	if (val == 0xffffffff) {
-		/* Special case -- no chip present */
-		return -1;
-	} else if (val != 0x87654321) {
-		printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
-		return -1;
-	}
-
-	val = smc911x_reg_read(dev, ID_REV) >> 16;
-	for (i = 0; chip_ids[i].id != 0; i++) {
-		if (chip_ids[i].id == val) break;
-	}
-	if (!chip_ids[i].id) {
-		printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
-		return -1;
-	}
-
-	dev->priv = (void *)&chip_ids[i];
-
-	return 0;
-}
-
-static void smc911x_reset(struct eth_device *dev)
-{
-	int timeout;
-
-	/*
-	 *  Take out of PM setting first
-	 *  Device is already wake up if PMT_CTRL_READY bit is set
-	 */
-	if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) {
-		/* Write to the bytetest will take out of powerdown */
-		smc911x_reg_write(dev, BYTE_TEST, 0x0);
-
-		timeout = 10;
-
-		while (timeout-- &&
-			!(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
-			udelay(10);
-		if (timeout < 0) {
-			printf(DRIVERNAME
-				": timeout waiting for PM restore\n");
-			return;
-		}
-	}
-
-	/* Disable interrupts */
-	smc911x_reg_write(dev, INT_EN, 0);
-
-	smc911x_reg_write(dev, HW_CFG, HW_CFG_SRST);
-
-	timeout = 1000;
-	while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
-		udelay(10);
-
-	if (timeout < 0) {
-		printf(DRIVERNAME ": reset timeout\n");
-		return;
-	}
-
-	/* Reset the FIFO level and flow control settings */
-	smc911x_set_mac_csr(dev, FLOW, FLOW_FCPT | FLOW_FCEN);
-	smc911x_reg_write(dev, AFC_CFG, 0x0050287F);
-
-	/* Set to LED outputs */
-	smc911x_reg_write(dev, GPIO_CFG, 0x70070000);
-}
-
 #endif
diff --git a/drivers/net/sni_ave.c b/drivers/net/sni_ave.c
index 5d66a63a8b..0784635689 100644
--- a/drivers/net/sni_ave.c
+++ b/drivers/net/sni_ave.c
@@ -8,13 +8,17 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <net.h>
 #include <regmap.h>
 #include <reset.h>
 #include <syscon.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 1ae776b446..e2b05ace8f 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -11,6 +11,8 @@
 */
 
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/gpio.h>
@@ -19,6 +21,8 @@
 #include <dm.h>
 #include <fdt_support.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <malloc.h>
 #include <miiphy.h>
@@ -107,6 +111,7 @@ enum emac_variant {
 	H3_EMAC,
 	A64_EMAC,
 	R40_GMAC,
+	H6_EMAC,
 };
 
 struct emac_dma_desc {
@@ -296,9 +301,9 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 	if (priv->variant == R40_GMAC) {
 		/* Select RGMII for R40 */
 		reg = readl(priv->sysctl_reg + 0x164);
-		reg |= CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII |
-		       CCM_GMAC_CTRL_GPIT_RGMII |
-		       CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY);
+		reg |= SC_ETCS_INT_GMII |
+		       SC_EPIT |
+		       (CONFIG_GMAC_TX_DELAY << SC_ETXDC_OFFSET);
 
 		writel(reg, priv->sysctl_reg + 0x164);
 		return 0;
@@ -306,14 +311,16 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 
 	reg = readl(priv->sysctl_reg + 0x30);
 
-	if (priv->variant == H3_EMAC) {
+	if (priv->variant == H3_EMAC || priv->variant == H6_EMAC) {
 		ret = sun8i_emac_set_syscon_ephy(priv, &reg);
 		if (ret)
 			return ret;
 	}
 
 	reg &= ~(SC_ETCS_MASK | SC_EPIT);
-	if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
+	if (priv->variant == H3_EMAC ||
+	    priv->variant == A64_EMAC ||
+	    priv->variant == H6_EMAC)
 		reg &= ~SC_RMII_EN;
 
 	switch (priv->interface) {
@@ -325,7 +332,8 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
 		break;
 	case PHY_INTERFACE_MODE_RMII:
 		if (priv->variant == H3_EMAC ||
-		    priv->variant == A64_EMAC) {
+		    priv->variant == A64_EMAC ||
+		    priv->variant == H6_EMAC) {
 			reg |= SC_RMII_EN | SC_ETCS_EXT_GMII;
 		break;
 		}
@@ -531,7 +539,7 @@ static int parse_phy_pins(struct udevice *dev)
 
 		if (priv->variant == H3_EMAC)
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_H3);
-		else if (priv->variant == R40_GMAC)
+		else if (priv->variant == R40_GMAC || priv->variant == H6_EMAC)
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX_R40);
 		else
 			sunxi_gpio_set_cfgpin(pin, SUN8I_IOMUX);
@@ -1028,6 +1036,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
 		.data = (uintptr_t)A83T_EMAC },
 	{.compatible = "allwinner,sun8i-r40-gmac",
 		.data = (uintptr_t)R40_GMAC },
+	{.compatible = "allwinner,sun50i-h6-emac",
+		.data = (uintptr_t)H6_EMAC },
 	{ }
 };
 
diff --git a/drivers/net/sunxi_emac.c b/drivers/net/sunxi_emac.c
index a9874e4220..6364beb9f2 100644
--- a/drivers/net/sunxi_emac.c
+++ b/drivers/net/sunxi_emac.c
@@ -8,7 +8,9 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <malloc.h>
 #include <miiphy.h>
diff --git a/drivers/net/ti/am65-cpsw-nuss.c b/drivers/net/ti/am65-cpsw-nuss.c
index 2b77213001..85f3e49c05 100644
--- a/drivers/net/ti/am65-cpsw-nuss.c
+++ b/drivers/net/ti/am65-cpsw-nuss.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/processor.h>
 #include <clk.h>
@@ -20,6 +21,7 @@
 #include <net.h>
 #include <phy.h>
 #include <power-domain.h>
+#include <linux/bitops.h>
 #include <linux/soc/ti/ti-udma.h>
 
 #include "cpsw_mdio.h"
@@ -61,6 +63,7 @@
 
 #define AM65_CPSW_MACSL_CTL_REG			0x0
 #define AM65_CPSW_MACSL_CTL_REG_IFCTL_A		BIT(15)
+#define AM65_CPSW_MACSL_CTL_EXT_EN		BIT(18)
 #define AM65_CPSW_MACSL_CTL_REG_GIG		BIT(7)
 #define AM65_CPSW_MACSL_CTL_REG_GMII_EN		BIT(5)
 #define AM65_CPSW_MACSL_CTL_REG_LOOPBACK	BIT(1)
@@ -187,6 +190,9 @@ static int am65_cpsw_update_link(struct am65_cpsw_priv *priv)
 			      AM65_CPSW_MACSL_CTL_REG_GMII_EN;
 		if (phy->speed == 1000)
 			mac_control |= AM65_CPSW_MACSL_CTL_REG_GIG;
+		if (phy->speed == 10 && phy_interface_is_rgmii(phy))
+			/* Can be used with in band mode only */
+			mac_control |= AM65_CPSW_MACSL_CTL_EXT_EN;
 		if (phy->duplex == DUPLEX_FULL)
 			mac_control |= AM65_CPSW_MACSL_CTL_REG_FULL_DUPLEX;
 		if (phy->speed == 100)
diff --git a/drivers/net/ti/cpsw.c b/drivers/net/ti/cpsw.c
index 04b01a8129..95761fffc0 100644
--- a/drivers/net/ti/cpsw.c
+++ b/drivers/net/ti/cpsw.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <net.h>
 #include <miiphy.h>
 #include <malloc.h>
@@ -15,6 +16,7 @@
 #include <netdev.h>
 #include <cpsw.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c
index 1fa520be0f..f4cb86d10a 100644
--- a/drivers/net/ti/cpsw_mdio.c
+++ b/drivers/net/ti/cpsw_mdio.c
@@ -6,10 +6,13 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <miiphy.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 struct cpsw_mdio_regs {
 	u32	version;
diff --git a/drivers/net/ti/davinci_emac.c b/drivers/net/ti/davinci_emac.c
index 9c6bfca5a9..56ea1fec0a 100644
--- a/drivers/net/ti/davinci_emac.c
+++ b/drivers/net/ti/davinci_emac.c
@@ -24,12 +24,15 @@
 #include <common.h>
 #include <command.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <net.h>
 #include <miiphy.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <linux/compiler.h>
 #include <asm/arch/emac_defs.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "davinci_emac.h"
 
 unsigned int	emac_dbg = 0;
diff --git a/drivers/net/ti/keystone_net.c b/drivers/net/ti/keystone_net.c
index 4baeeb83f1..e3ac40ca0d 100644
--- a/drivers/net/ti/keystone_net.c
+++ b/drivers/net/ti/keystone_net.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <console.h>
+#include <linux/delay.h>
 
 #include <dm.h>
 #include <dm/lists.h>
@@ -21,6 +22,7 @@
 #include <asm/ti-common/keystone_net.h>
 #include <asm/ti-common/keystone_serdes.h>
 #include <asm/arch/psc_defs.h>
+#include <linux/libfdt.h>
 
 #include "cpsw_mdio.h"
 
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index f85cdcb97e..c2e755f2b1 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -15,6 +15,8 @@
 #include <command.h>
 #include <tsec.h>
 #include <fsl_mdio.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/processor.h>
 #include <asm/io.h>
diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c
index c56836641b..cfdd1137be 100644
--- a/drivers/net/uli526x.c
+++ b/drivers/net/uli526x.c
@@ -16,6 +16,7 @@
 #include <asm/io.h>
 #include <pci.h>
 #include <miiphy.h>
+#include <linux/delay.h>
 
 /* some kernel function compatible define */
 
diff --git a/drivers/net/vsc7385.c b/drivers/net/vsc7385.c
index 072421062b..af8d99cefb 100644
--- a/drivers/net/vsc7385.c
+++ b/drivers/net/vsc7385.c
@@ -15,7 +15,9 @@
 #include <config.h>
 #include <common.h>
 #include <console.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include "vsc7385.h"
 
diff --git a/drivers/net/vsc9953.c b/drivers/net/vsc9953.c
index f17839c70f..c438dab561 100644
--- a/drivers/net/vsc9953.c
+++ b/drivers/net/vsc9953.c
@@ -5,6 +5,9 @@
  *  Driver for the Vitesse VSC9953 L2 Switch
  */
 
+#include <common.h>
+#include <command.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/fsl_serdes.h>
 #include <fm_eth.h>
@@ -14,6 +17,7 @@
 #include <malloc.h>
 #include <vsc9953.h>
 #include <ethsw.h>
+#include <linux/delay.h>
 
 static struct vsc9953_info vsc9953_l2sw = {
 		.port[0] = VSC9953_PORT_INFO_INITIALIZER(0),
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c
index b0450fff56..d0683db80d 100644
--- a/drivers/net/xilinx_axi_emac.c
+++ b/drivers/net/xilinx_axi_emac.c
@@ -9,12 +9,14 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <phy.h>
 #include <miiphy.h>
 #include <wait_bit.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c
index 4b49290f0e..9bdb6798b6 100644
--- a/drivers/net/xilinx_emaclite.c
+++ b/drivers/net/xilinx_emaclite.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <config.h>
 #include <dm.h>
@@ -16,6 +17,7 @@
 #include <phy.h>
 #include <miiphy.h>
 #include <fdtdec.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/kernel.h>
 #include <asm/io.h>
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c
index a158824fc9..412daf7d58 100644
--- a/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@ -12,11 +12,13 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <net.h>
 #include <netdev.h>
 #include <config.h>
 #include <console.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <phy.h>
 #include <miiphy.h>
@@ -26,6 +28,7 @@
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 
diff --git a/drivers/nvme/nvme-uclass.c b/drivers/nvme/nvme-uclass.c
index 2d88efdb61..277e31e1f3 100644
--- a/drivers/nvme/nvme-uclass.c
+++ b/drivers/nvme/nvme-uclass.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <errno.h>
 #include <dm.h>
 #include <dm/device.h>
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index ef4382da1a..0357aba7f1 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -5,9 +5,11 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <pci.h>
diff --git a/drivers/pch/pch7.c b/drivers/pch/pch7.c
index 268edb3f8f..5fb35a19ef 100644
--- a/drivers/pch/pch7.c
+++ b/drivers/pch/pch7.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pch.h>
 
 #define GPIO_BASE	0x44
diff --git a/drivers/pch/pch9.c b/drivers/pch/pch9.c
index fd61f16328..3bd011518b 100644
--- a/drivers/pch/pch9.c
+++ b/drivers/pch/pch9.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pch.h>
 
 #define GPIO_BASE	0x48
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 437cd9a055..6d8c22aacf 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -111,7 +111,7 @@ config PCI_SANDBOX
 
 config PCI_TEGRA
 	bool "Tegra PCI support"
-	depends on TEGRA
+	depends on ARCH_TEGRA
 	depends on (TEGRA186 && POWER_DOMAIN) || (!TEGRA186)
 	help
 	  Enable support for the PCIe controller found on some generations of
@@ -197,4 +197,12 @@ config PCIE_MEDIATEK
 	  Say Y here if you want to enable Gen2 PCIe controller,
 	  which could be found on MT7623 SoC family.
 
+config PCIE_ROCKCHIP
+	bool "Enable Rockchip PCIe driver"
+	select DM_PCI
+	default y if ROCKCHIP_RK3399
+	help
+	  Say Y here if you want to enable PCIe controller support on
+	  Rockchip SoCs.
+
 endif
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index c051ecc9f3..955351c5c2 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -43,3 +43,4 @@ obj-$(CONFIG_PCI_PHYTIUM) += pcie_phytium.o
 obj-$(CONFIG_PCIE_INTEL_FPGA) += pcie_intel_fpga.o
 obj-$(CONFIG_PCI_KEYSTONE) += pcie_dw_ti.o
 obj-$(CONFIG_PCIE_MEDIATEK) += pcie_mediatek.o
+obj-$(CONFIG_PCIE_ROCKCHIP) += pcie_rockchip.o pcie_rockchip_phy.o
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c
index ab5e49941f..1d09c5ac4f 100644
--- a/drivers/pci/fsl_pci_init.c
+++ b/drivers/pci/fsl_pci_init.c
@@ -5,8 +5,11 @@
 
 #include <common.h>
 #include <env.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/fsl_serdes.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/pci/pci-aardvark.c b/drivers/pci/pci-aardvark.c
index d678e0b599..711b930d0f 100644
--- a/drivers/pci/pci-aardvark.c
+++ b/drivers/pci/pci-aardvark.c
@@ -30,6 +30,8 @@
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/ioport.h>
 
 /* PCIe core registers */
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index 9486e1cb96..a52064341e 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <pci.h>
 #include <dm/lists.h>
diff --git a/drivers/pci/pci-rcar-gen2.c b/drivers/pci/pci-rcar-gen2.c
index 014d870478..e76abc1f84 100644
--- a/drivers/pci/pci-rcar-gen2.c
+++ b/drivers/pci/pci-rcar-gen2.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <pci.h>
+#include <linux/bitops.h>
 
 /* AHB-PCI Bridge PCI communication registers */
 #define RCAR_AHBPCI_PCICOM_OFFSET	0x800
diff --git a/drivers/pci/pci-rcar-gen3.c b/drivers/pci/pci-rcar-gen3.c
index 30eff67dca..df7b37a592 100644
--- a/drivers/pci/pci-rcar-gen3.c
+++ b/drivers/pci/pci-rcar-gen3.c
@@ -22,6 +22,7 @@
 #include <errno.h>
 #include <pci.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 
 #define PCIECAR			0x000010
 #define PCIECCTLR		0x000018
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index d2e10d6868..9ab3539a49 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <asm/io.h>
@@ -15,6 +17,7 @@
 #if defined(CONFIG_X86) && defined(CONFIG_HAVE_FSP)
 #include <asm/fsp/fsp_support.h>
 #endif
+#include <linux/delay.h>
 #include "pci_internal.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -1009,7 +1012,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
 	if (ret)
 		return ret;
 
-	if (CONFIG_IS_ENABLED(PCI_PNP) &&
+	if (CONFIG_IS_ENABLED(PCI_PNP) && ll_boot_init() &&
 	    (!hose->skip_auto_config_until_reloc ||
 	     (gd->flags & GD_FLG_RELOC))) {
 		ret = pci_auto_config_devices(bus);
@@ -1031,7 +1034,7 @@ static int pci_uclass_post_probe(struct udevice *bus)
 	 * Note we only call this 1) after U-Boot is relocated, and 2)
 	 * root bus has finished probing.
 	 */
-	if ((gd->flags & GD_FLG_RELOC) && (bus->seq == 0)) {
+	if ((gd->flags & GD_FLG_RELOC) && bus->seq == 0 && ll_boot_init()) {
 		ret = fsp_init_phase_pci();
 		if (ret)
 			return ret;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index e8285bf936..664e8379eb 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -16,6 +16,8 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
+#include <linux/delay.h>
 
 #include <command.h>
 #include <env.h>
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 28667bde8d..3f46b7697d 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 
 /* the user can define CONFIG_SYS_PCI_CACHE_LINE_SIZE to avoid problems */
diff --git a/drivers/pci/pci_auto_common.c b/drivers/pci/pci_auto_common.c
index 8690316610..c0a53dcc92 100644
--- a/drivers/pci/pci_auto_common.c
+++ b/drivers/pci/pci_auto_common.c
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 
 void pciauto_region_init(struct pci_region *res)
diff --git a/drivers/pci/pci_auto_old.c b/drivers/pci/pci_auto_old.c
index b566705c9d..8b67cfa92b 100644
--- a/drivers/pci/pci_auto_old.c
+++ b/drivers/pci/pci_auto_old.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <pci.h>
 
 /*
diff --git a/drivers/pci/pci_compat.c b/drivers/pci/pci_compat.c
index 6c15bdfc03..9dddca8efe 100644
--- a/drivers/pci/pci_compat.c
+++ b/drivers/pci/pci_compat.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <dm/device-internal.h>
diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
index 736befdc3b..32fac878a6 100644
--- a/drivers/pci/pci_ftpci100.c
+++ b/drivers/pci/pci_ftpci100.c
@@ -7,6 +7,8 @@
  * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
  */
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 
diff --git a/drivers/pci/pci_gt64120.c b/drivers/pci/pci_gt64120.c
index 55f4800781..80f11fedd1 100644
--- a/drivers/pci/pci_gt64120.c
+++ b/drivers/pci/pci_gt64120.c
@@ -10,6 +10,8 @@
 
 #include <common.h>
 #include <gt64120.h>
+#include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <pci_gt64120.h>
 
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index 8dff68dbd0..6576f53f52 100644
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -5,6 +5,7 @@
  *
  */
 #include <common.h>
+#include <asm/bitops.h>
 #include <asm/cpm_85xx.h>
 #include <pci.h>
 #include <dm.h>
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 504eb65c27..04838200a8 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <msc01.h>
 #include <pci.h>
 #include <pci_msc01.h>
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index 483a87db7d..c9afe75150 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
@@ -19,6 +20,7 @@
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
 #include <linux/mbus.h>
diff --git a/drivers/pci/pci_rom.c b/drivers/pci/pci_rom.c
index 6b17f18bc0..6a9bc49978 100644
--- a/drivers/pci/pci_rom.c
+++ b/drivers/pci/pci_rom.c
@@ -24,9 +24,11 @@
 
 #include <common.h>
 #include <bios_emul.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <errno.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <pci_rom.h>
diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c
index fa4c476597..8745f286bd 100644
--- a/drivers/pci/pci_sandbox.c
+++ b/drivers/pci/pci_sandbox.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pci.h>
 
 #define FDT_DEV_INFO_CELLS	4
diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c
index 4500e8bb29..aac9be055e 100644
--- a/drivers/pci/pci_sh4.c
+++ b/drivers/pci/pci_sh4.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include <asm/processor.h>
 #include <asm/io.h>
diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c
index 2f48b96719..e110550c71 100644
--- a/drivers/pci/pci_sh7751.c
+++ b/drivers/pci/pci_sh7751.c
@@ -11,6 +11,8 @@
 #include <asm/processor.h>
 #include <asm/io.h>
 #include <asm/pci.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* Register addresses and such */
 #define SH7751_BCR1	(vu_long *)0xFF800000
diff --git a/drivers/pci/pci_sh7780.c b/drivers/pci/pci_sh7780.c
index 722b5e7cf2..06d711a6cb 100644
--- a/drivers/pci/pci_sh7780.c
+++ b/drivers/pci/pci_sh7780.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include <pci.h>
 #include <asm/processor.h>
diff --git a/drivers/pci/pci_tegra.c b/drivers/pci/pci_tegra.c
index 96d308f7bf..82f5c59d91 100644
--- a/drivers/pci/pci_tegra.c
+++ b/drivers/pci/pci_tegra.c
@@ -15,11 +15,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <pci_tegra.h>
 #include <power-domain.h>
 #include <reset.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index 1f216e1c68..c773f8d28d 100644
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -12,9 +12,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/pci/pcie_dw_ti.c b/drivers/pci/pcie_dw_ti.c
index f62264cbba..742dd93633 100644
--- a/drivers/pci/pcie_dw_ti.c
+++ b/drivers/pci/pcie_dw_ti.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pci.h>
 #include <generic-phy.h>
 #include <power-domain.h>
@@ -13,6 +14,8 @@
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index dc994b748a..ab33459e28 100644
--- a/drivers/pci/pcie_fsl.c
+++ b/drivers/pci/pcie_fsl.c
@@ -14,6 +14,7 @@
 #include <asm/fsl_pci.h>
 #include <asm/fsl_serdes.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "pcie_fsl.h"
 #include <dm/device_compat.h>
 
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index f34a157902..cbf12371a0 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <asm/arch/clock.h>
@@ -19,6 +20,7 @@
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <dm.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 #include <errno.h>
 #include <asm/arch/sys_proto.h>
diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
index 6a9f29c5c8..aa1903e547 100644
--- a/drivers/pci/pcie_intel_fpga.c
+++ b/drivers/pci/pcie_intel_fpga.c
@@ -11,6 +11,8 @@
 #include <pci.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define RP_TX_REG0			0x2000
 #define RP_TX_CNTRL			0x2004
diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c
index 8b313e9278..39b6d40802 100644
--- a/drivers/pci/pcie_layerscape.c
+++ b/drivers/pci/pcie_layerscape.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/fsl_serdes.h>
 #include <pci.h>
 #include <asm/io.h>
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index ec6acbb138..25a3c3870c 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -6,6 +6,8 @@
  */
 
 #include <common.h>
+#include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/io.h>
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index b010a6300c..c11c691b86 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <init.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/soc.h>
 #include "pcie_layerscape_fixup_common.h"
diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c
index cec61fa7d6..428bfcab09 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/fsl_serdes.h>
 #include <pci.h>
 #include <asm/io.h>
diff --git a/drivers/pci/pcie_layerscape_gen4.h b/drivers/pci/pcie_layerscape_gen4.h
index 27c2d09332..d298a2b810 100644
--- a/drivers/pci/pcie_layerscape_gen4.h
+++ b/drivers/pci/pcie_layerscape_gen4.h
@@ -10,6 +10,7 @@
 #define _PCIE_LAYERSCAPE_GEN4_H_
 #include <pci.h>
 #include <dm.h>
+#include <linux/bitops.h>
 
 #ifndef CONFIG_SYS_PCI_MEMORY_SIZE
 #define CONFIG_SYS_PCI_MEMORY_SIZE		(4 * 1024 * 1024 * 1024ULL)
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index bfe197e7d8..1975004e59 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/arch/fsl_serdes.h>
 #include <asm/io.h>
diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c
index d8a32d53f6..6e6375cec0 100644
--- a/drivers/pci/pcie_mediatek.c
+++ b/drivers/pci/pcie_mediatek.c
@@ -11,11 +11,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <pci.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 #include <linux/list.h>
 
diff --git a/drivers/pci/pcie_rockchip.c b/drivers/pci/pcie_rockchip.c
new file mode 100644
index 0000000000..0edc2464a8
--- /dev/null
+++ b/drivers/pci/pcie_rockchip.c
@@ -0,0 +1,498 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Rockchip AXI PCIe host controller driver
+ *
+ * Copyright (c) 2016 Rockchip, Inc.
+ * Copyright (c) 2020 Amarula Solutions(India)
+ * Copyright (c) 2020 Jagan Teki <jagan@amarulasolutions.com>
+ * Copyright (c) 2019 Patrick Wildt <patrick@blueri.se>
+ * Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org>
+ *
+ * Bits taken from Linux Rockchip PCIe host controller.
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <pci.h>
+#include <power-domain.h>
+#include <power/regulator.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/io.h>
+#include <asm-generic/gpio.h>
+#include <asm/arch-rockchip/clock.h>
+#include <linux/iopoll.h>
+
+#include "pcie_rockchip.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int rockchip_pcie_off_conf(pci_dev_t bdf, uint offset)
+{
+	unsigned int bus = PCI_BUS(bdf);
+	unsigned int dev = PCI_DEV(bdf);
+	unsigned int func = PCI_FUNC(bdf);
+
+	return (bus << 20) | (dev << 15) | (func << 12) | (offset & ~0x3);
+}
+
+static int rockchip_pcie_rd_conf(const struct udevice *udev, pci_dev_t bdf,
+				 uint offset, ulong *valuep,
+				 enum pci_size_t size)
+{
+	struct rockchip_pcie *priv = dev_get_priv(udev);
+	unsigned int bus = PCI_BUS(bdf);
+	unsigned int dev = PCI_DEV(bdf);
+	int where = rockchip_pcie_off_conf(bdf, offset);
+	ulong value;
+
+	if (bus == priv->first_busno && dev == 0) {
+		value = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where);
+		*valuep = pci_conv_32_to_size(value, offset, size);
+		return 0;
+	}
+
+	if ((bus == priv->first_busno + 1) && dev == 0) {
+		value = readl(priv->axi_base + where);
+		*valuep = pci_conv_32_to_size(value, offset, size);
+		return 0;
+	}
+
+	*valuep = pci_get_ff(size);
+
+	return 0;
+}
+
+static int rockchip_pcie_wr_conf(struct udevice *udev, pci_dev_t bdf,
+				 uint offset, ulong value,
+				 enum pci_size_t size)
+{
+	struct rockchip_pcie *priv = dev_get_priv(udev);
+	unsigned int bus = PCI_BUS(bdf);
+	unsigned int dev = PCI_DEV(bdf);
+	int where = rockchip_pcie_off_conf(bdf, offset);
+	ulong old;
+
+	if (bus == priv->first_busno && dev == 0) {
+		old = readl(priv->apb_base + PCIE_RC_NORMAL_BASE + where);
+		value = pci_conv_size_to_32(old, value, offset, size);
+		writel(value, priv->apb_base + PCIE_RC_NORMAL_BASE + where);
+		return 0;
+	}
+
+	if ((bus == priv->first_busno + 1) && dev == 0) {
+		old = readl(priv->axi_base + where);
+		value = pci_conv_size_to_32(old, value, offset, size);
+		writel(value, priv->axi_base + where);
+		return 0;
+	}
+
+	return 0;
+}
+
+static int rockchip_pcie_atr_init(struct rockchip_pcie *priv)
+{
+	struct udevice *ctlr = pci_get_controller(priv->dev);
+	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
+	u64 addr, size, offset;
+	u32 type;
+	int i, region;
+
+	/* Use region 0 to map PCI configuration space. */
+	writel(25 - 1, priv->apb_base + PCIE_ATR_OB_ADDR0(0));
+	writel(0, priv->apb_base + PCIE_ATR_OB_ADDR1(0));
+	writel(PCIE_ATR_HDR_CFG_TYPE0 | PCIE_ATR_HDR_RID,
+	       priv->apb_base + PCIE_ATR_OB_DESC0(0));
+	writel(0, priv->apb_base + PCIE_ATR_OB_DESC1(0));
+
+	for (i = 0; i < hose->region_count; i++) {
+		if (hose->regions[i].flags == PCI_REGION_SYS_MEMORY)
+			continue;
+
+		if (hose->regions[i].flags == PCI_REGION_IO)
+			type = PCIE_ATR_HDR_IO;
+		else
+			type = PCIE_ATR_HDR_MEM;
+
+		/* Only support identity mappings. */
+		if (hose->regions[i].bus_start !=
+		    hose->regions[i].phys_start)
+			return -EINVAL;
+
+		/* Only support mappings aligned on a region boundary. */
+		addr = hose->regions[i].bus_start;
+		if (addr & (PCIE_ATR_OB_REGION_SIZE - 1))
+			return -EINVAL;
+
+		/* Mappings should lie between AXI and APB regions. */
+		size = hose->regions[i].size;
+		if (addr < (u64)priv->axi_base + PCIE_ATR_OB_REGION0_SIZE)
+			return -EINVAL;
+		if (addr + size > (u64)priv->apb_base)
+			return -EINVAL;
+
+		offset = addr - (u64)priv->axi_base - PCIE_ATR_OB_REGION0_SIZE;
+		region = 1 + (offset / PCIE_ATR_OB_REGION_SIZE);
+		while (size > 0) {
+			writel(32 - 1,
+			       priv->apb_base + PCIE_ATR_OB_ADDR0(region));
+			writel(0, priv->apb_base + PCIE_ATR_OB_ADDR1(region));
+			writel(type | PCIE_ATR_HDR_RID,
+			       priv->apb_base + PCIE_ATR_OB_DESC0(region));
+			writel(0, priv->apb_base + PCIE_ATR_OB_DESC1(region));
+
+			addr += PCIE_ATR_OB_REGION_SIZE;
+			size -= PCIE_ATR_OB_REGION_SIZE;
+			region++;
+		}
+	}
+
+	/* Passthrough inbound translations unmodified. */
+	writel(32 - 1, priv->apb_base + PCIE_ATR_IB_ADDR0(2));
+	writel(0, priv->apb_base + PCIE_ATR_IB_ADDR1(2));
+
+	return 0;
+}
+
+static int rockchip_pcie_init_port(struct udevice *dev)
+{
+	struct rockchip_pcie *priv = dev_get_priv(dev);
+	struct rockchip_pcie_phy *phy = pcie_get_phy(priv);
+	struct rockchip_pcie_phy_ops *ops = phy_get_ops(phy);
+	u32 cr, val, status;
+	int ret;
+
+	if (dm_gpio_is_valid(&priv->ep_gpio))
+		dm_gpio_set_value(&priv->ep_gpio, 0);
+
+	ret = reset_assert(&priv->aclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert aclk reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_assert(&priv->pclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert pclk reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_assert(&priv->pm_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert pm reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = ops->init(phy);
+	if (ret) {
+		dev_err(dev, "failed to init phy (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_assert(&priv->core_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert core reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_assert(&priv->mgmt_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert mgmt reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_assert(&priv->mgmt_sticky_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert mgmt-sticky reset (ret=%d)\n",
+			ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_assert(&priv->pipe_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert pipe reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	udelay(10);
+
+	ret = reset_deassert(&priv->pm_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert pm reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_deassert(&priv->aclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert aclk reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	ret = reset_deassert(&priv->pclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert pclk reset (ret=%d)\n", ret);
+		goto err_exit_phy;
+	}
+
+	/* Select GEN1 for now */
+	cr = PCIE_CLIENT_GEN_SEL_1;
+	/* Set Root complex mode */
+	cr |= PCIE_CLIENT_CONF_ENABLE | PCIE_CLIENT_MODE_RC;
+	writel(cr, priv->apb_base + PCIE_CLIENT_CONFIG);
+
+	ret = ops->power_on(phy);
+	if (ret) {
+		dev_err(dev, "failed to power on phy (ret=%d)\n", ret);
+		goto err_power_off_phy;
+	}
+
+	ret = reset_deassert(&priv->mgmt_sticky_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert mgmt-sticky reset (ret=%d)\n",
+			ret);
+		goto err_power_off_phy;
+	}
+
+	ret = reset_deassert(&priv->core_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert core reset (ret=%d)\n", ret);
+		goto err_power_off_phy;
+	}
+
+	ret = reset_deassert(&priv->mgmt_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert mgmt reset (ret=%d)\n", ret);
+		goto err_power_off_phy;
+	}
+
+	ret = reset_deassert(&priv->pipe_rst);
+	if (ret) {
+		dev_err(dev, "failed to deassert pipe reset (ret=%d)\n", ret);
+		goto err_power_off_phy;
+	}
+
+	/* Enable Gen1 training */
+	writel(PCIE_CLIENT_LINK_TRAIN_ENABLE,
+	       priv->apb_base + PCIE_CLIENT_CONFIG);
+
+	if (dm_gpio_is_valid(&priv->ep_gpio))
+		dm_gpio_set_value(&priv->ep_gpio, 1);
+
+	ret = readl_poll_sleep_timeout
+			(priv->apb_base + PCIE_CLIENT_BASIC_STATUS1,
+			status, PCIE_LINK_UP(status), 20, 500 * 1000);
+	if (ret) {
+		dev_err(dev, "PCIe link training gen1 timeout!\n");
+		goto err_power_off_phy;
+	}
+
+	/* Initialize Root Complex registers. */
+	writel(PCIE_LM_VENDOR_ROCKCHIP, priv->apb_base + PCIE_LM_VENDOR_ID);
+	writel(PCI_CLASS_BRIDGE_PCI << 16,
+	       priv->apb_base + PCIE_RC_BASE + PCI_CLASS_REVISION);
+	writel(PCIE_LM_RCBARPIE | PCIE_LM_RCBARPIS,
+	       priv->apb_base + PCIE_LM_RCBAR);
+
+	if (dev_read_bool(dev, "aspm-no-l0s")) {
+		val = readl(priv->apb_base + PCIE_RC_PCIE_LCAP);
+		val &= ~PCIE_RC_PCIE_LCAP_APMS_L0S;
+		writel(val, priv->apb_base + PCIE_RC_PCIE_LCAP);
+	}
+
+	/* Configure Address Translation. */
+	ret = rockchip_pcie_atr_init(priv);
+	if (ret) {
+		dev_err(dev, "PCIE-%d: ATR init failed\n", dev->seq);
+		goto err_power_off_phy;
+	}
+
+	return 0;
+
+err_power_off_phy:
+	ops->power_off(phy);
+err_exit_phy:
+	ops->exit(phy);
+	return ret;
+}
+
+static int rockchip_pcie_set_vpcie(struct udevice *dev)
+{
+	struct rockchip_pcie *priv = dev_get_priv(dev);
+	int ret;
+
+	if (priv->vpcie3v3) {
+		ret = regulator_set_enable(priv->vpcie3v3, true);
+		if (ret) {
+			dev_err(dev, "failed to enable vpcie3v3 (ret=%d)\n",
+				ret);
+			return ret;
+		}
+	}
+
+	if (priv->vpcie1v8) {
+		ret = regulator_set_enable(priv->vpcie1v8, true);
+		if (ret) {
+			dev_err(dev, "failed to enable vpcie1v8 (ret=%d)\n",
+				ret);
+			goto err_disable_3v3;
+		}
+	}
+
+	if (priv->vpcie0v9) {
+		ret = regulator_set_enable(priv->vpcie0v9, true);
+		if (ret) {
+			dev_err(dev, "failed to enable vpcie0v9 (ret=%d)\n",
+				ret);
+			goto err_disable_1v8;
+		}
+	}
+
+	return 0;
+
+err_disable_1v8:
+	if (priv->vpcie1v8)
+		regulator_set_enable(priv->vpcie1v8, false);
+err_disable_3v3:
+	if (priv->vpcie3v3)
+		regulator_set_enable(priv->vpcie3v3, false);
+	return ret;
+}
+
+static int rockchip_pcie_parse_dt(struct udevice *dev)
+{
+	struct rockchip_pcie *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->axi_base = dev_read_addr_name(dev, "axi-base");
+	if (!priv->axi_base)
+		return -ENODEV;
+
+	priv->apb_base = dev_read_addr_name(dev, "apb-base");
+	if (!priv->axi_base)
+		return -ENODEV;
+
+	ret = gpio_request_by_name(dev, "ep-gpios", 0,
+				   &priv->ep_gpio, GPIOD_IS_OUT);
+	if (ret) {
+		dev_err(dev, "failed to find ep-gpios property\n");
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "core", &priv->core_rst);
+	if (ret) {
+		dev_err(dev, "failed to get core reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "mgmt", &priv->mgmt_rst);
+	if (ret) {
+		dev_err(dev, "failed to get mgmt reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "mgmt-sticky", &priv->mgmt_sticky_rst);
+	if (ret) {
+		dev_err(dev, "failed to get mgmt-sticky reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "pipe", &priv->pipe_rst);
+	if (ret) {
+		dev_err(dev, "failed to get pipe reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "pm", &priv->pm_rst);
+	if (ret) {
+		dev_err(dev, "failed to get pm reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "pclk", &priv->pclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to get pclk reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "aclk", &priv->aclk_rst);
+	if (ret) {
+		dev_err(dev, "failed to get aclk reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = device_get_supply_regulator(dev, "vpcie3v3-supply",
+					  &priv->vpcie3v3);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get vpcie3v3 supply (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = device_get_supply_regulator(dev, "vpcie1v8-supply",
+					  &priv->vpcie1v8);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get vpcie1v8 supply (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = device_get_supply_regulator(dev, "vpcie0v9-supply",
+					  &priv->vpcie0v9);
+	if (ret && ret != -ENOENT) {
+		dev_err(dev, "failed to get vpcie0v9 supply (ret=%d)\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_pcie_probe(struct udevice *dev)
+{
+	struct rockchip_pcie *priv = dev_get_priv(dev);
+	struct udevice *ctlr = pci_get_controller(dev);
+	struct pci_controller *hose = dev_get_uclass_priv(ctlr);
+	int ret;
+
+	priv->first_busno = dev->seq;
+	priv->dev = dev;
+
+	ret = rockchip_pcie_parse_dt(dev);
+	if (ret)
+		return ret;
+
+	ret = rockchip_pcie_phy_get(dev);
+	if (ret)
+		return ret;
+
+	ret = rockchip_pcie_set_vpcie(dev);
+	if (ret)
+		return ret;
+
+	ret = rockchip_pcie_init_port(dev);
+	if (ret)
+		return ret;
+
+	dev_info(dev, "PCIE-%d: Link up (Bus%d)\n",
+		 dev->seq, hose->first_busno);
+
+	return 0;
+}
+
+static const struct dm_pci_ops rockchip_pcie_ops = {
+	.read_config	= rockchip_pcie_rd_conf,
+	.write_config	= rockchip_pcie_wr_conf,
+};
+
+static const struct udevice_id rockchip_pcie_ids[] = {
+	{ .compatible = "rockchip,rk3399-pcie" },
+	{ }
+};
+
+U_BOOT_DRIVER(rockchip_pcie) = {
+	.name			= "rockchip_pcie",
+	.id			= UCLASS_PCI,
+	.of_match		= rockchip_pcie_ids,
+	.ops			= &rockchip_pcie_ops,
+	.probe			= rockchip_pcie_probe,
+	.priv_auto_alloc_size	= sizeof(struct rockchip_pcie),
+};
diff --git a/drivers/pci/pcie_rockchip.h b/drivers/pci/pcie_rockchip.h
new file mode 100644
index 0000000000..c3a0a2846d
--- /dev/null
+++ b/drivers/pci/pcie_rockchip.h
@@ -0,0 +1,142 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Rockchip PCIe Headers
+ *
+ * Copyright (c) 2016 Rockchip, Inc.
+ * Copyright (c) 2020 Amarula Solutions(India)
+ * Copyright (c) 2020 Jagan Teki <jagan@amarulasolutions.com>
+ * Copyright (c) 2019 Patrick Wildt <patrick@blueri.se>
+ *
+ */
+
+#define HIWORD_UPDATE(mask, val)        (((mask) << 16) | (val))
+#define HIWORD_UPDATE_BIT(val)          HIWORD_UPDATE(val, val)
+
+#define ENCODE_LANES(x)                 ((((x) >> 1) & 3) << 4)
+#define PCIE_CLIENT_BASE                0x0
+#define PCIE_CLIENT_CONFIG              (PCIE_CLIENT_BASE + 0x00)
+#define PCIE_CLIENT_CONF_ENABLE         HIWORD_UPDATE_BIT(0x0001)
+#define PCIE_CLIENT_LINK_TRAIN_ENABLE   HIWORD_UPDATE_BIT(0x0002)
+#define PCIE_CLIENT_MODE_RC             HIWORD_UPDATE_BIT(0x0040)
+#define PCIE_CLIENT_GEN_SEL_1           HIWORD_UPDATE(0x0080, 0)
+#define PCIE_CLIENT_BASIC_STATUS1	0x0048
+#define PCIE_CLIENT_LINK_STATUS_UP	GENMASK(21, 20)
+#define PCIE_CLIENT_LINK_STATUS_MASK	GENMASK(21, 20)
+#define PCIE_LINK_UP(x) \
+	(((x) & PCIE_CLIENT_LINK_STATUS_MASK) == PCIE_CLIENT_LINK_STATUS_UP)
+#define PCIE_RC_NORMAL_BASE		0x800000
+#define PCIE_LM_BASE			0x900000
+#define PCIE_LM_VENDOR_ID              (PCIE_LM_BASE + 0x44)
+#define PCIE_LM_VENDOR_ROCKCHIP		0x1d87
+#define PCIE_LM_RCBAR			(PCIE_LM_BASE + 0x300)
+#define PCIE_LM_RCBARPIE		BIT(19)
+#define PCIE_LM_RCBARPIS		BIT(20)
+#define PCIE_RC_BASE			0xa00000
+#define PCIE_RC_CONFIG_DCR		(PCIE_RC_BASE + 0x0c4)
+#define PCIE_RC_CONFIG_DCR_CSPL_SHIFT	18
+#define PCIE_RC_CONFIG_DCR_CPLS_SHIFT	26
+#define PCIE_RC_PCIE_LCAP		(PCIE_RC_BASE + 0x0cc)
+#define PCIE_RC_PCIE_LCAP_APMS_L0S	BIT(10)
+#define PCIE_ATR_BASE			0xc00000
+#define PCIE_ATR_OB_ADDR0(i)		(PCIE_ATR_BASE + 0x000 + (i) * 0x20)
+#define PCIE_ATR_OB_ADDR1(i)		(PCIE_ATR_BASE + 0x004 + (i) * 0x20)
+#define PCIE_ATR_OB_DESC0(i)		(PCIE_ATR_BASE + 0x008 + (i) * 0x20)
+#define PCIE_ATR_OB_DESC1(i)		(PCIE_ATR_BASE + 0x00c + (i) * 0x20)
+#define PCIE_ATR_IB_ADDR0(i)		(PCIE_ATR_BASE + 0x800 + (i) * 0x8)
+#define PCIE_ATR_IB_ADDR1(i)		(PCIE_ATR_BASE + 0x804 + (i) * 0x8)
+#define PCIE_ATR_HDR_MEM		0x2
+#define PCIE_ATR_HDR_IO			0x6
+#define PCIE_ATR_HDR_CFG_TYPE0		0xa
+#define PCIE_ATR_HDR_CFG_TYPE1		0xb
+#define PCIE_ATR_HDR_RID		BIT(23)
+
+#define PCIE_ATR_OB_REGION0_SIZE	(32 * 1024 * 1024)
+#define PCIE_ATR_OB_REGION_SIZE		(1 * 1024 * 1024)
+
+/*
+ * The higher 16-bit of this register is used for write protection
+ * only if BIT(x + 16) set to 1 the BIT(x) can be written.
+ */
+#define HIWORD_UPDATE_MASK(val, mask, shift) \
+		((val) << (shift) | (mask) << ((shift) + 16))
+
+#define PHY_CFG_DATA_SHIFT    7
+#define PHY_CFG_ADDR_SHIFT    1
+#define PHY_CFG_DATA_MASK     0xf
+#define PHY_CFG_ADDR_MASK     0x3f
+#define PHY_CFG_RD_MASK       0x3ff
+#define PHY_CFG_WR_ENABLE     1
+#define PHY_CFG_WR_DISABLE    1
+#define PHY_CFG_WR_SHIFT      0
+#define PHY_CFG_WR_MASK       1
+#define PHY_CFG_PLL_LOCK      0x10
+#define PHY_CFG_CLK_TEST      0x10
+#define PHY_CFG_CLK_SCC       0x12
+#define PHY_CFG_SEPE_RATE     BIT(3)
+#define PHY_CFG_PLL_100M      BIT(3)
+#define PHY_PLL_LOCKED        BIT(9)
+#define PHY_PLL_OUTPUT        BIT(10)
+#define PHY_LANE_IDLE_OFF     0x1
+#define PHY_LANE_IDLE_MASK    0x1
+#define PHY_LANE_IDLE_A_SHIFT 3
+#define PHY_LANE_IDLE_B_SHIFT 4
+#define PHY_LANE_IDLE_C_SHIFT 5
+#define PHY_LANE_IDLE_D_SHIFT 6
+
+#define PCIE_PHY_CONF		0xe220
+#define PCIE_PHY_STATUS		0xe2a4
+#define PCIE_PHY_LANEOFF	0xe214
+
+struct rockchip_pcie_phy {
+	void *reg_base;
+	struct clk refclk;
+	struct reset_ctl phy_rst;
+	struct rockchip_pcie_phy_ops *ops;
+};
+
+struct rockchip_pcie_phy_ops {
+	int (*init)(struct rockchip_pcie_phy *phy);
+	int (*exit)(struct rockchip_pcie_phy *phy);
+	int (*power_on)(struct rockchip_pcie_phy *phy);
+	int (*power_off)(struct rockchip_pcie_phy *phy);
+};
+
+struct rockchip_pcie {
+	fdt_addr_t axi_base;
+	fdt_addr_t apb_base;
+	int first_busno;
+	struct udevice *dev;
+	struct rockchip_pcie_phy rk_phy;
+	struct rockchip_pcie_phy *phy;
+
+	/* resets */
+	struct reset_ctl core_rst;
+	struct reset_ctl mgmt_rst;
+	struct reset_ctl mgmt_sticky_rst;
+	struct reset_ctl pipe_rst;
+	struct reset_ctl pm_rst;
+	struct reset_ctl pclk_rst;
+	struct reset_ctl aclk_rst;
+
+	/* gpio */
+	struct gpio_desc ep_gpio;
+
+	/* vpcie regulators */
+	struct udevice *vpcie12v;
+	struct udevice *vpcie3v3;
+	struct udevice *vpcie1v8;
+	struct udevice *vpcie0v9;
+};
+
+int rockchip_pcie_phy_get(struct udevice *dev);
+
+inline struct rockchip_pcie_phy *pcie_get_phy(struct rockchip_pcie *pcie)
+{
+	return pcie->phy;
+}
+
+inline
+struct rockchip_pcie_phy_ops *phy_get_ops(struct rockchip_pcie_phy *phy)
+{
+	return (struct rockchip_pcie_phy_ops *)phy->ops;
+}
diff --git a/drivers/pci/pcie_rockchip_phy.c b/drivers/pci/pcie_rockchip_phy.c
new file mode 100644
index 0000000000..47f5d6c7e3
--- /dev/null
+++ b/drivers/pci/pcie_rockchip_phy.c
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Rockchip PCIe PHY driver
+ *
+ * Copyright (c) 2016 Rockchip, Inc.
+ * Copyright (c) 2020 Amarula Solutions(India)
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+#include <asm/arch-rockchip/clock.h>
+
+#include "pcie_rockchip.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void phy_wr_cfg(struct rockchip_pcie_phy *phy, u32 addr, u32 data)
+{
+	u32 reg;
+
+	reg = HIWORD_UPDATE_MASK(data, PHY_CFG_DATA_MASK, PHY_CFG_DATA_SHIFT);
+	reg |= HIWORD_UPDATE_MASK(addr, PHY_CFG_ADDR_MASK, PHY_CFG_ADDR_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_CONF);
+
+	udelay(1);
+
+	reg = HIWORD_UPDATE_MASK(PHY_CFG_WR_ENABLE,
+				 PHY_CFG_WR_MASK,
+				 PHY_CFG_WR_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_CONF);
+
+	udelay(1);
+
+	reg = HIWORD_UPDATE_MASK(PHY_CFG_WR_DISABLE,
+				 PHY_CFG_WR_MASK,
+				 PHY_CFG_WR_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_CONF);
+}
+
+static int rockchip_pcie_phy_power_on(struct rockchip_pcie_phy *phy)
+{
+	int ret = 0;
+	u32 reg, status;
+
+	ret = reset_deassert(&phy->phy_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert phy reset\n");
+		return ret;
+	}
+
+	reg = HIWORD_UPDATE_MASK(PHY_CFG_PLL_LOCK,
+				 PHY_CFG_ADDR_MASK,
+				 PHY_CFG_ADDR_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_CONF);
+
+	reg = HIWORD_UPDATE_MASK(!PHY_LANE_IDLE_OFF,
+				 PHY_LANE_IDLE_MASK,
+				 PHY_LANE_IDLE_A_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_LANEOFF);
+
+	ret = -EINVAL;
+	ret = readl_poll_sleep_timeout(phy->reg_base + PCIE_PHY_STATUS,
+				       status,
+				       status & PHY_PLL_LOCKED,
+				       20 * 1000,
+				       50);
+	if (ret) {
+		dev_err(&phy->dev, "pll lock timeout!\n");
+		goto err_pll_lock;
+	}
+
+	phy_wr_cfg(phy, PHY_CFG_CLK_TEST, PHY_CFG_SEPE_RATE);
+	phy_wr_cfg(phy, PHY_CFG_CLK_SCC, PHY_CFG_PLL_100M);
+
+	ret = -ETIMEDOUT;
+	ret = readl_poll_sleep_timeout(phy->reg_base + PCIE_PHY_STATUS,
+				       status,
+				       !(status & PHY_PLL_OUTPUT),
+				       20 * 1000,
+				       50);
+	if (ret) {
+		dev_err(&phy->dev, "pll output enable timeout!\n");
+		goto err_pll_lock;
+	}
+
+	reg = HIWORD_UPDATE_MASK(PHY_CFG_PLL_LOCK,
+				 PHY_CFG_ADDR_MASK,
+				 PHY_CFG_ADDR_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_CONF);
+
+	ret = -EINVAL;
+	ret = readl_poll_sleep_timeout(phy->reg_base + PCIE_PHY_STATUS,
+				       status,
+				       status & PHY_PLL_LOCKED,
+				       20 * 1000,
+				       50);
+	if (ret) {
+		dev_err(&phy->dev, "pll relock timeout!\n");
+		goto err_pll_lock;
+	}
+
+	return 0;
+
+err_pll_lock:
+	reset_assert(&phy->phy_rst);
+	return ret;
+}
+
+static int rockchip_pcie_phy_power_off(struct rockchip_pcie_phy *phy)
+{
+	int ret;
+	u32 reg;
+
+	reg = HIWORD_UPDATE_MASK(PHY_LANE_IDLE_OFF,
+				 PHY_LANE_IDLE_MASK,
+				 PHY_LANE_IDLE_A_SHIFT);
+	writel(reg, phy->reg_base + PCIE_PHY_LANEOFF);
+
+	ret = reset_assert(&phy->phy_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert phy reset\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_pcie_phy_init(struct rockchip_pcie_phy *phy)
+{
+	int ret;
+
+	ret = clk_enable(&phy->refclk);
+	if (ret) {
+		dev_err(dev, "failed to enable refclk clock\n");
+		return ret;
+	}
+
+	ret = reset_assert(&phy->phy_rst);
+	if (ret) {
+		dev_err(dev, "failed to assert phy reset\n");
+		goto err_reset;
+	}
+
+	return 0;
+
+err_reset:
+	clk_disable(&phy->refclk);
+	return ret;
+}
+
+static int rockchip_pcie_phy_exit(struct rockchip_pcie_phy *phy)
+{
+	clk_disable(&phy->refclk);
+
+	return 0;
+}
+
+static struct rockchip_pcie_phy_ops pcie_phy_ops = {
+	.init = rockchip_pcie_phy_init,
+	.power_on = rockchip_pcie_phy_power_on,
+	.power_off = rockchip_pcie_phy_power_off,
+	.exit = rockchip_pcie_phy_exit,
+};
+
+int rockchip_pcie_phy_get(struct udevice *dev)
+{
+	struct rockchip_pcie *priv = dev_get_priv(dev);
+	struct rockchip_pcie_phy *phy_priv = &priv->rk_phy;
+	ofnode phy_node;
+	u32 phandle;
+	int ret;
+
+	phandle = dev_read_u32_default(dev, "phys", 0);
+	phy_node = ofnode_get_by_phandle(phandle);
+	if (!ofnode_valid(phy_node)) {
+		dev_err(dev, "failed to found pcie-phy\n");
+		return -ENODEV;
+	}
+
+	phy_priv->reg_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+
+	ret = clk_get_by_index_nodev(phy_node, 0, &phy_priv->refclk);
+	if (ret) {
+		dev_err(dev, "failed to get refclk clock phandle\n");
+		return ret;
+	}
+
+	ret = reset_get_by_index_nodev(phy_node, 0, &phy_priv->phy_rst);
+	if (ret) {
+		dev_err(dev, "failed to get phy reset phandle\n");
+		return ret;
+	}
+
+	phy_priv->ops = &pcie_phy_ops;
+	priv->phy = phy_priv;
+
+	return 0;
+}
diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 05787ae144..713ad49d04 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <pci.h>
+#include <linux/bitops.h>
 
 #include <asm/io.h>
 
diff --git a/drivers/pci_endpoint/pcie-cadence.h b/drivers/pci_endpoint/pcie-cadence.h
index 91630d35c3..8a659c36aa 100644
--- a/drivers/pci_endpoint/pcie-cadence.h
+++ b/drivers/pci_endpoint/pcie-cadence.h
@@ -14,6 +14,7 @@
 #include <common.h>
 #include <pci_ep.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /*
  * Local Management Registers
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 1e38c8741f..9c775107e9 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -225,4 +225,5 @@ config PHY_MTK_TPHY
 	  multi-ports is first version, otherwise is second veriosn,
 	  so you can easily distinguish them by banks layout.
 
+source "drivers/phy/rockchip/Kconfig"
 endmenu
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 612c428cf5..f050645044 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device.h>
 #include <generic-phy.h>
 #include <phy-sun4i-usb.h>
@@ -22,6 +23,8 @@
 #include <asm/arch/clock.h>
 #include <asm/arch/cpu.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #define REG_ISCR			0x00
@@ -279,7 +282,8 @@ static int sun4i_usb_phy_init(struct phy *phy)
 		return ret;
 	}
 
-	if (data->cfg->type == sun8i_a83t_phy) {
+	if (data->cfg->type == sun8i_a83t_phy ||
+	    data->cfg->type == sun50i_h6_phy) {
 		if (phy->id == 0) {
 			val = readl(data->base + data->cfg->phyctl_offset);
 			val |= PHY_CTL_VBUSVLDEXT;
@@ -321,7 +325,8 @@ static int sun4i_usb_phy_exit(struct phy *phy)
 	int ret;
 
 	if (phy->id == 0) {
-		if (data->cfg->type == sun8i_a83t_phy) {
+		if (data->cfg->type == sun8i_a83t_phy ||
+		    data->cfg->type == sun50i_h6_phy) {
 			void __iomem *phyctl = data->base +
 				data->cfg->phyctl_offset;
 
diff --git a/drivers/phy/bcm6318-usbh-phy.c b/drivers/phy/bcm6318-usbh-phy.c
index 2de343de29..d29344ddb4 100644
--- a/drivers/phy/bcm6318-usbh-phy.c
+++ b/drivers/phy/bcm6318-usbh-phy.c
@@ -11,11 +11,14 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* USBH Setup register */
 #define USBH_SETUP_REG		0x00
diff --git a/drivers/phy/bcm6348-usbh-phy.c b/drivers/phy/bcm6348-usbh-phy.c
index ed9f02b375..8d28292726 100644
--- a/drivers/phy/bcm6348-usbh-phy.c
+++ b/drivers/phy/bcm6348-usbh-phy.c
@@ -11,10 +11,12 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <linux/bitops.h>
 
 #define USBH_SETUP_PORT1_EN	BIT(0)
 
diff --git a/drivers/phy/bcm6358-usbh-phy.c b/drivers/phy/bcm6358-usbh-phy.c
index f0fda0290e..501b97f3e2 100644
--- a/drivers/phy/bcm6358-usbh-phy.c
+++ b/drivers/phy/bcm6358-usbh-phy.c
@@ -10,10 +10,12 @@
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <linux/bitops.h>
 
 /* USBH Swap Control register */
 #define USBH_SWAP_REG		0x00
diff --git a/drivers/phy/bcm6368-usbh-phy.c b/drivers/phy/bcm6368-usbh-phy.c
index 53d1f45bb9..99fdd33499 100644
--- a/drivers/phy/bcm6368-usbh-phy.c
+++ b/drivers/phy/bcm6368-usbh-phy.c
@@ -11,11 +11,14 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <dm/device.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* USBH PLL Control register */
 #define USBH_PLL_REG		0x18
diff --git a/drivers/phy/keystone-usb-phy.c b/drivers/phy/keystone-usb-phy.c
index 14ac6bbbb2..9faf501003 100644
--- a/drivers/phy/keystone-usb-phy.c
+++ b/drivers/phy/keystone-usb-phy.c
@@ -6,10 +6,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device.h>
 #include <generic-phy.h>
 #include <asm/io.h>
 #include <asm/arch/psc_defs.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* USB PHY control register offsets */
 #define USB_PHY_CTL_UTMI		0x0000
diff --git a/drivers/phy/marvell/comphy_a3700.c b/drivers/phy/marvell/comphy_a3700.c
index 3b2902f362..dc188c44e0 100644
--- a/drivers/phy/marvell/comphy_a3700.c
+++ b/drivers/phy/marvell/comphy_a3700.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "comphy_a3700.h"
 
diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c
index 244beef18d..27bff27ff7 100644
--- a/drivers/phy/marvell/comphy_core.c
+++ b/drivers/phy/marvell/comphy_core.c
@@ -8,10 +8,11 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/err.h>
 #include <linux/errno.h>
-#include <asm/io.h>
+#include <linux/libfdt.h>
 
 #include "comphy_core.h"
 
diff --git a/drivers/phy/marvell/comphy_cp110.c b/drivers/phy/marvell/comphy_cp110.c
index 9998c07a47..15e80049de 100644
--- a/drivers/phy/marvell/comphy_cp110.c
+++ b/drivers/phy/marvell/comphy_cp110.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/soc.h>
+#include <linux/delay.h>
 
 #include "comphy_core.h"
 #include "comphy_hpipe.h"
diff --git a/drivers/phy/marvell/comphy_mux.c b/drivers/phy/marvell/comphy_mux.c
index c67ba99762..98327557a8 100644
--- a/drivers/phy/marvell/comphy_mux.c
+++ b/drivers/phy/marvell/comphy_mux.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 
 #include "comphy_core.h"
diff --git a/drivers/phy/meson-g12a-usb2.c b/drivers/phy/meson-g12a-usb2.c
index c23bc87d0f..a1e6219758 100644
--- a/drivers/phy/meson-g12a-usb2.c
+++ b/drivers/phy/meson-g12a-usb2.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <bitfield.h>
@@ -15,6 +16,7 @@
 #include <errno.h>
 #include <generic-phy.h>
 #include <regmap.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 #include <reset.h>
 #include <clk.h>
diff --git a/drivers/phy/meson-g12a-usb3-pcie.c b/drivers/phy/meson-g12a-usb3-pcie.c
index 82655f26dd..4e9696fd59 100644
--- a/drivers/phy/meson-g12a-usb3-pcie.c
+++ b/drivers/phy/meson-g12a-usb3-pcie.c
@@ -17,6 +17,7 @@
 #include <reset.h>
 #include <bitfield.h>
 #include <generic-phy.h>
+#include <linux/delay.h>
 
 #include <linux/bitops.h>
 #include <linux/compat.h>
diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c
index 88c2ec69b2..d1beebee43 100644
--- a/drivers/phy/meson-gxbb-usb2.c
+++ b/drivers/phy/meson-gxbb-usb2.c
@@ -15,6 +15,7 @@
 #include <power/regulator.h>
 #include <regmap.h>
 #include <reset.h>
+#include <linux/bitops.h>
 
 #define REG_CONFIG					0x00
 	#define REG_CONFIG_CLK_EN			BIT(0)
diff --git a/drivers/phy/meson-gxl-usb2.c b/drivers/phy/meson-gxl-usb2.c
index b4f4c3c76b..2267bd08c2 100644
--- a/drivers/phy/meson-gxl-usb2.c
+++ b/drivers/phy/meson-gxl-usb2.c
@@ -15,6 +15,7 @@
 #include <errno.h>
 #include <generic-phy.h>
 #include <regmap.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 #include <clk.h>
 #include <linux/usb/otg.h>
diff --git a/drivers/phy/msm8916-usbh-phy.c b/drivers/phy/msm8916-usbh-phy.c
index 2c90738fca..4efaddd701 100644
--- a/drivers/phy/msm8916-usbh-phy.c
+++ b/drivers/phy/msm8916-usbh-phy.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <linux/bitops.h>
 #include <usb/ehci-ci.h>
 #include <usb/ulpi.h>
 #include <asm/io.h>
diff --git a/drivers/phy/mt76x8-usb-phy.c b/drivers/phy/mt76x8-usb-phy.c
index 1e7c5f334b..4c0818f6e8 100644
--- a/drivers/phy/mt76x8-usb-phy.c
+++ b/drivers/phy/mt76x8-usb-phy.c
@@ -10,9 +10,11 @@
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define OFS_U2_PHY_AC0			0x800
 #define USBPLL_FBDIV_S			16
diff --git a/drivers/phy/omap-usb2-phy.c b/drivers/phy/omap-usb2-phy.c
index 160a386801..0793b97dd5 100644
--- a/drivers/phy/omap-usb2-phy.c
+++ b/drivers/phy/omap-usb2-phy.c
@@ -13,6 +13,7 @@
 #include <generic-phy.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT	BIT(0)
diff --git a/drivers/phy/phy-da8xx-usb.c b/drivers/phy/phy-da8xx-usb.c
index 034b47932d..d025188eae 100644
--- a/drivers/phy/phy-da8xx-usb.c
+++ b/drivers/phy/phy-da8xx-usb.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <asm/arch/hardware.h>
diff --git a/drivers/phy/phy-mtk-tphy.c b/drivers/phy/phy-mtk-tphy.c
index bd089b7a43..1e65c24356 100644
--- a/drivers/phy/phy-mtk-tphy.c
+++ b/drivers/phy/phy-mtk-tphy.c
@@ -14,17 +14,85 @@
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <dt-bindings/phy/phy.h>
 
 /* version V1 sub-banks offset base address */
 /* banks shared by multiple phys */
 #define SSUSB_SIFSLV_V1_SPLLC		0x000	/* shared by u3 phys */
+#define SSUSB_SIFSLV_V1_U2FREQ		0x100	/* shared by u2 phys */
 #define SSUSB_SIFSLV_V1_CHIP		0x300	/* shared by u3 phys */
+/* u2 phy bank */
+#define SSUSB_SIFSLV_V1_U2PHY_COM	0x000
 /* u3/pcie/sata phy banks */
 #define SSUSB_SIFSLV_V1_U3PHYD		0x000
 #define SSUSB_SIFSLV_V1_U3PHYA		0x200
 
+/* version V2 sub-banks offset base address */
+/* u2 phy banks */
+#define SSUSB_SIFSLV_V2_MISC		0x000
+#define SSUSB_SIFSLV_V2_U2FREQ		0x100
+#define SSUSB_SIFSLV_V2_U2PHY_COM	0x300
+/* u3/pcie/sata phy banks */
+#define SSUSB_SIFSLV_V2_SPLLC		0x000
+#define SSUSB_SIFSLV_V2_CHIP		0x100
+#define SSUSB_SIFSLV_V2_U3PHYD		0x200
+#define SSUSB_SIFSLV_V2_U3PHYA		0x400
+
+#define U3P_USBPHYACR0			0x000
+#define PA0_RG_U2PLL_FORCE_ON		BIT(15)
+#define PA0_RG_USB20_INTR_EN		BIT(5)
+
+#define U3P_USBPHYACR5			0x014
+#define PA5_RG_U2_HSTX_SRCAL_EN		BIT(15)
+#define PA5_RG_U2_HSTX_SRCTRL		GENMASK(14, 12)
+#define PA5_RG_U2_HSTX_SRCTRL_VAL(x)	((0x7 & (x)) << 12)
+#define PA5_RG_U2_HS_100U_U3_EN		BIT(11)
+
+#define U3P_USBPHYACR6			0x018
+#define PA6_RG_U2_BC11_SW_EN		BIT(23)
+#define PA6_RG_U2_OTG_VBUSCMP_EN	BIT(20)
+#define PA6_RG_U2_SQTH			GENMASK(3, 0)
+#define PA6_RG_U2_SQTH_VAL(x)		(0xf & (x))
+
+#define U3P_U2PHYACR4			0x020
+#define P2C_RG_USB20_GPIO_CTL		BIT(9)
+#define P2C_USB20_GPIO_MODE		BIT(8)
+#define P2C_U2_GPIO_CTR_MSK	\
+		(P2C_RG_USB20_GPIO_CTL | P2C_USB20_GPIO_MODE)
+
+#define U3P_U2PHYDTM0			0x068
+#define P2C_FORCE_UART_EN		BIT(26)
+#define P2C_FORCE_DATAIN		BIT(23)
+#define P2C_FORCE_DM_PULLDOWN		BIT(21)
+#define P2C_FORCE_DP_PULLDOWN		BIT(20)
+#define P2C_FORCE_XCVRSEL		BIT(19)
+#define P2C_FORCE_SUSPENDM		BIT(18)
+#define P2C_FORCE_TERMSEL		BIT(17)
+#define P2C_RG_DATAIN			GENMASK(13, 10)
+#define P2C_RG_DATAIN_VAL(x)		((0xf & (x)) << 10)
+#define P2C_RG_DMPULLDOWN		BIT(7)
+#define P2C_RG_DPPULLDOWN		BIT(6)
+#define P2C_RG_XCVRSEL			GENMASK(5, 4)
+#define P2C_RG_XCVRSEL_VAL(x)		((0x3 & (x)) << 4)
+#define P2C_RG_SUSPENDM			BIT(3)
+#define P2C_RG_TERMSEL			BIT(2)
+#define P2C_DTM0_PART_MASK	\
+		(P2C_FORCE_DATAIN | P2C_FORCE_DM_PULLDOWN | \
+		P2C_FORCE_DP_PULLDOWN | P2C_FORCE_XCVRSEL | \
+		P2C_FORCE_TERMSEL | P2C_RG_DMPULLDOWN | \
+		P2C_RG_DPPULLDOWN | P2C_RG_TERMSEL)
+
+#define U3P_U2PHYDTM1			0x06C
+#define P2C_RG_UART_EN			BIT(16)
+#define P2C_FORCE_IDDIG			BIT(9)
+#define P2C_RG_VBUSVALID		BIT(5)
+#define P2C_RG_SESSEND			BIT(4)
+#define P2C_RG_AVALID			BIT(2)
+#define P2C_RG_IDDIG			BIT(1)
+
 #define U3P_U3_CHIP_GPIO_CTLD		0x0c
 #define P3C_REG_IP_SW_RST		BIT(31)
 #define P3C_MCU_BUS_CK_GATE_EN		BIT(30)
@@ -42,6 +110,14 @@
 #define P3A_RG_CLKDRV_AMP		GENMASK(31, 29)
 #define P3A_RG_CLKDRV_AMP_VAL(x)	((0x7 & (x)) << 29)
 
+#define U3P_U3_PHYA_REG6		0x018
+#define P3A_RG_TX_EIDLE_CM		GENMASK(31, 28)
+#define P3A_RG_TX_EIDLE_CM_VAL(x)	((0xf & (x)) << 28)
+
+#define U3P_U3_PHYA_REG9		0x024
+#define P3A_RG_RX_DAC_MUX		GENMASK(5, 1)
+#define P3A_RG_RX_DAC_MUX_VAL(x)	((0x1f & (x)) << 1)
+
 #define U3P_U3_PHYA_DA_REG0		0x100
 #define P3A_RG_XTAL_EXT_PE2H		GENMASK(17, 16)
 #define P3A_RG_XTAL_EXT_PE2H_VAL(x)	((0x3 & (x)) << 16)
@@ -77,6 +153,16 @@
 #define P3A_RG_PLL_DELTA_PE2H		GENMASK(15, 0)
 #define P3A_RG_PLL_DELTA_PE2H_VAL(x)	(0xffff & (x))
 
+#define U3P_U3_PHYD_LFPS1		0x00c
+#define P3D_RG_FWAKE_TH			GENMASK(21, 16)
+#define P3D_RG_FWAKE_TH_VAL(x)		((0x3f & (x)) << 16)
+
+#define U3P_U3_PHYD_CDR1		0x05c
+#define P3D_RG_CDR_BIR_LTD1		GENMASK(28, 24)
+#define P3D_RG_CDR_BIR_LTD1_VAL(x)	((0x1f & (x)) << 24)
+#define P3D_RG_CDR_BIR_LTD0		GENMASK(12, 8)
+#define P3D_RG_CDR_BIR_LTD0_VAL(x)	((0x1f & (x)) << 8)
+
 #define U3P_U3_PHYD_RXDET1		0x128
 #define P3D_RG_RXDET_STB2_SET		GENMASK(17, 9)
 #define P3D_RG_RXDET_STB2_SET_VAL(x)	((0x1ff & (x)) << 9)
@@ -85,6 +171,21 @@
 #define P3D_RG_RXDET_STB2_SET_P3	GENMASK(8, 0)
 #define P3D_RG_RXDET_STB2_SET_P3_VAL(x)	(0x1ff & (x))
 
+#define U3P_SPLLC_XTALCTL3		0x018
+#define XC3_RG_U3_XTAL_RX_PWD		BIT(9)
+#define XC3_RG_U3_FRC_XTAL_RX_PWD	BIT(8)
+
+enum mtk_phy_version {
+	MTK_TPHY_V1 = 1,
+	MTK_TPHY_V2,
+};
+
+struct u2phy_banks {
+	void __iomem *misc;
+	void __iomem *fmreg;
+	void __iomem *com;
+};
+
 struct u3phy_banks {
 	void __iomem *spllc;
 	void __iomem *chip;
@@ -95,26 +196,136 @@ struct u3phy_banks {
 struct mtk_phy_instance {
 	void __iomem *port_base;
 	const struct device_node *np;
+	union {
+		struct u2phy_banks u2_banks;
+		struct u3phy_banks u3_banks;
+	};
 
-	struct u3phy_banks u3_banks;
-
-	/* reference clock of anolog phy */
-	struct clk ref_clk;
+	struct clk ref_clk;	/* reference clock of (digital) phy */
+	struct clk da_ref_clk;	/* reference clock of analog phy */
 	u32 index;
-	u8 type;
+	u32 type;
 };
 
 struct mtk_tphy {
+	struct udevice *dev;
 	void __iomem *sif_base;
+	enum mtk_phy_version version;
 	struct mtk_phy_instance **phys;
 	int nphys;
 };
 
+static void u2_phy_instance_init(struct mtk_tphy *tphy,
+				 struct mtk_phy_instance *instance)
+{
+	struct u2phy_banks *u2_banks = &instance->u2_banks;
+
+	/* switch to USB function, and enable usb pll */
+	clrsetbits_le32(u2_banks->com + U3P_U2PHYDTM0,
+			P2C_FORCE_UART_EN | P2C_FORCE_SUSPENDM,
+			P2C_RG_XCVRSEL_VAL(1) | P2C_RG_DATAIN_VAL(0));
+
+	clrbits_le32(u2_banks->com + U3P_U2PHYDTM1, P2C_RG_UART_EN);
+	setbits_le32(u2_banks->com + U3P_USBPHYACR0, PA0_RG_USB20_INTR_EN);
+
+	/* disable switch 100uA current to SSUSB */
+	clrbits_le32(u2_banks->com + U3P_USBPHYACR5, PA5_RG_U2_HS_100U_U3_EN);
+
+	clrbits_le32(u2_banks->com + U3P_U2PHYACR4, P2C_U2_GPIO_CTR_MSK);
+
+	/* DP/DM BC1.1 path Disable */
+	clrsetbits_le32(u2_banks->com + U3P_USBPHYACR6,
+			PA6_RG_U2_BC11_SW_EN | PA6_RG_U2_SQTH,
+			PA6_RG_U2_SQTH_VAL(2));
+
+	/* set HS slew rate */
+	clrsetbits_le32(u2_banks->com + U3P_USBPHYACR5,
+			PA5_RG_U2_HSTX_SRCTRL, PA5_RG_U2_HSTX_SRCTRL_VAL(4));
+
+	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);
+}
+
+static void u2_phy_instance_power_on(struct mtk_tphy *tphy,
+				     struct mtk_phy_instance *instance)
+{
+	struct u2phy_banks *u2_banks = &instance->u2_banks;
+
+	clrbits_le32(u2_banks->com + U3P_U2PHYDTM0,
+		     P2C_RG_XCVRSEL | P2C_RG_DATAIN | P2C_DTM0_PART_MASK);
+
+	/* OTG Enable */
+	setbits_le32(u2_banks->com + U3P_USBPHYACR6,
+		     PA6_RG_U2_OTG_VBUSCMP_EN);
+
+	clrsetbits_le32(u2_banks->com + U3P_U2PHYDTM1,
+			P2C_RG_SESSEND, P2C_RG_VBUSVALID | P2C_RG_AVALID);
+
+	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);
+}
+
+static void u2_phy_instance_power_off(struct mtk_tphy *tphy,
+				      struct mtk_phy_instance *instance)
+{
+	struct u2phy_banks *u2_banks = &instance->u2_banks;
+
+	clrbits_le32(u2_banks->com + U3P_U2PHYDTM0,
+		     P2C_RG_XCVRSEL | P2C_RG_DATAIN);
+
+	/* OTG Disable */
+	clrbits_le32(u2_banks->com + U3P_USBPHYACR6,
+		     PA6_RG_U2_OTG_VBUSCMP_EN);
+
+	clrsetbits_le32(u2_banks->com + U3P_U2PHYDTM1,
+			P2C_RG_VBUSVALID | P2C_RG_AVALID, P2C_RG_SESSEND);
+
+	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);
+}
+
+static void u3_phy_instance_init(struct mtk_tphy *tphy,
+				 struct mtk_phy_instance *instance)
+{
+	struct u3phy_banks *u3_banks = &instance->u3_banks;
+
+	/* gating PCIe Analog XTAL clock */
+	setbits_le32(u3_banks->spllc + U3P_SPLLC_XTALCTL3,
+		     XC3_RG_U3_XTAL_RX_PWD | XC3_RG_U3_FRC_XTAL_RX_PWD);
+
+	/* gating XSQ */
+	clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG0,
+			P3A_RG_XTAL_EXT_EN_U3, P3A_RG_XTAL_EXT_EN_U3_VAL(2));
+
+	clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG9,
+			P3A_RG_RX_DAC_MUX, P3A_RG_RX_DAC_MUX_VAL(4));
+
+	clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_REG6,
+			P3A_RG_TX_EIDLE_CM, P3A_RG_TX_EIDLE_CM_VAL(0xe));
+
+	clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_CDR1,
+			P3D_RG_CDR_BIR_LTD0 | P3D_RG_CDR_BIR_LTD1,
+			P3D_RG_CDR_BIR_LTD0_VAL(0xc) |
+			P3D_RG_CDR_BIR_LTD1_VAL(0x3));
+
+	clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_LFPS1,
+			P3D_RG_FWAKE_TH, P3D_RG_FWAKE_TH_VAL(0x34));
+
+	clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET1,
+			P3D_RG_RXDET_STB2_SET, P3D_RG_RXDET_STB2_SET_VAL(0x10));
+
+	clrsetbits_le32(u3_banks->phyd + U3P_U3_PHYD_RXDET2,
+			P3D_RG_RXDET_STB2_SET_P3,
+			P3D_RG_RXDET_STB2_SET_P3_VAL(0x10));
+
+	dev_dbg(tphy->dev, "%s(%d)\n", __func__, instance->index);
+}
+
 static void pcie_phy_instance_init(struct mtk_tphy *tphy,
 				   struct mtk_phy_instance *instance)
 {
 	struct u3phy_banks *u3_banks = &instance->u3_banks;
 
+	if (tphy->version != MTK_TPHY_V1)
+		return;
+
 	clrsetbits_le32(u3_banks->phya + U3P_U3_PHYA_DA_REG0,
 			P3A_RG_XTAL_EXT_PE1H | P3A_RG_XTAL_EXT_PE2H,
 			P3A_RG_XTAL_EXT_PE1H_VAL(0x2) |
@@ -187,9 +398,16 @@ static void pcie_phy_instance_power_off(struct mtk_tphy *tphy,
 static void phy_v1_banks_init(struct mtk_tphy *tphy,
 			      struct mtk_phy_instance *instance)
 {
+	struct u2phy_banks *u2_banks = &instance->u2_banks;
 	struct u3phy_banks *u3_banks = &instance->u3_banks;
 
 	switch (instance->type) {
+	case PHY_TYPE_USB2:
+		u2_banks->misc = NULL;
+		u2_banks->fmreg = tphy->sif_base + SSUSB_SIFSLV_V1_U2FREQ;
+		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V1_U2PHY_COM;
+		break;
+	case PHY_TYPE_USB3:
 	case PHY_TYPE_PCIE:
 		u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
 		u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
@@ -197,6 +415,32 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
 		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
 		break;
 	default:
+		dev_err(tphy->dev, "incompatible PHY type\n");
+		return;
+	}
+}
+
+static void phy_v2_banks_init(struct mtk_tphy *tphy,
+			      struct mtk_phy_instance *instance)
+{
+	struct u2phy_banks *u2_banks = &instance->u2_banks;
+	struct u3phy_banks *u3_banks = &instance->u3_banks;
+
+	switch (instance->type) {
+	case PHY_TYPE_USB2:
+		u2_banks->misc = instance->port_base + SSUSB_SIFSLV_V2_MISC;
+		u2_banks->fmreg = instance->port_base + SSUSB_SIFSLV_V2_U2FREQ;
+		u2_banks->com = instance->port_base + SSUSB_SIFSLV_V2_U2PHY_COM;
+		break;
+	case PHY_TYPE_USB3:
+	case PHY_TYPE_PCIE:
+		u3_banks->spllc = instance->port_base + SSUSB_SIFSLV_V2_SPLLC;
+		u3_banks->chip = instance->port_base + SSUSB_SIFSLV_V2_CHIP;
+		u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V2_U3PHYD;
+		u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V2_U3PHYA;
+		break;
+	default:
+		dev_err(tphy->dev, "incompatible PHY type\n");
 		return;
 	}
 }
@@ -208,14 +452,30 @@ static int mtk_phy_init(struct phy *phy)
 	int ret;
 
 	ret = clk_enable(&instance->ref_clk);
-	if (ret)
+	if (ret < 0) {
+		dev_err(tphy->dev, "failed to enable ref_clk\n");
+		return ret;
+	}
+
+	ret = clk_enable(&instance->da_ref_clk);
+	if (ret < 0) {
+		dev_err(tphy->dev, "failed to enable da_ref_clk %d\n", ret);
+		clk_disable(&instance->ref_clk);
 		return ret;
+	}
 
 	switch (instance->type) {
+	case PHY_TYPE_USB2:
+		u2_phy_instance_init(tphy, instance);
+		break;
+	case PHY_TYPE_USB3:
+		u3_phy_instance_init(tphy, instance);
+		break;
 	case PHY_TYPE_PCIE:
 		pcie_phy_instance_init(tphy, instance);
 		break;
 	default:
+		dev_err(tphy->dev, "incompatible PHY type\n");
 		return -EINVAL;
 	}
 
@@ -227,7 +487,10 @@ static int mtk_phy_power_on(struct phy *phy)
 	struct mtk_tphy *tphy = dev_get_priv(phy->dev);
 	struct mtk_phy_instance *instance = tphy->phys[phy->id];
 
-	pcie_phy_instance_power_on(tphy, instance);
+	if (instance->type == PHY_TYPE_USB2)
+		u2_phy_instance_power_on(tphy, instance);
+	else if (instance->type == PHY_TYPE_PCIE)
+		pcie_phy_instance_power_on(tphy, instance);
 
 	return 0;
 }
@@ -237,7 +500,10 @@ static int mtk_phy_power_off(struct phy *phy)
 	struct mtk_tphy *tphy = dev_get_priv(phy->dev);
 	struct mtk_phy_instance *instance = tphy->phys[phy->id];
 
-	pcie_phy_instance_power_off(tphy, instance);
+	if (instance->type == PHY_TYPE_USB2)
+		u2_phy_instance_power_off(tphy, instance);
+	else if (instance->type == PHY_TYPE_PCIE)
+		pcie_phy_instance_power_off(tphy, instance);
 
 	return 0;
 }
@@ -247,6 +513,7 @@ static int mtk_phy_exit(struct phy *phy)
 	struct mtk_tphy *tphy = dev_get_priv(phy->dev);
 	struct mtk_phy_instance *instance = tphy->phys[phy->id];
 
+	clk_disable(&instance->da_ref_clk);
 	clk_disable(&instance->ref_clk);
 
 	return 0;
@@ -285,13 +552,19 @@ static int mtk_phy_xlate(struct phy *phy,
 	instance->type = args->args[1];
 	if (!(instance->type == PHY_TYPE_USB2 ||
 	      instance->type == PHY_TYPE_USB3 ||
-	      instance->type == PHY_TYPE_PCIE ||
-	      instance->type == PHY_TYPE_SATA)) {
+	      instance->type == PHY_TYPE_PCIE)) {
 		dev_err(phy->dev, "unsupported device type\n");
 		return -EINVAL;
 	}
 
-	phy_v1_banks_init(tphy, instance);
+	if (tphy->version == MTK_TPHY_V1) {
+		phy_v1_banks_init(tphy, instance);
+	} else if (tphy->version == MTK_TPHY_V2) {
+		phy_v2_banks_init(tphy, instance);
+	} else {
+		dev_err(phy->dev, "phy version is not supported\n");
+		return -EINVAL;
+	}
 
 	return 0;
 }
@@ -310,17 +583,22 @@ static int mtk_tphy_probe(struct udevice *dev)
 	ofnode subnode;
 	int index = 0;
 
-	dev_for_each_subnode(subnode, dev)
-		tphy->nphys++;
+	tphy->nphys = dev_get_child_count(dev);
 
 	tphy->phys = devm_kcalloc(dev, tphy->nphys, sizeof(*tphy->phys),
 				  GFP_KERNEL);
 	if (!tphy->phys)
 		return -ENOMEM;
 
-	tphy->sif_base = dev_read_addr_ptr(dev);
-	if (!tphy->sif_base)
-		return -ENOENT;
+	tphy->dev = dev;
+	tphy->version = dev_get_driver_data(dev);
+
+	/* v1 has shared banks */
+	if (tphy->version == MTK_TPHY_V1) {
+		tphy->sif_base = dev_read_addr_ptr(dev);
+		if (!tphy->sif_base)
+			return -ENOENT;
+	}
 
 	dev_for_each_subnode(subnode, dev) {
 		struct mtk_phy_instance *instance;
@@ -345,13 +623,19 @@ static int mtk_tphy_probe(struct udevice *dev)
 					     &instance->ref_clk);
 		if (err)
 			return err;
+
+		err = clk_get_optional_nodev(subnode, "da_ref",
+					     &instance->da_ref_clk);
+		if (err)
+			return err;
 	}
 
 	return 0;
 }
 
 static const struct udevice_id mtk_tphy_id_table[] = {
-	{ .compatible = "mediatek,generic-tphy-v1", },
+	{ .compatible = "mediatek,generic-tphy-v1", .data = MTK_TPHY_V1, },
+	{ .compatible = "mediatek,generic-tphy-v2", .data = MTK_TPHY_V2, },
 	{ }
 };
 
diff --git a/drivers/phy/phy-rcar-gen2.c b/drivers/phy/phy-rcar-gen2.c
index e93130aee6..18da86e4be 100644
--- a/drivers/phy/phy-rcar-gen2.c
+++ b/drivers/phy/phy-rcar-gen2.c
@@ -18,6 +18,7 @@
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 #define USBHS_LPSTS			0x02
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 6ba37213cb..464b0735e8 100644
--- a/drivers/phy/phy-stm32-usbphyc.c
+++ b/drivers/phy/phy-stm32-usbphyc.c
@@ -9,12 +9,14 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <reset.h>
 #include <syscon.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 /* USBPHYC registers */
diff --git a/drivers/phy/phy-ti-am654.c b/drivers/phy/phy-ti-am654.c
index 0b2b2410b2..6907c1afb3 100644
--- a/drivers/phy/phy-ti-am654.c
+++ b/drivers/phy/phy-ti-am654.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <clk-uclass.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
@@ -19,6 +20,8 @@
 #include <power-domain.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 #define CMU_R07C		0x7c
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index e463b0b400..db7f39cd0b 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -6,7 +6,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/devres.h>
 #include <generic-phy.h>
+#include <log.h>
 
 static inline struct phy_ops *phy_dev_ops(struct udevice *dev)
 {
@@ -31,7 +33,7 @@ static int generic_phy_xlate_offs_flags(struct phy *phy,
 	return 0;
 }
 
-int generic_phy_get_by_node(ofnode node, int index, struct phy *phy)
+int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy)
 {
 	struct ofnode_phandle_args args;
 	struct phy_ops *ops;
@@ -93,7 +95,7 @@ err:
 int generic_phy_get_by_index(struct udevice *dev, int index,
 			     struct phy *phy)
 {
-	return generic_phy_get_by_node(dev_ofnode(dev), index, phy);
+	return generic_phy_get_by_index_nodev(dev_ofnode(dev), index, phy);
 }
 
 int generic_phy_get_by_name(struct udevice *dev, const char *phy_name,
@@ -116,7 +118,7 @@ int generic_phy_init(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -127,7 +129,7 @@ int generic_phy_reset(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -138,7 +140,7 @@ int generic_phy_exit(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -149,7 +151,7 @@ int generic_phy_power_on(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
@@ -160,13 +162,109 @@ int generic_phy_power_off(struct phy *phy)
 {
 	struct phy_ops const *ops;
 
-	if (!phy)
+	if (!generic_phy_valid(phy))
 		return 0;
 	ops = phy_dev_ops(phy->dev);
 
 	return ops->power_off ? ops->power_off(phy) : 0;
 }
 
+int generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk)
+{
+	int i, ret, count;
+
+	bulk->count = 0;
+
+	/* Return if no phy declared */
+	if (!dev_read_prop(dev, "phys", NULL))
+		return 0;
+
+	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
+	if (count < 1)
+		return count;
+
+	bulk->phys = devm_kcalloc(dev, count, sizeof(struct phy), GFP_KERNEL);
+	if (!bulk->phys)
+		return -ENOMEM;
+
+	for (i = 0; i < count; i++) {
+		ret = generic_phy_get_by_index(dev, i, &bulk->phys[i]);
+		if (ret) {
+			pr_err("Failed to get PHY%d for %s\n", i, dev->name);
+			return ret;
+		}
+		bulk->count++;
+	}
+
+	return 0;
+}
+
+int generic_phy_init_bulk(struct phy_bulk *bulk)
+{
+	struct phy *phys = bulk->phys;
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = generic_phy_init(&phys[i]);
+		if (ret) {
+			pr_err("Can't init PHY%d\n", i);
+			goto phys_init_err;
+		}
+	}
+
+	return 0;
+
+phys_init_err:
+	for (; i > 0; i--)
+		generic_phy_exit(&phys[i - 1]);
+
+	return ret;
+}
+
+int generic_phy_exit_bulk(struct phy_bulk *bulk)
+{
+	struct phy *phys = bulk->phys;
+	int i, ret = 0;
+
+	for (i = 0; i < bulk->count; i++)
+		ret |= generic_phy_exit(&phys[i]);
+
+	return ret;
+}
+
+int generic_phy_power_on_bulk(struct phy_bulk *bulk)
+{
+	struct phy *phys = bulk->phys;
+	int i, ret;
+
+	for (i = 0; i < bulk->count; i++) {
+		ret = generic_phy_power_on(&phys[i]);
+		if (ret) {
+			pr_err("Can't power on PHY%d\n", i);
+			goto phys_poweron_err;
+		}
+	}
+
+	return 0;
+
+phys_poweron_err:
+	for (; i > 0; i--)
+		generic_phy_power_off(&phys[i - 1]);
+
+	return ret;
+}
+
+int generic_phy_power_off_bulk(struct phy_bulk *bulk)
+{
+	struct phy *phys = bulk->phys;
+	int i, ret = 0;
+
+	for (i = 0; i < bulk->count; i++)
+		ret |= generic_phy_power_off(&phys[i]);
+
+	return ret;
+}
+
 UCLASS_DRIVER(phy) = {
 	.id		= UCLASS_PHY,
 	.name		= "phy",
diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
new file mode 100644
index 0000000000..84cc7c876d
--- /dev/null
+++ b/drivers/phy/rockchip/Kconfig
@@ -0,0 +1,21 @@
+#
+# Phy drivers for Rockchip platforms
+#
+
+menu "Rockchip PHY driver"
+
+config PHY_ROCKCHIP_INNO_USB2
+	bool "Rockchip INNO USB2PHY Driver"
+	depends on ARCH_ROCKCHIP
+	select PHY
+	help
+	  Support for Rockchip USB2.0 PHY with Innosilicon IP block.
+
+config PHY_ROCKCHIP_TYPEC
+	bool "Rockchip TYPEC PHY Driver"
+	depends on ARCH_ROCKCHIP
+	select PHY
+	help
+	  Enable this to support the Rockchip USB TYPEC PHY.
+
+endmenu
diff --git a/drivers/phy/rockchip/Makefile b/drivers/phy/rockchip/Makefile
new file mode 100644
index 0000000000..95b2f8a3c0
--- /dev/null
+++ b/drivers/phy/rockchip/Makefile
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020 Amarula Solutions(India)
+#
+
+obj-$(CONFIG_PHY_ROCKCHIP_INNO_USB2)	+= phy-rockchip-inno-usb2.o
+obj-$(CONFIG_PHY_ROCKCHIP_TYPEC)	+= phy-rockchip-typec.o
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
new file mode 100644
index 0000000000..c5ea6ca31f
--- /dev/null
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -0,0 +1,312 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Rockchip USB2.0 PHY with Innosilicon IP block driver
+ *
+ * Copyright (C) 2016 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (C) 2020 Amarula Solutions(India)
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/lists.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+#include <asm/arch-rockchip/clock.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define usleep_range(a, b) udelay((b))
+#define BIT_WRITEABLE_SHIFT	16
+
+enum rockchip_usb2phy_port_id {
+	USB2PHY_PORT_OTG,
+	USB2PHY_PORT_HOST,
+	USB2PHY_NUM_PORTS,
+};
+
+struct usb2phy_reg {
+	unsigned int	offset;
+	unsigned int	bitend;
+	unsigned int	bitstart;
+	unsigned int	disable;
+	unsigned int	enable;
+};
+
+struct rockchip_usb2phy_port_cfg {
+	struct usb2phy_reg	phy_sus;
+	struct usb2phy_reg	bvalid_det_en;
+	struct usb2phy_reg	bvalid_det_st;
+	struct usb2phy_reg	bvalid_det_clr;
+	struct usb2phy_reg	ls_det_en;
+	struct usb2phy_reg	ls_det_st;
+	struct usb2phy_reg	ls_det_clr;
+	struct usb2phy_reg	utmi_avalid;
+	struct usb2phy_reg	utmi_bvalid;
+	struct usb2phy_reg	utmi_ls;
+	struct usb2phy_reg	utmi_hstdet;
+};
+
+struct rockchip_usb2phy_cfg {
+	unsigned int reg;
+	const struct rockchip_usb2phy_port_cfg port_cfgs[USB2PHY_NUM_PORTS];
+};
+
+struct rockchip_usb2phy {
+	void *reg_base;
+	struct clk phyclk;
+	const struct rockchip_usb2phy_cfg *phy_cfg;
+};
+
+static inline int property_enable(void *reg_base,
+				  const struct usb2phy_reg *reg, bool en)
+{
+	unsigned int val, mask, tmp;
+
+	tmp = en ? reg->enable : reg->disable;
+	mask = GENMASK(reg->bitend, reg->bitstart);
+	val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
+
+	return writel(val, reg_base + reg->offset);
+}
+
+static const
+struct rockchip_usb2phy_port_cfg *us2phy_get_port(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_usb2phy *priv = dev_get_priv(parent);
+	const struct rockchip_usb2phy_cfg *phy_cfg = priv->phy_cfg;
+
+	return &phy_cfg->port_cfgs[phy->id];
+}
+
+static int rockchip_usb2phy_power_on(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_usb2phy *priv = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
+
+	property_enable(priv->reg_base, &port_cfg->phy_sus, false);
+
+	/* waiting for the utmi_clk to become stable */
+	usleep_range(1500, 2000);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_power_off(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_usb2phy *priv = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
+
+	property_enable(priv->reg_base, &port_cfg->phy_sus, true);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_init(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_usb2phy *priv = dev_get_priv(parent);
+	const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
+	int ret;
+
+	ret = clk_enable(&priv->phyclk);
+	if (ret) {
+		dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret);
+		return ret;
+	}
+
+	if (phy->id == USB2PHY_PORT_OTG) {
+		property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true);
+		property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true);
+	} else if (phy->id == USB2PHY_PORT_HOST) {
+		property_enable(priv->reg_base, &port_cfg->bvalid_det_clr, true);
+		property_enable(priv->reg_base, &port_cfg->bvalid_det_en, true);
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_exit(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_usb2phy *priv = dev_get_priv(parent);
+
+	clk_disable(&priv->phyclk);
+
+	return 0;
+}
+
+static int rockchip_usb2phy_of_xlate(struct phy *phy,
+				     struct ofnode_phandle_args *args)
+{
+	const char *name = phy->dev->name;
+
+	if (!strcasecmp(name, "host-port"))
+		phy->id = USB2PHY_PORT_HOST;
+	else if (!strcasecmp(name, "otg-port"))
+		phy->id = USB2PHY_PORT_OTG;
+	else
+		dev_err(phy->dev, "improper %s device\n", name);
+
+	return 0;
+}
+
+static struct phy_ops rockchip_usb2phy_ops = {
+	.init = rockchip_usb2phy_init,
+	.exit = rockchip_usb2phy_exit,
+	.power_on = rockchip_usb2phy_power_on,
+	.power_off = rockchip_usb2phy_power_off,
+	.of_xlate = rockchip_usb2phy_of_xlate,
+};
+
+static int rockchip_usb2phy_probe(struct udevice *dev)
+{
+	struct rockchip_usb2phy *priv = dev_get_priv(dev);
+	const struct rockchip_usb2phy_cfg *phy_cfgs;
+	unsigned int reg;
+	int index, ret;
+
+	priv->reg_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->reg_base))
+		return PTR_ERR(priv->reg_base);
+
+	ret = ofnode_read_u32(dev_ofnode(dev), "reg", &reg);
+	if (ret) {
+		dev_err(dev, "failed to read reg property (ret = %d)\n", ret);
+		return ret;
+	}
+
+	phy_cfgs = (const struct rockchip_usb2phy_cfg *)
+					dev_get_driver_data(dev);
+	if (!phy_cfgs)
+		return -EINVAL;
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			priv->phy_cfg = &phy_cfgs[index];
+			break;
+		}
+
+		++index;
+	}
+
+	if (!priv->phy_cfg) {
+		dev_err(dev, "failed find proper phy-cfg\n");
+		return -EINVAL;
+	}
+
+	ret = clk_get_by_name(dev, "phyclk", &priv->phyclk);
+	if (ret) {
+		dev_err(dev, "failed to get the phyclk (ret=%d)\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_usb2phy_bind(struct udevice *dev)
+{
+	struct udevice *usb2phy_dev;
+	ofnode node;
+	const char *name;
+	int ret = 0;
+
+	dev_for_each_subnode(node, dev) {
+		if (!ofnode_valid(node)) {
+			dev_info(dev, "subnode %s not found\n", dev->name);
+			return -ENXIO;
+		}
+
+		name = ofnode_get_name(node);
+		dev_dbg(dev, "subnode %s\n", name);
+
+		ret = device_bind_driver_to_node(dev, "rockchip_usb2phy_port",
+						 name, node, &usb2phy_dev);
+		if (ret) {
+			dev_err(dev,
+				"'%s' cannot bind 'rockchip_usb2phy_port'\n", name);
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
+static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = {
+	{
+		.reg		= 0xe450,
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus	= { 0xe454, 1, 0, 2, 1 },
+				.bvalid_det_en	= { 0xe3c0, 3, 3, 0, 1 },
+				.bvalid_det_st	= { 0xe3e0, 3, 3, 0, 1 },
+				.bvalid_det_clr	= { 0xe3d0, 3, 3, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 7, 7, 0, 1 },
+				.utmi_bvalid	= { 0xe2ac, 12, 12, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe458, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 6, 6, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 6, 6, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 6, 6, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 22, 21, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 23, 23, 0, 1 }
+			}
+		},
+	},
+	{
+		.reg		= 0xe460,
+		.port_cfgs	= {
+			[USB2PHY_PORT_OTG] = {
+				.phy_sus        = { 0xe464, 1, 0, 2, 1 },
+				.bvalid_det_en  = { 0xe3c0, 8, 8, 0, 1 },
+				.bvalid_det_st  = { 0xe3e0, 8, 8, 0, 1 },
+				.bvalid_det_clr = { 0xe3d0, 8, 8, 0, 1 },
+				.utmi_avalid	= { 0xe2ac, 10, 10, 0, 1 },
+				.utmi_bvalid    = { 0xe2ac, 16, 16, 0, 1 },
+			},
+			[USB2PHY_PORT_HOST] = {
+				.phy_sus	= { 0xe468, 1, 0, 0x2, 0x1 },
+				.ls_det_en	= { 0xe3c0, 11, 11, 0, 1 },
+				.ls_det_st	= { 0xe3e0, 11, 11, 0, 1 },
+				.ls_det_clr	= { 0xe3d0, 11, 11, 0, 1 },
+				.utmi_ls	= { 0xe2ac, 26, 25, 0, 1 },
+				.utmi_hstdet	= { 0xe2ac, 27, 27, 0, 1 }
+			}
+		},
+	},
+	{ /* sentinel */ }
+};
+
+static const struct udevice_id rockchip_usb2phy_ids[] = {
+	{
+		.compatible = "rockchip,rk3399-usb2phy",
+		.data = (ulong)&rk3399_usb2phy_cfgs,
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy_port) = {
+	.name		= "rockchip_usb2phy_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_usb2phy_ops,
+};
+
+U_BOOT_DRIVER(rockchip_usb2phy) = {
+	.name	= "rockchip_usb2phy",
+	.id	= UCLASS_PHY,
+	.of_match = rockchip_usb2phy_ids,
+	.probe = rockchip_usb2phy_probe,
+	.bind = rockchip_usb2phy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_usb2phy),
+};
diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c
new file mode 100644
index 0000000000..c9c8e1c542
--- /dev/null
+++ b/drivers/phy/rockchip/phy-rockchip-typec.c
@@ -0,0 +1,796 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * ROCKCHIP Type-C PHY driver.
+ *
+ * Copyright (C) 2020 Amarula Solutions(India)
+ * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
+ * Author: Chris Zhong <zyw@rock-chips.com>
+ *         Kever Yang <kever.yang@rock-chips.com>
+ */
+
+#include <common.h>
+#include <clk.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/lists.h>
+#include <generic-phy.h>
+#include <reset.h>
+#include <syscon.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+#include <asm/arch-rockchip/clock.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define usleep_range(a, b) udelay((b))
+
+#define CMN_SSM_BANDGAP			(0x21 << 2)
+#define CMN_SSM_BIAS			(0x22 << 2)
+#define CMN_PLLSM0_PLLEN		(0x29 << 2)
+#define CMN_PLLSM0_PLLPRE		(0x2a << 2)
+#define CMN_PLLSM0_PLLVREF		(0x2b << 2)
+#define CMN_PLLSM0_PLLLOCK		(0x2c << 2)
+#define CMN_PLLSM1_PLLEN		(0x31 << 2)
+#define CMN_PLLSM1_PLLPRE		(0x32 << 2)
+#define CMN_PLLSM1_PLLVREF		(0x33 << 2)
+#define CMN_PLLSM1_PLLLOCK		(0x34 << 2)
+#define CMN_PLLSM1_USER_DEF_CTRL	(0x37 << 2)
+#define CMN_ICAL_OVRD			(0xc1 << 2)
+#define CMN_PLL0_VCOCAL_OVRD		(0x83 << 2)
+#define CMN_PLL0_VCOCAL_INIT		(0x84 << 2)
+#define CMN_PLL0_VCOCAL_ITER		(0x85 << 2)
+#define CMN_PLL0_LOCK_REFCNT_START	(0x90 << 2)
+#define CMN_PLL0_LOCK_PLLCNT_START	(0x92 << 2)
+#define CMN_PLL0_LOCK_PLLCNT_THR	(0x93 << 2)
+#define CMN_PLL0_INTDIV			(0x94 << 2)
+#define CMN_PLL0_FRACDIV		(0x95 << 2)
+#define CMN_PLL0_HIGH_THR		(0x96 << 2)
+#define CMN_PLL0_DSM_DIAG		(0x97 << 2)
+#define CMN_PLL0_SS_CTRL1		(0x98 << 2)
+#define CMN_PLL0_SS_CTRL2		(0x99 << 2)
+#define CMN_PLL1_VCOCAL_START		(0xa1 << 2)
+#define CMN_PLL1_VCOCAL_OVRD		(0xa3 << 2)
+#define CMN_PLL1_VCOCAL_INIT		(0xa4 << 2)
+#define CMN_PLL1_VCOCAL_ITER		(0xa5 << 2)
+#define CMN_PLL1_LOCK_REFCNT_START	(0xb0 << 2)
+#define CMN_PLL1_LOCK_PLLCNT_START	(0xb2 << 2)
+#define CMN_PLL1_LOCK_PLLCNT_THR	(0xb3 << 2)
+#define CMN_PLL1_INTDIV			(0xb4 << 2)
+#define CMN_PLL1_FRACDIV		(0xb5 << 2)
+#define CMN_PLL1_HIGH_THR		(0xb6 << 2)
+#define CMN_PLL1_DSM_DIAG		(0xb7 << 2)
+#define CMN_PLL1_SS_CTRL1		(0xb8 << 2)
+#define CMN_PLL1_SS_CTRL2		(0xb9 << 2)
+#define CMN_RXCAL_OVRD			(0xd1 << 2)
+
+#define CMN_TXPUCAL_CTRL		(0xe0 << 2)
+#define CMN_TXPUCAL_OVRD		(0xe1 << 2)
+#define CMN_TXPDCAL_CTRL		(0xf0 << 2)
+#define CMN_TXPDCAL_OVRD		(0xf1 << 2)
+
+/* For CMN_TXPUCAL_CTRL, CMN_TXPDCAL_CTRL */
+#define CMN_TXPXCAL_START		BIT(15)
+#define CMN_TXPXCAL_DONE		BIT(14)
+#define CMN_TXPXCAL_NO_RESPONSE		BIT(13)
+#define CMN_TXPXCAL_CURRENT_RESPONSE	BIT(12)
+
+#define CMN_TXPU_ADJ_CTRL		(0x108 << 2)
+#define CMN_TXPD_ADJ_CTRL		(0x10c << 2)
+
+/*
+ * For CMN_TXPUCAL_CTRL, CMN_TXPDCAL_CTRL,
+ *     CMN_TXPU_ADJ_CTRL, CMN_TXPDCAL_CTRL
+ *
+ * NOTE: some of these registers are documented to be 2's complement
+ * signed numbers, but then documented to be always positive.  Weird.
+ * In such a case, using CMN_CALIB_CODE_POS() avoids the unnecessary
+ * sign extension.
+ */
+#define CMN_CALIB_CODE_WIDTH	7
+#define CMN_CALIB_CODE_OFFSET	0
+#define CMN_CALIB_CODE_MASK	GENMASK(CMN_CALIB_CODE_WIDTH, 0)
+#define CMN_CALIB_CODE(x)	\
+	sign_extend32((x) >> CMN_CALIB_CODE_OFFSET, CMN_CALIB_CODE_WIDTH)
+
+#define CMN_CALIB_CODE_POS_MASK	GENMASK(CMN_CALIB_CODE_WIDTH - 1, 0)
+#define CMN_CALIB_CODE_POS(x)	\
+	(((x) >> CMN_CALIB_CODE_OFFSET) & CMN_CALIB_CODE_POS_MASK)
+
+#define CMN_DIAG_PLL0_FBH_OVRD		(0x1c0 << 2)
+#define CMN_DIAG_PLL0_FBL_OVRD		(0x1c1 << 2)
+#define CMN_DIAG_PLL0_OVRD		(0x1c2 << 2)
+#define CMN_DIAG_PLL0_V2I_TUNE		(0x1c5 << 2)
+#define CMN_DIAG_PLL0_CP_TUNE		(0x1c6 << 2)
+#define CMN_DIAG_PLL0_LF_PROG		(0x1c7 << 2)
+#define CMN_DIAG_PLL1_FBH_OVRD		(0x1d0 << 2)
+#define CMN_DIAG_PLL1_FBL_OVRD		(0x1d1 << 2)
+#define CMN_DIAG_PLL1_OVRD		(0x1d2 << 2)
+#define CMN_DIAG_PLL1_V2I_TUNE		(0x1d5 << 2)
+#define CMN_DIAG_PLL1_CP_TUNE		(0x1d6 << 2)
+#define CMN_DIAG_PLL1_LF_PROG		(0x1d7 << 2)
+#define CMN_DIAG_PLL1_PTATIS_TUNE1	(0x1d8 << 2)
+#define CMN_DIAG_PLL1_PTATIS_TUNE2	(0x1d9 << 2)
+#define CMN_DIAG_PLL1_INCLK_CTRL	(0x1da << 2)
+#define CMN_DIAG_HSCLK_SEL		(0x1e0 << 2)
+
+#define XCVR_PSM_RCTRL(n)		((0x4001 | ((n) << 9)) << 2)
+#define XCVR_PSM_CAL_TMR(n)		((0x4002 | ((n) << 9)) << 2)
+#define XCVR_PSM_A0IN_TMR(n)		((0x4003 | ((n) << 9)) << 2)
+#define TX_TXCC_CAL_SCLR_MULT(n)	((0x4047 | ((n) << 9)) << 2)
+#define TX_TXCC_CPOST_MULT_00(n)	((0x404c | ((n) << 9)) << 2)
+#define TX_TXCC_CPOST_MULT_01(n)	((0x404d | ((n) << 9)) << 2)
+#define TX_TXCC_CPOST_MULT_10(n)	((0x404e | ((n) << 9)) << 2)
+#define TX_TXCC_CPOST_MULT_11(n)	((0x404f | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_000(n)	((0x4050 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_001(n)	((0x4051 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_010(n)	((0x4052 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_011(n)	((0x4053 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_100(n)	((0x4054 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_101(n)	((0x4055 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_110(n)	((0x4056 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNFS_MULT_111(n)	((0x4057 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_000(n)	((0x4058 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_001(n)	((0x4059 | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_010(n)	((0x405a | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_011(n)	((0x405b | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_100(n)	((0x405c | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_101(n)	((0x405d | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_110(n)	((0x405e | ((n) << 9)) << 2)
+#define TX_TXCC_MGNLS_MULT_111(n)	((0x405f | ((n) << 9)) << 2)
+
+#define XCVR_DIAG_PLLDRC_CTRL(n)	((0x40e0 | ((n) << 9)) << 2)
+#define XCVR_DIAG_BIDI_CTRL(n)		((0x40e8 | ((n) << 9)) << 2)
+#define XCVR_DIAG_LANE_FCM_EN_MGN(n)	((0x40f2 | ((n) << 9)) << 2)
+#define TX_PSC_A0(n)			((0x4100 | ((n) << 9)) << 2)
+#define TX_PSC_A1(n)			((0x4101 | ((n) << 9)) << 2)
+#define TX_PSC_A2(n)			((0x4102 | ((n) << 9)) << 2)
+#define TX_PSC_A3(n)			((0x4103 | ((n) << 9)) << 2)
+#define TX_RCVDET_CTRL(n)		((0x4120 | ((n) << 9)) << 2)
+#define TX_RCVDET_EN_TMR(n)		((0x4122 | ((n) << 9)) << 2)
+#define TX_RCVDET_ST_TMR(n)		((0x4123 | ((n) << 9)) << 2)
+#define TX_DIAG_TX_DRV(n)		((0x41e1 | ((n) << 9)) << 2)
+#define TX_DIAG_BGREF_PREDRV_DELAY	(0x41e7 << 2)
+
+/* Use this for "n" in macros like "_MULT_XXX" to target the aux channel */
+#define AUX_CH_LANE			8
+
+#define TX_ANA_CTRL_REG_1		(0x5020 << 2)
+
+#define TXDA_DP_AUX_EN			BIT(15)
+#define AUXDA_SE_EN			BIT(14)
+#define TXDA_CAL_LATCH_EN		BIT(13)
+#define AUXDA_POLARITY			BIT(12)
+#define TXDA_DRV_POWER_ISOLATION_EN	BIT(11)
+#define TXDA_DRV_POWER_EN_PH_2_N	BIT(10)
+#define TXDA_DRV_POWER_EN_PH_1_N	BIT(9)
+#define TXDA_BGREF_EN			BIT(8)
+#define TXDA_DRV_LDO_EN			BIT(7)
+#define TXDA_DECAP_EN_DEL		BIT(6)
+#define TXDA_DECAP_EN			BIT(5)
+#define TXDA_UPHY_SUPPLY_EN_DEL		BIT(4)
+#define TXDA_UPHY_SUPPLY_EN		BIT(3)
+#define TXDA_LOW_LEAKAGE_EN		BIT(2)
+#define TXDA_DRV_IDLE_LOWI_EN		BIT(1)
+#define TXDA_DRV_CMN_MODE_EN		BIT(0)
+
+#define TX_ANA_CTRL_REG_2		(0x5021 << 2)
+
+#define AUXDA_DEBOUNCING_CLK		BIT(15)
+#define TXDA_LPBK_RECOVERED_CLK_EN	BIT(14)
+#define TXDA_LPBK_ISI_GEN_EN		BIT(13)
+#define TXDA_LPBK_SERIAL_EN		BIT(12)
+#define TXDA_LPBK_LINE_EN		BIT(11)
+#define TXDA_DRV_LDO_REDC_SINKIQ	BIT(10)
+#define XCVR_DECAP_EN_DEL		BIT(9)
+#define XCVR_DECAP_EN			BIT(8)
+#define TXDA_MPHY_ENABLE_HS_NT		BIT(7)
+#define TXDA_MPHY_SA_MODE		BIT(6)
+#define TXDA_DRV_LDO_RBYR_FB_EN		BIT(5)
+#define TXDA_DRV_RST_PULL_DOWN		BIT(4)
+#define TXDA_DRV_LDO_BG_FB_EN		BIT(3)
+#define TXDA_DRV_LDO_BG_REF_EN		BIT(2)
+#define TXDA_DRV_PREDRV_EN_DEL		BIT(1)
+#define TXDA_DRV_PREDRV_EN		BIT(0)
+
+#define TXDA_COEFF_CALC_CTRL		(0x5022 << 2)
+
+#define TX_HIGH_Z			BIT(6)
+#define TX_VMARGIN_OFFSET		3
+#define TX_VMARGIN_MASK			0x7
+#define LOW_POWER_SWING_EN		BIT(2)
+#define TX_FCM_DRV_MAIN_EN		BIT(1)
+#define TX_FCM_FULL_MARGIN		BIT(0)
+
+#define TX_DIG_CTRL_REG_2		(0x5024 << 2)
+
+#define TX_HIGH_Z_TM_EN			BIT(15)
+#define TX_RESCAL_CODE_OFFSET		0
+#define TX_RESCAL_CODE_MASK		0x3f
+
+#define TXDA_CYA_AUXDA_CYA		(0x5025 << 2)
+#define TX_ANA_CTRL_REG_3		(0x5026 << 2)
+#define TX_ANA_CTRL_REG_4		(0x5027 << 2)
+#define TX_ANA_CTRL_REG_5		(0x5029 << 2)
+
+#define RX_PSC_A0(n)			((0x8000 | ((n) << 9)) << 2)
+#define RX_PSC_A1(n)			((0x8001 | ((n) << 9)) << 2)
+#define RX_PSC_A2(n)			((0x8002 | ((n) << 9)) << 2)
+#define RX_PSC_A3(n)			((0x8003 | ((n) << 9)) << 2)
+#define RX_PSC_CAL(n)			((0x8006 | ((n) << 9)) << 2)
+#define RX_PSC_RDY(n)			((0x8007 | ((n) << 9)) << 2)
+#define RX_IQPI_ILL_CAL_OVRD		(0x8023 << 2)
+#define RX_EPI_ILL_CAL_OVRD		(0x8033 << 2)
+#define RX_SDCAL0_OVRD			(0x8041 << 2)
+#define RX_SDCAL1_OVRD			(0x8049 << 2)
+#define RX_SLC_INIT			(0x806d << 2)
+#define RX_SLC_RUN			(0x806e << 2)
+#define RX_CDRLF_CNFG2			(0x8081 << 2)
+#define RX_SIGDET_HL_FILT_TMR(n)	((0x8090 | ((n) << 9)) << 2)
+#define RX_SLC_IOP0_OVRD		(0x8101 << 2)
+#define RX_SLC_IOP1_OVRD		(0x8105 << 2)
+#define RX_SLC_QOP0_OVRD		(0x8109 << 2)
+#define RX_SLC_QOP1_OVRD		(0x810d << 2)
+#define RX_SLC_EOP0_OVRD		(0x8111 << 2)
+#define RX_SLC_EOP1_OVRD		(0x8115 << 2)
+#define RX_SLC_ION0_OVRD		(0x8119 << 2)
+#define RX_SLC_ION1_OVRD		(0x811d << 2)
+#define RX_SLC_QON0_OVRD		(0x8121 << 2)
+#define RX_SLC_QON1_OVRD		(0x8125 << 2)
+#define RX_SLC_EON0_OVRD		(0x8129 << 2)
+#define RX_SLC_EON1_OVRD		(0x812d << 2)
+#define RX_SLC_IEP0_OVRD		(0x8131 << 2)
+#define RX_SLC_IEP1_OVRD		(0x8135 << 2)
+#define RX_SLC_QEP0_OVRD		(0x8139 << 2)
+#define RX_SLC_QEP1_OVRD		(0x813d << 2)
+#define RX_SLC_EEP0_OVRD		(0x8141 << 2)
+#define RX_SLC_EEP1_OVRD		(0x8145 << 2)
+#define RX_SLC_IEN0_OVRD		(0x8149 << 2)
+#define RX_SLC_IEN1_OVRD		(0x814d << 2)
+#define RX_SLC_QEN0_OVRD		(0x8151 << 2)
+#define RX_SLC_QEN1_OVRD		(0x8155 << 2)
+#define RX_SLC_EEN0_OVRD		(0x8159 << 2)
+#define RX_SLC_EEN1_OVRD		(0x815d << 2)
+#define RX_REE_CTRL_DATA_MASK(n)	((0x81bb | ((n) << 9)) << 2)
+#define RX_DIAG_SIGDET_TUNE(n)		((0x81dc | ((n) << 9)) << 2)
+#define RX_DIAG_SC2C_DELAY		(0x81e1 << 2)
+
+#define PMA_LANE_CFG			(0xc000 << 2)
+#define PIPE_CMN_CTRL1			(0xc001 << 2)
+#define PIPE_CMN_CTRL2			(0xc002 << 2)
+#define PIPE_COM_LOCK_CFG1		(0xc003 << 2)
+#define PIPE_COM_LOCK_CFG2		(0xc004 << 2)
+#define PIPE_RCV_DET_INH		(0xc005 << 2)
+#define DP_MODE_CTL			(0xc008 << 2)
+#define DP_CLK_CTL			(0xc009 << 2)
+#define STS				(0xc00F << 2)
+#define PHY_ISO_CMN_CTRL		(0xc010 << 2)
+#define PHY_DP_TX_CTL			(0xc408 << 2)
+#define PMA_CMN_CTRL1			(0xc800 << 2)
+#define PHY_PMA_ISO_CMN_CTRL		(0xc810 << 2)
+#define PHY_ISOLATION_CTRL		(0xc81f << 2)
+#define PHY_PMA_ISO_XCVR_CTRL(n)	((0xcc11 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_LINK_MODE(n)	((0xcc12 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_PWRST_CTRL(n)	((0xcc13 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_TX_DATA_LO(n)	((0xcc14 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_TX_DATA_HI(n)	((0xcc15 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_RX_DATA_LO(n)	((0xcc16 | ((n) << 6)) << 2)
+#define PHY_PMA_ISO_RX_DATA_HI(n)	((0xcc17 | ((n) << 6)) << 2)
+#define TX_BIST_CTRL(n)			((0x4140 | ((n) << 9)) << 2)
+#define TX_BIST_UDDWR(n)		((0x4141 | ((n) << 9)) << 2)
+
+/*
+ * Selects which PLL clock will be driven on the analog high speed
+ * clock 0: PLL 0 div 1
+ * clock 1: PLL 1 div 2
+ */
+#define CLK_PLL_CONFIG			0X30
+#define CLK_PLL_MASK			0x33
+
+#define CMN_READY			BIT(0)
+
+#define DP_PLL_CLOCK_ENABLE		BIT(2)
+#define DP_PLL_ENABLE			BIT(0)
+#define DP_PLL_DATA_RATE_RBR		((2 << 12) | (4 << 8))
+#define DP_PLL_DATA_RATE_HBR		((2 << 12) | (4 << 8))
+#define DP_PLL_DATA_RATE_HBR2		((1 << 12) | (2 << 8))
+
+#define DP_MODE_A0			BIT(4)
+#define DP_MODE_A2			BIT(6)
+#define DP_MODE_ENTER_A0		0xc101
+#define DP_MODE_ENTER_A2		0xc104
+
+#define PHY_MODE_SET_TIMEOUT		100000
+
+#define PIN_ASSIGN_C_E			0x51d9
+#define PIN_ASSIGN_D_F			0x5100
+
+#define MODE_DISCONNECT			0
+#define MODE_UFP_USB			BIT(0)
+#define MODE_DFP_USB			BIT(1)
+#define MODE_DFP_DP			BIT(2)
+
+struct usb3phy_reg {
+	u32 offset;
+	u32 enable_bit;
+	u32 write_enable;
+};
+
+/**
+ * struct rockchip_usb3phy_port_cfg: usb3-phy port configuration.
+ * @reg: the base address for usb3-phy config.
+ * @typec_conn_dir: the register of type-c connector direction.
+ * @usb3tousb2_en: the register of type-c force usb2 to usb2 enable.
+ * @external_psm: the register of type-c phy external psm clock.
+ * @pipe_status: the register of type-c phy pipe status.
+ * @usb3_host_disable: the register of type-c usb3 host disable.
+ * @usb3_host_port: the register of type-c usb3 host port.
+ * @uphy_dp_sel: the register of type-c phy DP select control.
+ */
+struct rockchip_usb3phy_port_cfg {
+	unsigned int reg;
+	struct usb3phy_reg typec_conn_dir;
+	struct usb3phy_reg usb3tousb2_en;
+	struct usb3phy_reg external_psm;
+	struct usb3phy_reg pipe_status;
+	struct usb3phy_reg usb3_host_disable;
+	struct usb3phy_reg usb3_host_port;
+	struct usb3phy_reg uphy_dp_sel;
+};
+
+struct rockchip_tcphy {
+	void __iomem *reg_base;
+	void __iomem *grf_base;
+	struct clk clk_core;
+	struct clk clk_ref;
+	struct reset_ctl uphy_rst;
+	struct reset_ctl pipe_rst;
+	struct reset_ctl tcphy_rst;
+	const struct rockchip_usb3phy_port_cfg *port_cfgs;
+	u8 mode;
+};
+
+struct phy_reg {
+	u16 value;
+	u32 addr;
+};
+
+static struct phy_reg usb3_pll_cfg[] = {
+	{ 0xf0,		CMN_PLL0_VCOCAL_INIT },
+	{ 0x18,		CMN_PLL0_VCOCAL_ITER },
+	{ 0xd0,		CMN_PLL0_INTDIV },
+	{ 0x4a4a,	CMN_PLL0_FRACDIV },
+	{ 0x34,		CMN_PLL0_HIGH_THR },
+	{ 0x1ee,	CMN_PLL0_SS_CTRL1 },
+	{ 0x7f03,	CMN_PLL0_SS_CTRL2 },
+	{ 0x20,		CMN_PLL0_DSM_DIAG },
+	{ 0,		CMN_DIAG_PLL0_OVRD },
+	{ 0,		CMN_DIAG_PLL0_FBH_OVRD },
+	{ 0,		CMN_DIAG_PLL0_FBL_OVRD },
+	{ 0x7,		CMN_DIAG_PLL0_V2I_TUNE },
+	{ 0x45,		CMN_DIAG_PLL0_CP_TUNE },
+	{ 0x8,		CMN_DIAG_PLL0_LF_PROG },
+};
+
+static inline int property_enable(struct rockchip_tcphy *priv,
+				  const struct usb3phy_reg *reg, bool en)
+{
+	u32 mask = 1 << reg->write_enable;
+	u32 val = en << reg->enable_bit;
+
+	return writel(val | mask, priv->grf_base + reg->offset);
+}
+
+static int rockchip_tcphy_get_mode(struct rockchip_tcphy *priv)
+{
+	/* TODO: Add proper logic to find DP or USB3 mode */
+	return MODE_DFP_USB | MODE_UFP_USB;
+}
+
+static void rockchip_tcphy_cfg_24m(struct rockchip_tcphy *priv)
+{
+	u32 i, rdata;
+
+	/*
+	 * cmn_ref_clk_sel = 3, select the 24Mhz for clk parent
+	 * cmn_psm_clk_dig_div = 2, set the clk division to 2
+	 */
+	writel(0x830, priv->reg_base + PMA_CMN_CTRL1);
+	for (i = 0; i < 4; i++) {
+		/*
+		 * The following PHY configuration assumes a 24 MHz reference
+		 * clock.
+		 */
+		writel(0x90, priv->reg_base + XCVR_DIAG_LANE_FCM_EN_MGN(i));
+		writel(0x960, priv->reg_base + TX_RCVDET_EN_TMR(i));
+		writel(0x30, priv->reg_base + TX_RCVDET_ST_TMR(i));
+	}
+
+	rdata = readl(priv->reg_base + CMN_DIAG_HSCLK_SEL);
+	rdata &= ~CLK_PLL_MASK;
+	rdata |= CLK_PLL_CONFIG;
+	writel(rdata, priv->reg_base + CMN_DIAG_HSCLK_SEL);
+}
+
+static void rockchip_tcphy_cfg_usb3_pll(struct rockchip_tcphy *priv)
+{
+	u32 i;
+
+	/* load the configuration of PLL0 */
+	for (i = 0; i < ARRAY_SIZE(usb3_pll_cfg); i++)
+		writel(usb3_pll_cfg[i].value,
+		       priv->reg_base + usb3_pll_cfg[i].addr);
+}
+
+static void rockchip_tcphy_tx_usb3_cfg_lane(struct rockchip_tcphy *priv,
+					    u32 lane)
+{
+	writel(0x7799, priv->reg_base + TX_PSC_A0(lane));
+	writel(0x7798, priv->reg_base + TX_PSC_A1(lane));
+	writel(0x5098, priv->reg_base + TX_PSC_A2(lane));
+	writel(0x5098, priv->reg_base + TX_PSC_A3(lane));
+	writel(0, priv->reg_base + TX_TXCC_MGNFS_MULT_000(lane));
+	writel(0xbf, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane));
+}
+
+static void rockchip_tcphy_rx_usb3_cfg_lane(struct rockchip_tcphy *priv,
+					    u32 lane)
+{
+	writel(0xa6fd, priv->reg_base + RX_PSC_A0(lane));
+	writel(0xa6fd, priv->reg_base + RX_PSC_A1(lane));
+	writel(0xa410, priv->reg_base + RX_PSC_A2(lane));
+	writel(0x2410, priv->reg_base + RX_PSC_A3(lane));
+	writel(0x23ff, priv->reg_base + RX_PSC_CAL(lane));
+	writel(0x13, priv->reg_base + RX_SIGDET_HL_FILT_TMR(lane));
+	writel(0x03e7, priv->reg_base + RX_REE_CTRL_DATA_MASK(lane));
+	writel(0x1004, priv->reg_base + RX_DIAG_SIGDET_TUNE(lane));
+	writel(0x2010, priv->reg_base + RX_PSC_RDY(lane));
+	writel(0xfb, priv->reg_base + XCVR_DIAG_BIDI_CTRL(lane));
+}
+
+static int rockchip_tcphy_init(struct rockchip_tcphy *priv)
+{
+	const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
+	u32 val;
+	int ret;
+
+	ret = clk_enable(&priv->clk_core);
+	if (ret) {
+		dev_err(phy->dev, "failed to enable core clk (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = clk_enable(&priv->clk_ref);
+	if (ret) {
+		dev_err(phy->dev, "failed to enable ref clk (ret=%d)\n", ret);
+		goto err_clk_core;
+	}
+
+	ret = reset_deassert(&priv->tcphy_rst);
+	if (ret) {
+		dev_err(phy->dev, "failed to deassert uphy-tcphy reset (ret=%d)\n",
+			ret);
+		goto err_clk_ref;
+	}
+
+	property_enable(priv, &cfg->typec_conn_dir, 0);
+
+	rockchip_tcphy_cfg_24m(priv);
+
+	rockchip_tcphy_cfg_usb3_pll(priv);
+
+	rockchip_tcphy_tx_usb3_cfg_lane(priv, 0);
+	rockchip_tcphy_rx_usb3_cfg_lane(priv, 1);
+
+	ret = reset_deassert(&priv->uphy_rst);
+	if (ret) {
+		dev_err(phy->dev, "failed to deassert uphy rst (ret=%d)\n",
+			ret);
+		goto err_tcphy_rst;
+	}
+
+	ret = readl_poll_sleep_timeout(priv->reg_base + PMA_CMN_CTRL1,
+				       val, val & CMN_READY, 10,
+				       PHY_MODE_SET_TIMEOUT);
+	if (ret < 0) {
+		dev_err(phy->dev, "PMA Timeout!\n");
+		ret = -ETIMEDOUT;
+		goto err_uphy_rst;
+	}
+
+	ret = reset_deassert(&priv->pipe_rst);
+	if (ret) {
+		dev_err(phy->dev, "failed to deassert pipe rst (ret=%d)\n",
+			ret);
+		goto err_uphy_rst;
+	}
+
+	return 0;
+
+err_uphy_rst:
+	reset_assert(&priv->uphy_rst);
+err_tcphy_rst:
+	reset_assert(&priv->tcphy_rst);
+err_clk_ref:
+	clk_disable(&priv->clk_ref);
+err_clk_core:
+	clk_disable(&priv->clk_core);
+	return ret;
+}
+
+static void rockchip_tcphy_exit(struct rockchip_tcphy *priv)
+{
+	reset_assert(&priv->tcphy_rst);
+	reset_assert(&priv->uphy_rst);
+	reset_assert(&priv->pipe_rst);
+	clk_disable(&priv->clk_core);
+	clk_disable(&priv->clk_ref);
+}
+
+static int tcphy_cfg_usb3_to_usb2_only(struct rockchip_tcphy *priv,
+				       bool value)
+{
+	const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
+
+	property_enable(priv, &cfg->usb3tousb2_en, value);
+	property_enable(priv, &cfg->usb3_host_disable, value);
+	property_enable(priv, &cfg->usb3_host_port, !value);
+
+	return 0;
+}
+
+static int rockchip_usb3_phy_power_on(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_tcphy *priv = dev_get_priv(parent);
+	const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
+	const struct usb3phy_reg *reg = &cfg->pipe_status;
+	int timeout, new_mode;
+	u32 val;
+	int ret;
+
+	new_mode = rockchip_tcphy_get_mode(priv);
+	if (new_mode < 0) {
+		dev_err(phy->dev, "invalid mode %d\n", new_mode);
+		return new_mode;
+	}
+
+	if (priv->mode == new_mode)
+		return 0;
+
+	if (priv->mode == MODE_DISCONNECT) {
+		ret = rockchip_tcphy_init(priv);
+		if (ret) {
+			dev_err(dev, "failed to init tcphy (ret=%d)\n", ret);
+			return ret;
+		}
+	}
+
+	/* wait TCPHY for pipe ready */
+	for (timeout = 0; timeout < 100; timeout++) {
+		val = readl(priv->grf_base + reg->offset);
+		if (!(val & BIT(reg->enable_bit))) {
+			priv->mode |= new_mode & (MODE_DFP_USB | MODE_UFP_USB);
+
+			/* enable usb3 host */
+			tcphy_cfg_usb3_to_usb2_only(priv, false);
+			return 0;
+		}
+		usleep_range(10, 20);
+	}
+
+	if (priv->mode == MODE_DISCONNECT)
+		rockchip_tcphy_exit(priv);
+
+	return -ETIMEDOUT;
+}
+
+static int rockchip_usb3_phy_power_off(struct phy *phy)
+{
+	struct udevice *parent = dev_get_parent(phy->dev);
+	struct rockchip_tcphy *priv = dev_get_priv(parent);
+
+	tcphy_cfg_usb3_to_usb2_only(priv, false);
+
+	if (priv->mode == MODE_DISCONNECT)
+		goto exit;
+
+	priv->mode &= ~(MODE_UFP_USB | MODE_DFP_USB);
+	if (priv->mode == MODE_DISCONNECT)
+		rockchip_tcphy_exit(priv);
+
+exit:
+	return 0;
+}
+
+static struct phy_ops rockchip_tcphy_usb3_ops = {
+	.power_on = rockchip_usb3_phy_power_on,
+	.power_off = rockchip_usb3_phy_power_off,
+};
+
+static void rockchip_tcphy_pre_init(struct udevice *dev)
+{
+	struct rockchip_tcphy *priv = dev_get_priv(dev);
+	const struct rockchip_usb3phy_port_cfg *cfg = priv->port_cfgs;
+
+	reset_assert(&priv->tcphy_rst);
+	reset_assert(&priv->uphy_rst);
+	reset_assert(&priv->pipe_rst);
+
+	/* select external psm clock */
+	property_enable(priv, &cfg->external_psm, 1);
+	property_enable(priv, &cfg->usb3tousb2_en, 0);
+
+	priv->mode = MODE_DISCONNECT;
+}
+
+static int rockchip_tcphy_parse_dt(struct udevice *dev)
+{
+	struct rockchip_tcphy *priv = dev_get_priv(dev);
+	int ret;
+
+	priv->grf_base = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
+	if (IS_ERR(priv->grf_base))
+		return PTR_ERR(priv->grf_base);
+
+	ret = clk_get_by_name(dev, "tcpdcore", &priv->clk_core);
+	if (ret) {
+		dev_err(dev, "failed to get tcpdcore clk (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = clk_get_by_name(dev, "tcpdphy-ref", &priv->clk_ref);
+	if (ret) {
+		dev_err(dev, "failed to get tcpdphy-ref clk (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "uphy", &priv->uphy_rst);
+	if (ret) {
+		dev_err(dev, "failed to get uphy reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "uphy-pipe", &priv->pipe_rst);
+	if (ret) {
+		dev_err(dev, "failed to get uphy-pipe reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	ret = reset_get_by_name(dev, "uphy-tcphy", &priv->tcphy_rst);
+	if (ret) {
+		dev_err(dev, "failed to get uphy-tcphy reset (ret=%d)\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int rockchip_tcphy_probe(struct udevice *dev)
+{
+	struct rockchip_tcphy *priv = dev_get_priv(dev);
+	const struct rockchip_usb3phy_port_cfg *phy_cfgs;
+	unsigned int reg;
+	int index, ret;
+
+	priv->reg_base = (void __iomem *)dev_read_addr(dev);
+	if (IS_ERR(priv->reg_base))
+		return PTR_ERR(priv->reg_base);
+
+	ret = dev_read_u32_index(dev, "reg", 1, &reg);
+	if (ret) {
+		dev_err(dev, "failed to read reg property (ret = %d)\n", ret);
+		return ret;
+	}
+
+	phy_cfgs = (const struct rockchip_usb3phy_port_cfg *)
+					dev_get_driver_data(dev);
+	if (!phy_cfgs)
+		return -EINVAL;
+
+	/* find out a proper config which can be matched with dt. */
+	index = 0;
+	while (phy_cfgs[index].reg) {
+		if (phy_cfgs[index].reg == reg) {
+			priv->port_cfgs = &phy_cfgs[index];
+			break;
+		}
+
+		++index;
+	}
+
+	if (!priv->port_cfgs) {
+		dev_err(dev, "failed find proper phy-cfg\n");
+		return -EINVAL;
+	}
+
+	ret = rockchip_tcphy_parse_dt(dev);
+	if (ret)
+		return ret;
+
+	rockchip_tcphy_pre_init(dev);
+
+	return 0;
+}
+
+static int rockchip_tcphy_bind(struct udevice *dev)
+{
+	struct udevice *tcphy_dev;
+	ofnode node;
+	const char *name;
+	int ret = 0;
+
+	dev_for_each_subnode(node, dev) {
+		if (!ofnode_valid(node)) {
+			dev_info(dev, "subnode %s not found\n", dev->name);
+			return -ENXIO;
+		}
+
+		name = ofnode_get_name(node);
+		dev_dbg(dev, "subnode %s\n", name);
+
+		if (!strcasecmp(name, "dp-port")) {
+			dev_dbg(dev, "Warning: dp-port not supported yet!\n");
+			continue;
+		} else if (!strcasecmp(name, "usb3-port")) {
+			ret = device_bind_driver_to_node(dev,
+							 "rockchip_tcphy_usb3_port",
+							 name, node, &tcphy_dev);
+			if (ret) {
+				dev_err(dev,
+					"'%s' cannot bind 'rockchip_tcphy_usb3_port'\n",
+					name);
+				return ret;
+			}
+		}
+	}
+
+	return ret;
+}
+
+static const struct rockchip_usb3phy_port_cfg rk3399_typec_phy_cfgs[] = {
+	{
+		.reg			= 0xff7c0000,
+		.typec_conn_dir		= { 0xe580, 0, 16 },
+		.usb3tousb2_en		= { 0xe580, 3, 19 },
+		.external_psm		= { 0xe588, 14, 30 },
+		.pipe_status		= { 0xe5c0, 0, 0 },
+		.usb3_host_disable	= { 0x2434, 0, 16 },
+		.usb3_host_port		= { 0x2434, 12, 28 },
+		.uphy_dp_sel		= { 0x6268, 19, 19 },
+	},
+	{
+		.reg			= 0xff800000,
+		.typec_conn_dir		= { 0xe58c, 0, 16 },
+		.usb3tousb2_en		= { 0xe58c, 3, 19 },
+		.external_psm		= { 0xe594, 14, 30 },
+		.pipe_status		= { 0xe5c0, 16, 16 },
+		.usb3_host_disable	= { 0x2444, 0, 16 },
+		.usb3_host_port		= { 0x2444, 12, 28 },
+		.uphy_dp_sel		= { 0x6268, 3, 19 },
+	},
+	{ /* sentinel */ }
+};
+
+static const struct udevice_id rockchip_typec_phy_ids[] = {
+	{
+		.compatible = "rockchip,rk3399-typec-phy",
+		.data = (ulong)&rk3399_typec_phy_cfgs,
+	},
+	{ /* sentinel */ }
+};
+
+U_BOOT_DRIVER(rockchip_tcphy_usb3_port) = {
+	.name		= "rockchip_tcphy_usb3_port",
+	.id		= UCLASS_PHY,
+	.ops		= &rockchip_tcphy_usb3_ops,
+};
+
+U_BOOT_DRIVER(rockchip_typec_phy) = {
+	.name	= "rockchip_typec_phy",
+	.id	= UCLASS_PHY,
+	.of_match = rockchip_typec_phy_ids,
+	.probe = rockchip_tcphy_probe,
+	.bind = rockchip_tcphy_bind,
+	.priv_auto_alloc_size = sizeof(struct rockchip_tcphy),
+};
diff --git a/drivers/phy/sti_usb_phy.c b/drivers/phy/sti_usb_phy.c
index ec597da84e..2a20f7601c 100644
--- a/drivers/phy/sti_usb_phy.c
+++ b/drivers/phy/sti_usb_phy.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <bitfield.h>
 #include <dm.h>
diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c
index 7fc36319cb..3f49851bca 100644
--- a/drivers/phy/ti-pipe3-phy.c
+++ b/drivers/phy/ti-pipe3-phy.c
@@ -12,6 +12,8 @@
 #include <asm/arch/sys_proto.h>
 #include <syscon.h>
 #include <regmap.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 /* PLLCTRL Registers */
diff --git a/drivers/pinctrl/aspeed/pinctrl_ast2500.c b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
index a6e9c0d933..05ef24864f 100644
--- a/drivers/pinctrl/aspeed/pinctrl_ast2500.c
+++ b/drivers/pinctrl/aspeed/pinctrl_ast2500.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/pinctrl.h>
 #include <asm/arch/scu_ast2500.h>
diff --git a/drivers/pinctrl/ath79/pinctrl_ar933x.c b/drivers/pinctrl/ath79/pinctrl_ar933x.c
index 5e154a9f19..a0625d7c83 100644
--- a/drivers/pinctrl/ath79/pinctrl_ar933x.c
+++ b/drivers/pinctrl/ath79/pinctrl_ar933x.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/pinctrl.h>
 #include <mach/ar71xx_regs.h>
diff --git a/drivers/pinctrl/ath79/pinctrl_qca953x.c b/drivers/pinctrl/ath79/pinctrl_qca953x.c
index 3166167d71..c9f9608c92 100644
--- a/drivers/pinctrl/ath79/pinctrl_qca953x.c
+++ b/drivers/pinctrl/ath79/pinctrl_qca953x.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/pinctrl.h>
 #include <mach/ar71xx_regs.h>
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
index eb720f09f8..f44af6cf9a 100644
--- a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
+++ b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
@@ -14,6 +14,7 @@
 #include <config.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
 #include <dm/device-internal.h>
diff --git a/drivers/pinctrl/intel/pinctrl.c b/drivers/pinctrl/intel/pinctrl.c
index e280054f94..ba8206350e 100644
--- a/drivers/pinctrl/intel/pinctrl.c
+++ b/drivers/pinctrl/intel/pinctrl.c
@@ -19,6 +19,7 @@
 #include <common.h>
 #include <dm.h>
 #include <irq.h>
+#include <log.h>
 #include <malloc.h>
 #include <p2sb.h>
 #include <spl.h>
diff --git a/drivers/pinctrl/intel/pinctrl_apl.c b/drivers/pinctrl/intel/pinctrl_apl.c
index bd80435ffa..c14176d4a7 100644
--- a/drivers/pinctrl/intel/pinctrl_apl.c
+++ b/drivers/pinctrl/intel/pinctrl_apl.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <log.h>
 #include <p2sb.h>
 #include <asm/intel_pinctrl.h>
 #include <asm-generic/gpio.h>
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
index c7351f32bb..5fdc150295 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
@@ -11,6 +11,7 @@
 #include <dm/pinctrl.h>
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-mtk-common.h"
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
index b5d74068c5..c6cb941d0a 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-axg-pmx.c
@@ -4,6 +4,7 @@
  * Copyright (C) 2017 Xingyu Chen <xingyu.chen@amlogic.com>
  */
 
+#include <log.h>
 #include <asm/gpio.h>
 #include <common.h>
 #include <dm.h>
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
index b37b517fe5..159f3406a2 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gx-pmx.c
@@ -3,10 +3,12 @@
  * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com>
  */
 
+#include <log.h>
 #include <asm/gpio.h>
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include "pinctrl-meson-gx.h"
 
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c
index 7fbe2810a2..d4539b02d8 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -5,14 +5,17 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
 #include <fdt_support.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/libfdt.h>
 #include <linux/sizes.h>
 #include <asm/gpio.h>
 
diff --git a/drivers/pinctrl/mscc/mscc-common.c b/drivers/pinctrl/mscc/mscc-common.c
index 90c54b45c3..307ed1db87 100644
--- a/drivers/pinctrl/mscc/mscc-common.c
+++ b/drivers/pinctrl/mscc/mscc-common.c
@@ -21,6 +21,7 @@
 #include <dm/root.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include "mscc-common.h"
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 6e0bcae991..2dee79af17 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -32,6 +32,8 @@
 #include <asm/gpio.h>
 #include <asm/system.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/pinctrl/mvebu/pinctrl-mvebu.c b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
index 0b9c9e1d6a..2206e958ec 100644
--- a/drivers/pinctrl/mvebu/pinctrl-mvebu.c
+++ b/drivers/pinctrl/mvebu/pinctrl-mvebu.c
@@ -9,11 +9,13 @@
 #include <fdtdec.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <dm/root.h>
 #include <asm/system.h>
 #include <asm/io.h>
 #include <asm/arch-armada8k/soc-info.h>
+#include <linux/bitops.h>
 #include "pinctrl-mvebu.h"
 
 #define AP_EMMC_PHY_CTRL_REG		0x100
diff --git a/drivers/pinctrl/nxp/pinctrl-imx.c b/drivers/pinctrl/nxp/pinctrl-imx.c
index 474c38a049..48c7bde375 100644
--- a/drivers/pinctrl/nxp/pinctrl-imx.c
+++ b/drivers/pinctrl/nxp/pinctrl-imx.c
@@ -8,6 +8,7 @@
 #include <mapmem.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <dm.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-mxs.c b/drivers/pinctrl/nxp/pinctrl-mxs.c
index 8d61dfe863..a403114f21 100644
--- a/drivers/pinctrl/nxp/pinctrl-mxs.c
+++ b/drivers/pinctrl/nxp/pinctrl-mxs.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/io.h>
diff --git a/drivers/pinctrl/nxp/pinctrl-scu.c b/drivers/pinctrl/nxp/pinctrl-scu.c
index aa11075e0a..c032be782a 100644
--- a/drivers/pinctrl/nxp/pinctrl-scu.c
+++ b/drivers/pinctrl/nxp/pinctrl-scu.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright 2018 NXP
+ * Copyright 2018-2019 NXP
  */
 
 #include <common.h>
@@ -29,6 +29,11 @@ static int imx_pinconf_scu_set(struct imx_pinctrl_soc_info *info, u32 pad,
 	 * to handle that in scfw, so config it in pad conf func
 	 */
 
+	if (!sc_rm_is_pad_owned(-1, pad)) {
+		debug("Pad[%u] is not owned by curr partition\n", pad);
+		return -EPERM;
+	}
+
 	val |= PADRING_IFMUX_EN_MASK;
 	val |= PADRING_GP_EN_MASK;
 	val |= (mux << PADRING_IFMUX_SHIFT) & PADRING_IFMUX_MASK;
@@ -57,7 +62,7 @@ int imx_pinctrl_scu_conf_pins(struct imx_pinctrl_soc_info *info, u32 *pin_data,
 		config_val = pin_data[j++];
 
 		ret = imx_pinconf_scu_set(info, pin_id, mux, config_val);
-		if (ret)
+		if (ret && ret != -EPERM)
 			printf("Set pin %d, mux %d, val %d, error\n", pin_id,
 			       mux, config_val);
 	}
diff --git a/drivers/pinctrl/pinctrl-at91-pio4.c b/drivers/pinctrl/pinctrl-at91-pio4.c
index 0c43686e01..801d14253c 100644
--- a/drivers/pinctrl/pinctrl-at91-pio4.c
+++ b/drivers/pinctrl/pinctrl-at91-pio4.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <mach/atmel_pio4.h>
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index 27f274ff02..b3fa124cfb 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -8,8 +8,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <asm/hardware.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <mach/at91_pio.h>
diff --git a/drivers/pinctrl/pinctrl-sandbox.c b/drivers/pinctrl/pinctrl-sandbox.c
index 3ee75fbbee..ac0119d198 100644
--- a/drivers/pinctrl/pinctrl-sandbox.c
+++ b/drivers/pinctrl/pinctrl-sandbox.c
@@ -7,7 +7,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 
 static const char * const sandbox_pins[] = {
 	"SCL",
diff --git a/drivers/pinctrl/pinctrl-sti.c b/drivers/pinctrl/pinctrl-sti.c
index f0cd845fea..8e942a8280 100644
--- a/drivers/pinctrl/pinctrl-sti.c
+++ b/drivers/pinctrl/pinctrl-sti.c
@@ -14,6 +14,8 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <dm/pinctrl.h>
+#include <linux/bug.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/pinctrl/pinctrl-stmfx.c b/drivers/pinctrl/pinctrl-stmfx.c
index b0e43ae0a1..a3240ccd5a 100644
--- a/drivers/pinctrl/pinctrl-stmfx.c
+++ b/drivers/pinctrl/pinctrl-stmfx.c
@@ -15,6 +15,8 @@
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 /* STMFX pins = GPIO[15:0] + aGPIO[7:0] */
diff --git a/drivers/pinctrl/pinctrl_pic32.c b/drivers/pinctrl/pinctrl_pic32.c
index 06f1518c78..911af1297b 100644
--- a/drivers/pinctrl/pinctrl_pic32.c
+++ b/drivers/pinctrl/pinctrl_pic32.c
@@ -7,8 +7,10 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <mach/pic32.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 9926235b52..fc241fdcde 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -1,6 +1,7 @@
 #include <common.h>
 #include <dm.h>
 #include <hwspinlock.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/arch/gpio.h>
 #include <asm/gpio.h>
@@ -8,7 +9,9 @@
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/pinctrl/renesas/pfc-r7s72100.c b/drivers/pinctrl/renesas/pfc-r7s72100.c
index 7e4530d684..5055780bf7 100644
--- a/drivers/pinctrl/renesas/pfc-r7s72100.c
+++ b/drivers/pinctrl/renesas/pfc-r7s72100.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/err.h>
 
diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c
index 5313f2f509..de22e49ebe 100644
--- a/drivers/pinctrl/renesas/pfc-r8a77990.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
@@ -15,6 +15,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/kernel.h>
 
 #include "sh_pfc.h"
diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index ab64f4f0c8..1179afd2e7 100644
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -17,6 +17,8 @@
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
 
diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index 1cfb881e58..db3d513358 100644
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -672,4 +672,5 @@ extern const struct sh_pfc_soc_info r8a77995_pinmux_info;
  */
 #define RCAR_GP_PIN(bank, pin)		(((bank) * 32) + (pin))
 
+#include <linux/bug.h>
 #endif /* __SH_PFC_H */
diff --git a/drivers/pinctrl/rockchip/pinctrl-px30.c b/drivers/pinctrl/rockchip/pinctrl-px30.c
index bb56ae9fb3..617721a626 100644
--- a/drivers/pinctrl/rockchip/pinctrl-px30.c
+++ b/drivers/pinctrl/rockchip/pinctrl-px30.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3036.c b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
index 28c905129b..d49e3007ce 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3036.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3036.c
@@ -8,6 +8,7 @@
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3128.c b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
index 3eb4d952bb..a175d6c07f 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3128.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3128.c
@@ -8,6 +8,7 @@
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3188.c b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
index 043764fc92..afde809854 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3188.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3188.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk322x.c b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
index c5e4fe30a7..85bc0ef0f3 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk322x.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk322x.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
index 7ae147f304..faaa2ce1f7 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c
@@ -5,8 +5,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3308.c b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
index abd57e54a5..db2b10a690 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3308.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3308.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3328.c b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
index 8d37a6f945..f9160f26c7 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3328.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3328.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3368.c b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
index 6cb7bb45d9..7a6059959e 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3368.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3368.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3399.c b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
index 75634e9f4d..d04c1afb09 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rk3399.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rk3399.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
index 0fd0416b18..ec1cb9b652 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip-core.c
@@ -5,10 +5,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/libfdt.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/rockchip/pinctrl-rockchip.h b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
index 5edc7cbd74..d969c20082 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rockchip.h
+++ b/drivers/pinctrl/rockchip/pinctrl-rockchip.h
@@ -6,6 +6,7 @@
 #ifndef __DRIVERS_PINCTRL_ROCKCHIP_H
 #define __DRIVERS_PINCTRL_ROCKCHIP_H
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 
 /**
diff --git a/drivers/pinctrl/rockchip/pinctrl-rv1108.c b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
index 54610a3e90..22334329ed 100644
--- a/drivers/pinctrl/rockchip/pinctrl-rv1108.c
+++ b/drivers/pinctrl/rockchip/pinctrl-rv1108.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/pinctrl.h>
 #include <regmap.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 
 #include "pinctrl-rockchip.h"
 
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
index abeba965c4..8545b9d070 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/io.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
index 8f83ecae7d..5951835d6e 100644
--- a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
+++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
@@ -8,6 +8,7 @@
 #define __PINCTRL_UNIPHIER_H__
 
 #include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/build_bug.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
diff --git a/drivers/power/acpi_pmc/pmc_emul.c b/drivers/power/acpi_pmc/pmc_emul.c
index dfff335e54..5ed6fcca26 100644
--- a/drivers/power/acpi_pmc/pmc_emul.c
+++ b/drivers/power/acpi_pmc/pmc_emul.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pci.h>
 #include <asm/test.h>
 #include <power/acpi_pmc.h>
diff --git a/drivers/power/acpi_pmc/sandbox.c b/drivers/power/acpi_pmc/sandbox.c
index 7fbbf97b45..48a6c663bd 100644
--- a/drivers/power/acpi_pmc/sandbox.c
+++ b/drivers/power/acpi_pmc/sandbox.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/io.h>
 #include <power/acpi_pmc.h>
 
diff --git a/drivers/power/axp152.c b/drivers/power/axp152.c
index 361be6c31c..d6e36125c1 100644
--- a/drivers/power/axp152.c
+++ b/drivers/power/axp152.c
@@ -79,7 +79,7 @@ int axp_init(void)
 	return 0;
 }
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pmic_bus_write(AXP152_SHUTDOWN, AXP152_POWEROFF);
 
diff --git a/drivers/power/axp209.c b/drivers/power/axp209.c
index 67b420910c..ade531940b 100644
--- a/drivers/power/axp209.c
+++ b/drivers/power/axp209.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <asm/arch/pmic_bus.h>
 #include <axp_pmic.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_AXP_ALDO3_VOLT_SLOPE_08
 #  define AXP209_VRC_SLOPE AXP209_VRC_LDO3_800uV_uS
@@ -229,7 +230,7 @@ int axp_init(void)
 	return 0;
 }
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pmic_bus_write(AXP209_SHUTDOWN, AXP209_POWEROFF);
 
diff --git a/drivers/power/axp221.c b/drivers/power/axp221.c
index c440047d36..3446fe7365 100644
--- a/drivers/power/axp221.c
+++ b/drivers/power/axp221.c
@@ -264,7 +264,7 @@ int axp_get_sid(unsigned int *sid)
 	return 0;
 }
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pmic_bus_write(AXP221_SHUTDOWN, AXP221_SHUTDOWN_POWEROFF);
 
diff --git a/drivers/power/axp809.c b/drivers/power/axp809.c
index 7de92f4f61..6323492b66 100644
--- a/drivers/power/axp809.c
+++ b/drivers/power/axp809.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <errno.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pmic_bus.h>
@@ -219,7 +220,7 @@ int axp_init(void)
 	return pmic_bus_init();
 }
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pmic_bus_write(AXP809_SHUTDOWN, AXP809_SHUTDOWN_POWEROFF);
 
diff --git a/drivers/power/axp818.c b/drivers/power/axp818.c
index 834919ddd4..0531707c8a 100644
--- a/drivers/power/axp818.c
+++ b/drivers/power/axp818.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <errno.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/pmic_bus.h>
@@ -255,7 +256,7 @@ int axp_init(void)
 	return 0;
 }
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	pmic_bus_write(AXP818_SHUTDOWN, AXP818_SHUTDOWN_POWEROFF);
 
diff --git a/drivers/power/battery/bat_trats.c b/drivers/power/battery/bat_trats.c
index 450b1dfa28..54b2bf91e5 100644
--- a/drivers/power/battery/bat_trats.c
+++ b/drivers/power/battery/bat_trats.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <console.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/battery.h>
 #include <power/max8997_pmic.h>
diff --git a/drivers/power/battery/bat_trats2.c b/drivers/power/battery/bat_trats2.c
index bb21cd7ff8..1172970d1e 100644
--- a/drivers/power/battery/bat_trats2.c
+++ b/drivers/power/battery/bat_trats2.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/battery.h>
 #include <power/max77693_pmic.h>
diff --git a/drivers/power/domain/bcm6328-power-domain.c b/drivers/power/domain/bcm6328-power-domain.c
index a6426bee27..a494bfa8c9 100644
--- a/drivers/power/domain/bcm6328-power-domain.c
+++ b/drivers/power/domain/bcm6328-power-domain.c
@@ -8,6 +8,7 @@
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MAX_DOMAINS	32
 
diff --git a/drivers/power/domain/imx8-power-domain-legacy.c b/drivers/power/domain/imx8-power-domain-legacy.c
index 6f01a60b34..889b65a47f 100644
--- a/drivers/power/domain/imx8-power-domain-legacy.c
+++ b/drivers/power/domain/imx8-power-domain-legacy.c
@@ -5,12 +5,14 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <asm/io.h>
 #include <asm/arch/power-domain.h>
 #include <dm/device-internal.h>
 #include <dm/device.h>
+#include <dm/uclass-internal.h>
 #include <asm/arch/sci/sci.h>
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -19,6 +21,68 @@ struct imx8_power_domain_priv {
 	bool state_on;
 };
 
+static bool check_device_power_off(struct udevice *dev,
+				   const char *permanent_on_devices[],
+				   int size)
+{
+	int i;
+
+	for (i = 0; i < size; i++) {
+		if (!strcmp(dev->name, permanent_on_devices[i]))
+			return false;
+	}
+
+	return true;
+}
+
+void imx8_power_off_pd_devices(const char *permanent_on_devices[], int size)
+{
+	struct udevice *dev;
+	struct power_domain pd;
+
+	for (uclass_find_first_device(UCLASS_POWER_DOMAIN, &dev); dev;
+	     uclass_find_next_device(&dev)) {
+		if (!device_active(dev))
+			continue;
+		/*
+		 * Power off active pd devices except the permanent
+		 * power on devices
+		 */
+		if (check_device_power_off(dev, permanent_on_devices, size)) {
+			pd.dev = dev;
+			power_domain_off(&pd);
+		}
+	}
+}
+
+int imx8_power_domain_lookup_name(const char *name,
+				  struct power_domain *power_domain)
+{
+	struct udevice *dev;
+	struct power_domain_ops *ops;
+	int ret;
+
+	debug("%s(power_domain=%p name=%s)\n", __func__, power_domain, name);
+
+	ret = uclass_get_device_by_name(UCLASS_POWER_DOMAIN, name, &dev);
+	if (ret) {
+		printf("%s fail: %s, ret = %d\n", __func__, name, ret);
+		return ret;
+	}
+
+	ops = (struct power_domain_ops *)dev->driver->ops;
+	power_domain->dev = dev;
+	ret = ops->request(power_domain);
+	if (ret) {
+		debug("ops->request() failed: %d\n", ret);
+		return ret;
+	}
+
+	debug("%s ok: %s\n", __func__, dev->name);
+
+	return 0;
+}
+
 static int imx8_power_domain_request(struct power_domain *power_domain)
 {
 	debug("%s(power_domain=%p)\n", __func__, power_domain);
@@ -62,7 +126,10 @@ static int imx8_power_domain_on(struct power_domain *power_domain)
 	if (ppriv->state_on)
 		return 0;
 
-	if (pdata->resource_id != SC_R_LAST) {
+	if (pdata->resource_id != SC_R_NONE) {
+		if (!sc_rm_is_resource_owned(-1, pdata->resource_id))
+			printf("%s [%d] not owned by curr partition\n", dev->name, pdata->resource_id);
+
 		ret = sc_pm_set_resource_power_mode(-1, pdata->resource_id,
 						    SC_PM_PW_MODE_ON);
 		if (ret) {
@@ -108,14 +175,14 @@ static int imx8_power_domain_off_node(struct power_domain *power_domain)
 		}
 	}
 
-	if (pdata->resource_id != SC_R_LAST) {
-		if (!sc_rm_is_resource_owned(-1, pdata->resource_id)) {
-			printf("%s not owned by curr partition\n", dev->name);
-			return 0;
-		}
+	if (pdata->resource_id != SC_R_NONE) {
 		ret = sc_pm_set_resource_power_mode(-1, pdata->resource_id,
 						    SC_PM_PW_MODE_OFF);
 		if (ret) {
+			if (!sc_rm_is_resource_owned(-1, pdata->resource_id)) {
+				printf("%s not owned by curr partition %d\n", dev->name, pdata->resource_id);
+				return 0;
+			}
 			printf("Error: %s Power off failed! (error = %d)\n",
 			       dev->name, ret);
 			return -EIO;
@@ -171,7 +238,7 @@ static int imx8_power_domain_off_parentnodes(struct power_domain *power_domain)
 		}
 
 		/* power off parent */
-		if (pdata->resource_id != SC_R_LAST) {
+		if (pdata->resource_id != SC_R_NONE) {
 			ret = sc_pm_set_resource_power_mode(-1,
 							    pdata->resource_id,
 							    SC_PM_PW_MODE_OFF);
@@ -313,4 +380,5 @@ U_BOOT_DRIVER(imx8_power_domain) = {
 	.platdata_auto_alloc_size = sizeof(struct imx8_power_domain_platdata),
 	.priv_auto_alloc_size = sizeof(struct imx8_power_domain_priv),
 	.ops = &imx8_power_domain_ops,
+	.flags	= DM_FLAG_DEFAULT_PD_CTRL_OFF,
 };
diff --git a/drivers/power/domain/imx8-power-domain.c b/drivers/power/domain/imx8-power-domain.c
index 571146e19d..6461ab23d6 100644
--- a/drivers/power/domain/imx8-power-domain.c
+++ b/drivers/power/domain/imx8-power-domain.c
@@ -6,6 +6,7 @@
 #define DEBUG
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <asm/arch/power-domain.h>
diff --git a/drivers/power/domain/meson-ee-pwrc.c b/drivers/power/domain/meson-ee-pwrc.c
index 7082c80bfa..8349a9c158 100644
--- a/drivers/power/domain/meson-ee-pwrc.c
+++ b/drivers/power/domain/meson-ee-pwrc.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <regmap.h>
@@ -14,6 +15,8 @@
 #include <clk.h>
 #include <dt-bindings/power/meson-g12a-power.h>
 #include <dt-bindings/power/meson-sm1-power.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 /* AO Offsets */
diff --git a/drivers/power/domain/meson-gx-pwrc-vpu.c b/drivers/power/domain/meson-gx-pwrc-vpu.c
index 12cdfcdd1f..a41b230448 100644
--- a/drivers/power/domain/meson-gx-pwrc-vpu.c
+++ b/drivers/power/domain/meson-gx-pwrc-vpu.c
@@ -8,12 +8,15 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <reset.h>
 #include <clk.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 enum {
diff --git a/drivers/power/domain/mtk-power-domain.c b/drivers/power/domain/mtk-power-domain.c
index 3ff7ca1bef..fae4749012 100644
--- a/drivers/power/domain/mtk-power-domain.c
+++ b/drivers/power/domain/mtk-power-domain.c
@@ -13,6 +13,7 @@
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/processor.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/iopoll.h>
 
diff --git a/drivers/power/domain/power-domain-uclass.c b/drivers/power/domain/power-domain-uclass.c
index 2b7a1cb8fe..c2c7c3bd50 100644
--- a/drivers/power/domain/power-domain-uclass.c
+++ b/drivers/power/domain/power-domain-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain.h>
 #include <power-domain-uclass.h>
diff --git a/drivers/power/domain/sandbox-power-domain.c b/drivers/power/domain/sandbox-power-domain.c
index 3a834a9f1e..4d9a2006e6 100644
--- a/drivers/power/domain/sandbox-power-domain.c
+++ b/drivers/power/domain/sandbox-power-domain.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <asm/io.h>
diff --git a/drivers/power/domain/tegra186-power-domain.c b/drivers/power/domain/tegra186-power-domain.c
index e87244197f..707735cf85 100644
--- a/drivers/power/domain/tegra186-power-domain.c
+++ b/drivers/power/domain/tegra186-power-domain.c
@@ -5,10 +5,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <misc.h>
 #include <power-domain-uclass.h>
 #include <asm/arch-tegra/bpmp_abi.h>
+#include <linux/bitops.h>
 
 #define UPDATE	BIT(0)
 #define ON	BIT(1)
diff --git a/drivers/power/domain/ti-sci-power-domain.c b/drivers/power/domain/ti-sci-power-domain.c
index a5866703ae..7ee121dfb2 100644
--- a/drivers/power/domain/ti-sci-power-domain.c
+++ b/drivers/power/domain/ti-sci-power-domain.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <power-domain-uclass.h>
 #include <dm/device_compat.h>
diff --git a/drivers/power/exynos-tmu.c b/drivers/power/exynos-tmu.c
index 6a662677a7..4fba7b527c 100644
--- a/drivers/power/exynos-tmu.c
+++ b/drivers/power/exynos-tmu.c
@@ -20,6 +20,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <tmu.h>
 #include <asm/arch/tmu.h>
 #include <asm/arch/power.h>
diff --git a/drivers/power/fuel_gauge/fg_max17042.c b/drivers/power/fuel_gauge/fg_max17042.c
index 8cfdf654f7..a395d587a8 100644
--- a/drivers/power/fuel_gauge/fg_max17042.c
+++ b/drivers/power/fuel_gauge/fg_max17042.c
@@ -5,6 +5,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/max17042_fg.h>
 #include <i2c.h>
diff --git a/drivers/power/mfd/fg_max77693.c b/drivers/power/mfd/fg_max77693.c
index 0de9ee712d..983a6d4a2b 100644
--- a/drivers/power/mfd/fg_max77693.c
+++ b/drivers/power/mfd/fg_max77693.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/max77693_fg.h>
 #include <i2c.h>
diff --git a/drivers/power/mfd/muic_max77693.c b/drivers/power/mfd/muic_max77693.c
index 0eb26d29d4..36ee44b9a2 100644
--- a/drivers/power/mfd/muic_max77693.c
+++ b/drivers/power/mfd/muic_max77693.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/power_chrg.h>
 #include <power/max77693_muic.h>
diff --git a/drivers/power/mfd/pmic_max77693.c b/drivers/power/mfd/pmic_max77693.c
index c3bd6c4990..e32a9722a4 100644
--- a/drivers/power/mfd/pmic_max77693.c
+++ b/drivers/power/mfd/pmic_max77693.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/max77693_pmic.h>
 #include <i2c.h>
diff --git a/drivers/power/mt6323.c b/drivers/power/mt6323.c
index 566be5f39e..354817a037 100644
--- a/drivers/power/mt6323.c
+++ b/drivers/power/mt6323.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <command.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define PWRAP_BASE		0x1000d000
 #define PWRAP_WACS2_CMD		0x9c
@@ -17,7 +18,7 @@
 #define RTC_BBPU_KEY		(0x43 << 8)
 #define RTC_WRTGR		0x003c
 
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	u32 addr, val;
 
diff --git a/drivers/power/pmic/act8846.c b/drivers/power/pmic/act8846.c
index 186fa907e1..8f0f5a6d96 100644
--- a/drivers/power/pmic/act8846.c
+++ b/drivers/power/pmic/act8846.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <power/act8846_pmic.h>
 #include <power/pmic.h>
diff --git a/drivers/power/pmic/as3722.c b/drivers/power/pmic/as3722.c
index 54adcbf50f..3aa3cce945 100644
--- a/drivers/power/pmic/as3722.c
+++ b/drivers/power/pmic/as3722.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <dm/lists.h>
 #include <power/as3722.h>
 #include <power/pmic.h>
diff --git a/drivers/power/pmic/bd71837.c b/drivers/power/pmic/bd71837.c
index 2e04298273..31c9139c64 100644
--- a/drivers/power/pmic/bd71837.c
+++ b/drivers/power/pmic/bd71837.c
@@ -7,6 +7,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/bd71837.h>
diff --git a/drivers/power/pmic/da9063.c b/drivers/power/pmic/da9063.c
index abda7a5a40..25101d18f7 100644
--- a/drivers/power/pmic/da9063.c
+++ b/drivers/power/pmic/da9063.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/da9063_pmic.h>
diff --git a/drivers/power/pmic/fan53555.c b/drivers/power/pmic/fan53555.c
index a5f855ce2a..4d1e686d27 100644
--- a/drivers/power/pmic/fan53555.c
+++ b/drivers/power/pmic/fan53555.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
diff --git a/drivers/power/pmic/i2c_pmic_emul.c b/drivers/power/pmic/i2c_pmic_emul.c
index 86d7b89b1f..404fe008fe 100644
--- a/drivers/power/pmic/i2c_pmic_emul.c
+++ b/drivers/power/pmic/i2c_pmic_emul.c
@@ -8,6 +8,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <malloc.h>
 #include <power/pmic.h>
 #include <power/sandbox_pmic.h>
diff --git a/drivers/power/pmic/lp873x.c b/drivers/power/pmic/lp873x.c
index 4ae4043b94..2b1260ec6b 100644
--- a/drivers/power/pmic/lp873x.c
+++ b/drivers/power/pmic/lp873x.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/lp873x.h>
diff --git a/drivers/power/pmic/lp87565.c b/drivers/power/pmic/lp87565.c
index 3e5fc608d2..f4a4bd03d7 100644
--- a/drivers/power/pmic/lp87565.c
+++ b/drivers/power/pmic/lp87565.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/lp87565.h>
diff --git a/drivers/power/pmic/max77686.c b/drivers/power/pmic/max77686.c
index 8e3a8cf870..9f02c0b6f6 100644
--- a/drivers/power/pmic/max77686.c
+++ b/drivers/power/pmic/max77686.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/max77686_pmic.h>
diff --git a/drivers/power/pmic/muic_max8997.c b/drivers/power/pmic/muic_max8997.c
index 241ab35b63..969ce90239 100644
--- a/drivers/power/pmic/muic_max8997.c
+++ b/drivers/power/pmic/muic_max8997.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/power_chrg.h>
 #include <power/max8997_muic.h>
diff --git a/drivers/power/pmic/palmas.c b/drivers/power/pmic/palmas.c
index 36be119b6c..6080cbff0b 100644
--- a/drivers/power/pmic/palmas.c
+++ b/drivers/power/pmic/palmas.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/palmas.h>
diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c
index 77986c47d7..0c9d9a366e 100644
--- a/drivers/power/pmic/pca9450.c
+++ b/drivers/power/pmic/pca9450.c
@@ -8,6 +8,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/pca9450.h>
diff --git a/drivers/power/pmic/pfuze100.c b/drivers/power/pmic/pfuze100.c
index db630f3ad0..65c4456977 100644
--- a/drivers/power/pmic/pfuze100.c
+++ b/drivers/power/pmic/pfuze100.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/pfuze100_pmic.h>
diff --git a/drivers/power/pmic/pmic-uclass.c b/drivers/power/pmic/pmic-uclass.c
index db68c766f5..7770171917 100644
--- a/drivers/power/pmic/pmic-uclass.c
+++ b/drivers/power/pmic/pmic-uclass.c
@@ -8,6 +8,7 @@
 #include <fdtdec.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <vsprintf.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
diff --git a/drivers/power/pmic/pmic_hi6553.c b/drivers/power/pmic/pmic_hi6553.c
index 6443c9ffc9..80b9078cf8 100644
--- a/drivers/power/pmic/pmic_hi6553.c
+++ b/drivers/power/pmic/pmic_hi6553.c
@@ -5,6 +5,7 @@
  */
 #include <asm/io.h>
 #include <common.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/max8997_muic.h>
 #include <power/hi6553_pmic.h>
diff --git a/drivers/power/pmic/pmic_max8997.c b/drivers/power/pmic/pmic_max8997.c
index 87c438ea04..1d834ff713 100644
--- a/drivers/power/pmic/pmic_max8997.c
+++ b/drivers/power/pmic/pmic_max8997.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/max8997_pmic.h>
 #include <i2c.h>
diff --git a/drivers/power/pmic/pmic_tps65910_dm.c b/drivers/power/pmic/pmic_tps65910_dm.c
index 489af59b41..e03ddc98d7 100644
--- a/drivers/power/pmic/pmic_tps65910_dm.c
+++ b/drivers/power/pmic/pmic_tps65910_dm.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/tps65910_pmic.h>
diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 52e6d9d8c0..195884bde9 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <power/rk8xx_pmic.h>
 #include <power/pmic.h>
 
diff --git a/drivers/power/pmic/rn5t567.c b/drivers/power/pmic/rn5t567.c
index f238396d36..d9a8298ebb 100644
--- a/drivers/power/pmic/rn5t567.c
+++ b/drivers/power/pmic/rn5t567.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <power/rn5t567_pmic.h>
 #include <power/pmic.h>
diff --git a/drivers/power/pmic/s2mps11.c b/drivers/power/pmic/s2mps11.c
index f2aab6c457..1ba1640a8d 100644
--- a/drivers/power/pmic/s2mps11.c
+++ b/drivers/power/pmic/s2mps11.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/s2mps11.h>
 
diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c
index b5ddd4930e..db6d0357ee 100644
--- a/drivers/power/pmic/s5m8767.c
+++ b/drivers/power/pmic/s5m8767.c
@@ -8,6 +8,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/s5m8767.h>
diff --git a/drivers/power/pmic/tps65090.c b/drivers/power/pmic/tps65090.c
index 5b1d19f3e0..b81df0dff1 100644
--- a/drivers/power/pmic/tps65090.c
+++ b/drivers/power/pmic/tps65090.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/tps65090.h>
 
diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c
index 7b3416ae6e..3dfc1918d5 100644
--- a/drivers/power/pmic/tps65941.c
+++ b/drivers/power/pmic/tps65941.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/tps65941.h>
diff --git a/drivers/power/power_core.c b/drivers/power/power_core.c
index 095d8a51be..eeed8e24a9 100644
--- a/drivers/power/power_core.c
+++ b/drivers/power/power_core.c
@@ -10,6 +10,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/types.h>
 #include <linux/list.h>
@@ -120,7 +122,8 @@ static void pmic_list_names(void)
 	}
 }
 
-static int do_pmic(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_pmic(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	u32 ret, reg, val;
 	char *cmd, *name;
diff --git a/drivers/power/power_dialog.c b/drivers/power/power_dialog.c
index 9ecd358100..e286dd108f 100644
--- a/drivers/power/power_dialog.c
+++ b/drivers/power/power_dialog.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <dialog_pmic.h>
 #include <errno.h>
diff --git a/drivers/power/power_i2c.c b/drivers/power/power_i2c.c
index b30f223a5c..5a0455e119 100644
--- a/drivers/power/power_i2c.c
+++ b/drivers/power/power_i2c.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/types.h>
 #include <power/pmic.h>
 #include <i2c.h>
diff --git a/drivers/power/regulator/as3722_regulator.c b/drivers/power/regulator/as3722_regulator.c
index a0703c9e05..0fee9bf00b 100644
--- a/drivers/power/regulator/as3722_regulator.c
+++ b/drivers/power/regulator/as3722_regulator.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <power/as3722.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/bd71837.c b/drivers/power/regulator/bd71837.c
index 575429aa2d..931d753e34 100644
--- a/drivers/power/regulator/bd71837.c
+++ b/drivers/power/regulator/bd71837.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/bitops.h>
 #include <power/bd71837.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/da9063.c b/drivers/power/regulator/da9063.c
index 8990be113e..5055e39cb7 100644
--- a/drivers/power/regulator/da9063.c
+++ b/drivers/power/regulator/da9063.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <linux/bitops.h>
 #include <power/da9063_pmic.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/fan53555.c b/drivers/power/regulator/fan53555.c
index 24a9b67586..b407f555fe 100644
--- a/drivers/power/regulator/fan53555.c
+++ b/drivers/power/regulator/fan53555.c
@@ -9,7 +9,9 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
 #include <power/fan53555.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/fixed.c b/drivers/power/regulator/fixed.c
index 763e671d54..f9f9659621 100644
--- a/drivers/power/regulator/fixed.c
+++ b/drivers/power/regulator/fixed.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 
diff --git a/drivers/power/regulator/gpio-regulator.c b/drivers/power/regulator/gpio-regulator.c
index ec1dcb64b3..cf3fbae79d 100644
--- a/drivers/power/regulator/gpio-regulator.c
+++ b/drivers/power/regulator/gpio-regulator.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <asm/gpio.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/lp87565_regulator.c b/drivers/power/regulator/lp87565_regulator.c
index f438dea8fc..4ea6c346d7 100644
--- a/drivers/power/regulator/lp87565_regulator.c
+++ b/drivers/power/regulator/lp87565_regulator.c
@@ -11,6 +11,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/lp87565.h>
diff --git a/drivers/power/regulator/pbias_regulator.c b/drivers/power/regulator/pbias_regulator.c
index 60255eeab0..28a9a1470b 100644
--- a/drivers/power/regulator/pbias_regulator.c
+++ b/drivers/power/regulator/pbias_regulator.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/pfuze100.c b/drivers/power/regulator/pfuze100.c
index d6d35f3a39..b56843046f 100644
--- a/drivers/power/regulator/pfuze100.c
+++ b/drivers/power/regulator/pfuze100.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/pfuze100_pmic.h>
diff --git a/drivers/power/regulator/pwm_regulator.c b/drivers/power/regulator/pwm_regulator.c
index 4030144dd3..f870622705 100644
--- a/drivers/power/regulator/pwm_regulator.c
+++ b/drivers/power/regulator/pwm_regulator.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <pwm.h>
 #include <dm/device_compat.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/regulator-uclass.c b/drivers/power/regulator/regulator-uclass.c
index c9d26344d7..7dcb317192 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -7,7 +7,9 @@
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/uclass-internal.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 
diff --git a/drivers/power/regulator/regulator_common.c b/drivers/power/regulator/regulator_common.c
index 33b73b7c2f..16d9412cd5 100644
--- a/drivers/power/regulator/regulator_common.c
+++ b/drivers/power/regulator/regulator_common.c
@@ -6,6 +6,8 @@
 
 #include "regulator_common.h"
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 int regulator_common_ofdata_to_platdata(struct udevice *dev,
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index e99331f6c9..a08e2151f9 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <power/rk8xx_pmic.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/s2mps11_regulator.c b/drivers/power/regulator/s2mps11_regulator.c
index 67d1f9689d..a6b4f158ef 100644
--- a/drivers/power/regulator/s2mps11_regulator.c
+++ b/drivers/power/regulator/s2mps11_regulator.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/s2mps11.h>
diff --git a/drivers/power/regulator/stm32-vrefbuf.c b/drivers/power/regulator/stm32-vrefbuf.c
index 08a10f05b4..250773514f 100644
--- a/drivers/power/regulator/stm32-vrefbuf.c
+++ b/drivers/power/regulator/stm32-vrefbuf.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
 #include <power/regulator.h>
diff --git a/drivers/power/regulator/stpmic1.c b/drivers/power/regulator/stpmic1.c
index 1e3f96f3a0..3e342f4808 100644
--- a/drivers/power/regulator/stpmic1.c
+++ b/drivers/power/regulator/stpmic1.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/stpmic1.h>
diff --git a/drivers/power/regulator/tps65090_regulator.c b/drivers/power/regulator/tps65090_regulator.c
index 0bcf1a61ea..9e45627a74 100644
--- a/drivers/power/regulator/tps65090_regulator.c
+++ b/drivers/power/regulator/tps65090_regulator.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/tps65090.h>
diff --git a/drivers/power/regulator/tps65910_regulator.c b/drivers/power/regulator/tps65910_regulator.c
index 12e66ebd43..171afd34a5 100644
--- a/drivers/power/regulator/tps65910_regulator.c
+++ b/drivers/power/regulator/tps65910_regulator.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/tps65910_pmic.h>
diff --git a/drivers/power/regulator/tps65941_regulator.c b/drivers/power/regulator/tps65941_regulator.c
index a00ef58129..150c72d7ec 100644
--- a/drivers/power/regulator/tps65941_regulator.c
+++ b/drivers/power/regulator/tps65941_regulator.c
@@ -11,6 +11,8 @@
 #include <errno.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <power/pmic.h>
 #include <power/regulator.h>
 #include <power/tps65941.h>
diff --git a/drivers/power/tps6586x.c b/drivers/power/tps6586x.c
index 19680e2e76..49b28a5e6b 100644
--- a/drivers/power/tps6586x.c
+++ b/drivers/power/tps6586x.c
@@ -5,9 +5,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <tps6586x.h>
 #include <asm/io.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 static struct udevice *tps6586x_dev;
 
diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c
index 42c9001518..b0d5cba2c4 100644
--- a/drivers/power/twl4030.c
+++ b/drivers/power/twl4030.c
@@ -22,7 +22,9 @@
  *	Syed Mohammed Khasim <khasim at ti.com>
  */
 
+#include <command.h>
 #include <twl4030.h>
+#include <linux/delay.h>
 
 /*
  * Power Reset
@@ -172,7 +174,7 @@ void twl4030_power_mmc_init(int dev_index)
 }
 
 #ifdef CONFIG_CMD_POWEROFF
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	twl4030_power_off();
 
diff --git a/drivers/power/twl6030.c b/drivers/power/twl6030.c
index 103960d48d..60a5aaaf19 100644
--- a/drivers/power/twl6030.c
+++ b/drivers/power/twl6030.c
@@ -4,6 +4,7 @@
  * Texas Instruments, <www.ti.com>
  */
 #include <config.h>
+#include <linux/delay.h>
 
 #include <twl6030.h>
 
diff --git a/drivers/pwm/exynos_pwm.c b/drivers/pwm/exynos_pwm.c
index 1c829d286b..fed1583796 100644
--- a/drivers/pwm/exynos_pwm.c
+++ b/drivers/pwm/exynos_pwm.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pwm.h>
 #include <asm/io.h>
 #include <asm/arch/clk.h>
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c
index 8d8f3e6f9f..f5b9544cb8 100644
--- a/drivers/pwm/pwm-imx.c
+++ b/drivers/pwm/pwm-imx.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <div64.h>
 #include <dm.h>
+#include <log.h>
 #include <pwm.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/io.h>
diff --git a/drivers/pwm/rk_pwm.c b/drivers/pwm/rk_pwm.c
index 46888e9077..911da1d426 100644
--- a/drivers/pwm/rk_pwm.c
+++ b/drivers/pwm/rk_pwm.c
@@ -8,11 +8,13 @@
 #include <clk.h>
 #include <div64.h>
 #include <dm.h>
+#include <log.h>
 #include <pwm.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/pwm.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/pwm/sunxi_pwm.c b/drivers/pwm/sunxi_pwm.c
index 8a55e4f461..56215dbf6c 100644
--- a/drivers/pwm/sunxi_pwm.c
+++ b/drivers/pwm/sunxi_pwm.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <div64.h>
 #include <dm.h>
+#include <log.h>
 #include <pwm.h>
 #include <regmap.h>
 #include <syscon.h>
diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c
index 02c3650ec6..5e98d0fc2c 100644
--- a/drivers/pwm/tegra_pwm.c
+++ b/drivers/pwm/tegra_pwm.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <pwm.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 24549ece65..61ca4760c8 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -440,7 +440,8 @@ static void qe_upload_microcode(const void *base,
 /*
  * Upload a microcode to the I-RAM at a specific address.
  *
- * See docs/README.qe_firmware for information on QE microcode uploading.
+ * See Documentation/powerpc/qe_firmware.rst in the Linux kernel tree for
+ * information on QE microcode uploading.
  *
  * Currently, only version 1 is supported, so the 'version' field must be
  * set to 1.
@@ -579,7 +580,8 @@ int qe_upload_firmware(const struct qe_firmware *firmware)
 /*
  * Upload a microcode to the I-RAM at a specific address.
  *
- * See docs/README.qe_firmware for information on QE microcode uploading.
+ * See Documentation/powerpc/qe_firmware.rst in the Linux kernel tree for
+ * information on QE microcode uploading.
  *
  * Currently, only version 1 is supported, so the 'version' field must be
  * set to 1.
@@ -779,7 +781,7 @@ struct qe_firmware_info *qe_get_firmware_info(void)
 	return qe_firmware_uploaded ? &qe_firmware_info : NULL;
 }
 
-static int qe_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int qe_cmd(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ulong addr;
 
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index 69cdf9444a..849f191d6d 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -6,8 +6,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <linux/immap_qe.h>
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 9425379794..69c22dd5e2 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <net.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/immap_qe.h>
 #include <asm/io.h>
@@ -875,7 +876,7 @@ void marvell_phy_interface_mode(struct eth_device *dev, phy_interface_t type,
 			uec_phy_write(mii_info, 0x04, 0x01e1);
 			uec_phy_write(mii_info, 0x00, 0x9140);
 			uec_phy_write(mii_info, 0x00, 0x1000);
-			udelay (100000);
+			mdelay(100);
 			uec_phy_write(mii_info, 0x00, 0x2900);
 			uec_phy_write(mii_info, 0x14, 0x0cd2);
 			uec_phy_write(mii_info, 0x00, 0xa100);
@@ -884,13 +885,13 @@ void marvell_phy_interface_mode(struct eth_device *dev, phy_interface_t type,
 			uec_phy_write(mii_info, 0x04, 0x05e1);
 			uec_phy_write(mii_info, 0x00, 0xa100);
 			uec_phy_write(mii_info, 0x00, 0x2100);
-			udelay (1000000);
+			mdelay(1000);
 		} else if (speed == SPEED_10) {
 			uec_phy_write(mii_info, 0x14, 0x8e40);
 			uec_phy_write(mii_info, 0x1b, 0x800b);
 			uec_phy_write(mii_info, 0x14, 0x0c82);
 			uec_phy_write(mii_info, 0x00, 0x8100);
-			udelay (1000000);
+			mdelay(1000);
 		}
 	}
 
diff --git a/drivers/ram/imxrt_sdram.c b/drivers/ram/imxrt_sdram.c
index ac15e94f00..765a2141d1 100644
--- a/drivers/ram/imxrt_sdram.c
+++ b/drivers/ram/imxrt_sdram.c
@@ -7,8 +7,12 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 /* SDRAM Command Code */
diff --git a/drivers/ram/k3-am654-ddrss.c b/drivers/ram/k3-am654-ddrss.c
index 8cf74861a8..8bbd8cfa83 100644
--- a/drivers/ram/k3-am654-ddrss.c
+++ b/drivers/ram/k3-am654-ddrss.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <power-domain.h>
diff --git a/drivers/ram/k3-am654-ddrss.h b/drivers/ram/k3-am654-ddrss.h
index 94a7c91b2b..c87f186291 100644
--- a/drivers/ram/k3-am654-ddrss.h
+++ b/drivers/ram/k3-am654-ddrss.h
@@ -11,6 +11,7 @@
 #define __K3_AM654_DDRSS_H
 
 /* DDRSS subsystem wrapper logic registers */
+#include <linux/bitops.h>
 #define DDRSS_SS_ID_REV_REG		0x00000000
 #define DDRSS_SS_CTL_REG		0x00000004
 #define DDRSS_V2H_CTL_REG		0x00000020
diff --git a/drivers/ram/k3-j721e/k3-j721e-ddrss.c b/drivers/ram/k3-j721e/k3-j721e-ddrss.c
index 352483c4d7..d647a8a209 100644
--- a/drivers/ram/k3-j721e/k3-j721e-ddrss.c
+++ b/drivers/ram/k3-j721e/k3-j721e-ddrss.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <hang.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <power-domain.h>
diff --git a/drivers/ram/mediatek/ddr3-mt7629.c b/drivers/ram/mediatek/ddr3-mt7629.c
index b413f499d0..b3a68cb078 100644
--- a/drivers/ram/mediatek/ddr3-mt7629.c
+++ b/drivers/ram/mediatek/ddr3-mt7629.c
@@ -12,6 +12,8 @@
 #include <dm.h>
 #include <ram.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* EMI */
 #define EMI_CONA			0x000
diff --git a/drivers/ram/mpc83xx_sdram.c b/drivers/ram/mpc83xx_sdram.c
index 46449d3d12..a226bac2cc 100644
--- a/drivers/ram/mpc83xx_sdram.c
+++ b/drivers/ram/mpc83xx_sdram.c
@@ -7,7 +7,9 @@
 #include <common.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
+#include <asm/bitops.h>
 #include <dt-bindings/memory/mpc83xx-sdram.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c
index 2d82a176db..92457a1fa4 100644
--- a/drivers/ram/rockchip/dmc-rk3368.c
+++ b/drivers/ram/rockchip/dmc-rk3368.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <hang.h>
+#include <log.h>
 #include <dt-bindings/memory/rk3368-dmc.h>
 #include <dt-structs.h>
 #include <ram.h>
@@ -19,6 +20,8 @@
 #include <asm/arch-rockchip/ddr_rk3368.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_rk3288.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 struct dram_info {
diff --git a/drivers/ram/rockchip/sdram_pctl_px30.c b/drivers/ram/rockchip/sdram_pctl_px30.c
index 1839cebb67..331d85fba2 100644
--- a/drivers/ram/rockchip/sdram_pctl_px30.c
+++ b/drivers/ram/rockchip/sdram_pctl_px30.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_pctl_px30.h>
+#include <linux/delay.h>
 
 /*
  * rank = 1: cs0
diff --git a/drivers/ram/rockchip/sdram_phy_px30.c b/drivers/ram/rockchip/sdram_phy_px30.c
index 5de73770a8..f7f6de1ba9 100644
--- a/drivers/ram/rockchip/sdram_phy_px30.c
+++ b/drivers/ram/rockchip/sdram_phy_px30.c
@@ -9,6 +9,7 @@
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_common.h>
 #include <asm/arch-rockchip/sdram_phy_px30.h>
+#include <linux/delay.h>
 
 static void sdram_phy_dll_bypass_set(void __iomem *phy_base, u32 freq)
 {
diff --git a/drivers/ram/rockchip/sdram_px30.c b/drivers/ram/rockchip/sdram_px30.c
index 729255493a..fd5763d0a0 100644
--- a/drivers/ram/rockchip/sdram_px30.c
+++ b/drivers/ram/rockchip/sdram_px30.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <debug_uart.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <syscon.h>
 #include <asm/io.h>
@@ -15,6 +17,7 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_px30.h>
+#include <linux/delay.h>
 
 struct dram_info {
 #ifdef CONFIG_TPL_BUILD
diff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c
index 8486653c6f..0162955aae 100644
--- a/drivers/ram/rockchip/sdram_rk3128.c
+++ b/drivers/ram/rockchip/sdram_rk3128.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <ram.h>
 #include <syscon.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c
index 9b5eb38ecc..7aedb4fbac 100644
--- a/drivers/ram/rockchip/sdram_rk3188.c
+++ b/drivers/ram/rockchip/sdram_rk3188.c
@@ -12,6 +12,8 @@
 #include <dt-structs.h>
 #include <errno.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -23,6 +25,7 @@
 #include <asm/arch-rockchip/pmu_rk3188.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_rk3288.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 struct chan_info {
diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c
index 223f048161..094693ce24 100644
--- a/drivers/ram/rockchip/sdram_rk322x.c
+++ b/drivers/ram/rockchip/sdram_rk322x.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <init.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -19,6 +20,7 @@
 #include <asm/arch-rockchip/uart.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/types.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c
index 9f6f555147..64d704ef26 100644
--- a/drivers/ram/rockchip/sdram_rk3288.c
+++ b/drivers/ram/rockchip/sdram_rk3288.c
@@ -12,6 +12,8 @@
 #include <dt-structs.h>
 #include <errno.h>
 #include <hang.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -23,6 +25,7 @@
 #include <asm/arch-rockchip/pmu_rk3288.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_rk3288.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include <power/rk8xx_pmic.h>
diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 8329f4a352..3f3926f9e4 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -7,6 +7,8 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -17,6 +19,7 @@
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_rk3328.h>
 #include <asm/arch-rockchip/uart.h>
+#include <linux/delay.h>
 
 struct dram_info {
 #ifdef CONFIG_TPL_BUILD
diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c
index d69ef01d08..60a1ab8b51 100644
--- a/drivers/ram/rockchip/sdram_rk3399.c
+++ b/drivers/ram/rockchip/sdram_rk3399.c
@@ -9,6 +9,8 @@
 #include <clk.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -20,6 +22,7 @@
 #include <asm/arch-rockchip/hardware.h>
 #include <asm/arch-rockchip/sdram.h>
 #include <asm/arch-rockchip/sdram_rk3399.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <time.h>
 
diff --git a/drivers/ram/stm32_sdram.c b/drivers/ram/stm32_sdram.c
index 2d03333b1b..3fddf4df96 100644
--- a/drivers/ram/stm32_sdram.c
+++ b/drivers/ram/stm32_sdram.c
@@ -7,9 +7,13 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define MEM_MODE_MASK	GENMASK(2, 0)
 #define SWP_FMC_OFFSET 10
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index 11b14ae652..bf3a4c97a4 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -5,11 +5,14 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <ram.h>
 #include <reset.h>
 #include <timer.h>
 #include <asm/io.h>
 #include <asm/arch/ddr.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 #include "stm32mp1_ddr.h"
 #include "stm32mp1_ddr_regs.h"
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
index afd93c518e..3c8885a965 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr_regs.h
@@ -7,6 +7,7 @@
 #define _RAM_STM32MP1_DDR_REGS_H
 
 /* DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL) registers */
+#include <linux/bitops.h>
 struct stm32mp1_ddrctl {
 	u32 mstr ;		/* 0x0 Master*/
 	u32 stat;		/* 0x4 Operating Mode Status*/
diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c
index 805c9ddaad..38390c0d55 100644
--- a/drivers/ram/stm32mp1/stm32mp1_interactive.c
+++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c
@@ -4,9 +4,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <console.h>
 #include <cli.h>
 #include <clk.h>
+#include <log.h>
 #include <malloc.h>
 #include <ram.h>
 #include <reset.h>
@@ -150,7 +152,7 @@ static bool stm32mp1_check_step(enum stm32mp1_ddr_interact_step step,
 static void stm32mp1_do_info(struct ddr_info *priv,
 			     struct stm32mp1_ddr_config *config,
 			     enum stm32mp1_ddr_interact_step step,
-			     int argc, char * const argv[])
+			     int argc, char *const argv[])
 {
 	unsigned long value;
 	static char *ddr_name;
@@ -223,7 +225,7 @@ static void stm32mp1_do_info(struct ddr_info *priv,
 }
 
 static bool stm32mp1_do_freq(struct ddr_info *priv,
-			     int argc, char * const argv[])
+			     int argc, char *const argv[])
 {
 	unsigned long ddrphy_clk;
 
@@ -246,7 +248,7 @@ static bool stm32mp1_do_freq(struct ddr_info *priv,
 
 static void stm32mp1_do_param(enum stm32mp1_ddr_interact_step step,
 			      const struct stm32mp1_ddr_config *config,
-			      int argc, char * const argv[])
+			      int argc, char *const argv[])
 {
 	switch (argc) {
 	case 1:
@@ -266,7 +268,7 @@ static void stm32mp1_do_param(enum stm32mp1_ddr_interact_step step,
 }
 
 static void stm32mp1_do_print(struct ddr_info *priv,
-			      int argc, char * const argv[])
+			      int argc, char *const argv[])
 {
 	switch (argc) {
 	case 1:
@@ -281,7 +283,7 @@ static void stm32mp1_do_print(struct ddr_info *priv,
 }
 
 static int stm32mp1_do_step(enum stm32mp1_ddr_interact_step step,
-			    int argc, char * const argv[])
+			    int argc, char *const argv[])
 {
 	int i;
 	unsigned long value;
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 7b1adc5b24..9022679703 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -7,6 +7,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <ram.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -57,6 +58,27 @@ int stm32mp1_ddr_clk_enable(struct ddr_info *priv, uint32_t mem_speed)
 	return 0;
 }
 
+__weak int board_stm32mp1_ddr_config_name_match(struct udevice *dev,
+						const char *name)
+{
+	return 0;	/* Always match */
+}
+
+static ofnode stm32mp1_ddr_get_ofnode(struct udevice *dev)
+{
+	const char *name;
+	ofnode node;
+
+	dev_for_each_subnode(node, dev) {
+		name = ofnode_get_property(node, "compatible", NULL);
+
+		if (!board_stm32mp1_ddr_config_name_match(dev, name))
+			return node;
+	}
+
+	return dev_ofnode(dev);
+}
+
 static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 {
 	struct ddr_info *priv = dev_get_priv(dev);
@@ -64,6 +86,7 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 	unsigned int idx;
 	struct clk axidcg;
 	struct stm32mp1_ddr_config config;
+	ofnode node = stm32mp1_ddr_get_ofnode(dev);
 
 #define PARAM(x, y, z)							\
 	{	.name = x,						\
@@ -91,9 +114,9 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 		PHY_PARAM_OPT(cal)
 	};
 
-	config.info.speed = dev_read_u32_default(dev, "st,mem-speed", 0);
-	config.info.size = dev_read_u32_default(dev, "st,mem-size", 0);
-	config.info.name = dev_read_string(dev, "st,mem-name");
+	config.info.speed = ofnode_read_u32_default(node, "st,mem-speed", 0);
+	config.info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
+	config.info.name = ofnode_read_string(node, "st,mem-name");
 	if (!config.info.name) {
 		debug("%s: no st,mem-name\n", __func__);
 		return -EINVAL;
@@ -101,7 +124,7 @@ static __maybe_unused int stm32mp1_ddr_setup(struct udevice *dev)
 	printf("RAM: %s\n", config.info.name);
 
 	for (idx = 0; idx < ARRAY_SIZE(param); idx++) {
-		ret = dev_read_u32_array(dev, param[idx].name,
+		ret = ofnode_read_u32_array(node, param[idx].name,
 					 (void *)((u32)&config +
 						  param[idx].offset),
 					 param[idx].size);
@@ -182,7 +205,8 @@ static int stm32mp1_ddr_probe(struct udevice *dev)
 	priv->info.size = 0;
 	return stm32mp1_ddr_setup(dev);
 #else
-	priv->info.size = dev_read_u32_default(dev, "st,mem-size", 0);
+	ofnode node = stm32mp1_ddr_get_ofnode(dev);
+	priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
 	return 0;
 #endif
 }
diff --git a/drivers/ram/stm32mp1/stm32mp1_tests.c b/drivers/ram/stm32mp1/stm32mp1_tests.c
index 12298cf327..bacdd74705 100644
--- a/drivers/ram/stm32mp1/stm32mp1_tests.c
+++ b/drivers/ram/stm32mp1/stm32mp1_tests.c
@@ -5,6 +5,8 @@
 #include <common.h>
 #include <console.h>
 #include <init.h>
+#include <log.h>
+#include <rand.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <linux/log2.h>
diff --git a/drivers/ram/stm32mp1/stm32mp1_tuning.c b/drivers/ram/stm32mp1/stm32mp1_tuning.c
index 3013b7b667..a8d6892bb0 100644
--- a/drivers/ram/stm32mp1/stm32mp1_tuning.c
+++ b/drivers/ram/stm32mp1/stm32mp1_tuning.c
@@ -5,10 +5,13 @@
 #include <common.h>
 #include <console.h>
 #include <clk.h>
+#include <log.h>
 #include <ram.h>
+#include <rand.h>
 #include <reset.h>
 #include <asm/io.h>
 #include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 
 #include "stm32mp1_ddr_regs.h"
diff --git a/drivers/remoteproc/k3_system_controller.c b/drivers/remoteproc/k3_system_controller.c
index 88430299c9..54209fccb3 100644
--- a/drivers/remoteproc/k3_system_controller.c
+++ b/drivers/remoteproc/k3_system_controller.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <remoteproc.h>
 #include <errno.h>
 #include <mailbox.h>
diff --git a/drivers/remoteproc/rproc-elf-loader.c b/drivers/remoteproc/rproc-elf-loader.c
index f2e033aa74..c464ecebb7 100644
--- a/drivers/remoteproc/rproc-elf-loader.c
+++ b/drivers/remoteproc/rproc-elf-loader.c
@@ -6,7 +6,9 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <elf.h>
+#include <log.h>
 #include <remoteproc.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
 #include <linux/compat.h>
 
diff --git a/drivers/remoteproc/rproc-uclass.c b/drivers/remoteproc/rproc-uclass.c
index c8a41a6332..9640a81e53 100644
--- a/drivers/remoteproc/rproc-uclass.c
+++ b/drivers/remoteproc/rproc-uclass.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <remoteproc.h>
 #include <asm/io.h>
diff --git a/drivers/remoteproc/sandbox_testproc.c b/drivers/remoteproc/sandbox_testproc.c
index eeee49c4dd..2b58b27947 100644
--- a/drivers/remoteproc/sandbox_testproc.c
+++ b/drivers/remoteproc/sandbox_testproc.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <remoteproc.h>
 #include <asm/io.h>
 
diff --git a/drivers/remoteproc/stm32_copro.c b/drivers/remoteproc/stm32_copro.c
index e9dce0d173..33b574b1bd 100644
--- a/drivers/remoteproc/stm32_copro.c
+++ b/drivers/remoteproc/stm32_copro.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <regmap.h>
 #include <remoteproc.h>
 #include <reset.h>
diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c
index 1fc8193ad9..3361555c53 100644
--- a/drivers/remoteproc/ti_k3_dsp_rproc.c
+++ b/drivers/remoteproc/ti_k3_dsp_rproc.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <remoteproc.h>
 #include <errno.h>
diff --git a/drivers/remoteproc/ti_k3_r5f_rproc.c b/drivers/remoteproc/ti_k3_r5f_rproc.c
index c01b29d90f..1a7f1f8a00 100644
--- a/drivers/remoteproc/ti_k3_r5f_rproc.c
+++ b/drivers/remoteproc/ti_k3_r5f_rproc.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <remoteproc.h>
 #include <errno.h>
diff --git a/drivers/remoteproc/ti_power_proc.c b/drivers/remoteproc/ti_power_proc.c
index f9660d4511..350450d1fb 100644
--- a/drivers/remoteproc/ti_power_proc.c
+++ b/drivers/remoteproc/ti_power_proc.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <remoteproc.h>
 #include <mach/psc_defs.h>
 
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 75ccd65799..88d3be1593 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -30,10 +30,10 @@ config STI_RESET
 
 config STM32_RESET
 	bool "Enable the STM32 reset"
-	depends on STM32 || ARCH_STM32MP
+	depends on ARCH_STM32 || ARCH_STM32MP
 	help
 	  Support for reset controllers on STMicroelectronics STM32 family SoCs.
-	  This resset driver is compatible with STM32 F4/F7 and H7 SoCs.
+	  This reset driver is compatible with STM32 F4/F7 and H7 SoCs.
 
 config TEGRA_CAR_RESET
 	bool "Enable Tegra CAR-based reset driver"
diff --git a/drivers/reset/ast2500-reset.c b/drivers/reset/ast2500-reset.c
index d1d44f3728..beb5cd8fa8 100644
--- a/drivers/reset/ast2500-reset.c
+++ b/drivers/reset/ast2500-reset.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <misc.h>
 #include <reset.h>
 #include <reset-uclass.h>
diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c
index c1f1e7f70b..156703e084 100644
--- a/drivers/reset/reset-bcm6345.c
+++ b/drivers/reset/reset-bcm6345.c
@@ -9,9 +9,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define MAX_RESETS	32
 
diff --git a/drivers/reset/reset-hisilicon.c b/drivers/reset/reset-hisilicon.c
index a678b8f745..139bc5d73e 100644
--- a/drivers/reset/reset-hisilicon.c
+++ b/drivers/reset/reset-hisilicon.c
@@ -3,12 +3,14 @@
  * Copyright (c) 2019, Linaro Limited
  */
 
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
 #include <dt-bindings/reset/ti-syscon.h>
 #include <reset-uclass.h>
+#include <linux/bitops.h>
 
 struct hisi_reset_priv {
 	void __iomem *base;
diff --git a/drivers/reset/reset-hsdk.c b/drivers/reset/reset-hsdk.c
index f9a432a7a2..0c8f276293 100644
--- a/drivers/reset/reset-hsdk.c
+++ b/drivers/reset/reset-hsdk.c
@@ -6,9 +6,11 @@
  * Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
  */
 
+#include <log.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 #include <reset-uclass.h>
 
diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c
index a61855e9ed..96916b644a 100644
--- a/drivers/reset/reset-imx7.c
+++ b/drivers/reset/reset-imx7.c
@@ -3,6 +3,7 @@
  * Copyright (c) 2017, Impinj, Inc.
  */
 
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <common.h>
@@ -10,6 +11,8 @@
 #include <dt-bindings/reset/imx7-reset.h>
 #include <dt-bindings/reset/imx8mq-reset.h>
 #include <reset-uclass.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 struct imx7_reset_priv {
 	void __iomem *base;
diff --git a/drivers/reset/reset-mediatek.c b/drivers/reset/reset-mediatek.c
index 6d17f52ac7..97d3d57592 100644
--- a/drivers/reset/reset-mediatek.c
+++ b/drivers/reset/reset-mediatek.c
@@ -8,11 +8,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/lists.h>
 #include <regmap.h>
 #include <reset-uclass.h>
 #include <syscon.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 struct mediatek_reset_priv {
diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 70f96355b3..4e3327898e 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <regmap.h>
+#include <linux/bitops.h>
 
 #define REG_COUNT	8
 #define BITS_PER_REG	32
diff --git a/drivers/reset/reset-mtmips.c b/drivers/reset/reset-mtmips.c
index 677de0a6f9..bc20e3335c 100644
--- a/drivers/reset/reset-mtmips.c
+++ b/drivers/reset/reset-mtmips.c
@@ -8,8 +8,10 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 struct mtmips_reset_priv {
diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
index 100afc8103..8092555650 100644
--- a/drivers/reset/reset-rockchip.c
+++ b/drivers/reset/reset-rockchip.c
@@ -5,8 +5,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <dm/lists.h>
diff --git a/drivers/reset/reset-socfpga.c b/drivers/reset/reset-socfpga.c
index c0930a624b..830eda9430 100644
--- a/drivers/reset/reset-socfpga.c
+++ b/drivers/reset/reset-socfpga.c
@@ -14,6 +14,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/lists.h>
 #include <dm/of_access.h>
diff --git a/drivers/reset/reset-sunxi.c b/drivers/reset/reset-sunxi.c
index f21bf3b1ae..05f7f599ce 100644
--- a/drivers/reset/reset-sunxi.c
+++ b/drivers/reset/reset-sunxi.c
@@ -7,10 +7,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <asm/io.h>
 #include <dm/lists.h>
+#include <linux/bitops.h>
 #include <linux/log2.h>
 #include <asm/arch/ccu.h>
 
diff --git a/drivers/reset/reset-ti-sci.c b/drivers/reset/reset-ti-sci.c
index f5d82b5681..95cd388587 100644
--- a/drivers/reset/reset-ti-sci.c
+++ b/drivers/reset/reset-ti-sci.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <dm/device_compat.h>
diff --git a/drivers/reset/reset-uclass.c b/drivers/reset/reset-uclass.c
index 8ec8e462e6..5e38ce5c06 100644
--- a/drivers/reset/reset-uclass.c
+++ b/drivers/reset/reset-uclass.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <reset-uclass.h>
diff --git a/drivers/reset/reset-uniphier.c b/drivers/reset/reset-uniphier.c
index 348f3886d1..06079d2a9c 100644
--- a/drivers/reset/reset-uniphier.c
+++ b/drivers/reset/reset-uniphier.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <dm/device_compat.h>
diff --git a/drivers/reset/sandbox-reset-test.c b/drivers/reset/sandbox-reset-test.c
index ae79be0730..9bc4a7e0de 100644
--- a/drivers/reset/sandbox-reset-test.c
+++ b/drivers/reset/sandbox-reset-test.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <asm/io.h>
diff --git a/drivers/reset/sandbox-reset.c b/drivers/reset/sandbox-reset.c
index bdf53a3de9..7a6f7f676c 100644
--- a/drivers/reset/sandbox-reset.c
+++ b/drivers/reset/sandbox-reset.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <asm/io.h>
diff --git a/drivers/reset/sti-reset.c b/drivers/reset/sti-reset.c
index 31b3e48e0e..ac3a99f9bf 100644
--- a/drivers/reset/sti-reset.c
+++ b/drivers/reset/sti-reset.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <wait_bit.h>
 #include <dm.h>
@@ -13,6 +14,7 @@
 #include <regmap.h>
 #include <syscon.h>
 #include <dt-bindings/reset/stih407-resets.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c
index 5dda522a4e..64a11cfcfc 100644
--- a/drivers/reset/stm32-reset.c
+++ b/drivers/reset/stm32-reset.c
@@ -7,10 +7,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <stm32_rcc.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* reset clear offset for STM32MP RCC */
 #define RCC_CL 0x4
diff --git a/drivers/reset/tegra-car-reset.c b/drivers/reset/tegra-car-reset.c
index 23c6facff2..a33d4533a8 100644
--- a/drivers/reset/tegra-car-reset.c
+++ b/drivers/reset/tegra-car-reset.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset-uclass.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/reset/tegra186-reset.c b/drivers/reset/tegra186-reset.c
index e85f42b3a3..c60a03f0bf 100644
--- a/drivers/reset/tegra186-reset.c
+++ b/drivers/reset/tegra186-reset.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <misc.h>
 #include <reset-uclass.h>
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index edb6152bb9..e4b22d79eb 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -31,4 +31,12 @@ config RNG_STM32MP1
 	help
 	  Enable STM32MP1 rng driver.
 
+config RNG_ROCKCHIP
+	bool "Enable random number generator for rockchip crypto rng"
+	depends on ARCH_ROCKCHIP && DM_RNG
+	default n
+	help
+	  Enable random number generator for rockchip.This driver is
+	  support rng module of crypto v1 and crypto v2.
+
 endif
diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
index 6a8a66779b..44a0003917 100644
--- a/drivers/rng/Makefile
+++ b/drivers/rng/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_DM_RNG) += rng-uclass.o
 obj-$(CONFIG_RNG_MESON) += meson-rng.o
 obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
 obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
+obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
new file mode 100644
index 0000000000..c6a834b67c
--- /dev/null
+++ b/drivers/rng/rockchip_rng.c
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
+ */
+#include <asm/arch-rockchip/hardware.h>
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <linux/iopoll.h>
+#include <linux/string.h>
+#include <rng.h>
+
+#define RK_HW_RNG_MAX 32
+
+#define _SBF(s, v)	((v) << (s))
+
+/* start of CRYPTO V1 register define */
+#define CRYPTO_V1_CTRL				0x0008
+#define CRYPTO_V1_RNG_START			BIT(8)
+#define CRYPTO_V1_RNG_FLUSH			BIT(9)
+
+#define CRYPTO_V1_TRNG_CTRL			0x0200
+#define CRYPTO_V1_OSC_ENABLE			BIT(16)
+#define CRYPTO_V1_TRNG_SAMPLE_PERIOD(x)		(x)
+
+#define CRYPTO_V1_TRNG_DOUT_0			0x0204
+/* end of CRYPTO V1 register define */
+
+/* start of CRYPTO V2 register define */
+#define CRYPTO_V2_RNG_CTL			0x0400
+#define CRYPTO_V2_RNG_64_BIT_LEN		_SBF(4, 0x00)
+#define CRYPTO_V2_RNG_128_BIT_LEN		_SBF(4, 0x01)
+#define CRYPTO_V2_RNG_192_BIT_LEN		_SBF(4, 0x02)
+#define CRYPTO_V2_RNG_256_BIT_LEN		_SBF(4, 0x03)
+#define CRYPTO_V2_RNG_FATESY_SOC_RING		_SBF(2, 0x00)
+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_0		_SBF(2, 0x01)
+#define CRYPTO_V2_RNG_SLOWER_SOC_RING_1		_SBF(2, 0x02)
+#define CRYPTO_V2_RNG_SLOWEST_SOC_RING		_SBF(2, 0x03)
+#define CRYPTO_V2_RNG_ENABLE			BIT(1)
+#define CRYPTO_V2_RNG_START			BIT(0)
+#define CRYPTO_V2_RNG_SAMPLE_CNT		0x0404
+#define CRYPTO_V2_RNG_DOUT_0			0x0410
+/* end of CRYPTO V2 register define */
+
+#define RK_RNG_TIME_OUT	50000  /* max 50ms */
+
+struct rk_rng_soc_data {
+	int (*rk_rng_read)(struct udevice *dev, void *data, size_t len);
+};
+
+struct rk_rng_platdata {
+	fdt_addr_t base;
+	struct rk_rng_soc_data *soc_data;
+};
+
+static int rk_rng_read_regs(fdt_addr_t addr, void *buf, size_t size)
+{
+	u32 count = RK_HW_RNG_MAX / sizeof(u32);
+	u32 reg, tmp_len;
+
+	if (size > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	while (size && count) {
+		reg = readl(addr);
+		tmp_len = min(size, sizeof(u32));
+		memcpy(buf, &reg, tmp_len);
+		addr += sizeof(u32);
+		buf += tmp_len;
+		size -= tmp_len;
+		count--;
+	}
+
+	return 0;
+}
+
+static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	u32 reg = 0;
+	int retval;
+
+	if (len > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	/* enable osc_ring to get entropy, sample period is set as 100 */
+	writel(CRYPTO_V1_OSC_ENABLE | CRYPTO_V1_TRNG_SAMPLE_PERIOD(100),
+	       pdata->base + CRYPTO_V1_TRNG_CTRL);
+
+	rk_clrsetreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START,
+		     CRYPTO_V1_RNG_START);
+
+	retval = readl_poll_timeout(pdata->base + CRYPTO_V1_CTRL, reg,
+				    !(reg & CRYPTO_V1_RNG_START),
+				    RK_RNG_TIME_OUT);
+	if (retval)
+		goto exit;
+
+	rk_rng_read_regs(pdata->base + CRYPTO_V1_TRNG_DOUT_0, data, len);
+
+exit:
+	/* close TRNG */
+	rk_clrreg(pdata->base + CRYPTO_V1_CTRL, CRYPTO_V1_RNG_START);
+
+	return 0;
+}
+
+static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+	u32 reg = 0;
+	int retval;
+
+	if (len > RK_HW_RNG_MAX)
+		return -EINVAL;
+
+	/* enable osc_ring to get entropy, sample period is set as 100 */
+	writel(100, pdata->base + CRYPTO_V2_RNG_SAMPLE_CNT);
+
+	reg |= CRYPTO_V2_RNG_256_BIT_LEN;
+	reg |= CRYPTO_V2_RNG_SLOWER_SOC_RING_0;
+	reg |= CRYPTO_V2_RNG_ENABLE;
+	reg |= CRYPTO_V2_RNG_START;
+
+	rk_clrsetreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff, reg);
+
+	retval = readl_poll_timeout(pdata->base + CRYPTO_V2_RNG_CTL, reg,
+				    !(reg & CRYPTO_V2_RNG_START),
+				    RK_RNG_TIME_OUT);
+	if (retval)
+		goto exit;
+
+	rk_rng_read_regs(pdata->base + CRYPTO_V2_RNG_DOUT_0, data, len);
+
+exit:
+	/* close TRNG */
+	rk_clrreg(pdata->base + CRYPTO_V2_RNG_CTL, 0xffff);
+
+	return retval;
+}
+
+static int rockchip_rng_read(struct udevice *dev, void *data, size_t len)
+{
+	unsigned char *buf = data;
+	unsigned int i;
+	int ret = -EIO;
+
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	if (!len)
+		return 0;
+
+	if (!pdata->soc_data || !pdata->soc_data->rk_rng_read)
+		return -EINVAL;
+
+	for (i = 0; i < len / RK_HW_RNG_MAX; i++, buf += RK_HW_RNG_MAX) {
+		ret = pdata->soc_data->rk_rng_read(dev, buf, RK_HW_RNG_MAX);
+		if (ret)
+			goto exit;
+	}
+
+	if (len % RK_HW_RNG_MAX)
+		ret = pdata->soc_data->rk_rng_read(dev, buf,
+						   len % RK_HW_RNG_MAX);
+
+exit:
+	return ret;
+}
+
+static int rockchip_rng_ofdata_to_platdata(struct udevice *dev)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	memset(pdata, 0x00, sizeof(*pdata));
+
+	pdata->base = (fdt_addr_t)dev_read_addr_ptr(dev);
+	if (!pdata->base)
+		return -ENOMEM;
+
+	return 0;
+}
+
+static int rockchip_rng_probe(struct udevice *dev)
+{
+	struct rk_rng_platdata *pdata = dev_get_priv(dev);
+
+	pdata->soc_data = (struct rk_rng_soc_data *)dev_get_driver_data(dev);
+
+	return 0;
+}
+
+static const struct rk_rng_soc_data rk_rng_v1_soc_data = {
+	.rk_rng_read = rk_v1_rng_read,
+};
+
+static const struct rk_rng_soc_data rk_rng_v2_soc_data = {
+	.rk_rng_read = rk_v2_rng_read,
+};
+
+static const struct dm_rng_ops rockchip_rng_ops = {
+	.read = rockchip_rng_read,
+};
+
+static const struct udevice_id rockchip_rng_match[] = {
+	{
+		.compatible = "rockchip,cryptov1-rng",
+		.data = (ulong)&rk_rng_v1_soc_data,
+	},
+	{
+		.compatible = "rockchip,cryptov2-rng",
+		.data = (ulong)&rk_rng_v2_soc_data,
+	},
+	{},
+};
+
+U_BOOT_DRIVER(rockchip_rng) = {
+	.name = "rockchip-rng",
+	.id = UCLASS_RNG,
+	.of_match = rockchip_rng_match,
+	.ops = &rockchip_rng_ops,
+	.probe = rockchip_rng_probe,
+	.ofdata_to_platdata = rockchip_rng_ofdata_to_platdata,
+	.priv_auto_alloc_size = sizeof(struct rk_rng_platdata),
+};
diff --git a/drivers/rng/sandbox_rng.c b/drivers/rng/sandbox_rng.c
index cd0b0ac77b..cc5e1f6e25 100644
--- a/drivers/rng/sandbox_rng.c
+++ b/drivers/rng/sandbox_rng.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <rand.h>
 #include <rng.h>
 
 #include <linux/string.h>
diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c
index e0f0a66c6e..7ef7ff9756 100644
--- a/drivers/rng/stm32mp1_rng.c
+++ b/drivers/rng/stm32mp1_rng.c
@@ -6,8 +6,11 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <reset.h>
 #include <rng.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <linux/iopoll.h>
diff --git a/drivers/rtc/davinci.c b/drivers/rtc/davinci.c
index b6930bd839..c446e7a735 100644
--- a/drivers/rtc/davinci.c
+++ b/drivers/rtc/davinci.c
@@ -5,9 +5,11 @@
  */
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <rtc.h>
 #include <asm/io.h>
 #include <asm/davinci_rtc.h>
+#include <linux/delay.h>
 
 int rtc_get(struct rtc_time *tmp)
 {
diff --git a/drivers/rtc/ds1302.c b/drivers/rtc/ds1302.c
index b94163f748..189607c3e0 100644
--- a/drivers/rtc/ds1302.c
+++ b/drivers/rtc/ds1302.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <rtc.h>
+#include <linux/delay.h>
 
 /* GPP Pins */
 #define DATA		0x200
diff --git a/drivers/rtc/ds1306.c b/drivers/rtc/ds1306.c
index 02d617e09c..36d615812b 100644
--- a/drivers/rtc/ds1306.c
+++ b/drivers/rtc/ds1306.c
@@ -18,6 +18,7 @@
 #include <command.h>
 #include <rtc.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 #define	RTC_SECONDS		0x00
 #define	RTC_MINUTES		0x01
@@ -71,7 +72,7 @@ int rtc_get (struct rtc_time *tmp)
 
 	/* Now we can enable the DS1306 RTC */
 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
-	udelay (10);
+	udelay(10);
 
 	/* Shift out the address (0) of the time in the Clock Chip */
 	soft_spi_send (0);
@@ -105,7 +106,7 @@ int rtc_get (struct rtc_time *tmp)
 
 	/* Now we can disable the DS1306 RTC */
 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
-	udelay (10);
+	udelay(10);
 
 	rtc_calc_weekday(tmp);	/* Determine the day of week */
 
@@ -127,7 +128,7 @@ int rtc_set (struct rtc_time *tmp)
 
 	/* Now we can enable the DS1306 RTC */
 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
-	udelay (10);
+	udelay(10);
 
 	/* First disable write protect in the clock chip control register */
 	soft_spi_send (0x8F);	/* send address of the control register */
@@ -135,11 +136,11 @@ int rtc_set (struct rtc_time *tmp)
 
 	/* Now disable the DS1306 to terminate the write */
 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;
-	udelay (10);
+	udelay(10);
 
 	/* Now enable the DS1306 to initiate a new write */
 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;
-	udelay (10);
+	udelay(10);
 
 	/* Next, send the address of the clock time write registers */
 	soft_spi_send (0x80);	/* send address of the first time register */
@@ -156,11 +157,11 @@ int rtc_set (struct rtc_time *tmp)
 
 	/* Now we can disable the Clock chip to terminate the burst write */
 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/* Disable DS1306 Chip */
-	udelay (10);
+	udelay(10);
 
 	/* Now we can enable the Clock chip to initiate a new write */
 	immap->im_cpm.cp_pbdat |= PB_SPI_CE;	/* Enable DS1306 Chip */
-	udelay (10);
+	udelay(10);
 
 	/* First we Enable write protect in the clock chip control register */
 	soft_spi_send (0x8F);	/* send address of the control register */
@@ -168,7 +169,7 @@ int rtc_set (struct rtc_time *tmp)
 
 	/* Now disable the DS1306 */
 	immap->im_cpm.cp_pbdat &= ~PB_SPI_CE;	/*  Disable DS1306 Chip */
-	udelay (10);
+	udelay(10);
 
 	/* Set standard MPC8xx clock to the same time so Linux will
 	 * see the time even if it doesn't have a DS1306 clock driver.
@@ -204,7 +205,7 @@ static void init_spi (void)
 	immap->im_cpm.cp_pbdir |= (PB_SPIMOSI | PB_SPI_CE | PB_SPISCK);
 
 	immap->im_cpm.cp_pbdir &= ~PB_SPIMISO;	/* Make MISO pin an input */
-	udelay (10);
+	udelay(10);
 }
 
 /* ------------------------------------------------------------------------- */
@@ -227,10 +228,10 @@ static void soft_spi_send (unsigned char n)
 			immap->im_cpm.cp_pbdat |= PB_SPIMOSI;	/* Set MOSI to 1 */
 		else
 			immap->im_cpm.cp_pbdat &= ~PB_SPIMOSI;	/* Set MOSI to 0 */
-		udelay (10);
+		udelay(10);
 
 		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
-		udelay (10);
+		udelay(10);
 
 		bitpos >>= 1;	/* Shift for next bit position */
 	}
@@ -253,11 +254,11 @@ static unsigned char soft_spi_read (void)
 	/* Read 8 bits here */
 	for (i = 0; i < 8; i++) {	/* Do 8 bits in loop */
 		immap->im_cpm.cp_pbdat |= PB_SPISCK;	/* Raise SCK */
-		udelay (10);
+		udelay(10);
 		if (immap->im_cpm.cp_pbdat & PB_SPIMISO)	/* Get a bit of data */
 			spi_byte |= bitpos;	/* Set data accordingly */
 		immap->im_cpm.cp_pbdat &= ~PB_SPISCK;	/* Lower SCK */
-		udelay (10);
+		udelay(10);
 		bitpos >>= 1;	/* Shift for next bit position */
 	}
 
diff --git a/drivers/rtc/ds1307.c b/drivers/rtc/ds1307.c
index a33f47525f..17344d4d4f 100644
--- a/drivers/rtc/ds1307.c
+++ b/drivers/rtc/ds1307.c
@@ -16,6 +16,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c
index 9b31048e97..4986c96f86 100644
--- a/drivers/rtc/ds1337.c
+++ b/drivers/rtc/ds1337.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * (C) Copyright 2001-2008
+ * Copyright 2020 NXP
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  * Keith Outwater, keith_outwater@mvis.com`
  */
@@ -12,6 +13,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
@@ -60,6 +63,7 @@
 #define RTC_STAT_BIT_OSF	0x80	/* Oscillator stop flag		*/
 
 
+#if !CONFIG_IS_ENABLED(DM_RTC)
 static uchar rtc_read (uchar reg);
 static void rtc_write (uchar reg, uchar val);
 
@@ -188,3 +192,128 @@ static void rtc_write (uchar reg, uchar val)
 {
 	i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
 }
+#else
+static uchar rtc_read(struct udevice *dev, uchar reg)
+{
+	return dm_i2c_reg_read(dev, reg);
+}
+
+static void rtc_write(struct udevice *dev, uchar reg, uchar val)
+{
+	dm_i2c_reg_write(dev, reg, val);
+}
+
+static int ds1337_rtc_get(struct udevice *dev, struct rtc_time *tmp)
+{
+	int rel = 0;
+	uchar sec, min, hour, mday, wday, mon_cent, year, control, status;
+
+	control = rtc_read(dev, RTC_CTL_REG_ADDR);
+	status = rtc_read(dev, RTC_STAT_REG_ADDR);
+	sec = rtc_read(dev, RTC_SEC_REG_ADDR);
+	min = rtc_read(dev, RTC_MIN_REG_ADDR);
+	hour = rtc_read(dev, RTC_HR_REG_ADDR);
+	wday = rtc_read(dev, RTC_DAY_REG_ADDR);
+	mday = rtc_read(dev, RTC_DATE_REG_ADDR);
+	mon_cent = rtc_read(dev, RTC_MON_REG_ADDR);
+	year = rtc_read(dev, RTC_YR_REG_ADDR);
+
+	/* No century bit, assume year 2000 */
+#ifdef CONFIG_RTC_DS1388
+	mon_cent |= 0x80;
+#endif
+
+	debug("Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x\n",
+	      year, mon_cent, mday, wday);
+	debug("hr: %02x min: %02x sec: %02x control: %02x status: %02x\n",
+	      hour, min, sec, control, status);
+
+	if (status & RTC_STAT_BIT_OSF) {
+		printf("### Warning: RTC oscillator has stopped\n");
+		/* clear the OSF flag */
+		rtc_write(dev, RTC_STAT_REG_ADDR,
+			  rtc_read(dev, RTC_STAT_REG_ADDR) & ~RTC_STAT_BIT_OSF);
+		rel = -1;
+	}
+
+	tmp->tm_sec = bcd2bin(sec & 0x7F);
+	tmp->tm_min = bcd2bin(min & 0x7F);
+	tmp->tm_hour = bcd2bin(hour & 0x3F);
+	tmp->tm_mday = bcd2bin(mday & 0x3F);
+	tmp->tm_mon  = bcd2bin(mon_cent & 0x1F);
+	tmp->tm_year = bcd2bin(year) + ((mon_cent & 0x80) ? 2000 : 1900);
+	tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
+	tmp->tm_yday = 0;
+	tmp->tm_isdst = 0;
+
+	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	return rel;
+}
+
+static int ds1337_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
+{
+	uchar century;
+
+	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
+
+	century = (tmp->tm_year >= 2000) ? 0x80 : 0;
+	rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon) | century);
+
+	rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
+	rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
+	rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
+	rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
+	rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
+
+	return 0;
+}
+
+#ifdef CONFIG_RTC_DS1337_NOOSC
+ #define RTC_DS1337_RESET_VAL \
+	(RTC_CTL_BIT_INTCN | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
+#else
+ #define RTC_DS1337_RESET_VAL (RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS2)
+#endif
+static int ds1337_rtc_reset(struct udevice *dev)
+{
+#ifdef CONFIG_RTC_DS1337
+	rtc_write(dev, RTC_CTL_REG_ADDR, RTC_DS1337_RESET_VAL);
+#elif defined CONFIG_RTC_DS1388
+	rtc_write(dev, RTC_CTL_REG_ADDR, 0x0); /* hw default */
+#endif
+#ifdef CONFIG_RTC_DS1339_TCR_VAL
+	rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1339_TCR_VAL);
+#endif
+#ifdef CONFIG_RTC_DS1388_TCR_VAL
+	rtc_write(dev, RTC_TC_REG_ADDR, CONFIG_RTC_DS1388_TCR_VAL);
+#endif
+	return 0;
+}
+
+static const struct rtc_ops ds1337_rtc_ops = {
+	.get = ds1337_rtc_get,
+	.set = ds1337_rtc_set,
+	.reset = ds1337_rtc_reset,
+};
+
+static const struct udevice_id ds1337_rtc_ids[] = {
+	{ .compatible = "ds1337" },
+	{ .compatible = "ds1338" },
+	{ .compatible = "ds1338" },
+	{ }
+};
+
+U_BOOT_DRIVER(rtc_ds1337) = {
+	.name   = "rtc-ds1337",
+	.id     = UCLASS_RTC,
+	.of_match = ds1337_rtc_ids,
+	.ops    = &ds1337_rtc_ops,
+};
+#endif
diff --git a/drivers/rtc/ds3231.c b/drivers/rtc/ds3231.c
index eb5ce73a76..5b72e86768 100644
--- a/drivers/rtc/ds3231.c
+++ b/drivers/rtc/ds3231.c
@@ -17,6 +17,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/rtc/ds3232.c b/drivers/rtc/ds3232.c
index e3b3579c4a..0a30e0eabb 100644
--- a/drivers/rtc/ds3232.c
+++ b/drivers/rtc/ds3232.c
@@ -9,6 +9,7 @@
 #include <i2c.h>
 #include <rtc.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 /*
  * RTC register addresses
diff --git a/drivers/rtc/ftrtc010.c b/drivers/rtc/ftrtc010.c
index b68ea223f7..67c2b6e320 100644
--- a/drivers/rtc/ftrtc010.c
+++ b/drivers/rtc/ftrtc010.c
@@ -8,6 +8,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <rtc.h>
 #include <asm/io.h>
 
diff --git a/drivers/rtc/i2c_rtc_emul.c b/drivers/rtc/i2c_rtc_emul.c
index d4b33e59d6..a010af411b 100644
--- a/drivers/rtc/i2c_rtc_emul.c
+++ b/drivers/rtc/i2c_rtc_emul.c
@@ -16,6 +16,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <os.h>
 #include <rtc.h>
 #include <asm/rtc.h>
diff --git a/drivers/rtc/imxdi.c b/drivers/rtc/imxdi.c
index 39920f1a7a..e3a1393266 100644
--- a/drivers/rtc/imxdi.c
+++ b/drivers/rtc/imxdi.c
@@ -16,6 +16,7 @@
 #include <command.h>
 #include <linux/compat.h>
 #include <rtc.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/drivers/rtc/m41t11.c b/drivers/rtc/m41t11.c
index 960348bb3e..706b7188cf 100644
--- a/drivers/rtc/m41t11.c
+++ b/drivers/rtc/m41t11.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
@@ -109,9 +110,9 @@ int rtc_get (struct rtc_time *tmp)
 	tmp->tm_yday = 0;
 	tmp->tm_isdst= 0;
 
-	debug ( "Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
-		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
-		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+	debug("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
 
 	return rel;
 }
@@ -120,9 +121,9 @@ int rtc_set (struct rtc_time *tmp)
 {
 	uchar data[RTC_REG_CNT];
 
-	debug ( "Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
-		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
-		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+	debug("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
 
 	data[RTC_SEC_ADDR]    = bin2bcd(tmp->tm_sec) &  0x7F;/*just in case*/
 	data[RTC_MIN_ADDR]    = bin2bcd(tmp->tm_min);
diff --git a/drivers/rtc/m41t60.c b/drivers/rtc/m41t60.c
index 532d2105e1..692042b935 100644
--- a/drivers/rtc/m41t60.c
+++ b/drivers/rtc/m41t60.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c
index f52e1291a9..94a6b523aa 100644
--- a/drivers/rtc/m41t62.c
+++ b/drivers/rtc/m41t62.c
@@ -19,6 +19,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/rtc/max6900.c b/drivers/rtc/max6900.c
index b35186579a..11928839dc 100644
--- a/drivers/rtc/max6900.c
+++ b/drivers/rtc/max6900.c
@@ -14,6 +14,7 @@
 #include <command.h>
 #include <rtc.h>
 #include <i2c.h>
+#include <linux/delay.h>
 
 #ifndef	CONFIG_SYS_I2C_RTC_ADDR
 #define	CONFIG_SYS_I2C_RTC_ADDR	0x50
diff --git a/drivers/rtc/mvrtc.c b/drivers/rtc/mvrtc.c
index 94a065379c..6f49505d4e 100644
--- a/drivers/rtc/mvrtc.c
+++ b/drivers/rtc/mvrtc.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <rtc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include "mvrtc.h"
 
 /* This RTC does not support century, so we assume 20 */
diff --git a/drivers/rtc/pcf2127.c b/drivers/rtc/pcf2127.c
index f6953505a5..c423960b34 100644
--- a/drivers/rtc/pcf2127.c
+++ b/drivers/rtc/pcf2127.c
@@ -9,6 +9,7 @@
 #include <command.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <rtc.h>
 
 #define PCF2127_REG_CTRL1	0x00
@@ -56,7 +57,7 @@ static int pcf2127_rtc_set(struct udevice *dev, const struct rtc_time *tm)
 	buf[i++] = tm->tm_wday & 0x07;
 
 	/* month, 1 - 12 */
-	buf[i++] = bin2bcd(tm->tm_mon + 1);
+	buf[i++] = bin2bcd(tm->tm_mon);
 
 	/* year */
 	buf[i++] = bin2bcd(tm->tm_year % 100);
@@ -83,7 +84,7 @@ static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm)
 	tm->tm_min  = bcd2bin(buf[PCF2127_REG_MN] & 0x7F);
 	tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F);
 	tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F);
-	tm->tm_mon  = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1;
+	tm->tm_mon  = bcd2bin(buf[PCF2127_REG_MO] & 0x1F);
 	tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]) + 1900;
 	if (tm->tm_year < 1970)
 		tm->tm_year += 100;	/* assume we are in 1970...2069 */
diff --git a/drivers/rtc/pcf8563.c b/drivers/rtc/pcf8563.c
index 84f2b231c2..19faefba7c 100644
--- a/drivers/rtc/pcf8563.c
+++ b/drivers/rtc/pcf8563.c
@@ -13,6 +13,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
index 8bf04f26a3..1b6717232c 100644
--- a/drivers/rtc/pl031.c
+++ b/drivers/rtc/pl031.c
@@ -10,6 +10,7 @@
 #include <command.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <rtc.h>
 #include <asm/io.h>
 #include <asm/types.h>
diff --git a/drivers/rtc/pt7c4338.c b/drivers/rtc/pt7c4338.c
index 6a19fe1d23..c987494b66 100644
--- a/drivers/rtc/pt7c4338.c
+++ b/drivers/rtc/pt7c4338.c
@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright 2010 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  *
  * Author:	Priyanka Jain <Priyanka.Jain@freescale.com>
  */
@@ -19,6 +20,8 @@
 
 #include <common.h>
 #include <command.h>
+#include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
@@ -46,6 +49,7 @@
 #define RTC_PT7C4338_RESET_VAL \
 	(RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
 
+#if !CONFIG_IS_ENABLED(DM_RTC)
 /****** Helper functions ****************************************/
 static u8 rtc_read(u8 reg)
 {
@@ -125,3 +129,100 @@ void rtc_reset(void)
 	rtc_write(RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
 	rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
 }
+#else
+static u8 rtc_read(struct udevice *dev, u8 reg)
+{
+	return dm_i2c_reg_read(dev, reg);
+}
+
+static void rtc_write(struct udevice *dev, u8 reg, u8 val)
+{
+	dm_i2c_reg_write(dev, reg, val);
+}
+
+static int pt7c4338_rtc_get(struct udevice *dev, struct rtc_time *tmp)
+{
+	int ret = 0;
+	u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
+
+	ctl_stat = rtc_read(dev, RTC_CTL_STAT_REG_ADDR);
+	sec = rtc_read(dev, RTC_SEC_REG_ADDR);
+	min = rtc_read(dev, RTC_MIN_REG_ADDR);
+	hour = rtc_read(dev, RTC_HR_REG_ADDR);
+	wday = rtc_read(dev, RTC_DAY_REG_ADDR);
+	mday = rtc_read(dev, RTC_DATE_REG_ADDR);
+	mon = rtc_read(dev, RTC_MON_REG_ADDR);
+	year = rtc_read(dev, RTC_YR_REG_ADDR);
+	debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x\n",
+	      year, mon, mday, wday);
+	debug("hr: %02x min: %02x sec: %02x control_status: %02x\n",
+	      hour, min, sec, ctl_stat);
+
+	if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
+		printf("### Warning: RTC oscillator has stopped\n");
+		/* clear the OSF flag */
+		rtc_write(dev, RTC_CTL_STAT_REG_ADDR,
+			  rtc_read(dev,
+				   RTC_CTL_STAT_REG_ADDR)
+				   & ~RTC_CTL_STAT_BIT_OSF);
+		ret = -1;
+	}
+
+	tmp->tm_sec = bcd2bin(sec & 0x7F);
+	tmp->tm_min = bcd2bin(min & 0x7F);
+	tmp->tm_hour = bcd2bin(hour & 0x3F);
+	tmp->tm_mday = bcd2bin(mday & 0x3F);
+	tmp->tm_mon = bcd2bin(mon & 0x1F);
+	tmp->tm_year = bcd2bin(year) + 2000;
+	tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
+	tmp->tm_yday = 0;
+	tmp->tm_isdst = 0;
+	debug("Get DATE: %4d-%02d-%02d [wday=%d]  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	return ret;
+}
+
+static int pt7c4338_rtc_set(struct udevice *dev, const struct rtc_time *tmp)
+{
+	debug("Set DATE: %4d-%02d-%02d [wday=%d]  TIME: %2d:%02d:%02d\n",
+	      tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+	      tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	rtc_write(dev, RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
+	rtc_write(dev, RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
+	rtc_write(dev, RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
+	rtc_write(dev, RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
+	rtc_write(dev, RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
+	rtc_write(dev, RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
+	rtc_write(dev, RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
+
+	return 0;
+}
+
+static int pt7c4338_rtc_reset(struct udevice *dev)
+{
+	rtc_write(dev, RTC_SEC_REG_ADDR, 0x00);	/* clearing Clock Halt	*/
+	rtc_write(dev, RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
+	return 0;
+}
+
+static const struct rtc_ops pt7c4338_rtc_ops = {
+	.get = pt7c4338_rtc_get,
+	.set = pt7c4338_rtc_set,
+	.reset = pt7c4338_rtc_reset,
+};
+
+static const struct udevice_id pt7c4338_rtc_ids[] = {
+	{ .compatible = "pericom,pt7c4338" },
+	{ }
+};
+
+U_BOOT_DRIVER(rtc_pt7c4338) = {
+	.name   = "rtc-pt7c4338",
+	.id     = UCLASS_RTC,
+	.of_match = pt7c4338_rtc_ids,
+	.ops    = &pt7c4338_rtc_ops,
+};
+#endif
diff --git a/drivers/rtc/rtc-uclass.c b/drivers/rtc/rtc-uclass.c
index a0a238aedd..926cca234e 100644
--- a/drivers/rtc/rtc-uclass.c
+++ b/drivers/rtc/rtc-uclass.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <rtc.h>
 
 int dm_rtc_get(struct udevice *dev, struct rtc_time *time)
diff --git a/drivers/rtc/rv3029.c b/drivers/rtc/rv3029.c
index 87c4320d5f..3afe5b2fdd 100644
--- a/drivers/rtc/rv3029.c
+++ b/drivers/rtc/rv3029.c
@@ -12,8 +12,11 @@
 #include <dm.h>
 #include <eeprom.h>
 #include <i2c.h>
+#include <log.h>
 #include <rtc.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #define RTC_RV3029_PAGE_LEN             7
 
diff --git a/drivers/rtc/rv8803.c b/drivers/rtc/rv8803.c
index 2ab40f0833..acd50c6564 100644
--- a/drivers/rtc/rv8803.c
+++ b/drivers/rtc/rv8803.c
@@ -13,8 +13,10 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
+#include <linux/bitops.h>
 
 /*
  * RTC register addresses
diff --git a/drivers/rtc/rx8010sj.c b/drivers/rtc/rx8010sj.c
index 82c5185e2e..d513561b82 100644
--- a/drivers/rtc/rx8010sj.c
+++ b/drivers/rtc/rx8010sj.c
@@ -21,6 +21,7 @@
 #include <dm.h>
 #include <i2c.h>
 #include <rtc.h>
+#include <linux/bitops.h>
 
 /*---------------------------------------------------------------------*/
 /* #undef DEBUG_RTC */
diff --git a/drivers/rtc/s35392a.c b/drivers/rtc/s35392a.c
index 3bfe481403..80f55c8623 100644
--- a/drivers/rtc/s35392a.c
+++ b/drivers/rtc/s35392a.c
@@ -23,6 +23,7 @@
 #include <i2c.h>
 #include <linux/bitrev.h>
 #include <rtc.h>
+#include <linux/delay.h>
 
 #define S35390A_CHIP_ADDR	0x30
 
diff --git a/drivers/rtc/stm32_rtc.c b/drivers/rtc/stm32_rtc.c
index 3e12f57ce0..f9db318af1 100644
--- a/drivers/rtc/stm32_rtc.c
+++ b/drivers/rtc/stm32_rtc.c
@@ -9,6 +9,7 @@
 #include <rtc.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 
 #define STM32_RTC_TR		0x00
diff --git a/drivers/rtc/x1205.c b/drivers/rtc/x1205.c
index ed6aaa5237..ce23427b17 100644
--- a/drivers/rtc/x1205.c
+++ b/drivers/rtc/x1205.c
@@ -19,6 +19,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <rtc.h>
 #include <i2c.h>
 
diff --git a/drivers/scsi/scsi.c b/drivers/scsi/scsi.c
index 69de6a53d5..0ab1d441f4 100644
--- a/drivers/scsi/scsi.c
+++ b/drivers/scsi/scsi.c
@@ -5,8 +5,12 @@
  */
 
 #include <common.h>
+#include <blk.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <env.h>
+#include <log.h>
+#include <part.h>
 #include <pci.h>
 #include <scsi.h>
 #include <dm/device-internal.h>
diff --git a/drivers/serial/altera_jtag_uart.c b/drivers/serial/altera_jtag_uart.c
index 86c3de4e45..7a86161a0d 100644
--- a/drivers/serial/altera_jtag_uart.c
+++ b/drivers/serial/altera_jtag_uart.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <serial.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* data register */
 #define ALTERA_JTAG_RVALID	BIT(15)	/* Read valid */
diff --git a/drivers/serial/altera_uart.c b/drivers/serial/altera_uart.c
index 436cf2331d..f88a293d56 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/serial/altera_uart.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <serial.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* status register */
 #define ALTERA_UART_TMT		BIT(5)	/* tx empty */
diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index 98d209072d..71cb31ff75 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -14,6 +14,7 @@
 #include <serial.h>
 #include <debug_uart.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #ifdef CONFIG_DM_SERIAL
diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c
index 6415d2e1e5..cca798d7e4 100644
--- a/drivers/serial/ns16550.c
+++ b/drivers/serial/ns16550.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <ns16550.h>
 #include <reset.h>
 #include <serial.h>
diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 7703c67492..a0af0e6bfd 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -15,6 +15,7 @@
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/of_access.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index baeaeaac8e..da017dc5b3 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -12,6 +12,7 @@
 #include <post.h>
 #include <linux/compiler.h>
 #include <errno.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/serial/serial_ar933x.c b/drivers/serial/serial_ar933x.c
index 897ea5d6dc..382c3b3d34 100644
--- a/drivers/serial/serial_ar933x.c
+++ b/drivers/serial/serial_ar933x.c
@@ -13,6 +13,7 @@
 #include <asm/addrspace.h>
 #include <asm/types.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <mach/ar71xx_regs.h>
 
 #define AR933X_UART_DATA_REG            0x00
diff --git a/drivers/serial/serial_bcm283x_mu.c b/drivers/serial/serial_bcm283x_mu.c
index a6ffc84b96..0102b10ed2 100644
--- a/drivers/serial/serial_bcm283x_mu.c
+++ b/drivers/serial/serial_bcm283x_mu.c
@@ -23,6 +23,7 @@
 #include <serial.h>
 #include <dm/platform_data/serial_bcm283x_mu.h>
 #include <dm/pinctrl.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 
 struct bcm283x_mu_regs {
@@ -74,16 +75,6 @@ out:
 	return 0;
 }
 
-static int bcm283x_mu_serial_probe(struct udevice *dev)
-{
-	struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
-	struct bcm283x_mu_priv *priv = dev_get_priv(dev);
-
-	priv->regs = (struct bcm283x_mu_regs *)plat->base;
-
-	return 0;
-}
-
 static int bcm283x_mu_serial_getc(struct udevice *dev)
 {
 	struct bcm283x_mu_priv *priv = dev_get_priv(dev);
@@ -165,15 +156,21 @@ static bool bcm283x_is_serial_muxed(void)
 	return true;
 }
 
-static int bcm283x_mu_serial_ofdata_to_platdata(struct udevice *dev)
+static int bcm283x_mu_serial_probe(struct udevice *dev)
 {
 	struct bcm283x_mu_serial_platdata *plat = dev_get_platdata(dev);
+	struct bcm283x_mu_priv *priv = dev_get_priv(dev);
 	fdt_addr_t addr;
 
 	/* Don't spawn the device if it's not muxed */
 	if (!bcm283x_is_serial_muxed())
 		return -ENODEV;
 
+	/*
+	 * Read the ofdata here rather than in an ofdata_to_platdata() method
+	 * since we need the soc simple-bus to be probed so that the 'ranges'
+	 * property is used.
+	 */
 	addr = devfdt_get_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
@@ -187,6 +184,8 @@ static int bcm283x_mu_serial_ofdata_to_platdata(struct udevice *dev)
 	 */
 	plat->skip_init = true;
 
+	priv->regs = (struct bcm283x_mu_regs *)plat->base;
+
 	return 0;
 }
 #endif
@@ -195,7 +194,6 @@ U_BOOT_DRIVER(serial_bcm283x_mu) = {
 	.name = "serial_bcm283x_mu",
 	.id = UCLASS_SERIAL,
 	.of_match = of_match_ptr(bcm283x_mu_serial_id),
-	.ofdata_to_platdata = of_match_ptr(bcm283x_mu_serial_ofdata_to_platdata),
 	.platdata_auto_alloc_size = sizeof(struct bcm283x_mu_serial_platdata),
 	.probe = bcm283x_mu_serial_probe,
 	.ops = &bcm283x_mu_serial_ops,
diff --git a/drivers/serial/serial_bcm283x_pl011.c b/drivers/serial/serial_bcm283x_pl011.c
index 7d8ab7b716..923f402fbe 100644
--- a/drivers/serial/serial_bcm283x_pl011.c
+++ b/drivers/serial/serial_bcm283x_pl011.c
@@ -33,7 +33,7 @@ static bool bcm283x_is_serial_muxed(void)
 	return true;
 }
 
-static int bcm283x_pl011_serial_ofdata_to_platdata(struct udevice *dev)
+static int bcm283x_pl011_serial_probe(struct udevice *dev)
 {
 	struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
 	int ret;
@@ -42,6 +42,11 @@ static int bcm283x_pl011_serial_ofdata_to_platdata(struct udevice *dev)
 	if (!bcm283x_is_serial_muxed())
 		return -ENODEV;
 
+	/*
+	 * Read the ofdata here rather than in an ofdata_to_platdata() method
+	 * since we need the soc simple-bus to be probed so that the 'ranges'
+	 * property is used.
+	 */
 	ret = pl01x_serial_ofdata_to_platdata(dev);
 	if (ret)
 		return ret;
@@ -52,7 +57,7 @@ static int bcm283x_pl011_serial_ofdata_to_platdata(struct udevice *dev)
 	 */
 	plat->skip_init = true;
 
-	return 0;
+	return pl01x_serial_probe(dev);
 }
 
 static int bcm283x_pl011_serial_setbrg(struct udevice *dev, int baudrate)
@@ -86,9 +91,8 @@ U_BOOT_DRIVER(bcm283x_pl011_uart) = {
 	.name	= "bcm283x_pl011",
 	.id	= UCLASS_SERIAL,
 	.of_match = of_match_ptr(bcm283x_pl011_serial_id),
-	.ofdata_to_platdata = of_match_ptr(bcm283x_pl011_serial_ofdata_to_platdata),
+	.probe	= bcm283x_pl011_serial_probe,
 	.platdata_auto_alloc_size = sizeof(struct pl01x_serial_platdata),
-	.probe	= pl01x_serial_probe,
 	.ops	= &bcm283x_pl011_serial_ops,
 #if !CONFIG_IS_ENABLED(OF_CONTROL) || CONFIG_IS_ENABLED(OF_BOARD)
 	.flags	= DM_FLAG_PRE_RELOC,
diff --git a/drivers/serial/serial_cortina.c b/drivers/serial/serial_cortina.c
index 4f227bfe0a..cc20673efe 100644
--- a/drivers/serial/serial_cortina.c
+++ b/drivers/serial/serial_cortina.c
@@ -11,6 +11,7 @@
 #include <watchdog.h>
 #include <asm/io.h>
 #include <serial.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 
 /* Register definitions */
diff --git a/drivers/serial/serial_efi.c b/drivers/serial/serial_efi.c
index dd3e511fc9..b152e10258 100644
--- a/drivers/serial/serial_efi.c
+++ b/drivers/serial/serial_efi.c
@@ -11,6 +11,7 @@
 #include <efi_api.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/compiler.h>
 #include <asm/io.h>
 #include <serial.h>
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 3b53f5a97b..0c63c41270 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -8,10 +8,12 @@
 #include <clk.h>
 #include <dm.h>
 #include <fsl_lpuart.h>
+#include <log.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <serial.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c
index b3dad77aa2..439057b1b9 100644
--- a/drivers/serial/serial_meson.c
+++ b/drivers/serial/serial_meson.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index e63f2306f0..778a04d87e 100644
--- a/drivers/serial/serial_mtk.c
+++ b/drivers/serial/serial_mtk.c
@@ -11,6 +11,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <serial.h>
 #include <watchdog.h>
 #include <asm/io.h>
diff --git a/drivers/serial/serial_omap.c b/drivers/serial/serial_omap.c
index 4d4d919358..f7997fc788 100644
--- a/drivers/serial/serial_omap.c
+++ b/drivers/serial/serial_omap.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dt-structs.h>
+#include <log.h>
 #include <ns16550.h>
 #include <serial.h>
 #include <clk.h>
diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
index bb60ca2d9b..2651a45a7f 100644
--- a/drivers/serial/serial_owl.c
+++ b/drivers/serial/serial_owl.c
@@ -14,6 +14,7 @@
 #include <serial.h>
 #include <asm/io.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 /* UART Registers */
 #define	OWL_UART_CTL			(0x0000)
diff --git a/drivers/serial/serial_pic32.c b/drivers/serial/serial_pic32.c
index bac506ed79..a492063e39 100644
--- a/drivers/serial/serial_pic32.c
+++ b/drivers/serial/serial_pic32.c
@@ -9,6 +9,7 @@
 #include <malloc.h>
 #include <serial.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 #include <mach/pic32.h>
 #include <dt-bindings/clock/microchip,clock.h>
 
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 2a5f256184..6e5d81ce34 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -11,7 +11,10 @@
 /* Simple U-Boot driver for the PrimeCell PL010/PL011 UARTs */
 
 #include <common.h>
+/* For get_bus_freq() */
+#include <clock_legacy.h>
 #include <dm.h>
+#include <clk.h>
 #include <errno.h>
 #include <watchdog.h>
 #include <asm/io.h>
@@ -149,21 +152,24 @@ static int pl01x_generic_setbrg(struct pl01x_regs *regs, enum pl01x_type type,
 		unsigned int remainder;
 		unsigned int fraction;
 
-		/*
-		* Set baud rate
-		*
-		* IBRD = UART_CLK / (16 * BAUD_RATE)
-		* FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE)))
-		*		/ (16 * BAUD_RATE))
-		*/
-		temp = 16 * baudrate;
-		divider = clock / temp;
-		remainder = clock % temp;
-		temp = (8 * remainder) / baudrate;
-		fraction = (temp >> 1) + (temp & 1);
-
-		writel(divider, &regs->pl011_ibrd);
-		writel(fraction, &regs->pl011_fbrd);
+		/* Without a valid clock rate we cannot set up the baudrate. */
+		if (clock) {
+			/*
+			 * Set baud rate
+			 *
+			 * IBRD = UART_CLK / (16 * BAUD_RATE)
+			 * FBRD = RND((64 * MOD(UART_CLK,(16 * BAUD_RATE)))
+			 *		/ (16 * BAUD_RATE))
+			 */
+			temp = 16 * baudrate;
+			divider = clock / temp;
+			remainder = clock % temp;
+			temp = (8 * remainder) / baudrate;
+			fraction = (temp >> 1) + (temp & 1);
+
+			writel(divider, &regs->pl011_ibrd);
+			writel(fraction, &regs->pl011_fbrd);
+		}
 
 		pl011_set_line_control(regs);
 		/* Finally, enable the UART */
@@ -337,17 +343,28 @@ static const struct udevice_id pl01x_serial_id[] ={
 	{}
 };
 
+#ifndef CONFIG_PL011_CLOCK
+#define CONFIG_PL011_CLOCK 0
+#endif
+
 int pl01x_serial_ofdata_to_platdata(struct udevice *dev)
 {
 	struct pl01x_serial_platdata *plat = dev_get_platdata(dev);
+	struct clk clk;
 	fdt_addr_t addr;
+	int ret;
 
 	addr = devfdt_get_addr(dev);
 	if (addr == FDT_ADDR_T_NONE)
 		return -EINVAL;
 
 	plat->base = addr;
-	plat->clock = dev_read_u32_default(dev, "clock", 1);
+	plat->clock = dev_read_u32_default(dev, "clock", CONFIG_PL011_CLOCK);
+	ret = clk_get_by_index(dev, 0, &clk);
+	if (!ret) {
+		clk_enable(&clk);
+		plat->clock = clk_get_rate(&clk);
+	}
 	plat->type = dev_get_driver_data(dev);
 	plat->skip_init = dev_read_bool(dev, "skip-init");
 
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index acfcc2954a..5f45d58e58 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -15,6 +15,7 @@
 #include <serial.h>
 #include <linux/compiler.h>
 #include <dm/platform_data/serial_sh.h>
+#include <linux/delay.h>
 #include "serial_sh.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
index 5a02f0c8fe..fcc47fb348 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <linux/compiler.h>
diff --git a/drivers/serial/serial_sti_asc.c b/drivers/serial/serial_sti_asc.c
index c972f1e9af..5fbbfac820 100644
--- a/drivers/serial/serial_sti_asc.c
+++ b/drivers/serial/serial_sti_asc.c
@@ -8,8 +8,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <serial.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index 016082814f..e77b90670a 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -7,11 +7,14 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <reset.h>
 #include <serial.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <asm/arch/stm32.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "serial_stm32.h"
 #include <dm/device_compat.h>
 
diff --git a/drivers/serial/serial_stm32.h b/drivers/serial/serial_stm32.h
index 7b0c53145e..5737651888 100644
--- a/drivers/serial/serial_stm32.h
+++ b/drivers/serial/serial_stm32.h
@@ -7,6 +7,7 @@
 #ifndef _SERIAL_STM32_
 #define _SERIAL_STM32_
 
+#include <linux/bitops.h>
 #define CR1_OFFSET(x)	(x ? 0x0c : 0x00)
 #define CR3_OFFSET(x)	(x ? 0x14 : 0x08)
 #define BRR_OFFSET(x)	(x ? 0x08 : 0x0c)
diff --git a/drivers/serial/serial_xuartlite.c b/drivers/serial/serial_xuartlite.c
index 1be777bd3b..f29a9a0b56 100644
--- a/drivers/serial/serial_xuartlite.c
+++ b/drivers/serial/serial_xuartlite.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <serial.h>
 
diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c
index 0dd6cec82a..0e71cada1b 100644
--- a/drivers/serial/serial_zynq.c
+++ b/drivers/serial/serial_zynq.c
@@ -10,9 +10,11 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/compiler.h>
 #include <serial.h>
 #include <linux/err.h>
diff --git a/drivers/smem/msm_smem.c b/drivers/smem/msm_smem.c
index 5557fd29ce..2557269bc5 100644
--- a/drivers/smem/msm_smem.c
+++ b/drivers/smem/msm_smem.c
@@ -13,6 +13,7 @@
 #include <dm/of_access.h>
 #include <dm/of_addr.h>
 #include <asm/io.h>
+#include <linux/bug.h>
 #include <linux/err.h>
 #include <linux/ioport.h>
 #include <linux/io.h>
diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c
index c5661c52fa..ecc4b8b5a0 100644
--- a/drivers/soc/ti/k3-navss-ringacc.c
+++ b/drivers/soc/ti/k3-navss-ringacc.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <malloc.h>
 #include <asm/bitops.h>
@@ -15,6 +17,7 @@
 #include <dm/devres.h>
 #include <dm/read.h>
 #include <dm/uclass.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
diff --git a/drivers/soc/ti/keystone_serdes.c b/drivers/soc/ti/keystone_serdes.c
index 7907e6f977..2ece1a8f64 100644
--- a/drivers/soc/ti/keystone_serdes.c
+++ b/drivers/soc/ti/keystone_serdes.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <common.h>
 #include <asm/ti-common/keystone_serdes.h>
+#include <linux/bitops.h>
 
 #define SERDES_CMU_REGS(x)		(0x0000 + (0x0c00 * (x)))
 #define SERDES_LANE_REGS(x)		(0x0200 + (0x200 * (x)))
diff --git a/drivers/sound/broadwell_i2s.c b/drivers/sound/broadwell_i2s.c
index 3d577401bd..adb0b2b104 100644
--- a/drivers/sound/broadwell_i2s.c
+++ b/drivers/sound/broadwell_i2s.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include "broadwell_i2s.h"
diff --git a/drivers/sound/hda_codec.c b/drivers/sound/hda_codec.c
index 572ef693cc..4154d29399 100644
--- a/drivers/sound/hda_codec.c
+++ b/drivers/sound/hda_codec.c
@@ -10,10 +10,13 @@
 #include <common.h>
 #include <dm.h>
 #include <hda_codec.h>
+#include <log.h>
 #include <pci.h>
 #include <sound.h>
 #include <asm/io.h>
 #include <dt-bindings/sound/azalia.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /**
  * struct hda_regs - HDA registers
diff --git a/drivers/sound/ivybridge_sound.c b/drivers/sound/ivybridge_sound.c
index 101046f9c2..bc3c1e85f8 100644
--- a/drivers/sound/ivybridge_sound.c
+++ b/drivers/sound/ivybridge_sound.c
@@ -15,8 +15,10 @@
 #include <common.h>
 #include <dm.h>
 #include <hda_codec.h>
+#include <log.h>
 #include <pch.h>
 #include <sound.h>
+#include <linux/bitops.h>
 
 static int bd82x6x_azalia_probe(struct udevice *dev)
 {
diff --git a/drivers/sound/max98088.c b/drivers/sound/max98088.c
index 332254d5aa..5b4c489f4b 100644
--- a/drivers/sound/max98088.c
+++ b/drivers/sound/max98088.c
@@ -14,6 +14,7 @@
 #include <dm.h>
 #include <i2c.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
 #include "maxim_codec.h"
diff --git a/drivers/sound/max98088.h b/drivers/sound/max98088.h
index 127d2bda30..b1307a7362 100644
--- a/drivers/sound/max98088.h
+++ b/drivers/sound/max98088.h
@@ -9,6 +9,7 @@
 #define _MAX98088_H
 
 /* MAX98088 Registers Definition */
+#include <linux/bitops.h>
 #define M98088_REG_IRQ_STATUS		0x00
 #define M98088_REG_MIC_STATUS		0x01
 #define M98088_REG_JACK_STAUS		0x02
diff --git a/drivers/sound/max98090.c b/drivers/sound/max98090.c
index 5505c35166..d23955d6e1 100644
--- a/drivers/sound/max98090.c
+++ b/drivers/sound/max98090.c
@@ -11,8 +11,10 @@
 #include <dm.h>
 #include <i2c.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 #include "maxim_codec.h"
 #include "max98090.h"
 
diff --git a/drivers/sound/max98095.c b/drivers/sound/max98095.c
index 9e08e96670..5037f9516f 100644
--- a/drivers/sound/max98095.c
+++ b/drivers/sound/max98095.c
@@ -13,6 +13,7 @@
 #include <div64.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
 #include "i2s.h"
diff --git a/drivers/sound/maxim_codec.c b/drivers/sound/maxim_codec.c
index 5480dce108..31e67ee672 100644
--- a/drivers/sound/maxim_codec.c
+++ b/drivers/sound/maxim_codec.c
@@ -9,6 +9,7 @@
 #include <div64.h>
 #include <i2c.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/drivers/sound/rockchip_i2s.c b/drivers/sound/rockchip_i2s.c
index e5df8ca0d2..4e9e68aaac 100644
--- a/drivers/sound/rockchip_i2s.c
+++ b/drivers/sound/rockchip_i2s.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 struct rk_i2s_regs {
 	u32 txcr;		/* I2S_TXCR, 0x00 */
diff --git a/drivers/sound/rockchip_sound.c b/drivers/sound/rockchip_sound.c
index a092dbc445..94058e603d 100644
--- a/drivers/sound/rockchip_sound.c
+++ b/drivers/sound/rockchip_sound.c
@@ -11,6 +11,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <misc.h>
 #include <sound.h>
 #include <asm/arch-rockchip/periph.h>
diff --git a/drivers/sound/rt5677.c b/drivers/sound/rt5677.c
index 64776055d9..16aa9dfc5b 100644
--- a/drivers/sound/rt5677.c
+++ b/drivers/sound/rt5677.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <i2c.h>
 #include "rt5677.h"
+#include <log.h>
 
 struct rt5677_priv {
 	struct udevice *dev;
diff --git a/drivers/sound/samsung-i2s.c b/drivers/sound/samsung-i2s.c
index 104584073a..aa1d6bb209 100644
--- a/drivers/sound/samsung-i2s.c
+++ b/drivers/sound/samsung-i2s.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/arch/clk.h>
 #include <asm/arch/pinmux.h>
diff --git a/drivers/sound/samsung_sound.c b/drivers/sound/samsung_sound.c
index b6952675bd..473cedf7e9 100644
--- a/drivers/sound/samsung_sound.c
+++ b/drivers/sound/samsung_sound.c
@@ -8,6 +8,7 @@
 #include <audio_codec.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
 #include <asm/arch/power.h>
diff --git a/drivers/sound/sandbox.c b/drivers/sound/sandbox.c
index 9034a8385a..0686add3c8 100644
--- a/drivers/sound/sandbox.c
+++ b/drivers/sound/sandbox.c
@@ -9,6 +9,7 @@
 #include <audio_codec.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/sdl.h>
 
diff --git a/drivers/sound/sound-uclass.c b/drivers/sound/sound-uclass.c
index d9b3a38f18..92f4b0b924 100644
--- a/drivers/sound/sound-uclass.c
+++ b/drivers/sound/sound-uclass.c
@@ -7,8 +7,10 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <malloc.h>
 #include <sound.h>
+#include <linux/delay.h>
 
 #define SOUND_BITS_IN_BYTE 8
 
diff --git a/drivers/sound/sound.c b/drivers/sound/sound.c
index dd3f9db4f7..b0eab23391 100644
--- a/drivers/sound/sound.c
+++ b/drivers/sound/sound.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <sound.h>
 
 void sound_create_square_wave(uint sample_rate, unsigned short *data, int size,
diff --git a/drivers/sound/tegra_ahub.c b/drivers/sound/tegra_ahub.c
index c71fce9bb1..26d457255c 100644
--- a/drivers/sound/tegra_ahub.c
+++ b/drivers/sound/tegra_ahub.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <misc.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/tegra_ahub.h>
diff --git a/drivers/sound/tegra_i2s.c b/drivers/sound/tegra_i2s.c
index 8022dbba64..5cf82250da 100644
--- a/drivers/sound/tegra_i2s.c
+++ b/drivers/sound/tegra_i2s.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <misc.h>
 #include <sound.h>
 #include <asm/io.h>
diff --git a/drivers/sound/tegra_sound.c b/drivers/sound/tegra_sound.c
index 7c2ed53f5a..aef6a2eb14 100644
--- a/drivers/sound/tegra_sound.c
+++ b/drivers/sound/tegra_sound.c
@@ -10,6 +10,7 @@
 #include <audio_codec.h>
 #include <dm.h>
 #include <i2s.h>
+#include <log.h>
 #include <misc.h>
 #include <sound.h>
 #include <asm/gpio.h>
diff --git a/drivers/sound/wm8994.c b/drivers/sound/wm8994.c
index b290c4e879..367e144541 100644
--- a/drivers/sound/wm8994.c
+++ b/drivers/sound/wm8994.c
@@ -10,6 +10,7 @@
 #include <fdtdec.h>
 #include <i2c.h>
 #include <i2s.h>
+#include <log.h>
 #include <sound.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 4166c6104e..59415209ee 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -141,6 +141,14 @@ config FSL_DSPI
 	  this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
 	  use this driver.
 
+config FSL_QSPI
+	bool "Freescale QSPI driver"
+	imply SPI_FLASH_BAR
+	help
+	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
+	  used to access the SPI NOR flash on platforms embedding this
+	  Freescale IP core.
+
 config ICH_SPI
 	bool "Intel ICH SPI driver"
 	help
@@ -167,6 +175,13 @@ config MPC8XXX_SPI
 	help
 	  Enable support for SPI on the MPC8XXX PowerPC SoCs.
 
+config MSCC_BB_SPI
+	bool "MSCC bitbang SPI driver"
+	depends on SOC_VCOREIII
+	help
+	  Enable MSCC bitbang SPI driver. This driver can be used on
+	  MSCC SOCs.
+
 config MT7621_SPI
 	bool "MediaTek MT7621 SPI driver"
 	depends on SOC_MT7628
@@ -377,19 +392,6 @@ config SOFT_SPI
 	 Enable Soft SPI driver. This driver is to use GPIO simulate
 	 the SPI protocol.
 
-config MSCC_BB_SPI
-	bool "MSCC bitbang SPI driver"
-	depends on SOC_VCOREIII
-	help
-	  Enable MSCC bitbang SPI driver. This driver can be used on
-	  MSCC SOCs.
-
-config CF_SPI
-	bool "ColdFire SPI driver"
-	help
-	  Enable the ColdFire SPI driver. This driver can be used on
-	  some m68k SoCs.
-
 config FSL_ESPI
 	bool "Freescale eSPI driver"
 	imply SPI_FLASH_BAR
@@ -398,27 +400,12 @@ config FSL_ESPI
 	  access the SPI interface and SPI NOR flash on platforms embedding
 	  this Freescale eSPI IP core.
 
-config FSL_QSPI
-	bool "Freescale QSPI driver"
-	imply SPI_FLASH_BAR
-	help
-	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
-	  used to access the SPI NOR flash on platforms embedding this
-	  Freescale IP core.
-
 config DAVINCI_SPI
 	bool "Davinci & Keystone SPI driver"
 	depends on ARCH_DAVINCI || ARCH_KEYSTONE
 	help
 	  Enable the Davinci SPI driver
 
-config SH_SPI
-	bool "SuperH SPI driver"
-	depends on DEPRECATED
-	help
-	  Enable the SuperH SPI controller driver. This driver can be used
-	  on various SuperH SoCs, such as SH7757.
-
 config SH_QSPI
 	bool "Renesas Quad SPI driver"
 	help
@@ -431,12 +418,6 @@ config KIRKWOOD_SPI
 	  Enable support for SPI on various Marvell SoCs, such as
 	  Kirkwood and Armada 375.
 
-config LPC32XX_SSP
-	bool "LPC32XX SPI Driver"
-	depends on DEPRECATED
-	help
-	  Enable support for SPI on LPC32xx
-
 config MXC_SPI
 	bool "MXC SPI Driver"
 	help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 52462e19a3..342776404a 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,7 +33,6 @@ obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
 obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o
 obj-$(CONFIG_ICH_SPI) +=  ich.o
 obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
-obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o
 obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
 obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
 obj-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
@@ -53,7 +52,6 @@ obj-$(CONFIG_ROCKCHIP_SPI) += rk_spi.o
 obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o
 obj-$(CONFIG_SPI_SIFIVE) += spi-sifive.o
 obj-$(CONFIG_SPI_SUNXI) += spi-sunxi.o
-obj-$(CONFIG_SH_SPI) += sh_spi.o
 obj-$(CONFIG_SH_QSPI) += sh_qspi.o
 obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o
 obj-$(CONFIG_STM32_SPI) += stm32_spi.o
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index e24deb4f71..3aa7a40b77 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -9,10 +9,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <fdtdec.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define ALTERA_SPI_STATUS_RRDY_MSK	BIT(7)
 #define ALTERA_SPI_CONTROL_SSO_MSK	BIT(10)
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index e0cc323444..328b16c277 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
index a6c3939db5..9320a8be68 100644
--- a/drivers/spi/atmel-quadspi.c
+++ b/drivers/spi/atmel-quadspi.c
@@ -17,6 +17,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
diff --git a/drivers/spi/atmel_spi.h b/drivers/spi/atmel_spi.h
index 76b8556c98..6167bd164b 100644
--- a/drivers/spi/atmel_spi.h
+++ b/drivers/spi/atmel_spi.h
@@ -3,6 +3,7 @@
  */
 
 /* Register offsets */
+#include <linux/bitops.h>
 #define ATMEL_SPI_CR			0x0000
 #define ATMEL_SPI_MR			0x0004
 #define ATMEL_SPI_RDR			0x0008
diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c
index f88702df4d..f30a8a42bd 100644
--- a/drivers/spi/bcm63xx_hsspi.c
+++ b/drivers/spi/bcm63xx_hsspi.c
@@ -10,11 +10,13 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <reset.h>
 #include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define HSSPI_PP			0
 
diff --git a/drivers/spi/bcm63xx_spi.c b/drivers/spi/bcm63xx_spi.c
index 719f53d08e..acc1a493c4 100644
--- a/drivers/spi/bcm63xx_spi.c
+++ b/drivers/spi/bcm63xx_spi.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <reset.h>
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 83b114ffe7..1e85749209 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <asm-generic/io.h>
 #include <dm.h>
 #include <fdtdec.h>
@@ -166,11 +167,28 @@ static int cadence_spi_probe(struct udevice *bus)
 {
 	struct cadence_spi_platdata *plat = bus->platdata;
 	struct cadence_spi_priv *priv = dev_get_priv(bus);
+	struct clk clk;
 	int ret;
 
 	priv->regbase = plat->regbase;
 	priv->ahbbase = plat->ahbbase;
 
+	if (plat->ref_clk_hz == 0) {
+		ret = clk_get_by_index(bus, 0, &clk);
+		if (ret) {
+#ifdef CONFIG_CQSPI_REF_CLK
+			plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK;
+#else
+			return ret;
+#endif
+		} else {
+			plat->ref_clk_hz = clk_get_rate(&clk);
+			clk_free(&clk);
+			if (IS_ERR_VALUE(plat->ref_clk_hz))
+				return plat->ref_clk_hz;
+		}
+	}
+
 	ret = reset_get_bulk(bus, &priv->resets);
 	if (ret)
 		dev_warn(bus, "Can't get reset: %d\n", ret);
@@ -268,8 +286,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 {
 	struct cadence_spi_platdata *plat = bus->platdata;
 	ofnode subnode;
-	struct clk clk;
-	int ret;
 
 	plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
 	plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
@@ -305,20 +321,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 	plat->tchsh_ns = ofnode_read_u32_default(subnode, "cdns,tchsh-ns", 20);
 	plat->tslch_ns = ofnode_read_u32_default(subnode, "cdns,tslch-ns", 20);
 
-	ret = clk_get_by_index(bus, 0, &clk);
-	if (ret) {
-#ifdef CONFIG_CQSPI_REF_CLK
-		plat->ref_clk_hz = CONFIG_CQSPI_REF_CLK;
-#else
-		return ret;
-#endif
-	} else {
-		plat->ref_clk_hz = clk_get_rate(&clk);
-		clk_free(&clk);
-		if (IS_ERR_VALUE(plat->ref_clk_hz))
-			return plat->ref_clk_hz;
-	}
-
 	debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n",
 	      __func__, plat->regbase, plat->ahbbase, plat->max_hz,
 	      plat->page_size);
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 0a5af05614..f9675f75a4 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -26,8 +26,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dma.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <wait_bit.h>
 #include <spi.h>
diff --git a/drivers/spi/cf_spi.c b/drivers/spi/cf_spi.c
index 923ff6f311..dec92df69b 100644
--- a/drivers/spi/cf_spi.c
+++ b/drivers/spi/cf_spi.c
@@ -15,6 +15,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/platform_data/spi_coldfire.h>
 #include <spi.h>
 #include <malloc.h>
@@ -382,10 +383,6 @@ static int coldfire_spi_probe(struct udevice *bus)
 	return 0;
 }
 
-void spi_init(void)
-{
-}
-
 #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
 static int coldfire_dspi_ofdata_to_platdata(struct udevice *bus)
 {
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 4d2c106440..97ac97b1a5 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -9,12 +9,15 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spi.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/arch/hardware.h>
 #include <dm.h>
 #include <dm/platform_data/spi_davinci.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /* SPIGCR0 */
 #define SPIGCR0_SPIENA_MASK	0x1
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 2dc16736a3..c9b14f9029 100644
--- a/drivers/spi/designware_spi.c
+++ b/drivers/spi/designware_spi.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm-generic/gpio.h>
 #include <clk.h>
 #include <dm.h>
@@ -19,6 +20,7 @@
 #include <fdtdec.h>
 #include <reset.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/iopoll.h>
 #include <asm/io.h>
diff --git a/drivers/spi/exynos_spi.c b/drivers/spi/exynos_spi.c
index d682a11013..746686a18a 100644
--- a/drivers/spi/exynos_spi.c
+++ b/drivers/spi/exynos_spi.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <fdtdec.h>
@@ -18,6 +19,7 @@
 #include <asm/arch/pinmux.h>
 #include <asm/arch/spi.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index a68a51945e..1cdb233110 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -13,6 +13,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <common.h>
+#include <log.h>
 #include <spi.h>
 #include <malloc.h>
 #include <asm/io.h>
@@ -21,6 +22,8 @@
 #include <asm/arch/clock.h>
 #endif
 #include <fsl_dspi.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index 7444ae1a06..50d194f614 100644
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -7,6 +7,9 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <malloc.h>
 #include <spi.h>
diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c
index 8e2a09df36..e715f9838f 100644
--- a/drivers/spi/fsl_qspi.c
+++ b/drivers/spi/fsl_qspi.c
@@ -1,1142 +1,787 @@
 // SPDX-License-Identifier: GPL-2.0+
+
 /*
- * Copyright 2013-2015 Freescale Semiconductor, Inc.
+ * Freescale QuadSPI driver.
+ *
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ * Copyright (C) 2018 Bootlin
+ * Copyright (C) 2018 exceet electronics GmbH
+ * Copyright (C) 2018 Kontron Electronics GmbH
+ * Copyright 2019-2020 NXP
+ *
+ * This driver is a ported version of Linux Freescale QSPI driver taken from
+ * v5.5-rc1 tag having following information.
  *
- * Freescale Quad Serial Peripheral Interface (QSPI) driver
+ * Transition to SPI MEM interface:
+ * Authors:
+ *     Boris Brezillon <bbrezillon@kernel.org>
+ *     Frieder Schrempf <frieder.schrempf@kontron.de>
+ *     Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
+ *     Suresh Gupta <suresh.gupta@nxp.com>
+ *
+ * Based on the original fsl-quadspi.c spi-nor driver.
+ * Transition to spi-mem in spi-fsl-qspi.c
  */
 
 #include <common.h>
-#include <malloc.h>
-#include <spi.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/libfdt.h>
 #include <linux/sizes.h>
 #include <linux/iopoll.h>
 #include <dm.h>
-#include <errno.h>
-#include <watchdog.h>
-#include <wait_bit.h>
-#include "fsl_qspi.h"
+#include <linux/iopoll.h>
+#include <linux/sizes.h>
+#include <linux/err.h>
+#include <spi.h>
+#include <spi-mem.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define OFFSET_BITS_MASK	GENMASK(23, 0)
-
-#define FLASH_STATUS_WEL	0x02
-
-/* SEQID */
-#define SEQID_WREN		1
-#define SEQID_FAST_READ		2
-#define SEQID_RDSR		3
-#define SEQID_SE		4
-#define SEQID_CHIP_ERASE	5
-#define SEQID_PP		6
-#define SEQID_RDID		7
-#define SEQID_BE_4K		8
-#ifdef CONFIG_SPI_FLASH_BAR
-#define SEQID_BRRD		9
-#define SEQID_BRWR		10
-#define SEQID_RDEAR		11
-#define SEQID_WREAR		12
-#endif
-#define SEQID_WRAR		13
-#define SEQID_RDAR		14
-
-/* QSPI CMD */
-#define QSPI_CMD_PP		0x02	/* Page program (up to 256 bytes) */
-#define QSPI_CMD_RDSR		0x05	/* Read status register */
-#define QSPI_CMD_WREN		0x06	/* Write enable */
-#define QSPI_CMD_FAST_READ	0x0b	/* Read data bytes (high frequency) */
-#define QSPI_CMD_BE_4K		0x20    /* 4K erase */
-#define QSPI_CMD_CHIP_ERASE	0xc7	/* Erase whole flash chip */
-#define QSPI_CMD_SE		0xd8	/* Sector erase (usually 64KiB) */
-#define QSPI_CMD_RDID		0x9f	/* Read JEDEC ID */
-
-/* Used for Micron, winbond and Macronix flashes */
-#define	QSPI_CMD_WREAR		0xc5	/* EAR register write */
-#define	QSPI_CMD_RDEAR		0xc8	/* EAR reigster read */
-
-/* Used for Spansion flashes only. */
-#define	QSPI_CMD_BRRD		0x16	/* Bank register read */
-#define	QSPI_CMD_BRWR		0x17	/* Bank register write */
-
-/* Used for Spansion S25FS-S family flash only. */
-#define QSPI_CMD_RDAR		0x65	/* Read any device register */
-#define QSPI_CMD_WRAR		0x71	/* Write any device register */
-
-/* 4-byte address QSPI CMD - used on Spansion and some Macronix flashes */
-#define QSPI_CMD_FAST_READ_4B	0x0c    /* Read data bytes (high frequency) */
-#define QSPI_CMD_PP_4B		0x12    /* Page program (up to 256 bytes) */
-#define QSPI_CMD_SE_4B		0xdc    /* Sector erase (usually 64KiB) */
-
-/* fsl_qspi_platdata flags */
-#define QSPI_FLAG_REGMAP_ENDIAN_BIG	BIT(0)
-
-/* default SCK frequency, unit: HZ */
-#define FSL_QSPI_DEFAULT_SCK_FREQ	50000000
-
-/* QSPI max chipselect signals number */
-#define FSL_QSPI_MAX_CHIPSELECT_NUM     4
-
-/* Controller needs driver to swap endian */
+/*
+ * The driver only uses one single LUT entry, that is updated on
+ * each call of exec_op(). Index 0 is preset at boot with a basic
+ * read operation, so let's use the last entry (15).
+ */
+#define	SEQID_LUT			15
+
+/* Registers used by the driver */
+#define QUADSPI_MCR			0x00
+#define QUADSPI_MCR_RESERVED_MASK	GENMASK(19, 16)
+#define QUADSPI_MCR_MDIS_MASK		BIT(14)
+#define QUADSPI_MCR_CLR_TXF_MASK	BIT(11)
+#define QUADSPI_MCR_CLR_RXF_MASK	BIT(10)
+#define QUADSPI_MCR_DDR_EN_MASK		BIT(7)
+#define QUADSPI_MCR_END_CFG_MASK	GENMASK(3, 2)
+#define QUADSPI_MCR_SWRSTHD_MASK	BIT(1)
+#define QUADSPI_MCR_SWRSTSD_MASK	BIT(0)
+
+#define QUADSPI_IPCR			0x08
+#define QUADSPI_IPCR_SEQID(x)		((x) << 24)
+#define QUADSPI_FLSHCR			0x0c
+#define QUADSPI_FLSHCR_TCSS_MASK	GENMASK(3, 0)
+#define QUADSPI_FLSHCR_TCSH_MASK	GENMASK(11, 8)
+#define QUADSPI_FLSHCR_TDH_MASK		GENMASK(17, 16)
+
+#define QUADSPI_BUF3CR			0x1c
+#define QUADSPI_BUF3CR_ALLMST_MASK	BIT(31)
+#define QUADSPI_BUF3CR_ADATSZ(x)	((x) << 8)
+#define QUADSPI_BUF3CR_ADATSZ_MASK	GENMASK(15, 8)
+
+#define QUADSPI_BFGENCR			0x20
+#define QUADSPI_BFGENCR_SEQID(x)	((x) << 12)
+
+#define QUADSPI_BUF0IND			0x30
+#define QUADSPI_BUF1IND			0x34
+#define QUADSPI_BUF2IND			0x38
+#define QUADSPI_SFAR			0x100
+
+#define QUADSPI_SMPR			0x108
+#define QUADSPI_SMPR_DDRSMP_MASK	GENMASK(18, 16)
+#define QUADSPI_SMPR_FSDLY_MASK		BIT(6)
+#define QUADSPI_SMPR_FSPHS_MASK		BIT(5)
+#define QUADSPI_SMPR_HSENA_MASK		BIT(0)
+
+#define QUADSPI_RBCT			0x110
+#define QUADSPI_RBCT_WMRK_MASK		GENMASK(4, 0)
+#define QUADSPI_RBCT_RXBRD_USEIPS	BIT(8)
+
+#define QUADSPI_TBDR			0x154
+
+#define QUADSPI_SR			0x15c
+#define QUADSPI_SR_IP_ACC_MASK		BIT(1)
+#define QUADSPI_SR_AHB_ACC_MASK		BIT(2)
+
+#define QUADSPI_FR			0x160
+#define QUADSPI_FR_TFF_MASK		BIT(0)
+
+#define QUADSPI_RSER			0x164
+#define QUADSPI_RSER_TFIE		BIT(0)
+
+#define QUADSPI_SPTRCLR			0x16c
+#define QUADSPI_SPTRCLR_IPPTRC		BIT(8)
+#define QUADSPI_SPTRCLR_BFPTRC		BIT(0)
+
+#define QUADSPI_SFA1AD			0x180
+#define QUADSPI_SFA2AD			0x184
+#define QUADSPI_SFB1AD			0x188
+#define QUADSPI_SFB2AD			0x18c
+#define QUADSPI_RBDR(x)			(0x200 + ((x) * 4))
+
+#define QUADSPI_LUTKEY			0x300
+#define QUADSPI_LUTKEY_VALUE		0x5AF05AF0
+
+#define QUADSPI_LCKCR			0x304
+#define QUADSPI_LCKER_LOCK		BIT(0)
+#define QUADSPI_LCKER_UNLOCK		BIT(1)
+
+#define QUADSPI_LUT_BASE		0x310
+#define QUADSPI_LUT_OFFSET		(SEQID_LUT * 4 * 4)
+#define QUADSPI_LUT_REG(idx) \
+	(QUADSPI_LUT_BASE + QUADSPI_LUT_OFFSET + (idx) * 4)
+
+/* Instruction set for the LUT register */
+#define LUT_STOP		0
+#define LUT_CMD			1
+#define LUT_ADDR		2
+#define LUT_DUMMY		3
+#define LUT_MODE		4
+#define LUT_MODE2		5
+#define LUT_MODE4		6
+#define LUT_FSL_READ		7
+#define LUT_FSL_WRITE		8
+#define LUT_JMP_ON_CS		9
+#define LUT_ADDR_DDR		10
+#define LUT_MODE_DDR		11
+#define LUT_MODE2_DDR		12
+#define LUT_MODE4_DDR		13
+#define LUT_FSL_READ_DDR	14
+#define LUT_FSL_WRITE_DDR	15
+#define LUT_DATA_LEARN		16
+
+/*
+ * The PAD definitions for LUT register.
+ *
+ * The pad stands for the number of IO lines [0:3].
+ * For example, the quad read needs four IO lines,
+ * so you should use LUT_PAD(4).
+ */
+#define LUT_PAD(x) (fls(x) - 1)
+
+/*
+ * Macro for constructing the LUT entries with the following
+ * register layout:
+ *
+ *  ---------------------------------------------------
+ *  | INSTR1 | PAD1 | OPRND1 | INSTR0 | PAD0 | OPRND0 |
+ *  ---------------------------------------------------
+ */
+#define LUT_DEF(idx, ins, pad, opr)					\
+	((((ins) << 10) | ((pad) << 8) | (opr)) << (((idx) % 2) * 16))
+
+/* Controller needs driver to swap endianness */
 #define QUADSPI_QUIRK_SWAP_ENDIAN	BIT(0)
 
-enum fsl_qspi_devtype {
-	FSL_QUADSPI_VYBRID,
-	FSL_QUADSPI_IMX6SX,
-	FSL_QUADSPI_IMX6UL_7D,
-	FSL_QUADSPI_IMX7ULP,
-};
+/* Controller needs 4x internal clock */
+#define QUADSPI_QUIRK_4X_INT_CLK	BIT(1)
 
-struct fsl_qspi_devtype_data {
-	enum fsl_qspi_devtype devtype;
-	u32 rxfifo;
-	u32 txfifo;
-	u32 ahb_buf_size;
-	u32 driver_data;
-};
+/*
+ * TKT253890, the controller needs the driver to fill the txfifo with
+ * 16 bytes at least to trigger a data transfer, even though the extra
+ * data won't be transferred.
+ */
+#define QUADSPI_QUIRK_TKT253890		BIT(2)
 
-/**
- * struct fsl_qspi_platdata - platform data for Freescale QSPI
- *
- * @flags: Flags for QSPI QSPI_FLAG_...
- * @speed_hz: Default SCK frequency
- * @reg_base: Base address of QSPI registers
- * @amba_base: Base address of QSPI memory mapping
- * @amba_total_size: size of QSPI memory mapping
- * @flash_num: Number of active slave devices
- * @num_chipselect: Number of QSPI chipselect signals
+/* TKT245618, the controller cannot wake up from wait mode */
+#define QUADSPI_QUIRK_TKT245618		BIT(3)
+
+/*
+ * Controller adds QSPI_AMBA_BASE (base address of the mapped memory)
+ * internally. No need to add it when setting SFXXAD and SFAR registers
  */
-struct fsl_qspi_platdata {
-	u32 flags;
-	u32 speed_hz;
-	fdt_addr_t reg_base;
-	fdt_addr_t amba_base;
-	fdt_size_t amba_total_size;
-	u32 flash_num;
-	u32 num_chipselect;
-};
+#define QUADSPI_QUIRK_BASE_INTERNAL	BIT(4)
 
-/**
- * struct fsl_qspi_priv - private data for Freescale QSPI
- *
- * @flags: Flags for QSPI QSPI_FLAG_...
- * @bus_clk: QSPI input clk frequency
- * @speed_hz: Default SCK frequency
- * @cur_seqid: current LUT table sequence id
- * @sf_addr: flash access offset
- * @amba_base: Base address of QSPI memory mapping of every CS
- * @amba_total_size: size of QSPI memory mapping
- * @cur_amba_base: Base address of QSPI memory mapping of current CS
- * @flash_num: Number of active slave devices
- * @num_chipselect: Number of QSPI chipselect signals
- * @regs: Point to QSPI register structure for I/O access
+/*
+ * Controller uses TDH bits in register QUADSPI_FLSHCR.
+ * They need to be set in accordance with the DDR/SDR mode.
  */
-struct fsl_qspi_priv {
-	u32 flags;
-	u32 bus_clk;
-	u32 speed_hz;
-	u32 cur_seqid;
-	u32 sf_addr;
-	u32 amba_base[FSL_QSPI_MAX_CHIPSELECT_NUM];
-	u32 amba_total_size;
-	u32 cur_amba_base;
-	u32 flash_num;
-	u32 num_chipselect;
-	struct fsl_qspi_regs *regs;
-	struct fsl_qspi_devtype_data *devtype_data;
+#define QUADSPI_QUIRK_USE_TDH_SETTING	BIT(5)
+
+struct fsl_qspi_devtype_data {
+	unsigned int rxfifo;
+	unsigned int txfifo;
+	unsigned int ahb_buf_size;
+	unsigned int quirks;
+	bool little_endian;
 };
 
 static const struct fsl_qspi_devtype_data vybrid_data = {
-	.devtype = FSL_QUADSPI_VYBRID,
-	.rxfifo = 128,
-	.txfifo = 64,
-	.ahb_buf_size = 1024,
-	.driver_data = QUADSPI_QUIRK_SWAP_ENDIAN,
+	.rxfifo = SZ_128,
+	.txfifo = SZ_64,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_SWAP_ENDIAN,
+	.little_endian = true,
 };
 
 static const struct fsl_qspi_devtype_data imx6sx_data = {
-	.devtype = FSL_QUADSPI_IMX6SX,
-	.rxfifo = 128,
-	.txfifo = 512,
-	.ahb_buf_size = 1024,
-	.driver_data = 0,
+	.rxfifo = SZ_128,
+	.txfifo = SZ_512,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_4X_INT_CLK | QUADSPI_QUIRK_TKT245618,
+	.little_endian = true,
+};
+
+static const struct fsl_qspi_devtype_data imx7d_data = {
+	.rxfifo = SZ_128,
+	.txfifo = SZ_512,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
+		  QUADSPI_QUIRK_USE_TDH_SETTING,
+	.little_endian = true,
+};
+
+static const struct fsl_qspi_devtype_data imx6ul_data = {
+	.rxfifo = SZ_128,
+	.txfifo = SZ_512,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_4X_INT_CLK |
+		  QUADSPI_QUIRK_USE_TDH_SETTING,
+	.little_endian = true,
 };
 
-static const struct fsl_qspi_devtype_data imx6ul_7d_data = {
-	.devtype = FSL_QUADSPI_IMX6UL_7D,
-	.rxfifo = 128,
-	.txfifo = 512,
-	.ahb_buf_size = 1024,
-	.driver_data = 0,
+static const struct fsl_qspi_devtype_data ls1021a_data = {
+	.rxfifo = SZ_128,
+	.txfifo = SZ_64,
+	.ahb_buf_size = SZ_1K,
+	.quirks = 0,
+	.little_endian = false,
 };
 
-static const struct fsl_qspi_devtype_data imx7ulp_data = {
-	.devtype = FSL_QUADSPI_IMX7ULP,
-	.rxfifo = 64,
-	.txfifo = 64,
-	.ahb_buf_size = 128,
-	.driver_data = 0,
+static const struct fsl_qspi_devtype_data ls1088a_data = {
+	.rxfifo = SZ_128,
+	.txfifo = SZ_128,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_TKT253890,
+	.little_endian = true,
 };
 
-static u32 qspi_read32(u32 flags, u32 *addr)
+static const struct fsl_qspi_devtype_data ls2080a_data = {
+	.rxfifo = SZ_128,
+	.txfifo = SZ_64,
+	.ahb_buf_size = SZ_1K,
+	.quirks = QUADSPI_QUIRK_TKT253890 | QUADSPI_QUIRK_BASE_INTERNAL,
+	.little_endian = true,
+};
+
+struct fsl_qspi {
+	struct udevice *dev;
+	void __iomem *iobase;
+	void __iomem *ahb_addr;
+	u32 memmap_phy;
+	const struct fsl_qspi_devtype_data *devtype_data;
+	int selected;
+};
+
+static inline int needs_swap_endian(struct fsl_qspi *q)
 {
-	return flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?
-		in_be32(addr) : in_le32(addr);
+	return q->devtype_data->quirks & QUADSPI_QUIRK_SWAP_ENDIAN;
 }
 
-static void qspi_write32(u32 flags, u32 *addr, u32 val)
+static inline int needs_4x_clock(struct fsl_qspi *q)
 {
-	flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ?
-		out_be32(addr, val) : out_le32(addr, val);
+	return q->devtype_data->quirks & QUADSPI_QUIRK_4X_INT_CLK;
 }
 
-static inline int is_controller_busy(const struct fsl_qspi_priv *priv)
+static inline int needs_fill_txfifo(struct fsl_qspi *q)
 {
-	u32 val;
-	u32 mask = QSPI_SR_BUSY_MASK | QSPI_SR_AHB_ACC_MASK |
-		   QSPI_SR_IP_ACC_MASK;
-
-	if (priv->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG)
-		mask = (u32)cpu_to_be32(mask);
-
-	return readl_poll_timeout(&priv->regs->sr, val, !(val & mask), 1000);
+	return q->devtype_data->quirks & QUADSPI_QUIRK_TKT253890;
 }
 
-/* QSPI support swapping the flash read/write data
- * in hardware for LS102xA, but not for VF610 */
-static inline u32 qspi_endian_xchg(struct fsl_qspi_priv *priv, u32 data)
+static inline int needs_wakeup_wait_mode(struct fsl_qspi *q)
 {
-	if (priv->devtype_data->driver_data & QUADSPI_QUIRK_SWAP_ENDIAN)
-		return swab32(data);
-	else
-		return data;
+	return q->devtype_data->quirks & QUADSPI_QUIRK_TKT245618;
 }
 
-static void qspi_set_lut(struct fsl_qspi_priv *priv)
+static inline int needs_amba_base_offset(struct fsl_qspi *q)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 lut_base;
-
-	/* Unlock the LUT */
-	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);
-	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_UNLOCK);
-
-	/* Write Enable */
-	lut_base = SEQID_WREN * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREN) |
-		PAD0(LUT_PAD1) | INSTR0(LUT_CMD));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* Fast Read */
-	lut_base = SEQID_FAST_READ * 4;
-#ifdef CONFIG_SPI_FLASH_BAR
-	qspi_write32(priv->flags, &regs->lut[lut_base],
-		     OPRND0(QSPI_CMD_FAST_READ) | PAD0(LUT_PAD1) |
-		     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#else
-	if (FSL_QSPI_FLASH_SIZE  <= SZ_16M)
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_FAST_READ) | PAD0(LUT_PAD1) |
-			     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-	else
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_FAST_READ_4B) |
-			     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) |
-			     OPRND1(ADDR32BIT) | PAD1(LUT_PAD1) |
-			     INSTR1(LUT_ADDR));
-#endif
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1],
-		     OPRND0(8) | PAD0(LUT_PAD1) | INSTR0(LUT_DUMMY) |
-		     OPRND1(priv->devtype_data->rxfifo) | PAD1(LUT_PAD1) |
-		     INSTR1(LUT_READ));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* Read Status */
-	lut_base = SEQID_RDSR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDSR) |
-		PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(1) |
-		PAD1(LUT_PAD1) | INSTR1(LUT_READ));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* Erase a sector */
-	lut_base = SEQID_SE * 4;
-#ifdef CONFIG_SPI_FLASH_BAR
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_SE) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#else
-	if (FSL_QSPI_FLASH_SIZE  <= SZ_16M)
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_SE) | PAD0(LUT_PAD1) |
-			     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-	else
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_SE_4B) | PAD0(LUT_PAD1) |
-			     INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) |
-			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#endif
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* Erase the whole chip */
-	lut_base = SEQID_CHIP_ERASE * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base],
-		     OPRND0(QSPI_CMD_CHIP_ERASE) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* Page Program */
-	lut_base = SEQID_PP * 4;
-#ifdef CONFIG_SPI_FLASH_BAR
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_PP) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#else
-	if (FSL_QSPI_FLASH_SIZE  <= SZ_16M)
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_PP) | PAD0(LUT_PAD1) |
-			     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-	else
-		qspi_write32(priv->flags, &regs->lut[lut_base],
-			     OPRND0(QSPI_CMD_PP_4B) | PAD0(LUT_PAD1) |
-			     INSTR0(LUT_CMD) | OPRND1(ADDR32BIT) |
-			     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#endif
-	/* Use IDATSZ in IPCR to determine the size and here set 0. */
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], OPRND0(0) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* READ ID */
-	lut_base = SEQID_RDID * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDID) |
-		PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(8) |
-		PAD1(LUT_PAD1) | INSTR1(LUT_READ));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 2], 0);
-	qspi_write32(priv->flags, &regs->lut[lut_base + 3], 0);
-
-	/* SUB SECTOR 4K ERASE */
-	lut_base = SEQID_BE_4K * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BE_4K) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-
-#ifdef CONFIG_SPI_FLASH_BAR
-	/*
-	 * BRRD BRWR RDEAR WREAR are all supported, because it is hard to
-	 * dynamically check whether to set BRRD BRWR or RDEAR WREAR during
-	 * initialization.
-	 */
-	lut_base = SEQID_BRRD * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRRD) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(1) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_READ));
-
-	lut_base = SEQID_BRWR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_BRWR) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(1) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_WRITE));
-
-	lut_base = SEQID_RDEAR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_RDEAR) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(1) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_READ));
-
-	lut_base = SEQID_WREAR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base], OPRND0(QSPI_CMD_WREAR) |
-		     PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(1) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_WRITE));
-#endif
-
-	/*
-	 * Read any device register.
-	 * Used for Spansion S25FS-S family flash only.
-	 */
-	lut_base = SEQID_RDAR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base],
-		     OPRND0(QSPI_CMD_RDAR) | PAD0(LUT_PAD1) |
-		     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1],
-		     OPRND0(8) | PAD0(LUT_PAD1) | INSTR0(LUT_DUMMY) |
-		     OPRND1(1) | PAD1(LUT_PAD1) |
-		     INSTR1(LUT_READ));
+	return !(q->devtype_data->quirks & QUADSPI_QUIRK_BASE_INTERNAL);
+}
 
-	/*
-	 * Write any device register.
-	 * Used for Spansion S25FS-S family flash only.
-	 */
-	lut_base = SEQID_WRAR * 4;
-	qspi_write32(priv->flags, &regs->lut[lut_base],
-		     OPRND0(QSPI_CMD_WRAR) | PAD0(LUT_PAD1) |
-		     INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) |
-		     PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-	qspi_write32(priv->flags, &regs->lut[lut_base + 1],
-		     OPRND0(1) | PAD0(LUT_PAD1) | INSTR0(LUT_WRITE));
-
-	/* Lock the LUT */
-	qspi_write32(priv->flags, &regs->lutkey, LUT_KEY_VALUE);
-	qspi_write32(priv->flags, &regs->lckcr, QSPI_LCKCR_LOCK);
+static inline int needs_tdh_setting(struct fsl_qspi *q)
+{
+	return q->devtype_data->quirks & QUADSPI_QUIRK_USE_TDH_SETTING;
 }
 
-#if defined(CONFIG_SYS_FSL_QSPI_AHB)
 /*
- * If we have changed the content of the flash by writing or erasing,
- * we need to invalidate the AHB buffer. If we do not do so, we may read out
- * the wrong data. The spec tells us reset the AHB domain and Serial Flash
- * domain at the same time.
+ * An IC bug makes it necessary to rearrange the 32-bit data.
+ * Later chips, such as IMX6SLX, have fixed this bug.
  */
-static inline void qspi_ahb_invalid(struct fsl_qspi_priv *priv)
+static inline u32 fsl_qspi_endian_xchg(struct fsl_qspi *q, u32 a)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 reg;
-
-	reg = qspi_read32(priv->flags, &regs->mcr);
-	reg |= QSPI_MCR_SWRSTHD_MASK | QSPI_MCR_SWRSTSD_MASK;
-	qspi_write32(priv->flags, &regs->mcr, reg);
-
-	/*
-	 * The minimum delay : 1 AHB + 2 SFCK clocks.
-	 * Delay 1 us is enough.
-	 */
-	udelay(1);
-
-	reg &= ~(QSPI_MCR_SWRSTHD_MASK | QSPI_MCR_SWRSTSD_MASK);
-	qspi_write32(priv->flags, &regs->mcr, reg);
+	return needs_swap_endian(q) ? __swab32(a) : a;
 }
 
-/* Read out the data from the AHB buffer. */
-static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len)
+/*
+ * R/W functions for big- or little-endian registers:
+ * The QSPI controller's endianness is independent of
+ * the CPU core's endianness. So far, although the CPU
+ * core is little-endian the QSPI controller can use
+ * big-endian or little-endian.
+ */
+static void qspi_writel(struct fsl_qspi *q, u32 val, void __iomem *addr)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg;
-	void *rx_addr;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
+	if (q->devtype_data->little_endian)
+		out_le32(addr, val);
+	else
+		out_be32(addr, val);
+}
 
-	rx_addr = (void *)(uintptr_t)(priv->cur_amba_base + priv->sf_addr);
-	/* Read out the data directly from the AHB buffer. */
-	memcpy(rxbuf, rx_addr, len);
+static u32 qspi_readl(struct fsl_qspi *q, void __iomem *addr)
+{
+	if (q->devtype_data->little_endian)
+		return in_le32(addr);
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
+	return in_be32(addr);
 }
 
-static void qspi_enable_ddr_mode(struct fsl_qspi_priv *priv)
+static int fsl_qspi_check_buswidth(struct fsl_qspi *q, u8 width)
 {
-	u32 reg, reg2;
-	struct fsl_qspi_regs *regs = priv->regs;
+	switch (width) {
+	case 1:
+	case 2:
+	case 4:
+		return 0;
+	}
 
-	reg = qspi_read32(priv->flags, &regs->mcr);
-	/* Disable the module */
-	qspi_write32(priv->flags, &regs->mcr, reg | QSPI_MCR_MDIS_MASK);
-
-	/* Set the Sampling Register for DDR */
-	reg2 = qspi_read32(priv->flags, &regs->smpr);
-	reg2 &= ~QSPI_SMPR_DDRSMP_MASK;
-	reg2 |= (2 << QSPI_SMPR_DDRSMP_SHIFT);
-	qspi_write32(priv->flags, &regs->smpr, reg2);
-
-	/* Enable the module again (enable the DDR too) */
-	reg |= QSPI_MCR_DDR_EN_MASK;
-	/* Enable bit 29 for imx6sx */
-	reg |= BIT(29);
-	qspi_write32(priv->flags, &regs->mcr, reg);
-
-	/* Enable the TDH to 1 for some platforms like imx6ul, imx7d, etc
-	 * These two bits are reserved on other platforms
-	 */
-	reg = qspi_read32(priv->flags, &regs->flshcr);
-	reg &= ~(BIT(17));
-	reg |= BIT(16);
-	qspi_write32(priv->flags, &regs->flshcr, reg);
+	return -ENOTSUPP;
 }
 
-/*
- * There are two different ways to read out the data from the flash:
- *  the "IP Command Read" and the "AHB Command Read".
- *
- * The IC guy suggests we use the "AHB Command Read" which is faster
- * then the "IP Command Read". (What's more is that there is a bug in
- * the "IP Command Read" in the Vybrid.)
- *
- * After we set up the registers for the "AHB Command Read", we can use
- * the memcpy to read the data directly. A "missed" access to the buffer
- * causes the controller to clear the buffer, and use the sequence pointed
- * by the QUADSPI_BFGENCR[SEQID] to initiate a read from the flash.
- */
-static void qspi_init_ahb_read(struct fsl_qspi_priv *priv)
+static bool fsl_qspi_supports_op(struct spi_slave *slave,
+				 const struct spi_mem_op *op)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
+	struct fsl_qspi *q = dev_get_priv(slave->dev->parent);
+	int ret;
+
+	ret = fsl_qspi_check_buswidth(q, op->cmd.buswidth);
 
-	/* AHB configuration for access buffer 0/1/2 .*/
-	qspi_write32(priv->flags, &regs->buf0cr, QSPI_BUFXCR_INVALID_MSTRID);
-	qspi_write32(priv->flags, &regs->buf1cr, QSPI_BUFXCR_INVALID_MSTRID);
-	qspi_write32(priv->flags, &regs->buf2cr, QSPI_BUFXCR_INVALID_MSTRID);
-	qspi_write32(priv->flags, &regs->buf3cr, QSPI_BUF3CR_ALLMST_MASK |
-		     ((priv->devtype_data->ahb_buf_size >> 3) << QSPI_BUF3CR_ADATSZ_SHIFT));
+	if (op->addr.nbytes)
+		ret |= fsl_qspi_check_buswidth(q, op->addr.buswidth);
 
-	/* We only use the buffer3 */
-	qspi_write32(priv->flags, &regs->buf0ind, 0);
-	qspi_write32(priv->flags, &regs->buf1ind, 0);
-	qspi_write32(priv->flags, &regs->buf2ind, 0);
+	if (op->dummy.nbytes)
+		ret |= fsl_qspi_check_buswidth(q, op->dummy.buswidth);
+
+	if (op->data.nbytes)
+		ret |= fsl_qspi_check_buswidth(q, op->data.buswidth);
+
+	if (ret)
+		return false;
 
 	/*
-	 * Set the default lut sequence for AHB Read.
-	 * Parallel mode is disabled.
+	 * The number of instructions needed for the op, needs
+	 * to fit into a single LUT entry.
 	 */
-	qspi_write32(priv->flags, &regs->bfgencr,
-		     SEQID_FAST_READ << QSPI_BFGENCR_SEQID_SHIFT);
-
-	/*Enable DDR Mode*/
-	qspi_enable_ddr_mode(priv);
+	if (op->addr.nbytes +
+	   (op->dummy.nbytes ? 1 : 0) +
+	   (op->data.nbytes ? 1 : 0) > 6)
+		return false;
+
+	/* Max 64 dummy clock cycles supported */
+	if (op->dummy.nbytes &&
+	    (op->dummy.nbytes * 8 / op->dummy.buswidth > 64))
+		return false;
+
+	/* Max data length, check controller limits and alignment */
+	if (op->data.dir == SPI_MEM_DATA_IN &&
+	    (op->data.nbytes > q->devtype_data->ahb_buf_size ||
+	     (op->data.nbytes > q->devtype_data->rxfifo - 4 &&
+	      !IS_ALIGNED(op->data.nbytes, 8))))
+		return false;
+
+	if (op->data.dir == SPI_MEM_DATA_OUT &&
+	    op->data.nbytes > q->devtype_data->txfifo)
+		return false;
+
+	return true;
 }
-#endif
 
-#ifdef CONFIG_SPI_FLASH_BAR
-/* Bank register read/write, EAR register read/write */
-static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len)
+static void fsl_qspi_prepare_lut(struct fsl_qspi *q,
+				 const struct spi_mem_op *op)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 reg, mcr_reg, data, seqid;
+	void __iomem *base = q->iobase;
+	u32 lutval[4] = {};
+	int lutidx = 1, i;
 
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
+	lutval[0] |= LUT_DEF(0, LUT_CMD, LUT_PAD(op->cmd.buswidth),
+			     op->cmd.opcode);
 
-	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);
+	/*
+	 * For some unknown reason, using LUT_ADDR doesn't work in some
+	 * cases (at least with only one byte long addresses), so
+	 * let's use LUT_MODE to write the address bytes one by one
+	 */
+	for (i = 0; i < op->addr.nbytes; i++) {
+		u8 addrbyte = op->addr.val >> (8 * (op->addr.nbytes - i - 1));
 
-	if (priv->cur_seqid == QSPI_CMD_BRRD)
-		seqid = SEQID_BRRD;
-	else
-		seqid = SEQID_RDEAR;
-
-	qspi_write32(priv->flags, &regs->ipcr,
-		     (seqid << QSPI_IPCR_SEQID_SHIFT) | len);
-
-	/* Wait previous command complete */
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
-
-	while (1) {
-		WATCHDOG_RESET();
-
-		reg = qspi_read32(priv->flags, &regs->rbsr);
-		if (reg & QSPI_RBSR_RDBFL_MASK) {
-			data = qspi_read32(priv->flags, &regs->rbdr[0]);
-			data = qspi_endian_xchg(priv, data);
-			memcpy(rxbuf, &data, len);
-			qspi_write32(priv->flags, &regs->mcr,
-				     qspi_read32(priv->flags, &regs->mcr) |
-				     QSPI_MCR_CLR_RXF_MASK);
-			break;
-		}
+		lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_MODE,
+					      LUT_PAD(op->addr.buswidth),
+					      addrbyte);
+		lutidx++;
 	}
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
-}
-#endif
-
-static void qspi_op_rdid(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len)
-{
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg, rbsr_reg, data, size;
-	int i;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
-
-	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);
-
-	qspi_write32(priv->flags, &regs->ipcr,
-		     (SEQID_RDID << QSPI_IPCR_SEQID_SHIFT) | 0);
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
-
-	i = 0;
-	while ((priv->devtype_data->rxfifo >= len) && (len > 0)) {
-		WATCHDOG_RESET();
-
-		rbsr_reg = qspi_read32(priv->flags, &regs->rbsr);
-		if (rbsr_reg & QSPI_RBSR_RDBFL_MASK) {
-			data = qspi_read32(priv->flags, &regs->rbdr[i]);
-			data = qspi_endian_xchg(priv, data);
-			size = (len < 4) ? len : 4;
-			memcpy(rxbuf, &data, size);
-			len -= size;
-			rxbuf++;
-			i++;
-		}
+	if (op->dummy.nbytes) {
+		lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_DUMMY,
+					      LUT_PAD(op->dummy.buswidth),
+					      op->dummy.nbytes * 8 /
+					      op->dummy.buswidth);
+		lutidx++;
 	}
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
-}
-
-/* If not use AHB read, read data from ip interface */
-static void qspi_op_read(struct fsl_qspi_priv *priv, u32 *rxbuf, u32 len)
-{
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg, data;
-	int i, size;
-	u32 to_or_from;
-	u32 seqid;
-
-	if (priv->cur_seqid == QSPI_CMD_RDAR)
-		seqid = SEQID_RDAR;
-	else
-		seqid = SEQID_FAST_READ;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
-
-	to_or_from = priv->sf_addr + priv->cur_amba_base;
-
-	while (len > 0) {
-		WATCHDOG_RESET();
-
-		qspi_write32(priv->flags, &regs->sfar, to_or_from);
-
-		size = (len > priv->devtype_data->rxfifo) ?
-			priv->devtype_data->rxfifo : len;
-
-		qspi_write32(priv->flags, &regs->ipcr,
-			     (seqid << QSPI_IPCR_SEQID_SHIFT) |
-			     size);
-		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-			;
-
-		to_or_from += size;
-		len -= size;
-
-		i = 0;
-		while ((priv->devtype_data->rxfifo >= size) && (size > 0)) {
-			data = qspi_read32(priv->flags, &regs->rbdr[i]);
-			data = qspi_endian_xchg(priv, data);
-			if (size < 4)
-				memcpy(rxbuf, &data, size);
-			else
-				memcpy(rxbuf, &data, 4);
-			rxbuf++;
-			size -= 4;
-			i++;
-		}
-		qspi_write32(priv->flags, &regs->mcr,
-			     qspi_read32(priv->flags, &regs->mcr) |
-			     QSPI_MCR_CLR_RXF_MASK);
+	if (op->data.nbytes) {
+		lutval[lutidx / 2] |= LUT_DEF(lutidx,
+					      op->data.dir == SPI_MEM_DATA_IN ?
+					      LUT_FSL_READ : LUT_FSL_WRITE,
+					      LUT_PAD(op->data.buswidth),
+					      0);
+		lutidx++;
 	}
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
-}
+	lutval[lutidx / 2] |= LUT_DEF(lutidx, LUT_STOP, 0, 0);
 
-static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len)
-{
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg, data, reg, status_reg, seqid;
-	int i, size, tx_size;
-	u32 to_or_from = 0;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
-
-	status_reg = 0;
-	while ((status_reg & FLASH_STATUS_WEL) != FLASH_STATUS_WEL) {
-		WATCHDOG_RESET();
-
-		qspi_write32(priv->flags, &regs->ipcr,
-			     (SEQID_WREN << QSPI_IPCR_SEQID_SHIFT) | 0);
-		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-			;
-
-		qspi_write32(priv->flags, &regs->ipcr,
-			     (SEQID_RDSR << QSPI_IPCR_SEQID_SHIFT) | 1);
-		while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-			;
-
-		reg = qspi_read32(priv->flags, &regs->rbsr);
-		if (reg & QSPI_RBSR_RDBFL_MASK) {
-			status_reg = qspi_read32(priv->flags, &regs->rbdr[0]);
-			status_reg = qspi_endian_xchg(priv, status_reg);
-		}
-		qspi_write32(priv->flags, &regs->mcr,
-			     qspi_read32(priv->flags, &regs->mcr) |
-			     QSPI_MCR_CLR_RXF_MASK);
-	}
+	/* unlock LUT */
+	qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
+	qspi_writel(q, QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR);
+
+	dev_dbg(q->dev, "CMD[%x] lutval[0:%x \t 1:%x \t 2:%x \t 3:%x]\n",
+		op->cmd.opcode, lutval[0], lutval[1], lutval[2], lutval[3]);
 
-	/* Default is page programming */
-	seqid = SEQID_PP;
-	if (priv->cur_seqid == QSPI_CMD_WRAR)
-		seqid = SEQID_WRAR;
-#ifdef CONFIG_SPI_FLASH_BAR
-	if (priv->cur_seqid == QSPI_CMD_BRWR)
-		seqid = SEQID_BRWR;
-	else if (priv->cur_seqid == QSPI_CMD_WREAR)
-		seqid = SEQID_WREAR;
-#endif
+	/* fill LUT */
+	for (i = 0; i < ARRAY_SIZE(lutval); i++)
+		qspi_writel(q, lutval[i], base + QUADSPI_LUT_REG(i));
 
-	to_or_from = priv->sf_addr + priv->cur_amba_base;
+	/* lock LUT */
+	qspi_writel(q, QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY);
+	qspi_writel(q, QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR);
+}
 
-	qspi_write32(priv->flags, &regs->sfar, to_or_from);
+/*
+ * If we have changed the content of the flash by writing or erasing, or if we
+ * read from flash with a different offset into the page buffer, we need to
+ * invalidate the AHB buffer. If we do not do so, we may read out the wrong
+ * data. The spec tells us reset the AHB domain and Serial Flash domain at
+ * the same time.
+ */
+static void fsl_qspi_invalidate(struct fsl_qspi *q)
+{
+	u32 reg;
 
-	tx_size = (len > priv->devtype_data->txfifo) ?
-		priv->devtype_data->txfifo : len;
+	reg = qspi_readl(q, q->iobase + QUADSPI_MCR);
+	reg |= QUADSPI_MCR_SWRSTHD_MASK | QUADSPI_MCR_SWRSTSD_MASK;
+	qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
 
-	size = tx_size / 16;
 	/*
-	 * There must be atleast 128bit data
-	 * available in TX FIFO for any pop operation
+	 * The minimum delay : 1 AHB + 2 SFCK clocks.
+	 * Delay 1 us is enough.
 	 */
-	if (tx_size % 16)
-		size++;
-	for (i = 0; i < size * 4; i++) {
-		memcpy(&data, txbuf, 4);
-		data = qspi_endian_xchg(priv, data);
-		qspi_write32(priv->flags, &regs->tbdr, data);
-		txbuf += 4;
-	}
-
-	qspi_write32(priv->flags, &regs->ipcr,
-		     (seqid << QSPI_IPCR_SEQID_SHIFT) | tx_size);
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
+	udelay(1);
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
+	reg &= ~(QUADSPI_MCR_SWRSTHD_MASK | QUADSPI_MCR_SWRSTSD_MASK);
+	qspi_writel(q, reg, q->iobase + QUADSPI_MCR);
 }
 
-static void qspi_op_rdsr(struct fsl_qspi_priv *priv, void *rxbuf, u32 len)
+static void fsl_qspi_select_mem(struct fsl_qspi *q, struct spi_slave *slave)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg, reg, data;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
-
-	qspi_write32(priv->flags, &regs->sfar, priv->cur_amba_base);
-
-	qspi_write32(priv->flags, &regs->ipcr,
-		     (SEQID_RDSR << QSPI_IPCR_SEQID_SHIFT) | 0);
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
-
-	while (1) {
-		WATCHDOG_RESET();
-
-		reg = qspi_read32(priv->flags, &regs->rbsr);
-		if (reg & QSPI_RBSR_RDBFL_MASK) {
-			data = qspi_read32(priv->flags, &regs->rbdr[0]);
-			data = qspi_endian_xchg(priv, data);
-			memcpy(rxbuf, &data, len);
-			qspi_write32(priv->flags, &regs->mcr,
-				     qspi_read32(priv->flags, &regs->mcr) |
-				     QSPI_MCR_CLR_RXF_MASK);
-			break;
-		}
-	}
+	struct dm_spi_slave_platdata *plat =
+		dev_get_parent_platdata(slave->dev);
+
+	if (q->selected == plat->cs)
+		return;
 
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
+	q->selected = plat->cs;
+	fsl_qspi_invalidate(q);
 }
 
-static void qspi_op_erase(struct fsl_qspi_priv *priv)
+static void fsl_qspi_read_ahb(struct fsl_qspi *q, const struct spi_mem_op *op)
 {
-	struct fsl_qspi_regs *regs = priv->regs;
-	u32 mcr_reg;
-	u32 to_or_from = 0;
-
-	mcr_reg = qspi_read32(priv->flags, &regs->mcr);
-	qspi_write32(priv->flags, &regs->mcr,
-		     QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK |
-		     mcr_reg);
-	qspi_write32(priv->flags, &regs->rbct, QSPI_RBCT_RXBRD_USEIPS);
-
-	to_or_from = priv->sf_addr + priv->cur_amba_base;
-	qspi_write32(priv->flags, &regs->sfar, to_or_from);
-
-	qspi_write32(priv->flags, &regs->ipcr,
-		     (SEQID_WREN << QSPI_IPCR_SEQID_SHIFT) | 0);
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
-
-	if (priv->cur_seqid == QSPI_CMD_SE) {
-		qspi_write32(priv->flags, &regs->ipcr,
-			     (SEQID_SE << QSPI_IPCR_SEQID_SHIFT) | 0);
-	} else if (priv->cur_seqid == QSPI_CMD_BE_4K) {
-		qspi_write32(priv->flags, &regs->ipcr,
-			     (SEQID_BE_4K << QSPI_IPCR_SEQID_SHIFT) | 0);
-	}
-	while (qspi_read32(priv->flags, &regs->sr) & QSPI_SR_BUSY_MASK)
-		;
-
-	qspi_write32(priv->flags, &regs->mcr, mcr_reg);
+	memcpy_fromio(op->data.buf.in,
+		      q->ahb_addr + q->selected * q->devtype_data->ahb_buf_size,
+		      op->data.nbytes);
 }
 
-int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen,
-		const void *dout, void *din, unsigned long flags)
+static void fsl_qspi_fill_txfifo(struct fsl_qspi *q,
+				 const struct spi_mem_op *op)
 {
-	u32 bytes = DIV_ROUND_UP(bitlen, 8);
-	static u32 wr_sfaddr;
-	u32 txbuf;
-
-	WATCHDOG_RESET();
-
-	if (dout) {
-		if (flags & SPI_XFER_BEGIN) {
-			priv->cur_seqid = *(u8 *)dout;
-			memcpy(&txbuf, dout, 4);
-		}
-
-		if (flags == SPI_XFER_END) {
-			priv->sf_addr = wr_sfaddr;
-			qspi_op_write(priv, (u8 *)dout, bytes);
-			return 0;
-		}
-
-		if (priv->cur_seqid == QSPI_CMD_FAST_READ ||
-		    priv->cur_seqid == QSPI_CMD_RDAR) {
-			priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
-		} else if ((priv->cur_seqid == QSPI_CMD_SE) ||
-			   (priv->cur_seqid == QSPI_CMD_BE_4K)) {
-			priv->sf_addr = swab32(txbuf) & OFFSET_BITS_MASK;
-			qspi_op_erase(priv);
-		} else if (priv->cur_seqid == QSPI_CMD_PP ||
-			   priv->cur_seqid == QSPI_CMD_WRAR) {
-			wr_sfaddr = swab32(txbuf) & OFFSET_BITS_MASK;
-		} else if ((priv->cur_seqid == QSPI_CMD_BRWR) ||
-			 (priv->cur_seqid == QSPI_CMD_WREAR)) {
-#ifdef CONFIG_SPI_FLASH_BAR
-			wr_sfaddr = 0;
-#endif
-		}
-	}
+	void __iomem *base = q->iobase;
+	int i;
+	u32 val;
 
-	if (din) {
-		if (priv->cur_seqid == QSPI_CMD_FAST_READ) {
-#ifdef CONFIG_SYS_FSL_QSPI_AHB
-			qspi_ahb_read(priv, din, bytes);
-#else
-			qspi_op_read(priv, din, bytes);
-#endif
-		} else if (priv->cur_seqid == QSPI_CMD_RDAR) {
-			qspi_op_read(priv, din, bytes);
-		} else if (priv->cur_seqid == QSPI_CMD_RDID)
-			qspi_op_rdid(priv, din, bytes);
-		else if (priv->cur_seqid == QSPI_CMD_RDSR)
-			qspi_op_rdsr(priv, din, bytes);
-#ifdef CONFIG_SPI_FLASH_BAR
-		else if ((priv->cur_seqid == QSPI_CMD_BRRD) ||
-			 (priv->cur_seqid == QSPI_CMD_RDEAR)) {
-			priv->sf_addr = 0;
-			qspi_op_rdbank(priv, din, bytes);
-		}
-#endif
+	for (i = 0; i < ALIGN_DOWN(op->data.nbytes, 4); i += 4) {
+		memcpy(&val, op->data.buf.out + i, 4);
+		val = fsl_qspi_endian_xchg(q, val);
+		qspi_writel(q, val, base + QUADSPI_TBDR);
 	}
 
-#ifdef CONFIG_SYS_FSL_QSPI_AHB
-	if ((priv->cur_seqid == QSPI_CMD_SE) ||
-	    (priv->cur_seqid == QSPI_CMD_PP) ||
-	    (priv->cur_seqid == QSPI_CMD_BE_4K) ||
-	    (priv->cur_seqid == QSPI_CMD_WREAR) ||
-	    (priv->cur_seqid == QSPI_CMD_BRWR))
-		qspi_ahb_invalid(priv);
-#endif
+	if (i < op->data.nbytes) {
+		memcpy(&val, op->data.buf.out + i, op->data.nbytes - i);
+		val = fsl_qspi_endian_xchg(q, val);
+		qspi_writel(q, val, base + QUADSPI_TBDR);
+	}
 
-	return 0;
+	if (needs_fill_txfifo(q)) {
+		for (i = op->data.nbytes; i < 16; i += 4)
+			qspi_writel(q, 0, base + QUADSPI_TBDR);
+	}
 }
 
-void qspi_module_disable(struct fsl_qspi_priv *priv, u8 disable)
+static void fsl_qspi_read_rxfifo(struct fsl_qspi *q,
+				 const struct spi_mem_op *op)
 {
-	u32 mcr_val;
+	void __iomem *base = q->iobase;
+	int i;
+	u8 *buf = op->data.buf.in;
+	u32 val;
 
-	mcr_val = qspi_read32(priv->flags, &priv->regs->mcr);
-	if (disable)
-		mcr_val |= QSPI_MCR_MDIS_MASK;
-	else
-		mcr_val &= ~QSPI_MCR_MDIS_MASK;
-	qspi_write32(priv->flags, &priv->regs->mcr, mcr_val);
+	for (i = 0; i < ALIGN_DOWN(op->data.nbytes, 4); i += 4) {
+		val = qspi_readl(q, base + QUADSPI_RBDR(i / 4));
+		val = fsl_qspi_endian_xchg(q, val);
+		memcpy(buf + i, &val, 4);
+	}
+
+	if (i < op->data.nbytes) {
+		val = qspi_readl(q, base + QUADSPI_RBDR(i / 4));
+		val = fsl_qspi_endian_xchg(q, val);
+		memcpy(buf + i, &val, op->data.nbytes - i);
+	}
 }
 
-void qspi_cfg_smpr(struct fsl_qspi_priv *priv, u32 clear_bits, u32 set_bits)
+static int fsl_qspi_readl_poll_tout(struct fsl_qspi *q, void __iomem *base,
+				    u32 mask, u32 delay_us, u32 timeout_us)
 {
-	u32 smpr_val;
+	u32 reg;
+
+	if (!q->devtype_data->little_endian)
+		mask = (u32)cpu_to_be32(mask);
 
-	smpr_val = qspi_read32(priv->flags, &priv->regs->smpr);
-	smpr_val &= ~clear_bits;
-	smpr_val |= set_bits;
-	qspi_write32(priv->flags, &priv->regs->smpr, smpr_val);
+	return readl_poll_timeout(base, reg, !(reg & mask), timeout_us);
 }
 
-static int fsl_qspi_child_pre_probe(struct udevice *dev)
+static int fsl_qspi_do_op(struct fsl_qspi *q, const struct spi_mem_op *op)
 {
-	struct spi_slave *slave = dev_get_parent_priv(dev);
-	struct fsl_qspi_priv *priv = dev_get_priv(dev_get_parent(dev));
+	void __iomem *base = q->iobase;
+	int err = 0;
 
-	slave->max_write_size = priv->devtype_data->txfifo;
+	/*
+	 * Always start the sequence at the same index since we update
+	 * the LUT at each exec_op() call. And also specify the DATA
+	 * length, since it's has not been specified in the LUT.
+	 */
+	qspi_writel(q, op->data.nbytes | QUADSPI_IPCR_SEQID(SEQID_LUT),
+		    base + QUADSPI_IPCR);
 
-	return 0;
+	/* wait for the controller being ready */
+	err = fsl_qspi_readl_poll_tout(q, base + QUADSPI_SR,
+				       (QUADSPI_SR_IP_ACC_MASK |
+					QUADSPI_SR_AHB_ACC_MASK),
+					10, 1000);
+
+	if (!err && op->data.nbytes && op->data.dir == SPI_MEM_DATA_IN)
+		fsl_qspi_read_rxfifo(q, op);
+
+	return err;
 }
 
-static int fsl_qspi_probe(struct udevice *bus)
+static int fsl_qspi_exec_op(struct spi_slave *slave,
+			    const struct spi_mem_op *op)
 {
-	u32 amba_size_per_chip;
-	struct fsl_qspi_platdata *plat = dev_get_platdata(bus);
-	struct fsl_qspi_priv *priv = dev_get_priv(bus);
-	struct dm_spi_bus *dm_spi_bus;
-	int i, ret;
+	struct fsl_qspi *q = dev_get_priv(slave->dev->parent);
+	void __iomem *base = q->iobase;
+	u32 addr_offset = 0;
+	int err = 0;
+
+	/* wait for the controller being ready */
+	fsl_qspi_readl_poll_tout(q, base + QUADSPI_SR, (QUADSPI_SR_IP_ACC_MASK |
+				 QUADSPI_SR_AHB_ACC_MASK), 10, 1000);
 
-	dm_spi_bus = bus->uclass_priv;
+	fsl_qspi_select_mem(q, slave);
 
-	dm_spi_bus->max_hz = plat->speed_hz;
+	if (needs_amba_base_offset(q))
+		addr_offset = q->memmap_phy;
 
-	priv->regs = (struct fsl_qspi_regs *)(uintptr_t)plat->reg_base;
-	priv->flags = plat->flags;
+	qspi_writel(q,
+		    q->selected * q->devtype_data->ahb_buf_size + addr_offset,
+		    base + QUADSPI_SFAR);
+
+	qspi_writel(q, qspi_readl(q, base + QUADSPI_MCR) |
+		    QUADSPI_MCR_CLR_RXF_MASK | QUADSPI_MCR_CLR_TXF_MASK,
+		    base + QUADSPI_MCR);
+
+	qspi_writel(q, QUADSPI_SPTRCLR_BFPTRC | QUADSPI_SPTRCLR_IPPTRC,
+		    base + QUADSPI_SPTRCLR);
+
+	fsl_qspi_prepare_lut(q, op);
 
-	priv->speed_hz = plat->speed_hz;
 	/*
-	 * QSPI SFADR width is 32bits, the max dest addr is 4GB-1.
-	 * AMBA memory zone should be located on the 0~4GB space
-	 * even on a 64bits cpu.
+	 * If we have large chunks of data, we read them through the AHB bus
+	 * by accessing the mapped memory. In all other cases we use
+	 * IP commands to access the flash.
 	 */
-	priv->amba_base[0] = (u32)plat->amba_base;
-	priv->amba_total_size = (u32)plat->amba_total_size;
-	priv->flash_num = plat->flash_num;
-	priv->num_chipselect = plat->num_chipselect;
-
-	priv->devtype_data = (struct fsl_qspi_devtype_data *)dev_get_driver_data(bus);
-	if (!priv->devtype_data) {
-		printf("ERROR : No devtype_data found\n");
-		return -ENODEV;
+	if (op->data.nbytes > (q->devtype_data->rxfifo - 4) &&
+	    op->data.dir == SPI_MEM_DATA_IN) {
+		fsl_qspi_read_ahb(q, op);
+	} else {
+		qspi_writel(q, QUADSPI_RBCT_WMRK_MASK |
+			    QUADSPI_RBCT_RXBRD_USEIPS, base + QUADSPI_RBCT);
+
+		if (op->data.nbytes && op->data.dir == SPI_MEM_DATA_OUT)
+			fsl_qspi_fill_txfifo(q, op);
+
+		err = fsl_qspi_do_op(q, op);
 	}
 
-	debug("devtype=%d, txfifo=%d, rxfifo=%d, ahb=%d, data=0x%x\n",
-		priv->devtype_data->devtype,
-		priv->devtype_data->txfifo,
-		priv->devtype_data->rxfifo,
-		priv->devtype_data->ahb_buf_size,
-		priv->devtype_data->driver_data);
+	/* Invalidate the data in the AHB buffer. */
+	fsl_qspi_invalidate(q);
 
-	/* make sure controller is not busy anywhere */
-	ret = is_controller_busy(priv);
+	return err;
+}
 
-	if (ret) {
-		debug("ERROR : The controller is busy\n");
-		return ret;
+static int fsl_qspi_adjust_op_size(struct spi_slave *slave,
+				   struct spi_mem_op *op)
+{
+	struct fsl_qspi *q = dev_get_priv(slave->dev->parent);
+
+	if (op->data.dir == SPI_MEM_DATA_OUT) {
+		if (op->data.nbytes > q->devtype_data->txfifo)
+			op->data.nbytes = q->devtype_data->txfifo;
+	} else {
+		if (op->data.nbytes > q->devtype_data->ahb_buf_size)
+			op->data.nbytes = q->devtype_data->ahb_buf_size;
+		else if (op->data.nbytes > (q->devtype_data->rxfifo - 4))
+			op->data.nbytes = ALIGN_DOWN(op->data.nbytes, 8);
 	}
 
-	qspi_write32(priv->flags, &priv->regs->mcr,
-		     QSPI_MCR_RESERVED_MASK | QSPI_MCR_MDIS_MASK |
-		     QSPI_MCR_END_CFD_LE);
+	return 0;
+}
 
-	qspi_cfg_smpr(priv, ~(QSPI_SMPR_FSDLY_MASK | QSPI_SMPR_DDRSMP_MASK |
-		QSPI_SMPR_FSPHS_MASK | QSPI_SMPR_HSENA_MASK), 0);
+static int fsl_qspi_default_setup(struct fsl_qspi *q)
+{
+	void __iomem *base = q->iobase;
+	u32 reg, addr_offset = 0;
+
+	/* Reset the module */
+	qspi_writel(q, QUADSPI_MCR_SWRSTSD_MASK | QUADSPI_MCR_SWRSTHD_MASK,
+		    base + QUADSPI_MCR);
+	udelay(1);
+
+	/* Disable the module */
+	qspi_writel(q, QUADSPI_MCR_MDIS_MASK | QUADSPI_MCR_RESERVED_MASK,
+		    base + QUADSPI_MCR);
 
 	/*
-	 * Assign AMBA memory zone for every chipselect
-	 * QuadSPI has two channels, every channel has two chipselects.
-	 * If the property 'num-cs' in dts is 2, the AMBA memory will be divided
-	 * into two parts and assign to every channel. This indicate that every
-	 * channel only has one valid chipselect.
-	 * If the property 'num-cs' in dts is 4, the AMBA memory will be divided
-	 * into four parts and assign to every chipselect.
-	 * Every channel will has two valid chipselects.
+	 * Previous boot stages (BootROM, bootloader) might have used DDR
+	 * mode and did not clear the TDH bits. As we currently use SDR mode
+	 * only, clear the TDH bits if necessary.
 	 */
-	amba_size_per_chip = priv->amba_total_size >>
-			     (priv->num_chipselect >> 1);
-	for (i = 1 ; i < priv->num_chipselect ; i++)
-		priv->amba_base[i] =
-			amba_size_per_chip + priv->amba_base[i - 1];
+	if (needs_tdh_setting(q))
+		qspi_writel(q, qspi_readl(q, base + QUADSPI_FLSHCR) &
+			    ~QUADSPI_FLSHCR_TDH_MASK,
+			    base + QUADSPI_FLSHCR);
+
+	reg = qspi_readl(q, base + QUADSPI_SMPR);
+	qspi_writel(q, reg & ~(QUADSPI_SMPR_FSDLY_MASK
+			| QUADSPI_SMPR_FSPHS_MASK
+			| QUADSPI_SMPR_HSENA_MASK
+			| QUADSPI_SMPR_DDRSMP_MASK), base + QUADSPI_SMPR);
+
+	/* We only use the buffer3 for AHB read */
+	qspi_writel(q, 0, base + QUADSPI_BUF0IND);
+	qspi_writel(q, 0, base + QUADSPI_BUF1IND);
+	qspi_writel(q, 0, base + QUADSPI_BUF2IND);
+
+	qspi_writel(q, QUADSPI_BFGENCR_SEQID(SEQID_LUT),
+		    q->iobase + QUADSPI_BFGENCR);
+	qspi_writel(q, QUADSPI_RBCT_WMRK_MASK, base + QUADSPI_RBCT);
+	qspi_writel(q, QUADSPI_BUF3CR_ALLMST_MASK |
+		    QUADSPI_BUF3CR_ADATSZ(q->devtype_data->ahb_buf_size / 8),
+		    base + QUADSPI_BUF3CR);
+
+	if (needs_amba_base_offset(q))
+		addr_offset = q->memmap_phy;
 
 	/*
-	 * Any read access to non-implemented addresses will provide
-	 * undefined results.
-	 *
-	 * In case single die flash devices, TOP_ADDR_MEMA2 and
-	 * TOP_ADDR_MEMB2 should be initialized/programmed to
-	 * TOP_ADDR_MEMA1 and TOP_ADDR_MEMB1 respectively - in effect,
-	 * setting the size of these devices to 0.  This would ensure
-	 * that the complete memory map is assigned to only one flash device.
+	 * In HW there can be a maximum of four chips on two buses with
+	 * two chip selects on each bus. We use four chip selects in SW
+	 * to differentiate between the four chips.
+	 * We use ahb_buf_size for each chip and set SFA1AD, SFA2AD, SFB1AD,
+	 * SFB2AD accordingly.
 	 */
-	qspi_write32(priv->flags, &priv->regs->sfa1ad,
-		     priv->amba_base[0] + amba_size_per_chip);
-	switch (priv->num_chipselect) {
-	case 1:
-		break;
-	case 2:
-		qspi_write32(priv->flags, &priv->regs->sfa2ad,
-			     priv->amba_base[1]);
-		qspi_write32(priv->flags, &priv->regs->sfb1ad,
-			     priv->amba_base[1] + amba_size_per_chip);
-		qspi_write32(priv->flags, &priv->regs->sfb2ad,
-			     priv->amba_base[1] + amba_size_per_chip);
-		break;
-	case 4:
-		qspi_write32(priv->flags, &priv->regs->sfa2ad,
-			     priv->amba_base[2]);
-		qspi_write32(priv->flags, &priv->regs->sfb1ad,
-			     priv->amba_base[3]);
-		qspi_write32(priv->flags, &priv->regs->sfb2ad,
-			     priv->amba_base[3] + amba_size_per_chip);
-		break;
-	default:
-		debug("Error: Unsupported chipselect number %u!\n",
-		      priv->num_chipselect);
-		qspi_module_disable(priv, 1);
-		return -EINVAL;
-	}
-
-	qspi_set_lut(priv);
-
-#ifdef CONFIG_SYS_FSL_QSPI_AHB
-	qspi_init_ahb_read(priv);
-#endif
-
-	qspi_module_disable(priv, 0);
-
+	qspi_writel(q, q->devtype_data->ahb_buf_size + addr_offset,
+		    base + QUADSPI_SFA1AD);
+	qspi_writel(q, q->devtype_data->ahb_buf_size * 2 + addr_offset,
+		    base + QUADSPI_SFA2AD);
+	qspi_writel(q, q->devtype_data->ahb_buf_size * 3 + addr_offset,
+		    base + QUADSPI_SFB1AD);
+	qspi_writel(q, q->devtype_data->ahb_buf_size * 4 + addr_offset,
+		    base + QUADSPI_SFB2AD);
+
+	q->selected = -1;
+
+	/* Enable the module */
+	qspi_writel(q, QUADSPI_MCR_RESERVED_MASK | QUADSPI_MCR_END_CFG_MASK,
+		    base + QUADSPI_MCR);
 	return 0;
 }
 
-static int fsl_qspi_ofdata_to_platdata(struct udevice *bus)
+static const struct spi_controller_mem_ops fsl_qspi_mem_ops = {
+	.adjust_op_size = fsl_qspi_adjust_op_size,
+	.supports_op = fsl_qspi_supports_op,
+	.exec_op = fsl_qspi_exec_op,
+};
+
+static int fsl_qspi_probe(struct udevice *bus)
 {
-	struct fdt_resource res_regs, res_mem;
-	struct fsl_qspi_platdata *plat = bus->platdata;
+	struct dm_spi_bus *dm_bus = bus->uclass_priv;
+	struct fsl_qspi *q = dev_get_priv(bus);
 	const void *blob = gd->fdt_blob;
 	int node = dev_of_offset(bus);
-	int ret, flash_num = 0, subnode;
+	struct fdt_resource res;
+	int ret;
 
-	if (fdtdec_get_bool(blob, node, "big-endian"))
-		plat->flags |= QSPI_FLAG_REGMAP_ENDIAN_BIG;
+	q->dev = bus;
+	q->devtype_data = (struct fsl_qspi_devtype_data *)
+			   dev_get_driver_data(bus);
 
-	ret = fdt_get_named_resource(blob, node, "reg", "reg-names",
-				     "QuadSPI", &res_regs);
+	/* find the resources */
+	ret = fdt_get_named_resource(blob, node, "reg", "reg-names", "QuadSPI",
+				     &res);
 	if (ret) {
-		debug("Error: can't get regs base addresses(ret = %d)!\n", ret);
+		dev_err(bus, "Can't get regs base addresses(ret = %d)!\n", ret);
 		return -ENOMEM;
 	}
+
+	q->iobase = map_physmem(res.start, res.end - res.start, MAP_NOCACHE);
+
 	ret = fdt_get_named_resource(blob, node, "reg", "reg-names",
-				     "QuadSPI-memory", &res_mem);
+				     "QuadSPI-memory", &res);
 	if (ret) {
-		debug("Error: can't get AMBA base addresses(ret = %d)!\n", ret);
+		dev_err(bus, "Can't get AMBA base addresses(ret = %d)!\n", ret);
 		return -ENOMEM;
 	}
 
-	/* Count flash numbers */
-	fdt_for_each_subnode(subnode, blob, node)
-		++flash_num;
+	q->ahb_addr = map_physmem(res.start, res.end - res.start, MAP_NOCACHE);
+	q->memmap_phy = res.start;
 
-	if (flash_num == 0) {
-		debug("Error: Missing flashes!\n");
-		return -ENODEV;
-	}
+	dm_bus->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
+					66000000);
 
-	plat->speed_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
-					FSL_QSPI_DEFAULT_SCK_FREQ);
-	plat->num_chipselect = fdtdec_get_int(blob, node, "num-cs",
-					      FSL_QSPI_MAX_CHIPSELECT_NUM);
-
-	plat->reg_base = res_regs.start;
-	plat->amba_base = res_mem.start;
-	plat->amba_total_size = res_mem.end - res_mem.start + 1;
-	plat->flash_num = flash_num;
-
-	debug("%s: regs=<0x%llx> <0x%llx, 0x%llx>, max-frequency=%d, endianess=%s\n",
-	      __func__,
-	      (u64)plat->reg_base,
-	      (u64)plat->amba_base,
-	      (u64)plat->amba_total_size,
-	      plat->speed_hz,
-	      plat->flags & QSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le"
-	      );
+	fsl_qspi_default_setup(q);
 
 	return 0;
 }
 
 static int fsl_qspi_xfer(struct udevice *dev, unsigned int bitlen,
-		const void *dout, void *din, unsigned long flags)
+			 const void *dout, void *din, unsigned long flags)
 {
-	struct fsl_qspi_priv *priv;
-	struct udevice *bus;
-
-	bus = dev->parent;
-	priv = dev_get_priv(bus);
-
-	return qspi_xfer(priv, bitlen, dout, din, flags);
+	return 0;
 }
 
 static int fsl_qspi_claim_bus(struct udevice *dev)
 {
-	struct fsl_qspi_priv *priv;
-	struct udevice *bus;
-	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
-	int ret;
-
-	bus = dev->parent;
-	priv = dev_get_priv(bus);
-
-	/* make sure controller is not busy anywhere */
-	ret = is_controller_busy(priv);
-
-	if (ret) {
-		debug("ERROR : The controller is busy\n");
-		return ret;
-	}
-
-	priv->cur_amba_base = priv->amba_base[slave_plat->cs];
-
-	qspi_module_disable(priv, 0);
-
 	return 0;
 }
 
 static int fsl_qspi_release_bus(struct udevice *dev)
 {
-	struct fsl_qspi_priv *priv;
-	struct udevice *bus;
-
-	bus = dev->parent;
-	priv = dev_get_priv(bus);
-
-	qspi_module_disable(priv, 1);
-
 	return 0;
 }
 
 static int fsl_qspi_set_speed(struct udevice *bus, uint speed)
 {
-	/* Nothing to do */
 	return 0;
 }
 
 static int fsl_qspi_set_mode(struct udevice *bus, uint mode)
 {
-	/* Nothing to do */
 	return 0;
 }
 
@@ -1146,14 +791,17 @@ static const struct dm_spi_ops fsl_qspi_ops = {
 	.xfer		= fsl_qspi_xfer,
 	.set_speed	= fsl_qspi_set_speed,
 	.set_mode	= fsl_qspi_set_mode,
+	.mem_ops	= &fsl_qspi_mem_ops,
 };
 
 static const struct udevice_id fsl_qspi_ids[] = {
-	{ .compatible = "fsl,vf610-qspi", .data = (ulong)&vybrid_data },
-	{ .compatible = "fsl,imx6sx-qspi", .data = (ulong)&imx6sx_data },
-	{ .compatible = "fsl,imx6ul-qspi", .data = (ulong)&imx6ul_7d_data },
-	{ .compatible = "fsl,imx7d-qspi", .data = (ulong)&imx6ul_7d_data },
-	{ .compatible = "fsl,imx7ulp-qspi", .data = (ulong)&imx7ulp_data },
+	{ .compatible = "fsl,vf610-qspi", .data = (ulong)&vybrid_data, },
+	{ .compatible = "fsl,imx6sx-qspi", .data = (ulong)&imx6sx_data, },
+	{ .compatible = "fsl,imx6ul-qspi", .data = (ulong)&imx6ul_data, },
+	{ .compatible = "fsl,imx7d-qspi", .data = (ulong)&imx7d_data, },
+	{ .compatible = "fsl,ls1021a-qspi", .data = (ulong)&ls1021a_data, },
+	{ .compatible = "fsl,ls1088a-qspi", .data = (ulong)&ls1088a_data, },
+	{ .compatible = "fsl,ls2080a-qspi", .data = (ulong)&ls2080a_data, },
 	{ }
 };
 
@@ -1162,9 +810,6 @@ U_BOOT_DRIVER(fsl_qspi) = {
 	.id	= UCLASS_SPI,
 	.of_match = fsl_qspi_ids,
 	.ops	= &fsl_qspi_ops,
-	.ofdata_to_platdata = fsl_qspi_ofdata_to_platdata,
-	.platdata_auto_alloc_size = sizeof(struct fsl_qspi_platdata),
-	.priv_auto_alloc_size = sizeof(struct fsl_qspi_priv),
+	.priv_auto_alloc_size = sizeof(struct fsl_qspi),
 	.probe	= fsl_qspi_probe,
-	.child_pre_probe = fsl_qspi_child_pre_probe,
 };
diff --git a/drivers/spi/fsl_qspi.h b/drivers/spi/fsl_qspi.h
deleted file mode 100644
index 9e61a852b5..0000000000
--- a/drivers/spi/fsl_qspi.h
+++ /dev/null
@@ -1,145 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2013-2014 Freescale Semiconductor, Inc.
- *
- * Register definitions for Freescale QSPI
- */
-
-#ifndef _FSL_QSPI_H_
-#define _FSL_QSPI_H_
-
-struct fsl_qspi_regs {
-	u32 mcr;
-	u32 rsvd0[1];
-	u32 ipcr;
-	u32 flshcr;
-	u32 buf0cr;
-	u32 buf1cr;
-	u32 buf2cr;
-	u32 buf3cr;
-	u32 bfgencr;
-	u32 soccr;
-	u32 rsvd1[2];
-	u32 buf0ind;
-	u32 buf1ind;
-	u32 buf2ind;
-	u32 rsvd2[49];
-	u32 sfar;
-	u32 rsvd3[1];
-	u32 smpr;
-	u32 rbsr;
-	u32 rbct;
-	u32 rsvd4[15];
-	u32 tbsr;
-	u32 tbdr;
-	u32 rsvd5[1];
-	u32 sr;
-	u32 fr;
-	u32 rser;
-	u32 spndst;
-	u32 sptrclr;
-	u32 rsvd6[4];
-	u32 sfa1ad;
-	u32 sfa2ad;
-	u32 sfb1ad;
-	u32 sfb2ad;
-	u32 rsvd7[28];
-	u32 rbdr[32];
-	u32 rsvd8[32];
-	u32 lutkey;
-	u32 lckcr;
-	u32 rsvd9[2];
-	u32 lut[64];
-};
-
-#define QSPI_IPCR_SEQID_SHIFT		24
-#define QSPI_IPCR_SEQID_MASK		(0xf << QSPI_IPCR_SEQID_SHIFT)
-
-#define QSPI_MCR_END_CFD_SHIFT		2
-#define QSPI_MCR_END_CFD_MASK		(3 << QSPI_MCR_END_CFD_SHIFT)
-#ifdef CONFIG_SYS_FSL_QSPI_AHB
-/* AHB needs 64bit operation */
-#define QSPI_MCR_END_CFD_LE		(3 << QSPI_MCR_END_CFD_SHIFT)
-#else
-#define QSPI_MCR_END_CFD_LE		(1 << QSPI_MCR_END_CFD_SHIFT)
-#endif
-#define QSPI_MCR_DDR_EN_SHIFT		7
-#define QSPI_MCR_DDR_EN_MASK		(1 << QSPI_MCR_DDR_EN_SHIFT)
-#define QSPI_MCR_CLR_RXF_SHIFT		10
-#define QSPI_MCR_CLR_RXF_MASK		(1 << QSPI_MCR_CLR_RXF_SHIFT)
-#define QSPI_MCR_CLR_TXF_SHIFT		11
-#define QSPI_MCR_CLR_TXF_MASK		(1 << QSPI_MCR_CLR_TXF_SHIFT)
-#define QSPI_MCR_MDIS_SHIFT		14
-#define QSPI_MCR_MDIS_MASK		(1 << QSPI_MCR_MDIS_SHIFT)
-#define QSPI_MCR_RESERVED_SHIFT		16
-#define QSPI_MCR_RESERVED_MASK		(0xf << QSPI_MCR_RESERVED_SHIFT)
-#define QSPI_MCR_SWRSTHD_SHIFT		1
-#define QSPI_MCR_SWRSTHD_MASK		(1 << QSPI_MCR_SWRSTHD_SHIFT)
-#define QSPI_MCR_SWRSTSD_SHIFT		0
-#define QSPI_MCR_SWRSTSD_MASK		(1 << QSPI_MCR_SWRSTSD_SHIFT)
-
-#define QSPI_SMPR_HSENA_SHIFT		0
-#define QSPI_SMPR_HSENA_MASK		(1 << QSPI_SMPR_HSENA_SHIFT)
-#define QSPI_SMPR_FSPHS_SHIFT		5
-#define QSPI_SMPR_FSPHS_MASK		(1 << QSPI_SMPR_FSPHS_SHIFT)
-#define QSPI_SMPR_FSDLY_SHIFT		6
-#define QSPI_SMPR_FSDLY_MASK		(1 << QSPI_SMPR_FSDLY_SHIFT)
-#define QSPI_SMPR_DDRSMP_SHIFT		16
-#define QSPI_SMPR_DDRSMP_MASK		(7 << QSPI_SMPR_DDRSMP_SHIFT)
-
-#define QSPI_BUFXCR_INVALID_MSTRID	0xe
-#define QSPI_BUF3CR_ALLMST_SHIFT	31
-#define QSPI_BUF3CR_ALLMST_MASK		(1 << QSPI_BUF3CR_ALLMST_SHIFT)
-#define QSPI_BUF3CR_ADATSZ_SHIFT	8
-#define QSPI_BUF3CR_ADATSZ_MASK		(0xFF << QSPI_BUF3CR_ADATSZ_SHIFT)
-
-#define QSPI_BFGENCR_SEQID_SHIFT	12
-#define QSPI_BFGENCR_SEQID_MASK		(0xf << QSPI_BFGENCR_SEQID_SHIFT)
-#define QSPI_BFGENCR_PAR_EN_SHIFT	16
-#define QSPI_BFGENCR_PAR_EN_MASK	(1 << QSPI_BFGENCR_PAR_EN_SHIFT)
-
-#define QSPI_RBSR_RDBFL_SHIFT		8
-#define QSPI_RBSR_RDBFL_MASK		(0x3f << QSPI_RBSR_RDBFL_SHIFT)
-
-#define QSPI_RBCT_RXBRD_SHIFT		8
-#define QSPI_RBCT_RXBRD_USEIPS		(1 << QSPI_RBCT_RXBRD_SHIFT)
-
-#define QSPI_SR_AHB_ACC_SHIFT		2
-#define QSPI_SR_AHB_ACC_MASK		(1 << QSPI_SR_AHB_ACC_SHIFT)
-#define QSPI_SR_IP_ACC_SHIFT		1
-#define QSPI_SR_IP_ACC_MASK		(1 << QSPI_SR_IP_ACC_SHIFT)
-#define QSPI_SR_BUSY_SHIFT		0
-#define QSPI_SR_BUSY_MASK		(1 << QSPI_SR_BUSY_SHIFT)
-
-#define QSPI_LCKCR_LOCK			0x1
-#define QSPI_LCKCR_UNLOCK		0x2
-
-#define LUT_KEY_VALUE			0x5af05af0
-
-#define OPRND0_SHIFT			0
-#define OPRND0(x)			((x) << OPRND0_SHIFT)
-#define PAD0_SHIFT			8
-#define PAD0(x)				((x) << PAD0_SHIFT)
-#define INSTR0_SHIFT			10
-#define INSTR0(x)			((x) << INSTR0_SHIFT)
-#define OPRND1_SHIFT			16
-#define OPRND1(x)			((x) << OPRND1_SHIFT)
-#define PAD1_SHIFT			24
-#define PAD1(x)				((x) << PAD1_SHIFT)
-#define INSTR1_SHIFT			26
-#define INSTR1(x)			((x) << INSTR1_SHIFT)
-
-#define LUT_CMD				1
-#define LUT_ADDR			2
-#define LUT_DUMMY			3
-#define LUT_READ			7
-#define LUT_WRITE			8
-
-#define LUT_PAD1			0
-#define LUT_PAD2			1
-#define LUT_PAD4			2
-
-#define ADDR24BIT			0x18
-#define ADDR32BIT			0x20
-
-#endif /* _FSL_QSPI_H_ */
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index a9d7715a55..e1336b89c5 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -8,10 +8,12 @@
 #define LOG_CATEGORY	UCLASS_SPI
 
 #include <common.h>
+#include <bootstage.h>
 #include <div64.h>
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <pch.h>
 #include <pci.h>
@@ -22,7 +24,10 @@
 #include <spl.h>
 #include <asm/fast_spi.h>
 #include <asm/io.h>
+#include <dm/uclass-internal.h>
 #include <asm/mtrr.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 
 #include "ich.h"
@@ -610,15 +615,94 @@ static int ich_spi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
 	return ret;
 }
 
+/**
+ * ich_spi_get_basics() - Get basic information about the ICH device
+ *
+ * This works without probing any devices if requested.
+ *
+ * @bus: SPI controller to use
+ * @can_probe: true if this function is allowed to probe the PCH
+ * @pchp: Returns a pointer to the pch, or NULL if not found
+ * @ich_versionp: Returns ICH version detected on success
+ * @mmio_basep: Returns the address of the SPI registers on success
+ * @return 0 if OK, -EPROTOTYPE if the PCH could not be found, -EAGAIN if
+ *	the function cannot success without probing, possible another error if
+ *	pch_get_spi_base() fails
+ */
+static int ich_spi_get_basics(struct udevice *bus, bool can_probe,
+			      struct udevice **pchp,
+			      enum ich_version *ich_versionp, ulong *mmio_basep)
+{
+	struct udevice *pch = NULL;
+	int ret = 0;
+
+	/* Find a PCH if there is one */
+	if (can_probe) {
+		pch = dev_get_parent(bus);
+		if (device_get_uclass_id(pch) != UCLASS_PCH) {
+			uclass_first_device(UCLASS_PCH, &pch);
+			if (!pch)
+				return log_msg_ret("uclass", -EPROTOTYPE);
+		}
+	}
+
+	*ich_versionp = dev_get_driver_data(bus);
+	if (*ich_versionp == ICHV_APL)
+		*mmio_basep = dm_pci_read_bar32(bus, 0);
+	else if (pch)
+		ret = pch_get_spi_base(pch, mmio_basep);
+	else
+		return -EAGAIN;
+	*pchp = pch;
+
+	return ret;
+}
+
+/**
+ * ich_get_mmap_bus() - Handle the get_mmap() method for a bus
+ *
+ * There are several cases to consider:
+ * 1. Using of-platdata, in which case we have the BDF and can access the
+ *	registers by reading the BAR
+ * 2. Not using of-platdata, but still with a SPI controller that is on its own
+ * PCI PDF. In this case we read the BDF from the parent platdata and again get
+ *	the registers by reading the BAR
+ * 3. Using a SPI controller that is a child of the PCH, in which case we try
+ *	to find the registers by asking the PCH. This only works if the PCH has
+ *	been probed (which it will be if the bus is probed since parents are
+ *	probed before children), since the PCH may not have a PCI address until
+ *	its parent (the PCI bus itself) has been probed. If you are using this
+ *	method then you should make sure the SPI bus is probed.
+ *
+ * The first two cases are useful in early init. The last one is more useful
+ * afterwards.
+ */
 static int ich_get_mmap_bus(struct udevice *bus, ulong *map_basep,
 			    uint *map_sizep, uint *offsetp)
 {
 	pci_dev_t spi_bdf;
-
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
-	struct pci_child_platdata *pplat = dev_get_parent_platdata(bus);
+	if (device_is_on_pci_bus(bus)) {
+		struct pci_child_platdata *pplat;
+
+		pplat = dev_get_parent_platdata(bus);
+		spi_bdf = pplat->devfn;
+	} else {
+		enum ich_version ich_version;
+		struct fast_spi_regs *regs;
+		struct udevice *pch;
+		ulong mmio_base;
+		int ret;
 
-	spi_bdf = pplat->devfn;
+		ret = ich_spi_get_basics(bus, device_active(bus), &pch,
+					 &ich_version, &mmio_base);
+		if (ret)
+			return log_msg_ret("basics", ret);
+		regs = (struct fast_spi_regs *)mmio_base;
+
+		return fast_spi_get_bios_mmap_regs(regs, map_basep, map_sizep,
+						   offsetp);
+	}
 #else
 	struct ich_spi_platdata *plat = dev_get_platdata(bus);
 
@@ -862,23 +946,16 @@ static int ich_spi_child_pre_probe(struct udevice *dev)
 static int ich_spi_ofdata_to_platdata(struct udevice *dev)
 {
 	struct ich_spi_platdata *plat = dev_get_platdata(dev);
+	int ret;
 
 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
 	struct ich_spi_priv *priv = dev_get_priv(dev);
 
-	/* Find a PCH if there is one */
-	uclass_first_device(UCLASS_PCH, &priv->pch);
-	if (!priv->pch)
-		priv->pch = dev_get_parent(dev);
-
-	plat->ich_version = dev_get_driver_data(dev);
+	ret = ich_spi_get_basics(dev, true, &priv->pch, &plat->ich_version,
+				 &plat->mmio_base);
+	if (ret)
+		return log_msg_ret("basics", ret);
 	plat->lockdown = dev_read_bool(dev, "intel,spi-lock-down");
-	if (plat->ich_version == ICHV_APL) {
-		plat->mmio_base = dm_pci_read_bar32(dev, 0);
-	} else  {
-		/* SBASE is similar */
-		pch_get_spi_base(priv->pch, &plat->mmio_base);
-	}
 	/*
 	 * Use an int so that the property is present in of-platdata even
 	 * when false.
diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h
index d7f1ffdf37..23c7827740 100644
--- a/drivers/spi/ich.h
+++ b/drivers/spi/ich.h
@@ -8,6 +8,7 @@
 #ifndef _ICH_H_
 #define _ICH_H_
 
+#include <linux/bitops.h>
 struct ich7_spi_regs {
 	uint16_t spis;
 	uint16_t spic;
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index c725625146..3986b06b25 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -9,11 +9,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
 #include <asm/arch/soc.h>
-#ifdef CONFIG_KIRKWOOD
+#ifdef CONFIG_ARCH_KIRKWOOD
 #include <asm/arch/mpp.h>
 #endif
 #include <asm/arch-mvebu/spi.h>
@@ -98,7 +99,7 @@ static int _spi_xfer(struct kwspi_registers *reg, unsigned int bitlen,
 static struct kwspi_registers *spireg =
 	(struct kwspi_registers *)MVEBU_SPI_BASE;
 
-#ifdef CONFIG_KIRKWOOD
+#ifdef CONFIG_ARCH_KIRKWOOD
 static u32 cs_spi_mpp_back[2];
 #endif
 
@@ -107,7 +108,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 {
 	struct spi_slave *slave;
 	u32 data;
-#ifdef CONFIG_KIRKWOOD
+#ifdef CONFIG_ARCH_KIRKWOOD
 	static const u32 kwspi_mpp_config[2][2] = {
 		{ MPP0_SPI_SCn, 0 }, /* if cs == 0 */
 		{ MPP7_SPI_SCn, 0 } /* if cs != 0 */
@@ -135,7 +136,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 	writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
 	writel(KWSPI_IRQMASK, &spireg->irq_mask);
 
-#ifdef CONFIG_KIRKWOOD
+#ifdef CONFIG_ARCH_KIRKWOOD
 	/* program mpp registers to select  SPI_CSn */
 	kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
 #endif
@@ -145,7 +146,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
 void spi_free_slave(struct spi_slave *slave)
 {
-#ifdef CONFIG_KIRKWOOD
+#ifdef CONFIG_ARCH_KIRKWOOD
 	kirkwood_mpp_conf(cs_spi_mpp_back, NULL);
 #endif
 	free(slave);
@@ -182,10 +183,6 @@ int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 }
 #endif
 
-void spi_init(void)
-{
-}
-
 void spi_cs_activate(struct spi_slave *slave)
 {
 	_spi_cs_activate(spireg);
diff --git a/drivers/spi/lpc32xx_ssp.c b/drivers/spi/lpc32xx_ssp.c
deleted file mode 100644
index 4b09366317..0000000000
--- a/drivers/spi/lpc32xx_ssp.c
+++ /dev/null
@@ -1,134 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * LPC32xx SSP interface (SPI mode)
- *
- * (C) Copyright 2014  DENX Software Engineering GmbH
- * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
- */
-
-#include <common.h>
-#include <linux/compat.h>
-#include <asm/io.h>
-#include <malloc.h>
-#include <spi.h>
-#include <asm/arch/clk.h>
-
-/* SSP chip registers */
-struct ssp_regs {
-	u32 cr0;
-	u32 cr1;
-	u32 data;
-	u32 sr;
-	u32 cpsr;
-	u32 imsc;
-	u32 ris;
-	u32 mis;
-	u32 icr;
-	u32 dmacr;
-};
-
-/* CR1 register defines  */
-#define SSP_CR1_SSP_ENABLE 0x0002
-
-/* SR register defines  */
-#define SSP_SR_TNF 0x0002
-/* SSP status RX FIFO not empty bit */
-#define SSP_SR_RNE 0x0004
-
-/* lpc32xx spi slave */
-struct lpc32xx_spi_slave {
-	struct spi_slave slave;
-	struct ssp_regs *regs;
-};
-
-static inline struct lpc32xx_spi_slave *to_lpc32xx_spi_slave(
-	struct spi_slave *slave)
-{
-	return container_of(slave, struct lpc32xx_spi_slave, slave);
-}
-
-/* the following is called in sequence by do_spi_xfer() */
-
-struct spi_slave *spi_setup_slave(uint bus, uint cs, uint max_hz, uint mode)
-{
-	struct lpc32xx_spi_slave *lslave;
-
-	/* we only set up SSP0 for now, so ignore bus */
-
-	if (mode & SPI_3WIRE) {
-		pr_err("3-wire mode not supported");
-		return NULL;
-	}
-
-	if (mode & SPI_SLAVE) {
-		pr_err("slave mode not supported\n");
-		return NULL;
-	}
-
-	if (mode & SPI_PREAMBLE) {
-		pr_err("preamble byte skipping not supported\n");
-		return NULL;
-	}
-
-	lslave = spi_alloc_slave(struct lpc32xx_spi_slave, bus, cs);
-	if (!lslave) {
-		printf("SPI_error: Fail to allocate lpc32xx_spi_slave\n");
-		return NULL;
-	}
-
-	lslave->regs = (struct ssp_regs *)SSP0_BASE;
-
-	/*
-	 * 8 bit frame, SPI fmt, 500kbps -> clock divider is 26.
-	 * Set SCR to 0 and CPSDVSR to 26.
-	 */
-
-	writel(0x7, &lslave->regs->cr0); /* 8-bit chunks, SPI, 1 clk/bit */
-	writel(26, &lslave->regs->cpsr); /* SSP clock = HCLK/26 = 500kbps */
-	writel(0, &lslave->regs->imsc); /* do not raise any interrupts */
-	writel(0, &lslave->regs->icr); /* clear any pending interrupt */
-	writel(0, &lslave->regs->dmacr); /* do not do DMAs */
-	writel(SSP_CR1_SSP_ENABLE, &lslave->regs->cr1); /* enable SSP0 */
-	return &lslave->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
-	struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave);
-
-	debug("(lpc32xx) spi_free_slave: 0x%08x\n", (u32)lslave);
-	free(lslave);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
-	/* only one bus and slave so far, always available */
-	return 0;
-}
-
-int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
-	const void *dout, void *din, unsigned long flags)
-{
-	struct lpc32xx_spi_slave *lslave = to_lpc32xx_spi_slave(slave);
-	int bytelen = bitlen >> 3;
-	int idx_out = 0;
-	int idx_in = 0;
-	int start_time;
-
-	start_time = get_timer(0);
-	while ((idx_out < bytelen) || (idx_in < bytelen)) {
-		int status = readl(&lslave->regs->sr);
-		if ((idx_out < bytelen) && (status & SSP_SR_TNF))
-			writel(((u8 *)dout)[idx_out++], &lslave->regs->data);
-		if ((idx_in < bytelen) && (status & SSP_SR_RNE))
-			((u8 *)din)[idx_in++] = readl(&lslave->regs->data);
-		if (get_timer(start_time) >= CONFIG_LPC32XX_SSP_TIMEOUT)
-			return -1;
-	}
-	return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-	/* do nothing */
-}
diff --git a/drivers/spi/meson_spifc.c b/drivers/spi/meson_spifc.c
index 3d551694cb..2cdc018682 100644
--- a/drivers/spi/meson_spifc.c
+++ b/drivers/spi/meson_spifc.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <spi.h>
 #include <clk.h>
 #include <dm.h>
@@ -15,6 +16,7 @@
 #include <errno.h>
 #include <asm/io.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
 
 /* register map */
 #define REG_CMD			0x00
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index b020ce2b9d..0026ad23e3 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -20,6 +20,7 @@
 #include <dm.h>
 #include <mpc8xx.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 #include <asm/cpm_8xx.h>
 #include <asm/io.h>
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index e48debb045..811b5d44fb 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -8,11 +8,14 @@
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/mpc8xxx_spi.h>
 #include <asm-generic/gpio.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 enum {
 	SPI_EV_NE = BIT(31 - 22),	/* Receiver Not Empty */
diff --git a/drivers/spi/mscc_bb_spi.c b/drivers/spi/mscc_bb_spi.c
index c3c7b80426..0454410ee9 100644
--- a/drivers/spi/mscc_bb_spi.c
+++ b/drivers/spi/mscc_bb_spi.c
@@ -8,11 +8,13 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <dm.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/delay.h>
 
 struct mscc_bb_priv {
diff --git a/drivers/spi/mt7621_spi.c b/drivers/spi/mt7621_spi.c
index 90e85c6b44..3a0738eb2b 100644
--- a/drivers/spi/mt7621_spi.c
+++ b/drivers/spi/mt7621_spi.c
@@ -11,8 +11,10 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <spi.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 #define MT7621_RX_FIFO_LEN	32
diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c
index 1469771619..2302e62be4 100644
--- a/drivers/spi/mvebu_a3700_spi.c
+++ b/drivers/spi/mvebu_a3700_spi.c
@@ -7,12 +7,14 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <clk.h>
 #include <wait_bit.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 4d1317c364..f52ebf4d67 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -5,9 +5,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 3ca30887fb..0da4a80d71 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -14,9 +14,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <spi.h>
+#include <asm/cache.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/spi/nxp_fspi.c b/drivers/spi/nxp_fspi.c
index 0e6c7be785..c507437f2e 100644
--- a/drivers/spi/nxp_fspi.c
+++ b/drivers/spi/nxp_fspi.c
@@ -40,6 +40,7 @@
 #include <spi-mem.h>
 #include <dm.h>
 #include <clk.h>
+#include <linux/bitops.h>
 #include <linux/kernel.h>
 #include <linux/sizes.h>
 #include <linux/iopoll.h>
@@ -421,7 +422,7 @@ static bool nxp_fspi_supports_op(struct spi_slave *slave,
 	return true;
 }
 
-/* Instead of busy looping invoke readl_poll_timeout functionality. */
+/* Instead of busy looping invoke readl_poll_sleep_timeout functionality. */
 static int fspi_readl_poll_tout(struct nxp_fspi *f, void __iomem *base,
 				u32 mask, u32 delay_us,
 				u32 timeout_us, bool c)
@@ -432,11 +433,11 @@ static int fspi_readl_poll_tout(struct nxp_fspi *f, void __iomem *base,
 		mask = (u32)cpu_to_be32(mask);
 
 	if (c)
-		return readl_poll_timeout(base, reg, (reg & mask),
-					  timeout_us);
+		return readl_poll_sleep_timeout(base, reg, (reg & mask),
+						delay_us, timeout_us);
 	else
-		return readl_poll_timeout(base, reg, !(reg & mask),
-					  timeout_us);
+		return readl_poll_sleep_timeout(base, reg, !(reg & mask),
+						delay_us, timeout_us);
 }
 
 /*
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index ff4c700645..6a615d1498 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -21,6 +21,7 @@
 #include <spi.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/pic32_spi.c b/drivers/spi/pic32_spi.c
index 4ec6683de1..52e9eff743 100644
--- a/drivers/spi/pic32_spi.c
+++ b/drivers/spi/pic32_spi.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include <spi.h>
diff --git a/drivers/spi/renesas_rpc_spi.c b/drivers/spi/renesas_rpc_spi.c
index bb2e7748fe..3ea59b8fb8 100644
--- a/drivers/spi/renesas_rpc_spi.c
+++ b/drivers/spi/renesas_rpc_spi.c
@@ -12,6 +12,8 @@
 #include <dm/of_access.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <spi.h>
 #include <wait_bit.h>
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 95eeb8307a..833cb04922 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -15,8 +15,10 @@
 #include <dm.h>
 #include <dt-structs.h>
 #include <errno.h>
+#include <log.h>
 #include <spi.h>
 #include <time.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch-rockchip/clock.h>
diff --git a/drivers/spi/sandbox_spi.c b/drivers/spi/sandbox_spi.c
index 6b610ff823..b0a46c8868 100644
--- a/drivers/spi/sandbox_spi.c
+++ b/drivers/spi/sandbox_spi.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi_flash.h>
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 5ae203d8d4..2839dd1ceb 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -13,6 +13,7 @@
 #include <wait_bit.h>
 #include <asm/arch/rmobile.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* SH QSPI register bit masks <REG>_<BIT> */
 #define SPCR_MSTR	0x08
diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c
deleted file mode 100644
index c58fd0ebc4..0000000000
--- a/drivers/spi/sh_spi.c
+++ /dev/null
@@ -1,249 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * SH SPI driver
- *
- * Copyright (C) 2011-2012 Renesas Solutions Corp.
- */
-
-#include <common.h>
-#include <console.h>
-#include <malloc.h>
-#include <spi.h>
-#include <asm/io.h>
-#include "sh_spi.h"
-
-static void sh_spi_write(unsigned long data, unsigned long *reg)
-{
-	writel(data, reg);
-}
-
-static unsigned long sh_spi_read(unsigned long *reg)
-{
-	return readl(reg);
-}
-
-static void sh_spi_set_bit(unsigned long val, unsigned long *reg)
-{
-	unsigned long tmp;
-
-	tmp = sh_spi_read(reg);
-	tmp |= val;
-	sh_spi_write(tmp, reg);
-}
-
-static void sh_spi_clear_bit(unsigned long val, unsigned long *reg)
-{
-	unsigned long tmp;
-
-	tmp = sh_spi_read(reg);
-	tmp &= ~val;
-	sh_spi_write(tmp, reg);
-}
-
-static void clear_fifo(struct sh_spi *ss)
-{
-	sh_spi_set_bit(SH_SPI_RSTF, &ss->regs->cr2);
-	sh_spi_clear_bit(SH_SPI_RSTF, &ss->regs->cr2);
-}
-
-static int recvbuf_wait(struct sh_spi *ss)
-{
-	while (sh_spi_read(&ss->regs->cr1) & SH_SPI_RBE) {
-		if (ctrlc())
-			return 1;
-		udelay(10);
-	}
-	return 0;
-}
-
-static int write_fifo_empty_wait(struct sh_spi *ss)
-{
-	while (!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBE)) {
-		if (ctrlc())
-			return 1;
-		udelay(10);
-	}
-	return 0;
-}
-
-static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs)
-{
-	unsigned long val = 0;
-
-	if (cs & 0x01)
-		val |= SH_SPI_SSS0;
-	if (cs & 0x02)
-		val |= SH_SPI_SSS1;
-
-	sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4);
-	sh_spi_set_bit(val, &ss->regs->cr4);
-}
-
-struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
-		unsigned int max_hz, unsigned int mode)
-{
-	struct sh_spi *ss;
-
-	if (!spi_cs_is_valid(bus, cs))
-		return NULL;
-
-	ss = spi_alloc_slave(struct sh_spi, bus, cs);
-	if (!ss)
-		return NULL;
-
-	ss->regs = (struct sh_spi_regs *)CONFIG_SH_SPI_BASE;
-
-	/* SPI sycle stop */
-	sh_spi_write(0xfe, &ss->regs->cr1);
-	/* CR1 init */
-	sh_spi_write(0x00, &ss->regs->cr1);
-	/* CR3 init */
-	sh_spi_write(0x00, &ss->regs->cr3);
-	sh_spi_set_cs(ss, cs);
-
-	clear_fifo(ss);
-
-	/* 1/8 clock */
-	sh_spi_write(sh_spi_read(&ss->regs->cr2) | 0x07, &ss->regs->cr2);
-	udelay(10);
-
-	return &ss->slave;
-}
-
-void spi_free_slave(struct spi_slave *slave)
-{
-	struct sh_spi *spi = to_sh_spi(slave);
-
-	free(spi);
-}
-
-int spi_claim_bus(struct spi_slave *slave)
-{
-	return 0;
-}
-
-void spi_release_bus(struct spi_slave *slave)
-{
-	struct sh_spi *ss = to_sh_spi(slave);
-
-	sh_spi_write(sh_spi_read(&ss->regs->cr1) &
-		~(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD), &ss->regs->cr1);
-}
-
-static int sh_spi_send(struct sh_spi *ss, const unsigned char *tx_data,
-			unsigned int len, unsigned long flags)
-{
-	int i, cur_len, ret = 0;
-	int remain = (int)len;
-
-	if (len >= SH_SPI_FIFO_SIZE)
-		sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
-
-	while (remain > 0) {
-		cur_len = (remain < SH_SPI_FIFO_SIZE) ?
-				remain : SH_SPI_FIFO_SIZE;
-		for (i = 0; i < cur_len &&
-			!(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) &&
-			!(sh_spi_read(&ss->regs->cr1) & SH_SPI_TBF);
-				i++)
-			sh_spi_write(tx_data[i], &ss->regs->tbr_rbr);
-
-		cur_len = i;
-
-		if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) {
-			/* Abort the transaction */
-			flags |= SPI_XFER_END;
-			sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4);
-			ret = 1;
-			break;
-		}
-
-		remain -= cur_len;
-		tx_data += cur_len;
-
-		if (remain > 0)
-			write_fifo_empty_wait(ss);
-	}
-
-	if (flags & SPI_XFER_END) {
-		sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
-		sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
-		udelay(100);
-		write_fifo_empty_wait(ss);
-	}
-
-	return ret;
-}
-
-static int sh_spi_receive(struct sh_spi *ss, unsigned char *rx_data,
-			  unsigned int len, unsigned long flags)
-{
-	int i;
-
-	if (len > SH_SPI_MAX_BYTE)
-		sh_spi_write(SH_SPI_MAX_BYTE, &ss->regs->cr3);
-	else
-		sh_spi_write(len, &ss->regs->cr3);
-
-	sh_spi_clear_bit(SH_SPI_SSD | SH_SPI_SSDB, &ss->regs->cr1);
-	sh_spi_set_bit(SH_SPI_SSA, &ss->regs->cr1);
-
-	for (i = 0; i < len; i++) {
-		if (recvbuf_wait(ss))
-			return 0;
-
-		rx_data[i] = (unsigned char)sh_spi_read(&ss->regs->tbr_rbr);
-	}
-	sh_spi_write(0, &ss->regs->cr3);
-
-	return 0;
-}
-
-int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
-		void *din, unsigned long flags)
-{
-	struct sh_spi *ss = to_sh_spi(slave);
-	const unsigned char *tx_data = dout;
-	unsigned char *rx_data = din;
-	unsigned int len = bitlen / 8;
-	int ret = 0;
-
-	if (flags & SPI_XFER_BEGIN)
-		sh_spi_write(sh_spi_read(&ss->regs->cr1) & ~SH_SPI_SSA,
-				&ss->regs->cr1);
-
-	if (tx_data)
-		ret = sh_spi_send(ss, tx_data, len, flags);
-
-	if (ret == 0 && rx_data)
-		ret = sh_spi_receive(ss, rx_data, len, flags);
-
-	if (flags & SPI_XFER_END) {
-		sh_spi_set_bit(SH_SPI_SSD, &ss->regs->cr1);
-		udelay(100);
-
-		sh_spi_clear_bit(SH_SPI_SSA | SH_SPI_SSDB | SH_SPI_SSD,
-				 &ss->regs->cr1);
-		clear_fifo(ss);
-	}
-
-	return ret;
-}
-
-int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
-{
-	if (!bus && cs < SH_SPI_NUM_CS)
-		return 1;
-	else
-		return 0;
-}
-
-void spi_cs_activate(struct spi_slave *slave)
-{
-
-}
-
-void spi_cs_deactivate(struct spi_slave *slave)
-{
-
-}
diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h
deleted file mode 100644
index 33a4630c8d..0000000000
--- a/drivers/spi/sh_spi.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * SH SPI driver
- *
- * Copyright (C) 2011 Renesas Solutions Corp.
- */
-
-#ifndef __SH_SPI_H__
-#define __SH_SPI_H__
-
-#include <spi.h>
-
-struct sh_spi_regs {
-	unsigned long tbr_rbr;
-	unsigned long resv1;
-	unsigned long cr1;
-	unsigned long resv2;
-	unsigned long cr2;
-	unsigned long resv3;
-	unsigned long cr3;
-	unsigned long resv4;
-	unsigned long cr4;
-};
-
-/* CR1 */
-#define SH_SPI_TBE	0x80
-#define SH_SPI_TBF	0x40
-#define SH_SPI_RBE	0x20
-#define SH_SPI_RBF	0x10
-#define SH_SPI_PFONRD	0x08
-#define SH_SPI_SSDB	0x04
-#define SH_SPI_SSD	0x02
-#define SH_SPI_SSA	0x01
-
-/* CR2 */
-#define SH_SPI_RSTF	0x80
-#define SH_SPI_LOOPBK	0x40
-#define SH_SPI_CPOL	0x20
-#define SH_SPI_CPHA	0x10
-#define SH_SPI_L1M0	0x08
-
-/* CR3 */
-#define SH_SPI_MAX_BYTE	0xFF
-
-/* CR4 */
-#define SH_SPI_TBEI	0x80
-#define SH_SPI_TBFI	0x40
-#define SH_SPI_RBEI	0x20
-#define SH_SPI_RBFI	0x10
-#define SH_SPI_SSS1	0x08
-#define SH_SPI_WPABRT	0x04
-#define SH_SPI_SSS0	0x01
-
-#define SH_SPI_FIFO_SIZE	32
-#define SH_SPI_NUM_CS		4
-
-struct sh_spi {
-	struct spi_slave	slave;
-	struct sh_spi_regs	*regs;
-};
-
-static inline struct sh_spi *to_sh_spi(struct spi_slave *slave)
-{
-	return container_of(slave, struct sh_spi, slave);
-}
-
-#endif
diff --git a/drivers/spi/soft_spi.c b/drivers/spi/soft_spi.c
index b80f810bd1..e8d7758da0 100644
--- a/drivers/spi/soft_spi.c
+++ b/drivers/spi/soft_spi.c
@@ -13,9 +13,12 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/gpio.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/spi-mem-nodm.c b/drivers/spi/spi-mem-nodm.c
index 83dde4806e..765f05fe54 100644
--- a/drivers/spi/spi-mem-nodm.c
+++ b/drivers/spi/spi-mem-nodm.c
@@ -3,6 +3,7 @@
  * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
  */
 
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi-mem.h>
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index e900c997bd..d344701aeb 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -7,6 +7,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/dmaengine.h>
 #include <linux/pm_runtime.h>
@@ -153,7 +154,7 @@ bool spi_mem_default_supports_op(struct spi_slave *slave,
 	    spi_check_buswidth_req(slave, op->dummy.buswidth, true))
 		return false;
 
-	if (op->data.nbytes &&
+	if (op->data.dir != SPI_MEM_NO_DATA &&
 	    spi_check_buswidth_req(slave, op->data.buswidth,
 				   op->data.dir == SPI_MEM_DATA_OUT))
 		return false;
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index 969bd4b75c..0e0ce25abb 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -8,9 +8,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/device_compat.h>
 #include <malloc.h>
-#include <spi.h>
+#include <spi-mem.h>
+#include <wait_bit.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/log2.h>
 #include <clk.h>
 
@@ -85,6 +88,11 @@
 #define SIFIVE_SPI_IP_TXWM               BIT(0)
 #define SIFIVE_SPI_IP_RXWM               BIT(1)
 
+/* format protocol */
+#define SIFIVE_SPI_PROTO_QUAD		4 /* 4 lines I/O protocol transfer */
+#define SIFIVE_SPI_PROTO_DUAL		2 /* 2 lines I/O protocol transfer */
+#define SIFIVE_SPI_PROTO_SINGLE		1 /* 1 line I/O protocol transfer */
+
 struct sifive_spi {
 	void		*regs;		/* base address of the registers */
 	u32		fifo_depth;
@@ -92,28 +100,29 @@ struct sifive_spi {
 	u32		cs_inactive;	/* Level of the CS pins when inactive*/
 	u32		freq;
 	u32		num_cs;
+	u8		fmt_proto;
 };
 
 static void sifive_spi_prep_device(struct sifive_spi *spi,
-				   struct dm_spi_slave_platdata *slave)
+				   struct dm_spi_slave_platdata *slave_plat)
 {
 	/* Update the chip select polarity */
-	if (slave->mode & SPI_CS_HIGH)
-		spi->cs_inactive &= ~BIT(slave->cs);
+	if (slave_plat->mode & SPI_CS_HIGH)
+		spi->cs_inactive &= ~BIT(slave_plat->cs);
 	else
-		spi->cs_inactive |= BIT(slave->cs);
+		spi->cs_inactive |= BIT(slave_plat->cs);
 	writel(spi->cs_inactive, spi->regs + SIFIVE_SPI_REG_CSDEF);
 
 	/* Select the correct device */
-	writel(slave->cs, spi->regs + SIFIVE_SPI_REG_CSID);
+	writel(slave_plat->cs, spi->regs + SIFIVE_SPI_REG_CSID);
 }
 
 static int sifive_spi_set_cs(struct sifive_spi *spi,
-			     struct dm_spi_slave_platdata *slave)
+			     struct dm_spi_slave_platdata *slave_plat)
 {
 	u32 cs_mode = SIFIVE_SPI_CSMODE_MODE_HOLD;
 
-	if (slave->mode & SPI_CS_HIGH)
+	if (slave_plat->mode & SPI_CS_HIGH)
 		cs_mode = SIFIVE_SPI_CSMODE_MODE_AUTO;
 
 	writel(cs_mode, spi->regs + SIFIVE_SPI_REG_CSMODE);
@@ -127,8 +136,8 @@ static void sifive_spi_clear_cs(struct sifive_spi *spi)
 }
 
 static void sifive_spi_prep_transfer(struct sifive_spi *spi,
-				     bool is_rx_xfer,
-				     struct dm_spi_slave_platdata *slave)
+				     struct dm_spi_slave_platdata *slave_plat,
+				     u8 *rx_ptr)
 {
 	u32 cr;
 
@@ -141,21 +150,26 @@ static void sifive_spi_prep_transfer(struct sifive_spi *spi,
 
 	/* LSB first? */
 	cr &= ~SIFIVE_SPI_FMT_ENDIAN;
-	if (slave->mode & SPI_LSB_FIRST)
+	if (slave_plat->mode & SPI_LSB_FIRST)
 		cr |= SIFIVE_SPI_FMT_ENDIAN;
 
 	/* Number of wires ? */
 	cr &= ~SIFIVE_SPI_FMT_PROTO_MASK;
-	if ((slave->mode & SPI_TX_QUAD) || (slave->mode & SPI_RX_QUAD))
+	switch (spi->fmt_proto) {
+	case SIFIVE_SPI_PROTO_QUAD:
 		cr |= SIFIVE_SPI_FMT_PROTO_QUAD;
-	else if ((slave->mode & SPI_TX_DUAL) || (slave->mode & SPI_RX_DUAL))
+		break;
+	case SIFIVE_SPI_PROTO_DUAL:
 		cr |= SIFIVE_SPI_FMT_PROTO_DUAL;
-	else
+		break;
+	default:
 		cr |= SIFIVE_SPI_FMT_PROTO_SINGLE;
+		break;
+	}
 
 	/* SPI direction in/out ? */
 	cr &= ~SIFIVE_SPI_FMT_DIR;
-	if (!is_rx_xfer)
+	if (!rx_ptr)
 		cr |= SIFIVE_SPI_FMT_DIR;
 
 	writel(cr, spi->regs + SIFIVE_SPI_REG_FMT);
@@ -186,50 +200,62 @@ static void sifive_spi_tx(struct sifive_spi *spi, const u8 *tx_ptr)
 	writel(tx_data, spi->regs + SIFIVE_SPI_REG_TXDATA);
 }
 
+static int sifive_spi_wait(struct sifive_spi *spi, u32 bit)
+{
+	return wait_for_bit_le32(spi->regs + SIFIVE_SPI_REG_IP,
+				 bit, true, 100, false);
+}
+
 static int sifive_spi_xfer(struct udevice *dev, unsigned int bitlen,
 			   const void *dout, void *din, unsigned long flags)
 {
 	struct udevice *bus = dev->parent;
 	struct sifive_spi *spi = dev_get_priv(bus);
-	struct dm_spi_slave_platdata *slave = dev_get_parent_platdata(dev);
-	const unsigned char *tx_ptr = dout;
+	struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev);
+	const u8 *tx_ptr = dout;
 	u8 *rx_ptr = din;
 	u32 remaining_len;
 	int ret;
 
 	if (flags & SPI_XFER_BEGIN) {
-		sifive_spi_prep_device(spi, slave);
+		sifive_spi_prep_device(spi, slave_plat);
 
-		ret = sifive_spi_set_cs(spi, slave);
+		ret = sifive_spi_set_cs(spi, slave_plat);
 		if (ret)
 			return ret;
 	}
 
-	sifive_spi_prep_transfer(spi, true, slave);
+	sifive_spi_prep_transfer(spi, slave_plat, rx_ptr);
 
 	remaining_len = bitlen / 8;
 
 	while (remaining_len) {
-		int n_words, tx_words, rx_words;
-
-		n_words = min(remaining_len, spi->fifo_depth);
+		unsigned int n_words = min(remaining_len, spi->fifo_depth);
+		unsigned int tx_words, rx_words;
 
 		/* Enqueue n_words for transmission */
-		if (tx_ptr) {
-			for (tx_words = 0; tx_words < n_words; ++tx_words) {
-				sifive_spi_tx(spi, tx_ptr);
-				sifive_spi_rx(spi, NULL);
-				tx_ptr++;
-			}
+		for (tx_words = 0; tx_words < n_words; tx_words++) {
+			if (!tx_ptr)
+				sifive_spi_tx(spi, NULL);
+			else
+				sifive_spi_tx(spi, tx_ptr++);
 		}
 
-		/* Read out all the data from the RX FIFO */
 		if (rx_ptr) {
-			for (rx_words = 0; rx_words < n_words; ++rx_words) {
-				sifive_spi_tx(spi, NULL);
-				sifive_spi_rx(spi, rx_ptr);
-				rx_ptr++;
-			}
+			/* Wait for transmission + reception to complete */
+			writel(n_words - 1, spi->regs + SIFIVE_SPI_REG_RXMARK);
+			ret = sifive_spi_wait(spi, SIFIVE_SPI_IP_RXWM);
+			if (ret)
+				return ret;
+
+			/* Read out all the data from the RX FIFO */
+			for (rx_words = 0; rx_words < n_words; rx_words++)
+				sifive_spi_rx(spi, rx_ptr++);
+		} else {
+			/* Wait for transmission to complete */
+			ret = sifive_spi_wait(spi, SIFIVE_SPI_IP_TXWM);
+			if (ret)
+				return ret;
 		}
 
 		remaining_len -= n_words;
@@ -241,6 +267,80 @@ static int sifive_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	return 0;
 }
 
+static int sifive_spi_exec_op(struct spi_slave *slave,
+			      const struct spi_mem_op *op)
+{
+	struct udevice *dev = slave->dev;
+	struct sifive_spi *spi = dev_get_priv(dev->parent);
+	unsigned long flags = SPI_XFER_BEGIN;
+	u8 opcode = op->cmd.opcode;
+	unsigned int pos = 0;
+	const void *tx_buf = NULL;
+	void *rx_buf = NULL;
+	int op_len, i;
+	int ret;
+
+	if (!op->addr.nbytes && !op->dummy.nbytes && !op->data.nbytes)
+		flags |= SPI_XFER_END;
+
+	spi->fmt_proto = op->cmd.buswidth;
+
+	/* send the opcode */
+	ret = sifive_spi_xfer(dev, 8, (void *)&opcode, NULL, flags);
+	if (ret < 0) {
+		dev_err(dev, "failed to xfer opcode\n");
+		return ret;
+	}
+
+	op_len = op->addr.nbytes + op->dummy.nbytes;
+	u8 op_buf[op_len];
+
+	/* send the addr + dummy */
+	if (op->addr.nbytes) {
+		/* fill address */
+		for (i = 0; i < op->addr.nbytes; i++)
+			op_buf[pos + i] = op->addr.val >>
+				(8 * (op->addr.nbytes - i - 1));
+
+		pos += op->addr.nbytes;
+
+		/* fill dummy */
+		if (op->dummy.nbytes)
+			memset(op_buf + pos, 0xff, op->dummy.nbytes);
+
+		/* make sure to set end flag, if no data bytes */
+		if (!op->data.nbytes)
+			flags |= SPI_XFER_END;
+
+		spi->fmt_proto = op->addr.buswidth;
+
+		ret = sifive_spi_xfer(dev, op_len * 8, op_buf, NULL, flags);
+		if (ret < 0) {
+			dev_err(dev, "failed to xfer addr + dummy\n");
+			return ret;
+		}
+	}
+
+	/* send/received the data */
+	if (op->data.nbytes) {
+		if (op->data.dir == SPI_MEM_DATA_IN)
+			rx_buf = op->data.buf.in;
+		else
+			tx_buf = op->data.buf.out;
+
+		spi->fmt_proto = op->data.buswidth;
+
+		ret = sifive_spi_xfer(dev, op->data.nbytes * 8,
+				      tx_buf, rx_buf, SPI_XFER_END);
+		if (ret) {
+			dev_err(dev, "failed to xfer data\n");
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
 static int sifive_spi_set_speed(struct udevice *bus, uint speed)
 {
 	struct sifive_spi *spi = dev_get_priv(bus);
@@ -309,6 +409,10 @@ static void sifive_spi_init_hw(struct sifive_spi *spi)
 	/* Watermark interrupts are disabled by default */
 	writel(0, spi->regs + SIFIVE_SPI_REG_IE);
 
+	/* Default watermark FIFO threshold values */
+	writel(1, spi->regs + SIFIVE_SPI_REG_TXMARK);
+	writel(0, spi->regs + SIFIVE_SPI_REG_RXMARK);
+
 	/* Set CS/SCK Delays and Inactive Time to defaults */
 	writel(SIFIVE_SPI_DELAY0_CSSCK(1) | SIFIVE_SPI_DELAY0_SCKCS(1),
 	       spi->regs + SIFIVE_SPI_REG_DELAY0);
@@ -348,11 +452,16 @@ static int sifive_spi_probe(struct udevice *bus)
 	return 0;
 }
 
+static const struct spi_controller_mem_ops sifive_spi_mem_ops = {
+	.exec_op	= sifive_spi_exec_op,
+};
+
 static const struct dm_spi_ops sifive_spi_ops = {
 	.xfer		= sifive_spi_xfer,
 	.set_speed	= sifive_spi_set_speed,
 	.set_mode	= sifive_spi_set_mode,
 	.cs_info        = sifive_spi_cs_info,
+	.mem_ops	= &sifive_spi_mem_ops,
 };
 
 static const struct udevice_id sifive_spi_ids[] = {
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index c59fee10a8..d2dccd67e5 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -21,12 +21,14 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <spi.h>
 #include <errno.h>
 #include <fdt_support.h>
 #include <reset.h>
 #include <wait_bit.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #include <asm/bitops.h>
 #include <asm/gpio.h>
diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c
index 4a02d95a34..cffd9cf0b0 100644
--- a/drivers/spi/spi-uclass.c
+++ b/drivers/spi/spi-uclass.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <dm/device-internal.h>
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 6857a87dc5..001f0703e3 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -9,9 +9,12 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <reset.h>
 #include <spi-mem.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <linux/ioport.h>
 #include <linux/sizes.h>
diff --git a/drivers/spi/stm32_spi.c b/drivers/spi/stm32_spi.c
index ebf2b98fcd..4a0833b6fa 100644
--- a/drivers/spi/stm32_spi.c
+++ b/drivers/spi/stm32_spi.c
@@ -8,10 +8,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <spi.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <asm/gpio.h>
diff --git a/drivers/spi/tegra114_spi.c b/drivers/spi/tegra114_spi.c
index bb34b20f54..0e8198c5a0 100644
--- a/drivers/spi/tegra114_spi.c
+++ b/drivers/spi/tegra114_spi.c
@@ -7,11 +7,14 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <spi.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "tegra_spi.h"
 
 /* COMMAND1 */
diff --git a/drivers/spi/tegra20_sflash.c b/drivers/spi/tegra20_sflash.c
index 0e68d33be6..22a0304bfc 100644
--- a/drivers/spi/tegra20_sflash.c
+++ b/drivers/spi/tegra20_sflash.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
@@ -16,6 +17,8 @@
 #include <asm/arch-tegra/clk_rst.h>
 #include <spi.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "tegra_spi.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c
index ae2fc3e76d..3679cf06a0 100644
--- a/drivers/spi/tegra20_slink.c
+++ b/drivers/spi/tegra20_slink.c
@@ -7,12 +7,15 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <spi.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "tegra_spi.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/spi/tegra210_qspi.c b/drivers/spi/tegra210_qspi.c
index 6e540e97df..ae16b45dcb 100644
--- a/drivers/spi/tegra210_qspi.c
+++ b/drivers/spi/tegra210_qspi.c
@@ -8,12 +8,15 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch-tegra/clk_rst.h>
 #include <spi.h>
 #include <fdtdec.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "tegra_spi.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index e3750b0b17..0db0de8f1b 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <asm/arch/omap.h>
 #include <malloc.h>
@@ -17,6 +19,7 @@
 #include <asm/omap_gpio.h>
 #include <asm/omap_common.h>
 #include <asm/ti-common/ti-edma3.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <linux/kernel.h>
 #include <regmap.h>
diff --git a/drivers/spi/uniphier_spi.c b/drivers/spi/uniphier_spi.c
index 153fbb2889..114bd8abd7 100644
--- a/drivers/spi/uniphier_spi.c
+++ b/drivers/spi/uniphier_spi.c
@@ -7,9 +7,12 @@
 #include <clk.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <time.h>
 #include <dm/device_compat.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <spi.h>
 #include <wait_bit.h>
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 2b5f2cf548..05768eef72 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -16,10 +16,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
 #include <wait_bit.h>
+#include <linux/bitops.h>
 
 /*
  * [0]: http://www.xilinx.com/support/documentation
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 9ad1927a5d..db473da6ea 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -8,9 +8,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 0b2b2f4810..3e66b34ebb 100644
--- a/drivers/spi/zynq_spi.c
+++ b/drivers/spi/zynq_spi.c
@@ -8,10 +8,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <spi.h>
 #include <time.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 02b78df843..c3a5b3e301 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -7,7 +7,9 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <clk.h>
 #include <dm.h>
@@ -17,6 +19,7 @@
 #include <ubi_uboot.h>
 #include <wait_bit.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define GQSPI_GFIFO_STRT_MODE_MASK	BIT(29)
diff --git a/drivers/sysreset/sysreset-ti-sci.c b/drivers/sysreset/sysreset-ti-sci.c
index e7fcfcd4d1..3877b9bc12 100644
--- a/drivers/sysreset/sysreset-ti-sci.c
+++ b/drivers/sysreset/sysreset-ti-sci.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <sysreset.h>
 #include <dm/device_compat.h>
 #include <linux/err.h>
diff --git a/drivers/sysreset/sysreset-uclass.c b/drivers/sysreset/sysreset-uclass.c
index 51fdb1055e..995240f0cb 100644
--- a/drivers/sysreset/sysreset-uclass.c
+++ b/drivers/sysreset/sysreset-uclass.c
@@ -7,8 +7,10 @@
 #define LOG_CATEGORY UCLASS_SYSRESET
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <hang.h>
+#include <log.h>
 #include <sysreset.h>
 #include <dm.h>
 #include <errno.h>
@@ -16,6 +18,7 @@
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dm/root.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 
 int sysreset_request(struct udevice *dev, enum sysreset_t type)
@@ -111,7 +114,7 @@ void reset_cpu(ulong addr)
 }
 
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	printf("resetting ...\n");
 
@@ -121,7 +124,7 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 }
 
 #if IS_ENABLED(CONFIG_SYSRESET_CMD_POWEROFF)
-int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret;
 
diff --git a/drivers/sysreset/sysreset_ast.c b/drivers/sysreset/sysreset_ast.c
index d0336a1ce5..ee941c7770 100644
--- a/drivers/sysreset/sysreset_ast.c
+++ b/drivers/sysreset/sysreset_ast.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <sysreset.h>
 #include <wdt.h>
 #include <asm/io.h>
diff --git a/drivers/sysreset/sysreset_gpio.c b/drivers/sysreset/sysreset_gpio.c
index ed9a49ad08..d7280eeda8 100644
--- a/drivers/sysreset/sysreset_gpio.c
+++ b/drivers/sysreset/sysreset_gpio.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <sysreset.h>
 #include <asm/gpio.h>
 
diff --git a/drivers/sysreset/sysreset_mpc83xx.c b/drivers/sysreset/sysreset_mpc83xx.c
index 9092764e0b..456f006bc1 100644
--- a/drivers/sysreset/sysreset_mpc83xx.c
+++ b/drivers/sysreset/sysreset_mpc83xx.c
@@ -5,9 +5,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <sysreset.h>
 #include <wait_bit.h>
+#include <linux/delay.h>
 
 #include "sysreset_mpc83xx.h"
 
diff --git a/drivers/sysreset/sysreset_socfpga.c b/drivers/sysreset/sysreset_socfpga.c
index 3390b7bdc2..178bcb227f 100644
--- a/drivers/sysreset/sysreset_socfpga.c
+++ b/drivers/sysreset/sysreset_socfpga.c
@@ -10,6 +10,7 @@
 #include <sysreset.h>
 #include <asm/io.h>
 #include <asm/arch/reset_manager.h>
+#include <linux/bitops.h>
 
 struct socfpga_sysreset_data {
 	void __iomem *rstmgr_base;
diff --git a/drivers/sysreset/sysreset_sti.c b/drivers/sysreset/sysreset_sti.c
index 9996716f13..3482d2a078 100644
--- a/drivers/sysreset/sysreset_sti.c
+++ b/drivers/sysreset/sysreset_sti.c
@@ -10,6 +10,7 @@
 #include <syscon.h>
 #include <sysreset.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/tee/tee-uclass.c b/drivers/tee/tee-uclass.c
index 1fb3c16a14..112e216883 100644
--- a/drivers/tee/tee-uclass.c
+++ b/drivers/tee/tee-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <tee.h>
 #include <dm/device-internal.h>
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index bdf8dc6fef..97d4163e8e 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -26,6 +26,15 @@ config IMX_SCU_THERMAL
 	  boot is hold to the cool device to throttle CPUs when the passive
 	  trip is crossed
 
+config IMX_TMU
+        bool "Thermal Management Unit driver for NXP i.MX8M"
+        depends on ARCH_IMX8M
+        help
+          Support for Temperature sensors on NXP i.MX8M.
+          It supports one critical trip point and one passive trip point.
+	  The boot is hold to the cool device to throttle CPUs when the
+	  passive trip is crossed
+
 config TI_DRA7_THERMAL
         bool "Temperature sensor driver for TI dra7xx SOCs"
         help
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index ef2929d180..15fe847d9f 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_DM_THERMAL) += thermal-uclass.o
 obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
 obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
 obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o
+obj-$(CONFIG_IMX_TMU) += imx_tmu.o
diff --git a/drivers/thermal/imx_scu_thermal.c b/drivers/thermal/imx_scu_thermal.c
index 7e17377b69..83ec753802 100644
--- a/drivers/thermal/imx_scu_thermal.c
+++ b/drivers/thermal/imx_scu_thermal.c
@@ -7,10 +7,13 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <thermal.h>
 #include <dm/device-internal.h>
 #include <dm/device.h>
 #include <asm/arch/sci/sci.h>
+#include <linux/delay.h>
+#include <linux/libfdt.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -58,13 +61,15 @@ int imx_sc_thermal_get_temp(struct udevice *dev, int *temp)
 		return ret;
 
 	while (cpu_temp >= pdata->alert) {
-		printf("CPU Temperature (%dC) has beyond alert (%dC), close to critical (%dC)",
+		printf("CPU Temperature (%dC) beyond alert (%dC), close to critical (%dC)",
 		       cpu_temp, pdata->alert, pdata->critical);
 		puts(" waiting...\n");
 		mdelay(pdata->polling_delay);
 		ret = read_temperature(dev, &cpu_temp);
 		if (ret)
 			return ret;
+		if (cpu_temp >= pdata->alert && !pdata->alert)
+			break;
 	}
 
 	*temp = cpu_temp / 1000;
@@ -179,12 +184,20 @@ static int imx_sc_thermal_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static const sc_rsrc_t imx8qm_sensor_rsrc[] = {
+	SC_R_A53, SC_R_A72, SC_R_GPU_0_PID0, SC_R_GPU_1_PID0,
+	SC_R_DRC_0, SC_R_DRC_1, SC_R_VPU_PID0, SC_R_PMIC_0,
+	SC_R_PMIC_1, SC_R_PMIC_2,
+};
+
 static const sc_rsrc_t imx8qxp_sensor_rsrc[] = {
 	SC_R_SYSTEM, SC_R_DRC_0, SC_R_PMIC_0,
 	SC_R_PMIC_1, SC_R_PMIC_2,
 };
 
 static const struct udevice_id imx_sc_thermal_ids[] = {
+	{ .compatible = "nxp,imx8qm-sc-tsens", .data =
+		(ulong)&imx8qm_sensor_rsrc, },
 	{ .compatible = "nxp,imx8qxp-sc-tsens", .data =
 		(ulong)&imx8qxp_sensor_rsrc, },
 	{ }
diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c
index e50b85bd59..101bd5ef2d 100644
--- a/drivers/thermal/imx_thermal.c
+++ b/drivers/thermal/imx_thermal.c
@@ -9,12 +9,14 @@
 #include <common.h>
 #include <div64.h>
 #include <fuse.h>
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
 #include <dm.h>
 #include <errno.h>
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/math64.h>
 #include <thermal.h>
 #include <imx_thermal.h>
diff --git a/drivers/thermal/imx_tmu.c b/drivers/thermal/imx_tmu.c
new file mode 100644
index 0000000000..4ca22089b8
--- /dev/null
+++ b/drivers/thermal/imx_tmu.c
@@ -0,0 +1,467 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2017~2020 NXP
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/sys_proto.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/device.h>
+#include <errno.h>
+#include <fuse.h>
+#include <malloc.h>
+#include <thermal.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SITES_MAX	16
+#define FLAGS_VER2 	0x1
+#define FLAGS_VER3 	0x2
+
+#define TMR_DISABLE	0x0
+#define TMR_ME		0x80000000
+#define TMR_ALPF	0x0c000000
+#define TMTMIR_DEFAULT	0x00000002
+#define TIER_DISABLE	0x0
+
+#define TER_EN			0x80000000
+#define TER_ADC_PD		0x40000000
+#define TER_ALPF		0x3
+
+/*
+ * i.MX TMU Registers
+ */
+struct imx_tmu_site_regs {
+	u32 tritsr;		/* Immediate Temperature Site Register */
+	u32 tratsr;		/* Average Temperature Site Register */
+	u8 res0[0x8];
+};
+
+struct imx_tmu_regs {
+	u32 tmr;	/* Mode Register */
+	u32 tsr;	/* Status Register */
+	u32 tmtmir;	/* Temperature measurement interval Register */
+	u8 res0[0x14];
+	u32 tier;	/* Interrupt Enable Register */
+	u32 tidr;	/* Interrupt Detect Register */
+	u32 tiscr;	/* Interrupt Site Capture Register */
+	u32 ticscr;	/* Interrupt Critical Site Capture Register */
+	u8 res1[0x10];
+	u32 tmhtcrh;	/* High Temperature Capture Register */
+	u32 tmhtcrl;	/* Low Temperature Capture Register */
+	u8 res2[0x8];
+	u32 tmhtitr;	/* High Temperature Immediate Threshold */
+	u32 tmhtatr;	/* High Temperature Average Threshold */
+	u32 tmhtactr;	/* High Temperature Average Crit Threshold */
+	u8 res3[0x24];
+	u32 ttcfgr;	/* Temperature Configuration Register */
+	u32 tscfgr;	/* Sensor Configuration Register */
+	u8 res4[0x78];
+	struct imx_tmu_site_regs site[SITES_MAX];
+	u8 res5[0x9f8];
+	u32 ipbrr0;	/* IP Block Revision Register 0 */
+	u32 ipbrr1;	/* IP Block Revision Register 1 */
+	u8 res6[0x310];
+	u32 ttr0cr;	/* Temperature Range 0 Control Register */
+	u32 ttr1cr;	/* Temperature Range 1 Control Register */
+	u32 ttr2cr;	/* Temperature Range 2 Control Register */
+	u32 ttr3cr;	/* Temperature Range 3 Control Register */
+};
+
+struct imx_tmu_regs_v2 {
+	u32 ter;	/* TMU enable Register */
+	u32 tsr;	/* Status Register */
+	u32 tier;	/* Interrupt enable register */
+	u32 tidr;	/* Interrupt detect  register */
+	u32 tmhtitr;	/* Monitor high temperature immediate threshold register */
+	u32 tmhtatr;	/* Monitor high temperature average threshold register */
+	u32 tmhtactr;	/* TMU monitor high temperature average critical  threshold register */
+	u32 tscr;	/* Sensor value capture register */
+	u32 tritsr;	/* Report immediate temperature site register 0 */
+	u32 tratsr;	/* Report average temperature site register 0 */
+	u32 tasr;	/* Amplifier setting register */
+	u32 ttmc;	/* Test MUX control */
+	u32 tcaliv;
+};
+
+struct imx_tmu_regs_v3 {
+	u32 ter;	/* TMU enable Register */
+	u32 tps;	/* Status Register */
+	u32 tier;	/* Interrupt enable register */
+	u32 tidr;	/* Interrupt detect  register */
+	u32 tmhtitr;	/* Monitor high temperature immediate threshold register */
+	u32 tmhtatr;	/* Monitor high temperature average threshold register */
+	u32 tmhtactr;	/* TMU monitor high temperature average critical  threshold register */
+	u32 tscr;	/* Sensor value capture register */
+	u32 tritsr;	/* Report immediate temperature site register 0 */
+	u32 tratsr;	/* Report average temperature site register 0 */
+	u32 tasr;	/* Amplifier setting register */
+	u32 ttmc;	/* Test MUX control */
+	u32 tcaliv0;
+	u32 tcaliv1;
+	u32 tcaliv_m40;
+	u32 trim;
+};
+
+union tmu_regs {
+	struct imx_tmu_regs regs_v1;
+	struct imx_tmu_regs_v2 regs_v2;
+	struct imx_tmu_regs_v3 regs_v3;
+};
+
+struct imx_tmu_plat {
+	int critical;
+	int alert;
+	int polling_delay;
+	int id;
+	bool zone_node;
+	union tmu_regs *regs;
+};
+
+static int read_temperature(struct udevice *dev, int *temp)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	ulong drv_data = dev_get_driver_data(dev);
+	u32 val;
+	u32 retry = 10;
+	u32 valid = 0;
+
+	do {
+		mdelay(100);
+		retry--;
+
+		if (drv_data & FLAGS_VER3) {
+			val = readl(&pdata->regs->regs_v3.tritsr);
+			valid = val & (1 << (30 + pdata->id));
+		} else if (drv_data & FLAGS_VER2) {
+			val = readl(&pdata->regs->regs_v2.tritsr);
+			/*
+			 * Check if TEMP is in valid range, the V bit in TRITSR
+			 * only reflects the RAW uncalibrated data
+			 */
+			valid =  ((val & 0xff) < 10 || (val & 0xff) > 125) ? 0 : 1;
+		} else {
+			val = readl(&pdata->regs->regs_v1.site[pdata->id].tritsr);
+			valid = val & 0x80000000;
+		}
+	} while (!valid && retry > 0);
+
+	if (retry > 0) {
+		if (drv_data & FLAGS_VER3) {
+			val = (val >> (pdata->id * 16)) & 0xff;
+			if (val & 0x80) /* Negative */
+				val = (~(val & 0x7f) + 1);
+
+			*temp = val;
+			if (*temp < -40 || *temp > 125) /* Check the range */
+				return -EINVAL;
+
+			*temp *= 1000;
+		} else {
+			*temp = (val & 0xff) * 1000;
+		}
+	} else {
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+int imx_tmu_get_temp(struct udevice *dev, int *temp)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	int cpu_tmp = 0;
+	int ret;
+
+	ret = read_temperature(dev, &cpu_tmp);
+	if (ret)
+		return ret;
+
+	while (cpu_tmp >= pdata->alert) {
+		printf("CPU Temperature (%dC) has beyond alert (%dC), close to critical (%dC)", cpu_tmp, pdata->alert, pdata->critical);
+		puts(" waiting...\n");
+		mdelay(pdata->polling_delay);
+		ret = read_temperature(dev, &cpu_tmp);
+		if (ret)
+			return ret;
+	}
+
+	*temp = cpu_tmp / 1000;
+
+	return 0;
+}
+
+static const struct dm_thermal_ops imx_tmu_ops = {
+	.get_temp	= imx_tmu_get_temp,
+};
+
+static int imx_tmu_calibration(struct udevice *dev)
+{
+	int i, val, len, ret;
+	u32 range[4];
+	const fdt32_t *calibration;
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	ulong drv_data = dev_get_driver_data(dev);
+
+	debug("%s\n", __func__);
+
+	if (drv_data & (FLAGS_VER2 | FLAGS_VER3))
+		return 0;
+
+	ret = dev_read_u32_array(dev, "fsl,tmu-range", range, 4);
+	if (ret) {
+		printf("TMU: missing calibration range, ret = %d.\n", ret);
+		return ret;
+	}
+
+	/* Init temperature range registers */
+	writel(range[0], &pdata->regs->regs_v1.ttr0cr);
+	writel(range[1], &pdata->regs->regs_v1.ttr1cr);
+	writel(range[2], &pdata->regs->regs_v1.ttr2cr);
+	writel(range[3], &pdata->regs->regs_v1.ttr3cr);
+
+	calibration = dev_read_prop(dev, "fsl,tmu-calibration", &len);
+	if (!calibration || len % 8) {
+		printf("TMU: invalid calibration data.\n");
+		return -ENODEV;
+	}
+
+	for (i = 0; i < len; i += 8, calibration += 2) {
+		val = fdt32_to_cpu(*calibration);
+		writel(val, &pdata->regs->regs_v1.ttcfgr);
+		val = fdt32_to_cpu(*(calibration + 1));
+		writel(val, &pdata->regs->regs_v1.tscfgr);
+	}
+
+	return 0;
+}
+
+void __weak imx_tmu_arch_init(void *reg_base)
+{
+}
+
+static void imx_tmu_init(struct udevice *dev)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	ulong drv_data = dev_get_driver_data(dev);
+
+	debug("%s\n", __func__);
+
+	if (drv_data & FLAGS_VER3) {
+		/* Disable monitoring */
+		writel(0x0, &pdata->regs->regs_v3.ter);
+
+		/* Disable interrupt, using polling instead */
+		writel(0x0, &pdata->regs->regs_v3.tier);
+
+	} else if (drv_data & FLAGS_VER2) {
+		/* Disable monitoring */
+		writel(0x0, &pdata->regs->regs_v2.ter);
+
+		/* Disable interrupt, using polling instead */
+		writel(0x0, &pdata->regs->regs_v2.tier);
+	} else {
+		/* Disable monitoring */
+		writel(TMR_DISABLE, &pdata->regs->regs_v1.tmr);
+
+		/* Disable interrupt, using polling instead */
+		writel(TIER_DISABLE, &pdata->regs->regs_v1.tier);
+
+		/* Set update_interval */
+		writel(TMTMIR_DEFAULT, &pdata->regs->regs_v1.tmtmir);
+	}
+
+	imx_tmu_arch_init((void *)pdata->regs);
+}
+
+static int imx_tmu_enable_msite(struct udevice *dev)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	ulong drv_data = dev_get_driver_data(dev);
+	u32 reg;
+
+	debug("%s\n", __func__);
+
+	if (!pdata->regs)
+		return -EIO;
+
+	if (drv_data & FLAGS_VER3) {
+		reg = readl(&pdata->regs->regs_v3.ter);
+		reg &= ~TER_EN;
+		writel(reg, &pdata->regs->regs_v3.ter);
+
+		writel(pdata->id << 30, &pdata->regs->regs_v3.tps);
+
+		reg &= ~TER_ALPF;
+		reg |= 0x1;
+		reg &= ~TER_ADC_PD;
+		writel(reg, &pdata->regs->regs_v3.ter);
+
+		/* Enable monitor */
+		reg |= TER_EN;
+		writel(reg, &pdata->regs->regs_v3.ter);
+	} else if (drv_data & FLAGS_VER2) {
+		reg = readl(&pdata->regs->regs_v2.ter);
+		reg &= ~TER_EN;
+		writel(reg, &pdata->regs->regs_v2.ter);
+
+		reg &= ~TER_ALPF;
+		reg |= 0x1;
+		writel(reg, &pdata->regs->regs_v2.ter);
+
+		/* Enable monitor */
+		reg |= TER_EN;
+		writel(reg, &pdata->regs->regs_v2.ter);
+	} else {
+		/* Clear the ME before setting MSITE and ALPF*/
+		reg = readl(&pdata->regs->regs_v1.tmr);
+		reg &= ~TMR_ME;
+		writel(reg, &pdata->regs->regs_v1.tmr);
+
+		reg |= 1 << (15 - pdata->id);
+		reg |= TMR_ALPF;
+		writel(reg, &pdata->regs->regs_v1.tmr);
+
+		/* Enable ME */
+		reg |= TMR_ME;
+		writel(reg, &pdata->regs->regs_v1.tmr);
+	}
+
+	return 0;
+}
+
+static int imx_tmu_bind(struct udevice *dev)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	int ret;
+	ofnode node, offset;
+	const char *name;
+	const void *prop;
+
+	debug("%s dev name %s\n", __func__, dev->name);
+
+	prop = dev_read_prop(dev, "compatible", NULL);
+	if (!prop)
+		return 0;
+
+	pdata->zone_node = 1;
+
+	node = ofnode_path("/thermal-zones");
+	ofnode_for_each_subnode(offset, node) {
+		/* Bind the subnode to this driver */
+		name = ofnode_get_name(offset);
+
+		ret = device_bind_with_driver_data(dev, dev->driver, name,
+						   dev->driver_data, offset,
+						   NULL);
+		if (ret)
+			printf("Error binding driver '%s': %d\n",
+			       dev->driver->name, ret);
+	}
+
+	return 0;
+}
+
+static int imx_tmu_parse_fdt(struct udevice *dev)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev), *p_parent_data;
+	struct ofnode_phandle_args args;
+	ofnode trips_np;
+	int ret;
+
+	debug("%s dev name %s\n", __func__, dev->name);
+
+	if (pdata->zone_node) {
+		pdata->regs = (union tmu_regs *)dev_read_addr_ptr(dev);
+
+		if (!pdata->regs)
+			return -EINVAL;
+		return 0;
+	}
+
+	p_parent_data = dev_get_platdata(dev->parent);
+	if (p_parent_data->zone_node)
+		pdata->regs = p_parent_data->regs;
+
+	ret = dev_read_phandle_with_args(dev, "thermal-sensors",
+					 "#thermal-sensor-cells",
+					 0, 0, &args);
+	if (ret)
+		return ret;
+
+	if (!ofnode_equal(args.node, dev_ofnode(dev->parent)))
+		return -EFAULT;
+
+	if (args.args_count >= 1)
+		pdata->id = args.args[0];
+	else
+		pdata->id = 0;
+
+	debug("args.args_count %d, id %d\n", args.args_count, pdata->id);
+
+	pdata->polling_delay = dev_read_u32_default(dev, "polling-delay", 1000);
+
+	trips_np = ofnode_path("/thermal-zones/cpu-thermal/trips");
+	ofnode_for_each_subnode(trips_np, trips_np) {
+		const char *type;
+
+		type = ofnode_get_property(trips_np, "type", NULL);
+		if (!type)
+			continue;
+		if (!strcmp(type, "critical"))
+			pdata->critical = ofnode_read_u32_default(trips_np, "temperature", 85);
+		else if (strcmp(type, "passive") == 0)
+			pdata->alert = ofnode_read_u32_default(trips_np, "temperature", 80);
+		else
+			continue;
+	}
+
+	debug("id %d polling_delay %d, critical %d, alert %d\n",
+	      pdata->id, pdata->polling_delay, pdata->critical, pdata->alert);
+
+	return 0;
+}
+
+static int imx_tmu_probe(struct udevice *dev)
+{
+	struct imx_tmu_plat *pdata = dev_get_platdata(dev);
+	int ret;
+
+	ret = imx_tmu_parse_fdt(dev);
+	if (ret) {
+		printf("Error in parsing TMU FDT %d\n", ret);
+		return ret;
+	}
+
+	if (pdata->zone_node) {
+		imx_tmu_init(dev);
+		imx_tmu_calibration(dev);
+	} else {
+		imx_tmu_enable_msite(dev);
+	}
+
+	return 0;
+}
+
+static const struct udevice_id imx_tmu_ids[] = {
+	{ .compatible = "fsl,imx8mq-tmu", },
+	{ .compatible = "fsl,imx8mm-tmu", .data = FLAGS_VER2, },
+	{ .compatible = "fsl,imx8mp-tmu", .data = FLAGS_VER3, },
+	{ }
+};
+
+U_BOOT_DRIVER(imx_tmu) = {
+	.name	= "imx_tmu",
+	.id	= UCLASS_THERMAL,
+	.ops	= &imx_tmu_ops,
+	.of_match = imx_tmu_ids,
+	.bind = imx_tmu_bind,
+	.probe	= imx_tmu_probe,
+	.platdata_auto_alloc_size = sizeof(struct imx_tmu_plat),
+	.flags  = DM_FLAG_PRE_RELOC,
+};
diff --git a/drivers/timer/altera_timer.c b/drivers/timer/altera_timer.c
index 6f504f7cc4..6ca9501eb1 100644
--- a/drivers/timer/altera_timer.c
+++ b/drivers/timer/altera_timer.c
@@ -12,6 +12,7 @@
 #include <errno.h>
 #include <timer.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 /* control register */
 #define ALTERA_TIMER_CONT	BIT(1)	/* Continuous mode */
diff --git a/drivers/timer/atmel_pit_timer.c b/drivers/timer/atmel_pit_timer.c
index 009af2f929..70511697fe 100644
--- a/drivers/timer/atmel_pit_timer.c
+++ b/drivers/timer/atmel_pit_timer.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <timer.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define AT91_PIT_VALUE		0xfffff
 #define AT91_PIT_PITEN		BIT(24)		/* Timer Enabled */
diff --git a/drivers/timer/cadence-ttc.c b/drivers/timer/cadence-ttc.c
index ed48a145f2..e6b6dfe376 100644
--- a/drivers/timer/cadence-ttc.c
+++ b/drivers/timer/cadence-ttc.c
@@ -4,10 +4,13 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <timer.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define CNT_CNTRL_RESET		BIT(4)
diff --git a/drivers/timer/mpc83xx_timer.c b/drivers/timer/mpc83xx_timer.c
index 72cb58b693..ad8bb28e8b 100644
--- a/drivers/timer/mpc83xx_timer.c
+++ b/drivers/timer/mpc83xx_timer.c
@@ -9,10 +9,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <irq_func.h>
+#include <log.h>
 #include <status_led.h>
 #include <time.h>
 #include <timer.h>
 #include <watchdog.h>
+#include <asm/ptrace.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/timer/mtk_timer.c b/drivers/timer/mtk_timer.c
index b5e76bd358..69ed521811 100644
--- a/drivers/timer/mtk_timer.c
+++ b/drivers/timer/mtk_timer.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <timer.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MTK_GPT4_CTRL	0x40
 #define MTK_GPT4_CLK	0x44
@@ -71,6 +72,7 @@ static const struct timer_ops mtk_timer_ops = {
 
 static const struct udevice_id mtk_timer_ids[] = {
 	{ .compatible = "mediatek,timer" },
+	{ .compatible = "mediatek,mt6577-timer" },
 	{ }
 };
 
diff --git a/drivers/timer/nomadik-mtu-timer.c b/drivers/timer/nomadik-mtu-timer.c
index 8648f1f1df..7ff921385a 100644
--- a/drivers/timer/nomadik-mtu-timer.c
+++ b/drivers/timer/nomadik-mtu-timer.c
@@ -16,6 +16,7 @@
 #include <dm.h>
 #include <timer.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MTU_NUM_TIMERS		4
 
diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
index a13fb71165..700c349f37 100644
--- a/drivers/timer/omap-timer.c
+++ b/drivers/timer/omap-timer.c
@@ -11,6 +11,7 @@
 #include <timer.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
+#include <linux/bitops.h>
 
 /* Timer register bits */
 #define TCLR_START			BIT(0)	/* Start=1 */
diff --git a/drivers/timer/ostm_timer.c b/drivers/timer/ostm_timer.c
index 48a5055b05..bea97159eb 100644
--- a/drivers/timer/ostm_timer.c
+++ b/drivers/timer/ostm_timer.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <clk.h>
 #include <timer.h>
+#include <linux/bitops.h>
 
 #define OSTM_CMP	0x00
 #define OSTM_CNT	0x04
diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c
index 54956e557a..7a5a484252 100644
--- a/drivers/timer/rockchip_timer.c
+++ b/drivers/timer/rockchip_timer.c
@@ -4,7 +4,10 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <dm/ofnode.h>
 #include <mapmem.h>
 #include <asm/arch-rockchip/timer.h>
diff --git a/drivers/timer/stm32_timer.c b/drivers/timer/stm32_timer.c
index 76d99a2b86..c57fa3f557 100644
--- a/drivers/timer/stm32_timer.c
+++ b/drivers/timer/stm32_timer.c
@@ -10,6 +10,7 @@
 #include <fdtdec.h>
 #include <timer.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #include <asm/io.h>
 
diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c
index b619200f00..14dde950a1 100644
--- a/drivers/timer/timer-uclass.c
+++ b/drivers/timer/timer-uclass.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/root.h>
diff --git a/drivers/timer/tsc_timer.c b/drivers/timer/tsc_timer.c
index 43cb2d820e..93c959ff44 100644
--- a/drivers/timer/tsc_timer.c
+++ b/drivers/timer/tsc_timer.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <time.h>
 #include <timer.h>
@@ -17,6 +19,7 @@
 #include <asm/ibmpc.h>
 #include <asm/msr.h>
 #include <asm/u-boot-x86.h>
+#include <linux/delay.h>
 
 #define MAX_NUM_FREQS	9
 
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index b67051af26..1942c07c60 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -11,12 +11,14 @@
 #include <dm.h>
 #include <i2c.h>
 #include <irq.h>
+#include <log.h>
 #include <spl.h>
 #include <tpm-v2.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
 #include <asm/arch/iomap.h>
 #include <asm/arch/pm.h>
+#include <linux/delay.h>
 
 enum {
 	TIMEOUT_INIT_MS		= 30000, /* Very long timeout for TPM init */
diff --git a/drivers/tpm/tpm-uclass.c b/drivers/tpm/tpm-uclass.c
index 71d5807006..6ea795bc0c 100644
--- a/drivers/tpm/tpm-uclass.c
+++ b/drivers/tpm/tpm-uclass.c
@@ -6,6 +6,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/unaligned/be_byteshift.h>
 #include <tpm-v1.h>
 #include <tpm-v2.h>
diff --git a/drivers/tpm/tpm2_ftpm_tee.c b/drivers/tpm/tpm2_ftpm_tee.c
index 4b79d4ada0..3197e0ebcd 100644
--- a/drivers/tpm/tpm2_ftpm_tee.c
+++ b/drivers/tpm/tpm2_ftpm_tee.c
@@ -15,6 +15,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <tpm-v2.h>
 #include <tee.h>
 
diff --git a/drivers/tpm/tpm2_tis_sandbox.c b/drivers/tpm/tpm2_tis_sandbox.c
index 522988795c..41a15bd49f 100644
--- a/drivers/tpm/tpm2_tis_sandbox.c
+++ b/drivers/tpm/tpm2_tis_sandbox.c
@@ -9,6 +9,7 @@
 #include <tpm-v2.h>
 #include <asm/state.h>
 #include <asm/unaligned.h>
+#include <linux/bitops.h>
 #include <u-boot/crc.h>
 
 /* Hierarchies */
diff --git a/drivers/tpm/tpm2_tis_spi.c b/drivers/tpm/tpm2_tis_spi.c
index 713111f6c3..36016de4a6 100644
--- a/drivers/tpm/tpm2_tis_spi.c
+++ b/drivers/tpm/tpm2_tis_spi.c
@@ -19,6 +19,8 @@
 #include <log.h>
 #include <spi.h>
 #include <tpm-v2.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/compiler.h>
 #include <linux/types.h>
diff --git a/drivers/tpm/tpm_atmel_twi.c b/drivers/tpm/tpm_atmel_twi.c
index 2079ea913e..d9e4877c5c 100644
--- a/drivers/tpm/tpm_atmel_twi.c
+++ b/drivers/tpm/tpm_atmel_twi.c
@@ -10,6 +10,7 @@
 #include <tpm-v1.h>
 #include <i2c.h>
 #include <asm/unaligned.h>
+#include <linux/delay.h>
 
 #include "tpm_internal.h"
 
diff --git a/drivers/tpm/tpm_tis_infineon.c b/drivers/tpm/tpm_tis_infineon.c
index b5fe43ee50..f47813e76d 100644
--- a/drivers/tpm/tpm_tis_infineon.c
+++ b/drivers/tpm/tpm_tis_infineon.c
@@ -23,7 +23,9 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <tpm-v1.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/compiler.h>
 #include <linux/types.h>
diff --git a/drivers/tpm/tpm_tis_lpc.c b/drivers/tpm/tpm_tis_lpc.c
index 30194bce07..2dd374cf77 100644
--- a/drivers/tpm/tpm_tis_lpc.c
+++ b/drivers/tpm/tpm_tis_lpc.c
@@ -14,9 +14,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mapmem.h>
 #include <tpm-v1.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #define PREFIX "lpc_tpm: "
 
diff --git a/drivers/tpm/tpm_tis_st33zp24_i2c.c b/drivers/tpm/tpm_tis_st33zp24_i2c.c
index 0d380375eb..a253ee1502 100644
--- a/drivers/tpm/tpm_tis_st33zp24_i2c.c
+++ b/drivers/tpm/tpm_tis_st33zp24_i2c.c
@@ -16,8 +16,10 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <i2c.h>
+#include <log.h>
 #include <tpm-v1.h>
 #include <errno.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <asm/unaligned.h>
 
diff --git a/drivers/tpm/tpm_tis_st33zp24_spi.c b/drivers/tpm/tpm_tis_st33zp24_spi.c
index f6087e7633..ef54e3b7b2 100644
--- a/drivers/tpm/tpm_tis_st33zp24_spi.c
+++ b/drivers/tpm/tpm_tis_st33zp24_spi.c
@@ -15,9 +15,11 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <spi.h>
 #include <tpm-v1.h>
 #include <errno.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <asm/unaligned.h>
 #include <linux/compat.h>
diff --git a/drivers/ufs/cdns-platform.c b/drivers/ufs/cdns-platform.c
index 41ee6a60c9..1a7bb7bed8 100644
--- a/drivers/ufs/cdns-platform.c
+++ b/drivers/ufs/cdns-platform.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <ufs.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #include "ufs.h"
diff --git a/drivers/ufs/ti-j721e-ufs.c b/drivers/ufs/ti-j721e-ufs.c
index 4990fba6eb..d875269760 100644
--- a/drivers/ufs/ti-j721e-ufs.c
+++ b/drivers/ufs/ti-j721e-ufs.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 
 #define UFS_SS_CTRL             0x4
diff --git a/drivers/ufs/ufs.c b/drivers/ufs/ufs.c
index 24e1bc2a19..87b4e5fc56 100644
--- a/drivers/ufs/ufs.c
+++ b/drivers/ufs/ufs.c
@@ -11,6 +11,7 @@
 #include <charset.h>
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <dm/lists.h>
@@ -18,6 +19,8 @@
 #include <malloc.h>
 #include <hexdump.h>
 #include <scsi.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include <linux/dma-mapping.h>
 
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 928a89133c..756a4ec402 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -39,8 +39,8 @@ config DM_USB
 	help
 	  Enable driver model for USB. The USB interface is then implemented
 	  by the USB uclass. Multiple USB controllers of different types
-	  (XHCI, EHCI) can be attached and used. The 'usb' command works as
-	  normal. OCHI is not supported at present.
+	  (XHCI, EHCI, OHCI) can be attached and used. The 'usb' command works
+	  as normal.
 
 	  Much of the code is shared but with this option enabled the USB
 	  uclass takes care of device enumeration. USB devices can be
diff --git a/drivers/usb/cdns3/cdns3-ti.c b/drivers/usb/cdns3/cdns3-ti.c
index 652cd5cb17..cd7b2113ac 100644
--- a/drivers/usb/cdns3/cdns3-ti.c
+++ b/drivers/usb/cdns3/cdns3-ti.c
@@ -10,6 +10,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/usb/otg.h>
 #include <malloc.h>
diff --git a/drivers/usb/cdns3/core.c b/drivers/usb/cdns3/core.c
index ce846488a8..ea86a25060 100644
--- a/drivers/usb/cdns3/core.c
+++ b/drivers/usb/cdns3/core.c
@@ -13,10 +13,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <dm/lists.h>
+#include <linux/bug.h>
 #include <linux/kernel.h>
 #include <linux/io.h>
 #include <usb.h>
diff --git a/drivers/usb/cdns3/drd.h b/drivers/usb/cdns3/drd.h
index 815b93f2fb..fffda7b43a 100644
--- a/drivers/usb/cdns3/drd.h
+++ b/drivers/usb/cdns3/drd.h
@@ -9,6 +9,7 @@
 #ifndef __LINUX_CDNS3_DRD
 #define __LINUX_CDNS3_DRD
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 #include <linux/usb/otg.h>
 #include "core.h"
diff --git a/drivers/usb/cdns3/ep0.c b/drivers/usb/cdns3/ep0.c
index 1957a3b91d..a08c694559 100644
--- a/drivers/usb/cdns3/ep0.c
+++ b/drivers/usb/cdns3/ep0.c
@@ -11,7 +11,10 @@
  */
 
 #include <cpu_func.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/usb/composite.h>
 #include <linux/iopoll.h>
 
diff --git a/drivers/usb/cdns3/gadget.c b/drivers/usb/cdns3/gadget.c
index caed27c32f..8f81d17ec8 100644
--- a/drivers/usb/cdns3/gadget.c
+++ b/drivers/usb/cdns3/gadget.c
@@ -59,6 +59,8 @@
 #include <dm.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/usb/gadget.h>
 #include <linux/compat.h>
diff --git a/drivers/usb/cdns3/gadget.h b/drivers/usb/cdns3/gadget.h
index 3d5242b331..8803fa48bd 100644
--- a/drivers/usb/cdns3/gadget.h
+++ b/drivers/usb/cdns3/gadget.h
@@ -11,6 +11,7 @@
  */
 #ifndef __LINUX_CDNS3_GADGET
 #define __LINUX_CDNS3_GADGET
+#include <linux/bitops.h>
 #include <linux/usb/gadget.h>
 
 /*
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 0db281b970..d4ae18693c 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <linux/usb/otg.h>
 #include <linux/usb/ch9.h>
+#include <linux/usb/phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -64,3 +65,27 @@ enum usb_device_speed usb_get_maximum_speed(ofnode node)
 
 	return USB_SPEED_UNKNOWN;
 }
+
+#if CONFIG_IS_ENABLED(DM_USB)
+static const char *const usbphy_modes[] = {
+	[USBPHY_INTERFACE_MODE_UNKNOWN]	= "",
+	[USBPHY_INTERFACE_MODE_UTMI]	= "utmi",
+	[USBPHY_INTERFACE_MODE_UTMIW]	= "utmi_wide",
+};
+
+enum usb_phy_interface usb_get_phy_mode(ofnode node)
+{
+	const char *phy_type;
+	int i;
+
+	phy_type = ofnode_get_property(node, "phy_type", NULL);
+	if (!phy_type)
+		return USBPHY_INTERFACE_MODE_UNKNOWN;
+
+	for (i = 0; i < ARRAY_SIZE(usbphy_modes); i++)
+		if (!strcmp(phy_type, usbphy_modes[i]))
+			return i;
+
+	return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+#endif
diff --git a/drivers/usb/common/fsl-dt-fixup.c b/drivers/usb/common/fsl-dt-fixup.c
index 6debfff513..0759ec774a 100644
--- a/drivers/usb/common/fsl-dt-fixup.c
+++ b/drivers/usb/common/fsl-dt-fixup.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <hwconfig.h>
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 4ec3f6df6a..8682556589 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -19,6 +19,8 @@
 #include <dwc3-uboot.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/err.h>
 #include <linux/ioport.h>
@@ -334,6 +336,34 @@ static void dwc3_cache_hwparams(struct dwc3 *dwc)
 	parms->hwparams8 = dwc3_readl(dwc->regs, DWC3_GHWPARAMS8);
 }
 
+static void dwc3_hsphy_mode_setup(struct dwc3 *dwc)
+{
+	enum usb_phy_interface hsphy_mode = dwc->hsphy_mode;
+	u32 reg;
+
+	/* Set dwc3 usb2 phy config */
+	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
+
+	switch (hsphy_mode) {
+	case USBPHY_INTERFACE_MODE_UTMI:
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
+		break;
+	case USBPHY_INTERFACE_MODE_UTMIW:
+		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
+			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
+		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
+			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
+		break;
+	default:
+		break;
+	}
+
+	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
+}
+
 /**
  * dwc3_phy_setup - Configure USB PHY Interface of DWC3 Core
  * @dwc: Pointer to our controller context structure
@@ -377,8 +407,13 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u3_susphy_quirk)
 		reg &= ~DWC3_GUSB3PIPECTL_SUSPHY;
 
+	if (dwc->dis_del_phy_power_chg_quirk)
+		reg &= ~DWC3_GUSB3PIPECTL_DEPOCHANGE;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB3PIPECTL(0), reg);
 
+	dwc3_hsphy_mode_setup(dwc);
+
 	mdelay(100);
 
 	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
@@ -395,6 +430,12 @@ static void dwc3_phy_setup(struct dwc3 *dwc)
 	if (dwc->dis_u2_susphy_quirk)
 		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
 
+	if (dwc->dis_enblslpm_quirk)
+		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
+
+	if (dwc->dis_u2_freeclk_exists_quirk)
+		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
+
 	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
 
 	mdelay(100);
@@ -617,35 +658,6 @@ static void dwc3_core_exit_mode(struct dwc3 *dwc)
 	dwc3_gadget_run(dwc);
 }
 
-static void dwc3_uboot_hsphy_mode(struct dwc3_device *dwc3_dev,
-				  struct dwc3 *dwc)
-{
-	enum usb_phy_interface hsphy_mode = dwc3_dev->hsphy_mode;
-	u32 reg;
-
-	/* Set dwc3 usb2 phy config */
-	reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
-
-	switch (hsphy_mode) {
-	case USBPHY_INTERFACE_MODE_UTMI:
-		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
-			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
-		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_8_BIT) |
-			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_8_BIT);
-		break;
-	case USBPHY_INTERFACE_MODE_UTMIW:
-		reg &= ~(DWC3_GUSB2PHYCFG_PHYIF_MASK |
-			DWC3_GUSB2PHYCFG_USBTRDTIM_MASK);
-		reg |= DWC3_GUSB2PHYCFG_PHYIF(UTMI_PHYIF_16_BIT) |
-			DWC3_GUSB2PHYCFG_USBTRDTIM(USBTRDTIM_UTMI_16_BIT);
-		break;
-	default:
-		break;
-	}
-
-	dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
-}
-
 #define DWC3_ALIGN_MASK		(16 - 1)
 
 /**
@@ -715,6 +727,10 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	dwc->rx_detect_poll_quirk = dwc3_dev->rx_detect_poll_quirk;
 	dwc->dis_u3_susphy_quirk = dwc3_dev->dis_u3_susphy_quirk;
 	dwc->dis_u2_susphy_quirk = dwc3_dev->dis_u2_susphy_quirk;
+	dwc->dis_del_phy_power_chg_quirk = dwc3_dev->dis_del_phy_power_chg_quirk;
+	dwc->dis_tx_ipgap_linecheck_quirk = dwc3_dev->dis_tx_ipgap_linecheck_quirk;
+	dwc->dis_enblslpm_quirk = dwc3_dev->dis_enblslpm_quirk;
+	dwc->dis_u2_freeclk_exists_quirk = dwc3_dev->dis_u2_freeclk_exists_quirk;
 
 	dwc->tx_de_emphasis_quirk = dwc3_dev->tx_de_emphasis_quirk;
 	if (dwc3_dev->tx_de_emphasis)
@@ -730,6 +746,8 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 	dwc->hird_threshold = hird_threshold
 		| (dwc->is_utmi_l1_suspend << 4);
 
+	dwc->hsphy_mode = dwc3_dev->hsphy_mode;
+
 	dwc->index = dwc3_dev->index;
 
 	dwc3_cache_hwparams(dwc);
@@ -754,8 +772,6 @@ int dwc3_uboot_init(struct dwc3_device *dwc3_dev)
 		goto err0;
 	}
 
-	dwc3_uboot_hsphy_mode(dwc3_dev, dwc);
-
 	ret = dwc3_event_buffers_setup(dwc);
 	if (ret) {
 		dev_err(dwc->dev, "failed to setup event buffers\n");
@@ -838,87 +854,32 @@ MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
 
 #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
-int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys)
+int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys)
 {
-	int i, ret, count;
-	struct phy *usb_phys;
-
-	/* Return if no phy declared */
-	if (!dev_read_prop(dev, "phys", NULL))
-		return 0;
-	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
-	if (count <= 0)
-		return count;
-
-	usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
-				GFP_KERNEL);
-	if (!usb_phys)
-		return -ENOMEM;
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
-		if (ret && ret != -ENOENT) {
-			pr_err("Failed to get USB PHY%d for %s\n",
-			       i, dev->name);
-			return ret;
-		}
-	}
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_init(&usb_phys[i]);
-		if (ret) {
-			pr_err("Can't init USB PHY%d for %s\n",
-			       i, dev->name);
-			goto phys_init_err;
-		}
-	}
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_power_on(&usb_phys[i]);
-		if (ret) {
-			pr_err("Can't power USB PHY%d for %s\n",
-			       i, dev->name);
-			goto phys_poweron_err;
-		}
-	}
-
-	*array = usb_phys;
-	*num_phys =  count;
-	return 0;
-
-phys_poweron_err:
-	for (i = count - 1; i >= 0; i--)
-		generic_phy_power_off(&usb_phys[i]);
+	int ret;
 
-	for (i = 0; i < count; i++)
-		generic_phy_exit(&usb_phys[i]);
+	ret = generic_phy_get_bulk(dev, phys);
+	if (ret)
+		return ret;
 
-	return ret;
+	ret = generic_phy_init_bulk(phys);
+	if (ret)
+		return ret;
 
-phys_init_err:
-	for (; i >= 0; i--)
-		generic_phy_exit(&usb_phys[i]);
+	ret = generic_phy_power_on_bulk(phys);
+	if (ret)
+		generic_phy_exit_bulk(phys);
 
 	return ret;
 }
 
-int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys)
+int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys)
 {
-	int i, ret;
-
-	for (i = 0; i < num_phys; i++) {
-		if (!generic_phy_valid(&usb_phys[i]))
-			continue;
-
-		ret = generic_phy_power_off(&usb_phys[i]);
-		ret |= generic_phy_exit(&usb_phys[i]);
-		if (ret) {
-			pr_err("Can't shutdown USB PHY%d for %s\n",
-			       i, dev->name);
-		}
-	}
+	int ret;
 
-	return 0;
+	ret = generic_phy_power_off_bulk(phys);
+	ret |= generic_phy_exit_bulk(phys);
+	return ret;
 }
 #endif
 
@@ -943,6 +904,8 @@ void dwc3_of_parse(struct dwc3 *dwc)
 	 */
 	hird_threshold = 12;
 
+	dwc->hsphy_mode = usb_get_phy_mode(dev->node);
+
 	dwc->has_lpm_erratum = dev_read_bool(dev,
 				"snps,has-lpm-erratum");
 	tmp = dev_read_u8_array_ptr(dev, "snps,lpm-nyet-threshold", 1);
@@ -975,6 +938,14 @@ void dwc3_of_parse(struct dwc3 *dwc)
 				"snps,dis_u3_susphy_quirk");
 	dwc->dis_u2_susphy_quirk = dev_read_bool(dev,
 				"snps,dis_u2_susphy_quirk");
+	dwc->dis_del_phy_power_chg_quirk = dev_read_bool(dev,
+				"snps,dis-del-phy-power-chg-quirk");
+	dwc->dis_tx_ipgap_linecheck_quirk = dev_read_bool(dev,
+				"snps,dis-tx-ipgap-linecheck-quirk");
+	dwc->dis_enblslpm_quirk = dev_read_bool(dev,
+				"snps,dis_enblslpm_quirk");
+	dwc->dis_u2_freeclk_exists_quirk = dev_read_bool(dev,
+				"snps,dis-u2-freeclk-exists-quirk");
 	dwc->tx_de_emphasis_quirk = dev_read_bool(dev,
 				"snps,tx_de_emphasis_quirk");
 	tmp = dev_read_u8_array_ptr(dev, "snps,tx_de_emphasis", 1);
@@ -991,6 +962,7 @@ void dwc3_of_parse(struct dwc3 *dwc)
 int dwc3_init(struct dwc3 *dwc)
 {
 	int ret;
+	u32 reg;
 
 	dwc3_cache_hwparams(dwc);
 
@@ -1012,6 +984,31 @@ int dwc3_init(struct dwc3 *dwc)
 		goto event_fail;
 	}
 
+	if (dwc->revision >= DWC3_REVISION_250A) {
+		reg = dwc3_readl(dwc->regs, DWC3_GUCTL1);
+
+		/*
+		 * Enable hardware control of sending remote wakeup
+		 * in HS when the device is in the L1 state.
+		 */
+		if (dwc->revision >= DWC3_REVISION_290A)
+			reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW;
+
+		if (dwc->dis_tx_ipgap_linecheck_quirk)
+			reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS;
+
+		dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
+	}
+
+	if (dwc->dr_mode == USB_DR_MODE_HOST ||
+	    dwc->dr_mode == USB_DR_MODE_OTG) {
+		reg = dwc3_readl(dwc->regs, DWC3_GUCTL);
+
+		reg |= DWC3_GUCTL_HSTINAUTORETRY;
+
+		dwc3_writel(dwc->regs, DWC3_GUCTL, reg);
+	}
+
 	ret = dwc3_core_init_mode(dwc);
 	if (ret)
 		goto mode_fail;
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 1c08a2c5b6..44533fd7fe 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -17,10 +17,12 @@
 #ifndef __DRIVERS_USB_DWC3_CORE_H
 #define __DRIVERS_USB_DWC3_CORE_H
 
+#include <linux/bitops.h>
 #include <linux/ioport.h>
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/otg.h>
+#include <linux/usb/phy.h>
 
 #define DWC3_MSG_MAX	500
 
@@ -73,6 +75,7 @@
 #define DWC3_GCTL		0xc110
 #define DWC3_GEVTEN		0xc114
 #define DWC3_GSTS		0xc118
+#define DWC3_GUCTL1		0xc11c
 #define DWC3_GSNPSID		0xc120
 #define DWC3_GGPIO		0xc124
 #define DWC3_GUID		0xc128
@@ -159,9 +162,18 @@
 #define DWC3_GCTL_GBLHIBERNATIONEN	(1 << 1)
 #define DWC3_GCTL_DSBLCLKGTNG		(1 << 0)
 
+/* Global User Control Register */
+#define DWC3_GUCTL_HSTINAUTORETRY	BIT(14)
+
+/* Global User Control 1 Register */
+#define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS	BIT(28)
+#define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW	BIT(24)
+
 /* Global USB2 PHY Configuration Register */
 #define DWC3_GUSB2PHYCFG_PHYSOFTRST	(1 << 31)
+#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS	(1 << 30)
 #define DWC3_GUSB2PHYCFG_SUSPHY		(1 << 6)
+#define DWC3_GUSB2PHYCFG_ENBLSLPM	(1 << 8)
 #define DWC3_GUSB2PHYCFG_PHYIF(n)	((n) << 3)
 #define DWC3_GUSB2PHYCFG_PHYIF_MASK	DWC3_GUSB2PHYCFG_PHYIF(1)
 #define DWC3_GUSB2PHYCFG_USBTRDTIM(n)	((n) << 10)
@@ -648,6 +660,9 @@ struct dwc3_scratchpad_array {
  * @maximum_speed: maximum speed requested (mainly for testing purposes)
  * @revision: revision register contents
  * @dr_mode: requested mode of operation
+ * @hsphy_mode: UTMI phy mode, one of following:
+ *		- USBPHY_INTERFACE_MODE_UTMI
+ *		- USBPHY_INTERFACE_MODE_UTMIW
  * @dcfg: saved contents of DCFG register
  * @gctl: saved contents of GCTL register
  * @isoch_delay: wValue from Set Isochronous Delay request;
@@ -739,6 +754,7 @@ struct dwc3 {
 	size_t			regs_size;
 
 	enum usb_dr_mode	dr_mode;
+	enum usb_phy_interface	hsphy_mode;
 
 	/* used for suspend/resume */
 	u32			dcfg;
@@ -769,6 +785,7 @@ struct dwc3 {
 #define DWC3_REVISION_260A	0x5533260a
 #define DWC3_REVISION_270A	0x5533270a
 #define DWC3_REVISION_280A	0x5533280a
+#define DWC3_REVISION_290A	0x5533290a
 
 	enum dwc3_ep0_next	ep0_next_event;
 	enum dwc3_ep0_state	ep0state;
@@ -821,6 +838,10 @@ struct dwc3 {
 	unsigned		rx_detect_poll_quirk:1;
 	unsigned		dis_u3_susphy_quirk:1;
 	unsigned		dis_u2_susphy_quirk:1;
+	unsigned		dis_del_phy_power_chg_quirk:1;
+	unsigned		dis_tx_ipgap_linecheck_quirk:1;
+	unsigned		dis_enblslpm_quirk:1;
+	unsigned		dis_u2_freeclk_exists_quirk:1;
 
 	unsigned		tx_de_emphasis_quirk:1;
 	unsigned		tx_de_emphasis:2;
diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c
index febcfc0f54..551f682024 100644
--- a/drivers/usb/dwc3/dwc3-generic.c
+++ b/drivers/usb/dwc3/dwc3-generic.c
@@ -9,11 +9,14 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm-generic/io.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dwc3-uboot.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <malloc.h>
@@ -24,6 +27,12 @@
 #include <clk.h>
 #include <usb/xhci.h>
 
+struct dwc3_glue_data {
+	struct clk_bulk		clks;
+	struct reset_ctl_bulk	resets;
+	fdt_addr_t regs;
+};
+
 struct dwc3_generic_plat {
 	fdt_addr_t base;
 	u32 maximum_speed;
@@ -33,8 +42,7 @@ struct dwc3_generic_plat {
 struct dwc3_generic_priv {
 	void *base;
 	struct dwc3 dwc3;
-	struct phy *phys;
-	int num_phys;
+	struct phy_bulk phys;
 };
 
 struct dwc3_generic_host_priv {
@@ -48,6 +56,7 @@ static int dwc3_generic_probe(struct udevice *dev,
 	int rc;
 	struct dwc3_generic_plat *plat = dev_get_platdata(dev);
 	struct dwc3 *dwc3 = &priv->dwc3;
+	struct dwc3_glue_data *glue = dev_get_platdata(dev->parent);
 
 	dwc3->dev = dev;
 	dwc3->maximum_speed = plat->maximum_speed;
@@ -56,10 +65,22 @@ static int dwc3_generic_probe(struct udevice *dev,
 	dwc3_of_parse(dwc3);
 #endif
 
-	rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys);
+	/*
+	 * It must hold whole USB3.0 OTG controller in resetting to hold pipe
+	 * power state in P2 before initializing TypeC PHY on RK3399 platform.
+	 */
+	if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) {
+		reset_assert_bulk(&glue->resets);
+		udelay(1);
+	}
+
+	rc = dwc3_setup_phy(dev, &priv->phys);
 	if (rc)
 		return rc;
 
+	if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3"))
+		reset_deassert_bulk(&glue->resets);
+
 	priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
 	dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
 
@@ -79,7 +100,7 @@ static int dwc3_generic_remove(struct udevice *dev,
 	struct dwc3 *dwc3 = &priv->dwc3;
 
 	dwc3_remove(dwc3);
-	dwc3_shutdown_phy(dev, priv->phys, priv->num_phys);
+	dwc3_shutdown_phy(dev, &priv->phys);
 	unmap_physmem(dwc3->regs, MAP_NOCACHE);
 
 	return 0;
@@ -187,12 +208,6 @@ U_BOOT_DRIVER(dwc3_generic_host) = {
 };
 #endif
 
-struct dwc3_glue_data {
-	struct clk_bulk		clks;
-	struct reset_ctl_bulk	resets;
-	fdt_addr_t regs;
-};
-
 struct dwc3_glue_ops {
 	void (*select_dr_mode)(struct udevice *dev, int index,
 			       enum usb_dr_mode mode);
@@ -395,6 +410,12 @@ static int dwc3_glue_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	if (glue->resets.count == 0) {
+		ret = dwc3_glue_reset_init(child, glue);
+		if (ret)
+			return ret;
+	}
+
 	while (child) {
 		enum usb_dr_mode dr_mode;
 
@@ -421,10 +442,13 @@ static int dwc3_glue_remove(struct udevice *dev)
 
 static const struct udevice_id dwc3_glue_ids[] = {
 	{ .compatible = "xlnx,zynqmp-dwc3" },
+	{ .compatible = "xlnx,versal-dwc3" },
 	{ .compatible = "ti,keystone-dwc3"},
 	{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
 	{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
 	{ .compatible = "ti,am654-dwc3" },
+	{ .compatible = "rockchip,rk3328-dwc3" },
+	{ .compatible = "rockchip,rk3399-dwc3" },
 	{ }
 };
 
diff --git a/drivers/usb/dwc3/dwc3-meson-g12a.c b/drivers/usb/dwc3/dwc3-meson-g12a.c
index de964d6c10..6567502cdd 100644
--- a/drivers/usb/dwc3/dwc3-meson-g12a.c
+++ b/drivers/usb/dwc3/dwc3-meson-g12a.c
@@ -7,12 +7,14 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm-generic/io.h>
 #include <dm.h>
 #include <dm/device-internal.h>
 #include <dm/lists.h>
 #include <dwc3-uboot.h>
 #include <generic-phy.h>
+#include <linux/delay.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <malloc.h>
diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 4af58941d8..385bed3e34 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -15,6 +15,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm/device_compat.h>
+#include <linux/bug.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
 
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index e445c705f1..2aec874e1d 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -15,10 +15,12 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/dma-mapping.h>
 #include <linux/list.h>
 
diff --git a/drivers/usb/dwc3/samsung_usb_phy.c b/drivers/usb/dwc3/samsung_usb_phy.c
index 677061458c..abbd413689 100644
--- a/drivers/usb/dwc3/samsung_usb_phy.c
+++ b/drivers/usb/dwc3/samsung_usb_phy.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <asm/arch/power.h>
 #include <asm/arch/xhci-exynos.h>
+#include <linux/delay.h>
 
 void exynos5_usb3_phy_init(struct exynos_usb3_phy *phy)
 {
diff --git a/drivers/usb/dwc3/ti_usb_phy.c b/drivers/usb/dwc3/ti_usb_phy.c
index 6b0166a1e0..f8ab06482c 100644
--- a/drivers/usb/dwc3/ti_usb_phy.c
+++ b/drivers/usb/dwc3/ti_usb_phy.c
@@ -21,6 +21,8 @@
 #include <ti-usb-phy-uboot.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/ioport.h>
 #include <asm/io.h>
 #include <asm/arch/sys_proto.h>
diff --git a/drivers/usb/emul/sandbox_flash.c b/drivers/usb/emul/sandbox_flash.c
index 399d1d3c17..9c305f46e9 100644
--- a/drivers/usb/emul/sandbox_flash.c
+++ b/drivers/usb/emul/sandbox_flash.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <os.h>
 #include <scsi.h>
 #include <usb.h>
diff --git a/drivers/usb/emul/sandbox_hub.c b/drivers/usb/emul/sandbox_hub.c
index 7f150340c2..21bf3bda48 100644
--- a/drivers/usb/emul/sandbox_hub.c
+++ b/drivers/usb/emul/sandbox_hub.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <dm/device-internal.h>
 
diff --git a/drivers/usb/emul/sandbox_keyb.c b/drivers/usb/emul/sandbox_keyb.c
index 32bc9a1698..f562fb7eca 100644
--- a/drivers/usb/emul/sandbox_keyb.c
+++ b/drivers/usb/emul/sandbox_keyb.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <os.h>
 #include <scsi.h>
 #include <usb.h>
diff --git a/drivers/usb/emul/usb-emul-uclass.c b/drivers/usb/emul/usb-emul-uclass.c
index 50da6bda8e..e3419e2fd4 100644
--- a/drivers/usb/emul/usb-emul-uclass.c
+++ b/drivers/usb/emul/usb-emul-uclass.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <dm/device-internal.h>
 
diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c
index 3a8ec0bf2d..db75ae2498 100644
--- a/drivers/usb/eth/asix.c
+++ b/drivers/usb/eth/asix.c
@@ -7,9 +7,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <net.h>
 #include <usb.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include "usb_ether.h"
 
diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
index 00706bea86..381bef2bed 100644
--- a/drivers/usb/eth/asix88179.c
+++ b/drivers/usb/eth/asix88179.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <net.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include "usb_ether.h"
 #include <malloc.h>
diff --git a/drivers/usb/eth/lan75xx.c b/drivers/usb/eth/lan75xx.c
index 418139d43a..46b92e8d68 100644
--- a/drivers/usb/eth/lan75xx.c
+++ b/drivers/usb/eth/lan75xx.c
@@ -4,7 +4,9 @@
  */
 
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
+#include <linux/bitops.h>
 #include <linux/mii.h>
 #include "usb_ether.h"
 #include "lan7x.h"
diff --git a/drivers/usb/eth/lan78xx.c b/drivers/usb/eth/lan78xx.c
index e8ee6650bc..e34ad2603f 100644
--- a/drivers/usb/eth/lan78xx.c
+++ b/drivers/usb/eth/lan78xx.c
@@ -4,7 +4,10 @@
  */
 
 #include <dm.h>
+#include <log.h>
+#include <net.h>
 #include <usb.h>
+#include <linux/bitops.h>
 #include "usb_ether.h"
 #include "lan7x.h"
 
diff --git a/drivers/usb/eth/lan7x.c b/drivers/usb/eth/lan7x.c
index 21786e1bdf..0a283619ae 100644
--- a/drivers/usb/eth/lan7x.c
+++ b/drivers/usb/eth/lan7x.c
@@ -4,9 +4,11 @@
  */
 
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <memalign.h>
+#include <net.h>
 #include <usb.h>
 #include <linux/ethtool.h>
 #include <linux/mii.h>
diff --git a/drivers/usb/eth/lan7x.h b/drivers/usb/eth/lan7x.h
index 7af610be37..f71e8c7268 100644
--- a/drivers/usb/eth/lan7x.h
+++ b/drivers/usb/eth/lan7x.h
@@ -4,7 +4,11 @@
  */
 
 #include <console.h>
+#include <time.h>
 #include <watchdog.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <linux/errno.h>
 
 /* USB Vendor Requests */
 #define USB_VENDOR_REQUEST_WRITE_REGISTER	0xA0
@@ -122,6 +126,10 @@ int lan7x_write_reg(struct usb_device *udev, u32 index, u32 data);
 
 int lan7x_read_reg(struct usb_device *udev, u32 index, u32 *data);
 
+/*
+ * FIXME: Code should not be in header files. Nive this to a file common to
+ * the two drivers.
+ */
 static inline int lan7x_wait_for_bit(struct usb_device *udev,
 				     const char *prefix, const u32 reg,
 				     const u32 mask, const bool set,
diff --git a/drivers/usb/eth/mcs7830.c b/drivers/usb/eth/mcs7830.c
index 75c45ee0ae..0cb7dbc8fb 100644
--- a/drivers/usb/eth/mcs7830.c
+++ b/drivers/usb/eth/mcs7830.c
@@ -12,6 +12,9 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
+#include <net.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <malloc.h>
 #include <memalign.h>
diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index e5f73e3d4c..f201a1789b 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -7,9 +7,12 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <net.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include <linux/bitops.h>
 #include "usb_ether.h"
@@ -708,9 +711,9 @@ static void r8152b_enter_oob(struct r8152 *tp)
 
 	rtl_rx_vlan_en(tp, false);
 
-	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
+	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
 	ocp_data |= ALDPS_PROXY_MODE;
-	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
+	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
 
 	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
@@ -841,9 +844,9 @@ static void r8153_enter_oob(struct r8152 *tp)
 
 	rtl_rx_vlan_en(tp, false);
 
-	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
+	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
 	ocp_data |= ALDPS_PROXY_MODE;
-	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
+	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
 
 	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
@@ -1351,9 +1354,8 @@ int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,
 	struct usb_interface *iface;
 	struct usb_interface_descriptor *iface_desc;
 	int ep_in_found = 0, ep_out_found = 0;
-	int i;
-
 	struct r8152 *tp;
+	int i;
 
 	/* let's examine the device now */
 	iface = &dev->config.if_desc[ifnum];
@@ -1396,10 +1398,13 @@ int r8152_eth_probe(struct usb_device *dev, unsigned int ifnum,
 		if ((iface->ep_desc[i].bmAttributes &
 		     USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK) {
 			u8 ep_addr = iface->ep_desc[i].bEndpointAddress;
-			if ((ep_addr & USB_DIR_IN) && !ep_in_found) {
-				ss->ep_in = ep_addr &
-					USB_ENDPOINT_NUMBER_MASK;
-				ep_in_found = 1;
+
+			if (ep_addr & USB_DIR_IN) {
+				if (!ep_in_found) {
+					ss->ep_in = ep_addr &
+						USB_ENDPOINT_NUMBER_MASK;
+					ep_in_found = 1;
+				}
 			} else {
 				if (!ep_out_found) {
 					ss->ep_out = ep_addr &
diff --git a/drivers/usb/eth/r8152.h b/drivers/usb/eth/r8152.h
index b6df535a83..c7f62b8b3e 100644
--- a/drivers/usb/eth/r8152.h
+++ b/drivers/usb/eth/r8152.h
@@ -7,6 +7,7 @@
 #ifndef _RTL8152_ETH_H
 #define _RTL8152_ETH_H
 
+#include <linux/bitops.h>
 #define R8152_BASE_NAME		"r8152"
 
 #define PLA_IDR			0xc000
@@ -21,7 +22,7 @@
 #define PLA_TEREDO_CFG		0xc0bc
 #define PLA_MAR			0xcd00
 #define PLA_BACKUP		0xd000
-#define PAL_BDC_CR		0xd1a0
+#define PLA_BDC_CR		0xd1a0
 #define PLA_TEREDO_TIMER	0xd2cc
 #define PLA_REALWOW_TIMER	0xd2e8
 #define PLA_LEDSEL		0xdd90
@@ -224,7 +225,7 @@
 #define TEREDO_RS_EVENT_MASK	0x00fe
 #define OOB_TEREDO_EN		0x0001
 
-/* PAL_BDC_CR */
+/* PLA_BDC_CR */
 #define ALDPS_PROXY_MODE	0x0001
 
 /* PLA_CONFIG34 */
diff --git a/drivers/usb/eth/r8152_fw.c b/drivers/usb/eth/r8152_fw.c
index 4bf4066d7a..3ebbd533cc 100644
--- a/drivers/usb/eth/r8152_fw.c
+++ b/drivers/usb/eth/r8152_fw.c
@@ -6,6 +6,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include "usb_ether.h"
 #include "r8152.h"
 
diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c
index 25f69a061b..d3532df141 100644
--- a/drivers/usb/eth/smsc95xx.c
+++ b/drivers/usb/eth/smsc95xx.c
@@ -9,10 +9,13 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <net.h>
 #include <usb.h>
 #include <asm/unaligned.h>
+#include <linux/delay.h>
 #include <linux/mii.h>
 #include "usb_ether.h"
 
diff --git a/drivers/usb/eth/usb_ether.c b/drivers/usb/eth/usb_ether.c
index 3aca9ac265..e368ecda0d 100644
--- a/drivers/usb/eth/usb_ether.c
+++ b/drivers/usb/eth/usb_ether.c
@@ -6,8 +6,11 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
+#include <net.h>
 #include <usb.h>
+#include <asm/cache.h>
 #include <dm/device-internal.h>
 
 #include "usb_ether.h"
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 58ca82d4de..46aa3fe954 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -122,6 +122,10 @@ config USB_GADGET_VBUS_DRAW
 	   This value will be used except for system-specific gadget
 	   drivers that have more specific information.
 
+config SDP_LOADADDR
+	hex "Default load address at SDP_WRITE and SDP_JUMP"
+	default 0
+
 # Selected by UDC drivers that support high-speed operation.
 config USB_GADGET_DUALSPEED
 	bool
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c
index 13dec517f6..1feed417d6 100644
--- a/drivers/usb/gadget/at91_udc.c
+++ b/drivers/usb/gadget/at91_udc.c
@@ -15,6 +15,7 @@
 
 #include <common.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <asm/io.h>
diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c
index dffa5117f9..7d51821497 100644
--- a/drivers/usb/gadget/atmel_usba_udc.c
+++ b/drivers/usb/gadget/atmel_usba_udc.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <asm/gpio.h>
 #include <asm/hardware.h>
diff --git a/drivers/usb/gadget/bcm_udc_otg_phy.c b/drivers/usb/gadget/bcm_udc_otg_phy.c
index 3ecb669507..c89cd57c25 100644
--- a/drivers/usb/gadget/bcm_udc_otg_phy.c
+++ b/drivers/usb/gadget/bcm_udc_otg_phy.c
@@ -8,6 +8,7 @@
 #include <asm/io.h>
 #include <asm/arch/sysmap.h>
 #include <asm/kona-common/clk.h>
+#include <linux/delay.h>
 
 #include "dwc2_udc_otg_priv.h"
 #include "bcm_udc_otg.h"
diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c
index d9cfff3a29..cdbdbcc5ca 100644
--- a/drivers/usb/gadget/ci_udc.c
+++ b/drivers/usb/gadget/ci_udc.c
@@ -14,6 +14,8 @@
 #include <net.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/unaligned.h>
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index b2b279358e..91ed7fcec5 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -7,8 +7,10 @@
  */
 #undef DEBUG
 
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/usb/composite.h>
 
 #define USB_BUFSIZ	4096
diff --git a/drivers/usb/gadget/core.c b/drivers/usb/gadget/core.c
index 7e1e51db96..3781d25fd6 100644
--- a/drivers/usb/gadget/core.c
+++ b/drivers/usb/gadget/core.c
@@ -15,6 +15,7 @@
  *	Bruce Balden <balden@lineo.com>
  */
 
+#include <log.h>
 #include <malloc.h>
 #include <serial.h>
 #include <usbdevice.h>
diff --git a/drivers/usb/gadget/designware_udc.c b/drivers/usb/gadget/designware_udc.c
index 70c5c678c3..7fc5d27d43 100644
--- a/drivers/usb/gadget/designware_udc.c
+++ b/drivers/usb/gadget/designware_udc.c
@@ -10,6 +10,7 @@
 #include <common.h>
 #include <serial.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #include <env.h>
 #include <usbdevice.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c
index b9c814cf73..eaa5dcb9b1 100644
--- a/drivers/usb/gadget/dwc2_udc_otg.c
+++ b/drivers/usb/gadget/dwc2_udc_otg.c
@@ -21,10 +21,13 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 
 #include <linux/errno.h>
 #include <linux/list.h>
@@ -943,8 +946,7 @@ int usb_gadget_handle_interrupts(int index)
 struct dwc2_priv_data {
 	struct clk_bulk		clks;
 	struct reset_ctl_bulk	resets;
-	struct phy *phys;
-	int num_phys;
+	struct phy_bulk phys;
 	struct udevice *usb33d_supply;
 };
 
@@ -953,87 +955,29 @@ int dm_usb_gadget_handle_interrupts(struct udevice *dev)
 	return dwc2_udc_handle_interrupt();
 }
 
-int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
+static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
 {
-	int i, ret, count;
-	struct phy *usb_phys;
-
-	/* Return if no phy declared */
-	if (!dev_read_prop(dev, "phys", NULL))
-		return 0;
-
-	count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
-	if (count <= 0)
-		return count;
-
-	usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
-				GFP_KERNEL);
-	if (!usb_phys)
-		return -ENOMEM;
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
-		if (ret && ret != -ENOENT) {
-			dev_err(dev, "Failed to get USB PHY%d for %s\n",
-				i, dev->name);
-			return ret;
-		}
-	}
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_init(&usb_phys[i]);
-		if (ret) {
-			dev_err(dev, "Can't init USB PHY%d for %s\n",
-				i, dev->name);
-			goto phys_init_err;
-		}
-	}
-
-	for (i = 0; i < count; i++) {
-		ret = generic_phy_power_on(&usb_phys[i]);
-		if (ret) {
-			dev_err(dev, "Can't power USB PHY%d for %s\n",
-				i, dev->name);
-			goto phys_poweron_err;
-		}
-	}
-
-	*array = usb_phys;
-	*num_phys =  count;
-
-	return 0;
-
-phys_poweron_err:
-	for (i = count - 1; i >= 0; i--)
-		generic_phy_power_off(&usb_phys[i]);
+	int ret;
 
-	for (i = 0; i < count; i++)
-		generic_phy_exit(&usb_phys[i]);
+	ret = generic_phy_get_bulk(dev, phys);
+	if (ret)
+		return ret;
 
-	return ret;
+	ret = generic_phy_init_bulk(phys);
+	if (ret)
+		return ret;
 
-phys_init_err:
-	for (; i >= 0; i--)
-		generic_phy_exit(&usb_phys[i]);
+	ret = generic_phy_power_on_bulk(phys);
+	if (ret)
+		generic_phy_exit_bulk(phys);
 
 	return ret;
 }
 
-void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
+static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
 {
-	int i, ret;
-
-	for (i = 0; i < num_phys; i++) {
-		if (!generic_phy_valid(&usb_phys[i]))
-			continue;
-
-		ret = generic_phy_power_off(&usb_phys[i]);
-		ret |= generic_phy_exit(&usb_phys[i]);
-		if (ret) {
-			dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
-				i, dev->name);
-		}
-	}
+	generic_phy_power_off_bulk(phys);
+	generic_phy_exit_bulk(phys);
 }
 
 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
@@ -1158,7 +1102,7 @@ static int dwc2_udc_otg_probe(struct udevice *dev)
 	if (ret)
 		return ret;
 
-	ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
+	ret = dwc2_phy_setup(dev, &priv->phys);
 	if (ret)
 		return ret;
 
@@ -1208,7 +1152,7 @@ static int dwc2_udc_otg_remove(struct udevice *dev)
 
 	clk_release_bulk(&priv->clks);
 
-	dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
+	dwc2_phy_shutdown(dev, &priv->phys);
 
 	return dm_scan_fdt_dev(dev);
 }
diff --git a/drivers/usb/gadget/dwc2_udc_otg_phy.c b/drivers/usb/gadget/dwc2_udc_otg_phy.c
index c4338af0d7..7f8e9564b9 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_phy.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_phy.c
@@ -18,6 +18,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/list.h>
 #include <malloc.h>
diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
index 434db5ba39..2eda5c3720 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
+++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
@@ -11,6 +11,7 @@
 #define __ASM_ARCH_REGS_USB_OTG_HS_H
 
 /* USB2.0 OTG Controller register */
+#include <linux/bitops.h>
 struct dwc2_usbotg_phy {
 	u32 phypwr;
 	u32 phyclk;
diff --git a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
index d4fbb75cc9..1c0505eb28 100644
--- a/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
+++ b/drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
@@ -19,6 +19,8 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
+#include <linux/bug.h>
 
 static u8 clear_feature_num;
 int clear_feature_flag;
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 8533abfd93..6f04523f15 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -10,6 +10,8 @@
 #include <common.h>
 #include <console.h>
 #include <env.h>
+#include <log.h>
+#include <part.h>
 #include <linux/errno.h>
 #include <linux/netdevice.h>
 #include <linux/usb/ch9.h>
diff --git a/drivers/usb/gadget/f_dfu.c b/drivers/usb/gadget/f_dfu.c
index a4a57ba5f5..4bedc7d3a1 100644
--- a/drivers/usb/gadget/f_dfu.c
+++ b/drivers/usb/gadget/f_dfu.c
@@ -17,6 +17,7 @@
 #include <env.h>
 #include <errno.h>
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <linux/usb/ch9.h>
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index fc27dbe8de..384c0f6f6e 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -9,11 +9,13 @@
  * Copyright 2014 Linaro, Ltd.
  * Rob Herring <robh@kernel.org>
  */
+#include <command.h>
 #include <config.h>
 #include <common.h>
 #include <env.h>
 #include <errno.h>
 #include <fastboot.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c
index 5250fc8b26..439a31c255 100644
--- a/drivers/usb/gadget/f_mass_storage.c
+++ b/drivers/usb/gadget/f_mass_storage.c
@@ -241,11 +241,13 @@
 
 #include <config.h>
 #include <hexdump.h>
+#include <log.h>
 #include <malloc.h>
 #include <common.h>
 #include <console.h>
 #include <g_dnl.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
 
 #include <linux/err.h>
 #include <linux/usb/ch9.h>
diff --git a/drivers/usb/gadget/f_rockusb.c b/drivers/usb/gadget/f_rockusb.c
index 1cfeabcd31..9ae02ae78c 100644
--- a/drivers/usb/gadget/f_rockusb.c
+++ b/drivers/usb/gadget/f_rockusb.c
@@ -4,12 +4,15 @@
  *
  * Eddie Cai <eddie.cai.linux@gmail.com>
  */
+#include <command.h>
 #include <config.h>
 #include <common.h>
 #include <env.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <part.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index 50836db4a0..f2fe89d2a6 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -20,6 +20,7 @@
 #include <common.h>
 #include <console.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <linux/usb/ch9.h>
@@ -276,7 +277,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->error_status = SDP_WRITE_FILE_COMPLETE;
 
 		sdp->state = SDP_STATE_RX_FILE_DATA;
-		sdp->dnl_address = be32_to_cpu(cmd->addr);
+		sdp->dnl_address = cmd->addr ? be32_to_cpu(cmd->addr) : CONFIG_SDP_LOADADDR;
 		sdp->dnl_bytes_remaining = be32_to_cpu(cmd->cnt);
 		sdp->dnl_bytes = sdp->dnl_bytes_remaining;
 		sdp->next_state = SDP_STATE_IDLE;
@@ -304,7 +305,7 @@ static void sdp_rx_command_complete(struct usb_ep *ep, struct usb_request *req)
 		sdp->always_send_status = false;
 		sdp->error_status = 0;
 
-		sdp->jmp_address = be32_to_cpu(cmd->addr);
+		sdp->jmp_address = cmd->addr ? be32_to_cpu(cmd->addr) : CONFIG_SDP_LOADADDR;
 		sdp->state = SDP_STATE_TX_SEC_CONF;
 		sdp->next_state = SDP_STATE_JUMP;
 		break;
diff --git a/drivers/usb/gadget/f_thor.c b/drivers/usb/gadget/f_thor.c
index ee646fdd5c..88fc87f2e9 100644
--- a/drivers/usb/gadget/f_thor.c
+++ b/drivers/usb/gadget/f_thor.c
@@ -18,9 +18,12 @@
 #include <errno.h>
 #include <common.h>
 #include <console.h>
+#include <init.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <version.h>
+#include <linux/delay.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
 #include <linux/usb/composite.h>
diff --git a/drivers/usb/gadget/fotg210.c b/drivers/usb/gadget/fotg210.c
index 0866ef6531..af43433d88 100644
--- a/drivers/usb/gadget/fotg210.c
+++ b/drivers/usb/gadget/fotg210.c
@@ -10,9 +10,11 @@
 #include <command.h>
 #include <config.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/types.h>
 #include <linux/usb/ch9.h>
diff --git a/drivers/usb/gadget/g_dnl.c b/drivers/usb/gadget/g_dnl.c
index e9e1600a1a..86fdd16b01 100644
--- a/drivers/usb/gadget/g_dnl.c
+++ b/drivers/usb/gadget/g_dnl.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <mmc.h>
@@ -89,6 +90,14 @@ static struct usb_gadget_strings *g_dnl_composite_strings[] = {
 	NULL,
 };
 
+void g_dnl_set_product(const char *s)
+{
+	if (s)
+		g_dnl_string_defs[1].s = s;
+	else
+		g_dnl_string_defs[1].s = product;
+}
+
 static int g_dnl_unbind(struct usb_composite_dev *cdev)
 {
 	struct usb_gadget *gadget = cdev->gadget;
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c
index 6e1e57f9fd..d19ac1d035 100644
--- a/drivers/usb/gadget/pxa25x_udc.c
+++ b/drivers/usb/gadget/pxa25x_udc.c
@@ -18,15 +18,18 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/byteorder.h>
 #include <asm/system.h>
 #include <asm/mach-types.h>
 #include <asm/unaligned.h>
 #include <dm/devres.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/arch/pxa.h>
+#include <linux/delay.h>
 
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c
index 15c43782b8..ba362b8f25 100644
--- a/drivers/usb/gadget/pxa27x_udc.c
+++ b/drivers/usb/gadget/pxa27x_udc.c
@@ -13,6 +13,7 @@
 #include <asm/byteorder.h>
 #include <asm/io.h>
 #include <usbdevice.h>
+#include <linux/delay.h>
 #include <usb/pxa27x_udc.h>
 #include <usb/udc.h>
 
diff --git a/drivers/usb/gadget/rndis.c b/drivers/usb/gadget/rndis.c
index eec639f8c0..13c327ea38 100644
--- a/drivers/usb/gadget/rndis.c
+++ b/drivers/usb/gadget/rndis.c
@@ -19,6 +19,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <linux/types.h>
diff --git a/drivers/usb/gadget/storage_common.c b/drivers/usb/gadget/storage_common.c
index f40779b13a..5674e8fe49 100644
--- a/drivers/usb/gadget/storage_common.c
+++ b/drivers/usb/gadget/storage_common.c
@@ -268,6 +268,7 @@ struct interrupt_data {
 struct device_attribute { int i; };
 #define ETOOSMALL	525
 
+#include <log.h>
 #include <usb_mass_storage.h>
 #include <dm/device_compat.h>
 
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 94ac969058..1c374a7bd8 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -30,6 +30,12 @@ config USB_XHCI_DWC3_OF_SIMPLE
 	  Support USB2/3 functionality in simple SoC integrations with
 	  USB controller based on the DesignWare USB3 IP Core.
 
+config USB_XHCI_MTK
+	bool "Support for MediaTek on-chip xHCI USB controller"
+	depends on ARCH_MEDIATEK
+	help
+	  Enables support for the on-chip xHCI controller on MediaTek SoCs.
+
 config USB_XHCI_MVEBU
 	bool "MVEBU USB 3.0 support"
 	default y
@@ -47,15 +53,6 @@ config USB_XHCI_PCI
 	help
 	  Enables support for the PCI-based xHCI controller.
 
-config USB_XHCI_ROCKCHIP
-	bool "Support for Rockchip on-chip xHCI USB controller"
-	depends on ARCH_ROCKCHIP
-	depends on DM_REGULATOR
-	depends on DM_USB
-	default y
-	help
-	  Enables support for the on-chip xHCI controller on Rockchip SoCs.
-
 config USB_XHCI_RCAR
 	bool "Renesas RCar USB 3.0 support"
 	default y
@@ -129,7 +126,7 @@ config USB_EHCI_ATMEL
 
 config USB_EHCI_MARVELL
 	bool "Support for Marvell on-chip EHCI USB controller"
-	depends on ARCH_MVEBU || KIRKWOOD || ORION5X
+	depends on ARCH_MVEBU || ARCH_KIRKWOOD || ARCH_ORION5X
 	default y
 	---help---
 	  Enables support for the on-chip EHCI controller on MVEBU SoCs.
@@ -197,7 +194,7 @@ config USB_EHCI_PCI
 
 config USB_EHCI_TEGRA
 	bool "Support for NVIDIA Tegra on-chip EHCI USB controller"
-	depends on TEGRA
+	depends on ARCH_TEGRA
 	---help---
 	  Enable support for Tegra on-chip EHCI USB controller
 
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index b62f346094..29d4f87e38 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -48,9 +48,9 @@ obj-$(CONFIG_USB_XHCI_BRCM) += xhci-brcm.o
 obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
 obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
 obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
-obj-$(CONFIG_USB_XHCI_ROCKCHIP) += xhci-rockchip.o
 obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o
 obj-$(CONFIG_USB_XHCI_FSL) += xhci-fsl.o
+obj-$(CONFIG_USB_XHCI_MTK) += xhci-mtk.o
 obj-$(CONFIG_USB_XHCI_MVEBU) += xhci-mvebu.o
 obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o
 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index f25ed2dab0..cefe9d83b1 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -10,14 +10,17 @@
 #include <dm.h>
 #include <errno.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <phys2bus.h>
 #include <usb.h>
 #include <usbroothubdes.h>
 #include <wait_bit.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 #include <reset.h>
 
diff --git a/drivers/usb/host/dwc3-sti-glue.c b/drivers/usb/host/dwc3-sti-glue.c
index 99d4e29414..a72ab20168 100644
--- a/drivers/usb/host/dwc3-sti-glue.c
+++ b/drivers/usb/host/dwc3-sti-glue.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dm.h>
 #include <errno.h>
diff --git a/drivers/usb/host/ehci-armada100.c b/drivers/usb/host/ehci-armada100.c
index 85a8adf806..2ce9f27b86 100644
--- a/drivers/usb/host/ehci-armada100.c
+++ b/drivers/usb/host/ehci-armada100.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <usb.h>
 #include "ehci.h"
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index 67eec0e0bb..f9083d9a64 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <usb.h>
 #include <asm/io.h>
diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index fabc662eb6..0b0b2137c7 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -9,6 +9,8 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
diff --git a/drivers/usb/host/ehci-faraday.c b/drivers/usb/host/ehci-faraday.c
index a01da4da76..b61b5382df 100644
--- a/drivers/usb/host/ehci-faraday.c
+++ b/drivers/usb/host/ehci-faraday.c
@@ -7,8 +7,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <usb/fusbh200.h>
 #include <usb/fotg210.h>
 
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index ced295ef0f..ac6c5b5845 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -9,9 +9,11 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <pci.h>
 #include <usb.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 #include <hwconfig.h>
 #include <fsl_usb.h>
diff --git a/drivers/usb/host/ehci-generic.c b/drivers/usb/host/ehci-generic.c
index 0643681846..304a3437d5 100644
--- a/drivers/usb/host/ehci-generic.c
+++ b/drivers/usb/host/ehci-generic.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <clk.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <dm/ofnode.h>
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index a2a85db1e7..f79f06320b 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -10,7 +10,9 @@
 #include <cpu_func.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <asm/byteorder.h>
+#include <asm/cache.h>
 #include <asm/unaligned.h>
 #include <usb.h>
 #include <asm/io.h>
@@ -19,6 +21,7 @@
 #include <watchdog.h>
 #include <dm/device_compat.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 
 #include "ehci.h"
 
diff --git a/drivers/usb/host/ehci-marvell.c b/drivers/usb/host/ehci-marvell.c
index 8efe6b63b9..8fe685af26 100644
--- a/drivers/usb/host/ehci-marvell.c
+++ b/drivers/usb/host/ehci-marvell.c
@@ -6,16 +6,18 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include "ehci.h"
 #include <linux/mbus.h>
 #include <asm/arch/cpu.h>
 #include <dm.h>
 
-#if defined(CONFIG_KIRKWOOD)
+#if defined(CONFIG_ARCH_KIRKWOOD)
 #include <asm/arch/soc.h>
-#elif defined(CONFIG_ORION5X)
+#elif defined(CONFIG_ARCH_ORION5X)
 #include <asm/arch/orion5x.h>
 #endif
 
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index 0b32728c57..212b362332 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -5,9 +5,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
 #include <errno.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index f2ceb51310..5f84c7b91d 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -5,10 +5,12 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
 #include <errno.h>
 #include <wait_bit.h>
 #include <linux/compiler.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
@@ -380,6 +382,14 @@ int ehci_hcd_init(int index, enum usb_init_type init,
 	if (index > 3)
 		return -EINVAL;
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (usb_fused((ulong)ehci)) {
+			printf("SoC fuse indicates USB@0x%lx is unavailable.\n",
+			       (ulong)ehci);
+			return	-ENODEV;
+		}
+	}
+
 	ret = ehci_mx6_common_init(ehci, index);
 	if (ret)
 		return ret;
@@ -437,8 +447,8 @@ static int mx6_init_after_reset(struct ehci_ctrl *dev)
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
 					   false : true);
-		if (ret) {
-			puts("Error enabling VBUS supply\n");
+		if (ret && ret != -ENOSYS) {
+			printf("Error enabling VBUS supply (ret=%i)\n", ret);
 			return ret;
 		}
 	}
@@ -577,6 +587,14 @@ static int ehci_usb_probe(struct udevice *dev)
 	struct ehci_hcor *hcor;
 	int ret;
 
+	if (CONFIG_IS_ENABLED(IMX_MODULE_FUSE)) {
+		if (usb_fused((ulong)ehci)) {
+			printf("SoC fuse indicates USB@0x%lx is unavailable.\n",
+			       (ulong)ehci);
+			return -ENODEV;
+		}
+	}
+
 	priv->ehci = ehci;
 	priv->portnr = dev->seq;
 	priv->init_type = type;
@@ -596,8 +614,8 @@ static int ehci_usb_probe(struct udevice *dev)
 		ret = regulator_set_enable(priv->vbus_supply,
 					   (type == USB_INIT_DEVICE) ?
 					   false : true);
-		if (ret) {
-			puts("Error enabling VBUS supply\n");
+		if (ret && ret != -ENOSYS) {
+			printf("Error enabling VBUS supply (ret=%i)\n", ret);
 			return ret;
 		}
 	}
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index 4941cb9457..d0b7ac512e 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -8,6 +8,7 @@
 #include <usb.h>
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 #include <errno.h>
 
diff --git a/drivers/usb/host/ehci-mxs.c b/drivers/usb/host/ehci-mxs.c
index 8e8f6d4928..824c620e63 100644
--- a/drivers/usb/host/ehci-mxs.c
+++ b/drivers/usb/host/ehci-mxs.c
@@ -10,6 +10,7 @@
 #include <asm/io.h>
 #include <asm/arch/imx-regs.h>
 #include <errno.h>
+#include <linux/delay.h>
 
 #include "ehci.h"
 
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index ab459c8cc9..93ab83941d 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -11,13 +11,19 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include <usb/ulpi.h>
 #include <errno.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <asm/arch/ehci.h>
 #include <asm/ehci-omap.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <power/regulator.h>
 
 #include "ehci.h"
 
@@ -177,9 +183,17 @@ int omap_ehci_hcd_stop(void)
  * Based on "drivers/usb/host/ehci-omap.c" from Linux 3.1
  * See there for additional Copyrights.
  */
+#if !CONFIG_IS_ENABLED(DM_USB) || !CONFIG_IS_ENABLED(OF_CONTROL)
+
 int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
 		       struct ehci_hccr **hccr, struct ehci_hcor **hcor)
 {
+	*hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE);
+	*hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10);
+#else
+int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata)
+{
+#endif
 	int ret;
 	unsigned int i, reg = 0, rev = 0;
 
@@ -286,9 +300,114 @@ int omap_ehci_hcd_init(int index, struct omap_usbhs_board_data *usbhs_pdata,
 		if (is_ehci_phy_mode(usbhs_pdata->port_mode[i]))
 			omap_ehci_soft_phy_reset(i);
 
-	*hccr = (struct ehci_hccr *)(OMAP_EHCI_BASE);
-	*hcor = (struct ehci_hcor *)(OMAP_EHCI_BASE + 0x10);
-
 	debug("OMAP EHCI init done\n");
 	return 0;
 }
+
+#if CONFIG_IS_ENABLED(DM_USB)
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
+};
+
+static void omap_usbhs_set_mode(u8 index, const char *mode)
+{
+	if (!strcmp(mode, "ehci-phy"))
+		usbhs_bdata.port_mode[index] = OMAP_EHCI_PORT_MODE_PHY;
+	else if (!strcmp(mode, "ehci-tll"))
+		usbhs_bdata.port_mode[index] = OMAP_EHCI_PORT_MODE_TLL;
+	else if (!strcmp(mode, "ehci-hsic"))
+		usbhs_bdata.port_mode[index] = OMAP_EHCI_PORT_MODE_HSIC;
+}
+
+static int omap_usbhs_probe(struct udevice *dev)
+{
+	u8 i;
+	const char *mode;
+	char prop[11];
+
+	/* Go through each port portX-mode to determing phy mode */
+	for (i = 0; i < OMAP_HS_USB_PORTS; i++) {
+		snprintf(prop, sizeof(prop), "port%d-mode", i + 1);
+		mode = dev_read_string(dev, prop);
+
+		/* If the portX-mode exists, set the mode */
+		if (mode)
+			omap_usbhs_set_mode(i, mode);
+	}
+
+	return omap_ehci_hcd_init(0, &usbhs_bdata);
+}
+
+static const struct udevice_id omap_usbhs_dt_ids[] = {
+	{ .compatible = "ti,usbhs-host" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_omaphs_host) = {
+	.name	= "usbhs-host",
+	.id	= UCLASS_SIMPLE_BUS,
+	.of_match = omap_usbhs_dt_ids,
+	.probe	= omap_usbhs_probe,
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+struct ehci_omap_priv_data {
+	struct ehci_ctrl ctrl;
+	struct omap_ehci *ehci;
+#ifdef CONFIG_DM_REGULATOR
+	struct udevice *vbus_supply;
+#endif
+	enum usb_init_type init_type;
+	int portnr;
+	struct phy phy[OMAP_HS_USB_PORTS];
+	int nports;
+};
+
+static int ehci_usb_ofdata_to_platdata(struct udevice *dev)
+{
+	struct usb_platdata *plat = dev_get_platdata(dev);
+
+	plat->init_type = USB_INIT_HOST;
+
+	return 0;
+}
+
+static int omap_ehci_probe(struct udevice *dev)
+{
+	struct usb_platdata *plat = dev_get_platdata(dev);
+	struct ehci_omap_priv_data *priv = dev_get_priv(dev);
+	struct ehci_hccr *hccr;
+	struct ehci_hcor *hcor;
+
+	priv->ehci = (struct omap_ehci *)devfdt_get_addr(dev);
+	priv->portnr = dev->seq;
+	priv->init_type = plat->init_type;
+
+	hccr = (struct ehci_hccr *)&priv->ehci->hccapbase;
+	hcor = (struct ehci_hcor *)&priv->ehci->usbcmd;
+
+	return ehci_register(dev, hccr, hcor, NULL, 0, USB_INIT_HOST);
+}
+
+static const struct udevice_id omap_ehci_dt_ids[] = {
+	{ .compatible = "ti,ehci-omap" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_omap_ehci) = {
+	.name	= "omap-ehci",
+	.id	= UCLASS_USB,
+	.of_match = omap_ehci_dt_ids,
+	.probe = omap_ehci_probe,
+	.ofdata_to_platdata = ehci_usb_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct usb_platdata),
+	.priv_auto_alloc_size = sizeof(struct ehci_omap_priv_data),
+	.remove = ehci_deregister,
+	.ops	= &ehci_usb_ops,
+	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
+};
+
+#endif
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
index 04e7c5e37f..7dd5c33c13 100644
--- a/drivers/usb/host/ehci-pci.c
+++ b/drivers/usb/host/ehci-pci.c
@@ -7,6 +7,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <usb.h>
 #include <asm/io.h>
diff --git a/drivers/usb/host/ehci-rmobile.c b/drivers/usb/host/ehci-rmobile.c
index 4868581066..130b73dfe4 100644
--- a/drivers/usb/host/ehci-rmobile.c
+++ b/drivers/usb/host/ehci-rmobile.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <asm/arch/ehci-rmobile.h>
+#include <linux/delay.h>
 #include "ehci.h"
 
 #if defined(CONFIG_R8A7740)
diff --git a/drivers/usb/host/ehci-spear.c b/drivers/usb/host/ehci-spear.c
index f93ffa8d9f..3e87e0c7fd 100644
--- a/drivers/usb/host/ehci-spear.c
+++ b/drivers/usb/host/ehci-spear.c
@@ -9,8 +9,10 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include "ehci.h"
 #include <asm/arch/hardware.h>
 #include <asm/arch/spr_misc.h>
diff --git a/drivers/usb/host/ehci-tegra.c b/drivers/usb/host/ehci-tegra.c
index 702f3b5670..d81f4a03f1 100644
--- a/drivers/usb/host/ehci-tegra.c
+++ b/drivers/usb/host/ehci-tegra.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 #include <asm-generic/gpio.h>
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index a16cf135e3..562207d3d2 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <errno.h>
 #include <linux/compiler.h>
@@ -18,6 +19,7 @@
 #include <asm/arch/crm_regs.h>
 #include <asm/mach-imx/iomux-v3.h>
 #include <asm/mach-imx/regs-usbphy.h>
+#include <linux/delay.h>
 #include <usb/ehci-ci.h>
 #include <linux/libfdt.h>
 #include <fdtdec.h>
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 66c1d61dbf..8e0755423a 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -298,4 +298,5 @@ extern struct dm_usb_ops ehci_usb_ops;
 int ehci_setup_phy(struct udevice *dev, struct phy *phy, int index);
 int ehci_shutdown_phy(struct udevice *dev, struct phy *phy);
 
+#include <linux/bitops.h>
 #endif /* USB_EHCI_H */
diff --git a/drivers/usb/host/ohci-generic.c b/drivers/usb/host/ohci-generic.c
index 04d5fdb2a8..631711a9e8 100644
--- a/drivers/usb/host/ohci-generic.c
+++ b/drivers/usb/host/ohci-generic.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <dm/ofnode.h>
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index c94960f2cc..c62d8feecc 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -32,6 +32,8 @@
 #include <asm/byteorder.h>
 #include <dm.h>
 #include <errno.h>
+#include <asm/cache.h>
+#include <linux/delay.h>
 
 #if defined(CONFIG_PCI_OHCI)
 # include <pci.h>
diff --git a/drivers/usb/host/ohci-lpc32xx.c b/drivers/usb/host/ohci-lpc32xx.c
index 34a4b00dda..afb9e29f78 100644
--- a/drivers/usb/host/ohci-lpc32xx.c
+++ b/drivers/usb/host/ohci-lpc32xx.c
@@ -10,6 +10,8 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
+#include <log.h>
 #include <wait_bit.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 9b264bd92a..a38cd25eb8 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -11,6 +11,7 @@
  * e.g. PCI controllers need this
  */
 
+#include <asm/cache.h>
 #include <asm/io.h>
 
 #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 8fc9d211db..37aa2c55f2 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -8,9 +8,11 @@
 #include <common.h>
 #include <console.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <power/regulator.h>
 
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index b6110d6b3f..625d4938cc 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -8,6 +8,7 @@
 #ifndef __R8A66597_H__
 #define __R8A66597_H__
 
+#include <linux/bitops.h>
 #define SYSCFG0		0x00
 #define SYSCFG1		0x02
 #define SYSSTS0		0x04
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c
index e08da6130b..7c823f241a 100644
--- a/drivers/usb/host/sl811-hcd.c
+++ b/drivers/usb/host/sl811-hcd.c
@@ -21,6 +21,7 @@
 #include <common.h>
 #include <mpc8xx.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include "sl811.h"
 
 #include "../../../board/kup/common/kup.h"
diff --git a/drivers/usb/host/usb-sandbox.c b/drivers/usb/host/usb-sandbox.c
index 28ee4b093b..beb62ebc0c 100644
--- a/drivers/usb/host/usb-sandbox.c
+++ b/drivers/usb/host/usb-sandbox.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <usb.h>
 #include <dm/root.h>
 
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 5e423012df..cb79dfbbd5 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <memalign.h>
 #include <usb.h>
 #include <dm/device-internal.h>
diff --git a/drivers/usb/host/utmi-armada100.c b/drivers/usb/host/utmi-armada100.c
index 8a40f66447..5d66e5881f 100644
--- a/drivers/usb/host/utmi-armada100.c
+++ b/drivers/usb/host/utmi-armada100.c
@@ -14,6 +14,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/armada100.h>
 #include <asm/arch/utmi-armada100.h>
+#include <linux/delay.h>
 
 static int utmi_phy_init(void)
 {
diff --git a/drivers/usb/host/xhci-dwc3.c b/drivers/usb/host/xhci-dwc3.c
index 9fcfa39d4b..27f84102db 100644
--- a/drivers/usb/host/xhci-dwc3.c
+++ b/drivers/usb/host/xhci-dwc3.c
@@ -10,8 +10,10 @@
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <usb.h>
 #include <dwc3-uboot.h>
+#include <linux/delay.h>
 
 #include <usb/xhci.h>
 #include <asm/io.h>
@@ -19,8 +21,7 @@
 #include <linux/usb/otg.h>
 
 struct xhci_dwc3_platdata {
-	struct phy *usb_phys;
-	int num_phys;
+	struct phy_bulk phys;
 };
 
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode)
@@ -125,7 +126,7 @@ static int xhci_dwc3_probe(struct udevice *dev)
 	hcor = (struct xhci_hcor *)((uintptr_t)hccr +
 			HC_LENGTH(xhci_readl(&(hccr)->cr_capbase)));
 
-	ret = dwc3_setup_phy(dev, &plat->usb_phys, &plat->num_phys);
+	ret = dwc3_setup_phy(dev, &plat->phys);
 	if (ret && (ret != -ENOTSUPP))
 		return ret;
 
@@ -168,7 +169,7 @@ static int xhci_dwc3_remove(struct udevice *dev)
 {
 	struct xhci_dwc3_platdata *plat = dev_get_platdata(dev);
 
-	dwc3_shutdown_phy(dev, plat->usb_phys, plat->num_phys);
+	dwc3_shutdown_phy(dev, &plat->phys);
 
 	return xhci_deregister(dev);
 }
diff --git a/drivers/usb/host/xhci-exynos5.c b/drivers/usb/host/xhci-exynos5.c
index 25c30c24f0..1705accbde 100644
--- a/drivers/usb/host/xhci-exynos5.c
+++ b/drivers/usb/host/xhci-exynos5.c
@@ -15,6 +15,8 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <usb.h>
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index 9e0c1b76e4..d8fb2c5345 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -8,6 +8,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
 #include <linux/errno.h>
 #include <linux/compat.h>
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 93450ee3b7..2d968aafb0 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -16,10 +16,12 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/byteorder.h>
 #include <usb.h>
 #include <malloc.h>
 #include <asm/cache.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 
 #include <usb/xhci.h>
diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c
new file mode 100644
index 0000000000..8ff71854fc
--- /dev/null
+++ b/drivers/usb/host/xhci-mtk.c
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2019 MediaTek, Inc.
+ * Authors: Chunfeng Yun <chunfeng.yun@mediatek.com>
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/devres.h>
+#include <generic-phy.h>
+#include <malloc.h>
+#include <usb.h>
+#include <linux/errno.h>
+#include <linux/compat.h>
+#include <power/regulator.h>
+#include <linux/iopoll.h>
+#include <usb/xhci.h>
+
+/* IPPC (IP Port Control) registers */
+#define IPPC_IP_PW_CTRL0		0x00
+#define CTRL0_IP_SW_RST			BIT(0)
+
+#define IPPC_IP_PW_CTRL1		0x04
+#define CTRL1_IP_HOST_PDN		BIT(0)
+
+#define IPPC_IP_PW_STS1			0x10
+#define STS1_IP_SLEEP_STS		BIT(30)
+#define STS1_U3_MAC_RST			BIT(16)
+#define STS1_XHCI_RST			BIT(11)
+#define STS1_SYS125_RST			BIT(10)
+#define STS1_REF_RST			BIT(8)
+#define STS1_SYSPLL_STABLE		BIT(0)
+
+#define IPPC_IP_XHCI_CAP		0x24
+#define CAP_U3_PORT_NUM(p)		((p) & 0xff)
+#define CAP_U2_PORT_NUM(p)		(((p) >> 8) & 0xff)
+
+#define IPPC_U3_CTRL_0P			0x30
+#define CTRL_U3_PORT_HOST_SEL		BIT(2)
+#define CTRL_U3_PORT_PDN		BIT(1)
+#define CTRL_U3_PORT_DIS		BIT(0)
+
+#define IPPC_U2_CTRL_0P			0x50
+#define CTRL_U2_PORT_HOST_SEL		BIT(2)
+#define CTRL_U2_PORT_PDN		BIT(1)
+#define CTRL_U2_PORT_DIS		BIT(0)
+
+#define IPPC_U3_CTRL(p)	(IPPC_U3_CTRL_0P + ((p) * 0x08))
+#define IPPC_U2_CTRL(p)	(IPPC_U2_CTRL_0P + ((p) * 0x08))
+
+struct mtk_xhci {
+	struct xhci_ctrl ctrl;	/* Needs to come first in this struct! */
+	struct xhci_hccr *hcd;
+	void __iomem *ippc;
+	struct udevice *dev;
+	struct udevice *vusb33_supply;
+	struct udevice *vbus_supply;
+	struct clk_bulk clks;
+	struct phy_bulk phys;
+	int num_u2ports;
+	int num_u3ports;
+};
+
+static int xhci_mtk_host_enable(struct mtk_xhci *mtk)
+{
+	u32 value;
+	u32 check_val;
+	int ret;
+	int i;
+
+	/* power on host ip */
+	clrbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN);
+
+	/* power on and enable all u3 ports */
+	for (i = 0; i < mtk->num_u3ports; i++) {
+		clrsetbits_le32(mtk->ippc + IPPC_U3_CTRL(i),
+				CTRL_U3_PORT_PDN | CTRL_U3_PORT_DIS,
+				CTRL_U3_PORT_HOST_SEL);
+	}
+
+	/* power on and enable all u2 ports */
+	for (i = 0; i < mtk->num_u2ports; i++) {
+		clrsetbits_le32(mtk->ippc + IPPC_U2_CTRL(i),
+				CTRL_U2_PORT_PDN | CTRL_U2_PORT_DIS,
+				CTRL_U2_PORT_HOST_SEL);
+	}
+
+	/*
+	 * wait for clocks to be stable, and clock domains reset to
+	 * be inactive after power on and enable ports
+	 */
+	check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
+			STS1_SYS125_RST | STS1_XHCI_RST;
+
+	if (mtk->num_u3ports)
+		check_val |= STS1_U3_MAC_RST;
+
+	ret = readl_poll_timeout(mtk->ippc + IPPC_IP_PW_STS1, value,
+				 (check_val == (value & check_val)), 20000);
+	if (ret)
+		dev_err(mtk->dev, "clocks are not stable 0x%x!\n", value);
+
+	return ret;
+}
+
+static int xhci_mtk_host_disable(struct mtk_xhci *mtk)
+{
+	int i;
+
+	/* power down all u3 ports */
+	for (i = 0; i < mtk->num_u3ports; i++)
+		setbits_le32(mtk->ippc + IPPC_U3_CTRL(i), CTRL_U3_PORT_PDN);
+
+	/* power down all u2 ports */
+	for (i = 0; i < mtk->num_u2ports; i++)
+		setbits_le32(mtk->ippc + IPPC_U2_CTRL(i), CTRL_U2_PORT_PDN);
+
+	/* power down host ip */
+	setbits_le32(mtk->ippc + IPPC_IP_PW_CTRL1, CTRL1_IP_HOST_PDN);
+
+	return 0;
+}
+
+static int xhci_mtk_ssusb_init(struct mtk_xhci *mtk)
+{
+	u32 value;
+
+	/* reset whole ip */
+	setbits_le32(mtk->ippc + IPPC_IP_PW_CTRL0, CTRL0_IP_SW_RST);
+	udelay(1);
+	clrbits_le32(mtk->ippc + IPPC_IP_PW_CTRL0, CTRL0_IP_SW_RST);
+
+	value = readl(mtk->ippc + IPPC_IP_XHCI_CAP);
+	mtk->num_u3ports = CAP_U3_PORT_NUM(value);
+	mtk->num_u2ports = CAP_U2_PORT_NUM(value);
+	dev_info(mtk->dev, "u2p:%d, u3p:%d\n",
+		 mtk->num_u2ports, mtk->num_u3ports);
+
+	return xhci_mtk_host_enable(mtk);
+}
+
+static int xhci_mtk_ofdata_get(struct mtk_xhci *mtk)
+{
+	struct udevice *dev = mtk->dev;
+	int ret = 0;
+
+	mtk->hcd = devfdt_remap_addr_name(dev, "mac");
+	if (!mtk->hcd) {
+		dev_err(dev, "failed to get xHCI base address\n");
+		return -ENXIO;
+	}
+
+	mtk->ippc = devfdt_remap_addr_name(dev, "ippc");
+	if (!mtk->ippc) {
+		dev_err(dev, "failed to get IPPC base address\n");
+		return -ENXIO;
+	}
+
+	dev_info(dev, "hcd: 0x%p, ippc: 0x%p\n", mtk->hcd, mtk->ippc);
+
+	ret = clk_get_bulk(dev, &mtk->clks);
+	if (ret) {
+		dev_err(dev, "failed to get clocks %d!\n", ret);
+		return ret;
+	}
+
+	ret = device_get_supply_regulator(dev, "vusb33-supply",
+					  &mtk->vusb33_supply);
+	if (ret)
+		debug("can't get vusb33 regulator %d!\n", ret);
+
+	ret = device_get_supply_regulator(dev, "vbus-supply",
+					  &mtk->vbus_supply);
+	if (ret)
+		debug("can't get vbus regulator %d!\n", ret);
+
+	return 0;
+}
+
+static int xhci_mtk_ldos_enable(struct mtk_xhci *mtk)
+{
+	int ret;
+
+	ret = regulator_set_enable(mtk->vusb33_supply, true);
+	if (ret < 0 && ret != -ENOSYS) {
+		dev_err(mtk->dev, "failed to enable vusb33 %d!\n", ret);
+		return ret;
+	}
+
+	ret = regulator_set_enable(mtk->vbus_supply, true);
+	if (ret < 0 && ret != -ENOSYS) {
+		dev_err(mtk->dev, "failed to enable vbus %d!\n", ret);
+		regulator_set_enable(mtk->vusb33_supply, false);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void xhci_mtk_ldos_disable(struct mtk_xhci *mtk)
+{
+	regulator_set_enable(mtk->vbus_supply, false);
+	regulator_set_enable(mtk->vusb33_supply, false);
+}
+
+static int xhci_mtk_phy_setup(struct mtk_xhci *mtk)
+{
+	struct udevice *dev = mtk->dev;
+	struct phy_bulk *phys = &mtk->phys;
+	int ret;
+
+	ret = generic_phy_get_bulk(dev, phys);
+	if (ret)
+		return ret;
+
+	ret = generic_phy_init_bulk(phys);
+	if (ret)
+		return ret;
+
+	ret = generic_phy_power_on_bulk(phys);
+	if (ret)
+		generic_phy_exit_bulk(phys);
+
+	return ret;
+}
+
+static void xhci_mtk_phy_shutdown(struct mtk_xhci *mtk)
+{
+	generic_phy_power_off_bulk(&mtk->phys);
+	generic_phy_exit_bulk(&mtk->phys);
+}
+
+static int xhci_mtk_probe(struct udevice *dev)
+{
+	struct mtk_xhci *mtk = dev_get_priv(dev);
+	struct xhci_hcor *hcor;
+	int ret;
+
+	mtk->dev = dev;
+	ret = xhci_mtk_ofdata_get(mtk);
+	if (ret)
+		return ret;
+
+	ret = xhci_mtk_ldos_enable(mtk);
+	if (ret)
+		goto ldos_err;
+
+	ret = clk_enable_bulk(&mtk->clks);
+	if (ret)
+		goto clks_err;
+
+	ret = xhci_mtk_phy_setup(mtk);
+	if (ret)
+		goto phys_err;
+
+	ret = xhci_mtk_ssusb_init(mtk);
+	if (ret)
+		goto ssusb_init_err;
+
+	hcor = (struct xhci_hcor *)((uintptr_t)mtk->hcd +
+			HC_LENGTH(xhci_readl(&mtk->hcd->cr_capbase)));
+
+	return xhci_register(dev, mtk->hcd, hcor);
+
+ssusb_init_err:
+	xhci_mtk_phy_shutdown(mtk);
+phys_err:
+	clk_disable_bulk(&mtk->clks);
+clks_err:
+	xhci_mtk_ldos_disable(mtk);
+ldos_err:
+	return ret;
+}
+
+static int xhci_mtk_remove(struct udevice *dev)
+{
+	struct mtk_xhci *mtk = dev_get_priv(dev);
+
+	xhci_deregister(dev);
+	xhci_mtk_host_disable(mtk);
+	xhci_mtk_ldos_disable(mtk);
+	clk_disable_bulk(&mtk->clks);
+
+	return 0;
+}
+
+static const struct udevice_id xhci_mtk_ids[] = {
+	{ .compatible = "mediatek,mtk-xhci" },
+	{ }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+	.name = "xhci-mtk",
+	.id = UCLASS_USB,
+	.of_match = xhci_mtk_ids,
+	.probe = xhci_mtk_probe,
+	.remove = xhci_mtk_remove,
+	.ops = &xhci_usb_ops,
+	.bind = dm_scan_fdt_dev,
+	.priv_auto_alloc_size = sizeof(struct mtk_xhci),
+	.flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
diff --git a/drivers/usb/host/xhci-mvebu.c b/drivers/usb/host/xhci-mvebu.c
index 2b871046ae..5fb74848c2 100644
--- a/drivers/usb/host/xhci-mvebu.c
+++ b/drivers/usb/host/xhci-mvebu.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <usb.h>
 #include <power/regulator.h>
 #include <asm/gpio.h>
diff --git a/drivers/usb/host/xhci-omap.c b/drivers/usb/host/xhci-omap.c
index 25b195f7d1..501129d769 100644
--- a/drivers/usb/host/xhci-omap.c
+++ b/drivers/usb/host/xhci-omap.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
 #include <linux/errno.h>
 #include <asm/omap_common.h>
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index c1f60da541..9fb6d2f763 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -7,6 +7,8 @@
 
 #include <common.h>
 #include <dm.h>
+#include <init.h>
+#include <log.h>
 #include <pci.h>
 #include <usb.h>
 #include <usb/xhci.h>
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index d86584b847..4964697f27 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -9,10 +9,12 @@
 #include <clk.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <usb.h>
 #include <wait_bit.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 #include <usb/xhci.h>
 #include "xhci-rcar-r8a779x_usb3_v3.h"
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 3cd6c8a0dc..86aeaab412 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -15,9 +15,11 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <asm/byteorder.h>
 #include <usb.h>
 #include <asm/unaligned.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 
 #include <usb/xhci.h>
diff --git a/drivers/usb/host/xhci-rockchip.c b/drivers/usb/host/xhci-rockchip.c
deleted file mode 100644
index b67722fe45..0000000000
--- a/drivers/usb/host/xhci-rockchip.c
+++ /dev/null
@@ -1,196 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2016 Rockchip, Inc.
- * Authors: Daniel Meng <daniel.meng@rock-chips.com>
- */
-#include <common.h>
-#include <dm.h>
-#include <malloc.h>
-#include <usb.h>
-#include <watchdog.h>
-#include <linux/errno.h>
-#include <linux/compat.h>
-#include <linux/usb/dwc3.h>
-#include <power/regulator.h>
-
-#include <usb/xhci.h>
-
-struct rockchip_xhci_platdata {
-	fdt_addr_t hcd_base;
-	struct udevice *vbus_supply;
-};
-
-/*
- * Contains pointers to register base addresses
- * for the usb controller.
- */
-struct rockchip_xhci {
-	struct usb_platdata usb_plat;
-	struct xhci_ctrl ctrl;
-	struct xhci_hccr *hcd;
-	struct dwc3 *dwc3_reg;
-};
-
-static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	int ret = 0;
-
-	/*
-	 * Get the base address for XHCI controller from the device node
-	 */
-	plat->hcd_base = dev_read_addr(dev);
-	if (plat->hcd_base == FDT_ADDR_T_NONE) {
-		pr_err("Can't get the XHCI register base address\n");
-		return -ENXIO;
-	}
-
-	/* Vbus regulator */
-	ret = device_get_supply_regulator(dev, "vbus-supply",
-					  &plat->vbus_supply);
-	if (ret)
-		debug("Can't get VBus regulator!\n");
-
-	return 0;
-}
-
-/*
- * rockchip_dwc3_phy_setup() - Configure USB PHY Interface of DWC3 Core
- * @dwc: Pointer to our controller context structure
- * @dev: Pointer to ulcass device
- */
-static void rockchip_dwc3_phy_setup(struct dwc3 *dwc3_reg,
-				    struct udevice *dev)
-{
-	u32 reg;
-	u32 utmi_bits;
-
-	/* Set dwc3 usb2 phy config */
-	reg = readl(&dwc3_reg->g_usb2phycfg[0]);
-
-	if (dev_read_bool(dev, "snps,dis-enblslpm-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
-
-	utmi_bits = dev_read_u32_default(dev, "snps,phyif-utmi-bits", -1);
-	if (utmi_bits == 16) {
-		reg |= DWC3_GUSB2PHYCFG_PHYIF;
-		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_16BIT;
-	} else if (utmi_bits == 8) {
-		reg &= ~DWC3_GUSB2PHYCFG_PHYIF;
-		reg &= ~DWC3_GUSB2PHYCFG_USBTRDTIM_MASK;
-		reg |= DWC3_GUSB2PHYCFG_USBTRDTIM_8BIT;
-	}
-
-	if (dev_read_bool(dev, "snps,dis-u2-freeclk-exists-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
-
-	if (dev_read_bool(dev, "snps,dis-u2-susphy-quirk"))
-		reg &= ~DWC3_GUSB2PHYCFG_SUSPHY;
-
-	writel(reg, &dwc3_reg->g_usb2phycfg[0]);
-}
-
-static int rockchip_xhci_core_init(struct rockchip_xhci *rkxhci,
-				   struct udevice *dev)
-{
-	int ret;
-
-	ret = dwc3_core_init(rkxhci->dwc3_reg);
-	if (ret) {
-		pr_err("failed to initialize core\n");
-		return ret;
-	}
-
-	rockchip_dwc3_phy_setup(rkxhci->dwc3_reg, dev);
-
-	/* We are hard-coding DWC3 core to Host Mode */
-	dwc3_set_mode(rkxhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST);
-
-	return 0;
-}
-
-static int rockchip_xhci_core_exit(struct rockchip_xhci *rkxhci)
-{
-	return 0;
-}
-
-static int xhci_usb_probe(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	struct rockchip_xhci *ctx = dev_get_priv(dev);
-	struct xhci_hcor *hcor;
-	int ret;
-
-	ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
-	ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
-	hcor = (struct xhci_hcor *)((uint64_t)ctx->hcd +
-			HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
-
-	if (plat->vbus_supply) {
-		ret = regulator_set_enable(plat->vbus_supply, true);
-		if (ret) {
-			pr_err("XHCI: failed to set VBus supply\n");
-			return ret;
-		}
-	}
-
-	ret = rockchip_xhci_core_init(ctx, dev);
-	if (ret) {
-		pr_err("XHCI: failed to initialize controller\n");
-		return ret;
-	}
-
-	return xhci_register(dev, ctx->hcd, hcor);
-}
-
-static int xhci_usb_remove(struct udevice *dev)
-{
-	struct rockchip_xhci_platdata *plat = dev_get_platdata(dev);
-	struct rockchip_xhci *ctx = dev_get_priv(dev);
-	int ret;
-
-	ret = xhci_deregister(dev);
-	if (ret)
-		return ret;
-	ret = rockchip_xhci_core_exit(ctx);
-	if (ret)
-		return ret;
-
-	if (plat->vbus_supply) {
-		ret = regulator_set_enable(plat->vbus_supply, false);
-		if (ret)
-			pr_err("XHCI: failed to set VBus supply\n");
-	}
-
-	return ret;
-}
-
-static const struct udevice_id xhci_usb_ids[] = {
-	{ .compatible = "rockchip,rk3328-xhci" },
-	{ }
-};
-
-U_BOOT_DRIVER(usb_xhci) = {
-	.name	= "xhci_rockchip",
-	.id	= UCLASS_USB,
-	.of_match = xhci_usb_ids,
-	.ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
-	.probe = xhci_usb_probe,
-	.remove = xhci_usb_remove,
-	.ops	= &xhci_usb_ops,
-	.bind	= dm_scan_fdt_dev,
-	.platdata_auto_alloc_size = sizeof(struct rockchip_xhci_platdata),
-	.priv_auto_alloc_size = sizeof(struct rockchip_xhci),
-	.flags	= DM_FLAG_ALLOC_PRIV_DMA,
-};
-
-static const struct udevice_id usb_phy_ids[] = {
-	{ .compatible = "rockchip,rk3328-usb3-phy" },
-	{ }
-};
-
-U_BOOT_DRIVER(usb_phy) = {
-	.name = "usb_phy_rockchip",
-	.of_match = usb_phy_ids,
-};
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 40dee2e6d9..ebd2954571 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -22,12 +22,16 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/byteorder.h>
 #include <usb.h>
 #include <malloc.h>
 #include <watchdog.h>
 #include <asm/cache.h>
 #include <asm/unaligned.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <usb/xhci.h>
 
@@ -610,6 +614,16 @@ static int xhci_set_configuration(struct usb_device *udev)
 		ep_ctx[ep_index]->tx_info =
 			cpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |
 			EP_AVG_TRB_LENGTH(avg_trb_len));
+
+		/*
+		 * The MediaTek xHCI defines some extra SW parameters which
+		 * are put into reserved DWs in Slot and Endpoint Contexts
+		 * for synchronous endpoints.
+		 */
+		if (IS_ENABLED(CONFIG_USB_XHCI_MTK)) {
+			ep_ctx[ep_index]->reserved[0] =
+				cpu_to_le32(EP_BPKTS(1) | EP_BBM(1));
+		}
 	}
 
 	return xhci_configure_endpoints(udev, false);
diff --git a/drivers/usb/musb-new/am35x.c b/drivers/usb/musb-new/am35x.c
index 6e5be90fe5..0a52e09e19 100644
--- a/drivers/usb/musb-new/am35x.c
+++ b/drivers/usb/musb-new/am35x.c
@@ -26,6 +26,8 @@
 #else
 #include <common.h>
 #include <asm/omap_musb.h>
+#include <linux/bug.h>
+#include <linux/delay.h>
 #include "linux-compat.h"
 #endif
 
diff --git a/drivers/usb/musb-new/da8xx.c b/drivers/usb/musb-new/da8xx.c
index 2ddcf33b5f..67488ddb50 100644
--- a/drivers/usb/musb-new/da8xx.c
+++ b/drivers/usb/musb-new/da8xx.c
@@ -15,11 +15,13 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/da8xx-usb.h>
+#include <linux/delay.h>
 #include <linux/usb/otg.h>
 #include <asm/omap_musb.h>
 #include <generic-phy.h>
diff --git a/drivers/usb/musb-new/linux-compat.h b/drivers/usb/musb-new/linux-compat.h
index f366ae58e8..733b197f59 100644
--- a/drivers/usb/musb-new/linux-compat.h
+++ b/drivers/usb/musb-new/linux-compat.h
@@ -2,6 +2,7 @@
 #define __LINUX_COMPAT_H__
 
 #include <malloc.h>
+#include <linux/delay.h>
 #include <linux/list.h>
 #include <linux/compat.h>
 
diff --git a/drivers/usb/musb-new/mt85xx.c b/drivers/usb/musb-new/mt85xx.c
index 131fd7dd79..c281c38a28 100644
--- a/drivers/usb/musb-new/mt85xx.c
+++ b/drivers/usb/musb-new/mt85xx.c
@@ -14,6 +14,7 @@
 #include <dm.h>
 #include <dm/lists.h>
 #include <dm/root.h>
+#include <linux/delay.h>
 #include <linux/usb/musb.h>
 #include <usb.h>
 #include "linux-compat.h"
diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c
index f678aa4826..961de99795 100644
--- a/drivers/usb/musb-new/musb_core.c
+++ b/drivers/usb/musb-new/musb_core.c
@@ -65,6 +65,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/module.h>
@@ -80,6 +81,8 @@
 #else
 #include <common.h>
 #include <usb.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <linux/usb/ch9.h>
 #include <linux/usb/gadget.h>
diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c
index 35d2123ddd..8ba98d8c0e 100644
--- a/drivers/usb/musb-new/musb_gadget.c
+++ b/drivers/usb/musb-new/musb_gadget.c
@@ -9,6 +9,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/device_compat.h>
 #include <dm/devres.h>
 #include <linux/kernel.h>
@@ -22,6 +23,7 @@
 #include <linux/slab.h>
 #else
 #include <common.h>
+#include <linux/bug.h>
 #include <linux/usb/ch9.h>
 #include "linux-compat.h"
 #endif
diff --git a/drivers/usb/musb-new/musb_gadget_ep0.c b/drivers/usb/musb-new/musb_gadget_ep0.c
index 79e8222e3b..93f43ba471 100644
--- a/drivers/usb/musb-new/musb_gadget_ep0.c
+++ b/drivers/usb/musb-new/musb_gadget_ep0.c
@@ -9,6 +9,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/device_compat.h>
 #include <linux/kernel.h>
 #include <linux/list.h>
diff --git a/drivers/usb/musb-new/musb_host.c b/drivers/usb/musb-new/musb_host.c
index b98f0ed40e..5fa013659c 100644
--- a/drivers/usb/musb-new/musb_host.c
+++ b/drivers/usb/musb-new/musb_host.c
@@ -23,6 +23,7 @@
 #else
 #include <common.h>
 #include <usb.h>
+#include <linux/bug.h>
 #include "linux-compat.h"
 #include "usb-compat.h"
 #endif
diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c
index 72f14b9343..988071a61d 100644
--- a/drivers/usb/musb-new/musb_uboot.c
+++ b/drivers/usb/musb-new/musb_uboot.c
@@ -2,6 +2,7 @@
 #include <console.h>
 #include <malloc.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/errno.h>
 #include <linux/usb/ch9.h>
diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c
index 0d34dcfc5d..da63cc2c22 100644
--- a/drivers/usb/musb-new/omap2430.c
+++ b/drivers/usb/musb-new/omap2430.c
@@ -10,6 +10,7 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <serial.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
diff --git a/drivers/usb/musb-new/pic32.c b/drivers/usb/musb-new/pic32.c
index c7867fef8a..74a841af46 100644
--- a/drivers/usb/musb-new/pic32.c
+++ b/drivers/usb/musb-new/pic32.c
@@ -11,6 +11,8 @@
 
 #include <common.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/usb/musb.h>
 #include "linux-compat.h"
 #include "musb_core.h"
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index 98bf736978..53c336fc3f 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -19,6 +19,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <malloc.h>
 #include <phy-sun4i-usb.h>
 #include <reset.h>
@@ -29,6 +30,8 @@
 #include <dm/device_compat.h>
 #include <dm/lists.h>
 #include <dm/root.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/usb/musb.h>
 #include "linux-compat.h"
 #include "musb_core.h"
diff --git a/drivers/usb/musb-new/ti-musb.c b/drivers/usb/musb-new/ti-musb.c
index 608facefa3..f4f26d86b3 100644
--- a/drivers/usb/musb-new/ti-musb.c
+++ b/drivers/usb/musb-new/ti-musb.c
@@ -9,6 +9,7 @@
 #include <command.h>
 #include <console.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/usb/otg.h>
 #include <dm/device-internal.h>
diff --git a/drivers/usb/musb/am35x.c b/drivers/usb/musb/am35x.c
index 0617364f35..f945f1f5e2 100644
--- a/drivers/usb/musb/am35x.c
+++ b/drivers/usb/musb/am35x.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include "am35x.h"
 
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index c6d47bef56..147b2eb929 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <linux/bitops.h>
 
 #include "musb_core.h"
 struct musb_regs *musbr;
diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c
index adcd319b6d..afbc648883 100644
--- a/drivers/usb/musb/musb_hcd.c
+++ b/drivers/usb/musb/musb_hcd.c
@@ -8,7 +8,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <usb.h>
+#include <linux/delay.h>
 #include "musb_hcd.h"
 
 /* MSC control transfers */
diff --git a/drivers/usb/musb/musb_udc.c b/drivers/usb/musb/musb_udc.c
index 4d7723621d..d901f8777c 100644
--- a/drivers/usb/musb/musb_udc.c
+++ b/drivers/usb/musb/musb_udc.c
@@ -41,6 +41,7 @@
 #include <hang.h>
 #include <serial.h>
 #include <usbdevice.h>
+#include <linux/delay.h>
 #include <usb/udc.h>
 #include "../gadget/ep0.h"
 #include "musb_core.h"
diff --git a/drivers/usb/phy/omap_usb_phy.c b/drivers/usb/phy/omap_usb_phy.c
index 9209942430..be733f39b2 100644
--- a/drivers/usb/phy/omap_usb_phy.c
+++ b/drivers/usb/phy/omap_usb_phy.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <usb.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/omap_common.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/usb/phy/rockchip_usb2_phy.c b/drivers/usb/phy/rockchip_usb2_phy.c
index ec998901ab..f1cf9160d5 100644
--- a/drivers/usb/phy/rockchip_usb2_phy.c
+++ b/drivers/usb/phy/rockchip_usb2_phy.c
@@ -5,7 +5,10 @@
 
 #include <common.h>
 #include <hang.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 #include "../gadget/dwc2_udc_otg_priv.h"
 
diff --git a/drivers/usb/phy/twl4030.c b/drivers/usb/phy/twl4030.c
index d2945d1417..676868bead 100644
--- a/drivers/usb/phy/twl4030.c
+++ b/drivers/usb/phy/twl4030.c
@@ -24,6 +24,7 @@
  */
 
 #include <twl4030.h>
+#include <linux/delay.h>
 
 /* Defines for bits in registers */
 #define OPMODE_MASK		(3 << 3)
diff --git a/drivers/usb/ulpi/omap-ulpi-viewport.c b/drivers/usb/ulpi/omap-ulpi-viewport.c
index 67cdebc0fc..8b930e3fa9 100644
--- a/drivers/usb/ulpi/omap-ulpi-viewport.c
+++ b/drivers/usb/ulpi/omap-ulpi-viewport.c
@@ -8,7 +8,9 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <usb/ulpi.h>
 
 #define OMAP_ULPI_WR_OPSEL	(2 << 22)
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index a2158c9bb8..3bb152be89 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -15,6 +15,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 #include <usb/ulpi.h>
 
 /* ULPI viewport control bits */
diff --git a/drivers/usb/ulpi/ulpi.c b/drivers/usb/ulpi/ulpi.c
index e0fb43f89b..dd0da0e841 100644
--- a/drivers/usb/ulpi/ulpi.c
+++ b/drivers/usb/ulpi/ulpi.c
@@ -21,6 +21,8 @@
 
 #include <common.h>
 #include <exports.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <usb/ulpi.h>
 
 #define ULPI_ID_REGS_COUNT	4
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 7c5012a67f..38123543a5 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -128,7 +128,7 @@ config CONSOLE_TRUETYPE_SIZE
 
 config SYS_WHITE_ON_BLACK
 	bool "Display console as white on a black background"
-	default y if ARCH_AT91 || ARCH_EXYNOS || ARCH_ROCKCHIP || TEGRA || X86 || ARCH_SUNXI
+	default y if ARCH_AT91 || ARCH_EXYNOS || ARCH_ROCKCHIP || ARCH_TEGRA || X86 || ARCH_SUNXI
 	help
 	 Normally the display is black on a white background, Enable this
 	 option to invert this, i.e. white on a black background. This can be
diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index eb5add2a20..2707ff59c7 100644
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -13,15 +13,17 @@
  */
 #include <common.h>
 #include <dm.h>
-#include <asm/io.h>
+#include <lcd.h>
+#include <log.h>
+#include <video.h>
+#include <asm/arch/clock.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/omap.h>
-#include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/io.h>
 #include <asm/utils.h>
+#include <linux/delay.h>
 #include <linux/err.h>
-#include <lcd.h>
-#include <video.h>
 #include "am335x-fb.h"
 
 #define LCDC_FMAX				200000000
diff --git a/drivers/video/anx9804.c b/drivers/video/anx9804.c
index fc2f431b9c..b050c4292f 100644
--- a/drivers/video/anx9804.c
+++ b/drivers/video/anx9804.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <i2c.h>
+#include <linux/delay.h>
 #include "anx98xx-edp.h"
 #include "anx9804.h"
 
diff --git a/drivers/video/anx98xx-edp.h b/drivers/video/anx98xx-edp.h
index 64269c30bd..ece36d41ee 100644
--- a/drivers/video/anx98xx-edp.h
+++ b/drivers/video/anx98xx-edp.h
@@ -6,6 +6,7 @@
 
 /* Registers at i2c address 0x38 */
 
+#include <linux/bitops.h>
 #define ANX9804_HDCP_CONTROL_0_REG				0x01
 
 #define ANX9804_SYS_CTRL1_REG					0x80
diff --git a/drivers/video/ati_radeon_fb.c b/drivers/video/ati_radeon_fb.c
index 6fce033636..c4da2e3ae7 100644
--- a/drivers/video/ati_radeon_fb.c
+++ b/drivers/video/ati_radeon_fb.c
@@ -16,6 +16,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include <command.h>
 #include <bios_emul.h>
diff --git a/drivers/video/atmel_hlcdfb.c b/drivers/video/atmel_hlcdfb.c
index 62acccedf3..35a56a8eab 100644
--- a/drivers/video/atmel_hlcdfb.c
+++ b/drivers/video/atmel_hlcdfb.c
@@ -7,7 +7,9 @@
 
 #include <common.h>
 #include <cpu_func.h>
+#include <log.h>
 #include <malloc.h>
+#include <part.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
 #include <asm/arch/clk.h>
@@ -18,6 +20,7 @@
 #include <video.h>
 #include <wait_bit.h>
 #include <atmel_hlcdc.h>
+#include <linux/bug.h>
 
 #if defined(CONFIG_LCD_LOGO)
 #include <bmp_logo.h>
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index bd2e9c0c9b..ae8ec26468 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -9,6 +9,8 @@
 #include <atmel_lcd.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
+#include <part.h>
 #include <video.h>
 #include <asm/io.h>
 #include <asm/arch/gpio.h>
@@ -16,6 +18,7 @@
 #include <lcd.h>
 #include <bmp_layout.h>
 #include <atmel_lcdc.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/video/backlight_gpio.c b/drivers/video/backlight_gpio.c
index fb1525b478..67fed7f224 100644
--- a/drivers/video/backlight_gpio.c
+++ b/drivers/video/backlight_gpio.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <backlight.h>
+#include <log.h>
 #include <asm/gpio.h>
 
 struct gpio_backlight_priv {
diff --git a/drivers/video/bcm2835.c b/drivers/video/bcm2835.c
index 1d2eda084c..0888cb0019 100644
--- a/drivers/video/bcm2835.c
+++ b/drivers/video/bcm2835.c
@@ -5,9 +5,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <video.h>
 #include <asm/arch/mbox.h>
 #include <asm/arch/msg.h>
+#include <asm/cache.h>
 
 static int bcm2835_video_probe(struct udevice *dev)
 {
diff --git a/drivers/video/bridge/anx6345.c b/drivers/video/bridge/anx6345.c
index 3e3f0e2ce6..1c5270ff05 100644
--- a/drivers/video/bridge/anx6345.c
+++ b/drivers/video/bridge/anx6345.c
@@ -8,7 +8,9 @@
 #include <errno.h>
 #include <i2c.h>
 #include <edid.h>
+#include <log.h>
 #include <video_bridge.h>
+#include <linux/delay.h>
 #include "../anx98xx-edp.h"
 
 #define DP_MAX_LINK_RATE		0x001
diff --git a/drivers/video/bridge/ps862x.c b/drivers/video/bridge/ps862x.c
index 3c5bf7b659..8399c6f74c 100644
--- a/drivers/video/bridge/ps862x.c
+++ b/drivers/video/bridge/ps862x.c
@@ -8,7 +8,9 @@
 #include <dm.h>
 #include <errno.h>
 #include <i2c.h>
+#include <log.h>
 #include <video_bridge.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/video/bridge/ptn3460.c b/drivers/video/bridge/ptn3460.c
index 59f0649646..4760f04108 100644
--- a/drivers/video/bridge/ptn3460.c
+++ b/drivers/video/bridge/ptn3460.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <video_bridge.h>
 
 static int ptn3460_attach(struct udevice *dev)
diff --git a/drivers/video/bridge/video-bridge-uclass.c b/drivers/video/bridge/video-bridge-uclass.c
index 5fecb4cfd5..389b02cdcb 100644
--- a/drivers/video/bridge/video-bridge-uclass.c
+++ b/drivers/video/bridge/video-bridge-uclass.c
@@ -8,7 +8,9 @@
 #include <dm.h>
 #include <errno.h>
 #include <edid.h>
+#include <log.h>
 #include <video_bridge.h>
+#include <linux/delay.h>
 
 int video_bridge_set_backlight(struct udevice *dev, int percent)
 {
diff --git a/drivers/video/broadwell_igd.c b/drivers/video/broadwell_igd.c
index c23421d25b..8e8fe9d9b3 100644
--- a/drivers/video/broadwell_igd.c
+++ b/drivers/video/broadwell_igd.c
@@ -7,8 +7,10 @@
 
 #include <common.h>
 #include <bios_emul.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <init.h>
+#include <log.h>
 #include <vbe.h>
 #include <video.h>
 #include <asm/cpu.h>
@@ -18,6 +20,7 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/iomap.h>
 #include <asm/arch/pch.h>
+#include <linux/delay.h>
 #include "i915_reg.h"
 
 struct broadwell_igd_priv {
diff --git a/drivers/video/bus_vcxk.c b/drivers/video/bus_vcxk.c
index e87c66d515..2a72d23eb8 100644
--- a/drivers/video/bus_vcxk.c
+++ b/drivers/video/bus_vcxk.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <bmp_layout.h>
+#include <log.h>
 #include <asm/io.h>
 
 vu_char  *vcxk_bws      = ((vu_char *) (CONFIG_SYS_VCXK_BASE));
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 5442bac4c6..6495e22b1a 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -65,10 +65,12 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <cpu_func.h>
 #include <env.h>
 #include <fdtdec.h>
 #include <gzip.h>
+#include <log.h>
 #include <version.h>
 #include <malloc.h>
 #include <video.h>
@@ -1710,7 +1712,8 @@ static void logo_black(void)
 			1);
 }
 
-static int do_clrlogo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_clrlogo(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	if (argc != 1)
 		return cmd_usage(cmdtp);
diff --git a/drivers/video/console_truetype.c b/drivers/video/console_truetype.c
index 6d7661db89..5f7f03904b 100644
--- a/drivers/video/console_truetype.c
+++ b/drivers/video/console_truetype.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <video.h>
 #include <video_console.h>
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index 5fb68865ef..4984dda847 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -13,9 +13,11 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <video_fb.h>
+#include <linux/delay.h>
 #include <linux/list.h>
 #include <linux/fb.h>
 
diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index bf74d6adf2..c4fbb18294 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -7,9 +7,11 @@
 
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include <i2c.h>
 #include <media_bus_format.h>
+#include <linux/delay.h>
 #include "dw_hdmi.h"
 
 struct tmds_n_cts {
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 5dd75e7ec8..b7bfbb5e50 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -20,6 +20,8 @@
 #include <asm/arch/gpio.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/iopoll.h>
 #include <video_bridge.h>
 
diff --git a/drivers/video/efi.c b/drivers/video/efi.c
index 653cb47265..47441a35a6 100644
--- a/drivers/video/efi.c
+++ b/drivers/video/efi.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <dm.h>
 #include <efi_api.h>
+#include <log.h>
 #include <vbe.h>
 #include <video.h>
 
diff --git a/drivers/video/exynos/exynos_dp.c b/drivers/video/exynos/exynos_dp.c
index 2781f6f55b..749bde862e 100644
--- a/drivers/video/exynos/exynos_dp.c
+++ b/drivers/video/exynos/exynos_dp.c
@@ -10,6 +10,8 @@
 #include <common.h>
 #include <display.h>
 #include <fdtdec.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
 #include <video_bridge.h>
diff --git a/drivers/video/exynos/exynos_dp_lowlevel.c b/drivers/video/exynos/exynos_dp_lowlevel.c
index 802703750f..ae500a7028 100644
--- a/drivers/video/exynos/exynos_dp_lowlevel.c
+++ b/drivers/video/exynos/exynos_dp_lowlevel.c
@@ -7,6 +7,8 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/dp_info.h>
diff --git a/drivers/video/exynos/exynos_fb.c b/drivers/video/exynos/exynos_fb.c
index 8a8c846262..d5b13a6723 100644
--- a/drivers/video/exynos/exynos_fb.c
+++ b/drivers/video/exynos/exynos_fb.c
@@ -12,6 +12,7 @@
 #include <div64.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <panel.h>
 #include <video.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi.c b/drivers/video/exynos/exynos_mipi_dsi.c
index ad5ef93e01..042aa9a5b9 100644
--- a/drivers/video/exynos/exynos_mipi_dsi.c
+++ b/drivers/video/exynos/exynos_mipi_dsi.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <fdtdec.h>
 #include <dm/devres.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi_common.c b/drivers/video/exynos/exynos_mipi_dsi_common.c
index adf3d968b6..ab7d61afc8 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_common.c
@@ -8,6 +8,8 @@
 
 #include <common.h>
 #include <lcd.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <asm/arch/dsim.h>
 #include <asm/arch/mipi_dsim.h>
diff --git a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
index 1b6e71dfaf..8111acd9a0 100644
--- a/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
+++ b/drivers/video/exynos/exynos_mipi_dsi_lowlevel.c
@@ -11,6 +11,7 @@
 #include <asm/arch/mipi_dsim.h>
 #include <asm/arch/power.h>
 #include <asm/arch/cpu.h>
+#include <linux/delay.h>
 
 #include "exynos_mipi_dsi_lowlevel.h"
 #include "exynos_mipi_dsi_common.h"
diff --git a/drivers/video/formike.c b/drivers/video/formike.c
index 7bc4bc6041..5cbe50d4cb 100644
--- a/drivers/video/formike.c
+++ b/drivers/video/formike.c
@@ -7,7 +7,9 @@
  */
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 #define TAG_READ	0x80
 #define TAG_WRITE	0x00
diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c
index 076e9ea019..e9d05c9394 100644
--- a/drivers/video/fsl_dcu_fb.c
+++ b/drivers/video/fsl_dcu_fb.c
@@ -7,6 +7,7 @@
  */
 
 #include <init.h>
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <common.h>
 #include <dm.h>
diff --git a/drivers/video/hitachi_tx18d42vm_lcd.c b/drivers/video/hitachi_tx18d42vm_lcd.c
index a57abd23f7..c6c8df6a96 100644
--- a/drivers/video/hitachi_tx18d42vm_lcd.c
+++ b/drivers/video/hitachi_tx18d42vm_lcd.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <malloc.h>
+#include <linux/delay.h>
 
 #include <asm/gpio.h>
 #include <errno.h>
diff --git a/drivers/video/ihs_video_out.c b/drivers/video/ihs_video_out.c
index 0af7c2bf44..f02fd13d28 100644
--- a/drivers/video/ihs_video_out.c
+++ b/drivers/video/ihs_video_out.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <display.h>
 #include <dm.h>
+#include <log.h>
 #include <regmap.h>
 #include <video_osd.h>
 #include <asm/gpio.h>
diff --git a/drivers/video/imx/ipu_common.c b/drivers/video/imx/ipu_common.c
index cbe1984e4f..5908b23acc 100644
--- a/drivers/video/imx/ipu_common.c
+++ b/drivers/video/imx/ipu_common.c
@@ -12,6 +12,8 @@
 
 /* #define DEBUG */
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/err.h>
 #include <asm/io.h>
diff --git a/drivers/video/imx/ipu_disp.c b/drivers/video/imx/ipu_disp.c
index 5c7722962d..c2f00bff18 100644
--- a/drivers/video/imx/ipu_disp.c
+++ b/drivers/video/imx/ipu_disp.c
@@ -13,6 +13,8 @@
 /* #define DEBUG */
 
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/errno.h>
 #include <asm/io.h>
diff --git a/drivers/video/imx/mxc_ipuv3_fb.c b/drivers/video/imx/mxc_ipuv3_fb.c
index c64be38e49..4044473f99 100644
--- a/drivers/video/imx/mxc_ipuv3_fb.c
+++ b/drivers/video/imx/mxc_ipuv3_fb.c
@@ -11,6 +11,9 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <part.h>
+#include <asm/cache.h>
 #include <linux/errno.h>
 #include <asm/global_data.h>
 #include <linux/string.h>
diff --git a/drivers/video/ivybridge_igd.c b/drivers/video/ivybridge_igd.c
index 6b986e9358..4c57e311d1 100644
--- a/drivers/video/ivybridge_igd.c
+++ b/drivers/video/ivybridge_igd.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <pci_rom.h>
 #include <vbe.h>
 #include <asm/intel_regs.h>
@@ -16,6 +17,7 @@
 #include <asm/pci.h>
 #include <asm/arch/pch.h>
 #include <asm/arch/sandybridge.h>
+#include <linux/delay.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/drivers/video/ld9040.c b/drivers/video/ld9040.c
index 93aea05ff8..a36bc2f06c 100644
--- a/drivers/video/ld9040.c
+++ b/drivers/video/ld9040.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 static const unsigned char SEQ_USER_SETTING[] = {
 	0xF0, 0x5A, 0x5A
diff --git a/drivers/video/lg4573.c b/drivers/video/lg4573.c
index 997e854ef8..45df9c1347 100644
--- a/drivers/video/lg4573.c
+++ b/drivers/video/lg4573.c
@@ -6,13 +6,16 @@
  */
 #include <common.h>
 #include <backlight.h>
+#include <command.h>
 #include <display.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/read.h>
 #include <dm/uclass-internal.h>
 #include <errno.h>
 #include <spi.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 #define PWR_ON_DELAY_MSECS  120
 
@@ -208,8 +211,8 @@ static int lg4573_spi_startup(struct spi_slave *slave)
 	return 0;
 }
 
-static int do_lgset(cmd_tbl_t *cmdtp, int flag, int argc,
-		       char * const argv[])
+static int do_lgset(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[])
 {
 	struct spi_slave *slave;
 	struct udevice *dev;
diff --git a/drivers/video/logicore_dp_tx.c b/drivers/video/logicore_dp_tx.c
index 84fafe4341..9bc4bbb85d 100644
--- a/drivers/video/logicore_dp_tx.c
+++ b/drivers/video/logicore_dp_tx.c
@@ -14,6 +14,7 @@
 #include <display.h>
 #include <dm.h>
 #include <errno.h>
+#include <linux/delay.h>
 
 #include "axi.h"
 #include "logicore_dp_dpcd.h"
diff --git a/drivers/video/mali_dp.c b/drivers/video/mali_dp.c
index 87a75a9ca2..1e6da0e1e2 100644
--- a/drivers/video/mali_dp.c
+++ b/drivers/video/mali_dp.c
@@ -18,6 +18,7 @@
 #include <fdt_support.h>
 #include <clk.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/sizes.h>
 
 #define MALIDP_CORE_ID		0x0018
diff --git a/drivers/video/mb862xx.c b/drivers/video/mb862xx.c
index 301c1f0df1..04e435f913 100644
--- a/drivers/video/mb862xx.c
+++ b/drivers/video/mb862xx.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <linux/delay.h>
 
 #include <asm/io.h>
 #include <env.h>
@@ -79,7 +80,7 @@ static void gdc_sw_reset (void)
 	GraphicDevice *dev = &mb862xx;
 
 	HOST_WR_REG (GC_SRST, 0x1);
-	udelay (500);
+	udelay(500);
 	video_hw_init ();
 }
 
@@ -222,9 +223,9 @@ unsigned int pci_video_init (void)
 
 	/* Setup clocks and memory mode for Coral-P(A) */
 	HOST_WR_REG(GC_CCF, CONFIG_SYS_MB862xx_CCF);
-	udelay (200);
+	udelay(200);
 	HOST_WR_REG(GC_MMR, CONFIG_SYS_MB862xx_MMR);
-	udelay (100);
+	udelay(100);
 	return dev->frameAdrs;
 }
 
diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c
index ae2e6288f3..7b2ff94eba 100644
--- a/drivers/video/meson/meson_dw_hdmi.c
+++ b/drivers/video/meson/meson_dw_hdmi.c
@@ -8,10 +8,12 @@
 #include <display.h>
 #include <dm.h>
 #include <edid.h>
+#include <log.h>
 #include <asm/io.h>
 #include <dw_hdmi.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
+#include <linux/bitops.h>
 #include <power/regulator.h>
 #include <clk.h>
 #include <linux/delay.h>
diff --git a/drivers/video/meson/meson_dw_hdmi.h b/drivers/video/meson/meson_dw_hdmi.h
index b13beb1f75..d507e59c06 100644
--- a/drivers/video/meson/meson_dw_hdmi.h
+++ b/drivers/video/meson/meson_dw_hdmi.h
@@ -24,6 +24,7 @@
  * Bit 0 RW sw_reset_core: connects to IP's ~irstz. 1=Apply reset;
  *     0=Release from reset. Default 1.
  */
+#include <linux/bitops.h>
 #define HDMITX_TOP_SW_RESET                     (0x000)
 
 /*
diff --git a/drivers/video/meson/meson_plane.c b/drivers/video/meson/meson_plane.c
index 8edf451f13..b367276f23 100644
--- a/drivers/video/meson/meson_plane.c
+++ b/drivers/video/meson/meson_plane.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <asm/io.h>
 #include <linux/bitfield.h>
+#include <linux/bitops.h>
 
 #include "meson_vpu.h"
 
diff --git a/drivers/video/meson/meson_registers.h b/drivers/video/meson/meson_registers.h
index 39e8ec8639..f6a5d1ac8c 100644
--- a/drivers/video/meson/meson_registers.h
+++ b/drivers/video/meson/meson_registers.h
@@ -7,6 +7,7 @@
 #define __MESON_REGISTERS_H
 
 /* Shift all registers by 2 */
+#include <linux/bitops.h>
 #define _REG(reg)	((reg) << 2)
 
 #define writel_bits(mask, val, addr) \
diff --git a/drivers/video/meson/meson_vclk.c b/drivers/video/meson/meson_vclk.c
index 01bfa4bcb8..cd1e69040f 100644
--- a/drivers/video/meson/meson_vclk.c
+++ b/drivers/video/meson/meson_vclk.c
@@ -9,7 +9,9 @@
 #include <common.h>
 #include <dm.h>
 #include <edid.h>
+#include <linux/bitops.h>
 #include "meson_vpu.h"
+#include <log.h>
 #include <linux/iopoll.h>
 #include <linux/math64.h>
 
diff --git a/drivers/video/meson/meson_venc.c b/drivers/video/meson/meson_venc.c
index 89e859b02a..e7366dd2fd 100644
--- a/drivers/video/meson/meson_venc.c
+++ b/drivers/video/meson/meson_venc.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <edid.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/io.h>
 #include "meson_vpu.h"
 
diff --git a/drivers/video/meson/meson_vpu.c b/drivers/video/meson/meson_vpu.c
index aa8c0a962f..4868839ff7 100644
--- a/drivers/video/meson/meson_vpu.c
+++ b/drivers/video/meson/meson_vpu.c
@@ -11,6 +11,8 @@
 #include <dm.h>
 #include <efi_loader.h>
 #include <fdt_support.h>
+#include <log.h>
+#include <part.h>
 #include <linux/sizes.h>
 #include <asm/arch/mem.h>
 #include <dm/device-internal.h>
@@ -195,8 +197,8 @@ void meson_vpu_rsv_fb(void *fdt)
 		return;
 
 #if defined(CONFIG_EFI_LOADER)
-	efi_add_memory_map(meson_fb.base, meson_fb.fb_size >> EFI_PAGE_SHIFT,
-			   EFI_RESERVED_MEMORY_TYPE, false);
+	efi_add_memory_map(meson_fb.base, meson_fb.fb_size,
+			   EFI_RESERVED_MEMORY_TYPE);
 #endif
 #if defined(CONFIG_VIDEO_DT_SIMPLEFB)
 	meson_vpu_setup_simplefb(fdt);
diff --git a/drivers/video/meson/meson_vpu_init.c b/drivers/video/meson/meson_vpu_init.c
index 8408c59eaa..c9808e1c63 100644
--- a/drivers/video/meson/meson_vpu_init.c
+++ b/drivers/video/meson/meson_vpu_init.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <dm.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #include "meson_vpu.h"
 
diff --git a/drivers/video/mvebu_lcd.c b/drivers/video/mvebu_lcd.c
index 3ff5b28ae2..f3cb2bfb48 100644
--- a/drivers/video/mvebu_lcd.c
+++ b/drivers/video/mvebu_lcd.c
@@ -7,8 +7,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <part.h>
 #include <video.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/mbus.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index a984443ef9..9b42ca8d03 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -7,8 +7,10 @@
  */
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <video_fb.h>
+#include <linux/delay.h>
 
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index 8a5a61c9fb..6589a2a09d 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -8,7 +8,10 @@
 #include <clk.h>
 #include <dm.h>
 #include <env.h>
+#include <log.h>
+#include <asm/cache.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <malloc.h>
 #include <video.h>
@@ -77,6 +80,12 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr,
 		dev_err(dev, "Failed to set mxs clk: %d\n", ret);
 		return;
 	}
+
+	ret = clk_enable(&per_clk);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable mxs clk: %d\n", ret);
+		return;
+	}
 #else
 	/* Kick in the LCDIF clock */
 	mxs_set_lcdclk(MXS_LCDIF_BASE, timings->pixelclock.typ / 1000);
diff --git a/drivers/video/orisetech_otm8009a.c b/drivers/video/orisetech_otm8009a.c
index 650ed07239..b1f2dd403e 100644
--- a/drivers/video/orisetech_otm8009a.c
+++ b/drivers/video/orisetech_otm8009a.c
@@ -14,6 +14,7 @@
 #include <panel.h>
 #include <asm/gpio.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 #define OTM8009A_BACKLIGHT_DEFAULT	240
diff --git a/drivers/video/pwm_backlight.c b/drivers/video/pwm_backlight.c
index 742579aba7..468a5703bd 100644
--- a/drivers/video/pwm_backlight.c
+++ b/drivers/video/pwm_backlight.c
@@ -9,9 +9,11 @@
 #include <common.h>
 #include <dm.h>
 #include <backlight.h>
+#include <log.h>
 #include <malloc.h>
 #include <pwm.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 /**
diff --git a/drivers/video/pxa_lcd.c b/drivers/video/pxa_lcd.c
index 92d6e3d467..67f5266164 100644
--- a/drivers/video/pxa_lcd.c
+++ b/drivers/video/pxa_lcd.c
@@ -11,6 +11,7 @@
 /************************************************************************/
 
 #include <common.h>
+#include <log.h>
 #include <asm/arch/pxa-regs.h>
 #include <asm/io.h>
 #include <lcd.h>
diff --git a/drivers/video/raydium-rm68200.c b/drivers/video/raydium-rm68200.c
index 853dbc52d6..9169280fb8 100644
--- a/drivers/video/raydium-rm68200.c
+++ b/drivers/video/raydium-rm68200.c
@@ -14,6 +14,7 @@
 #include <panel.h>
 #include <asm/gpio.h>
 #include <dm/device_compat.h>
+#include <linux/delay.h>
 #include <power/regulator.h>
 
 /*** Manufacturer Command Set ***/
diff --git a/drivers/video/rockchip/rk3288_hdmi.c b/drivers/video/rockchip/rk3288_hdmi.c
index 51eb41540b..f835f4d517 100644
--- a/drivers/video/rockchip/rk3288_hdmi.c
+++ b/drivers/video/rockchip/rk3288_hdmi.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <dw_hdmi.h>
 #include <edid.h>
+#include <log.h>
 #include <malloc.h>
 #include <regmap.h>
 #include <syscon.h>
diff --git a/drivers/video/rockchip/rk3288_mipi.c b/drivers/video/rockchip/rk3288_mipi.c
index f4444b9c34..b232ff0b76 100644
--- a/drivers/video/rockchip/rk3288_mipi.c
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -8,7 +8,7 @@
 #include <clk.h>
 #include <display.h>
 #include <dm.h>
-#include <fdtdec.h>
+#include <log.h>
 #include <panel.h>
 #include <regmap.h>
 #include "rk_mipi.h"
diff --git a/drivers/video/rockchip/rk3288_vop.c b/drivers/video/rockchip/rk3288_vop.c
index 0f91dab1f2..25ef25b870 100644
--- a/drivers/video/rockchip/rk3288_vop.c
+++ b/drivers/video/rockchip/rk3288_vop.c
@@ -15,6 +15,7 @@
 #include <asm/arch-rockchip/clock.h>
 #include <asm/arch-rockchip/grf_rk3288.h>
 #include <asm/arch-rockchip/hardware.h>
+#include <linux/delay.h>
 #include "rk_vop.h"
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/video/rockchip/rk3399_mipi.c b/drivers/video/rockchip/rk3399_mipi.c
index 74ebe770a9..113708d97e 100644
--- a/drivers/video/rockchip/rk3399_mipi.c
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -8,7 +8,7 @@
 #include <clk.h>
 #include <display.h>
 #include <dm.h>
-#include <fdtdec.h>
+#include <log.h>
 #include <panel.h>
 #include <regmap.h>
 #include "rk_mipi.h"
diff --git a/drivers/video/rockchip/rk3399_vop.c b/drivers/video/rockchip/rk3399_vop.c
index 1d5b3931a6..d5a7aa8ac1 100644
--- a/drivers/video/rockchip/rk3399_vop.c
+++ b/drivers/video/rockchip/rk3399_vop.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <display.h>
 #include <dm.h>
+#include <log.h>
 #include <regmap.h>
 #include <video.h>
 #include <asm/arch-rockchip/hardware.h>
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index cf84b886e7..92188be927 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -9,6 +9,7 @@
 #include <display.h>
 #include <dm.h>
 #include <edid.h>
+#include <log.h>
 #include <malloc.h>
 #include <panel.h>
 #include <regmap.h>
@@ -20,6 +21,7 @@
 #include <asm/arch-rockchip/grf_rk3288.h>
 #include <asm/arch-rockchip/hardware.h>
 #include <dt-bindings/clock/rk3288-cru.h>
+#include <linux/delay.h>
 
 #define MAX_CR_LOOP 5
 #define MAX_EQ_LOOP 5
@@ -997,7 +999,7 @@ static int rk_edp_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_edp_priv *priv = dev_get_priv(dev);
 
-	priv->regs = (struct rk3288_edp *)devfdt_get_addr(dev);
+	priv->regs = dev_read_addr_ptr(dev);
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
 	return 0;
diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index 5b44a7e8c9..f27cdf8ed4 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <dw_hdmi.h>
 #include <edid.h>
+#include <log.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <asm/gpio.h>
diff --git a/drivers/video/rockchip/rk_lvds.c b/drivers/video/rockchip/rk_lvds.c
index 79e24baf53..04f795a213 100644
--- a/drivers/video/rockchip/rk_lvds.c
+++ b/drivers/video/rockchip/rk_lvds.c
@@ -7,6 +7,7 @@
 #include <display.h>
 #include <dm.h>
 #include <edid.h>
+#include <log.h>
 #include <panel.h>
 #include <regmap.h>
 #include <syscon.h>
@@ -161,8 +162,7 @@ int rk_lvds_enable(struct udevice *dev, int panel_bpp,
 
 int rk_lvds_read_timing(struct udevice *dev, struct display_timing *timing)
 {
-	if (fdtdec_decode_display_timing
-	    (gd->fdt_blob, dev_of_offset(dev), 0, timing)) {
+	if (ofnode_decode_display_timing(dev_ofnode(dev), 0, timing)) {
 		debug("%s: Failed to decode display timing\n", __func__);
 		return -EINVAL;
 	}
@@ -173,13 +173,11 @@ int rk_lvds_read_timing(struct udevice *dev, struct display_timing *timing)
 static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
 {
 	struct rk_lvds_priv *priv = dev_get_priv(dev);
-	const void *blob = gd->fdt_blob;
-	int node = dev_of_offset(dev);
 	int ret;
-	priv->regs = (void *)devfdt_get_addr(dev);
+	priv->regs = dev_read_addr_ptr(dev);
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
-	ret = fdtdec_get_int(blob, node, "rockchip,output", -1);
+	ret = dev_read_s32_default(dev, "rockchip,output", -1);
 	if (ret != -1) {
 		priv->output = ret;
 		debug("LVDS output : %d\n", ret);
@@ -188,7 +186,7 @@ static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
 		priv->output = LVDS_OUTPUT_RGB;
 	}
 
-	ret = fdtdec_get_int(blob, node, "rockchip,data-mapping", -1);
+	ret = dev_read_s32_default(dev, "rockchip,data-mapping", -1);
 	if (ret != -1) {
 		priv->format = ret;
 		debug("LVDS data-mapping : %d\n", ret);
@@ -197,7 +195,7 @@ static int rk_lvds_ofdata_to_platdata(struct udevice *dev)
 		priv->format = LVDS_FORMAT_JEIDA;
 	}
 
-	ret = fdtdec_get_int(blob, node, "rockchip,data-width", -1);
+	ret = dev_read_s32_default(dev, "rockchip,data-width", -1);
 	if (ret != -1) {
 		debug("LVDS data-width : %d\n", ret);
 		if (ret == 24) {
diff --git a/drivers/video/rockchip/rk_mipi.c b/drivers/video/rockchip/rk_mipi.c
index f9280e8607..f811913ce5 100644
--- a/drivers/video/rockchip/rk_mipi.c
+++ b/drivers/video/rockchip/rk_mipi.c
@@ -8,7 +8,7 @@
 #include <clk.h>
 #include <display.h>
 #include <dm.h>
-#include <fdtdec.h>
+#include <log.h>
 #include <panel.h>
 #include <regmap.h>
 #include "rk_mipi.h"
@@ -29,8 +29,7 @@ int rk_mipi_read_timing(struct udevice *dev,
 {
 	int ret;
 
-	ret = fdtdec_decode_display_timing(gd->fdt_blob, dev_of_offset(dev),
-					 0, timing);
+	ret = ofnode_decode_display_timing(dev_ofnode(dev), 0, timing);
 	if (ret) {
 		debug("%s: Failed to decode display timing (ret=%d)\n",
 		      __func__, ret);
@@ -77,7 +76,7 @@ static void rk_mipi_dsi_write(uintptr_t regs, u32 reg, u32 val)
 int rk_mipi_dsi_enable(struct udevice *dev,
 		       const struct display_timing *timing)
 {
-	int node, timing_node;
+	ofnode node, timing_node;
 	int val;
 	struct rk_mipi_priv *priv = dev_get_priv(dev);
 	uintptr_t regs = priv->regs;
@@ -120,10 +119,10 @@ int rk_mipi_dsi_enable(struct udevice *dev,
 	rk_mipi_dsi_write(regs, VID_PKT_SIZE, 0x4b0);
 
 	/* Set dpi color coding depth 24 bit */
-	timing_node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(dev),
-									 "display-timings");
-	node = fdt_first_subnode(gd->fdt_blob, timing_node);
-	val = fdtdec_get_int(gd->fdt_blob, node, "bits-per-pixel", -1);
+	timing_node = ofnode_find_subnode(dev->node, "display-timings");
+	node = ofnode_first_subnode(timing_node);
+
+	val = ofnode_read_u32_default(node, "bits-per-pixel", -1);
 	switch (val) {
 	case 16:
 		rk_mipi_dsi_write(regs, DPI_COLOR_CODING, DPI_16BIT_CFG_1);
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index e1bd656bee..9032eb430e 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -9,6 +9,7 @@
 #include <display.h>
 #include <dm.h>
 #include <edid.h>
+#include <log.h>
 #include <regmap.h>
 #include <syscon.h>
 #include <video.h>
@@ -19,6 +20,7 @@
 #include <asm/arch-rockchip/vop_rk3288.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
+#include <linux/bitops.h>
 #include <linux/err.h>
 #include <power/regulator.h>
 #include "rk_vop.h"
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
index 9c7b5f6ab3..497258f3de 100644
--- a/drivers/video/s6e8ax0.c
+++ b/drivers/video/s6e8ax0.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <asm/arch/mipi_dsim.h>
+#include <linux/delay.h>
 
 #include "exynos/exynos_mipi_dsi_lowlevel.h"
 #include "exynos/exynos_mipi_dsi_common.h"
diff --git a/drivers/video/sandbox_sdl.c b/drivers/video/sandbox_sdl.c
index 1196e6c671..20248e6607 100644
--- a/drivers/video/sandbox_sdl.c
+++ b/drivers/video/sandbox_sdl.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <video.h>
 #include <asm/sdl.h>
 #include <asm/state.h>
diff --git a/drivers/video/scf0403_lcd.c b/drivers/video/scf0403_lcd.c
index 60075a6cf3..54f0f88b4c 100644
--- a/drivers/video/scf0403_lcd.c
+++ b/drivers/video/scf0403_lcd.c
@@ -17,6 +17,7 @@
 #include <malloc.h>
 #include <asm/gpio.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 struct scf0403_cmd {
 	u16 cmd;
diff --git a/drivers/video/simple_panel.c b/drivers/video/simple_panel.c
index 5722811117..6c624c3769 100644
--- a/drivers/video/simple_panel.c
+++ b/drivers/video/simple_panel.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <backlight.h>
 #include <dm.h>
+#include <log.h>
 #include <panel.h>
 #include <asm/gpio.h>
 #include <power/regulator.h>
diff --git a/drivers/video/simplefb.c b/drivers/video/simplefb.c
index 1679d20002..0c5b40c30b 100644
--- a/drivers/video/simplefb.c
+++ b/drivers/video/simplefb.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <video.h>
 
 static int simple_video_probe(struct udevice *dev)
diff --git a/drivers/video/ssd2828.c b/drivers/video/ssd2828.c
index 83566bc6d6..4cdcbe7755 100644
--- a/drivers/video/ssd2828.c
+++ b/drivers/video/ssd2828.c
@@ -14,6 +14,7 @@
 #include <mipi_display.h>
 #include <asm/arch/gpio.h>
 #include <asm/gpio.h>
+#include <linux/delay.h>
 
 #include "videomodes.h"
 #include "ssd2828.h"
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index ded03b109c..04796435f1 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -12,6 +12,7 @@
 #include <clk.h>
 #include <dm.h>
 #include <dsi_host.h>
+#include <log.h>
 #include <mipi_dsi.h>
 #include <panel.h>
 #include <reset.h>
@@ -22,6 +23,7 @@
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
 #include <dm/lists.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 #include <power/regulator.h>
 
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index be7e9bff01..2f3427a32e 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -9,6 +9,7 @@
 #include <clk.h>
 #include <display.h>
 #include <dm.h>
+#include <log.h>
 #include <panel.h>
 #include <reset.h>
 #include <video.h>
@@ -17,6 +18,7 @@
 #include <asm/arch/gpio.h>
 #include <dm/device-internal.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
 
 struct stm32_ltdc_priv {
 	void __iomem *regs;
diff --git a/drivers/video/sunxi/lcdc.c b/drivers/video/sunxi/lcdc.c
index 4cf3a0eb75..73033c3b85 100644
--- a/drivers/video/sunxi/lcdc.c
+++ b/drivers/video/sunxi/lcdc.c
@@ -8,6 +8,8 @@
  */
 
 #include <common.h>
+#include <log.h>
+#include <linux/delay.h>
 
 #include <asm/arch/clock.h>
 #include <asm/arch/lcdc.h>
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index 8333ddc44c..b657e163f0 100644
--- a/drivers/video/sunxi/sunxi_de2.c
+++ b/drivers/video/sunxi/sunxi_de2.c
@@ -12,6 +12,8 @@
 #include <efi_loader.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
+#include <log.h>
+#include <part.h>
 #include <video.h>
 #include <asm/global_data.h>
 #include <asm/io.h>
@@ -19,6 +21,7 @@
 #include <asm/arch/display2.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
+#include <linux/bitops.h>
 #include "simplefb_common.h"
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -224,9 +227,9 @@ static int sunxi_de2_init(struct udevice *dev, ulong fbbase,
 
 #ifdef CONFIG_EFI_LOADER
 	efi_add_memory_map(fbbase,
-			   ALIGN(timing.hactive.typ * timing.vactive.typ *
-			   (1 << l2bpp) / 8, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
-			   EFI_RESERVED_MEMORY_TYPE, false);
+			   timing.hactive.typ * timing.vactive.typ *
+			   (1 << l2bpp) / 8,
+			   EFI_RESERVED_MEMORY_TYPE);
 #endif
 
 	return 0;
diff --git a/drivers/video/sunxi/sunxi_display.c b/drivers/video/sunxi/sunxi_display.c
index 40ee009f62..f52aba4d21 100644
--- a/drivers/video/sunxi/sunxi_display.c
+++ b/drivers/video/sunxi/sunxi_display.c
@@ -11,6 +11,7 @@
 #include <efi_loader.h>
 #include <init.h>
 #include <time.h>
+#include <linux/delay.h>
 
 #include <asm/arch/clock.h>
 #include <asm/arch/display.h>
@@ -1196,10 +1197,8 @@ void *video_hw_init(void)
 	sunxi_engines_init();
 
 #ifdef CONFIG_EFI_LOADER
-	efi_add_memory_map(gd->fb_base,
-			   ALIGN(sunxi_display.fb_size, EFI_PAGE_SIZE) >>
-			   EFI_PAGE_SHIFT,
-			   EFI_RESERVED_MEMORY_TYPE, false);
+	efi_add_memory_map(gd->fb_base, sunxi_display.fb_size,
+			   EFI_RESERVED_MEMORY_TYPE);
 #endif
 
 	fb_dma_addr = gd->fb_base - CONFIG_SYS_SDRAM_BASE;
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index c87c919a52..01d4b7a11c 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -10,10 +10,13 @@
 #include <dm.h>
 #include <dw_hdmi.h>
 #include <edid.h>
+#include <log.h>
 #include <time.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/lcdc.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 struct sunxi_dw_hdmi_priv {
 	struct dw_hdmi hdmi;
diff --git a/drivers/video/sunxi/sunxi_lcd.c b/drivers/video/sunxi/sunxi_lcd.c
index 619f5892f5..49bf083a8d 100644
--- a/drivers/video/sunxi/sunxi_lcd.c
+++ b/drivers/video/sunxi/sunxi_lcd.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <display.h>
+#include <log.h>
 #include <video_bridge.h>
 #include <backlight.h>
 #include <dm.h>
diff --git a/drivers/video/tda19988.c b/drivers/video/tda19988.c
index 01ed6193ea..191cda3ce7 100644
--- a/drivers/video/tda19988.c
+++ b/drivers/video/tda19988.c
@@ -9,6 +9,8 @@
 #include <dm.h>
 #include <display.h>
 #include <i2c.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 
 /*
  * TDA19988 uses paged registers. We encode the page# in the upper
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c
index f4bae9fc36..1208d91286 100644
--- a/drivers/video/tegra.c
+++ b/drivers/video/tegra.c
@@ -6,9 +6,12 @@
 #include <common.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <panel.h>
+#include <part.h>
 #include <pwm.h>
 #include <video.h>
+#include <asm/cache.h>
 #include <asm/system.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
diff --git a/drivers/video/tegra124/display.c b/drivers/video/tegra124/display.c
index f08f117cf8..6c27932263 100644
--- a/drivers/video/tegra124/display.c
+++ b/drivers/video/tegra124/display.c
@@ -6,12 +6,15 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <edid.h>
 #include <errno.h>
 #include <display.h>
 #include <edid.h>
 #include <lcd.h>
+#include <log.h>
+#include <part.h>
 #include <video.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -19,6 +22,7 @@
 #include <asm/arch/pwm.h>
 #include <asm/arch-tegra/dc.h>
 #include <dm/uclass-internal.h>
+#include <linux/delay.h>
 #include "displayport.h"
 
 /* return in 1000ths of a Hertz */
diff --git a/drivers/video/tegra124/dp.c b/drivers/video/tegra124/dp.c
index 73e0651fb9..59758eb936 100644
--- a/drivers/video/tegra124/dp.c
+++ b/drivers/video/tegra124/dp.c
@@ -9,9 +9,11 @@
 #include <dm.h>
 #include <div64.h>
 #include <errno.h>
+#include <log.h>
 #include <video_bridge.h>
 #include <asm/io.h>
 #include <asm/arch-tegra/dc.h>
+#include <linux/delay.h>
 #include "display.h"
 #include "edid.h"
 #include "sor.h"
diff --git a/drivers/video/tegra124/sor.c b/drivers/video/tegra124/sor.c
index 8dc3df61aa..49f33c15b5 100644
--- a/drivers/video/tegra124/sor.c
+++ b/drivers/video/tegra124/sor.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <panel.h>
 #include <syscon.h>
@@ -13,6 +14,7 @@
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch-tegra/dc.h>
+#include <linux/delay.h>
 #include "displayport.h"
 #include "sor.h"
 #include <linux/err.h>
diff --git a/drivers/video/vidconsole-uclass.c b/drivers/video/vidconsole-uclass.c
index 8e0fc7f3ec..d30e6db6f6 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -8,6 +8,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 #include <linux/ctype.h>
 #include <dm.h>
 #include <video.h>
@@ -623,7 +625,7 @@ void vidconsole_position_cursor(struct udevice *dev, unsigned col, unsigned row)
 	priv->ycur = min_t(short, row, vid_priv->ysize - 1);
 }
 
-static int do_video_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_video_setcursor(struct cmd_tbl *cmdtp, int flag, int argc,
 			      char *const argv[])
 {
 	unsigned int col, row;
@@ -641,7 +643,7 @@ static int do_video_setcursor(cmd_tbl_t *cmdtp, int flag, int argc,
 	return 0;
 }
 
-static int do_video_puts(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_video_puts(struct cmd_tbl *cmdtp, int flag, int argc,
 			 char *const argv[])
 {
 	struct udevice *dev;
diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
index 3d658e61d7..bf396d1091 100644
--- a/drivers/video/video-uclass.c
+++ b/drivers/video/video-uclass.c
@@ -6,11 +6,13 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <stdio_dev.h>
 #include <video.h>
 #include <video_console.h>
+#include <asm/cache.h>
 #include <dm/lists.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
diff --git a/drivers/video/video_bmp.c b/drivers/video/video_bmp.c
index 8768228029..eb9636541d 100644
--- a/drivers/video/video_bmp.c
+++ b/drivers/video/video_bmp.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <bmp_layout.h>
 #include <dm.h>
+#include <log.h>
 #include <mapmem.h>
 #include <splash.h>
 #include <video.h>
diff --git a/drivers/virtio/virtio-uclass.c b/drivers/virtio/virtio-uclass.c
index 23f281cd6e..2636cbedfe 100644
--- a/drivers/virtio/virtio-uclass.c
+++ b/drivers/virtio/virtio-uclass.c
@@ -17,10 +17,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <dm/lists.h>
+#include <linux/bug.h>
 
 static const char *const virtio_drv_name[VIRTIO_ID_MAX_NUM] = {
 	[VIRTIO_ID_NET]		= VIRTIO_NET_DRV_NAME,
diff --git a/drivers/virtio/virtio_blk.c b/drivers/virtio/virtio_blk.c
index e793e34e83..992118c607 100644
--- a/drivers/virtio/virtio_blk.c
+++ b/drivers/virtio/virtio_blk.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <blk.h>
 #include <dm.h>
+#include <part.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c
index 60ece133ab..b951ea3257 100644
--- a/drivers/virtio/virtio_mmio.c
+++ b/drivers/virtio/virtio_mmio.c
@@ -9,9 +9,11 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/drivers/virtio/virtio_mmio.h b/drivers/virtio/virtio_mmio.h
index b3408828a5..b446674ccc 100644
--- a/drivers/virtio/virtio_mmio.h
+++ b/drivers/virtio/virtio_mmio.h
@@ -12,6 +12,7 @@
 /* Control registers */
 
 /* Magic value ("virt" string) - Read Only */
+#include <linux/bitops.h>
 #define VIRTIO_MMIO_MAGIC_VALUE		0x000
 
 /* Virtio device version - Read Only */
diff --git a/drivers/virtio/virtio_pci_legacy.c b/drivers/virtio/virtio_pci_legacy.c
index d9be2601bb..fa7f2429f1 100644
--- a/drivers/virtio/virtio_pci_legacy.c
+++ b/drivers/virtio/virtio_pci_legacy.c
@@ -8,10 +8,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
 #include <dm/device.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/drivers/virtio/virtio_pci_modern.c b/drivers/virtio/virtio_pci_modern.c
index 4673f4ab55..2e5bbade00 100644
--- a/drivers/virtio/virtio_pci_modern.c
+++ b/drivers/virtio/virtio_pci_modern.c
@@ -8,11 +8,14 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
 #include <dm/device.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/io.h>
 #include "virtio_pci.h"
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index 45c48a927a..7f1cbc5932 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -8,10 +8,12 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 
 int virtqueue_add(struct virtqueue *vq, struct virtio_sg *sgs[],
diff --git a/drivers/virtio/virtio_rng.c b/drivers/virtio/virtio_rng.c
index 4edffa6f31..fc3e19cfae 100644
--- a/drivers/virtio/virtio_rng.c
+++ b/drivers/virtio/virtio_rng.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <rng.h>
 #include <virtio_types.h>
 #include <virtio.h>
diff --git a/drivers/virtio/virtio_sandbox.c b/drivers/virtio/virtio_sandbox.c
index 61f6a96008..2a2abb9d49 100644
--- a/drivers/virtio/virtio_sandbox.c
+++ b/drivers/virtio/virtio_sandbox.c
@@ -10,6 +10,7 @@
 #include <virtio_types.h>
 #include <virtio.h>
 #include <virtio_ring.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/drivers/w1-eeprom/w1-eeprom-uclass.c b/drivers/w1-eeprom/w1-eeprom-uclass.c
index 7b0579344c..d515b4c536 100644
--- a/drivers/w1-eeprom/w1-eeprom-uclass.c
+++ b/drivers/w1-eeprom/w1-eeprom-uclass.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <w1.h>
 #include <w1-eeprom.h>
 
diff --git a/drivers/w1/mxc_w1.c b/drivers/w1/mxc_w1.c
index 08715c6a66..5bf08653a9 100644
--- a/drivers/w1/mxc_w1.c
+++ b/drivers/w1/mxc_w1.c
@@ -21,6 +21,8 @@
 #include <common.h>
 #include <dm.h>
 #include <dm/device_compat.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
 #include <linux/io.h>
 #include <w1.h>
 
diff --git a/drivers/w1/w1-gpio.c b/drivers/w1/w1-gpio.c
index 5e5d6b3f6c..45ad47a5d6 100644
--- a/drivers/w1/w1-gpio.c
+++ b/drivers/w1/w1-gpio.c
@@ -9,7 +9,9 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <w1.h>
+#include <linux/delay.h>
 
 #include <asm/gpio.h>
 
diff --git a/drivers/w1/w1-uclass.c b/drivers/w1/w1-uclass.c
index 042b3b5ce0..9478c93e9b 100644
--- a/drivers/w1/w1-uclass.c
+++ b/drivers/w1/w1-uclass.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <w1.h>
 #include <w1-eeprom.h>
 
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 6cafd243e0..bf06180cdd 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -49,6 +49,7 @@ config ULP_WATCHDOG
 config DESIGNWARE_WATCHDOG
 	bool "Designware watchdog timer support"
 	select HW_WATCHDOG if !WDT
+	default y if WDT && ROCKCHIP_RK3399
 	help
 	  Enable this to support Designware Watchdog Timer IP, present e.g.
 	  on Altera SoCFPGA SoCs.
diff --git a/drivers/watchdog/ast_wdt.c b/drivers/watchdog/ast_wdt.c
index fe2f6be5a7..7e11465a57 100644
--- a/drivers/watchdog/ast_wdt.c
+++ b/drivers/watchdog/ast_wdt.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <wdt.h>
 #include <asm/io.h>
 #include <asm/arch/wdt.h>
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 48433cc158..18756e34df 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -14,6 +14,7 @@
  * write to this register. Inform Linux to it too
  */
 
+#include <log.h>
 #include <asm/io.h>
 #include <asm/arch/at91_wdt.h>
 #include <common.h>
diff --git a/drivers/watchdog/bcm6345_wdt.c b/drivers/watchdog/bcm6345_wdt.c
index 9f14e7d777..ee77f49a94 100644
--- a/drivers/watchdog/bcm6345_wdt.c
+++ b/drivers/watchdog/bcm6345_wdt.c
@@ -9,6 +9,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <wdt.h>
 #include <clk.h>
 #include <asm/io.h>
diff --git a/drivers/watchdog/cdns_wdt.c b/drivers/watchdog/cdns_wdt.c
index 5bf02605a8..2abd5524f6 100644
--- a/drivers/watchdog/cdns_wdt.c
+++ b/drivers/watchdog/cdns_wdt.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <wdt.h>
 #include <clk.h>
 #include <div64.h>
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c
index 1024a04596..12f09a7a39 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -10,6 +10,7 @@
 #include <wdt.h>
 #include <asm/io.h>
 #include <asm/utils.h>
+#include <linux/bitops.h>
 
 #define DW_WDT_CR	0x00
 #define DW_WDT_TORR	0x04
diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c
index 076d801f5d..6aed41642d 100644
--- a/drivers/watchdog/ftwdt010_wdt.c
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -14,6 +14,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <watchdog.h>
 #include <asm/io.h>
 #include <faraday/ftwdt010_wdt.h>
diff --git a/drivers/watchdog/mt7621_wdt.c b/drivers/watchdog/mt7621_wdt.c
index 38866141e4..1cd8866ef8 100644
--- a/drivers/watchdog/mt7621_wdt.c
+++ b/drivers/watchdog/mt7621_wdt.c
@@ -12,6 +12,7 @@
 #include <common.h>
 #include <dm.h>
 #include <wdt.h>
+#include <linux/bitops.h>
 #include <linux/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index 669a32320d..a636cff354 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -11,6 +11,7 @@
 #include <hang.h>
 #include <wdt.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 #define MTK_WDT_MODE			0x00
 #define MTK_WDT_LENGTH			0x04
@@ -143,6 +144,7 @@ static const struct wdt_ops mtk_wdt_ops = {
 
 static const struct udevice_id mtk_wdt_ids[] = {
 	{ .compatible = "mediatek,wdt"},
+	{ .compatible = "mediatek,mt6589-wdt"},
 	{}
 };
 
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 5199d914ed..ed8b2199c2 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -37,6 +37,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <watchdog.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
diff --git a/drivers/watchdog/orion_wdt.c b/drivers/watchdog/orion_wdt.c
index 885821d562..d33e2ac3dc 100644
--- a/drivers/watchdog/orion_wdt.c
+++ b/drivers/watchdog/orion_wdt.c
@@ -15,7 +15,9 @@
 #include <common.h>
 #include <dm.h>
 #include <clk.h>
+#include <log.h>
 #include <wdt.h>
+#include <linux/bitops.h>
 #include <linux/kernel.h>
 #include <asm/io.h>
 #include <asm/arch/cpu.h>
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index 65fd2384f1..23fef2147f 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -5,6 +5,7 @@
  * Copyright 2019 NXP
  */
 
+#include <log.h>
 #include <asm/io.h>
 #include <common.h>
 #include <clk.h>
diff --git a/drivers/watchdog/stm32mp_wdt.c b/drivers/watchdog/stm32mp_wdt.c
index 8093d0a9f4..2d8bfc09a0 100644
--- a/drivers/watchdog/stm32mp_wdt.c
+++ b/drivers/watchdog/stm32mp_wdt.c
@@ -6,9 +6,11 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <wdt.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 #include <linux/iopoll.h>
 
 /* IWDG registers */
diff --git a/drivers/watchdog/tangier_wdt.c b/drivers/watchdog/tangier_wdt.c
index ba265cf223..358a9b90fd 100644
--- a/drivers/watchdog/tangier_wdt.c
+++ b/drivers/watchdog/tangier_wdt.c
@@ -4,6 +4,7 @@
  */
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <wdt.h>
 #include <div64.h>
 #include <asm/scu.h>
diff --git a/drivers/watchdog/wdt-uclass.c b/drivers/watchdog/wdt-uclass.c
index 4cdb7bd64c..e632f077f3 100644
--- a/drivers/watchdog/wdt-uclass.c
+++ b/drivers/watchdog/wdt-uclass.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <hang.h>
+#include <log.h>
 #include <time.h>
 #include <wdt.h>
 #include <dm/device-internal.h>
diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c
index 5580764da7..ea4311c8ce 100644
--- a/drivers/watchdog/xilinx_tb_wdt.c
+++ b/drivers/watchdog/xilinx_tb_wdt.c
@@ -10,6 +10,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <wdt.h>
 #include <linux/err.h>
 #include <linux/io.h>
diff --git a/env/Kconfig b/env/Kconfig
index af63ac52f7..ca7fef682b 100644
--- a/env/Kconfig
+++ b/env/Kconfig
@@ -592,6 +592,25 @@ config ENV_VARS_UBOOT_RUNTIME_CONFIG
 	  run-time determined information about the hardware to the
 	  environment.  These will be named board_name, board_rev.
 
+config DELAY_ENVIRONMENT
+	bool "Delay environment loading"
+	depends on !OF_CONTROL
+	help
+	  Enable this to inhibit loading the environment during board
+	  initialization. This can address the security risk of untrusted data
+	  being used during boot. Normally the environment is loaded when the
+	  board is initialised so that it is available to U-Boot. This inhibits
+	  that so that the environment is not available until explicitly loaded
+	  later by U-Boot code. With CONFIG_OF_CONTROL this is instead
+	  controlled by the value of /config/load-environment.
+
+config ENV_ACCESS_IGNORE_FORCE
+	bool "Block forced environment operations"
+	default n
+	help
+	  If defined, don't allow the -f switch to env set override variable
+	  access flags.
+
 if SPL_ENV_SUPPORT
 config SPL_ENV_IS_NOWHERE
 	bool "SPL Environment is not stored"
diff --git a/env/common.c b/env/common.c
index 1fd1bd01d3..088b2aebb4 100644
--- a/env/common.c
+++ b/env/common.c
@@ -8,9 +8,11 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
 #include <env_internal.h>
+#include <log.h>
 #include <sort.h>
 #include <linux/stddef.h>
 #include <search.h>
diff --git a/env/env.c b/env/env.c
index 9237bb9c74..dcc25c030b 100644
--- a/env/env.c
+++ b/env/env.c
@@ -7,6 +7,9 @@
 #include <common.h>
 #include <env.h>
 #include <env_internal.h>
+#include <log.h>
+#include <linux/bitops.h>
+#include <linux/bug.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/env/ext4.c b/env/ext4.c
index 911e19c6d3..8e90bb71b7 100644
--- a/env/ext4.c
+++ b/env/ext4.c
@@ -19,6 +19,7 @@
  */
 
 #include <common.h>
+#include <part.h>
 
 #include <command.h>
 #include <env.h>
@@ -45,7 +46,7 @@ static int env_ext4_save(void)
 {
 	env_t	env_new;
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 	int dev, part;
 	int err;
 	const char *ifname = env_ext4_get_intf();
@@ -87,7 +88,7 @@ static int env_ext4_load(void)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 	int dev, part;
 	int err;
 	loff_t off;
diff --git a/env/fat.c b/env/fat.c
index cf2e5e2b26..35a1955e63 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -7,17 +7,18 @@
  */
 
 #include <common.h>
-
 #include <command.h>
 #include <env.h>
 #include <env_internal.h>
-#include <linux/stddef.h>
+#include <part.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <search.h>
 #include <errno.h>
 #include <fat.h>
 #include <mmc.h>
+#include <asm/cache.h>
+#include <linux/stddef.h>
 
 #ifdef CONFIG_SPL_BUILD
 /* TODO(sjg@chromium.org): Figure out why this is needed */
@@ -32,7 +33,7 @@ static int env_fat_save(void)
 {
 	env_t __aligned(ARCH_DMA_MINALIGN) env_new;
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 	int dev, part;
 	int err;
 	loff_t size;
@@ -78,7 +79,7 @@ static int env_fat_load(void)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(char, buf, CONFIG_ENV_SIZE);
 	struct blk_desc *dev_desc = NULL;
-	disk_partition_t info;
+	struct disk_partition info;
 	int dev, part;
 	int err;
 
diff --git a/env/flash.c b/env/flash.c
index e05f7ef74b..3198147c38 100644
--- a/env/flash.c
+++ b/env/flash.c
@@ -14,6 +14,7 @@
 #include <env.h>
 #include <env_internal.h>
 #include <flash.h>
+#include <log.h>
 #include <linux/stddef.h>
 #include <malloc.h>
 #include <search.h>
diff --git a/env/mmc.c b/env/mmc.c
index 251ad07d7c..a8b661db80 100644
--- a/env/mmc.c
+++ b/env/mmc.c
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 static inline int mmc_offset_try_partition(const char *str, s64 *val)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 	struct blk_desc *desc;
 	int len, i, ret;
 
diff --git a/env/sf.c b/env/sf.c
index 22b70ad319..02ed846fc7 100644
--- a/env/sf.c
+++ b/env/sf.c
@@ -12,11 +12,14 @@
 #include <dm.h>
 #include <env.h>
 #include <env_internal.h>
+#include <flash.h>
 #include <malloc.h>
 #include <spi.h>
 #include <spi_flash.h>
 #include <search.h>
 #include <errno.h>
+#include <uuid.h>
+#include <asm/cache.h>
 #include <dm/device-internal.h>
 #include <u-boot/crc.h>
 
@@ -50,15 +53,14 @@ static int setup_flash_device(void)
 
 	env_flash = dev_get_uclass_priv(new);
 #else
+	if (env_flash)
+		spi_flash_free(env_flash);
 
+	env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
+				    CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
 	if (!env_flash) {
-		env_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS,
-			CONFIG_ENV_SPI_CS,
-			CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
-		if (!env_flash) {
-			env_set_default("spi_flash_probe() failed", 0);
-			return -EIO;
-		}
+		env_set_default("spi_flash_probe() failed", 0);
+		return -EIO;
 	}
 #endif
 	return 0;
@@ -305,7 +307,7 @@ U_BOOT_ENV_LOCATION(sf) = {
 	.location	= ENVL_SPI_FLASH,
 	ENV_NAME("SPI Flash")
 	.load		= env_sf_load,
-	.save		= ENV_SAVE_PTR(env_sf_save),
+	.save		= CONFIG_IS_ENABLED(SAVEENV) ? ENV_SAVE_PTR(env_sf_save) : NULL,
 #if defined(INITENV) && (CONFIG_ENV_ADDR != 0x0)
 	.init		= env_sf_init,
 #endif
diff --git a/examples/api/demo.c b/examples/api/demo.c
index e7523786b4..d586174ce8 100644
--- a/examples/api/demo.c
+++ b/examples/api/demo.c
@@ -24,7 +24,7 @@ void	test_dump_sig(struct api_signature *);
 
 static char buf[BUF_SZ];
 
-int main(int argc, char * const argv[])
+int main(int argc, char *const argv[])
 {
 	int rv = 0, h, i, j, devs_no;
 	struct api_signature *sig = NULL;
diff --git a/examples/api/libgenwrap.c b/examples/api/libgenwrap.c
index 769dcc7038..3aa222866f 100644
--- a/examples/api/libgenwrap.c
+++ b/examples/api/libgenwrap.c
@@ -10,7 +10,9 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <hang.h>
+#include <linux/delay.h>
 #include <linux/types.h>
 #include <api_public.h>
 
@@ -31,7 +33,7 @@ void __udelay(unsigned long usec)
 	ub_udelay(usec);
 }
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	ub_reset();
 	return 0;
diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile
index 779e2528b7..4a34813804 100644
--- a/examples/standalone/Makefile
+++ b/examples/standalone/Makefile
@@ -5,10 +5,13 @@
 
 extra-y        := hello_world
 extra-$(CONFIG_SMC91111)           += smc91111_eeprom
-extra-$(CONFIG_SMC911X)            += smc911x_eeprom
 extra-$(CONFIG_SPI_FLASH_ATMEL)    += atmel_df_pow2
 extra-$(CONFIG_PPC)                += sched
 
+ifndef CONFIG_DM_ETH
+extra-$(CONFIG_SMC911X)            += smc911x_eeprom
+endif
+
 #
 # Some versions of make do not handle trailing white spaces properly;
 # leading to build failures. The problem was found with GNU Make 3.80.
diff --git a/examples/standalone/atmel_df_pow2.c b/examples/standalone/atmel_df_pow2.c
index b7bd243730..9c74f4994b 100644
--- a/examples/standalone/atmel_df_pow2.c
+++ b/examples/standalone/atmel_df_pow2.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <exports.h>
 #include <spi.h>
+#include <linux/delay.h>
 
 #define CMD_ID    0x9f
 #define CMD_STAT  0xd7
@@ -115,7 +116,7 @@ static char *getline(void)
 	}
 }
 
-int atmel_df_pow2(int argc, char * const argv[])
+int atmel_df_pow2(int argc, char *const argv[])
 {
 	/* Print the ABI version */
 	app_startup(argv);
diff --git a/examples/standalone/hello_world.c b/examples/standalone/hello_world.c
index 1f61bb4777..263cd9ca07 100644
--- a/examples/standalone/hello_world.c
+++ b/examples/standalone/hello_world.c
@@ -7,7 +7,7 @@
 #include <common.h>
 #include <exports.h>
 
-int hello_world (int argc, char * const argv[])
+int hello_world(int argc, char *const argv[])
 {
 	int i;
 
diff --git a/examples/standalone/smc91111_eeprom.c b/examples/standalone/smc91111_eeprom.c
index 5ffefc8f36..bf7e930643 100644
--- a/examples/standalone/smc91111_eeprom.c
+++ b/examples/standalone/smc91111_eeprom.c
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <exports.h>
+#include <linux/delay.h>
 #include "../drivers/net/smc91111.h"
 
 #ifndef SMC91111_EEPROM_INIT
@@ -31,7 +32,7 @@ void print_MAC (struct eth_device *dev);
 int read_eeprom_reg (struct eth_device *dev, int reg);
 void print_macaddr (struct eth_device *dev);
 
-int smc91111_eeprom (int argc, char * const argv[])
+int smc91111_eeprom(int argc, char *const argv[])
 {
 	int c, i, j, done, line, reg, value, start, what;
 	char input[50];
@@ -237,7 +238,7 @@ void copy_from_eeprom (struct eth_device *dev)
 		CTL_RELOAD, CTL_REG);
 	i = 100;
 	while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --i)
-		udelay (100);
+		udelay(100);
 	if (i == 0) {
 		printf ("Timeout Refreshing EEPROM registers\n");
 	} else {
@@ -318,7 +319,7 @@ int read_eeprom_reg (struct eth_device *dev, int reg)
 		CTL_RELOAD, CTL_REG);
 	timeout = 100;
 	while ((SMC_inw (dev, CTL_REG) & CTL_RELOAD) && --timeout)
-		udelay (100);
+		udelay(100);
 	if (timeout == 0) {
 		printf ("Timeout Reading EEPROM register %02x\n", reg);
 		return 0;
@@ -341,7 +342,7 @@ int write_eeprom_reg (struct eth_device *dev, int value, int reg)
 		CTL_STORE, CTL_REG);
 	timeout = 100;
 	while ((SMC_inw (dev, CTL_REG) & CTL_STORE) && --timeout)
-		udelay (100);
+		udelay(100);
 	if (timeout == 0) {
 		printf ("Timeout Writing EEPROM register %02x\n", reg);
 		return 0;
diff --git a/examples/standalone/smc911x_eeprom.c b/examples/standalone/smc911x_eeprom.c
index 2c05ed902d..9bd9a6efa3 100644
--- a/examples/standalone/smc911x_eeprom.c
+++ b/examples/standalone/smc911x_eeprom.c
@@ -17,9 +17,160 @@
 #include <common.h>
 #include <console.h>
 #include <exports.h>
+#include <net.h>
 #include <linux/ctype.h>
+#include <linux/types.h>
 #include "../drivers/net/smc911x.h"
 
+#define DRIVERNAME "smc911x"
+
+#if defined (CONFIG_SMC911X_32_BIT) && \
+	defined (CONFIG_SMC911X_16_BIT)
+#error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
+	CONFIG_SMC911X_16_BIT shall be set"
+#endif
+
+struct chip_id {
+	u16 id;
+	char *name;
+};
+
+static const struct chip_id chip_ids[] =  {
+	{ CHIP_89218, "LAN89218" },
+	{ CHIP_9115, "LAN9115" },
+	{ CHIP_9116, "LAN9116" },
+	{ CHIP_9117, "LAN9117" },
+	{ CHIP_9118, "LAN9118" },
+	{ CHIP_9211, "LAN9211" },
+	{ CHIP_9215, "LAN9215" },
+	{ CHIP_9216, "LAN9216" },
+	{ CHIP_9217, "LAN9217" },
+	{ CHIP_9218, "LAN9218" },
+	{ CHIP_9220, "LAN9220" },
+	{ CHIP_9221, "LAN9221" },
+	{ 0, NULL },
+};
+
+#if defined (CONFIG_SMC911X_32_BIT)
+static u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
+{
+	return *(volatile u32*)(dev->iobase + offset);
+}
+
+static void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
+{
+	*(volatile u32*)(dev->iobase + offset) = val;
+}
+#elif defined (CONFIG_SMC911X_16_BIT)
+static u32 smc911x_reg_read(struct eth_device *dev, u32 offset)
+{
+	volatile u16 *addr_16 = (u16 *)(dev->iobase + offset);
+	return (*addr_16 & 0x0000ffff) | (*(addr_16 + 1) << 16);
+}
+static void smc911x_reg_write(struct eth_device *dev, u32 offset, u32 val)
+{
+	*(volatile u16 *)(dev->iobase + offset) = (u16)val;
+	*(volatile u16 *)(dev->iobase + offset + 2) = (u16)(val >> 16);
+}
+#else
+#error "SMC911X: undefined bus width"
+#endif /* CONFIG_SMC911X_16_BIT */
+
+static u32 smc911x_get_mac_csr(struct eth_device *dev, u8 reg)
+{
+	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+	smc911x_reg_write(dev, MAC_CSR_CMD,
+			MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
+	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+
+	return smc911x_reg_read(dev, MAC_CSR_DATA);
+}
+
+static void smc911x_set_mac_csr(struct eth_device *dev, u8 reg, u32 data)
+{
+	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+	smc911x_reg_write(dev, MAC_CSR_DATA, data);
+	smc911x_reg_write(dev, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
+	while (smc911x_reg_read(dev, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
+		;
+}
+
+static int smc911x_detect_chip(struct eth_device *dev)
+{
+	unsigned long val, i;
+
+	val = smc911x_reg_read(dev, BYTE_TEST);
+	if (val == 0xffffffff) {
+		/* Special case -- no chip present */
+		return -1;
+	} else if (val != 0x87654321) {
+		printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
+		return -1;
+	}
+
+	val = smc911x_reg_read(dev, ID_REV) >> 16;
+	for (i = 0; chip_ids[i].id != 0; i++) {
+		if (chip_ids[i].id == val) break;
+	}
+	if (!chip_ids[i].id) {
+		printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
+		return -1;
+	}
+
+	dev->priv = (void *)&chip_ids[i];
+
+	return 0;
+}
+
+static void smc911x_reset(struct eth_device *dev)
+{
+	int timeout;
+
+	/*
+	 *  Take out of PM setting first
+	 *  Device is already wake up if PMT_CTRL_READY bit is set
+	 */
+	if ((smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY) == 0) {
+		/* Write to the bytetest will take out of powerdown */
+		smc911x_reg_write(dev, BYTE_TEST, 0x0);
+
+		timeout = 10;
+
+		while (timeout-- &&
+			!(smc911x_reg_read(dev, PMT_CTRL) & PMT_CTRL_READY))
+			udelay(10);
+		if (timeout < 0) {
+			printf(DRIVERNAME
+				": timeout waiting for PM restore\n");
+			return;
+		}
+	}
+
+	/* Disable interrupts */
+	smc911x_reg_write(dev, INT_EN, 0);
+
+	smc911x_reg_write(dev, HW_CFG, HW_CFG_SRST);
+
+	timeout = 1000;
+	while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)
+		udelay(10);
+
+	if (timeout < 0) {
+		printf(DRIVERNAME ": reset timeout\n");
+		return;
+	}
+
+	/* Reset the FIFO level and flow control settings */
+	smc911x_set_mac_csr(dev, FLOW, FLOW_FCPT | FLOW_FCEN);
+	smc911x_reg_write(dev, AFC_CFG, 0x0050287F);
+
+	/* Set to LED outputs */
+	smc911x_reg_write(dev, GPIO_CFG, 0x70070000);
+}
+
 /**
  *	smsc_ctrlc - detect press of CTRL+C (common ctrlc() isnt exported!?)
  */
@@ -315,7 +466,7 @@ static char *getline(void)
 /**
  *	smc911x_eeprom - our application's main() function
  */
-int smc911x_eeprom(int argc, char * const argv[])
+int smc911x_eeprom(int argc, char *const argv[])
 {
 	/* Avoid initializing on stack as gcc likes to call memset() */
 	struct eth_device dev;
diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c
index 0827bde35e..5fb460454f 100644
--- a/examples/standalone/stubs.c
+++ b/examples/standalone/stubs.c
@@ -2,6 +2,8 @@
 #include <exports.h>
 #include <linux/compiler.h>
 
+struct cmd_tbl;
+
 #define FO(x) offsetof(struct jt_funcs, x)
 
 #if defined(CONFIG_X86)
diff --git a/fs/btrfs/btrfs.c b/fs/btrfs/btrfs.c
index cb7e182742..de16217d0d 100644
--- a/fs/btrfs/btrfs.c
+++ b/fs/btrfs/btrfs.c
@@ -8,6 +8,7 @@
 #include "btrfs.h"
 #include <config.h>
 #include <malloc.h>
+#include <uuid.h>
 #include <linux/time.h>
 
 struct btrfs_info btrfs_info;
@@ -74,7 +75,8 @@ static int readdir_callback(const struct btrfs_root *root,
 	return 0;
 }
 
-int btrfs_probe(struct blk_desc *fs_dev_desc, disk_partition_t *fs_partition)
+int btrfs_probe(struct blk_desc *fs_dev_desc,
+		struct disk_partition *fs_partition)
 {
 	btrfs_blk_desc = fs_dev_desc;
 	btrfs_part_info = fs_partition;
diff --git a/fs/btrfs/btrfs.h b/fs/btrfs/btrfs.h
index 986d078679..25a8cf6a87 100644
--- a/fs/btrfs/btrfs.h
+++ b/fs/btrfs/btrfs.h
@@ -36,7 +36,7 @@ static inline u64 btrfs_name_hash(const char *name, int len)
 
 /* dev.c */
 extern struct blk_desc *btrfs_blk_desc;
-extern disk_partition_t *btrfs_part_info;
+extern struct disk_partition *btrfs_part_info;
 
 int btrfs_devread(u64, int, void *);
 
diff --git a/fs/btrfs/chunk-map.c b/fs/btrfs/chunk-map.c
index 0c9a659f8f..2e5be65067 100644
--- a/fs/btrfs/chunk-map.c
+++ b/fs/btrfs/chunk-map.c
@@ -6,6 +6,7 @@
  */
 
 #include "btrfs.h"
+#include <log.h>
 #include <malloc.h>
 
 struct chunk_map_item {
diff --git a/fs/btrfs/compression.c b/fs/btrfs/compression.c
index b1884fc15e..59e4a94cb2 100644
--- a/fs/btrfs/compression.c
+++ b/fs/btrfs/compression.c
@@ -6,6 +6,7 @@
  */
 
 #include "btrfs.h"
+#include <log.h>
 #include <malloc.h>
 #include <linux/lzo.h>
 #include <linux/zstd.h>
diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c
index 7fae383f15..28f98d43ad 100644
--- a/fs/btrfs/ctree.c
+++ b/fs/btrfs/ctree.c
@@ -6,6 +6,7 @@
  */
 
 #include "btrfs.h"
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 
diff --git a/fs/btrfs/dev.c b/fs/btrfs/dev.c
index ada3800f1e..1e5b83235a 100644
--- a/fs/btrfs/dev.c
+++ b/fs/btrfs/dev.c
@@ -6,11 +6,12 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <compiler.h>
 #include <fs_internal.h>
 
 struct blk_desc *btrfs_blk_desc;
-disk_partition_t *btrfs_part_info;
+struct disk_partition *btrfs_part_info;
 
 int btrfs_devread(u64 address, int byte_len, void *buf)
 {
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c
index b693a073fc..913a4d402e 100644
--- a/fs/btrfs/super.c
+++ b/fs/btrfs/super.c
@@ -5,9 +5,12 @@
  * 2017 Marek Behun, CZ.NIC, marek.behun@nic.cz
  */
 
-#include "btrfs.h"
+#include <common.h>
+#include <log.h>
 #include <memalign.h>
+#include <part.h>
 #include <linux/compat.h>
+#include "btrfs.h"
 
 #define BTRFS_SUPER_FLAG_SUPP	(BTRFS_HEADER_FLAG_WRITTEN	\
 				 | BTRFS_HEADER_FLAG_RELOC	\
diff --git a/fs/cbfs/cbfs.c b/fs/cbfs/cbfs.c
index 1aa6f8ee84..9007aa7d15 100644
--- a/fs/cbfs/cbfs.c
+++ b/fs/cbfs/cbfs.c
@@ -5,14 +5,28 @@
 
 #include <common.h>
 #include <cbfs.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 
+/* Offset of master header from the start of a coreboot ROM */
+#define MASTER_HDR_OFFSET	0x38
+
 static const u32 good_magic = 0x4f524243;
 static const u8 good_file_magic[] = "LARCHIVE";
 
+/**
+ * struct cbfs_priv - Private data for this driver
+ *
+ * @initialised: true if this CBFS has been inited
+ * @start: Start position of CBFS in memory, typically memory-mapped SPI flash
+ * @header: Header read from the CBFS, byte-swapped so U-Boot can access it
+ * @file_cache: List of file headers read from CBFS
+ * @result: Success/error result
+ */
 struct cbfs_priv {
-	int initialized;
+	bool initialized;
+	void *start;
 	struct cbfs_header header;
 	struct cbfs_cachenode *file_cache;
 	enum cbfs_result result;
@@ -77,19 +91,19 @@ static void swap_file_header(struct cbfs_fileheader *dest,
  * @param used		A pointer to the count of of bytes scanned through,
  *			including the file if one is found.
  *
- * @return 1 if a file is found, 0 if one isn't.
+ * @return 0 if a file is found, -ENOENT if one isn't, -EBADF if a bad header
+ *	is found.
  */
-static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, u32 size,
-			       u32 align, struct cbfs_cachenode *new_node,
-			       u32 *used)
+static int file_cbfs_next_file(struct cbfs_priv *priv, void *start, int size,
+			       int align, struct cbfs_cachenode *new_node,
+			       int *used)
 {
 	struct cbfs_fileheader header;
 
 	*used = 0;
 
 	while (size >= align) {
-		const struct cbfs_fileheader *file_header =
-			(const struct cbfs_fileheader *)start;
+		const struct cbfs_fileheader *file_header = start;
 		u32 name_len;
 		u32 step;
 
@@ -105,7 +119,7 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, u32 size,
 		swap_file_header(&header, file_header);
 		if (header.offset < sizeof(struct cbfs_fileheader)) {
 			priv->result = CBFS_BAD_FILE;
-			return -1;
+			return -EBADF;
 		}
 		new_node->next = NULL;
 		new_node->type = header.type;
@@ -122,18 +136,19 @@ static int file_cbfs_next_file(struct cbfs_priv *priv, u8 *start, u32 size,
 			step = step + align - step % align;
 
 		*used += step;
-		return 1;
+		return 0;
 	}
-	return 0;
+
+	return -ENOENT;
 }
 
 /* Look through a CBFS instance and copy file metadata into regular memory. */
-static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
-				 u32 align)
+static int file_cbfs_fill_cache(struct cbfs_priv *priv, int size, int align)
 {
 	struct cbfs_cachenode *cache_node;
 	struct cbfs_cachenode *new_node;
 	struct cbfs_cachenode **cache_tail = &priv->file_cache;
+	void *start;
 
 	/* Clear out old information. */
 	cache_node = priv->file_cache;
@@ -144,21 +159,23 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
 	}
 	priv->file_cache = NULL;
 
+	start = priv->start;
 	while (size >= align) {
-		int result;
-		u32 used;
+		int used;
+		int ret;
 
 		new_node = (struct cbfs_cachenode *)
 				malloc(sizeof(struct cbfs_cachenode));
-		result = file_cbfs_next_file(priv, start, size, align, new_node,
-					     &used);
+		if (!new_node)
+			return -ENOMEM;
+		ret = file_cbfs_next_file(priv, start, size, align, new_node,
+					  &used);
 
-		if (result < 0) {
+		if (ret < 0) {
 			free(new_node);
-			return;
-		} else if (result == 0) {
-			free(new_node);
-			break;
+			if (ret == -ENOENT)
+				break;
+			return ret;
 		}
 		*cache_tail = new_node;
 		cache_tail = &new_node->next;
@@ -167,85 +184,117 @@ static void file_cbfs_fill_cache(struct cbfs_priv *priv, u8 *start, u32 size,
 		start += used;
 	}
 	priv->result = CBFS_SUCCESS;
+
+	return 0;
 }
 
-/* Get the CBFS header out of the ROM and do endian conversion. */
-static int file_cbfs_load_header(uintptr_t end_of_rom,
-				 struct cbfs_header *header)
+/**
+ * load_header() - Load the CBFS header
+ *
+ * Get the CBFS header out of the ROM and do endian conversion.
+ *
+ * @priv: Private data, which is inited by this function
+ * @addr: Address of CBFS header in memory-mapped SPI flash
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int load_header(struct cbfs_priv *priv, ulong addr)
 {
+	struct cbfs_header *header = &priv->header;
 	struct cbfs_header *header_in_rom;
-	int32_t offset = *(u32 *)(end_of_rom - 3);
 
-	header_in_rom = (struct cbfs_header *)(end_of_rom + offset + 1);
+	memset(priv, '\0', sizeof(*priv));
+	header_in_rom = (struct cbfs_header *)addr;
 	swap_header(header, header_in_rom);
 
 	if (header->magic != good_magic || header->offset >
 			header->rom_size - header->boot_block_size) {
-		cbfs_s.result = CBFS_BAD_HEADER;
-		return 1;
+		priv->result = CBFS_BAD_HEADER;
+		return -ENXIO;
 	}
+
 	return 0;
 }
 
-static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base,
-				struct cbfs_header *header)
+/**
+ * file_cbfs_load_header() - Get the CBFS header out of the ROM, given the end
+ *
+ * @priv: Private data, which is inited by this function
+ * @end_of_rom: Address of the last byte of the ROM (typically 0xffffffff)
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int file_cbfs_load_header(struct cbfs_priv *priv, ulong end_of_rom)
 {
-	struct cbfs_header *header_in_rom;
-
-	header_in_rom = (struct cbfs_header *)base;
-	swap_header(header, header_in_rom);
+	int offset = *(u32 *)(end_of_rom - 3);
+	int ret;
 
-	if (header->magic != good_magic || header->offset >
-			header->rom_size - header->boot_block_size) {
-		priv->result = CBFS_BAD_HEADER;
-		return -EFAULT;
-	}
+	ret = load_header(priv, end_of_rom + offset + 1);
+	if (ret)
+		return ret;
+	priv->start = (void *)(end_of_rom + 1 - priv->header.rom_size);
 
 	return 0;
 }
 
-static void cbfs_init(struct cbfs_priv *priv, uintptr_t end_of_rom)
+/**
+ * cbfs_load_header_ptr() - Get the CBFS header out of the ROM, given the base
+ *
+ * @priv: Private data, which is inited by this function
+ * @base: Address of the first byte of the ROM (e.g. 0xff000000)
+ * @return 0 if OK, -ENXIO if the header is bad
+ */
+static int cbfs_load_header_ptr(struct cbfs_priv *priv, ulong base)
 {
-	u8 *start_of_rom;
+	int ret;
 
-	priv->initialized = 0;
+	ret = load_header(priv, base + MASTER_HDR_OFFSET);
+	if (ret)
+		return ret;
+	priv->start = (void *)base;
 
-	if (file_cbfs_load_header(end_of_rom, &priv->header))
-		return;
+	return 0;
+}
 
-	start_of_rom = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
+static int cbfs_init(struct cbfs_priv *priv, ulong end_of_rom)
+{
+	int ret;
+
+	ret = file_cbfs_load_header(priv, end_of_rom);
+	if (ret)
+		return ret;
 
-	file_cbfs_fill_cache(priv, start_of_rom, priv->header.rom_size,
-			     priv->header.align);
-	if (priv->result == CBFS_SUCCESS)
-		priv->initialized = 1;
+	ret = file_cbfs_fill_cache(priv, priv->header.rom_size,
+				   priv->header.align);
+	if (ret)
+		return ret;
+	priv->initialized = true;
+
+	return 0;
 }
 
-void file_cbfs_init(uintptr_t end_of_rom)
+int file_cbfs_init(ulong end_of_rom)
 {
-	cbfs_init(&cbfs_s, end_of_rom);
+	return cbfs_init(&cbfs_s, end_of_rom);
 }
 
-int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp)
+int cbfs_init_mem(ulong base, struct cbfs_priv **privp)
 {
 	struct cbfs_priv priv_s, *priv = &priv_s;
 	int ret;
 
 	/*
 	 * Use a local variable to start with until we know that the CBFS is
-	 * valid. Assume that a master header appears at the start, at offset
-	 * 0x38.
+	 * valid.
 	 */
-	ret = cbfs_load_header_ptr(priv, base + 0x38, &priv->header);
+	ret = cbfs_load_header_ptr(priv, base);
 	if (ret)
 		return ret;
 
-	file_cbfs_fill_cache(priv, (u8 *)base, priv->header.rom_size,
-			     priv->header.align);
-	if (priv->result != CBFS_SUCCESS)
-		return -EINVAL;
+	ret = file_cbfs_fill_cache(priv, priv->header.rom_size,
+				   priv->header.align);
+	if (ret)
+		return log_msg_ret("fill", ret);
 
-	priv->initialized = 1;
+	priv->initialized = true;
 	priv = malloc(sizeof(priv_s));
 	if (!priv)
 		return -ENOMEM;
@@ -324,42 +373,59 @@ const struct cbfs_cachenode *file_cbfs_find(const char *name)
 	return cbfs_find_file(&cbfs_s, name);
 }
 
-const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,
-						     const char *name)
+static int find_uncached(struct cbfs_priv *priv, const char *name, void *start,
+			 struct cbfs_cachenode *node)
 {
-	struct cbfs_priv *priv = &cbfs_s;
-	u8 *start;
-	u32 size;
-	u32 align;
-	static struct cbfs_cachenode node;
-
-	if (file_cbfs_load_header(end_of_rom, &priv->header))
-		return NULL;
-
-	start = (u8 *)(end_of_rom + 1 - priv->header.rom_size);
-	size = priv->header.rom_size;
-	align = priv->header.align;
+	int size = priv->header.rom_size;
+	int align = priv->header.align;
 
 	while (size >= align) {
-		int result;
-		u32 used;
+		int used;
+		int ret;
 
-		result = file_cbfs_next_file(priv, start, size, align, &node,
-					     &used);
-
-		if (result < 0)
-			return NULL;
-		else if (result == 0)
+		ret = file_cbfs_next_file(priv, start, size, align, node,
+					  &used);
+		if (ret == -ENOENT)
 			break;
-
-		if (!strcmp(name, node.name))
-			return &node;
+		else if (ret)
+			return ret;
+		if (!strcmp(name, node->name))
+			return 0;
 
 		size -= used;
 		start += used;
 	}
-	cbfs_s.result = CBFS_FILE_NOT_FOUND;
-	return NULL;
+	priv->result = CBFS_FILE_NOT_FOUND;
+
+	return -ENOENT;
+}
+
+int file_cbfs_find_uncached(ulong end_of_rom, const char *name,
+			    struct cbfs_cachenode *node)
+{
+	struct cbfs_priv priv;
+	void *start;
+	int ret;
+
+	ret = file_cbfs_load_header(&priv, end_of_rom);
+	if (ret)
+		return ret;
+	start = priv.start;
+
+	return find_uncached(&priv, name, start, node);
+}
+
+int file_cbfs_find_uncached_base(ulong base, const char *name,
+				 struct cbfs_cachenode *node)
+{
+	struct cbfs_priv priv;
+	int ret;
+
+	ret = cbfs_load_header_ptr(&priv, base);
+	if (ret)
+		return ret;
+
+	return find_uncached(&priv, name, (void *)base, node);
 }
 
 const char *file_cbfs_name(const struct cbfs_cachenode *file)
diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index 228f599d44..7ef48bbc06 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -25,6 +25,7 @@
  */
 
 #include <common.h>
+#include <flash.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 #include <linux/stat.h>
diff --git a/fs/ext4/dev.c b/fs/ext4/dev.c
index 29076880bc..168443de1f 100644
--- a/fs/ext4/dev.c
+++ b/fs/ext4/dev.c
@@ -29,13 +29,14 @@
 #include <ext4fs.h>
 #include <ext_common.h>
 #include "ext4_common.h"
+#include <log.h>
 
 lbaint_t part_offset;
 
 static struct blk_desc *ext4fs_blk_desc;
-static disk_partition_t *part_info;
+static struct disk_partition *part_info;
 
-void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
+void ext4fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
 {
 	assert(rbdd->blksz == (1 << rbdd->log2blksz));
 	ext4fs_blk_desc = rbdd;
diff --git a/fs/ext4/ext4_common.c b/fs/ext4/ext4_common.c
index 5bf78b530a..c52cc400e1 100644
--- a/fs/ext4/ext4_common.c
+++ b/fs/ext4/ext4_common.c
@@ -19,10 +19,13 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <ext_common.h>
 #include <ext4fs.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <part.h>
 #include <stddef.h>
 #include <linux/stat.h>
 #include <linux/time.h>
diff --git a/fs/ext4/ext4_common.h b/fs/ext4/ext4_common.h
index 4dff1914d9..beaee9c80b 100644
--- a/fs/ext4/ext4_common.h
+++ b/fs/ext4/ext4_common.h
@@ -23,6 +23,7 @@
 #include <ext_common.h>
 #include <ext4fs.h>
 #include <malloc.h>
+#include <asm/cache.h>
 #include <linux/errno.h>
 #if defined(CONFIG_EXT4_WRITE)
 #include "ext4_journal.h"
diff --git a/fs/ext4/ext4_journal.c b/fs/ext4/ext4_journal.c
index f8524e5a99..1a340b4764 100644
--- a/fs/ext4/ext4_journal.c
+++ b/fs/ext4/ext4_journal.c
@@ -14,7 +14,9 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <ext4fs.h>
+#include <log.h>
 #include <malloc.h>
 #include <ext_common.h>
 #include "ext4_common.h"
@@ -107,22 +109,18 @@ void ext4fs_free_journal(void)
 	for (i = 0; i < MAX_JOURNAL_ENTRIES; i++) {
 		if (dirty_block_ptr[i]->blknr == -1)
 			break;
-		if (dirty_block_ptr[i]->buf)
-			free(dirty_block_ptr[i]->buf);
+		free(dirty_block_ptr[i]->buf);
 	}
 
 	for (i = 0; i < MAX_JOURNAL_ENTRIES; i++) {
 		if (journal_ptr[i]->blknr == -1)
 			break;
-		if (journal_ptr[i]->buf)
-			free(journal_ptr[i]->buf);
+		free(journal_ptr[i]->buf);
 	}
 
 	for (i = 0; i < MAX_JOURNAL_ENTRIES; i++) {
-		if (journal_ptr[i])
-			free(journal_ptr[i]);
-		if (dirty_block_ptr[i])
-			free(dirty_block_ptr[i]);
+		free(journal_ptr[i]);
+		free(dirty_block_ptr[i]);
 	}
 	gindex = 0;
 	gd_index = 0;
@@ -272,8 +270,7 @@ void ext4fs_free_revoke_blks(void)
 	struct revoke_blk_list *next_node = NULL;
 
 	while (tmp_node != NULL) {
-		if (tmp_node->content)
-			free(tmp_node->content);
+		free(tmp_node->content);
 		tmp_node = tmp_node->next;
 	}
 
diff --git a/fs/ext4/ext4_write.c b/fs/ext4/ext4_write.c
index 67aeba1339..f22af45d1b 100644
--- a/fs/ext4/ext4_write.c
+++ b/fs/ext4/ext4_write.c
@@ -22,8 +22,11 @@
 
 
 #include <common.h>
+#include <blk.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <part.h>
 #include <linux/stat.h>
 #include <div64.h>
 #include "ext4_common.h"
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 966b427a97..4c89152ce4 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -21,11 +21,14 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <ext_common.h>
 #include <ext4fs.h>
 #include "ext4_common.h"
 #include <div64.h>
 #include <malloc.h>
+#include <part.h>
+#include <uuid.h>
 
 int ext4fs_symlinknest;
 struct ext_filesystem ext_fs;
@@ -226,7 +229,7 @@ int ext4fs_read(char *buf, loff_t offset, loff_t len, loff_t *actread)
 }
 
 int ext4fs_probe(struct blk_desc *fs_dev_desc,
-		 disk_partition_t *fs_partition)
+		 struct disk_partition *fs_partition)
 {
 	ext4fs_set_blk_dev(fs_dev_desc, fs_partition);
 
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 68ce658386..7fd29470c1 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -14,10 +14,12 @@
 #include <exports.h>
 #include <fat.h>
 #include <fs.h>
+#include <log.h>
 #include <asm/byteorder.h>
 #include <part.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <asm/cache.h>
 #include <linux/compiler.h>
 #include <linux/ctype.h>
 
@@ -35,7 +37,7 @@ static void downcase(char *str, size_t len)
 }
 
 static struct blk_desc *cur_dev;
-static disk_partition_t cur_part_info;
+static struct disk_partition cur_part_info;
 
 #define DOS_BOOT_MAGIC_OFFSET	0x1fe
 #define DOS_FS_TYPE_OFFSET	0x36
@@ -56,7 +58,7 @@ static int disk_read(__u32 block, __u32 nr_blocks, void *buf)
 	return ret;
 }
 
-int fat_set_blk_dev(struct blk_desc *dev_desc, disk_partition_t *info)
+int fat_set_blk_dev(struct blk_desc *dev_desc, struct disk_partition *info)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buffer, dev_desc->blksz);
 
@@ -87,7 +89,7 @@ int fat_set_blk_dev(struct blk_desc *dev_desc, disk_partition_t *info)
 
 int fat_register_device(struct blk_desc *dev_desc, int part_no)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 
 	/* First close any currently found FAT filesystem */
 	cur_dev = NULL;
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 4f96699e36..59cc0bae94 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -9,9 +9,11 @@
 #include <command.h>
 #include <config.h>
 #include <fat.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/byteorder.h>
 #include <part.h>
+#include <asm/cache.h>
 #include <linux/ctype.h>
 #include <div64.h>
 #include <linux/math64.h>
diff --git a/fs/fs.c b/fs/fs.c
index 0c66d60477..ad4caaeb1e 100644
--- a/fs/fs.c
+++ b/fs/fs.c
@@ -3,10 +3,13 @@
  * Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
  */
 
+#include <command.h>
 #include <config.h>
 #include <errno.h>
 #include <common.h>
 #include <env.h>
+#include <lmb.h>
+#include <log.h>
 #include <mapmem.h>
 #include <part.h>
 #include <ext4fs.h>
@@ -24,11 +27,11 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static struct blk_desc *fs_dev_desc;
 static int fs_dev_part;
-static disk_partition_t fs_partition;
+static struct disk_partition fs_partition;
 static int fs_type = FS_TYPE_ANY;
 
 static inline int fs_probe_unsupported(struct blk_desc *fs_dev_desc,
-				      disk_partition_t *fs_partition)
+				      struct disk_partition *fs_partition)
 {
 	printf("** Unrecognized filesystem type **\n");
 	return -1;
@@ -135,7 +138,7 @@ struct fstype_info {
 	 */
 	bool null_dev_desc_ok;
 	int (*probe)(struct blk_desc *fs_dev_desc,
-		     disk_partition_t *fs_partition);
+		     struct disk_partition *fs_partition);
 	int (*ls)(const char *dirname);
 	int (*exists)(const char *filename);
 	int (*size)(const char *filename, loff_t *size);
@@ -643,8 +646,8 @@ int fs_ln(const char *fname, const char *target)
 	return ret;
 }
 
-int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype)
+int do_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype)
 {
 	loff_t size;
 
@@ -662,8 +665,8 @@ int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype)
+int do_load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype)
 {
 	unsigned long addr;
 	const char *addr_str;
@@ -736,8 +739,8 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-	int fstype)
+int do_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	  int fstype)
 {
 	if (argc < 2)
 		return CMD_RET_USAGE;
@@ -762,8 +765,8 @@ int file_exists(const char *dev_type, const char *dev_part, const char *file,
 	return fs_exists(file);
 }
 
-int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype)
+int do_save(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype)
 {
 	unsigned long addr;
 	const char *filename;
@@ -804,8 +807,8 @@ int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype)
+int do_fs_uuid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	       int fstype)
 {
 	int ret;
 	char uuid[37];
@@ -829,7 +832,7 @@ int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return CMD_RET_SUCCESS;
 }
 
-int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_fs_type(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct fstype_info *info;
 
@@ -851,7 +854,7 @@ int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return CMD_RET_SUCCESS;
 }
 
-int do_rm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
+int do_rm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
 	  int fstype)
 {
 	if (argc != 4)
@@ -866,7 +869,7 @@ int do_rm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_mkdir(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
+int do_mkdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
 	     int fstype)
 {
 	int ret;
@@ -886,7 +889,7 @@ int do_mkdir(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
 	return 0;
 }
 
-int do_ln(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
+int do_ln(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
 	  int fstype)
 {
 	if (argc != 5)
diff --git a/fs/fs_internal.c b/fs/fs_internal.c
index d369c43ca6..8b19811a63 100644
--- a/fs/fs_internal.c
+++ b/fs/fs_internal.c
@@ -6,11 +6,13 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <compiler.h>
+#include <log.h>
 #include <part.h>
 #include <memalign.h>
 
-int fs_devread(struct blk_desc *blk, disk_partition_t *partition,
+int fs_devread(struct blk_desc *blk, struct disk_partition *partition,
 	       lbaint_t sector, int byte_offset, int byte_len, char *buf)
 {
 	unsigned block_len;
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 5912cde838..a98745c50e 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -113,6 +113,7 @@
 
 #include <common.h>
 #include <config.h>
+#include <flash.h>
 #include <malloc.h>
 #include <div64.h>
 #include <linux/compiler.h>
@@ -549,7 +550,7 @@ add_node(struct b_list *list)
 }
 
 static struct b_node *
-insert_node(struct b_list *list, u32 offset)
+insert_node(struct b_list *list)
 {
 	struct b_node *new;
 
@@ -557,7 +558,6 @@ insert_node(struct b_list *list, u32 offset)
 		putstr("add_node failed!\r\n");
 		return NULL;
 	}
-	new->offset = offset;
 	new->next = NULL;
 
 	if (list->listTail != NULL)
@@ -575,18 +575,7 @@ insert_node(struct b_list *list, u32 offset)
  */
 static int compare_inodes(struct b_node *new, struct b_node *old)
 {
-	/*
-	 * Only read in the version info from flash, not the entire inode.
-	 * This can make a big difference to speed if flash is slow.
-	 */
-	u32 new_version;
-	u32 old_version;
-	get_fl_mem(new->offset + offsetof(struct jffs2_raw_inode, version),
-		   sizeof(new_version), &new_version);
-	get_fl_mem(old->offset + offsetof(struct jffs2_raw_inode, version),
-		   sizeof(old_version), &old_version);
-
-	return new_version > old_version;
+	return new->version > old->version;
 }
 
 /* Sort directory entries so all entries in the same directory
@@ -683,7 +672,7 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)
 	uchar *src;
 	int i;
 	u32 counter = 0;
-#ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS
+
 	/* Find file size before loading any data, so fragments that
 	 * start past the end of file can be ignored. A fragment
 	 * that is partially in the file is loaded, so extra data may
@@ -691,35 +680,40 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)
 	 * This shouldn't cause trouble when loading kernel images, so
 	 * we will live with it.
 	 */
+	int latestOffset = -1;
 	for (b = pL->frag.listHead; b != NULL; b = b->next) {
-		jNode = (struct jffs2_raw_inode *) get_fl_mem(b->offset,
-			sizeof(struct jffs2_raw_inode), pL->readbuf);
-		if ((inode == jNode->ino)) {
+		if (inode == b->ino) {
 			/* get actual file length from the newest node */
-			if (jNode->version >= latestVersion) {
-				totalSize = jNode->isize;
-				latestVersion = jNode->version;
+			if (b->version >= latestVersion) {
+				latestVersion = b->version;
+				latestOffset = b->offset;
 			}
 		}
+	}
+
+	if (latestOffset >= 0) {
+		jNode = (struct jffs2_raw_inode *)get_fl_mem(latestOffset,
+			sizeof(struct jffs2_raw_inode), pL->readbuf);
+		totalSize = jNode->isize;
 		put_fl_mem(jNode, pL->readbuf);
 	}
+
 	/*
 	 * If no destination is provided, we are done.
 	 * Just return the total size.
 	 */
 	if (!dest)
 		return totalSize;
-#endif
 
 	for (b = pL->frag.listHead; b != NULL; b = b->next) {
-		/*
-		 * Copy just the node and not the data at this point,
-		 * since we don't yet know if we need this data.
-		 */
-		jNode = (struct jffs2_raw_inode *)get_fl_mem(b->offset,
-				sizeof(struct jffs2_raw_inode),
-				pL->readbuf);
-		if (inode == jNode->ino) {
+		if (inode == b->ino) {
+			/*
+			 * Copy just the node and not the data at this point,
+			 * since we don't yet know if we need this data.
+			 */
+			jNode = (struct jffs2_raw_inode *)get_fl_mem(b->offset,
+					sizeof(struct jffs2_raw_inode),
+					pL->readbuf);
 #if 0
 			putLabeledWord("\r\n\r\nread_inode: totlen = ", jNode->totlen);
 			putLabeledWord("read_inode: inode = ", jNode->ino);
@@ -733,14 +727,6 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)
 			putLabeledWord("read_inode: flags = ", jNode->flags);
 #endif
 
-#ifndef CONFIG_SYS_JFFS2_SORT_FRAGMENTS
-			/* get actual file length from the newest node */
-			if (jNode->version >= latestVersion) {
-				totalSize = jNode->isize;
-				latestVersion = jNode->version;
-			}
-#endif
-
 			if(dest) {
 				/*
 				 * Now that the inode has been checked,
@@ -804,9 +790,9 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest)
 #if 0
 			putLabeledWord("read_inode: totalSize = ", totalSize);
 #endif
+			put_fl_mem(jNode, pL->readbuf);
 		}
 		counter++;
-		put_fl_mem(jNode, pL->readbuf);
 	}
 
 #if 0
@@ -953,13 +939,14 @@ jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)
 	struct jffs2_raw_dirent *jDir;
 
 	for (b = pL->dir.listHead; b; b = b->next) {
-		jDir = (struct jffs2_raw_dirent *) get_node_mem(b->offset,
-								pL->readbuf);
-		if (pino == jDir->pino) {
+		if (pino == b->pino) {
 			u32 i_version = 0;
-			struct jffs2_raw_inode *jNode, *i = NULL;
+			int i_offset = -1;
+			struct jffs2_raw_inode *jNode = NULL;
 			struct b_node *b2;
 
+			jDir = (struct jffs2_raw_dirent *)
+				get_node_mem(b->offset, pL->readbuf);
 #ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS
 			/* Check for more recent versions of this file */
 			int match;
@@ -991,30 +978,27 @@ jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino)
 			}
 
 			for (b2 = pL->frag.listHead; b2; b2 = b2->next) {
-				jNode = (struct jffs2_raw_inode *)
-					get_fl_mem(b2->offset, sizeof(*jNode),
-						   NULL);
-				if (jNode->ino == jDir->ino &&
-				    jNode->version >= i_version) {
-					i_version = jNode->version;
-					if (i)
-						put_fl_mem(i, NULL);
-
-					if (jDir->type == DT_LNK)
-						i = get_node_mem(b2->offset,
-								 NULL);
-					else
-						i = get_fl_mem(b2->offset,
-							       sizeof(*i),
-							       NULL);
+				if (b2->ino == jDir->ino &&
+				    b2->version >= i_version) {
+					i_version = b2->version;
+					i_offset = b2->offset;
 				}
-				put_fl_mem(jNode, NULL);
 			}
 
-			dump_inode(pL, jDir, i);
-			put_fl_mem(i, NULL);
+			if (i_version >= 0) {
+				if (jDir->type == DT_LNK)
+					jNode = get_node_mem(i_offset, NULL);
+				else
+					jNode = get_fl_mem(i_offset,
+							   sizeof(*jNode),
+							   NULL);
+			}
+
+			dump_inode(pL, jDir, jNode);
+			put_fl_mem(jNode, NULL);
+
+			put_fl_mem(jDir, pL->readbuf);
 		}
-		put_fl_mem(jDir, pL->readbuf);
 	}
 	return pino;
 }
@@ -1266,7 +1250,7 @@ static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset,
 {
 	void *sp;
 	int i, pass;
-	void *ret;
+	struct b_node *b;
 
 	for (pass = 0; pass < 2; pass++) {
 		sp = summary->sum;
@@ -1281,13 +1265,17 @@ static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset,
 					if (pass) {
 						spi = sp;
 
-						ret = insert_node(&pL->frag,
-							(u32)part->offset +
+						b = insert_node(&pL->frag);
+						if (!b)
+							return -1;
+						b->offset = (u32)part->offset +
 							offset +
 							sum_get_unaligned32(
-								&spi->offset));
-						if (ret == NULL)
-							return -1;
+								&spi->offset);
+						b->version = sum_get_unaligned32(
+							&spi->version);
+						b->ino = sum_get_unaligned32(
+							&spi->inode);
 					}
 
 					sp += JFFS2_SUMMARY_INODE_SIZE;
@@ -1298,13 +1286,17 @@ static int jffs2_sum_process_sum_data(struct part_info *part, uint32_t offset,
 					struct jffs2_sum_dirent_flash *spd;
 					spd = sp;
 					if (pass) {
-						ret = insert_node(&pL->dir,
-							(u32) part->offset +
+						b = insert_node(&pL->dir);
+						if (!b)
+							return -1;
+						b->offset = (u32)part->offset +
 							offset +
 							sum_get_unaligned32(
-								&spd->offset));
-						if (ret == NULL)
-							return -1;
+								&spd->offset);
+						b->version = sum_get_unaligned32(
+							&spd->version);
+						b->pino = sum_get_unaligned32(
+							&spd->pino);
 					}
 
 					sp += JFFS2_SUMMARY_DIRENT_SIZE(
@@ -1471,7 +1463,7 @@ static u32
 jffs2_1pass_build_lists(struct part_info * part)
 {
 	struct b_lists *pL;
-	struct jffs2_unknown_node *node;
+	union jffs2_node_union *node;
 	u32 nr_sectors;
 	u32 i;
 	u32 counter4 = 0;
@@ -1507,6 +1499,8 @@ jffs2_1pass_build_lists(struct part_info * part)
 #endif
 		/* Indicates a sector with a CLEANMARKER was found */
 		int clean_sector = 0;
+		struct jffs2_unknown_node crcnode;
+		struct b_node *b;
 
 		/* Set buf_size to maximum length */
 		buf_size = DEFAULT_EMPTY_SCAN_SIZE;
@@ -1600,9 +1594,10 @@ jffs2_1pass_build_lists(struct part_info * part)
 			}
 			prevofs = ofs;
 			if (sector_ofs + part->sector_size <
-					ofs + sizeof(*node))
+					ofs + sizeof(struct jffs2_unknown_node))
 				break;
-			if (buf_ofs + buf_len < ofs + sizeof(*node)) {
+			if (buf_ofs + buf_len <
+					ofs + sizeof(struct jffs2_unknown_node)) {
 				buf_len = min_t(uint32_t, buf_size, sector_ofs
 						+ part->sector_size - ofs);
 				get_fl_mem((u32)part->offset + ofs, buf_len,
@@ -1610,7 +1605,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 				buf_ofs = ofs;
 			}
 
-			node = (struct jffs2_unknown_node *)&buf[ofs-buf_ofs];
+			node = (union jffs2_node_union *)&buf[ofs - buf_ofs];
 
 			if (*(uint32_t *)(&buf[ofs-buf_ofs]) == 0xffffffff) {
 				uint32_t inbuf_ofs;
@@ -1665,23 +1660,41 @@ jffs2_1pass_build_lists(struct part_info * part)
 			 * the 'clean_sector' flag.
 			 */
 			clean_sector = 0;
-			if (node->magic != JFFS2_MAGIC_BITMASK ||
-					!hdr_crc(node)) {
+			if (node->u.magic != JFFS2_MAGIC_BITMASK) {
 				ofs += 4;
 				counter4++;
 				continue;
 			}
-			if (ofs + node->totlen >
-					sector_ofs + part->sector_size) {
+
+			crcnode.magic = node->u.magic;
+			crcnode.nodetype = node->u.nodetype | JFFS2_NODE_ACCURATE;
+			crcnode.totlen = node->u.totlen;
+			crcnode.hdr_crc = node->u.hdr_crc;
+			if (!hdr_crc(&crcnode)) {
+				ofs += 4;
+				counter4++;
+				continue;
+			}
+
+			if (ofs + node->u.totlen > sector_ofs + part->sector_size) {
 				ofs += 4;
 				counter4++;
 				continue;
 			}
+
+			if (!(node->u.nodetype & JFFS2_NODE_ACCURATE)) {
+				DEBUGF("Obsolete node type: %x len %d offset 0x%x\n",
+				       node->u.nodetype, node->u.totlen, ofs);
+				ofs += ((node->u.totlen + 3) & ~3);
+				counterF++;
+				continue;
+			}
+
 			/* if its a fragment add it */
-			switch (node->nodetype) {
+			switch (node->u.nodetype) {
 			case JFFS2_NODETYPE_INODE:
-				if (buf_ofs + buf_len < ofs + sizeof(struct
-							jffs2_raw_inode)) {
+				if (buf_ofs + buf_len <
+					ofs + sizeof(struct jffs2_raw_inode)) {
 					buf_len = min_t(uint32_t,
 							sizeof(struct jffs2_raw_inode),
 							sector_ofs +
@@ -1695,14 +1708,17 @@ jffs2_1pass_build_lists(struct part_info * part)
 				if (!inode_crc((struct jffs2_raw_inode *)node))
 					break;
 
-				if (insert_node(&pL->frag, (u32) part->offset +
-						ofs) == NULL) {
+				b = insert_node(&pL->frag);
+				if (!b) {
 					free(buf);
 					jffs2_free_cache(part);
 					return 0;
 				}
-				if (max_totlen < node->totlen)
-					max_totlen = node->totlen;
+				b->offset = (u32)part->offset + ofs;
+				b->version = node->i.version;
+				b->ino = node->i.ino;
+				if (max_totlen < node->u.totlen)
+					max_totlen = node->u.totlen;
 				break;
 			case JFFS2_NODETYPE_DIRENT:
 				if (buf_ofs + buf_len < ofs + sizeof(struct
@@ -1711,7 +1727,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 							 jffs2_raw_dirent *)
 							node)->nsize) {
 					buf_len = min_t(uint32_t,
-							node->totlen,
+							node->u.totlen,
 							sector_ofs +
 							part->sector_size -
 							ofs);
@@ -1730,25 +1746,28 @@ jffs2_1pass_build_lists(struct part_info * part)
 					break;
 				if (! (counterN%100))
 					puts ("\b\b.  ");
-				if (insert_node(&pL->dir, (u32) part->offset +
-						ofs) == NULL) {
+				b = insert_node(&pL->dir);
+				if (!b) {
 					free(buf);
 					jffs2_free_cache(part);
 					return 0;
 				}
-				if (max_totlen < node->totlen)
-					max_totlen = node->totlen;
+				b->offset = (u32)part->offset + ofs;
+				b->version = node->d.version;
+				b->pino = node->d.pino;
+				if (max_totlen < node->u.totlen)
+					max_totlen = node->u.totlen;
 				counterN++;
 				break;
 			case JFFS2_NODETYPE_CLEANMARKER:
-				if (node->totlen != sizeof(struct jffs2_unknown_node))
+				if (node->u.totlen != sizeof(struct jffs2_unknown_node))
 					printf("OOPS Cleanmarker has bad size "
 						"%d != %zu\n",
-						node->totlen,
+						node->u.totlen,
 						sizeof(struct jffs2_unknown_node));
-				if ((node->totlen ==
-				     sizeof(struct jffs2_unknown_node)) &&
-				    (ofs == sector_ofs)) {
+				if (node->u.totlen ==
+				     sizeof(struct jffs2_unknown_node) &&
+				    ofs == sector_ofs) {
 					/*
 					 * Found a CLEANMARKER at the beginning
 					 * of the sector. It's in the correct
@@ -1758,20 +1777,21 @@ jffs2_1pass_build_lists(struct part_info * part)
 				}
 				break;
 			case JFFS2_NODETYPE_PADDING:
-				if (node->totlen < sizeof(struct jffs2_unknown_node))
+				if (node->u.totlen <
+						sizeof(struct jffs2_unknown_node))
 					printf("OOPS Padding has bad size "
 						"%d < %zu\n",
-						node->totlen,
+						node->u.totlen,
 						sizeof(struct jffs2_unknown_node));
 				break;
 			case JFFS2_NODETYPE_SUMMARY:
 				break;
 			default:
 				printf("Unknown node type: %x len %d offset 0x%x\n",
-					node->nodetype,
-					node->totlen, ofs);
+					node->u.nodetype,
+					node->u.totlen, ofs);
 			}
-			ofs += ((node->totlen + 3) & ~3);
+			ofs += ((node->u.totlen + 3) & ~3);
 			counterF++;
 		}
 	}
diff --git a/fs/jffs2/jffs2_private.h b/fs/jffs2/jffs2_private.h
index 06b6ca2919..65d19a76f9 100644
--- a/fs/jffs2/jffs2_private.h
+++ b/fs/jffs2/jffs2_private.h
@@ -8,6 +8,11 @@ struct b_node {
 	u32 offset;
 	struct b_node *next;
 	enum { CRC_UNKNOWN = 0, CRC_OK, CRC_BAD } datacrc;
+	u32 version;
+	union {
+		u32 ino; /* for inodes */
+		u32 pino; /* for dirents */
+	};
 };
 
 struct b_list {
diff --git a/fs/reiserfs/dev.c b/fs/reiserfs/dev.c
index c6b67795df..5d9c26489a 100644
--- a/fs/reiserfs/dev.c
+++ b/fs/reiserfs/dev.c
@@ -12,10 +12,10 @@
 #include "reiserfs_private.h"
 
 static struct blk_desc *reiserfs_blk_desc;
-static disk_partition_t *part_info;
+static struct disk_partition *part_info;
 
 
-void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
+void reiserfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
 {
 	reiserfs_blk_desc = rbdd;
 	part_info = info;
diff --git a/fs/sandbox/sandboxfs.c b/fs/sandbox/sandboxfs.c
index af47224b6c..4ae41d5b4d 100644
--- a/fs/sandbox/sandboxfs.c
+++ b/fs/sandbox/sandboxfs.c
@@ -7,8 +7,9 @@
 #include <fs.h>
 #include <malloc.h>
 #include <os.h>
+#include <sandboxfs.h>
 
-int sandbox_fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
+int sandbox_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
 {
 	/*
 	 * Only accept a NULL struct blk_desc for the sandbox, which is when
diff --git a/fs/ubifs/budget.c b/fs/ubifs/budget.c
index 9eb5d3fed1..514f15f58c 100644
--- a/fs/ubifs/budget.c
+++ b/fs/ubifs/budget.c
@@ -20,6 +20,7 @@
 
 #include "ubifs.h"
 #ifndef __UBOOT__
+#include <log.h>
 #include <linux/writeback.h>
 #else
 #include <linux/err.h>
diff --git a/fs/ubifs/debug.c b/fs/ubifs/debug.c
index 6835f86fec..2ff8f1a5f9 100644
--- a/fs/ubifs/debug.c
+++ b/fs/ubifs/debug.c
@@ -16,6 +16,7 @@
  */
 
 #include <hexdump.h>
+#include <log.h>
 #include <dm/devres.h>
 
 #ifndef __UBOOT__
diff --git a/fs/ubifs/gc.c b/fs/ubifs/gc.c
index f923d07652..6a4ada62c8 100644
--- a/fs/ubifs/gc.c
+++ b/fs/ubifs/gc.c
@@ -41,6 +41,7 @@
  * good, and GC takes extra care when moving them.
  */
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/slab.h>
 #include <linux/pagemap.h>
diff --git a/fs/ubifs/io.c b/fs/ubifs/io.c
index 8148055f67..eb14b89544 100644
--- a/fs/ubifs/io.c
+++ b/fs/ubifs/io.c
@@ -59,6 +59,8 @@
  */
 
 #ifndef __UBOOT__
+#include <init.h>
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/slab.h>
diff --git a/fs/ubifs/log.c b/fs/ubifs/log.c
index 5cbb8aa1b2..77ff52575e 100644
--- a/fs/ubifs/log.c
+++ b/fs/ubifs/log.c
@@ -16,6 +16,7 @@
  */
 
 #ifdef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #endif
diff --git a/fs/ubifs/lprops.c b/fs/ubifs/lprops.c
index a7c45dd5ec..a9e22abe6b 100644
--- a/fs/ubifs/lprops.c
+++ b/fs/ubifs/lprops.c
@@ -17,6 +17,7 @@
  */
 
 #ifdef __UBOOT__
+#include <log.h>
 #include <malloc.h>
 #include <linux/err.h>
 #endif
diff --git a/fs/ubifs/lpt.c b/fs/ubifs/lpt.c
index ebfb1d4dd7..62748b0210 100644
--- a/fs/ubifs/lpt.c
+++ b/fs/ubifs/lpt.c
@@ -33,6 +33,7 @@
 
 #include "ubifs.h"
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc16.h>
 #include <linux/math64.h>
diff --git a/fs/ubifs/lpt_commit.c b/fs/ubifs/lpt_commit.c
index aa5956c52e..897d001430 100644
--- a/fs/ubifs/lpt_commit.c
+++ b/fs/ubifs/lpt_commit.c
@@ -14,11 +14,13 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc16.h>
 #include <linux/slab.h>
 #include <linux/random.h>
 #else
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include "crc16.h"
diff --git a/fs/ubifs/master.c b/fs/ubifs/master.c
index 2740aaee8b..055c654ae8 100644
--- a/fs/ubifs/master.c
+++ b/fs/ubifs/master.c
@@ -12,6 +12,7 @@
 
 #include "ubifs.h"
 #ifdef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/compat.h>
 #include <linux/err.h>
diff --git a/fs/ubifs/orphan.c b/fs/ubifs/orphan.c
index a67b3eec93..6aa2890ff0 100644
--- a/fs/ubifs/orphan.c
+++ b/fs/ubifs/orphan.c
@@ -7,6 +7,7 @@
  * Author: Adrian Hunter
  */
 
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #include "ubifs.h"
diff --git a/fs/ubifs/recovery.c b/fs/ubifs/recovery.c
index 3388efe2b7..6b6884fb20 100644
--- a/fs/ubifs/recovery.c
+++ b/fs/ubifs/recovery.c
@@ -36,6 +36,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/slab.h>
diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c
index 3a9fa4130e..aa7f281ef6 100644
--- a/fs/ubifs/replay.c
+++ b/fs/ubifs/replay.c
@@ -21,6 +21,7 @@
  */
 
 #ifdef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/compat.h>
 #include <linux/err.h>
diff --git a/fs/ubifs/sb.c b/fs/ubifs/sb.c
index 599e1a35fb..1d49285c7d 100644
--- a/fs/ubifs/sb.c
+++ b/fs/ubifs/sb.c
@@ -16,6 +16,7 @@
 
 #include "ubifs.h"
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/slab.h>
 #include <linux/random.h>
diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c
index 876a6ee661..7a6e46df5d 100644
--- a/fs/ubifs/scan.c
+++ b/fs/ubifs/scan.c
@@ -17,6 +17,7 @@
 
 #ifdef __UBOOT__
 #include <hexdump.h>
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #endif
diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c
index b38513660b..e3a4c0bca2 100644
--- a/fs/ubifs/super.c
+++ b/fs/ubifs/super.c
@@ -15,6 +15,7 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/init.h>
 #include <linux/slab.h>
@@ -31,12 +32,14 @@
 #include <common.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <linux/bitops.h>
 #include <linux/bug.h>
 #include <linux/log2.h>
 #include <linux/stat.h>
 #include <linux/err.h>
 #include "ubifs.h"
 #include <ubi_uboot.h>
+#include <linux/stringify.h>
 #include <mtd/ubi-user.h>
 
 struct dentry;
diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c
index fc6fdaff8d..e8b8f16838 100644
--- a/fs/ubifs/tnc.c
+++ b/fs/ubifs/tnc.c
@@ -19,11 +19,14 @@
  */
 
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/crc32.h>
 #include <linux/slab.h>
 #include <u-boot/crc.h>
 #else
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #include <linux/stat.h>
diff --git a/fs/ubifs/tnc_misc.c b/fs/ubifs/tnc_misc.c
index dfa9e91903..e4cd785b9f 100644
--- a/fs/ubifs/tnc_misc.c
+++ b/fs/ubifs/tnc_misc.c
@@ -16,6 +16,7 @@
  */
 
 #ifdef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/err.h>
 #endif
diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
index e097d28444..70beb848e1 100644
--- a/fs/ubifs/ubifs.c
+++ b/fs/ubifs/ubifs.c
@@ -14,9 +14,11 @@
 #include <common.h>
 #include <env.h>
 #include <gzip.h>
+#include <log.h>
 #include <malloc.h>
 #include <memalign.h>
 #include "ubifs.h"
+#include <part.h>
 #include <dm/devres.h>
 #include <u-boot/zlib.h>
 
@@ -549,7 +551,7 @@ static unsigned long ubifs_findfile(struct super_block *sb, char *filename)
 	return 0;
 }
 
-int ubifs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
+int ubifs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
 {
 	if (rbdd) {
 		debug("UBIFS cannot be used with normal block devices\n");
diff --git a/fs/yaffs2/yaffs_mtdif2.c b/fs/yaffs2/yaffs_mtdif2.c
index 0d9d5cc4b1..81a4d964f3 100644
--- a/fs/yaffs2/yaffs_mtdif2.c
+++ b/fs/yaffs2/yaffs_mtdif2.c
@@ -15,6 +15,7 @@
 
 /* XXX U-BOOT XXX */
 #include <common.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 
 #include "yportenv.h"
diff --git a/fs/yaffs2/yportenv.h b/fs/yaffs2/yportenv.h
index 251eba0792..081391a1d0 100644
--- a/fs/yaffs2/yportenv.h
+++ b/fs/yaffs2/yportenv.h
@@ -17,6 +17,7 @@
 #ifndef __YPORTENV_H__
 #define __YPORTENV_H__
 
+#include <linux/bug.h>
 #include <linux/types.h>
 
 /* Definition of types */
diff --git a/fs/zfs/dev.c b/fs/zfs/dev.c
index 3cdb9e03ed..251e7d1f74 100644
--- a/fs/zfs/dev.c
+++ b/fs/zfs/dev.c
@@ -14,9 +14,9 @@
 #include <zfs_common.h>
 
 static struct blk_desc *zfs_blk_desc;
-static disk_partition_t *part_info;
+static struct disk_partition *part_info;
 
-void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info)
+void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info)
 {
 	zfs_blk_desc = rbdd;
 	part_info = info;
diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c
index 4331c16064..1fec96cd5c 100644
--- a/fs/zfs/zfs.c
+++ b/fs/zfs/zfs.c
@@ -11,6 +11,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/stat.h>
 #include <linux/time.h>
diff --git a/include/_exports.h b/include/_exports.h
index 0dee05f077..1e9ba86108 100644
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -29,7 +29,7 @@
 	EXPORT_FUNC(udelay, void, udelay, unsigned long)
 	EXPORT_FUNC(get_timer, unsigned long, get_timer, unsigned long)
 	EXPORT_FUNC(vprintf, int, vprintf, const char *, va_list)
-	EXPORT_FUNC(do_reset, int, do_reset, cmd_tbl_t *,
+	EXPORT_FUNC(do_reset, int, do_reset, struct cmd_tbl *,
 		    int , int , char * const [])
 	EXPORT_FUNC(env_get, char  *, env_get, const char*)
 	EXPORT_FUNC(env_set, int, env_set, const char *, const char *)
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index 194be9aa58..fe9b29f3f8 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -13,6 +13,8 @@
 #ifndef __ACPI_TABLE_H__
 #define __ACPI_TABLE_H__
 
+#include <linux/bitops.h>
+
 #define RSDP_SIG		"RSD PTR "	/* RSDP pointer signature */
 #define OEM_ID			"U-BOOT"	/* U-Boot */
 #define OEM_TABLE_ID		"U-BOOTBL"	/* U-Boot Table */
@@ -23,6 +25,8 @@
 
 #if !defined(__ACPI__)
 
+struct acpi_ctx;
+
 /*
  * RSDP (Root System Description Pointer)
  * Note: ACPI 1.0 didn't have length, xsdt_address, and ext_checksum
@@ -505,6 +509,69 @@ int acpi_get_table_revision(enum acpi_tables table);
  */
 int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags);
 
+/**
+ * acpi_fill_header() - Set up a new table header
+ *
+ * This sets all fields except length, revision, checksum and aslc_revision
+ *
+ * @header: ACPI header to update
+ * @signature: Table signature to use (4 characters)
+ */
+void acpi_fill_header(struct acpi_table_header *header, char *signature);
+
+/**
+ * acpi_align() - Align the ACPI output pointer to a 16-byte boundary
+ *
+ * @ctx: ACPI context
+ */
+void acpi_align(struct acpi_ctx *ctx);
+
+/**
+ * acpi_align64() - Align the ACPI output pointer to a 64-byte boundary
+ *
+ * @ctx: ACPI context
+ */
+void acpi_align64(struct acpi_ctx *ctx);
+
+/**
+ * acpi_inc() - Increment the ACPI output pointer by a bit
+ *
+ * The pointer is NOT aligned afterwards.
+ *
+ * @ctx: ACPI context
+ * @amount: Amount to increment by
+ */
+void acpi_inc(struct acpi_ctx *ctx, uint amount);
+
+/**
+ * acpi_inc_align() - Increment the ACPI output pointer by a bit and align
+ *
+ * The pointer is aligned afterwards to a 16-byte boundary
+ *
+ * @ctx: ACPI context
+ * @amount: Amount to increment by
+ */
+void acpi_inc_align(struct acpi_ctx *ctx, uint amount);
+
+/**
+ * acpi_add_table() - Add a new table to the RSDP and XSDT
+ *
+ * @ctx: ACPI context
+ * @table: Table to add
+ * @return 0 if OK, -E2BIG if too many tables
+ */
+int acpi_add_table(struct acpi_ctx *ctx, void *table);
+
+/**
+ * acpi_setup_base_tables() - Set up context along with RSDP, RSDT and XSDT
+ *
+ * Set up the context with the given start position. Some basic tables are
+ * always needed, so set them up as well.
+ *
+ * @ctx: Context to set up
+ */
+void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start);
+
 #endif /* !__ACPI__*/
 
 #include <asm/acpi_table.h>
diff --git a/include/android_ab.h b/include/android_ab.h
index 810906d22b..0941eb6b9c 100644
--- a/include/android_ab.h
+++ b/include/android_ab.h
@@ -6,7 +6,8 @@
 #ifndef __ANDROID_AB_H
 #define __ANDROID_AB_H
 
-#include <common.h>
+struct blk_desc;
+struct disk_partition;
 
 /* Android standard boot slot names are 'a', 'b', 'c', ... */
 #define BOOT_SLOT_NAME(slot_num) ('a' + (slot_num))
@@ -29,6 +30,6 @@
  * @param[in] part_info Place to store the partition information
  * @return The slot number (>= 0) on success, or a negative on error
  */
-int ab_select_slot(struct blk_desc *dev_desc, disk_partition_t *part_info);
+int ab_select_slot(struct blk_desc *dev_desc, struct disk_partition *part_info);
 
 #endif /* __ANDROID_AB_H */
diff --git a/include/ansi.h b/include/ansi.h
index e90a697eaf..af1a3712c8 100644
--- a/include/ansi.h
+++ b/include/ansi.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  */
 
 /*
diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index d9e220cfe3..8c78792cc9 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -166,5 +166,6 @@ typedef struct global_data {
 #define GD_FLG_SPL_EARLY_INIT	0x04000 /* Early SPL init is done	   */
 #define GD_FLG_LOG_READY	0x08000 /* Log system is ready for use	   */
 #define GD_FLG_WDT_READY	0x10000 /* Watchdog is ready for use	   */
+#define GD_FLG_SKIP_LL_INIT	0x20000	/* Don't perform low-level init	   */
 
 #endif /* __ASM_GENERIC_GBL_DATA_H */
diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index 859f41a0d4..e16c2f31d9 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -8,6 +8,7 @@
 #define _ASM_GENERIC_GPIO_H_
 
 #include <dm/ofnode.h>
+#include <linux/bitops.h>
 
 struct ofnode_phandle_args;
 
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index cc94d39069..6f749736f1 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -23,6 +23,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <asm/types.h>
 #include <linux/types.h>
 
 typedef struct bd_info {
diff --git a/include/atf_common.h b/include/atf_common.h
index 3a7d40e5f0..fd5454c55b 100644
--- a/include/atf_common.h
+++ b/include/atf_common.h
@@ -177,6 +177,6 @@ struct bl2_to_bl31_params_mem {
 	struct entry_point_info bl31_ep_info;
 };
 
-#endif /*__ASSEMBLY__*/
+#endif /*__ASSEMBLY__ */
 
 #endif /* __BL_COMMON_H__ */
diff --git a/include/avb_verify.h b/include/avb_verify.h
index 18278f829e..a8d7090f79 100644
--- a/include/avb_verify.h
+++ b/include/avb_verify.h
@@ -38,7 +38,7 @@ struct mmc_part {
 	int dev_num;
 	struct mmc *mmc;
 	struct blk_desc *mmc_blk;
-	disk_partition_t info;
+	struct disk_partition info;
 };
 
 enum mmc_io_type {
diff --git a/include/bedbug/type.h b/include/bedbug/type.h
index b7b447b1fe..f7a719caf0 100644
--- a/include/bedbug/type.h
+++ b/include/bedbug/type.h
@@ -1,9 +1,11 @@
 #ifndef _TYPE_BEDBUG_H
 #define _TYPE_BEDBUG_H
 
+struct cmd_tbl;
+
 /* Supporting routines */
 int bedbug_puts (const char *);
-void bedbug_init (void);
+int bedbug_init(void);
 void bedbug860_init (void);
 void do_bedbug_breakpoint (struct pt_regs *);
 void bedbug_main_loop (unsigned long, struct pt_regs *);
@@ -15,7 +17,8 @@ typedef struct {
 	int current_bp;
 	struct pt_regs *regs;
 
-	void (*do_break) (cmd_tbl_t *, int, int, char * const []);
+	void (*do_break)(struct cmd_tbl *cmd, int flags, int argc,
+			 char *const argv[]);
 	void (*break_isr) (struct pt_regs *);
 	int (*find_empty) (void);
 	int (*set) (int, unsigned long);
diff --git a/include/bitfield.h b/include/bitfield.h
index 579a69c856..d3ceeedccd 100644
--- a/include/bitfield.h
+++ b/include/bitfield.h
@@ -36,6 +36,7 @@
  * tables which describe all bitfields in all registers.
  */
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 
 /* Produces a mask of set bits covering a range of a uint value */
diff --git a/include/blk.h b/include/blk.h
index 6f541bb2ba..abcd4bedbb 100644
--- a/include/blk.h
+++ b/include/blk.h
@@ -679,7 +679,7 @@ const char *blk_get_if_type_name(enum if_type if_type);
  * @cur_devnump: Current device number for this interface type
  * @return 0 if OK, CMD_RET_ERROR on error
  */
-int blk_common_cmd(int argc, char * const argv[], enum if_type if_type,
+int blk_common_cmd(int argc, char *const argv[], enum if_type if_type,
 		   int *cur_devnump);
 
 #endif
diff --git a/include/bootm.h b/include/bootm.h
index edeeacb0df..1e7f29e134 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -7,9 +7,10 @@
 #ifndef _BOOTM_H
 #define _BOOTM_H
 
-#include <command.h>
 #include <image.h>
 
+struct cmd_tbl;
+
 #define BOOTM_ERR_RESET		(-1)
 #define BOOTM_ERR_OVERLAP		(-2)
 #define BOOTM_ERR_UNIMPLEMENTED	(-3)
@@ -31,13 +32,13 @@
  * @return 1 on error. On success the OS boots so this function does
  * not return.
  */
-typedef int boot_os_fn(int flag, int argc, char * const argv[],
+typedef int boot_os_fn(int flag, int argc, char *const argv[],
 			bootm_headers_t *images);
 
 extern boot_os_fn do_bootm_linux;
 extern boot_os_fn do_bootm_vxworks;
 
-int do_bootelf(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 void lynxkdi_boot(image_header_t *hdr);
 
 boot_os_fn *bootm_os_get_boot_func(int os);
@@ -46,16 +47,17 @@ boot_os_fn *bootm_os_get_boot_func(int os);
 int bootm_host_load_images(const void *fit, int cfg_noffset);
 #endif
 
-int boot_selected_os(int argc, char * const argv[], int state,
+int boot_selected_os(int argc, char *const argv[], int state,
 		     bootm_headers_t *images, boot_os_fn *boot_fn);
 
 ulong bootm_disable_interrupts(void);
 
 /* This is a special function used by booti/bootz */
-int bootm_find_images(int flag, int argc, char * const argv[]);
+int bootm_find_images(int flag, int argc, char *const argv[]);
 
-int do_bootm_states(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		    int states, bootm_headers_t *images, int boot_progress);
+int do_bootm_states(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[], int states, bootm_headers_t *images,
+		    int boot_progress);
 
 void arch_preboot_os(void);
 
diff --git a/include/bootstage.h b/include/bootstage.h
index 82f0307ef1..f507271375 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -199,11 +199,11 @@ enum bootstage_id {
 	BOOTSTAGE_ID_ACCUM_DECOMP,
 	BOOTSTAGE_ID_ACCUM_OF_LIVE,
 	BOOTSTAGE_ID_FPGA_INIT,
-	BOOTSTATE_ID_ACCUM_DM_SPL,
-	BOOTSTATE_ID_ACCUM_DM_F,
-	BOOTSTATE_ID_ACCUM_DM_R,
-	BOOTSTATE_ID_ACCUM_FSP_M,
-	BOOTSTATE_ID_ACCUM_FSP_S,
+	BOOTSTAGE_ID_ACCUM_DM_SPL,
+	BOOTSTAGE_ID_ACCUM_DM_F,
+	BOOTSTAGE_ID_ACCUM_DM_R,
+	BOOTSTAGE_ID_ACCUM_FSP_M,
+	BOOTSTAGE_ID_ACCUM_FSP_S,
 	BOOTSTAGE_ID_ACCUM_MMAP_SPI,
 
 	/* a few spare for the user, from here */
diff --git a/include/btrfs.h b/include/btrfs.h
index 5be61e3264..a7605e1589 100644
--- a/include/btrfs.h
+++ b/include/btrfs.h
@@ -8,7 +8,11 @@
 #ifndef __U_BOOT_BTRFS_H__
 #define __U_BOOT_BTRFS_H__
 
-int btrfs_probe(struct blk_desc *, disk_partition_t *);
+struct blk_desc;
+struct disk_partition;
+
+int btrfs_probe(struct blk_desc *fs_dev_desc,
+		struct disk_partition *fs_partition);
 int btrfs_ls(const char *);
 int btrfs_exists(const char *);
 int btrfs_size(const char *, loff_t *);
diff --git a/include/cbfs.h b/include/cbfs.h
index f3bc8ca24a..5f296d6a37 100644
--- a/include/cbfs.h
+++ b/include/cbfs.h
@@ -80,8 +80,6 @@ struct cbfs_cachenode {
 	u32 attributes_offset;
 };
 
-extern enum cbfs_result file_cbfs_result;
-
 /**
  * file_cbfs_error() - Return a string describing the most recent error
  * condition.
@@ -100,10 +98,10 @@ enum cbfs_result cbfs_get_result(void);
 /**
  * file_cbfs_init() - Initialize the CBFS driver and load metadata into RAM.
  *
- * @end_of_rom: Points to the end of the ROM the CBFS should be read
- *                      from.
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read from
+ * @return 0 if OK, -ve on error
  */
-void file_cbfs_init(uintptr_t end_of_rom);
+int file_cbfs_init(ulong end_of_rom);
 
 /**
  * file_cbfs_get_header() - Get the header structure for the current CBFS.
@@ -135,7 +133,7 @@ void file_cbfs_get_next(const struct cbfs_cachenode **file);
  */
 const struct cbfs_cachenode *file_cbfs_find(const char *name);
 
-struct cbfs_priv *priv;
+struct cbfs_priv;
 
 /**
  * cbfs_find_file() - Find a file in a given CBFS
@@ -151,11 +149,10 @@ const struct cbfs_cachenode *cbfs_find_file(struct cbfs_priv *cbfs,
  * cbfs_init_mem() - Set up a new CBFS
  *
  * @base: Base address of CBFS
- * @size: Size of CBFS in bytes
  * @cbfsp: Returns a pointer to CBFS on success
  * @return 0 if OK, -ve on error
  */
-int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp);
+int cbfs_init_mem(ulong base, struct cbfs_priv **privp);
 
 
 /***************************************************************************/
@@ -163,17 +160,32 @@ int cbfs_init_mem(ulong base, ulong size, struct cbfs_priv **privp);
 /***************************************************************************/
 
 /**
- * file_cbfs_find_uncached() - Find a file with a particular name in CBFS
- * without using the heap.
+ * file_cbfs_find_uncached() - Find a file in CBFS given the end of the ROM
  *
- * @end_of_rom:		Points to the end of the ROM the CBFS should be read
- *                      from.
- * @name:		The name to search for.
+ * Note that @node should be declared by the caller. This design is to avoid
+ * the need for allocation here.
  *
- * @return A handle to the file, or NULL on error.
+ * @end_of_rom: Points to the end of the ROM the CBFS should be read from
+ * @name: The name to search for
+ * @node: Returns the contents of the node if found (i.e. copied into *node)
+ * @return 0 on success, -ENOENT if not found, -EFAULT on bad header
+ */
+int file_cbfs_find_uncached(ulong end_of_rom, const char *name,
+			    struct cbfs_cachenode *node);
+
+/**
+ * file_cbfs_find_uncached_base() - Find a file in CBFS given the base address
+ *
+ * Note that @node should be declared by the caller. This design is to avoid
+ * the need for allocation here.
+ *
+ * @base: Points to the base of the CBFS
+ * @name: The name to search for
+ * @node: Returns the contents of the node if found (i.e. copied into *node)
+ * @return 0 on success, -ENOENT if not found, -EFAULT on bad header
  */
-const struct cbfs_cachenode *file_cbfs_find_uncached(uintptr_t end_of_rom,
-						     const char *name);
+int file_cbfs_find_uncached_base(ulong base, const char *name,
+				 struct cbfs_cachenode *node);
 
 /**
  * file_cbfs_name() - Get the name of a file in CBFS.
diff --git a/include/charset.h b/include/charset.h
index fde6bddbc2..5564f3bce5 100644
--- a/include/charset.h
+++ b/include/charset.h
@@ -55,7 +55,7 @@ size_t utf8_utf16_strnlen(const char *src, size_t count);
 /**
  * utf8_utf16_strlen() - length of a utf-8 string after conversion to utf-16
  *
- * @src:		utf-8 string
+ * @a:			utf-8 string
  * Return:		length in u16 after conversion to utf-16 without the
  *			trailing \0. If an invalid UTF-8 sequence is hit one
  *			u16 will be reserved for a replacement character.
@@ -75,8 +75,8 @@ int utf8_utf16_strncpy(u16 **dst, const char *src, size_t count);
 /**
  * utf8_utf16_strcpy() - copy utf-8 string to utf-16 string
  *
- * @dst:		destination buffer
- * @src:		source buffer
+ * @d:			destination buffer
+ * @s:			source buffer
  * Return:		-1 if the input parameters are invalid
  */
 #define utf8_utf16_strcpy(d, s) utf8_utf16_strncpy((d), (s), SIZE_MAX)
@@ -126,7 +126,7 @@ size_t utf16_utf8_strnlen(const u16 *src, size_t count);
 /**
  * utf16_utf8_strlen() - length of a utf-16 string after conversion to utf-8
  *
- * @src:		utf-16 string
+ * @a:			utf-16 string
  * Return:		length in bytes after conversion to utf-8 without the
  *			trailing \0. If an invalid UTF-16 sequence is hit one
  *			byte will be reserved for a replacement character.
@@ -146,8 +146,8 @@ int utf16_utf8_strncpy(char **dst, const u16 *src, size_t count);
 /**
  * utf16_utf8_strcpy() - copy utf-16 string to utf-8 string
  *
- * @dst:		destination buffer
- * @src:		source buffer
+ * @d:			destination buffer
+ * @s:			source buffer
  * Return:		-1 if the input parameters are invalid
  */
 #define utf16_utf8_strcpy(d, s) utf16_utf8_strncpy((d), (s), SIZE_MAX)
@@ -168,7 +168,7 @@ s32 utf_to_lower(const s32 code);
  */
 s32 utf_to_upper(const s32 code);
 
-/*
+/**
  * u16_strncmp() - compare two u16 string
  *
  * @s1:		first string to compare
@@ -181,6 +181,18 @@ s32 utf_to_upper(const s32 code);
  *		corresponding u16 in s2
  */
 int u16_strncmp(const u16 *s1, const u16 *s2, size_t n);
+
+/**
+ * u16_strcmp() - compare two u16 string
+ *
+ * @s1:		first string to compare
+ * @s2:		second string to compare
+ * Return:	0  if the first n u16 are the same in s1 and s2
+ *		< 0 if the first different u16 in s1 is less than the
+ *		corresponding u16 in s2
+ *		> 0 if the first different u16 in s1 is greater than the
+ *		corresponding u16 in s2
+ */
 #define u16_strcmp(s1, s2)	u16_strncmp((s1), (s2), SIZE_MAX)
 
 /**
@@ -190,12 +202,23 @@ int u16_strncmp(const u16 *s1, const u16 *s2, size_t n);
  * In the EFI context we explicitly need a function handling u16 strings.
  *
  * @in:			null terminated u16 string
- * ReturnValue:		number of non-zero words.
+ * Return:		number of non-zero words.
  *			This is not the number of utf-16 letters!
  */
 size_t u16_strlen(const void *in);
 
 /**
+ * u16_strsize() - count size of u16 string in bytes including the null
+ *		   character
+ *
+ * Counts the number of bytes occupied by a u16 string
+ *
+ * @in:			null terminated u16 string
+ * Return:		bytes in a u16 string
+ */
+size_t u16_strsize(const void *in);
+
+/**
  * u16_strlen - count non-zero words
  *
  * This function matches wscnlen_s() if the -fshort-wchar compiler flag is set.
@@ -203,7 +226,7 @@ size_t u16_strlen(const void *in);
  *
  * @in:			null terminated u16 string
  * @count:		maximum number of words to count
- * ReturnValue:		number of non-zero words.
+ * Return:		number of non-zero words.
  *			This is not the number of utf-16 letters!
  */
 size_t u16_strnlen(const u16 *in, size_t count);
@@ -240,10 +263,10 @@ u16 *u16_strdup(const void *src);
  * NOTE that a single utf16 character can generate up to 3 utf8
  * characters.  See MAX_UTF8_PER_UTF16.
  *
- * @dest   the destination buffer to write the utf8 characters
- * @src    the source utf16 string
- * @size   the number of utf16 characters to convert
- * @return the pointer to the first unwritten byte in 'dest'
+ * @dest:	the destination buffer to write the utf8 characters
+ * @src:	the source utf16 string
+ * @size:	the number of utf16 characters to convert
+ * Return:	the pointer to the first unwritten byte in 'dest'
  */
 uint8_t *utf16_to_utf8(uint8_t *dest, const uint16_t *src, size_t size);
 
diff --git a/include/clk.h b/include/clk.h
index 60c4b7d075..c6a2713f62 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -93,7 +93,7 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
 			      struct phandle_1_arg *cells, struct clk *clk);
 
 /**
- * clock_get_by_index - Get/request a clock by integer index.
+ * clk_get_by_index - Get/request a clock by integer index.
  *
  * This looks up and requests a clock. The index is relative to the client
  * device; each device is assumed to have n clocks associated with it somehow,
@@ -110,7 +110,7 @@ int clk_get_by_index_platdata(struct udevice *dev, int index,
 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk);
 
 /**
- * clock_get_by_index_nodev - Get/request a clock by integer index
+ * clk_get_by_index_nodev - Get/request a clock by integer index
  * without a device.
  *
  * This is a version of clk_get_by_index() that does not use a device.
@@ -124,7 +124,7 @@ int clk_get_by_index(struct udevice *dev, int index, struct clk *clk);
 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk);
 
 /**
- * clock_get_bulk - Get/request all clocks of a device.
+ * clk_get_bulk - Get/request all clocks of a device.
  *
  * This looks up and requests all clocks of the client device; each device is
  * assumed to have n clocks associated with it somehow, and this function finds
@@ -139,7 +139,7 @@ int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk);
 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk);
 
 /**
- * clock_get_by_name - Get/request a clock by name.
+ * clk_get_by_name - Get/request a clock by name.
  *
  * This looks up and requests a clock. The name is relative to the client
  * device; each device is assumed to have n clocks associated with it somehow,
@@ -169,7 +169,7 @@ int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk);
 int clk_get_by_name_nodev(ofnode node, const char *name, struct clk *clk);
 
 /**
- * clock_get_optional_nodev - Get/request an optinonal clock by name
+ * clk_get_optional_nodev - Get/request an optinonal clock by name
  *		without a device.
  * @node:	The client ofnode.
  * @name:	The name of the clock to request.
@@ -331,7 +331,7 @@ static inline int clk_release_bulk(struct clk_bulk *bulk)
 int clk_request(struct udevice *dev, struct clk *clk);
 
 /**
- * clock_free - Free a previously requested clock.
+ * clk_free - Free a previously requested clock.
  *
  * @clock:	A clock struct that was previously successfully requested by
  *		clk_request/get_by_*().
diff --git a/include/command.h b/include/command.h
index d1063774ce..b9b5ec1afa 100644
--- a/include/command.h
+++ b/include/command.h
@@ -27,7 +27,7 @@
  * Monitor Command Table
  */
 
-struct cmd_tbl_s {
+struct cmd_tbl {
 	char		*name;		/* Command Name			*/
 	int		maxargs;	/* maximum number of arguments	*/
 					/*
@@ -38,54 +38,57 @@ struct cmd_tbl_s {
 					 * repeatable property different for
 					 * the main command and sub-commands.
 					 */
-	int		(*cmd_rep)(struct cmd_tbl_s *cmd, int flags, int argc,
-				   char * const argv[], int *repeatable);
+	int		(*cmd_rep)(struct cmd_tbl *cmd, int flags, int argc,
+				   char *const argv[], int *repeatable);
 					/* Implementation function	*/
-	int		(*cmd)(struct cmd_tbl_s *, int, int, char * const []);
+	int		(*cmd)(struct cmd_tbl *cmd, int flags, int argc,
+			       char *const argv[]);
 	char		*usage;		/* Usage message	(short)	*/
 #ifdef	CONFIG_SYS_LONGHELP
 	char		*help;		/* Help  message	(long)	*/
 #endif
 #ifdef CONFIG_AUTO_COMPLETE
 	/* do auto completion on the arguments */
-	int		(*complete)(int argc, char * const argv[], char last_char, int maxv, char *cmdv[]);
+	int		(*complete)(int argc, char *const argv[],
+				    char last_char, int maxv, char *cmdv[]);
 #endif
 };
 
-typedef struct cmd_tbl_s	cmd_tbl_t;
-
-
 #if defined(CONFIG_CMD_RUN)
-extern int do_run(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_run(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
 #endif
 
 /* common/command.c */
-int _do_help (cmd_tbl_t *cmd_start, int cmd_items, cmd_tbl_t * cmdtp, int
-	      flag, int argc, char * const argv[]);
-cmd_tbl_t *find_cmd(const char *cmd);
-cmd_tbl_t *find_cmd_tbl (const char *cmd, cmd_tbl_t *table, int table_len);
-int complete_subcmdv(cmd_tbl_t *cmdtp, int count, int argc,
-		     char * const argv[], char last_char, int maxv,
+int _do_help(struct cmd_tbl *cmd_start, int cmd_items, struct cmd_tbl *cmdtp,
+	     int flag, int argc, char *const argv[]);
+struct cmd_tbl *find_cmd(const char *cmd);
+struct cmd_tbl *find_cmd_tbl(const char *cmd, struct cmd_tbl *table,
+			     int table_len);
+int complete_subcmdv(struct cmd_tbl *cmdtp, int count, int argc,
+		     char *const argv[], char last_char, int maxv,
 		     char *cmdv[]);
 
-extern int cmd_usage(const cmd_tbl_t *cmdtp);
+extern int cmd_usage(const struct cmd_tbl *cmdtp);
 
 /* Dummy ->cmd and ->cmd_rep wrappers. */
-int cmd_always_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[], int *repeatable);
-int cmd_never_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			 char * const argv[], int *repeatable);
-int cmd_discard_repeatable(cmd_tbl_t *cmdtp, int flag, int argc,
-			   char * const argv[]);
-
-static inline bool cmd_is_repeatable(cmd_tbl_t *cmdtp)
+int cmd_always_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[], int *repeatable);
+int cmd_never_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			 char *const argv[], int *repeatable);
+int cmd_discard_repeatable(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[]);
+
+static inline bool cmd_is_repeatable(struct cmd_tbl *cmdtp)
 {
 	return cmdtp->cmd_rep == cmd_always_repeatable;
 }
 
 #ifdef CONFIG_AUTO_COMPLETE
-extern int var_complete(int argc, char * const argv[], char last_char, int maxv, char *cmdv[]);
-extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int *colp);
+extern int var_complete(int argc, char *const argv[], char last_char, int maxv,
+			char *cmdv[]);
+extern int cmd_auto_complete(const char *const prompt, char *buf, int *np,
+			     int *colp);
 #endif
 
 /**
@@ -97,14 +100,15 @@ extern int cmd_auto_complete(const char *const prompt, char *buf, int *np, int *
  *	   1 (CMD_RET_FAILURE) if an error is found
  *	   -1 (CMD_RET_USAGE) if 'usage' error is found
  */
-int cmd_process_error(cmd_tbl_t *cmdtp, int err);
+int cmd_process_error(struct cmd_tbl *cmdtp, int err);
 
 /*
  * Monitor Command
  *
  * All commands use a common argument format:
  *
- * void function (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+ * void function(struct cmd_tbl *cmdtp, int flag, int argc,
+ *		 char *const argv[]);
  */
 
 #if defined(CONFIG_CMD_MEMORY) || \
@@ -117,36 +121,42 @@ extern int cmd_get_data_size(char* arg, int default_size);
 #endif
 
 #ifdef CONFIG_CMD_BOOTD
-extern int do_bootd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_bootd(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[]);
 #endif
 #ifdef CONFIG_CMD_BOOTM
-extern int do_bootm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-extern int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd);
+extern int do_bootm(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[]);
+extern int bootm_maybe_autostart(struct cmd_tbl *cmdtp, const char *cmd);
 #else
-static inline int bootm_maybe_autostart(cmd_tbl_t *cmdtp, const char *cmd)
+static inline int bootm_maybe_autostart(struct cmd_tbl *cmdtp, const char *cmd)
 {
 	return 0;
 }
 #endif
 
-extern int do_bootz(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_bootz(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[]);
 
-extern int do_booti(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_booti(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[]);
 
-extern int common_diskboot(cmd_tbl_t *cmdtp, const char *intf, int argc,
+extern int common_diskboot(struct cmd_tbl *cmdtp, const char *intf, int argc,
 			   char *const argv[]);
 
-extern int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-extern int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+extern int do_reset(struct cmd_tbl *cmdtp, int flag, int argc,
+		    char *const argv[]);
+extern int do_poweroff(struct cmd_tbl *cmdtp, int flag, int argc,
+		       char *const argv[]);
 
 extern unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
-				char * const argv[]);
+				char *const argv[]);
 
 #if defined(CONFIG_CMD_NVEDIT_EFI)
-extern int do_env_print_efi(cmd_tbl_t *cmdtp, int flag, int argc,
-			    char * const argv[]);
-extern int do_env_set_efi(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[]);
+extern int do_env_print_efi(struct cmd_tbl *cmdtp, int flag, int argc,
+			    char *const argv[]);
+extern int do_env_set_efi(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[]);
 #endif
 
 /*
@@ -177,10 +187,10 @@ enum command_ret_t {
  *			number of ticks the command took to complete.
  * @return 0 if the command succeeded, 1 if it failed
  */
-int cmd_process(int flag, int argc, char * const argv[],
-			       int *repeatable, unsigned long *ticks);
+int cmd_process(int flag, int argc, char *const argv[], int *repeatable,
+		unsigned long *ticks);
 
-void fixup_cmdtable(cmd_tbl_t *cmdtp, int size);
+void fixup_cmdtable(struct cmd_tbl *cmdtp, int size);
 
 /**
  * board_run_command() - Fallback function to execute a command
@@ -254,10 +264,11 @@ int run_command_list(const char *cmd, int len, int flag);
 #endif
 
 #define U_BOOT_SUBCMDS_DO_CMD(_cmdname)					\
-	static int do_##_cmdname(cmd_tbl_t *cmdtp, int flag, int argc,	\
-				 char * const argv[], int *repeatable)	\
+	static int do_##_cmdname(struct cmd_tbl *cmdtp, int flag,	\
+				 int argc, char *const argv[],		\
+				 int *repeatable)			\
 	{								\
-		cmd_tbl_t *subcmd;					\
+		struct cmd_tbl *subcmd;					\
 									\
 		_cmdname##_subcmds_reloc();				\
 									\
@@ -280,7 +291,7 @@ int run_command_list(const char *cmd, int len, int flag);
 
 #ifdef CONFIG_AUTO_COMPLETE
 #define U_BOOT_SUBCMDS_COMPLETE(_cmdname)				\
-	static int complete_##_cmdname(int argc, char * const argv[],	\
+	static int complete_##_cmdname(int argc, char *const argv[],	\
 				       char last_char, int maxv,	\
 				       char *cmdv[])			\
 	{								\
@@ -294,7 +305,7 @@ int run_command_list(const char *cmd, int len, int flag);
 #endif
 
 #define U_BOOT_SUBCMDS(_cmdname, ...)					\
-	static cmd_tbl_t _cmdname##_subcmds[] = { __VA_ARGS__ };	\
+	static struct cmd_tbl _cmdname##_subcmds[] = { __VA_ARGS__ };	\
 	U_BOOT_SUBCMDS_RELOC(_cmdname)					\
 	U_BOOT_SUBCMDS_DO_CMD(_cmdname)					\
 	U_BOOT_SUBCMDS_COMPLETE(_cmdname)
@@ -312,18 +323,18 @@ int run_command_list(const char *cmd, int len, int flag);
 		 _cmd, _usage, _CMD_HELP(_help) _CMD_COMPLETE(_comp) }
 
 #define U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, _comp) \
-	ll_entry_declare(cmd_tbl_t, _name, cmd) =			\
+	ll_entry_declare(struct cmd_tbl, _name, cmd) =			\
 		U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd,	\
 						_usage, _help, _comp);
 
 #define U_BOOT_CMDREP_COMPLETE(_name, _maxargs, _cmd_rep, _usage,	\
 			       _help, _comp)				\
-	ll_entry_declare(cmd_tbl_t, _name, cmd) =			\
+	ll_entry_declare(struct cmd_tbl, _name, cmd) =			\
 		U_BOOT_CMDREP_MKENT_COMPLETE(_name, _maxargs, _cmd_rep,	\
 					     _usage, _help, _comp)
 
 #else
-#define U_BOOT_SUBCMD_START(name)	static cmd_tbl_t name[] = {};
+#define U_BOOT_SUBCMD_START(name)	static struct cmd_tbl name[] = {};
 #define U_BOOT_SUBCMD_END
 
 #define _CMD_REMOVE(_name, _cmd)					\
diff --git a/include/common.h b/include/common.h
index 0ef8505fc7..f0679ac705 100644
--- a/include/common.h
+++ b/include/common.h
@@ -16,30 +16,16 @@
 #include <config.h>
 #include <errno.h>
 #include <time.h>
-#include <asm-offsets.h>
-#include <linux/bitops.h>
-#include <linux/bug.h>
-#include <linux/delay.h>
 #include <linux/types.h>
 #include <linux/printk.h>
 #include <linux/string.h>
-#include <linux/stringify.h>
-#include <asm/ptrace.h>
 #include <stdarg.h>
 #include <stdio.h>
 #include <linux/kernel.h>
-#include <part.h>
-#include <flash.h>
-#include <image.h>
-#include <log.h>
 #include <asm/u-boot.h> /* boot information for Linux kernel */
 #include <asm/global_data.h>	/* global data used for startup functions */
-#include <init.h>
 #include <display_options.h>
-#include <uuid.h>
 #include <vsprintf.h>
-#include <net.h>
-#include <bootstage.h>
 #endif	/* __ASSEMBLY__ */
 
 /* Pull in stuff for the build system */
diff --git a/include/config_fsl_chain_trust.h b/include/config_fsl_chain_trust.h
index 4f522dbecc..3922241be0 100644
--- a/include/config_fsl_chain_trust.h
+++ b/include/config_fsl_chain_trust.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_FSL_CHAIN_TRUST_H
 #define __CONFIG_FSL_CHAIN_TRUST_H
 
+#include <linux/stringify.h>
+
 #ifdef CONFIG_CHAIN_OF_TRUST
 
 #ifndef CONFIG_EXTRA_ENV
diff --git a/include/config_phylib_all_drivers.h b/include/config_phylib_all_drivers.h
index 36df725b82..8e587bc7e7 100644
--- a/include/config_phylib_all_drivers.h
+++ b/include/config_phylib_all_drivers.h
@@ -12,21 +12,4 @@
 #ifndef _CONFIG_PHYLIB_ALL_H
 #define _CONFIG_PHYLIB_ALL_H
 
-#ifdef CONFIG_PHYLIB
-
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_BROADCOM
-#define CONFIG_PHY_DAVICOM
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_NATSEMI
-#define CONFIG_PHY_LXT
-#define CONFIG_PHY_ATHEROS
-#define CONFIG_PHY_SMSC
-
-#ifdef CONFIG_PHYLIB_10G
-#define CONFIG_PHY_TERANETICS
-#endif /* CONFIG_PHYLIB_10G */
-
-#endif /* CONFIG_PHYLIB */
-
 #endif /*_CONFIG_PHYLIB_ALL_H */
diff --git a/include/configs/10m50_devboard.h b/include/configs/10m50_devboard.h
index 3948d68014..6abfe393fc 100644
--- a/include/configs/10m50_devboard.h
+++ b/include/configs/10m50_devboard.h
@@ -69,10 +69,5 @@
  */
 #define CONFIG_SYS_LOAD_ADDR		0xcc000000	/* Half of RAM */
 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MONITOR_BASE - \
-					 CONFIG_ENV_SIZE - \
-					 CONFIG_SYS_MALLOC_LEN -	\
-					 0x10000)
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/3c120_devboard.h b/include/configs/3c120_devboard.h
index 97bce43ce4..445eef8b15 100644
--- a/include/configs/3c120_devboard.h
+++ b/include/configs/3c120_devboard.h
@@ -69,10 +69,5 @@
  */
 #define CONFIG_SYS_LOAD_ADDR		0xd4000000	/* Half of RAM */
 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MONITOR_BASE - \
-					 CONFIG_ENV_SIZE - \
-					 CONFIG_SYS_MALLOC_LEN -	\
-					 0x10000)
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 1a34b95bec..a515bf9530 100644
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * B4860 QDS board configuration file
  */
@@ -128,8 +130,6 @@ unsigned long get_board_ddr_clk(void);
 #if 0
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY	/* test POST memory test */
 #endif
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 /*
  *  Config the L3 Cache as L3 SRAM
@@ -586,9 +586,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_TERANETICS
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x10
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h
index 31879f86e5..879173f6f2 100644
--- a/include/configs/BSC9131RDB.h
+++ b/include/configs/BSC9131RDB.h
@@ -56,9 +56,6 @@
 #define CONFIG_L2_CACHE			/* toggle L2 cache */
 #define CONFIG_BTB			/* enable branch predition */
 
-#define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x01ffffff
-
 /* DDR Setup */
 #undef CONFIG_SYS_DDR_RAW_TIMING
 #undef CONFIG_DDR_SPD
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 4fc64a8f18..ac37ae7cb8 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -94,9 +94,6 @@
 #define CONFIG_L2_CACHE			/* toggle L2 cache */
 #define CONFIG_BTB			/* enable branch predition */
 
-#define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x01ffffff
-
 /* DDR Setup */
 #define CONFIG_SYS_SPD_BUS_NUM		0
 #define SPD_EEPROM_ADDRESS1		0x54 /* I2C access */
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index d21537c773..9a8cba6b7c 100644
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
@@ -105,9 +107,6 @@
 #define CONFIG_ADDR_MAP			1
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /* DDR Setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_SYS_SPD_BUS_NUM		0
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index d1cb003ff5..fc389b8e87 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -104,9 +104,6 @@
 #define CONFIG_SYS_SDRAM_EMOD		0x80010000
 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h
index 884ed11dba..8261f4811c 100644
--- a/include/configs/M52277EVB.h
+++ b/include/configs/M52277EVB.h
@@ -13,6 +13,8 @@
 #ifndef _M52277EVB_H
 #define _M52277EVB_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -144,9 +146,6 @@
 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
 #define CONFIG_SYS_SDRAM_DRV_STRENGTH	0x00
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #ifdef CONFIG_CF_SBF
 #	define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_TEXT_BASE + 0x400)
 #else
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 2a90525256..4ab3d4831c 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -112,9 +112,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
 #define CONFIG_SYS_SDRAM_SIZE		16	/* SDRAM size in MB */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index 97c09f94c7..065e1e9281 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -39,9 +39,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x200000	/* default load address */
 
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
-
 /*
  * Clock configuration: enable only one of the following options
  */
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 9fc0f5f4d1..69e3fbae78 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -6,6 +6,8 @@
 #ifndef _M5253DEMO_H
 #define _M5253DEMO_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_MCFTMR
 
 #define CONFIG_MCFUART
@@ -84,9 +86,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x00100000
 
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
-
 #undef CONFIG_SYS_PLL_BYPASS		/* bypass PLL for test purpose */
 #define CONFIG_SYS_FAST_CLK
 #ifdef CONFIG_SYS_FAST_CLK
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 4f5e609255..5056629043 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -79,8 +79,6 @@
 	""
 
 #define CONFIG_SYS_LOAD_ADDR		0x20000
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
 #define CONFIG_SYS_CLK			66000000
 
 /*
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 3efed0fb37..ed93f4ad78 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -72,8 +72,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x800000
 
 #define CONFIG_BOOTCOMMAND	"bootm ffe40000"
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
 
 #ifdef CONFIG_MCFFEC
 #	define CONFIG_NET_RETRY_COUNT	5
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index 62b3d3183d..e7859f334a 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -77,9 +77,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x20000
 
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
-
 #define	CONFIG_SYS_CLK			64000000
 
 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 9ae38ff3cf..b934dc1388 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -120,9 +120,6 @@
 #define CONFIG_SYS_SDRAM_EMOD		0x80010000
 #define CONFIG_SYS_SDRAM_MODE		0x00CD0000
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index d0ddd089af..5c88f09f64 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -116,9 +116,6 @@
 #define CONFIG_SYS_SDRAM_EMOD		0x40010000
 #define CONFIG_SYS_SDRAM_MODE		0x018D0000
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index fe0f5b84fd..f94cc02905 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -13,6 +13,8 @@
 #ifndef _M5373EVB_H
 #define _M5373EVB_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -116,9 +118,6 @@
 #define CONFIG_SYS_SDRAM_EMOD		0x40010000
 #define CONFIG_SYS_SDRAM_MODE		0x018D0000
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h
index 62e3453860..2866bfd85f 100644
--- a/include/configs/M54418TWR.h
+++ b/include/configs/M54418TWR.h
@@ -13,6 +13,8 @@
 #ifndef _M54418TWR_H
 #define _M54418TWR_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -178,8 +180,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define CONFIG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x400)
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 #define CONFIG_SYS_DRAM_TEST
 
 #if defined(CONFIG_CF_SBF) || defined(CONFIG_SYS_NAND_BOOT)
diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h
index 7b48c662be..ec4284216f 100644
--- a/include/configs/M54451EVB.h
+++ b/include/configs/M54451EVB.h
@@ -13,6 +13,8 @@
 #ifndef _M54451EVB_H
 #define _M54451EVB_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -152,9 +154,6 @@
 #define CONFIG_SYS_SDRAM_MODE		0x008D0000
 #define CONFIG_SYS_SDRAM_DRV_STRENGTH	0x44
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #ifdef CONFIG_CF_SBF
 #	define CONFIG_SERIAL_BOOT
 #	define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_TEXT_BASE + 0x400)
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index 34653f7a46..291adeaf0d 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -13,6 +13,8 @@
 #ifndef _M54455EVB_H
 #define _M54455EVB_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  * (easy to change)
@@ -201,9 +203,6 @@
 #define CONFIG_SYS_SDRAM_MODE		0x00010033
 #define CONFIG_SYS_SDRAM_DRV_STRENGTH	0xAA
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #ifdef CONFIG_CF_SBF
 #	define CONFIG_SERIAL_BOOT
 #	define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_TEXT_BASE + 0x400)
diff --git a/include/configs/M5475EVB.h b/include/configs/M5475EVB.h
index f5c007127e..406830c98d 100644
--- a/include/configs/M5475EVB.h
+++ b/include/configs/M5475EVB.h
@@ -159,9 +159,6 @@
 #	define CONFIG_SYS_SDRAM_SIZE	CONFIG_SYS_DRAMSZ
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/M5485EVB.h b/include/configs/M5485EVB.h
index ccc88ac316..cd8dd67043 100644
--- a/include/configs/M5485EVB.h
+++ b/include/configs/M5485EVB.h
@@ -147,9 +147,6 @@
 #	define CONFIG_SYS_SDRAM_SIZE	CONFIG_SYS_DRAMSZ
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE + 0x400
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
-
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE + 0x400)
 #define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
 
diff --git a/include/configs/MCR3000.h b/include/configs/MCR3000.h
index 72533bc807..557c2ebcdb 100644
--- a/include/configs/MCR3000.h
+++ b/include/configs/MCR3000.h
@@ -60,9 +60,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START	0x00002000
-#define CONFIG_SYS_MEMTEST_END		0x00800000
-
 #define	CONFIG_SYS_LOAD_ADDR		0x200000
 
 #define	CONFIG_SYS_HZ			1000
diff --git a/include/configs/MPC8308RDB.h b/include/configs/MPC8308RDB.h
index 29561c4101..788a325b64 100644
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -101,8 +103,6 @@
 /*
  * Memory test
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC8313ERDB_NAND.h b/include/configs/MPC8313ERDB_NAND.h
index ea5762a5ef..d8485f6fbd 100644
--- a/include/configs/MPC8313ERDB_NAND.h
+++ b/include/configs/MPC8313ERDB_NAND.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -57,9 +59,6 @@
 #define CONFIG_DEFAULT_IMMR	CONFIG_SYS_IMMR
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00001000
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
-
 /* Early revs of this board will lock up hard when attempting
  * to access the PMC registers, unless a JTAG debugger is
  * connected, or some resistor modifications are made.
diff --git a/include/configs/MPC8313ERDB_NOR.h b/include/configs/MPC8313ERDB_NOR.h
index 9d4a6716c7..029d2f1ec3 100644
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -18,6 +18,7 @@
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
 #endif
 
+#include <linux/stringify.h>
 #define CONFIG_PCI_INDIRECT_BRIDGE
 
 /*
@@ -29,9 +30,6 @@
 #define CONFIG_VSC7385_ENET
 #define CONFIG_TSEC2
 
-#define CONFIG_SYS_MEMTEST_START	0x00001000
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
-
 /* Early revs of this board will lock up hard when attempting
  * to access the PMC registers, unless a JTAG debugger is
  * connected, or some resistor modifications are made.
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 5085a95635..2c35223868 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -98,8 +98,6 @@
  * Memory test
  */
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00040000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00140000
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
index d39ba8f5d9..ff18d10872 100644
--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -85,8 +87,6 @@
  * Memory test
  */
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00030000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x03f00000
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index f410763a7e..bfcff2e4f8 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -85,8 +85,6 @@
  * Memory test
  */
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 295cb16990..0a80a60d30 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -18,8 +18,6 @@
 #define CONFIG_E300		1	/* E300 Family */
 
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000      /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * DDR Setup
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 79f2e38e95..79dd956174 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -18,8 +18,6 @@
 #define CONFIG_E300		1	/* E300 Family */
 
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000      /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * DDR Setup
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index d0ae923ec3..dd517639ea 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -52,6 +52,7 @@
 #define CONFIG_SYS_USB_HOST	/* use the EHCI USB controller */
 #endif
 
+#include <linux/stringify.h>
 #define CONFIG_RTC_DS1337
 #define CONFIG_SYS_I2C
 
@@ -144,8 +145,6 @@
  */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000 /* DDR is system memory*/
 #define CONFIG_SYS_83XX_DDR_USES_CS0
-#define CONFIG_SYS_MEMTEST_START	0x1000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x2000
 
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	(DDR_SDRAM_CLK_CNTL_SS_EN \
 					| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
diff --git a/include/configs/MPC837XEMDS.h b/include/configs/MPC837XEMDS.h
index e5b411b12c..1254b4fc10 100644
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -107,8 +107,6 @@
  * Memory test
  */
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00040000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00140000
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 2ceb123a07..8c2297a910 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -132,8 +134,6 @@
  * Memory test
  */
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00040000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x0ef70010
 
 /*
  * The reserved memory
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 8fc8dfd2b2..340574a985 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_SDCARD
@@ -58,9 +60,6 @@
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 #endif
 
-#define CONFIG_SYS_MEMTEST_START 0x00010000	/* skip exception vectors */
-#define CONFIG_SYS_MEMTEST_END   0x1f000000	/* skip u-boot at top of RAM */
-
 /*
  * Config the L2 Cache as L2 SRAM
  */
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index a5483dabaf..2ba7322021 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -58,9 +58,6 @@
 #define CONFIG_L2_CACHE			/* toggle L2 cache */
 #define CONFIG_BTB			/* toggle branch predition */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index f81f4b0e64..b2a3201072 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -32,9 +32,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_L2_CACHE			    /* toggle L2 cache	*/
 #define CONFIG_BTB			    /* toggle branch predition */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 4eb2888cae..c9f193fc46 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -22,6 +22,7 @@
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 #ifndef __ASSEMBLY__
+#include <linux/stringify.h>
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0) /* sysclk for MPC85xx */
@@ -37,9 +38,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 #define CONFIG_ENABLE_36BIT_PHYS	1
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index a68d190f6a..de2bfd8f2f 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2004, 2007, 2010-2011 Freescale Semiconductor.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -26,6 +27,7 @@
 #define CONFIG_FSL_VIA
 
 #ifndef __ASSEMBLY__
+#include <linux/stringify.h>
 extern unsigned long get_clock_freq(void);
 #endif
 #define CONFIG_SYS_CLK_FREQ	get_clock_freq() /* sysclk for MPC85xx */
@@ -46,9 +48,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
@@ -304,12 +303,18 @@ extern unsigned long get_clock_freq(void);
 /*
  * I2C
  */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x69} }
+#else
+#define CONFIG_SYS_SPD_BUS_NUM 0
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+#define CONFIG_SYS_I2C_FSL
 
 /* EEPROM */
 #define CONFIG_ID_EEPROM
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index d53e156f30..d964b4e121 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -32,9 +32,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_L2_CACHE			    /* toggle L2 cache	*/
 #define CONFIG_BTB			    /* toggle branch predition */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 20684dc6f3..97d8cc48ed 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -17,6 +17,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/delay.h>
+
 /* High Level Configuration Options */
 #define CONFIG_CPM2		1	/* has CPM2 */
 
@@ -57,9 +59,6 @@
 
 #define CONFIG_SYS_INIT_DBCR DBCR_IDM		/* Enable Debug Exceptions */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
@@ -288,8 +287,6 @@
   #define FETH3_RST		0x80
 #endif					/* CONFIG_ETHER_INDEX */
 
-#define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
-
 /*
  * GPIO pins used for bit-banged MII communications
  */
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 3a078a363c..a0bd5f4d40 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -35,9 +35,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_ENABLE_36BIT_PHYS	1
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index da86f94e54..beba848214 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -47,9 +47,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_HWCONFIG
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  * Config the L2 Cache as L2 SRAM
  */
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 0f4c7e6f48..3243f39df4 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -48,9 +50,6 @@
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x7fffffff
-
 /*
  * Config the L2 Cache as L2 SRAM
  */
diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 8b10a6cfef..eb85141702 100644
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /* High Level Configuration Options */
 #define CONFIG_LINUX_RESET_VEC	0x100	/* Reset vector used by Linux */
 
@@ -56,9 +58,6 @@
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0)
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index db05a6cb07..edbeeefdd4 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -15,6 +15,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /* High Level Configuration Options */
 #define CONFIG_LINUX_RESET_VEC	0x100	/* Reset vector used by Linux */
 #define CONFIG_ADDR_MAP		1	/* Use addr map */
@@ -63,9 +65,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0)
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  * With the exception of PCI Memory and Rapid IO, most devices will simply
  * add CONFIG_SYS_PHYS_ADDR_HIGH to the front of the 32-bit VA to get the PA
diff --git a/include/configs/MigoR.h b/include/configs/MigoR.h
index c58b7814ba..b6f315a47b 100644
--- a/include/configs/MigoR.h
+++ b/include/configs/MigoR.h
@@ -27,12 +27,8 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF0	1
 
-#define CONFIG_SYS_MEMTEST_START	(MIGO_R_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-
 /* Enable alternate, more extensive, memory test */
 /* Scratch address used by the alternate memory test */
-#undef  CONFIG_SYS_MEMTEST_SCRATCH
 
 /* Enable temporary baudrate change while serial download */
 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 60e8904d42..8f709a6cac 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include <asm/config_mpc85xx.h>
 #define CONFIG_NAND_FSL_IFC
 
@@ -113,8 +116,6 @@
 #if defined(CONFIG_PCI)
 #define CONFIG_PCIE1			/* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2			/* PCIE controller 2 (slot 2) */
-#define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 /*
@@ -122,19 +123,13 @@
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 /* controller 1, Slot 1, tgtid 1, Base address a000 */
-#define CONFIG_SYS_PCIE1_NAME		"mini PCIe Slot"
 #define CONFIG_SYS_PCIE1_MEM_VIRT	0x80000000
 #ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE1_MEM_BUS	0x80000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xc00000000ull
 #else
-#define CONFIG_SYS_PCIE1_MEM_BUS	0x80000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0x80000000
 #endif
-#define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
 #define CONFIG_SYS_PCIE1_IO_VIRT	0xffc00000
-#define CONFIG_SYS_PCIE1_IO_BUS		0x00000000
-#define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xfffc00000ull
 #else
@@ -142,27 +137,45 @@
 #endif
 
 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
+#define CONFIG_SYS_PCIE2_MEM_VIRT	0xa0000000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE2_MEM_PHYS	0xc20000000ull
+#else
+#define CONFIG_SYS_PCIE2_MEM_PHYS	0xa0000000
+#endif
+#define CONFIG_SYS_PCIE2_IO_VIRT	0xffc10000
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE2_IO_PHYS	0xfffc10000ull
+#else
+#define CONFIG_SYS_PCIE2_IO_PHYS	0xffc10000
+#endif
+
+#if !defined(CONFIG_DM_PCI)
+#define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
+#define CONFIG_PCI_INDIRECT_BRIDGE	/* indirect PCI bridge support */
+#define CONFIG_SYS_PCIE1_NAME		"mini PCIe Slot"
+#ifdef CONFIG_PHYS_64BIT
+#define CONFIG_SYS_PCIE1_MEM_BUS	0x80000000
+#else
+#define CONFIG_SYS_PCIE1_MEM_BUS	0x80000000
+#endif
+#define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
+#define CONFIG_SYS_PCIE1_IO_BUS		0x00000000
+#define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
+
 #if defined(CONFIG_TARGET_P1010RDB_PA)
 #define CONFIG_SYS_PCIE2_NAME		"PCIe Slot"
 #elif defined(CONFIG_TARGET_P1010RDB_PB)
 #define CONFIG_SYS_PCIE2_NAME		"mini PCIe Slot"
 #endif
-#define CONFIG_SYS_PCIE2_MEM_VIRT	0xa0000000
 #ifdef CONFIG_PHYS_64BIT
 #define CONFIG_SYS_PCIE2_MEM_BUS	0xc0000000
-#define CONFIG_SYS_PCIE2_MEM_PHYS	0xc20000000ull
 #else
 #define CONFIG_SYS_PCIE2_MEM_BUS	0xa0000000
-#define CONFIG_SYS_PCIE2_MEM_PHYS	0xa0000000
 #endif
 #define CONFIG_SYS_PCIE2_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCIE2_IO_VIRT	0xffc10000
 #define CONFIG_SYS_PCIE2_IO_BUS		0x00000000
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
-#ifdef CONFIG_PHYS_64BIT
-#define CONFIG_SYS_PCIE2_IO_PHYS	0xfffc10000ull
-#else
-#define CONFIG_SYS_PCIE2_IO_PHYS	0xffc10000
 #endif
 
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
@@ -188,9 +201,6 @@
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x1fffffff
-
 /* DDR Setup */
 #define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_DDR_SPD
@@ -522,17 +532,22 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
 #define CONFIG_SYS_FSL_I2C2_SPEED	400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x3100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
 #define I2C_PCA9557_ADDR1		0x18
 #define I2C_PCA9557_ADDR2		0x19
 #define I2C_PCA9557_BUS_NUM		0
+#define CONFIG_SYS_I2C_FSL
 
 /* I2C EEPROM */
 #if defined(CONFIG_TARGET_P1010RDB_PB)
diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 5cc2e06979..2b761078bc 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_SDCARD
@@ -100,9 +102,6 @@
 #define CONFIG_L2_CACHE
 #define CONFIG_BTB
 
-#define CONFIG_SYS_MEMTEST_START	0x00000000
-#define CONFIG_SYS_MEMTEST_END		0x7fffffff
-
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
@@ -359,8 +358,8 @@
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
@@ -368,6 +367,8 @@
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x3100
 #define CONFIG_SYS_I2C_NOPROBES		{{0, 0x29}}
+#endif
+#define CONFIG_SYS_I2C_FSL
 
 /*
  * I2C2 EEPROM
diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index 1818b4b70d..6bf3cd5950 100644
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #ifndef CONFIG_SYS_MONITOR_BASE
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_TEXT_BASE	/* start of monitor */
 #endif
@@ -42,9 +44,6 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#define CONFIG_SYS_MEMTEST_START	0x01000000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x02000000
-
 /* Implement conversion of addresses in the LBC */
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_SYS_LBC_LCRR		LCRR_CLKDIV_8
@@ -277,10 +276,6 @@ extern unsigned long get_clock_freq(void);
 /* For FM */
 #define CONFIG_SYS_DPAA_FMAN
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_ATHEROS
-#endif
-
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
 #define CONFIG_SYS_FMAN_FW_ADDR	0xEFF00000
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index f6472b9e11..59404cbaf9 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -55,6 +56,7 @@
 
 #ifndef __ASSEMBLY__
 unsigned long get_board_sys_clk(unsigned long dummy);
+#include <linux/stringify.h>
 #endif
 #define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0)
 
@@ -74,8 +76,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY	/* test POST memory test */
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 /*
  *  Config the L3 Cache as L3 SRAM
@@ -267,14 +267,20 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x118000
 #define CONFIG_SYS_FSL_I2C2_SPEED	400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+#define CONFIG_SYS_I2C_FSL
+
 
 /*
  * RapidIO
@@ -418,12 +424,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_TERANETICS
-#endif
-
 #ifdef CONFIG_PCI
 #if !defined(CONFIG_DM_PCI)
 #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
index b17113ab9a..8f31fc4c74 100644
--- a/include/configs/SBx81LIFKW.h
+++ b/include/configs/SBx81LIFKW.h
@@ -80,8 +80,6 @@
 /*
  * Other required minimal configurations
  */
-#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
-#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 
 /*
diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h
index 462e62c7c2..f4440e5764 100644
--- a/include/configs/SBx81LIFXCAT.h
+++ b/include/configs/SBx81LIFXCAT.h
@@ -80,8 +80,6 @@
 /*
  * Other required minimal configurations
  */
-#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
-#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 
 /*
diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 8ac260c2bc..53ae961837 100644
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __T1024QDS_H
 #define __T1024QDS_H
 
+#include <linux/stringify.h>
+
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -147,9 +150,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -437,14 +437,20 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 #define CONFIG_SYS_FSL_I2C_SPEED	50000	/* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_SPEED	50000	/* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x118000
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+
+#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 
 #define I2C_MUX_PCA_ADDR		0x77
 #define I2C_MUX_PCA_ADDR_PRI		0x77 /* Primary Mux*/
@@ -460,6 +466,7 @@ unsigned long get_board_ddr_clk(void);
 /* LDI/DVI Encoder for display */
 #define CONFIG_SYS_I2C_LDI_ADDR	 0x38
 #define CONFIG_SYS_I2C_DVI_ADDR	 0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM 0
 
 /*
  * RTC configuration
@@ -653,10 +660,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define RGMII_PHY1_ADDR		0x1
 #define RGMII_PHY2_ADDR		0x2
 #define SGMII_CARD_AQ_PHY_ADDR_S3 0x3
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 43897a711a..f5d9657444 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __T1024RDB_H
 #define __T1024RDB_H
 
+#include <linux/stringify.h>
+
 /* High Level Configuration Options */
 #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -162,9 +165,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -434,15 +434,20 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 #define CONFIG_SYS_FSL_I2C_SPEED	50000	/* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_SPEED	50000	/* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x118000
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
 
+#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 #define I2C_PCA6408_BUS_NUM		1
 #define I2C_PCA6408_ADDR		0x20
 
@@ -610,7 +615,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_REALTEK
 #if defined(CONFIG_TARGET_T1024RDB)
 #define RGMII_PHY1_ADDR		0x2
 #define RGMII_PHY2_ADDR		0x6
diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index aa2a8b00de..7ad018b6d7 100644
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -1,5 +1,6 @@
 /*
  * Copyright 2013-2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -23,6 +24,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * T1040 QDS board configuration file
  */
@@ -90,9 +93,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		64	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -360,6 +360,8 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /* I2C */
+
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 #define CONFIG_SYS_FSL_I2C_SPEED	50000	/* I2C speed in Hz */
@@ -374,6 +376,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
 #define CONFIG_SYS_FSL_I2C3_OFFSET	0x119000
 #define CONFIG_SYS_FSL_I2C4_OFFSET	0x119100
+#endif
+
+#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 
 #define I2C_MUX_PCA_ADDR		0x77
 #define I2C_MUX_PCA_ADDR_PRI		0x77 /* Primary Mux*/
@@ -385,6 +390,7 @@ unsigned long get_board_ddr_clk(void);
 /* LDI/DVI Encoder for display */
 #define CONFIG_SYS_I2C_LDI_ADDR         0x38
 #define CONFIG_SYS_I2C_DVI_ADDR         0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM	0
 
 /*
  * RTC configuration
@@ -540,10 +546,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x10
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 50b37acf05..4237dfcd6c 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -1,11 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * T104x RDB board configuration file
  */
@@ -27,6 +30,7 @@
 #define CONFIG_SPL_SKIP_RELOCATE
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
+#undef CONFIG_DM_I2C
 #endif
 #define RESET_VECTOR_OFFSET		0x27FFC
 #define BOOT_PAGE_OFFSET		0x27000
@@ -185,9 +189,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		64	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -459,8 +460,8 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 #define CONFIG_SYS_FSL_I2C_SPEED	400000	/* I2C speed in Hz */
 #define CONFIG_SYS_FSL_I2C2_SPEED	400000
 #define CONFIG_SYS_FSL_I2C3_SPEED	400000
@@ -473,7 +474,12 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
 #define CONFIG_SYS_FSL_I2C3_OFFSET	0x119000
 #define CONFIG_SYS_FSL_I2C4_OFFSET	0x119100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
 
+#define CONFIG_SYS_I2C_FSL		/* Use FSL common I2C driver */
 /* I2C bus multiplexer */
 #define I2C_MUX_PCA_ADDR                0x70
 #define I2C_MUX_CH_DEFAULT      0x8
@@ -484,6 +490,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 /* LDI/DVI Encoder for display */
 #define CONFIG_SYS_I2C_LDI_ADDR		0x38
 #define CONFIG_SYS_I2C_DVI_ADDR		0x75
+#define CONFIG_SYS_I2C_DVI_BUS_NUM	0
 
 /*
  * RTC configuration
@@ -654,11 +661,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif /* CONFIG_NOBQFMAN */
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#endif
-
 #ifdef CONFIG_FMAN_ENET
 #if defined(CONFIG_TARGET_T1040RDB) || defined(CONFIG_TARGET_T1042RDB)
 #define CONFIG_SYS_SGMII1_PHY_ADDR             0x03
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index be5a658d7e..c54f7f53e5 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2011-2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __T208xQDS_H
 #define __T208xQDS_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 #if defined(CONFIG_ARCH_T2080)
 #define CONFIG_FSL_SATA_V2
@@ -385,8 +388,8 @@ unsigned long get_board_ddr_clk(void);
 /*
  * I2C
  */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C3_SLAVE  0x7F
@@ -399,6 +402,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_I2C2_SPEED  100000
 #define CONFIG_SYS_FSL_I2C3_SPEED  100000
 #define CONFIG_SYS_FSL_I2C4_SPEED  100000
+#endif
+
+#define CONFIG_SYS_I2C_FSL
+
 #define I2C_MUX_PCA_ADDR_PRI	0x77 /* I2C bus multiplexer,primary */
 #define I2C_MUX_PCA_ADDR_SEC1	0x75 /* I2C bus multiplexer,secondary 1 */
 #define I2C_MUX_PCA_ADDR_SEC2	0x76 /* I2C bus multiplexer,secondary 2 */
@@ -587,9 +594,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define RGMII_PHY1_ADDR	0x1
 #define RGMII_PHY2_ADDR	0x2
 #define FM1_10GEC1_PHY_ADDR	  0x3
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 68de90fbbb..70eafc3e28 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -10,6 +11,8 @@
 #ifndef __T2080RDB_H
 #define __T2080RDB_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
 #define CONFIG_FSL_SATA_V2
 
@@ -99,9 +102,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 #if defined(CONFIG_SPIFLASH)
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_SYS_MMC_ENV_DEV	0
@@ -333,8 +333,8 @@ unsigned long get_board_ddr_clk(void);
 /*
  * I2C
  */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SLAVE   0x7F
 #define CONFIG_SYS_FSL_I2C2_SLAVE  0x7F
 #define CONFIG_SYS_FSL_I2C3_SLAVE  0x7F
@@ -347,6 +347,13 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_FSL_I2C2_SPEED  100000
 #define CONFIG_SYS_FSL_I2C3_SPEED  100000
 #define CONFIG_SYS_FSL_I2C4_SPEED  100000
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+
+#define CONFIG_SYS_I2C_FSL
+
 #define I2C_MUX_PCA_ADDR_PRI	0x77 /* I2C bus multiplexer,primary */
 #define I2C_MUX_PCA_ADDR_SEC1	0x75 /* I2C bus multiplexer,secondary 1 */
 #define I2C_MUX_PCA_ADDR_SEC2	0x76 /* I2C bus multiplexer,secondary 2 */
@@ -536,7 +543,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_REALTEK
 #define CONFIG_CORTINA_FW_LENGTH	0x40000
 #define RGMII_PHY1_ADDR		0x01  /* RealTek RTL8211E */
 #define RGMII_PHY2_ADDR		0x02
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 94e0ddbd88..d92af7202b 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
 
@@ -280,6 +282,19 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
+#define CONFIG_SYS_I2C
+#else
+#undef CONFIG_SYS_I2C
+#undef CONFIG_SYS_FSL_I2C2_OFFSET
+#undef CONFIG_SYS_FSL_I2C2_SLAVE
+#undef CONFIG_SYS_FSL_I2C2_SPEED
+#undef CONFIG_SYS_FSL_I2C_SLAVE
+#undef CONFIG_SYS_FSL_I2C_SPEED
+#undef CONFIG_SYS_FSL_I2C_OFFSET
+#endif
+
+#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	100000	/* I2C speed */
 #define CONFIG_SYS_FSL_I2C2_SPEED	100000	/* I2C2 speed */
 #define I2C_MUX_PCA_ADDR_PRI		0x77 /* I2C bus multiplexer,primary */
@@ -404,9 +419,6 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_TERANETICS
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x1D
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 042757c20e..fcfd3b0b4b 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -9,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_PCIE4
 
@@ -80,9 +83,6 @@
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		64	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
@@ -159,12 +159,18 @@
 #define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x118000
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+
+#define CONFIG_SYS_I2C_FSL
 
 /*
  * General PCI
@@ -546,11 +552,8 @@ unsigned long get_board_ddr_clk(void);
 #endif /* CONFIG_NOBQFMAN */
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
 #define CONFIG_CORTINA_FW_ADDR		0xefe00000
 #define CONFIG_CORTINA_FW_LENGTH	0x40000
-#define CONFIG_PHY_TERANETICS
 #define SGMII_PHY_ADDR1 0x0
 #define SGMII_PHY_ADDR2 0x1
 #define SGMII_PHY_ADDR3 0x2
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index f557a3c936..40fe62fdf0 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -30,8 +30,6 @@
 #undef CONFIG_SPD_EEPROM	/* do not use SPD EEPROM for DDR setup */
 
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * FLASH on the Local Bus
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 68276a15a7..cfc9567332 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -13,6 +13,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*** Arcturus FirmWare Environment */
 
 #define MAX_SERIAL_SIZE 15
@@ -164,9 +166,6 @@
 
 #define CONFIG_ENABLE_36BIT_PHYS
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x1fffffff
-
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index 5b035c7ec5..48dfe68ff9 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -112,8 +112,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x300000
 
 /* memtest works on 63 MB in DRAM */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + 0x03F00000)
 
 /*
  * Static memory controller configuration
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index 71c7fe929d..2c316a76e1 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -224,8 +224,6 @@
 #define CONFIG_SYS_LOAD_ADDR		0x300000
 
 /* memtest works on 63 MB in DRAM */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + 0x03F00000)
 
 /*
  * Static memory controller configuration
diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h
index a115676d4c..d44028d510 100644
--- a/include/configs/advantech_dms-ba16.h
+++ b/include/configs/advantech_dms-ba16.h
@@ -55,7 +55,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME		"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		4
-#define CONFIG_PHY_ATHEROS
 
 /* Serial Flash */
 
@@ -184,10 +183,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/alt.h b/include/configs/alt.h
index bb5267517c..8456a6b2c3 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -31,7 +31,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index f2f10040bc..6de463efa1 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -285,9 +285,7 @@
 /* SPI flash. */
 
 /* Network. */
-#define CONFIG_PHY_SMSC
 /* Enable Atheros phy driver */
-#define CONFIG_PHY_ATHEROS
 
 /*
  * NOR Size = 16 MiB
diff --git a/include/configs/am335x_igep003x.h b/include/configs/am335x_igep003x.h
index 5b5e16026e..95ba949b21 100644
--- a/include/configs/am335x_igep003x.h
+++ b/include/configs/am335x_igep003x.h
@@ -101,7 +101,6 @@
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* UART0 */
 
 /* Ethernet support */
-#define CONFIG_PHY_SMSC
 
 /* NAND support */
 #define CONFIG_SYS_NAND_ONFI_DETECTION	1
diff --git a/include/configs/am335x_shc.h b/include/configs/am335x_shc.h
index eabf19ddeb..6e1a40c678 100644
--- a/include/configs/am335x_shc.h
+++ b/include/configs/am335x_shc.h
@@ -246,7 +246,6 @@
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_SMSC
 
 /* I2C configuration */
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
diff --git a/include/configs/am335x_sl50.h b/include/configs/am335x_sl50.h
index 0453cb2965..9087e04165 100644
--- a/include/configs/am335x_sl50.h
+++ b/include/configs/am335x_sl50.h
@@ -81,6 +81,5 @@
 #endif
 
 /* Network. */
-#define CONFIG_PHY_SMSC
 
 #endif	/* ! __CONFIG_AM335X_SL50_H */
diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h
index 6087a29ef4..5c00191f4d 100644
--- a/include/configs/am3517_crane.h
+++ b/include/configs/am3517_crane.h
@@ -145,9 +145,6 @@
 #define CONFIG_SYS_MAXARGS		32	/* max number of command */
 						/* args */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
 								/* address */
diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h
index 89c82cee07..cc5e8314c7 100644
--- a/include/configs/am3517_evm.h
+++ b/include/configs/am3517_evm.h
@@ -153,9 +153,6 @@
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 /* Physical Memory Map */
 #define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index bc1fc8c7b0..641d8fdbd5 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -32,9 +32,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x20000	/* default load address */
 
-#define CONFIG_SYS_MEMTEST_START	0x0
-#define CONFIG_SYS_MEMTEST_END		0x1000000
-
 #define CONFIG_SYS_HZ			1000
 
 #define CONFIG_SYS_CLK			45000000
diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index 07ba195a12..4902d07247 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -35,7 +35,5 @@
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START        0x80100000
-#define CONFIG_SYS_MEMTEST_END          0x83f00000
 
 #endif  /* __CONFIG_H */
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index d6c22d5489..c79e050dc9 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -39,7 +39,5 @@
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START        0x80100000
-#define CONFIG_SYS_MEMTEST_END          0x83f00000
 
 #endif  /* __CONFIG_H */
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
index 73378b95f3..0d2c484bb9 100644
--- a/include/configs/ap152.h
+++ b/include/configs/ap152.h
@@ -41,7 +41,5 @@
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START        0x80100000
-#define CONFIG_SYS_MEMTEST_END          0x83f00000
 
 #endif  /* __CONFIG_H */
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index bea035c3e2..08d34db106 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -24,6 +24,7 @@
 
 /* Networking */
 #define FEC_QUIRK_ENET_MAC
+#define FEC_ENET_ENABLE_TXC_DELAY
 
 #define CONFIG_TFTP_TSIZE
 
@@ -82,9 +83,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x80200000
 
-#define CONFIG_SYS_MEMTEST_START	0x88000000
-#define CONFIG_SYS_MEMTEST_END		0x89000000
-
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
 #define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC1 eMMC */
 #define CONFIG_SYS_MMC_ENV_PART		1
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index fb0037444f..6f03058a78 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #undef CONFIG_DISPLAY_BOARDINFO
@@ -210,10 +212,6 @@
 #undef CONFIG_SYS_MAXARGS
 #define CONFIG_SYS_MAXARGS		48
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/apf27.h b/include/configs/apf27.h
index 351b27094a..cecd485e20 100644
--- a/include/configs/apf27.h
+++ b/include/configs/apf27.h
@@ -9,6 +9,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_ENV_VERSION	10
 #define CONFIG_BOARD_NAME apf27
 
@@ -54,8 +56,6 @@
 #define PHYS_SDRAM_2			0xB0000000
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (512<<10))
-#define CONFIG_SYS_MEMTEST_START	0xA0000000	/* memtest test area  */
-#define CONFIG_SYS_MEMTEST_END		0xA0300000	/* 3 MiB RAM test */
 
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_SDRAM_BASE	\
 		+ PHYS_SDRAM_1_SIZE - 0x0100000)
diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h
index 5f4a4f854f..2674cb8b76 100644
--- a/include/configs/aristainetos2.h
+++ b/include/configs/aristainetos2.h
@@ -407,10 +407,6 @@
 
 #define CONFIG_ARP_TIMEOUT		200UL
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index e9f1eb2142..f85cd98140 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -40,10 +40,6 @@
 #define SCIF4_BASE		0xe6c80000
 #define	CONFIG_SCIF_A
 
-#define CONFIG_SYS_MEMTEST_START	(ARMADILLO_800EVA_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 504 * 1024 * 1024)
-#undef	CONFIG_SYS_MEMTEST_SCRATCH
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
 #define CONFIG_SYS_SDRAM_BASE		(ARMADILLO_800EVA_SDRAM_BASE)
@@ -77,8 +73,6 @@
 #define CONFIG_SH_ETHER_BASE_ADDR	0xe9a00000
 #define CONFIG_SH_ETHER_SH7734_MII	(0x01)
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_PHY_SMSC
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index e1128043b0..7eec226173 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -171,9 +171,6 @@
 
 /* Defines memory range for test */
 
-#define CONFIG_SYS_MEMTEST_START	0x40020000
-#define CONFIG_SYS_MEMTEST_END		0x41ffffff
-
 /*
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h
index e52f7e440b..37b9cc3b6f 100644
--- a/include/configs/at91rm9200ek.h
+++ b/include/configs/at91rm9200ek.h
@@ -57,10 +57,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x20000000
 #define CONFIG_SYS_SDRAM_SIZE		SZ_32M
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		\
-		(CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - SZ_256K)
-
 /*
  * LowLevel Init
  */
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 3156118e96..e27c276a46 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -108,9 +108,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 39b879b3b1..c3fe41636b 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -95,9 +95,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #ifdef CONFIG_SYS_USE_DATAFLASH_CS0
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index c08845b3c8..51ecf4173b 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -10,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * SoC must be defined first, before hardware.h is included.
  * In this case SoC is defined in boards.cfg.
@@ -178,6 +180,7 @@
 		 AT91_WDT_MR_WDD(0xfff))
 
 #endif
+#include <linux/stringify.h>
 #endif
 
 /* NAND flash */
@@ -208,9 +211,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #ifdef CONFIG_SYS_USE_DATAFLASH
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h
index ee207cfcca..8e2a7631f4 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -69,9 +69,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		0x23e00000
-
 #ifdef CONFIG_NAND_BOOT
 /* bootstrap + u-boot + env in nandflash */
 
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index caa487b038..706217fef9 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -63,14 +63,8 @@
 	"bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
 
 /* Ethernet */
-#define CONFIG_KS8851_MLL
-#define CONFIG_KS8851_MLL_BASEADDR	0x30000000 /* use NCS2 */
-
 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* load address */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		0x26e00000
-
 /* USB host */
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 1da26049fd..92b87a2b49 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -66,9 +66,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #ifdef CONFIG_SYS_USE_DATAFLASH
 
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h
index d85a486764..eb94a19072 100644
--- a/include/configs/at91sam9x5ek.h
+++ b/include/configs/at91sam9x5ek.h
@@ -67,9 +67,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		0x26e00000
-
 #ifdef CONFIG_NAND_BOOT
 /* bootstrap + u-boot + env + linux in nandflash */
 #define CONFIG_BOOTCOMMAND	"nand read " \
diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h
index 4504962171..34fc6b616e 100644
--- a/include/configs/ax25-ae350.h
+++ b/include/configs/ax25-ae350.h
@@ -91,8 +91,6 @@
 /*
  * memtest works on 512 MB in DRAM
  */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
 
 /*
  * FLASH and environment organization
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h
index 297800eb42..c51b850f6d 100644
--- a/include/configs/bav335x.h
+++ b/include/configs/bav335x.h
@@ -449,7 +449,6 @@ DEFAULT_LINUX_BOOT_ENV \
 /* SPI flash. */
 
 /* Network. */
-#define CONFIG_PHY_SMSC
 
 /*
  * NOR Size = 16 MiB
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index ba5eb7a4a8..5f6bf62524 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -15,6 +15,7 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/stringify.h>
 #include <linux/types.h>
 
 struct bcmstb_boot_parameters {
@@ -129,7 +130,6 @@ extern phys_addr_t prior_stage_fdt_address;
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_CACHE
 #define CONFIG_CMD_EXT2
-#define CONFIG_CMD_MMC
 
 /*
  * Flash configuration.
diff --git a/include/configs/bk4r1.h b/include/configs/bk4r1.h
index 0566892e15..f88172a05c 100644
--- a/include/configs/bk4r1.h
+++ b/include/configs/bk4r1.h
@@ -241,9 +241,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START	0x80010000
-#define CONFIG_SYS_MEMTEST_END		0x87C00000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical memory map */
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index 7ee38a7ef9..fd29c5d0f1 100644
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -22,7 +22,6 @@
 #define RCAR_GEN2_SDRAM_SIZE		(1024u * 1024 * 1024)
 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	(512 * 1024 * 1024)
 
-#undef	CONFIG_SYS_MEMTEST_SCRATCH
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
 /* FLASH */
diff --git a/include/configs/boston.h b/include/configs/boston.h
index e5dc0c8e32..b9a9965eec 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -35,9 +35,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x08000000)
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x10000000)
-
 #define CONFIG_SYS_MALLOC_LEN		(256 * 1024)
 
 /*
diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h
index 3019b97d92..68931c1358 100644
--- a/include/configs/brppt1.h
+++ b/include/configs/brppt1.h
@@ -13,6 +13,7 @@
 
 #include <configs/bur_cfg_common.h>
 #include <configs/bur_am335x_common.h>
+#include <linux/stringify.h>
 /* ------------------------------------------------------------------------- */
 /* memory */
 #define CONFIG_SYS_MALLOC_LEN		(5 * 1024 * 1024)
diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h
index 6c073ab383..e95769b2d7 100644
--- a/include/configs/brppt2.h
+++ b/include/configs/brppt2.h
@@ -90,8 +90,6 @@ BUR_COMMON_ENV \
 /* RAM */
 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x10010000
 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
 #define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/brsmarc1.h b/include/configs/brsmarc1.h
index 4bff349a03..5aa68d1d46 100644
--- a/include/configs/brsmarc1.h
+++ b/include/configs/brsmarc1.h
@@ -14,6 +14,7 @@
 
 #include <configs/bur_cfg_common.h>
 #include <configs/bur_am335x_common.h>
+#include <linux/stringify.h>
 /* ------------------------------------------------------------------------- */
 #define CONFIG_BOARD_TYPES
 
diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h
index 006663373b..9db011358e 100644
--- a/include/configs/brxre1.h
+++ b/include/configs/brxre1.h
@@ -13,6 +13,7 @@
 
 #include <configs/bur_cfg_common.h>
 #include <configs/bur_am335x_common.h>
+#include <linux/stringify.h>
 /* ------------------------------------------------------------------------- */
 #if !defined(CONFIG_AM335X_LCD)
 #define CONFIG_AM335X_LCD
diff --git a/include/configs/caddy2.h b/include/configs/caddy2.h
index 63a7581d68..459712190a 100644
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -26,8 +26,6 @@
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
 #undef CONFIG_SYS_DRAM_TEST			/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * DDR Setup
diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index 254b3a5a76..2ad54f4907 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -167,10 +167,6 @@
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1 GB */
 #define PHYS_SDRAM_2_SIZE		0x00000000	/* 0 GB */
 
-#define CONFIG_SYS_MEMTEST_START	0xA0000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 (PHYS_SDRAM_1_SIZE >> 2))
-
 /* Console buffer and boot args */
 #define CONFIG_SYS_CBSIZE		2048
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index befa06faaa..fccc9b18c0 100644
--- a/include/configs/cgtqmx6eval.h
+++ b/include/configs/cgtqmx6eval.h
@@ -12,6 +12,8 @@
 #ifndef __CONFIG_CGTQMX6EVAL_H
 #define __CONFIG_CGTQMX6EVAL_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #define CONFIG_MACH_TYPE	4122
@@ -79,7 +81,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		6
-#define CONFIG_PHY_ATHEROS
 
 /* Command definition */
 
@@ -188,10 +189,6 @@
 		"fi; " \
 	"else run netboot; fi"
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END	       0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index ca7ce31e1a..f4dcc54508 100644
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -167,6 +167,5 @@
 #endif
 
 /* Network. */
-#define CONFIG_PHY_SMSC
 
 #endif	/* ! __CONFIG_CHILIBOARD_H */
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index 0f9c2ac53a..e6b4e233d6 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -25,8 +25,6 @@
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
 #define CONFIG_SYS_LOAD_ADDR		0x81000000
 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x88000000
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index f9ffb4de80..b923bae9b2 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -23,8 +23,6 @@
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0
 
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
 /* ENET1 */
 #define IMX_FEC_BASE			ENET_IPS_BASE_ADDR
 
@@ -113,9 +111,6 @@
 	"echo eMMC boot attempt ...; run emmcbootscript; run emmcboot; " \
 	"echo USB boot attempt ...; run usbbootscript; "
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h
index 53ff830e81..459e0d9d5e 100644
--- a/include/configs/clearfog.h
+++ b/include/configs/clearfog.h
@@ -6,6 +6,8 @@
 #ifndef _CONFIG_CLEARFOG_H
 #define _CONFIG_CLEARFOG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options (easy to change)
  */
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index 53ae5f08eb..302907dcfb 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -24,8 +24,6 @@
 #define PHYS_SDRAM_1			MMDC0_ARB_BASE_ADDR
 #define PHYS_SDRAM_2			MMDC1_ARB_BASE_ADDR
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x10010000
 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
 #define CONFIG_SYS_INIT_SP_OFFSET \
@@ -165,7 +163,6 @@
 #define CONFIG_FEC_MXC_PHYADDR		0
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define IMX_FEC_BASE			ENET_BASE_ADDR
-#define CONFIG_PHY_ATHEROS
 #define CONFIG_ETHPRIME			"FEC0"
 #define CONFIG_ARP_TIMEOUT		200UL
 #define CONFIG_NET_RETRY_COUNT		5
diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h
index e0fc7fc3b1..342cc7fddc 100644
--- a/include/configs/cm_t335.h
+++ b/include/configs/cm_t335.h
@@ -90,7 +90,6 @@
 /* SPL */
 
 /* Network. */
-#define CONFIG_PHY_ATHEROS
 
 /* NAND support */
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h
index 5bd9a49f4d..fffea0da18 100644
--- a/include/configs/cm_t35.h
+++ b/include/configs/cm_t35.h
@@ -148,10 +148,7 @@
 #define CONFIG_TIMESTAMP
 #define CONFIG_SYS_AUTOLOAD		"no"
 
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)	/* memtest */
 								/* works on */
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
 							/* load address */
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h
index 1314cf96a2..55d9f5352b 100644
--- a/include/configs/cm_t43.h
+++ b/include/configs/cm_t43.h
@@ -45,7 +45,6 @@
 /* CPSW Ethernet support */
 #define CONFIG_BOOTP_DEFAULT
 #define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_PHY_ATHEROS
 #define CONFIG_SYS_RX_ETH_BUFFER	64
 
 /* USB support */
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index a9f5e5e8a5..fe23c2396c 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -155,9 +155,6 @@ from which user programs will be started */
  * ---
  */
 
-#define CONFIG_SYS_MEMTEST_START	0x400
-#define CONFIG_SYS_MEMTEST_END		0x380000
-
 /* ---
  * Low Level Configuration Settings
  * (address mappings, register initial values, etc.)
diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h
index 2a76f576a8..2d3b4c1817 100644
--- a/include/configs/colibri-imx6ull.h
+++ b/include/configs/colibri-imx6ull.h
@@ -113,9 +113,6 @@
 	"videomode=video=ctfb:x:640,y:480,depth:18,pclk:39722,le:48,ri:16,up:33,lo:10,hs:96,vs:2,sync:0,vmode:0\0" \
 	"vidargs=video=mxsfb:640x480M-16@60"
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x08000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index 311ed439f6..da9226e2fb 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -8,6 +8,7 @@
 
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 
 #define CONFIG_REMAKE_ELF
 
@@ -114,9 +115,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x80200000
 
-#define CONFIG_SYS_MEMTEST_START	0x88000000
-#define CONFIG_SYS_MEMTEST_END		0x89000000
-
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
 #define CONFIG_SYS_MMC_ENV_DEV		0	/* USDHC1 eMMC */
 #define CONFIG_SYS_MMC_ENV_PART		1
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index 4cdd3c53af..3d248ef4ef 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #undef CONFIG_DISPLAY_BOARDINFO
@@ -189,10 +191,6 @@
 #undef CONFIG_SYS_MAXARGS
 #define CONFIG_SYS_MAXARGS		48
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h
index 7c00f78ef1..09722f47e7 100644
--- a/include/configs/colibri_imx7.h
+++ b/include/configs/colibri_imx7.h
@@ -194,9 +194,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x0c000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 111bb27126..29827f1ee8 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -86,9 +86,6 @@
 #define	CONFIG_SYS_DRAM_BASE		0xa0000000	/* CS0 */
 #define	CONFIG_SYS_DRAM_SIZE		0x04000000	/* 64 MB DRAM */
 
-#define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM */
-
 #define	CONFIG_SYS_LOAD_ADDR		PHYS_SDRAM_1
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
 #define	CONFIG_SYS_INIT_SP_ADDR		0x5c010000
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index b03ccaf094..7d17bd8e6a 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -138,9 +138,6 @@
 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-#define CONFIG_SYS_MEMTEST_START	0x80010000
-#define CONFIG_SYS_MEMTEST_END		0x87C00000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
diff --git a/include/configs/condor.h b/include/configs/condor.h
index c286dbb406..36466f0f50 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -12,7 +12,6 @@
 #include "rcar-gen3-common.h"
 
 /* Ethernet RAVB */
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Environment compatibility */
@@ -24,7 +23,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index d62c784e5b..34d268e061 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -26,6 +26,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #ifdef CONFIG_SDCARD
 #define CONFIG_RAMBOOT_SDCARD
 #endif
@@ -121,9 +123,6 @@
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
 #define CONFIG_CHIP_SELECTS_PER_CTRL	(2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
-#define CONFIG_SYS_MEMTEST_START	0x00000000
-#define CONFIG_SYS_MEMTEST_END		0x3fffffff
-
 #ifdef CONFIG_TRAILBLAZER
 #define CONFIG_SPD_EEPROM
 #define SPD_EEPROM_ADDRESS 0x52
diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h
index 1f6d0c533c..a326a1c83d 100644
--- a/include/configs/controlcenterdc.h
+++ b/include/configs/controlcenterdc.h
@@ -54,7 +54,6 @@
 /*
  * Software (bit-bang) MII driver configuration
  */
-#define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
 #define CONFIG_BITBANGMII_MULTI
 
 /* SPL */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index bafedcb0d2..a49f9056c5 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2009-2012 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -9,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "../board/freescale/common/ics307_clk.h"
 
 #ifdef CONFIG_RAMBOOT_PBL
@@ -87,8 +90,6 @@
 #endif
 
 #define CONFIG_POST CONFIG_SYS_POST_MEMORY	/* test POST memory test */
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 /*
  *  Config the L3 Cache as L3 SRAM
@@ -276,14 +277,19 @@
 #define CONFIG_SYS_NS16550_COM4	(CONFIG_SYS_CCSRBAR+0x11D600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x118000
 #define CONFIG_SYS_FSL_I2C2_SPEED	400000
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x118100
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+#define CONFIG_SYS_I2C_FSL
 
 /*
  * RapidIO
@@ -431,12 +437,6 @@
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_TERANETICS
-#endif
-
 #ifdef CONFIG_PCI
 #if !defined(CONFIG_DM_PCI)
 #define CONFIG_FSL_PCI_INIT	/* Use common FSL init code */
diff --git a/include/configs/crs305-1g-4s.h b/include/configs/crs3xx-98dx3236.h
index 617c8af83a..e2ba7b8126 100644
--- a/include/configs/crs305-1g-4s.h
+++ b/include/configs/crs3xx-98dx3236.h
@@ -3,8 +3,8 @@
  * Copyright (C) 2014 Stefan Roese <sr@denx.de>
  */
 
-#ifndef _CONFIG_CRS305_1G_4S_H
-#define _CONFIG_CRS305_1G_4S_H
+#ifndef _CONFIG_CRS3XX_98DX3236_H
+#define _CONFIG_CRS3XX_98DX3236_H
 
 /*
  * High Level Configuration Options (easy to change)
@@ -32,4 +32,4 @@
 #undef CONFIG_SYS_MAXARGS
 #define CONFIG_SYS_MAXARGS 96
 
-#endif /* _CONFIG_CRS305_1G_4S_H */
+#endif /* _CONFIG_CRS3XX_98DX3236_H */
diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 49fee9249b..052e6018a3 100644
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -6,6 +6,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #if !defined(CONFIG_ARCH_P5020) && !defined(CONFIG_ARCH_P5040)
 #error Must call Cyrus CONFIG with a specific CPU enabled.
 #endif
@@ -75,8 +77,6 @@
 
 /* test POST memory test */
 #undef CONFIG_POST
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 /*
  *  Config the L3 Cache as L3 SRAM
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index 5bd5cd85c8..4d651264dd 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -42,10 +42,8 @@
 #define CONFIG_SPL_BSS_START_ADDR DAVINCI_DDR_EMIF_DATA_BASE
 #define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
 /* memtest start addr */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
 
 /* memtest will be run on 16MB */
-#define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
 
 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (	\
 	DAVINCI_SYSCFG_SUSPSRC_TIMER0 |		\
diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h
index 894a8d7973..d933f79e34 100644
--- a/include/configs/dart_6ul.h
+++ b/include/configs/dart_6ul.h
@@ -7,6 +7,7 @@
 #define __DART_6UL_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 
 /* SPL options */
@@ -62,8 +63,6 @@
 #endif
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/db-88f6281-bp.h b/include/configs/db-88f6281-bp.h
index 749adb2907..cc51e6646e 100644
--- a/include/configs/db-88f6281-bp.h
+++ b/include/configs/db-88f6281-bp.h
@@ -69,8 +69,6 @@
 /*
  * Other required minimal configurations
  */
-#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
-#define CONFIG_SYS_MEMTEST_END	0x007fffff	/* (_8M - 1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 
 /*
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 911ab9aa4e..4471a12f34 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -24,8 +24,6 @@
 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE		SZ_64M
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_32K)
 
@@ -57,15 +55,9 @@
 #define CONFIG_LPC32XX_GPIO
 
 /*
- * SSP/SPI
- */
-#define CONFIG_LPC32XX_SSP_TIMEOUT	100000
-
-/*
  * Ethernet
  */
 #define CONFIG_RMII
-#define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index baf1a73b95..21af126c4b 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -138,9 +138,6 @@
 #define CONFIG_BOOTCOMMAND "run autoboot"
 
 /* Boot Argument Buffer Size */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0 + 0x07000000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					0x01000000) /* 16MB */
 
 /* SRAM config */
 #define CONFIG_SYS_SRAM_START              0x40200000
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 087d020cdd..efb3cfee35 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -137,10 +137,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
-
 /* Environment */
 
 #endif	/* __DH_IMX6_CONFIG_H */
diff --git a/include/configs/dh_stm32mp1.h b/include/configs/dh_stm32mp1.h
new file mode 100644
index 0000000000..89d317ba2b
--- /dev/null
+++ b/include/configs/dh_stm32mp1.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ *
+ * Configuration settings for the DH STM32MP15x SoMs
+ */
+
+#ifndef __CONFIG_DH_STM32MP1_H__
+#define __CONFIG_DH_STM32MP1_H__
+
+#include <configs/stm32mp1.h>
+
+#define CONFIG_SPL_TARGET		"u-boot.itb"
+
+#endif
diff --git a/include/configs/draak.h b/include/configs/draak.h
index 78ec444af5..3248320b9d 100644
--- a/include/configs/draak.h
+++ b/include/configs/draak.h
@@ -12,7 +12,6 @@
 #include "rcar-gen3-common.h"
 
 /* Ethernet RAVB */
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Generic Timer Definitions (use in assembler source) */
diff --git a/include/configs/draco.h b/include/configs/draco.h
index 016532f336..396eb7ded5 100644
--- a/include/configs/draco.h
+++ b/include/configs/draco.h
@@ -36,8 +36,6 @@
 #define EEPROM_ADDR_DDR3 0x90
 #define EEPROM_ADDR_CHIP 0x120
 
-#define CONFIG_PHY_SMSC
-
 #define CONFIG_FACTORYSET
 
 /* Define own nand partitions */
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index e3693767b6..b179b99468 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -87,7 +87,10 @@
 #define CONFIG_SPL_STACK		(0x40000000 + ((192 - 16) << 10))
 #define CONFIG_SPL_BOOTROM_SAVE		(CONFIG_SPL_STACK + 4)
 
+#if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
 /* SPL related SPI defines */
+#define CONFIG_SYS_U_BOOT_OFFS		CONFIG_SYS_SPI_U_BOOT_OFFS
+#endif
 
 /* DS414 bus width is 32bits */
 #define CONFIG_DDR_32BIT
diff --git a/include/configs/eagle.h b/include/configs/eagle.h
index b567caa174..ee53504250 100644
--- a/include/configs/eagle.h
+++ b/include/configs/eagle.h
@@ -12,7 +12,6 @@
 #include "rcar-gen3-common.h"
 
 /* Ethernet RAVB */
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Environment compatibility */
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 61c321c132..d441f28d4a 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -54,8 +54,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x20000
 
-#define CONFIG_SYS_MEMTEST_START	0x100000
-#define CONFIG_SYS_MEMTEST_END		0x400000
 /*#define CONFIG_SYS_DRAM_TEST		1 */
 #undef CONFIG_SYS_DRAM_TEST
 
diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h
index 0e246629bc..521a348435 100644
--- a/include/configs/ebisu.h
+++ b/include/configs/ebisu.h
@@ -15,7 +15,6 @@
 
 /* Ethernet RAVB */
 #define CONFIG_NET_MULTI
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Generic Timer Definitions (use in assembler source) */
diff --git a/include/configs/edison.h b/include/configs/edison.h
index 3e174e9aa5..3918a9fc1c 100644
--- a/include/configs/edison.h
+++ b/include/configs/edison.h
@@ -25,9 +25,6 @@
 
 #define CONFIG_SYS_MALLOC_LEN			(128 * 1024 * 1024)
 
-#define CONFIG_SYS_MEMTEST_START		0x00100000
-#define CONFIG_SYS_MEMTEST_END			0x01000000
-
 /* Environment */
 #define CONFIG_SYS_MMC_ENV_DEV			0
 #define CONFIG_SYS_MMC_ENV_PART			0
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 60dfee81b7..cfee974045 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -182,8 +182,6 @@
  */
 
 #define CONFIG_SYS_LOAD_ADDR		0x00800000
-#define CONFIG_SYS_MEMTEST_START	0x00400000
-#define CONFIG_SYS_MEMTEST_END		0x007fffff
 #define CONFIG_SYS_RESET_ADDRESS	0xffff0000
 
 /* Enable command line editing */
diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h
index 95c04c3797..f7b96e4825 100644
--- a/include/configs/el6x_common.h
+++ b/include/configs/el6x_common.h
@@ -8,6 +8,8 @@
 #ifndef __EL6Q_COMMON_CONFIG_H
 #define __EL6Q_COMMON_CONFIG_H
 
+#include <linux/stringify.h>
+
 #define CONFIG_BOARD_NAME		EL6Q
 
 #include "mx6_common.h"
@@ -74,10 +76,6 @@
 
 #define CONFIG_ARP_TIMEOUT     200UL
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10800000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h
index 481066b71e..24a0025eda 100644
--- a/include/configs/embestmx6boards.h
+++ b/include/configs/embestmx6boards.h
@@ -47,14 +47,8 @@
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		4
 
-#define CONFIG_PHY_ATHEROS
-
 #define CONFIG_ARP_TIMEOUT     200UL
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 4ce8f93103..880149fb89 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -93,8 +93,6 @@
 #define EEPROM_ADDR_DDR3 0x90
 #define EEPROM_ADDR_CHIP 0x120
 
-#define CONFIG_PHY_SMSC
-
 #define CONFIG_FACTORYSET
 
 /* use both define to compile a SPL compliance test  */
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 39a4a066ad..d121b395df 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -37,9 +37,6 @@
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE \
-					- CONFIG_SYS_MALLOC_LEN)
 
 /* 512kB on-chip NOR flash */
 # define CONFIG_SYS_MAX_FLASH_BANKS	1
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
index 7a0ea753be..0ff01af833 100644
--- a/include/configs/evb_ast2500.h
+++ b/include/configs/evb_ast2500.h
@@ -11,9 +11,6 @@
 
 #include <configs/aspeed-common.h>
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x300000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x5000000)
-
 #define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
 
 /* Memory Info */
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 5ae2b427ca..bb34a9e83b 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -14,6 +14,7 @@
 
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index 5911a8a639..dff6a26f3b 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -49,8 +49,6 @@
 
 /* Boot Argument Buffer Size */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 
 #define CONFIG_RD_LVL
diff --git a/include/configs/flea3.h b/include/configs/flea3.h
index fded5a11da..02fedb1823 100644
--- a/include/configs/flea3.h
+++ b/include/configs/flea3.h
@@ -79,9 +79,6 @@
 /* Print Buffer Size */
 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
 
-#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x10000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /*
diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h
index f5ee65cb8a..78d2136248 100644
--- a/include/configs/gardena-smart-gateway-at91sam.h
+++ b/include/configs/gardena-smart-gateway-at91sam.h
@@ -9,6 +9,10 @@
 #ifndef __CONFIG_H__
 #define __CONFIG_H__
 
+#ifndef __ASSEMBLY__
+#include <linux/bitops.h>
+#endif
+
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768
 #define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */
diff --git a/include/configs/gardena-smart-gateway-mt7688.h b/include/configs/gardena-smart-gateway-mt7688.h
index 6412efcbf8..261749db8d 100644
--- a/include/configs/gardena-smart-gateway-mt7688.h
+++ b/include/configs/gardena-smart-gateway-mt7688.h
@@ -44,8 +44,6 @@
 					  230400, 460800, 921600 }
 
 /* RAM */
-#define CONFIG_SYS_MEMTEST_START	0x80100000
-#define CONFIG_SYS_MEMTEST_END		0x80400000
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/gazerbeam.h b/include/configs/gazerbeam.h
index 6a7a93144b..f8df0c8ceb 100644
--- a/include/configs/gazerbeam.h
+++ b/include/configs/gazerbeam.h
@@ -20,8 +20,6 @@
  * Memory test
  * TODO: Migrate!
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x07e00000
 
 /*
  * The reserved memory
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index 3bf0cd518c..e40be93ca7 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -144,10 +144,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/gose.h b/include/configs/gose.h
index fcb9f17750..60a89e0023 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -27,7 +27,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index b875f9b132..001e9d385b 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -16,7 +16,6 @@
 
 /* Miscellaneous */
 #define CONFIG_SYS_PBSIZE	256
-#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 #define CONFIG_CMDLINE_TAG
 
 /* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */
@@ -43,7 +42,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 #endif	/* __GRPEACH_H */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index d169aa19de..bf4b3b297e 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -131,9 +131,6 @@
 #define CONFIG_HWCONFIG
 
 /* Memory configuration */
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END	       0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
 
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/helios4.h b/include/configs/helios4.h
index af595bc7bc..671c3d291d 100644
--- a/include/configs/helios4.h
+++ b/include/configs/helios4.h
@@ -7,6 +7,7 @@
 #define _CONFIG_HELIOS4_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 
 /*
  * High Level Configuration Options (easy to change)
@@ -52,7 +53,6 @@
 /* stay within first 1M */
 #endif
 
-#define CONFIG_PHY_MARVELL		/* there is a marvell phy */
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 
 /* Keep device tree and initrd in lower memory so the kernel can access them */
diff --git a/include/configs/highbank.h b/include/configs/highbank.h
index 8d16e18d8b..76add4eba8 100644
--- a/include/configs/highbank.h
+++ b/include/configs/highbank.h
@@ -51,8 +51,6 @@
  * The DRAM is already setup, so do not touch the DT node later.
  */
 #define PHYS_SDRAM_1_SIZE		(4089 << 20)
-#define CONFIG_SYS_MEMTEST_START	0x100000
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1_SIZE - 0x100000)
 
 /* Environment data setup
 */
diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 43c31e6a2c..76c4ee9777 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -90,8 +92,6 @@
 /*
  * Memory test
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
 
 /*
  * The reserved memory
@@ -293,7 +293,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 /*
  * Software (bit-bang) MII driver configuration
  */
-#define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
 #define CONFIG_BITBANGMII_MULTI
 
 /*
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index b96d4e82ad..bcd8aee7c3 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -11,6 +11,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -240,9 +242,6 @@
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
 
-#define CONFIG_SYS_MEMTEST_START	0x00001000
-#define CONFIG_SYS_MEMTEST_END		0x00C00000
-
 #define CONFIG_SYS_LOAD_ADDR		0x100000
 #define CONFIG_LOADS_ECHO
 #define CONFIG_TIMESTAMP
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index 82ac4242bb..67fa4a5a09 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -70,8 +70,6 @@
 /* malloc() len */
 #define CONFIG_SYS_MALLOC_LEN		(0x10000 + 512 * 1024)
 /* memtest start address */
-#define CONFIG_SYS_MEMTEST_START	0xA0000000
-#define CONFIG_SYS_MEMTEST_END		0xA1000000	/* 16MB RAM test */
 #define PHYS_SDRAM_1		0xA0000000	/* DDR Start */
 #define PHYS_SDRAM_1_SIZE	0x08000000	/* DDR size 128MB */
 
diff --git a/include/configs/imx6-engicam.h b/include/configs/imx6-engicam.h
index 18327fb4c3..72ae89c5f6 100644
--- a/include/configs/imx6-engicam.h
+++ b/include/configs/imx6-engicam.h
@@ -10,6 +10,7 @@
 #define __IMX6_ENGICAM_CONFIG_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 
 /* Size of malloc() pool */
@@ -104,8 +105,6 @@
 #define CONFIG_BOOTCOMMAND		"run $modeboot"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index 2274db0e22..63662dd18d 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -116,10 +116,6 @@
 
 #define CONFIG_ARP_TIMEOUT     200UL
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h
index b6e336a33d..d4a613d0ad 100644
--- a/include/configs/imx6dl-mamoj.h
+++ b/include/configs/imx6dl-mamoj.h
@@ -70,8 +70,6 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR		0x1000  /* 2MB */
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
new file mode 100644
index 0000000000..21102d3c14
--- /dev/null
+++ b/include/configs/imx8mm_beacon.h
@@ -0,0 +1,152 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Compass Electronics Group, LLC
+ */
+
+#ifndef __IMX8MM_BEACON_H
+#define __IMX8MM_BEACON_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#ifdef CONFIG_SECURE_BOOT
+#define CONFIG_CSF_SIZE		SZ_8K
+#endif
+
+#define CONFIG_SPL_MAX_SIZE		(148 * 1024)
+#define CONFIG_SYS_MONITOR_LEN	SZ_512K
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+#define CONFIG_SYS_UBOOT_BASE	\
+	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SPL_STACK		0x920000
+#define CONFIG_SPL_BSS_START_ADDR	0x910000
+#define CONFIG_SPL_BSS_MAX_SIZE	SZ_8K	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	SZ_512K	/* 512 KB */
+
+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR		0x930000
+/* For RAW image gives a error info not panic */
+#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
+
+#endif
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	"script=boot.scr\0" \
+	"image=Image\0" \
+	"console=ttymxc1,115200\0" \
+	"fdt_addr=0x43000000\0"			\
+	"fdt_high=0xffffffffffffffff\0"		\
+	"boot_fit=try\0" \
+	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
+	"initrd_addr=0x43800000\0"		\
+	"initrd_high=0xffffffffffffffff\0" \
+	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
+	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
+	"mmcautodetect=yes\0" \
+	"mmcargs=setenv bootargs console=${console},${baudrate}" \
+	" root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \
+	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
+	" ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source\0" \
+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run finduuid; " \
+		"run mmcargs; " \
+		"if run loadfdt; then " \
+			"booti ${loadaddr} - ${fdt_addr}; " \
+		"else " \
+			"echo WARN: Cannot load the DT; " \
+		"fi; " \
+	"netargs=setenv bootargs console=${console} " \
+		"root=/dev/nfs " \
+		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+	"netboot=echo Booting from net ...; " \
+		"run netargs;  " \
+		"if test ${ip_dyn} = yes; then " \
+			"setenv get_cmd dhcp; " \
+		"else " \
+			"setenv get_cmd tftp; " \
+		"fi; " \
+		"${get_cmd} ${loadaddr} ${image}; " \
+		"if test ${boot_fit} = yes || test ${boot_fit} = try; then " \
+			"bootm ${loadaddr}; " \
+		"else " \
+			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+				"booti ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"echo WARN: Cannot load the DT; " \
+			"fi; " \
+		"fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+	   "mmc dev ${mmcdev}; if mmc rescan; then " \
+		   "if run loadbootscript; then " \
+			   "run bootscript; " \
+		   "else " \
+			   "if run loadimage; then " \
+				   "run mmcboot; " \
+			   "else run netboot; " \
+			   "fi; " \
+		   "fi; " \
+	   "fi;"
+
+/* Link Definitions */
+#define CONFIG_LOADADDR			0x40480000
+
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
+
+#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE        0x200000
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_MMC_ENV_DEV	1   /* USDHC2 */
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		SZ_32M
+
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define PHYS_SDRAM			0x40000000
+#define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
+
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END	(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
+
+#define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_CBSIZE		2048
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+/* USDHC */
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+
+/* I2C */
+#define CONFIG_SYS_I2C_SPEED		100000
+
+/* FEC*/
+#define CONFIG_ETHPRIME                 "FEC"
+#define CONFIG_FEC_XCV_TYPE             RGMII
+#define CONFIG_FEC_MXC_PHYADDR          0
+#define FEC_QUIRK_ENET_MAC
+#define IMX_FEC_BASE			0x30BE0000
+
+#endif
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 7da2b90052..901a1bed6d 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -7,6 +7,7 @@
 #define __IMX8MM_EVK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SECURE_BOOT
@@ -123,9 +124,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index ce73ca6b0a..a07440c73b 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -7,6 +7,7 @@
 #define __IMX8MN_EVK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SECURE_BOOT
@@ -126,9 +127,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START    PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END      (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index e91c71036d..b346154fb3 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -7,6 +7,7 @@
 #define __IMX8MP_EVK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SECURE_BOOT
@@ -139,10 +140,6 @@
 #define PHYS_SDRAM_2			0x100000000
 #define PHYS_SDRAM_2_SIZE		0xC0000000	/* 3 GB */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					(PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index 5d9ef70830..94183269cd 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -7,6 +7,7 @@
 #define __IMX8M_EVK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #define CONFIG_SPL_MAX_SIZE		(124 * 1024)
@@ -82,9 +83,6 @@
 
 #define CONFIG_PHY_GIGE
 #define IMX_FEC_BASE			0x30BE0000
-
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
 #endif
 
 #define CONFIG_MFG_ENV_SETTINGS \
@@ -187,10 +185,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0xC0000000 /* 3GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					(PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_BAUDRATE			115200
 
 #define CONFIG_MXC_UART
@@ -208,8 +202,6 @@
 
 #define CONFIG_IMX_BOOTAUX
 
-#define CONFIG_CMD_MMC
-
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
new file mode 100644
index 0000000000..72edbc74ec
--- /dev/null
+++ b/include/configs/imx8mq_phanbell.h
@@ -0,0 +1,214 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 NXP
+ */
+
+#ifndef __IMX8M_PHANBELL_H
+#define __IMX8M_PHANBELL_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_SPL_MAX_SIZE		(172 * 1024)
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+
+#ifdef CONFIG_SPL_BUILD
+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
+#define CONFIG_SPL_STACK		0x187FF0
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_BSS_START_ADDR      0x00180000
+#define CONFIG_SPL_BSS_MAX_SIZE        0x2000	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START    0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE    0x80000	/* 512 KB */
+#define CONFIG_SYS_SPL_PTE_RAM_BASE    0x41580000
+
+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR		0x182000
+/* For RAW image gives a error info not panic */
+#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
+
+#undef CONFIG_DM_MMC
+#undef CONFIG_DM_PMIC
+#undef CONFIG_DM_PMIC_PFUZE100
+
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#endif
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#undef CONFIG_CMD_EXPORTENV
+#undef CONFIG_CMD_IMPORTENV
+#undef CONFIG_CMD_IMLS
+
+#undef CONFIG_CMD_CRC32
+
+/* ENET Config */
+/* ENET1 */
+#if defined(CONFIG_CMD_NET)
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_MII
+#define CONFIG_ETHPRIME                 "FEC"
+
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_XCV_TYPE             RGMII
+#define CONFIG_FEC_MXC_PHYADDR          0
+#define FEC_QUIRK_ENET_MAC
+
+#define CONFIG_PHY_GIGE
+#define IMX_FEC_BASE			0x30BE0000
+
+#define CONFIG_PHYLIB
+#endif
+
+#define CONFIG_MFG_ENV_SETTINGS \
+	"initrd_addr=0x43800000\0" \
+	"initrd_high=0xffffffff\0" \
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS		\
+	CONFIG_MFG_ENV_SETTINGS \
+	"script=boot.scr\0" \
+	"image=Image\0" \
+	"console=ttymxc0,115200\0" \
+	"fdt_addr=0x43000000\0"			\
+	"fdt_high=0xffffffffffffffff\0"		\
+	"boot_fdt=try\0" \
+	"fdt_file=imx8mq-phanbell.dtb\0" \
+	"initrd_addr=0x43800000\0"		\
+	"initrd_high=0xffffffffffffffff\0" \
+	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
+	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+	"mmcautodetect=yes\0" \
+	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
+	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source\0" \
+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run mmcargs; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if run loadfdt; then " \
+				"booti ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"echo WARN: Cannot load the DT; " \
+			"fi; " \
+		"else " \
+			"echo wait for boot; " \
+		"fi;\0" \
+	"netargs=setenv bootargs console=${console} " \
+		"root=/dev/nfs " \
+		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
+	"netboot=echo Booting from net ...; " \
+		"run netargs;  " \
+		"if test ${ip_dyn} = yes; then " \
+			"setenv get_cmd dhcp; " \
+		"else " \
+			"setenv get_cmd tftp; " \
+		"fi; " \
+		"${get_cmd} ${loadaddr} ${image}; " \
+		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
+			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
+				"booti ${loadaddr} - ${fdt_addr}; " \
+			"else " \
+				"echo WARN: Cannot load the DT; " \
+			"fi; " \
+		"else " \
+			"booti; " \
+		"fi;\0"
+
+#define CONFIG_BOOTCOMMAND \
+	   "mmc dev ${mmcdev}; if mmc rescan; then " \
+		   "if run loadbootscript; then " \
+			   "run bootscript; " \
+		   "else " \
+			   "if run loadimage; then " \
+				   "run mmcboot; " \
+			   "else run netboot; " \
+			   "fi; " \
+		   "fi; " \
+	   "else booti ${loadaddr} - ${fdt_addr}; fi"
+
+/* Link Definitions */
+#define CONFIG_LOADADDR			0x40480000
+
+#define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
+
+#define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE        0x80000
+#define CONFIG_SYS_INIT_SP_OFFSET \
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR \
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
+#define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE           0x40000000
+#define PHYS_SDRAM                      0x40000000
+#define PHYS_SDRAM_SIZE			0x40000000 /* 1GB DDR */
+
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
+					(PHYS_SDRAM_SIZE >> 1))
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_IMX_BOOTAUX
+
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+#define CONFIG_SYS_FSL_ESDHC_ADDR       0
+
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_CMD_FUSE
+
+/* I2C Configs */
+#define CONFIG_SYS_I2C_SPEED		  100000
+
+#define CONFIG_OF_SYSTEM_SETUP
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_DM_PMIC
+#endif
+
+#endif
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 97170dc949..d7dd3e21a3 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -7,6 +7,7 @@
 #define __IMX8QM_MEK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SPL_BUILD
@@ -70,7 +71,7 @@
 	"fdt_addr=0x83000000\0"			\
 	"fdt_high=0xffffffffffffffff\0"		\
 	"boot_fdt=try\0" \
-	"fdt_file=imx8qm-mek.dtb\0" \
+	"fdt_file=undefined\0" \
 	"initrd_addr=0x83800000\0"		\
 	"initrd_high=0xffffffffffffffff\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index ac25549a18..eebb8dc011 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -7,6 +7,7 @@
 #define __IMX8QM_ROM7720_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 #define CONFIG_REMAKE_ELF
 
@@ -163,9 +164,6 @@
 /* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
 #define PHYS_SDRAM_2_SIZE		0x80000000	/* 2 GB */
 
-#define CONFIG_SYS_MEMTEST_START	0xA0000000
-#define CONFIG_SYS_MEMTEST_END      (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_1_SIZE >> 2))
-
 /* Serial */
 #define CONFIG_BAUDRATE			115200
 
@@ -176,4 +174,5 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define FEC_QUIRK_ENET_MAC
 
+#include <linux/stringify.h>
 #endif /* __IMX8QM_ROM7720_H */
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index 0aaca3325b..a2046e1beb 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -7,6 +7,7 @@
 #define __IMX8QXP_MEK_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 
 #ifdef CONFIG_SPL_BUILD
@@ -69,7 +70,7 @@
 	"fdt_addr=0x83000000\0"			\
 	"fdt_high=0xffffffffffffffff\0"		\
 	"boot_fdt=try\0" \
-	"fdt_file=imx8qxp-mek.dtb\0" \
+	"fdt_file=undefined\0" \
 	"initrd_addr=0x83800000\0"		\
 	"initrd_high=0xffffffffffffffff\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
diff --git a/include/configs/integrator-common.h b/include/configs/integrator-common.h
index 9223fc2cde..89ab0da50c 100644
--- a/include/configs/integrator-common.h
+++ b/include/configs/integrator-common.h
@@ -6,8 +6,6 @@
  * Common ARM Integrator configuration settings
  */
 
-#define CONFIG_SYS_MEMTEST_START	0x100000
-#define CONFIG_SYS_MEMTEST_END		0x10000000
 #define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1 */
 #define CONFIG_SYS_LOAD_ADDR		0x7fc0	/* default load address */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
diff --git a/include/configs/km/keymile-common.h b/include/configs/km/keymile-common.h
index e690d8f39d..e9e3981060 100644
--- a/include/configs/km/keymile-common.h
+++ b/include/configs/km/keymile-common.h
@@ -7,6 +7,8 @@
 #ifndef __CONFIG_KEYMILE_H
 #define __CONFIG_KEYMILE_H
 
+#include <linux/stringify.h>
+
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index dfb78c50f4..451baf8b80 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -1,6 +1,7 @@
 /*
  * Internal Definitions
  */
+#include <linux/stringify.h>
 #define BOOTFLASH_START	0xF0000000
 
 /*
diff --git a/include/configs/km/km-powerpc.h b/include/configs/km/km-powerpc.h
index 84594874b8..fde8487178 100644
--- a/include/configs/km/km-powerpc.h
+++ b/include/configs/km/km-powerpc.h
@@ -16,10 +16,6 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3  /* 8 Byte write page */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
 
-#define CONFIG_SYS_MEMTEST_START 0x00100000	/* memtest works on */
-
-#define CONFIG_SYS_MEMTEST_END	0x00f00000	/* 1 ... 15 MB in DRAM	*/
-
 #define CONFIG_SYS_LOAD_ADDR	0x100000	/* default load address */
 
 /* Reserve 4 MB for malloc */
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index 156edfba22..79edfa728a 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -37,8 +37,6 @@
 
 #include "asm/arch/config.h"
 
-#define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
-#define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
 
 /* architecture specific default bootargs */
@@ -106,6 +104,8 @@
 
 #ifndef __ASSEMBLY__
 #include <asm/arch/gpio.h>
+#include <linux/delay.h>
+#include <linux/stringify.h>
 extern void __set_direction(unsigned pin, int high);
 void set_sda(int state);
 void set_scl(int state);
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index cdfb280aee..4d01f236c3 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -51,7 +51,7 @@
 /* enable POST tests */
 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY|CONFIG_SYS_POST_MEM_REGIONS)
 #define CONFIG_POST_EXTERNAL_WORD_FUNCS /* use own functions, not generic */
-#define CPM_POST_WORD_ADDR  CONFIG_SYS_MEMTEST_END
+#define CPM_POST_WORD_ADDR  0x00f00000
 #define CONFIG_TESTPIN_REG  gprt3	/* for kmcoge5ne */
 #define CONFIG_TESTPIN_MASK 0x20	/* for kmcoge5ne */
 
diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h
index 0224ac4148..e43b2f7513 100644
--- a/include/configs/kmp204x.h
+++ b/include/configs/kmp204x.h
@@ -318,8 +318,6 @@ int get_scl(void);
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
-#define CONFIG_PHYLIB_10G
-
 #define CONFIG_PCI_INDIRECT_BRIDGE
 
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 140076a54e..65a38c5757 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -27,7 +27,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index cceabdf663..0724df154e 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -35,10 +35,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF4
 
-#define CONFIG_SYS_MEMTEST_START	(KZM_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END \
-	(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
-#undef  CONFIG_SYS_MEMTEST_SCRATCH
 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
 
 #define CONFIG_SYS_INIT_RAM_ADDR	(0xE5600000) /* on MERAM */
diff --git a/include/configs/lager.h b/include/configs/lager.h
index db1dbc0ee8..c5001e3ec7 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -28,7 +28,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 0bfa67a7c0..a5f7fab15e 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -33,10 +33,8 @@
 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
 
 /* memtest start addr */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
 
 /* memtest will be run on 16MB */
-#define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
 
 /*
  * Serial Driver info
diff --git a/include/configs/linkit-smart-7688.h b/include/configs/linkit-smart-7688.h
index 4276e95dee..d7ebfeda4c 100644
--- a/include/configs/linkit-smart-7688.h
+++ b/include/configs/linkit-smart-7688.h
@@ -45,8 +45,6 @@
 					  230400, 460800, 921600 }
 
 /* RAM */
-#define CONFIG_SYS_MEMTEST_START	0x80100000
-#define CONFIG_SYS_MEMTEST_END		0x80400000
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 14008fec36..f9a125fcb0 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -10,6 +10,7 @@
 
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 
 /* SPL options */
@@ -104,8 +105,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_128M)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
@@ -143,8 +142,6 @@
 #define CONFIG_FEC_MXC_PHYADDR		0x0
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_ETHPRIME			"FEC"
-
-#define CONFIG_PHY_SMSC
 #endif
 
 #define CONFIG_IMX_THERMAL
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index 5943b69716..869e0ad6b8 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -13,8 +13,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 /*  MMC  */
 #ifdef CONFIG_MMC
@@ -33,8 +31,6 @@
 #define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 						CONFIG_SYS_SCSI_MAX_LUN)
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS		\
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index e9baa2a8b6..3bea9a9186 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -34,26 +34,11 @@
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 /* Size of malloc() pool */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
 
 /*SPI device */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_TFABOOT)
 #define CONFIG_SYS_FMAN_FW_ADDR		0x400d0000
-#define CONFIG_SPI_FLASH_SPANSION
-#define CONFIG_FSL_SPI_INTERFACE
-#define CONFIG_SF_DATAFLASH
-
-#define QSPI0_AMBA_BASE		0x40000000
-#define CONFIG_SPI_FLASH_SPANSION
-
-#define FSL_QSPI_FLASH_SIZE		SZ_64M
-#define FSL_QSPI_FLASH_NUM		2
-
-/*
- * Environment
- */
-#define CONFIG_ENV_OVERWRITE
-#endif
+#define CONFIG_SYS_FSL_QSPI_BASE	0x40000000
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h
index 8a3ebf06f2..54ea43420f 100644
--- a/include/configs/ls1012afrdm.h
+++ b/include/configs/ls1012afrdm.h
@@ -14,8 +14,6 @@
 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #ifndef CONFIG_SPL_BUILD
 #undef BOOT_TARGET_DEVICES
@@ -73,7 +71,5 @@
 #endif
 
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #endif /* __LS1012ARDB_H__ */
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index 6143e9731e..1ea6548015 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -22,9 +22,6 @@
 #define SYS_SDRAM_SIZE_1024		0x40000000
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_CMD_MEMTEST
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 /* ENV */
 #define CONFIG_SYS_FSL_QSPI_BASE	0x40000000
@@ -33,12 +30,10 @@
 #undef BOOT_TARGET_DEVICES
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 0) \
-	func(USB, usb, 0)
+	func(USB, usb, 0) \
+	func(DHCP, dhcp, na)
 #endif
 
-#undef FSL_QSPI_FLASH_SIZE
-#define FSL_QSPI_FLASH_SIZE            SZ_16M
-
 /*  MMC  */
 #ifdef CONFIG_MMC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
@@ -102,15 +97,6 @@
 			"env exists secureboot "	\
 			"&& esbc_validate ${scripthdraddr};"    \
 		"source ${scriptaddr}\0"	  \
-	"installer=load mmc 0:2 $load_addr "	\
-		   "/flex_installer_arm64.itb; "	\
-		   "bootm $load_addr#$BOARD\0"	\
-	"qspi_bootcmd=pfe stop; echo Trying load from qspi..;"	\
-		"sf probe && sf read $load_addr "	\
-		"$kernel_addr $kernel_size; env exists secureboot "	\
-		"&& sf read $kernelheader_addr_r $kernelheader_addr "	\
-		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
-		"bootm $load_addr#$BOARD\0"	\
 	"sd_bootcmd=pfe stop; echo Trying load from sd card..;"		\
 		"mmcinfo; mmc read $load_addr "			\
 		"$kernel_addr_sd $kernel_size_sd ;"		\
@@ -129,9 +115,6 @@
 			   "env exists secureboot && esbc_halt;"
 #endif
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_CMD_MEMTEST
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #include <asm/fsl_secure_boot.h>
 
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index fb0d1ba6b2..99840dcfc4 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -13,8 +13,6 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 /*
  * QIXIS Definitions
@@ -107,8 +105,6 @@
 #define CONFIG_PCI_SCAN_SHOW
 
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #include <asm/fsl_secure_boot.h>
 #endif /* __LS1012AQDS_H__ */
diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
index 0738b243c4..8fb75650e2 100644
--- a/include/configs/ls1012ardb.h
+++ b/include/configs/ls1012ardb.h
@@ -14,12 +14,7 @@
 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
-
-/* ENV */
-#define CONFIG_SYS_FSL_QSPI_BASE	0x40000000
 /*
  * I2C IO expander
  */
@@ -55,8 +50,6 @@
 #define CONFIG_PCI_SCAN_SHOW
 
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS		\
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 7821e98a27..6e94a2a4c9 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -120,7 +120,6 @@
 /*
  * MMC
  */
-#define CONFIG_CMD_MMC
 
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
@@ -138,12 +137,6 @@
 /* SPI */
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SPI_FLASH_SPANSION
-
-/* QSPI */
-#define QSPI0_AMBA_BASE			0x40000000
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-#define CONFIG_SPI_FLASH_SPANSION
 #endif
 
 /* DM SPI */
@@ -174,8 +167,6 @@
 
 #define CONFIG_ETHPRIME			"eTSEC2"
 
-#define CONFIG_PHY_ATHEROS
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #define CONFIG_HAS_ETH2
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 5a2bd754c4..e069467b53 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -363,20 +363,9 @@ unsigned long get_board_ddr_clk(void);
  * MMC
  */
 
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-/* QSPI */
-#define QSPI0_AMBA_BASE			0x40000000
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-
-/* DSPI */
-
 /* DM SPI */
 #if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
 #define CONFIG_DM_SPI_FLASH
-#define CONFIG_SPI_FLASH_DATAFLASH
-#endif
 #endif
 
 /*
@@ -419,8 +408,6 @@ unsigned long get_board_ddr_clk(void);
 
 #define CONFIG_ETHPRIME			"eTSEC1"
 
-#define CONFIG_PHY_REALTEK
-
 #define CONFIG_HAS_ETH0
 #define CONFIG_HAS_ETH1
 #define CONFIG_HAS_ETH2
@@ -474,9 +461,6 @@ unsigned long get_board_ddr_clk(void);
  */
 #define CONFIG_SYS_BOOTMAPSZ		(256 << 20)
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
-
 #define CONFIG_SYS_LOAD_ADDR		0x82000000
 
 #define CONFIG_LS102XA_STREAM_ID
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index a6289850ca..53a10ba4dd 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -234,16 +234,6 @@
  * MMC
  */
 
-/* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-/* QSPI */
-#define QSPI0_AMBA_BASE			0x40000000
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-
-/* DSPI */
-#endif
-
 /* DM SPI */
 #if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI)
 #define CONFIG_DM_SPI_FLASH
@@ -297,7 +287,8 @@
 
 #ifdef CONFIG_LPUART
 #define CONFIG_EXTRA_ENV_SETTINGS       \
-	"bootargs=root=/dev/ram0 rw console=ttyLP0,115200 $othbootargs\0" \
+	"bootargs=root=/dev/ram0 rw console=ttyLP0,115200 "	\
+		"cma=64M@0x0-0xb0000000\0" \
 	"initrd_high=0xffffffff\0"      \
 	"fdt_addr=0x64f00000\0"		\
 	"kernel_addr=0x65000000\0"	\
@@ -353,7 +344,8 @@
 		"$kernel_size && bootm $load_addr#$board\0"
 #else
 #define CONFIG_EXTRA_ENV_SETTINGS	\
-	"bootargs=root=/dev/ram0 rw console=ttyS0,115200 $othbootargs\0" \
+	"bootargs=root=/dev/ram0 rw console=ttyS0,115200 "	\
+		"cma=64M@0x0-0xb0000000\0" \
 	"initrd_high=0xffffffff\0"      \
 	"fdt_addr=0x64f00000\0"		\
 	"kernel_addr=0x61000000\0"	\
@@ -439,9 +431,6 @@
  */
 #define CONFIG_SYS_BOOTMAPSZ		(256 << 20)
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
-
 #define CONFIG_SYS_LOAD_ADDR		0x82000000
 
 #define CONFIG_LS102XA_STREAM_ID
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index 6905694d10..f9040e661d 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -26,10 +26,6 @@
 #define CONFIG_SYS_DDR_BLOCK2_BASE	0x2080000000ULL
 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	1
 
-#define CONFIG_CMD_MEMTEST
-#define CONFIG_SYS_MEMTEST_START        0x80000000
-#define CONFIG_SYS_MEMTEST_END          0x9fffffff
-
 /*
  * SMP Definitinos
  */
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h
index 818b994b90..b91016987b 100644
--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@@ -66,6 +66,13 @@
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 #endif
 
+/* LPUART */
+#ifdef CONFIG_LPUART
+#define CONFIG_LPUART_32B_REG
+#define CFG_LPUART_MUX_MASK	0xf0
+#define CFG_LPUART_EN		0xf0
+#endif
+
 /* SATA */
 #define CONFIG_SCSI_AHCI_PLAT
 
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 37080629a1..46baeb0d0d 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -35,9 +35,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHYLIB_10G
 #define RGMII_PHY1_ADDR		0x1
 #define RGMII_PHY2_ADDR		0x2
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
@@ -379,23 +376,10 @@ unsigned long get_board_ddr_clk(void);
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
 
-/* QSPI device */
-#if defined(CONFIG_TFABOOT) || \
-	(defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI))
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-#endif
-
 /*
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
-
 #define CONFIG_SYS_HZ			1000
 
 #define CONFIG_SYS_INIT_SP_OFFSET \
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index f7b110cffc..4ad51f15cb 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -258,11 +258,6 @@
 #ifndef SPL_NO_FMAN
 #define AQR105_IRQ_MASK			0x40000000
 
-#ifdef CONFIG_NET
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#endif
-
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define RGMII_PHY1_ADDR			0x1
 #define RGMII_PHY2_ADDR			0x2
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index e80c2996ef..24db23b3c3 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -217,6 +217,10 @@
 #define LS1046A_BOOT_SRC_AND_HDR\
 	"boot_scripts=ls1046afrwy_boot.scr\0"	\
 	"boot_script_hdr=hdr_ls1046afrwy_bs.out\0"
+#elif defined(CONFIG_TARGET_LS1046AQDS)
+#define LS1046A_BOOT_SRC_AND_HDR\
+	"boot_scripts=ls1046aqds_boot.scr\0"	\
+	"boot_script_hdr=hdr_ls1046aqds_bs.out\0"
 #else
 #define LS1046A_BOOT_SRC_AND_HDR\
 	"boot_scripts=ls1046ardb_boot.scr\0"	\
@@ -230,7 +234,7 @@
 	"ramdisk_size=0x2000000\0"		\
 	"bootm_size=0x10000000\0"		\
 	"fdt_addr=0x64f00000\0"                 \
-	"kernel_addr=0x65000000\0"              \
+	"kernel_addr=0x61000000\0"              \
 	"scriptaddr=0x80000000\0"               \
 	"scripthdraddr=0x80080000\0"		\
 	"fdtheader_addr_r=0x80100000\0"         \
@@ -277,6 +281,18 @@
 		"&& sf read $kernelheader_addr_r $kernelheader_start "	\
 		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
 		"bootm $load_addr#$board\0"		\
+	"nand_bootcmd=echo Trying load from nand..;"      \
+		"nand info; nand read $load_addr "         \
+		"$kernel_start $kernel_size; env exists secureboot "	\
+		"&& nand read $kernelheader_addr_r $kernelheader_start " \
+		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
+		"bootm $load_addr#$board\0"		\
+	"nor_bootcmd=echo Trying load from nor..;"	\
+		"cp.b $kernel_addr $load_addr "		\
+		"$kernel_size; env exists secureboot "	\
+		"&& cp.b $kernelheader_addr $kernelheader_addr_r "	\
+		"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \
+		"bootm $load_addr#$board\0"	\
 	"sd_bootcmd=echo Trying load from SD ..;"	\
 		"mmcinfo; mmc read $load_addr "		\
 		"$kernel_addr_sd $kernel_size_sd && "	\
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index 4ccd3b0560..44e7fc3a72 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright 2019 NXP
+ * Copyright 2019-2020 NXP
  */
 
 #ifndef __LS1046AFRWY_H__
@@ -96,12 +96,17 @@
 /*
  * Environment
  */
-#define CONFIG_ENV_OVERWRITE
-
 #define CONFIG_SYS_MMC_ENV_DEV		0
-
 #define CONFIG_SYS_FSL_QSPI_BASE	0x40000000
 
+#ifndef CONFIG_SPL_BUILD
+#undef BOOT_TARGET_DEVICES
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0) \
+	func(USB, usb, 0) \
+	func(DHCP, dhcp, na)
+#endif
+
 /* FMan */
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
@@ -117,12 +122,6 @@
 
 #endif
 
-/* QSPI device */
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE		SZ_64M
-#define FSL_QSPI_FLASH_NUM		1
-#endif
-
 #undef CONFIG_BOOTCOMMAND
 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "	\
 			   "env exists secureboot && esbc_halt;;"
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 0b17b1e994..969d2c540b 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -41,20 +41,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SPI_FLASH_EON		/* cs2 */
 #endif
 
-/* QSPI */
-#if defined(CONFIG_TFABOOT) ||	\
-	defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-#endif
-
 #ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHYLIB_10G
 #define RGMII_PHY1_ADDR		0x1
 #define RGMII_PHY2_ADDR		0x2
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
@@ -412,9 +399,6 @@ unsigned long get_board_ddr_clk(void);
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
-
 #define CONFIG_SYS_HZ			1000
 
 #define CONFIG_SYS_INIT_SP_OFFSET \
@@ -425,34 +409,33 @@ unsigned long get_board_ddr_clk(void);
 /*
  * Environment
  */
-#define CONFIG_ENV_OVERWRITE
-
-#ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_MMC_ENV_DEV		0
-#else
-#ifdef CONFIG_NAND_BOOT
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV		0
-#endif
-#endif
 
 #define CONFIG_CMDLINE_TAG
 
 #undef CONFIG_BOOTCOMMAND
 #ifdef CONFIG_TFABOOT
-#define QSPI_NOR_BOOTCOMMAND		"sf probe && sf read $kernel_load "    \
-					"e0000 f00000 && bootm $kernel_load"
-#define IFC_NOR_BOOTCOMMAND		"cp.b $kernel_start $kernel_load "     \
-					"$kernel_size && bootm $kernel_load"
-#define SD_BOOTCOMMAND		"mmc info; mmc read $kernel_load"     \
-					"$kernel_addr_sd $kernel_size_sd && bootm $kernel_load"
+#define IFC_NAND_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
+#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd"	\
+			   "env exists secureboot && esbc_halt;;"
+#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
+#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
 #else
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_BOOTCOMMAND		"sf probe && sf read $kernel_load "    \
-					"e0000 f00000 && bootm $kernel_load"
+#if defined(CONFIG_QSPI_BOOT)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
+#elif defined(CONFIG_NAND_BOOT)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nand_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
 #else
-#define CONFIG_BOOTCOMMAND		"cp.b $kernel_start $kernel_load "     \
-					"$kernel_size && bootm $kernel_load"
+#define CONFIG_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; "	\
+			   "env exists secureboot && esbc_halt;;"
 #endif
 #endif
 
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index efedfd5923..fe8108dae0 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -153,28 +153,12 @@
 /*
  * Environment
  */
-#ifndef SPL_NO_ENV
-#define CONFIG_ENV_OVERWRITE
-#endif
-
-#ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_MMC_ENV_DEV		0
-
 #define CONFIG_SYS_FSL_QSPI_BASE        0x40000000
-#else
-#if defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV		0
-#endif
-#endif
 
 #define AQR105_IRQ_MASK			0x80000000
 /* FMan */
 #ifndef SPL_NO_FMAN
-
-#ifdef CONFIG_NET
-#define CONFIG_PHY_REALTEK
-#endif
-
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define RGMII_PHY1_ADDR			0x1
 #define RGMII_PHY2_ADDR			0x2
@@ -191,15 +175,6 @@
 
 #endif
 
-/* QSPI device */
-#ifndef SPL_NO_QSPI
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE		(1 << 26)
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-#endif
-
 #ifndef SPL_NO_MISC
 #undef CONFIG_BOOTCOMMAND
 #ifdef CONFIG_TFABOOT
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index ab5b396e1a..a7373429ba 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -35,13 +35,7 @@
 #endif
 
 /* Link Definitions */
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FSL_QSPI_BASE	0x20000000
-#else
-#ifdef CONFIG_QSPI_BOOT
 #define CONFIG_SYS_FSL_QSPI_BASE	0x20000000
-#endif
-#endif
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 4ac4a8d856..2bc910a3fc 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -358,14 +358,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
 
-/* QSPI device */
-#if defined(CONFIG_TFABOOT) || \
-	defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define FSL_QSPI_FLASH_SIZE		(1 << 26)
-#define FSL_QSPI_FLASH_NUM		2
-
-#endif
-
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
@@ -376,8 +368,6 @@ unsigned long get_board_ddr_clk(void);
 #endif
 
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
@@ -549,11 +539,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_FSL_MC_ENET
 #define CONFIG_FSL_MEMAC
-#define	CONFIG_PHYLIB
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define RGMII_PHY1_ADDR		0x1
 #define RGMII_PHY2_ADDR		0x2
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index b48efcc119..475207358f 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -8,16 +8,7 @@
 
 #include "ls1088a_common.h"
 
-#ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_MMC_ENV_DEV		0
-#else
-#if defined(CONFIG_QSPI_BOOT)
-#elif defined(CONFIG_SD_BOOT)
-#define CONFIG_SYS_MMC_ENV_DEV		0
-#else
-#define CONFIG_ENV_IS_IN_FLASH
-#endif
-#endif /* CONFIG_TFABOOT */
 
 #if defined(CONFIG_TFABOOT) || \
 	defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
@@ -268,18 +259,7 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
 
-#ifndef SPL_NO_QSPI
-/* QSPI device */
-#if defined(CONFIG_TFABOOT) || \
-	defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define FSL_QSPI_FLASH_SIZE		(1 << 26)
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-#endif
-
 #define CONFIG_CMD_MEMINFO
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x9fffffff
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
@@ -522,9 +502,6 @@
 
 /* MAC/PHY configuration */
 #ifdef CONFIG_FSL_MC_ENET
-#define CONFIG_PHYLIB
-
-#define CONFIG_PHY_VITESSE
 #define AQ_PHY_ADDR1			0x00
 #define AQR105_IRQ_MASK			0x00000004
 
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index e93faab9a4..751325ad69 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -276,7 +276,6 @@ unsigned long get_board_ddr_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SPI_FLASH_SST
@@ -285,8 +284,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_SPI_FLASH_SPANSION
-#define FSL_QSPI_FLASH_SIZE		(1 << 26) /* 64MB */
-#define FSL_QSPI_FLASH_NUM		4
 #endif
 /*
  * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
@@ -295,8 +292,6 @@ unsigned long get_board_ddr_clk(void);
  */
 #define FSL_QIXIS_BRDCFG9_QSPI		0x1
 
-#endif
-
 /*
  * MMC
  */
@@ -479,10 +474,6 @@ unsigned long get_board_ddr_clk(void);
 
 #if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)
 #define CONFIG_FSL_MEMAC
-#define CONFIG_PHYLIB_10G
-#define CONFIG_PHY_VITESSE
-#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_TERANETICS
 #define SGMII_CARD_PORT1_PHY_ADDR 0x1C
 #define SGMII_CARD_PORT2_PHY_ADDR 0x1d
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index c1819d22a8..006a4c97fb 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -273,13 +273,9 @@ unsigned long get_board_sys_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#if defined(CONFIG_FSL_QSPI) || defined(CONFIG_FSL_DSPI)
-#ifdef CONFIG_FSL_DSPI
+#if defined(CONFIG_FSL_DSPI)
 #define CONFIG_SPI_FLASH_STMICRO
 #endif
-#define FSL_QSPI_FLASH_SIZE		SZ_64M	/* 64MB */
-#define FSL_QSPI_FLASH_NUM		2
-#endif
 
 /*
  * RTC configuration
@@ -321,11 +317,15 @@ unsigned long get_board_sys_clk(void);
 #include <config_distro_bootcmd.h>
 
 #ifdef CONFIG_TFABOOT
-#define QSPI_MC_INIT_CMD			\
-	"env exists secureboot && "		\
-	"esbc_validate 0x20640000 && "		\
-	"esbc_validate 0x20680000;"		\
-	"fsl_mc start mc 0x20a00000 0x20e00000 \0"
+#define QSPI_MC_INIT_CMD				\
+	"sf probe 0:0; "				\
+	"sf read 0x80640000 0x640000 0x80000; "		\
+	"env exists secureboot && "			\
+	"esbc_validate 0x80640000 && "			\
+	"esbc_validate 0x80680000; "			\
+	"sf read 0x80a00000 0xa00000 0x300000; "	\
+	"sf read 0x80e00000 0xe00000 0x100000; "	\
+	"fsl_mc start mc 0x80a00000 0x80e00000 \0"
 #define SD_MC_INIT_CMD				\
 	"mmcinfo;mmc read 0x80a00000 0x5000 0x1200;" \
 	"mmc read 0x80e00000 0x7000 0x800;"	\
@@ -342,11 +342,15 @@ unsigned long get_board_sys_clk(void);
 	"fsl_mc start mc 0x580a00000 0x580e00000 \0"
 #else
 #ifdef CONFIG_QSPI_BOOT
-#define MC_INIT_CMD				\
-	"mcinitcmd=env exists secureboot && "	\
-	"esbc_validate 0x20640000 && "		\
-	"esbc_validate 0x20680000;"		\
-	"fsl_mc start mc 0x20a00000 0x20e00000 \0"
+#define MC_INIT_CMD					\
+	"mcinitcmd=sf probe 0:0; "			\
+	"sf read 0x80640000 0x640000 0x80000; "		\
+	"env exists secureboot && "			\
+	"esbc_validate 0x80640000 && "			\
+	"esbc_validate 0x80680000; "			\
+	"sf read 0x80a00000 0xa00000 0x300000; "	\
+	"sf read 0x80e00000 0xe00000 0x100000; "	\
+	"fsl_mc start mc 0x80a00000 0x80e00000 \0"
 #elif defined(CONFIG_SD_BOOT)
 #define MC_INIT_CMD                             \
 	"mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;" \
@@ -500,10 +504,13 @@ unsigned long get_board_sys_clk(void);
 
 #ifdef CONFIG_TFABOOT
 #define QSPI_NOR_BOOTCOMMAND						\
+			"sf probe 0:0; "				\
+			"sf read 0x806c0000 0x6c0000 0x40000; "		\
 			"env exists mcinitcmd && env exists secureboot "\
-			"&& esbc_validate 0x206C0000; "			\
+			"&& esbc_validate 0x806c0000; "			\
+			"sf read 0x80d00000 0xd00000 0x100000; "	\
 			"env exists mcinitcmd && "			\
-			"fsl_mc lazyapply dpl 0x20d00000; "		\
+			"fsl_mc lazyapply dpl 0x80d00000; "		\
 			"run distro_bootcmd;run qspi_bootcmd; "		\
 			"env exists secureboot && esbc_halt;"
 
@@ -530,10 +537,13 @@ unsigned long get_board_sys_clk(void);
 #ifdef CONFIG_QSPI_BOOT
 /* Try to boot an on-QSPI kernel first, then do normal distro boot */
 #define CONFIG_BOOTCOMMAND						\
+			"sf probe 0:0; "				\
+			"sf read 0x806c0000 0x6c0000 0x40000; "		\
 			"env exists mcinitcmd && env exists secureboot "\
-			"&& esbc_validate 0x206C0000; "			\
+			"&& esbc_validate 0x806C0000; "			\
+			"sf read 0x80d00000 0xd00000 0x100000; "	\
 			"env exists mcinitcmd && "			\
-			"fsl_mc lazyapply dpl 0x20d00000; "		\
+			"fsl_mc lazyapply dpl 0x80d00000; "		\
 			"run distro_bootcmd;run qspi_bootcmd; "		\
 			"env exists secureboot && esbc_halt;"
 #elif defined(CONFIG_SD_BOOT)
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index d47abf6e65..5ab924457e 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -207,6 +207,16 @@ unsigned long get_board_ddr_clk(void);
 	"esbc_validate 0x80680000 ;"		\
 	"fsl_mc start mc 0x80a00000 0x80e00000\0"
 
+#define SD2_MC_INIT_CMD				\
+	"mmc dev 1; mmc read 0x80a00000 0x5000 0x1200;"	\
+	"mmc read 0x80e00000 0x7000 0x800;"	\
+	"env exists secureboot && "		\
+	"mmc read 0x80640000 0x3200 0x20 && "	\
+	"mmc read 0x80680000 0x3400 0x20 && "	\
+	"esbc_validate 0x80640000 && "		\
+	"esbc_validate 0x80680000 ;"		\
+	"fsl_mc start mc 0x80a00000 0x80e00000\0"
+
 #define EXTRA_ENV_SETTINGS			\
 	"hwconfig=fsl_ddr:bank_intlv=auto\0"	\
 	"ramdisk_addr=0x800000\0"		\
@@ -274,11 +284,11 @@ unsigned long get_board_ddr_clk(void);
 		"env exists secureboot && esbc_halt;"
 
 #define SD2_BOOTCOMMAND						\
-		"env exists mcinitcmd && mmcinfo; "		\
+		"mmc dev 1; env exists mcinitcmd && mmcinfo; "	\
 		"mmc read 0x80d00000 0x6800 0x800; "		\
 		"env exists mcinitcmd && env exists secureboot "	\
-		" && mmc read 0x80780000 0x3C00 0x20 "		\
-		"&& esbc_validate 0x80780000;env exists mcinitcmd "	\
+		" && mmc read 0x806C0000 0x3600 0x20 "		\
+		"&& esbc_validate 0x806C0000;env exists mcinitcmd "	\
 		"&& fsl_mc lazyapply dpl 0x80d00000;"		\
 		"run distro_bootcmd;run sd2_bootcmd;"		\
 		"env exists secureboot && esbc_halt;"
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index af6fc3ae7a..6be88831f0 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -25,8 +25,6 @@
 #define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
 #define PHYS_SDRAM_SIZE			(gd->ram_size)
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START	0x70000000
-#define CONFIG_SYS_MEMTEST_END		0x8ff00000
 
 #define CONFIG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR)
diff --git a/include/configs/malta.h b/include/configs/malta.h
index bb8a44433e..773d7c23ed 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -16,7 +16,6 @@
 #define CONFIG_PCI_GT64120
 #define CONFIG_PCI_MSC01
 #define CONFIG_PCNET
-#define CONFIG_PCNET_79C973
 #define PCNET_HAS_PROM
 
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS	0
@@ -42,8 +41,6 @@
 #define CONFIG_SYS_INIT_SP_OFFSET	0x400000
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x01000000)
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x00800000)
 
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN	(128 * 1024)
diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h
index 0aee1e1cf6..ee942a48fc 100644
--- a/include/configs/mccmon6.h
+++ b/include/configs/mccmon6.h
@@ -31,9 +31,6 @@
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MXC_UART_BASE		UART1_BASE
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-
 /* MMC Configuration */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
diff --git a/include/configs/meerkat96.h b/include/configs/meerkat96.h
index 2dc3156b26..33172a6b97 100644
--- a/include/configs/meerkat96.h
+++ b/include/configs/meerkat96.h
@@ -17,9 +17,6 @@
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(32 * SZ_1M)
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 9d6c3b8300..bd4bac7aab 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -58,8 +58,6 @@
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
 #define CONFIG_SYS_SDRAM_SIZE		PHYS_SDRAM_SIZE
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x00100000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x00100000)
 
 /*
diff --git a/include/configs/microchip_mpfs_icicle.h b/include/configs/microchip_mpfs_icicle.h
index 2f90ab3175..8ddfc6f14d 100644
--- a/include/configs/microchip_mpfs_icicle.h
+++ b/include/configs/microchip_mpfs_icicle.h
@@ -54,8 +54,6 @@
 /*
  * memtest works on DRAM
  */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_0
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
 
 /* When we use RAM as ENV */
 
diff --git a/include/configs/mpc8308_p1m.h b/include/configs/mpc8308_p1m.h
index cc58e806de..d6b21f11c3 100644
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -105,8 +107,6 @@
 /*
  * Memory test
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
 
 /*
  * The reserved memory
diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h
index faab0913fc..fe436cca38 100644
--- a/include/configs/mt7623.h
+++ b/include/configs/mt7623.h
@@ -45,11 +45,13 @@
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 
 /* This is needed for kernel booting */
-#define FDT_HIGH			"fdt_high=0xac000000\0"
+#define FDT_HIGH			"0xac000000"
 
-/* Extra environment variables */
-#define CONFIG_EXTRA_ENV_SETTINGS	\
-	FDT_HIGH
+#define ENV_MEM_LAYOUT_SETTINGS				\
+	"fdt_high=" FDT_HIGH "\0"			\
+	"kernel_addr_r=0x84000000\0"			\
+	"fdt_addr_r=" FDT_HIGH "\0"			\
+	"fdtfile=mt7623n-bananapi-bpi-r2.dtb" "\0"
 
 /* Ethernet */
 #define CONFIG_IPADDR			192.168.1.1
@@ -57,4 +59,18 @@
 
 #define CONFIG_SYS_MMC_ENV_DEV		0
 
+#ifdef CONFIG_DISTRO_DEFAULTS
+
+#define BOOT_TARGET_DEVICES(func)	\
+		func(MMC, mmc, 1)
+
+#include <config_distro_bootcmd.h>
+
+/* Extra environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS	\
+	ENV_MEM_LAYOUT_SETTINGS		\
+	BOOTENV
+
+#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
+
 #endif
diff --git a/include/configs/mv-common.h b/include/configs/mv-common.h
index a041ddb79b..d61c90a431 100644
--- a/include/configs/mv-common.h
+++ b/include/configs/mv-common.h
@@ -16,6 +16,8 @@
 #ifndef _MV_COMMON_H
 #define _MV_COMMON_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options (easy to change)
  */
@@ -59,8 +61,6 @@
  * Other required minimal configurations
  */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
-#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
-#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
 
diff --git a/include/configs/mvebu_armada-37xx.h b/include/configs/mvebu_armada-37xx.h
index 024a971708..24a83fdbbe 100644
--- a/include/configs/mvebu_armada-37xx.h
+++ b/include/configs/mvebu_armada-37xx.h
@@ -38,8 +38,6 @@
  * Other required minimal configurations
  */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
-#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
-#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
 
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index b72a0a5b9e..19b5b5b386 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -39,8 +39,6 @@
  * Other required minimal configurations
  */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
-#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
-#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
 
diff --git a/include/configs/mx25pdk.h b/include/configs/mx25pdk.h
index 174f038be8..683d442e75 100644
--- a/include/configs/mx25pdk.h
+++ b/include/configs/mx25pdk.h
@@ -41,8 +41,6 @@
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Memory Test */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE/2)
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
 
 /* Serial Info */
 #define CONFIG_MXC_UART
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 4082a0bd64..f910d6199b 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -71,8 +71,6 @@
  */
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		0x80010000
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR		0x81000000
diff --git a/include/configs/mx35pdk.h b/include/configs/mx35pdk.h
index 222d13eb1f..8f1213fd8a 100644
--- a/include/configs/mx35pdk.h
+++ b/include/configs/mx35pdk.h
@@ -93,9 +93,6 @@
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x10000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /*
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index 10aa1bcd87..182648a0f1 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -155,9 +155,6 @@
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_MEMTEST_START       0x90000000
-#define CONFIG_SYS_MEMTEST_END         0x90010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index ff71435776..b43be1c55c 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -146,9 +146,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index 0ebff26ba0..e0210047ff 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -75,9 +75,6 @@
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h
index 2e687b9bdc..ab02aa072f 100644
--- a/include/configs/mx53evk.h
+++ b/include/configs/mx53evk.h
@@ -100,9 +100,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 1798a92efc..2e015ad9f8 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -142,9 +142,6 @@
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 196eab05c2..c32f02635b 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -121,9 +121,6 @@
 #define CONFIG_SYS_MAXARGS	48	/* max number of command args */
 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 #define CONFIG_SYS_BOOTMAPSZ (256 << 20)     /* 256M */
diff --git a/include/configs/mx53smd.h b/include/configs/mx53smd.h
index 610e6e8a11..b3322c639c 100644
--- a/include/configs/mx53smd.h
+++ b/include/configs/mx53smd.h
@@ -92,9 +92,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START       0x70000000
-#define CONFIG_SYS_MEMTEST_END         0x70010000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical Memory Map */
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 07b1e06f4f..0715509ec8 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -6,6 +6,8 @@
 #ifndef __MX6_COMMON_H
 #define __MX6_COMMON_H
 
+#include <linux/stringify.h>
+
 #if (defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL))
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
 #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h
index a6690367f8..2ccf44e573 100644
--- a/include/configs/mx6cuboxi.h
+++ b/include/configs/mx6cuboxi.h
@@ -7,6 +7,8 @@
 #ifndef __MX6CUBOXI_CONFIG_H
 #define __MX6CUBOXI_CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #include "imx6_spl.h"
@@ -32,7 +34,6 @@
 #define IMX_FEC_BASE			ENET_BASE_ADDR
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_FEC_MXC_PHYADDR		0
-#define CONFIG_PHY_ATHEROS
 
 /* Framebuffer */
 #define CONFIG_VIDEO_BMP_RLE8
diff --git a/include/configs/mx6memcal.h b/include/configs/mx6memcal.h
index 6fd87c2abc..3d79a7e437 100644
--- a/include/configs/mx6memcal.h
+++ b/include/configs/mx6memcal.h
@@ -18,8 +18,6 @@
 #undef CONFIG_GENERIC_MMC
 #undef CONFIG_CMD_FUSE
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
 
 #define CONFIG_MXC_UART
diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h
index 7e6917b967..ec2ac69515 100644
--- a/include/configs/mx6qarm2.h
+++ b/include/configs/mx6qarm2.h
@@ -102,8 +102,6 @@
 #define CONFIG_ARP_TIMEOUT	200UL
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x10010000
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h
index ee3b754910..6cea26a58d 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -8,6 +8,8 @@
 #ifndef __MX6QSABRE_COMMON_CONFIG_H
 #define __MX6QSABRE_COMMON_CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #define CONFIG_IMX_THERMAL
@@ -154,10 +156,6 @@
 
 #define CONFIG_ARP_TIMEOUT     200UL
 
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END         0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
-
 /* Physical Memory Map */
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h
index 193931b91b..d889c99d51 100644
--- a/include/configs/mx6slevk.h
+++ b/include/configs/mx6slevk.h
@@ -108,8 +108,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h
index 8ae1e0a2e6..61c637d26c 100644
--- a/include/configs/mx6sllevk.h
+++ b/include/configs/mx6sllevk.h
@@ -103,8 +103,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_128M)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
@@ -137,4 +135,5 @@
 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
 #endif
 
+#include <linux/stringify.h>
 #endif				/* __CONFIG_H */
diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h
index 0bcf031953..2c7db39c29 100644
--- a/include/configs/mx6sxsabreauto.h
+++ b/include/configs/mx6sxsabreauto.h
@@ -91,8 +91,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
@@ -134,8 +132,6 @@
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHY_ATHEROS
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
@@ -145,12 +141,6 @@
 
 #define CONFIG_IMX_THERMAL
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_SIZE		SZ_32M
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #if defined(CONFIG_ENV_IS_IN_MMC)
 #define CONFIG_SYS_MMC_ENV_DEV		0  /*USDHC3*/
diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 55aace1c6e..3eea9de986 100644
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #include "mx6_common.h"
 
 #ifdef CONFIG_SPL
@@ -123,8 +125,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
@@ -157,8 +157,6 @@
 #define CONFIG_FEC_XCV_TYPE             RGMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHY_ATHEROS
-
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
@@ -175,17 +173,6 @@
 
 #define CONFIG_IMX_THERMAL
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_LE
-#define CONFIG_SYS_FSL_QSPI_AHB
-#ifdef CONFIG_MX6SX_SABRESD_REVA
-#define FSL_QSPI_FLASH_SIZE		SZ_16M
-#else
-#define FSL_QSPI_FLASH_SIZE		SZ_32M
-#endif
-#define FSL_QSPI_FLASH_NUM		2
-#endif
-
 #ifndef CONFIG_SPL_BUILD
 #ifdef CONFIG_VIDEO
 #define CONFIG_VIDEO_MXS
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index a30d2c0879..8466abf3d5 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -9,6 +9,7 @@
 
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 #include <asm/mach-imx/gpio.h>
 
@@ -134,8 +135,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
@@ -157,12 +156,6 @@
 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM		1
-#define FSL_QSPI_FLASH_SIZE		SZ_32M
-#endif
-
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index af335bcfff..9cedb96a6b 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -10,6 +10,7 @@
 
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 #include <asm/mach-imx/gpio.h>
 
@@ -131,8 +132,6 @@
 	   "else run netboot; fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
@@ -160,12 +159,6 @@
 
 #define CONFIG_SOFT_SPI
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM		1
-#define FSL_QSPI_FLASH_SIZE		SZ_32M
-#endif
-
 #ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_ENET_DEV		1
 #if (CONFIG_FEC_ENET_DEV == 0)
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index b6ded774cc..cc07e858d5 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -9,6 +9,7 @@
 #define __MX7_COMMON_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/mach-imx/gpio.h>
 
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index e7d35ed648..7e1e8b02cb 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -94,9 +94,6 @@
 
 #include <config_distro_bootcmd.h>
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
@@ -154,12 +151,4 @@
 #define CONFIG_VIDEO_BMP_LOGO
 #endif
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SYS_FSL_QSPI_AHB
-#define FSL_QSPI_FLASH_NUM		1
-#define FSL_QSPI_FLASH_SIZE		SZ_64M
-#define QSPI0_BASE_ADDR			QSPI1_IPS_BASE_ADDR
-#define QSPI0_AMBA_BASE			QSPI0_ARB_BASE_ADDR
-#endif
-
 #endif	/* __CONFIG_H */
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index f6e173d7d5..f7f9404479 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -49,13 +49,10 @@
 /* Physical Memory Map */
 
 #define PHYS_SDRAM			0x60000000
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
 
 #define CONFIG_LOADADDR			0x60800000
 
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_512M)
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"image=zImage\0" \
 	"console=ttyLP0\0" \
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index c1b379bdea..9216b0948c 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -53,13 +53,10 @@
 
 #define PHYS_SDRAM			0x60000000
 #define PHYS_SDRAM_SIZE			SZ_1G
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
 
 #define CONFIG_LOADADDR             0x60800000
 
-#define CONFIG_SYS_MEMTEST_END      0x9E000000
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index e079f8035b..325c3ee00c 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -51,8 +51,6 @@
 
 /* Memory sizes */
 #define CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
-#define CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
-#define CONFIG_SYS_MEMTEST_END		0x40400000	/* 4 MB RAM test */
 
 /* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
 #define CONFIG_SYS_INIT_RAM_ADDR	0x00000000
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 9ef6ea90a3..f3081f4f33 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -113,6 +113,7 @@
 	DISTRO_BOOT_DEV_DHCP(func)
 
 #include <config_distro_bootcmd.h>
+#include <linux/stringify.h>
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"console=ttymxc1\0" \
@@ -130,9 +131,6 @@
 	BOOTENV
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START       0x10000000
-#define CONFIG_SYS_MEMTEST_END	       0x10010000
-#define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
 
 /* Physical Memory Map */
 #define PHYS_SDRAM		       MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index fd755bbcea..a9a0b1c998 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * (C) Copyright 2011-2012
- * Pali Rohár <pali.rohar@gmail.com>
+ * Pali Rohár <pali@kernel.org>
  *
  * (C) Copyright 2010
  * Alistair Buxton <a.j.buxton@gmail.com>
@@ -25,12 +25,6 @@
 
 #define CONFIG_MACH_TYPE		MACH_TYPE_NOKIA_RX51
 
-/*
- * Nokia X-Loader loading secondary image to address 0x80400000
- * NOLO loading boot image to random place, so it doesn't really
- * matter what we set this to. We have to copy u-boot to this address
- */
-
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap.h>
 #include <asm/arch/mem.h>
@@ -97,54 +91,8 @@
  * Board ONENAND Info.
  */
 
-#define PART1_NAME			"bootloader"
-#define PART1_SIZE			128
-#define PART1_MULL			1024
-#define PART1_SUFF			"k"
-#define PART1_OFFS			0x00000000
-#define PART1_MASK			0x00000003
-
-#define PART2_NAME			"config"
-#define PART2_SIZE			384
-#define PART2_MULL			1024
-#define PART2_SUFF			"k"
-#define PART2_OFFS			0x00020000
-#define PART2_MASK			0x00000000
-
-#define PART3_NAME			"log"
-#define PART3_SIZE			256
-#define PART3_MULL			1024
-#define PART3_SUFF			"k"
-#define PART3_OFFS			0x00080000
-#define PART3_MASK			0x00000000
-
-#define PART4_NAME			"kernel"
-#define PART4_SIZE			2
-#define PART4_MULL			1024*1024
-#define PART4_SUFF			"m"
-#define PART4_OFFS			0x000c0000
-#define PART4_MASK			0x00000000
-
-#define PART5_NAME			"initfs"
-#define PART5_SIZE			2
-#define PART5_MULL			1024*1024
-#define PART5_SUFF			"m"
-#define PART5_OFFS			0x002c0000
-#define PART5_MASK			0x00000000
-
-#define PART6_NAME			"rootfs"
-#define PART6_SIZE			257280
-#define PART6_MULL			1024
-#define PART6_SUFF			"k"
-#define PART6_OFFS			0x004c0000
-#define PART6_MASK			0x00000000
-
-#ifdef ONENAND_SUPPORT
-
 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
 
-#endif
-
 /* Watchdog support */
 #define CONFIG_HW_WATCHDOG
 
@@ -169,17 +117,11 @@ int rx51_kp_getc(struct stdio_dev *sdev);
 #endif
 
 /* Environment information */
-#ifdef CONFIG_MTDPARTS_DEFAULT
-#define MTDPARTS "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
-#else
-#define MTDPARTS
-#endif
 #define CONFIG_EXTRA_ENV_SETTINGS \
-	MTDPARTS \
 	"usbtty=cdc_acm\0" \
-	"stdin=vga\0" \
-	"stdout=vga\0" \
-	"stderr=vga\0" \
+	"stdin=serial,vga\0" \
+	"stdout=serial,vga\0" \
+	"stderr=serial,vga\0" \
 	"setcon=setenv stdin ${con};" \
 		"setenv stdout ${con};" \
 		"setenv stderr ${con}\0" \
@@ -245,6 +187,28 @@ int rx51_kp_getc(struct stdio_dev *sdev);
 		"fi\0" \
 	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
 	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
+	"preboot=setenv mmcnum 1; setenv mmcpart 1;" \
+		"setenv mmcscriptfile bootmenu.scr;" \
+		"if run switchmmc; then " \
+			"setenv mmcdone true;" \
+			"setenv mmctype fat;" \
+			"if run scriptload; then true; else " \
+				"setenv mmctype ext2;" \
+				"if run scriptload; then true; else " \
+					"setenv mmctype ext4;" \
+					"if run scriptload; then true; else " \
+						"setenv mmcdone false;" \
+					"fi;" \
+				"fi;" \
+			"fi;" \
+			"if ${mmcdone}; then " \
+				"run scriptboot;" \
+			"fi;" \
+		"fi;" \
+		"if run slide; then true; else " \
+			"setenv bootmenu_delay 0;" \
+			"setenv bootdelay 0;" \
+		"fi\0" \
 	"menucmd=bootmenu\0" \
 	"bootmenu_0=Attached kernel=run attachboot\0" \
 	"bootmenu_1=Internal eMMC=run emmcboot\0" \
@@ -274,9 +238,6 @@ int rx51_kp_getc(struct stdio_dev *sdev);
  * Miscellaneous configurable options
  */
 
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/
-
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)
 
diff --git a/include/configs/novena.h b/include/configs/novena.h
index 2b8419563c..6f964e4307 100644
--- a/include/configs/novena.h
+++ b/include/configs/novena.h
@@ -44,9 +44,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
-
 #define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
 
 /* SPL */
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index a7e2a3d9a2..03229910b2 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -29,8 +29,6 @@
 #define CONFIG_TZSW_RESERVED_DRAM_SIZE	CONFIG_SYS_MEM_TOP_HIDE
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 
 #include <linux/sizes.h>
@@ -64,7 +62,6 @@
 	""PARTS_BOOT" part 0 1;" \
 	""PARTS_ROOT" part 0 2\0" \
 
-#define CONFIG_SET_DFU_ALT_INFO
 #define CONFIG_SET_DFU_ALT_BUF_LEN	(SZ_1K)
 
 #define CONFIG_DFU_ALT_BOOT_EMMC \
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 47c30543f8..564319c231 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -76,7 +76,6 @@
 
 /* Enable: board/samsung/common/misc.c to use set_dfu_alt_info() */
 #define CONFIG_MISC_COMMON
-#define CONFIG_SET_DFU_ALT_INFO
 #define CONFIG_SET_DFU_ALT_BUF_LEN	(SZ_1K)
 
 /* Set soc_rev, soc_id, board_rev, board_name, fdtfile */
diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 4ad7dc18b1..8dc30be8b7 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -71,8 +71,6 @@
 
 #endif
 
-#define CONFIG_SYS_MTDPARTS_RUNTIME
-
 /* OneNAND config */
 #define CONFIG_USE_ONENAND_BOARD_INIT
 #define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h
index ddf6d790ab..dd0ea2dbde 100644
--- a/include/configs/omap3_logic.h
+++ b/include/configs/omap3_logic.h
@@ -178,9 +178,6 @@
 /* Miscellaneous configurable options */
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 /* FLASH and environment organization */
 
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 04f37559cc..9a5b9f297c 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -140,9 +140,6 @@
 	"run nanddtsboot; " \
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 /* FLASH and environment organization */
 #if defined(CONFIG_MTD_RAW_NAND)
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 211078464d..ecf308e381 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -48,9 +48,6 @@
 	BOOTENV \
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 #if defined(CONFIG_MTD_RAW_NAND)
 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index a4ba7dbcc5..24884b26fb 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -110,9 +110,6 @@
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1)	/* memtest */
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_2 + \
-					0x01F00000) /* 31MB */
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index aac7f182f2..58fa5ccfa3 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -37,10 +37,8 @@
 #define CONFIG_SPL_BSS_MAX_SIZE 0x1080000
 
 /* memtest start addr */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM_1 + 0x2000000)
 
 /* memtest will be run on 16MB */
-#define CONFIG_SYS_MEMTEST_END 	(PHYS_SDRAM_1 + 0x2000000 + 16*1024*1024)
 
 #define CONFIG_SYS_DA850_SYSCFG_SUSPSRC (	\
 	DAVINCI_SYSCFG_SUSPSRC_TIMER0 |		\
diff --git a/include/configs/origen.h b/include/configs/origen.h
index ff9318a81b..3bedc4784b 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -20,8 +20,6 @@
 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 
 #define CONFIG_MACH_TYPE		MACH_TYPE_ORIGEN
diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h
index c8ebe3e390..3a1ea0fc10 100644
--- a/include/configs/ot1200.h
+++ b/include/configs/ot1200.h
@@ -66,7 +66,6 @@
 #define CONFIG_FEC_XCV_TYPE             MII100
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          0x5
-#define CONFIG_PHY_SMSC
 
 #ifndef CONFIG_SPL
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index c42f1a9fce..219e5d216b 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
  */
 
 /*
@@ -9,6 +10,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #if defined(CONFIG_TARGET_P1020MBG)
 #define CONFIG_BOARDNAME "P1020MBG-PC"
 #define CONFIG_VSC7385_ENET
@@ -235,9 +238,6 @@
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x1fffffff
-
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
@@ -537,8 +537,8 @@
 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
 
 /* I2C */
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_FSL_I2C_SPEED	400000
 #define CONFIG_SYS_FSL_I2C_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C_OFFSET	0x3000
@@ -546,6 +546,12 @@
 #define CONFIG_SYS_FSL_I2C2_SLAVE	0x7F
 #define CONFIG_SYS_FSL_I2C2_OFFSET	0x3100
 #define CONFIG_SYS_I2C_NOPROBES		{ {0, 0x29} }
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER	0
+#endif
+
+#define CONFIG_SYS_I2C_FSL
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x52
 #define CONFIG_SYS_SPD_BUS_NUM		1 /* For rom_loc and flash bank */
 
diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index 3ff75663ea..d731f9c8fa 100644
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -9,9 +9,10 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 #if defined(CONFIG_TWR_P1025)
 #define CONFIG_BOARDNAME "TWR-P1025"
-#define CONFIG_PHY_ATHEROS
 #define CONFIG_SYS_LBC_LBCR	0x00080000	/* Conversion of LBC addr */
 #define CONFIG_SYS_LBC_LCRR	0x80000002	/* LB clock ratio reg */
 #endif
@@ -55,9 +56,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_L2_CACHE
 #define CONFIG_BTB
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x1fffffff
-
 #define CONFIG_SYS_CCSRBAR		0xffe00000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
 
diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h
index 238b03f600..2156da671b 100644
--- a/include/configs/pcl063.h
+++ b/include/configs/pcl063.h
@@ -35,8 +35,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC1_BASE_ADDR
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h
index d245987470..4ae955d9ca 100644
--- a/include/configs/pcl063_ull.h
+++ b/include/configs/pcl063_ull.h
@@ -10,6 +10,7 @@
 #define __PCL063_ULL_H
 
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 #include "mx6_common.h"
 
 /* SPL options */
@@ -43,8 +44,6 @@
 #endif
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index fdbc07575c..706a8a2a87 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -94,9 +94,6 @@
  * memtest works on 8 MB in DRAM after skipping 32MB from
  * start addr of ram disk
  */
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + (64 << 20))
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
-					+ (8 * 1024 * 1024))
 
 /* NS16550 Configuration */
 #define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
@@ -128,6 +125,4 @@
 #define CONFIG_AM335X_USB1
 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
 
-#define CONFIG_PHY_SMSC
-
 #endif	/* ! __CONFIG_PCM051_H */
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 72f8d08a66..ba7aad8b05 100644
--- a/include/configs/pcm052.h
+++ b/include/configs/pcm052.h
@@ -10,6 +10,7 @@
 
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
+#include <linux/stringify.h>
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
@@ -26,13 +27,6 @@
 #define CONFIG_SYS_NAND_ONFI_DETECTION
 
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-/* QSPI Configs*/
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE		(SZ_16M)
-#define FSL_QSPI_FLASH_NUM		2
-#define CONFIG_SYS_FSL_QSPI_LE
-#endif
-
 
 #define CONFIG_LOADADDR			0x82000000
 
@@ -148,9 +142,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START	0x80010000
-#define CONFIG_SYS_MEMTEST_END		0x87C00000
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 
 /* Physical memory map */
diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h
index 8a0506911d..17d1981b4e 100644
--- a/include/configs/pengwyn.h
+++ b/include/configs/pengwyn.h
@@ -162,7 +162,5 @@
 
 /* Network */
 #define CONFIG_PHY_RESET	1
-#define CONFIG_PHY_NATSEMI
-#define CONFIG_PHY_REALTEK
 
 #endif	/* ! __CONFIG_PENGWYN_H */
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 2f641d3831..73edd28f1a 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -42,8 +42,6 @@
 #define CONFIG_SYS_FDT_ADDR		0x89d00000
 
 /* Memory Test */
-#define CONFIG_SYS_MEMTEST_START	0x88000000
-#define CONFIG_SYS_MEMTEST_END		0x88080000
 
 /*----------------------------------------------------------------------
  * Commands
@@ -57,7 +55,6 @@
 /*-----------------------------------------------------------------------
  * Networking Configuration
  */
-#define CONFIG_PHY_SMSC
 #define CONFIG_SYS_RX_ETH_BUFFER	8
 #define CONFIG_NET_RETRY_COUNT		20
 #define CONFIG_ARP_TIMEOUT		500 /* millisec */
diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index 376370b07d..27cbfe276d 100644
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -30,9 +30,6 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE		UART1_BASE
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-
 /* MMC Configuration */
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC3_BASE_ADDR
 #define CONFIG_SUPPORT_EMMC_BOOT
@@ -146,8 +143,6 @@
 #define CONFIG_FEC_XCV_TYPE		RGMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		1
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
 
 /* Framebuffer */
 #define CONFIG_VIDEO_BMP_RLE8
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 27e83b47cd..8bfada75f7 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -111,9 +111,7 @@
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
-
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		CONFIG_SYS_MEMTEST_START + SZ_128M
+#include <linux/stringify.h>
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index 4dc206566e..3ca3ec6112 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -108,9 +108,7 @@
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
-
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
+#include <linux/stringify.h>
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
new file mode 100644
index 0000000000..f4da38a7db
--- /dev/null
+++ b/include/configs/pico-imx8mq.h
@@ -0,0 +1,197 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2018 NXP
+ */
+
+#ifndef __IMX8M_PICOPI_H
+#define __IMX8M_PICOPI_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#define CONFIG_SPL_MAX_SIZE		(124 * 1024)
+#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
+#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
+
+#ifdef CONFIG_SPL_BUILD
+/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
+#define CONFIG_SPL_WATCHDOG_SUPPORT
+#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
+#define CONFIG_SPL_STACK		0x187FF0
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_BSS_START_ADDR	0x00180000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x2000	/* 8 KB */
+#define CONFIG_SYS_SPL_MALLOC_START	0x42200000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000	/* 512 KB */
+#define CONFIG_SYS_SPL_PTE_RAM_BASE	0x41580000
+
+/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
+#define CONFIG_MALLOC_F_ADDR		0x182000
+/* For RAW image gives a error info not panic */
+#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
+
+#undef CONFIG_DM_MMC
+#undef CONFIG_DM_PMIC
+
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
+
+#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
+
+#define CONFIG_POWER
+#define CONFIG_POWER_I2C
+#endif
+
+#define CONFIG_REMAKE_ELF
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
+
+#undef CONFIG_CMD_EXPORTENV
+#undef CONFIG_CMD_IMPORTENV
+#undef CONFIG_CMD_IMLS
+
+#undef CONFIG_CMD_CRC32
+
+/* ENET Config */
+/* ENET1 */
+#if defined(CONFIG_CMD_NET)
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_MII
+#define CONFIG_ETHPRIME			"FEC"
+
+#define CONFIG_FEC_MXC
+#define CONFIG_FEC_XCV_TYPE		RGMII
+#define CONFIG_FEC_MXC_PHYADDR		1
+#define FEC_QUIRK_ENET_MAC
+
+#define CONFIG_PHY_GIGE
+#define IMX_FEC_BASE			0x30BE0000
+
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS
+#endif
+
+/* Initial environment variables */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	"script=boot.scr\0"						\
+	"image=Image\0"							\
+	"console=ttymxc0,115200\0"					\
+	"fdt_addr=0x43000000\0"						\
+	"fdt_high=0xffffffffffffffff\0"					\
+	"fdt_file=imx8mq-pico-pi.dtb\0"					\
+	"initrd_addr=0x43800000\0"					\
+	"initrd_high=0xffffffffffffffff\0"				\
+	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"		\
+	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0"	\
+	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0"			\
+	"mmcautodetect=yes\0"						\
+	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 "	\
+	"loadbootscript="						\
+		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
+	"bootscript=echo Running bootscript from mmc ...; source\0"	\
+	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
+	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
+	"mmcboot=echo Booting from mmc ...; "				\
+		"run mmcargs; "						\
+		"echo wait for boot; "					\
+		"fi;\0"							\
+	"netargs=setenv bootargs console=${console} "			\
+		"root=/dev/nfs "					\
+		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0"	\
+	"netboot=echo Booting from net ...; "				\
+		"run netargs;  "					\
+		"if test ${ip_dyn} = yes; then "			\
+			"setenv get_cmd dhcp; "				\
+		"else "							\
+			"setenv get_cmd tftp; "				\
+		"fi; "							\
+		"${get_cmd} ${loadaddr} ${image}; "			\
+		"booti; "
+
+#define CONFIG_BOOTCOMMAND \
+	"mmc dev ${mmcdev}; if mmc rescan; then "			\
+		"if run loadbootscript; then "				\
+			"run bootscript; "				\
+		"else "							\
+			"if run loadimage; then "			\
+				"run mmcboot; "				\
+			"else run netboot; "				\
+			"fi; "						\
+		"fi; "							\
+	"else booti ${loadaddr} - ${fdt_addr}; fi"
+
+/* Link Definitions */
+#define CONFIG_LOADADDR			0x40480000
+
+#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
+
+#define CONFIG_SYS_INIT_RAM_ADDR	0x40000000
+#define CONFIG_SYS_INIT_RAM_SIZE	0x80000
+#define CONFIG_SYS_INIT_SP_OFFSET	\
+	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		\
+	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
+
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_SYS_MMC_ENV_DEV		1	/* USDHC2 */
+#define CONFIG_MMCROOT			"/dev/mmcblk1p2"	/* USDHC2 */
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
+
+#define CONFIG_SYS_SDRAM_BASE		0x40000000
+#define PHYS_SDRAM			0x40000000
+#define PHYS_SDRAM_SIZE			0x80000000	/* 2 GiB DDR */
+
+#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
+					(PHYS_SDRAM_SIZE >> 1))
+
+#define CONFIG_BAUDRATE			115200
+
+#define CONFIG_MXC_UART
+#define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_CBSIZE		1024
+#define CONFIG_SYS_MAXARGS		64
+#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_IMX_BOOTAUX
+
+#define CONFIG_SYS_FSL_USDHC_NUM	2
+#define CONFIG_SYS_FSL_ESDHC_ADDR	0
+
+#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
+
+#define CONFIG_MXC_GPIO
+
+#define CONFIG_CMD_FUSE
+
+/* I2C Configs */
+#define CONFIG_SYS_I2C_SPEED		100000
+
+#define CONFIG_OF_SYSTEM_SETUP
+
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_DM_PMIC
+#endif
+
+#define CONFIG_SYS_BOOTM_LEN		SZ_128M
+
+#endif
diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h
index cb8338f384..771fd8db97 100644
--- a/include/configs/picosam9g45.h
+++ b/include/configs/picosam9g45.h
@@ -86,9 +86,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		0x23e00000
-
 #ifdef CONFIG_SYS_USE_MMC
 /* bootstrap + u-boot + env + linux in mmc */
 
diff --git a/include/configs/pinebook-pro-rk3399.h b/include/configs/pinebook-pro-rk3399.h
new file mode 100644
index 0000000000..4bc8802d11
--- /dev/null
+++ b/include/configs/pinebook-pro-rk3399.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2016 Rockchip Electronics Co., Ltd
+ * Copyright (C) 2020 Peter Robinson <pbrobinson at gmail.com>
+ */
+
+#ifndef __PINEBOOK_PRO_RK3399_H
+#define __PINEBOOK_PRO_RK3399_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdin=serial,usbkbd\0" \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#include <configs/rk3399_common.h>
+
+#if defined(CONFIG_ENV_IS_IN_MMC)
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
+#define CONFIG_ENV_SECT_SIZE		(8 * 1024)
+#endif
+
+#undef CONFIG_SYS_SPI_U_BOOT_OFFS
+#define CONFIG_SYS_SPI_U_BOOT_OFFS	1024 * 512
+
+#define SDRAM_BANK_SIZE			(2UL << 30)
+
+#endif
diff --git a/include/configs/platinum.h b/include/configs/platinum.h
index 210927f4de..5e81c4568a 100644
--- a/include/configs/platinum.h
+++ b/include/configs/platinum.h
@@ -88,10 +88,6 @@
 
 /* Board startup config */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			(CONFIG_SYS_MEMTEST_START + \
-						 PHYS_SDRAM_SIZE - (12 << 20))
-
 #define CONFIG_BOOTCOMMAND			"run bootubi_scr"
 
 /* Miscellaneous configurable options */
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index f958ceb305..9a4bfd1e0e 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -193,9 +193,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #undef CONFIG_SYS_USE_DATAFLASH_CS0
 #undef CONFIG_SYS_USE_NANDFLASH
 #define CONFIG_SYS_USE_FLASH	1
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index 50d953a8e8..7f87edb42d 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -222,9 +222,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START		PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 #define CONFIG_SYS_USE_FLASH	1
 #undef CONFIG_SYS_USE_DATAFLASH
 #undef CONFIG_SYS_USE_NANDFLASH
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 8c181e64af..b0511beb8f 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -59,9 +59,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		0x23e00000
-
 #ifdef CONFIG_NAND_BOOT
 /* bootstrap + u-boot + env in nandflash */
 
diff --git a/include/configs/porter.h b/include/configs/porter.h
index db42176d28..7ffcf5fc38 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -32,7 +32,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index 023092e486..51177f44fe 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -27,10 +27,6 @@
 #define GICD_BASE			0xf7011000
 #define GICC_BASE			0xf7012000
 
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x00100000
-#define CONFIG_SYS_MEMTEST_START	0x05000000
-#define CONFIG_SYS_MEMTEST_END		0x0D000000
-
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 << 20))
 
diff --git a/include/configs/pxa-common.h b/include/configs/pxa-common.h
index e25800a095..2632d48cc9 100644
--- a/include/configs/pxa-common.h
+++ b/include/configs/pxa-common.h
@@ -8,8 +8,6 @@
 #ifndef	__CONFIG_PXA_COMMON_H__
 #define	__CONFIG_PXA_COMMON_H__
 
-#define	CONFIG_SYS_ARM_CACHE_WRITETHROUGH
-
 /*
  * KGDB
  */
diff --git a/include/configs/pxm2.h b/include/configs/pxm2.h
index 543eb2d6fb..ab9c116034 100644
--- a/include/configs/pxm2.h
+++ b/include/configs/pxm2.h
@@ -36,8 +36,6 @@
 #define CONFIG_SYS_I2C_SPEED		400000
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
 
-#define CONFIG_PHY_ATHEROS
-
 #define CONFIG_FACTORYSET
 
 #ifndef CONFIG_SPL_BUILD
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index 42a25623c3..4227a280c7 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -73,9 +73,6 @@
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR		0x81000000
 
-#define CONFIG_SYS_MEMTEST_START	0x80100000
-#define CONFIG_SYS_MEMTEST_END		0x80800000
-
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index e4a78fbdda..801ba76b3e 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -73,9 +73,6 @@
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR		0xffffffff81000000
 
-#define CONFIG_SYS_MEMTEST_START	0xffffffff80100000
-#define CONFIG_SYS_MEMTEST_END		0xffffffff80800000
-
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 47fb181693..cfbd472c82 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -24,9 +24,6 @@
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		16	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /* Needed to fill the ccsrbar pointer */
 
 /* Virtual address to CCSRBAR */
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h
index 49e307b430..52c33600b3 100644
--- a/include/configs/qemu-x86.h
+++ b/include/configs/qemu-x86.h
@@ -22,8 +22,6 @@
 #include <config_distro_bootcmd.h>
 #include <configs/x86-common.h>
 
-#define CONFIG_PREBOOT "pci enum"
-
 #define CONFIG_SYS_MONITOR_LEN		(1 << 20)
 
 #define CONFIG_STD_DEVICES_SETTINGS	"stdin=serial,i8042-kbd\0" \
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index afa446f53a..a8886251e0 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -17,9 +17,6 @@
 
 #define CONFIG_SYS_PBSIZE		256
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
-
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
 /* Address of u-boot image in Flash */
 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h
index b562308db8..e32ab9d7ae 100644
--- a/include/configs/r7780mp.h
+++ b/include/configs/r7780mp.h
@@ -25,9 +25,6 @@
 
 #define CONFIG_SYS_PBSIZE		256
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
-
 /* Flash board support */
 #define CONFIG_SYS_FLASH_BASE		(0xA0000000)
 #ifdef CONFIG_SYS_R7780MP_OLD_FLASH
diff --git a/include/configs/rastaban.h b/include/configs/rastaban.h
index bd5e00e10c..7f1284448c 100644
--- a/include/configs/rastaban.h
+++ b/include/configs/rastaban.h
@@ -41,8 +41,6 @@
 #define EEPROM_ADDR_DDR3 0x90
 #define EEPROM_ADDR_CHIP 0x120
 
-#define CONFIG_PHY_SMSC
-
 #define CONFIG_FACTORYSET
 
 /* Define own nand partitions */
diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h
index 89a8a44bbe..f0ae6e67a7 100644
--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
@@ -48,6 +48,8 @@
 
 #define ENV_MEM_LAYOUT_SETTINGS \
 	"scriptaddr=0x00500000\0" \
+	"script_offset_f=0xffe000\0" \
+	"script_size_f=0x2000\0" \
 	"pxefile_addr_r=0x00600000\0" \
 	"fdt_addr_r=0x01f00000\0" \
 	"kernel_addr_r=0x02080000\0" \
@@ -58,6 +60,7 @@
 #endif
 
 #include <config_distro_bootcmd.h>
+#include <environment/distro/sf.h>
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	ENV_MEM_LAYOUT_SETTINGS \
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h
index b55e09a9ca..0b9e24d1db 100644
--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
@@ -23,6 +23,12 @@
 	#define BOOT_TARGET_MMC(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_NVME)
+	#define BOOT_TARGET_NVME(func) func(NVME, nvme, 0)
+#else
+	#define BOOT_TARGET_NVME(func)
+#endif
+
 #if CONFIG_IS_ENABLED(CMD_USB)
 	#define BOOT_TARGET_USB(func) func(USB, usb, 0)
 #else
@@ -41,11 +47,27 @@
 	#define BOOT_TARGET_DHCP(func)
 #endif
 
+#if CONFIG_IS_ENABLED(CMD_SF)
+	#define BOOT_TARGET_SF(func)	func(SF, sf, 0)
+#else
+	#define BOOT_TARGET_SF(func)
+#endif
+
+#ifdef CONFIG_ROCKCHIP_RK3399
+#define BOOT_TARGET_DEVICES(func) \
+	BOOT_TARGET_MMC(func) \
+	BOOT_TARGET_NVME(func) \
+	BOOT_TARGET_USB(func) \
+	BOOT_TARGET_PXE(func) \
+	BOOT_TARGET_DHCP(func) \
+	BOOT_TARGET_SF(func)
+#else
 #define BOOT_TARGET_DEVICES(func) \
 	BOOT_TARGET_MMC(func) \
 	BOOT_TARGET_USB(func) \
 	BOOT_TARGET_PXE(func) \
 	BOOT_TARGET_DHCP(func)
+#endif
 
 #ifdef CONFIG_ARM64
 #define ROOT_UUID "B921B045-1DF0-41C3-AF44-4C6F280D3FAE;\0"
diff --git a/include/configs/rockpro64_rk3399.h b/include/configs/rockpro64_rk3399.h
index 5f52c1e4f6..37a08b2c00 100644
--- a/include/configs/rockpro64_rk3399.h
+++ b/include/configs/rockpro64_rk3399.h
@@ -6,10 +6,17 @@
 #ifndef __ROCKPRO64_RK3399_H
 #define __ROCKPRO64_RK3399_H
 
+#define ROCKCHIP_DEVICE_SETTINGS \
+	"stdin=serial,usbkbd\0" \
+	"stdout=serial,vidconsole\0" \
+	"stderr=serial,vidconsole\0"
+
 #include <configs/rk3399_common.h>
 
 #define CONFIG_SYS_MMC_ENV_DEV 0
 
 #define SDRAM_BANK_SIZE			(2UL << 30)
 
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
 #endif
diff --git a/include/configs/rpi.h b/include/configs/rpi.h
index b53a4b65d0..834f1cd236 100644
--- a/include/configs/rpi.h
+++ b/include/configs/rpi.h
@@ -55,8 +55,6 @@
 					 CONFIG_SYS_SDRAM_SIZE - \
 					 GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_MALLOC_LEN		SZ_4M
-#define CONFIG_SYS_MEMTEST_START	0x00100000
-#define CONFIG_SYS_MEMTEST_END		0x00200000
 #define CONFIG_LOADADDR			0x00200000
 
 #ifdef CONFIG_ARM64
diff --git a/include/configs/rut.h b/include/configs/rut.h
index 296bdc26ff..0dcdb101a0 100644
--- a/include/configs/rut.h
+++ b/include/configs/rut.h
@@ -31,8 +31,6 @@
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 
-#define CONFIG_PHY_NATSEMI
-
 #define CONFIG_FACTORYSET
 
 /* Watchdog */
diff --git a/include/configs/s32v234evb.h b/include/configs/s32v234evb.h
index 53c94ed70e..5821d21688 100644
--- a/include/configs/s32v234evb.h
+++ b/include/configs/s32v234evb.h
@@ -68,7 +68,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC_BASE_ADDR
 #define CONFIG_SYS_FSL_ESDHC_NUM	1
 
-#define CONFIG_CMD_MMC
 /* #define CONFIG_CMD_EXT2 EXT2 Support */
 
 #if 0
@@ -144,13 +143,11 @@
 	"run distro_bootcmd"
 
 #include <config_distro_bootcmd.h>
+#include <linux/stringify.h>
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_PROMPT		"=> "
 
-#define CONFIG_SYS_MEMTEST_START	(DDR_BASE_ADDR)
-#define CONFIG_SYS_MEMTEST_END		(DDR_BASE_ADDR + 0x7C00000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ				1000
 
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 20538df025..620217f528 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -147,8 +147,6 @@
 
 #define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4000000)
 
 /* Goni has 3 banks of DRAM, but swap the bank */
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index ec9abaf584..5a80958739 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -37,8 +37,6 @@
 #define CONFIG_SYS_MONITOR_BASE	0x00000000
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
 
 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 669602eb60..84c6ca95ea 100644
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -12,7 +12,6 @@
 #include "rcar-gen3-common.h"
 
 /* Ethernet RAVB */
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Generic Timer Definitions (use in assembler source) */
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 1c13055cdc..484a15df79 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -43,8 +43,6 @@
 
 /* Memory things - we don't really want a memory test */
 #define CONFIG_SYS_LOAD_ADDR		0x00000000
-#define CONFIG_SYS_MEMTEST_START	0x00100000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x1000)
 #define CONFIG_SYS_FDT_LOAD_ADDR	        0x100
 
 #define CONFIG_PHYSMEM
@@ -116,9 +114,6 @@
 	BOOTENV \
 	MEM_LAYOUT_ENV_SETTINGS
 
-#define CONFIG_GZIP_COMPRESSED
-#define CONFIG_BZIP2
-
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_SYS_IDE_MAXBUS		1
 #define CONFIG_SYS_ATA_IDE0_OFFSET	0
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 9d65584838..55b9a3c182 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -23,8 +23,6 @@
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
 #undef CONFIG_SYS_DRAM_TEST		/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * DDR Setup
diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index ae2c0033d0..55c4bff28a 100644
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -12,6 +12,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * Top level Makefile configuration choices
  */
@@ -73,8 +75,6 @@
 #define CONFIG_ENABLE_36BIT_PHYS	1
 
 #undef	CONFIG_SYS_DRAM_TEST			/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 #define CONFIG_SYS_CCSRBAR		0xe0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index 011e5736e2..4ab364ae9a 100644
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -69,8 +69,6 @@
 #endif
 
 #undef	CONFIG_SYS_DRAM_TEST				/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
 
 /*
  * Base addresses -- Note these are effective addresses where the
diff --git a/include/configs/sc_sps_1.h b/include/configs/sc_sps_1.h
index 8db2772d75..3484bfebf2 100644
--- a/include/configs/sc_sps_1.h
+++ b/include/configs/sc_sps_1.h
@@ -28,7 +28,6 @@
 /* FEC Ethernet on SoC */
 #ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_MXC
-#define CONFIG_PHY_SMSC
 #endif
 
 /* USB */
diff --git a/include/configs/secomx6quq7.h b/include/configs/secomx6quq7.h
index 20acc40363..b390c2fc52 100644
--- a/include/configs/secomx6quq7.h
+++ b/include/configs/secomx6quq7.h
@@ -18,9 +18,6 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE		UART2_BASE
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-
 /* MMC Configuration */
 #define CONFIG_SYS_FSL_USDHC_NUM        2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
diff --git a/include/configs/sh7752evb.h b/include/configs/sh7752evb.h
index 3a1f1ac288..7211a2afa6 100644
--- a/include/configs/sh7752evb.h
+++ b/include/configs/sh7752evb.h
@@ -22,10 +22,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF2	1
 
-#define CONFIG_SYS_MEMTEST_START	(SH7752EVB_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 480 * 1024 * 1024)
-#undef	CONFIG_SYS_MEMTEST_SCRATCH
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
 #define CONFIG_SYS_SDRAM_BASE		(SH7752EVB_SDRAM_BASE)
@@ -43,10 +39,8 @@
 #define CONFIG_SH_ETHER_PHY_ADDR	18
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
 #define CONFIG_SH_ETHER_USE_GETHER	1
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_PHY_VITESSE
 
 #define SH7752EVB_ETHERNET_MAC_BASE_SPI	0x00090000
 #define SH7752EVB_SPI_SECTOR_SIZE	(64 * 1024)
diff --git a/include/configs/sh7753evb.h b/include/configs/sh7753evb.h
index 5253a5be32..464a552480 100644
--- a/include/configs/sh7753evb.h
+++ b/include/configs/sh7753evb.h
@@ -22,10 +22,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF2	1
 
-#define CONFIG_SYS_MEMTEST_START	(SH7753EVB_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 480 * 1024 * 1024)
-#undef	CONFIG_SYS_MEMTEST_SCRATCH
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
 #define CONFIG_SYS_SDRAM_BASE		(SH7753EVB_SDRAM_BASE)
@@ -43,10 +39,8 @@
 #define CONFIG_SH_ETHER_PHY_ADDR	18
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
 #define CONFIG_SH_ETHER_USE_GETHER	1
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
-#define CONFIG_PHY_VITESSE
 
 #define SH7753EVB_ETHERNET_MAC_BASE_SPI	0x00090000
 #define SH7753EVB_SPI_SECTOR_SIZE	(64 * 1024)
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index d46aaad441..ac6338cec1 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -25,10 +25,6 @@
 /* SCIF */
 #define CONFIG_CONS_SCIF2	1
 
-#define CONFIG_SYS_MEMTEST_START	(SH7757LCR_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 224 * 1024 * 1024)
-#undef	CONFIG_SYS_MEMTEST_SCRATCH
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
 #define CONFIG_SYS_SDRAM_BASE		(SH7757LCR_SDRAM_BASE)
@@ -45,7 +41,6 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	1
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK	1
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 
diff --git a/include/configs/sh7763rdp.h b/include/configs/sh7763rdp.h
index 2e79fea053..b664428806 100644
--- a/include/configs/sh7763rdp.h
+++ b/include/configs/sh7763rdp.h
@@ -26,8 +26,6 @@
 /* SDRAM */
 #define CONFIG_SYS_SDRAM_BASE		(0x8C000000)
 #define CONFIG_SYS_SDRAM_SIZE		(64 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
 
 /* Flash(NOR) */
 #define CONFIG_SYS_FLASH_BASE		(0xA0000000)
@@ -64,7 +62,6 @@
 /* Ether */
 #define CONFIG_SH_ETHER_USE_PORT (1)
 #define CONFIG_SH_ETHER_PHY_ADDR (0x01)
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h
index cab2876651..ed93117650 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -54,9 +54,6 @@
  * memtest works on 8 MB in DRAM after skipping 32MB from
  * start addr of ram disk
  */
-#define CONFIG_SYS_MEMTEST_START	(PHYS_DRAM_1 + (64 * 1024 * 1024))
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
-					+ (8 * 1024 * 1024))
 
 #define CONFIG_SYS_LOAD_ADDR		0x81000000 /* Default load address */
 
diff --git a/include/configs/silk.h b/include/configs/silk.h
index a78da46a17..eee60fdfab 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -32,7 +32,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index 624ad3b768..aacdd1263e 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -69,8 +69,6 @@
  * Perform a SDRAM Memtest from the start of SDRAM
  * till the beginning of the U-Boot position in RAM.
  */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - 0x100000)
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN \
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index dbdb9a4a07..20d6063676 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -110,8 +110,6 @@
  */
 #define CONFIG_SYS_PBSIZE	384	/* Print Buffer Size */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5e00000)
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
 
 /* SMDKC100 has 1 banks of DRAM, we use only one in U-Boot */
diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h
index 13e81ee2ff..336571d4c4 100644
--- a/include/configs/smdkv310.h
+++ b/include/configs/smdkv310.h
@@ -42,8 +42,6 @@
 /* Miscellaneous configurable options */
 #define CONFIG_DEFAULT_CONSOLE		"console=ttySAC2,115200n8\0"
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x6000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 
 /* SMDKV310 has 4 bank of DRAM */
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index b0408a5592..35cd7f69c1 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -32,8 +32,6 @@
 					 GENERATED_GBL_DATA_SIZE)
 
 /* Mem test settings */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index ffcfdcaafc..be36e9f586 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -31,8 +31,6 @@
 					 GENERATED_GBL_DATA_SIZE)
 
 /* Mem test settings */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + (1024 * 1024))
 
 /* NAND Flash */
 #define CONFIG_SYS_NAND_ECC_BASE	ATMEL_BASE_ECC
@@ -103,7 +101,6 @@
 
 /* Command line configuration */
 #define CONFIG_CMD_MII
-#define CONFIG_CMD_MMC
 #define CONFIG_CMD_CACHE
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h
index b059100ccd..ad4c3c0786 100644
--- a/include/configs/socfpga_arria5_secu1.h
+++ b/include/configs/socfpga_arria5_secu1.h
@@ -7,6 +7,7 @@
 #define __CONFIG_SOCFPGA_SECU1_H__
 
 #include <asm/arch/base_addr_ac5.h>
+#include <linux/stringify.h>
 
 /* Call misc_init_r */
 #define CONFIG_MISC_INIT_R
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 410ec80618..07c9745eba 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -5,6 +5,8 @@
 #ifndef __CONFIG_SOCFPGA_COMMON_H__
 #define __CONFIG_SOCFPGA_COMMON_H__
 
+#include <linux/stringify.h>
+
 /*
  * High level configuration
  */
@@ -17,8 +19,6 @@
  */
 #define PHYS_SDRAM_1			0x0
 #define CONFIG_SYS_MALLOC_LEN		(64 * 1024 * 1024)
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE
 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
 #define CONFIG_SYS_INIT_RAM_SIZE	SOCFPGA_PHYS_OCRAM_SIZE
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 87c73457a0..7237ec95e3 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -9,6 +9,7 @@
 
 #include <asm/arch/base_addr_s10.h>
 #include <asm/arch/handoff_s10.h>
+#include <linux/stringify.h>
 
 /*
  * U-Boot general configurations
@@ -117,8 +118,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define PHYS_SDRAM_1			0x0
 #define PHYS_SDRAM_1_SIZE		(1 * 1024 * 1024 * 1024)
 #define CONFIG_SYS_SDRAM_BASE		0
-#define CONFIG_SYS_MEMTEST_START	0
-#define CONFIG_SYS_MEMTEST_END		PHYS_SDRAM_1_SIZE - 0x200000
 
 /*
  * Serial / UART configurations
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 4fe67dced8..da60546966 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -51,8 +51,6 @@
 #define CONFIG_SYS_INIT_DBCR DBCR_IDM		/* Enable Debug Exceptions	*/
 
 #undef	CONFIG_SYS_DRAM_TEST			/* memory test, takes time	*/
-#define CONFIG_SYS_MEMTEST_START	0x00400000
-#define CONFIG_SYS_MEMTEST_END		0x00C00000
 
 #define CONFIG_SYS_CCSRBAR		0xE0000000
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR
diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h
index 6759f24c08..85c68cdee6 100644
--- a/include/configs/somlabs_visionsom_6ull.h
+++ b/include/configs/somlabs_visionsom_6ull.h
@@ -73,8 +73,6 @@
 	"fi"
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h
index 85e498dc66..e74ba6cc34 100644
--- a/include/configs/spear-common.h
+++ b/include/configs/spear-common.h
@@ -147,8 +147,6 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 
-#define CONFIG_SYS_MEMTEST_START		0x00800000
-#define CONFIG_SYS_MEMTEST_END			0x04000000
 #define CONFIG_SYS_MALLOC_LEN			(1024*1024)
 #define CONFIG_SYS_LOAD_ADDR			0x00800000
 
diff --git a/include/configs/spear6xx_evb.h b/include/configs/spear6xx_evb.h
index cfadfc8e48..4fedc9efce 100644
--- a/include/configs/spear6xx_evb.h
+++ b/include/configs/spear6xx_evb.h
@@ -29,7 +29,6 @@
 #define CONFIG_SYS_NAND_BASE			0xD2000000
 
 /* Ethernet PHY configuration */
-#define CONFIG_PHY_NATSEMI
 
 /* Environment Settings */
 #define CONFIG_EXTRA_ENV_SETTINGS              CONFIG_EXTRA_ENV_USBTTY
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h
index 45343d2323..529152f60c 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -33,7 +33,6 @@
 
 #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL	(8)
 #define CONFIG_DW_ALTDESCRIPTOR
-#define CONFIG_PHY_SMSC
 
 #define CONFIG_SYS_HZ_CLOCK		1000000	/* Timer is clocked at 1MHz */
 
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
index 2ba4fb1305..f271b84a59 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp1.h
@@ -23,10 +23,6 @@
 #define CONFIG_SYS_SDRAM_BASE			STM32_DDR_BASE
 #define CONFIG_SYS_INIT_SP_ADDR			CONFIG_SYS_TEXT_BASE
 
-#ifdef CONFIG_STM32MP1_OPTEE
-#define CONFIG_SYS_MEM_TOP_HIDE			SZ_32M
-#endif /* CONFIG_STM32MP1_OPTEE */
-
 /*
  * Console I/O buffer size
  */
@@ -65,11 +61,6 @@
 #define CONFIG_SPL_STACK		(STM32_SYSRAM_BASE + \
 					 STM32_SYSRAM_SIZE)
 #endif /* #ifdef CONFIG_SPL */
-
-#define CONFIG_SYS_MEMTEST_START	STM32_DDR_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_64M)
-#define CONFIG_SYS_MEMTEST_SCRATCH	(CONFIG_SYS_MEMTEST_END + 4)
-
 /*MMC SD*/
 #define CONFIG_SYS_MMC_MAX_DEVICE	3
 
@@ -85,13 +76,6 @@
 #define CONFIG_SYS_AUTOLOAD		"no"
 #endif
 
-/* Dynamic MTD partition support */
-#if defined(CONFIG_STM32_QSPI) || defined(CONFIG_NAND_STM32_FMC2)
-#define CONFIG_SYS_MTDPARTS_RUNTIME
-#endif
-
-#define CONFIG_SET_DFU_ALT_INFO
-
 #ifdef CONFIG_DM_VIDEO
 #define CONFIG_VIDEO_BMP_RLE8
 #define CONFIG_BMP_16BPP
@@ -138,7 +122,7 @@
  * bootcmd for stm32mp1:
  * for serial/usb: execute the stm32prog command
  * for mmc boot (eMMC, SD card), boot only on the same device
- * for nand boot, boot with on ubifs partition on nand
+ * for nand or spi-nand boot, boot with on ubifs partition on UBI partition
  * for nor boot, use the default order
  */
 #define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
@@ -149,65 +133,14 @@
 		"run env_check;" \
 		"if test ${boot_device} = mmc;" \
 		"then env set boot_targets \"mmc${boot_instance}\"; fi;" \
-		"if test ${boot_device} = nand;" \
+		"if test ${boot_device} = nand ||" \
+		  " test ${boot_device} = spi-nand ;" \
 		"then env set boot_targets ubifs0; fi;" \
 		"run distro_bootcmd;" \
 	"fi;\0"
 
 #include <config_distro_bootcmd.h>
 
-#ifdef CONFIG_STM32MP1_OPTEE
-/* with OPTEE: define specific MTD partitions = teeh, teed, teex */
-#define STM32MP_MTDPARTS \
-	"mtdparts_nor0=256k(fsbl1),256k(fsbl2),2m(ssbl),256k(u-boot-env),256k(teeh),256k(teed),256k(teex),-(nor_user)\0" \
-	"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),512k(teeh),512k(teed),512k(teex),-(UBI)\0" \
-	"mtdparts_spi-nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),"\
-		"512k(teeh),512k(teed),512k(teex),-(UBI)\0"
-
-#else /* CONFIG_STM32MP1_OPTEE */
-#define STM32MP_MTDPARTS \
-	"mtdparts_nor0=256k(fsbl1),256k(fsbl2),2m(ssbl),256k(u-boot-env),-(nor_user)\0" \
-	"mtdparts_nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0" \
-	"mtdparts_spi-nand0=2m(fsbl),2m(ssbl1),2m(ssbl2),-(UBI)\0"
-
-#endif /* CONFIG_STM32MP1_OPTEE */
-
-#ifndef CONFIG_SYS_MTDPARTS_RUNTIME
-#undef STM32MP_MTDPARTS
-#define STM32MP_MTDPARTS
-#endif
-
-#define STM32MP_DFU_ALT_RAM \
-	"dfu_alt_info_ram=ram 0=" \
-		"uImage ram ${kernel_addr_r} 0x2000000;" \
-		"devicetree.dtb ram ${fdt_addr_r} 0x100000;" \
-		"uramdisk.image.gz ram ${ramdisk_addr_r} 0x10000000\0"
-
-#ifdef CONFIG_SET_DFU_ALT_INFO
-#define STM32MP_DFU_ALT_INFO \
-	"dfu_alt_info_nor0=mtd nor0=" \
-		"nor_fsbl1 part 1;nor_fsbl2 part 2;" \
-		"nor_ssbl part 3;nor_env part 4\0" \
-	"dfu_alt_info_nand0=mtd nand0="\
-		"nand_fsbl part 1;nand_ssbl1 part 2;" \
-		"nand_ssbl2 part 3;nand_UBI partubi 4\0" \
-	"dfu_alt_info_spi-nand0=mtd spi-nand0="\
-		"spi-nand_fsbl part 1;spi-nand_ssbl1 part 2;" \
-		"spi-nand_ssbl2 part 3;spi-nand_UBI partubi 4\0" \
-	"dfu_alt_info_mmc0=mmc 0=" \
-		"sdcard_fsbl1 part 0 1;sdcard_fsbl2 part 0 2;" \
-		"sdcard_ssbl part 0 3;sdcard_bootfs part 0 4;" \
-		"sdcard_vendorfs part 0 5;sdcard_rootfs part 0 6;" \
-		"sdcard_userfs part 0 7\0" \
-	"dfu_alt_info_mmc1=mmc 1=" \
-		"emmc_fsbl1 raw 0x0 0x200 mmcpart 1;" \
-		"emmc_fsbl2 raw 0x0 0x200 mmcpart 2;emmc_ssbl part 1 1;" \
-		"emmc_bootfs part 1 2;emmc_vendorfs part 1 3;" \
-		"emmc_rootfs part 1 4;emmc_userfs part 1 5\0"
-#else
-#define STM32MP_DFU_ALT_INFO
-#endif
-
 /*
  * memory layout for 32M uncompressed/compressed kernel,
  * 1M fdt, 1M script, 1M pxe and 1M for splashimage
@@ -226,9 +159,6 @@
 	"env_check=if test $env_default -eq 1;"\
 		" then env set env_default 0;env save;fi\0" \
 	STM32MP_BOOTCMD \
-	STM32MP_MTDPARTS \
-	STM32MP_DFU_ALT_RAM \
-	STM32MP_DFU_ALT_INFO \
 	BOOTENV \
 	"boot_net_usb_start=true\0"
 
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 4df2750a89..b5bfac77f1 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -103,8 +103,6 @@
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
 #define CONFIG_SYS_SDRAM_SIZE		128	/* SDRAM size in MB */
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x400)
-#define CONFIG_SYS_MEMTEST_END		((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
 #define CONFIG_SYS_DRAM_TEST
 
 #if defined(CONFIG_CF_SBF)
diff --git a/include/configs/stout.h b/include/configs/stout.h
index 67345958be..a1e7e86f39 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -36,7 +36,6 @@
 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
diff --git a/include/configs/strider.h b/include/configs/strider.h
index ac9fce80ce..4ad3401c04 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -8,6 +8,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -90,8 +92,6 @@
 /*
  * Memory test
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000 /* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x07f00000
 
 /*
  * The reserved memory
@@ -326,7 +326,6 @@ void fpga_control_clear(unsigned int bus, int pin);
 /*
  * Software (bit-bang) MII driver configuration
  */
-#define CONFIG_BITBANGMII		/* bit-bang MII PHY management */
 #define CONFIG_BITBANGMII_MULTI
 
 /*
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h
index 81e1e49c92..0058dcd4bb 100644
--- a/include/configs/stv0991.h
+++ b/include/configs/stv0991.h
@@ -35,9 +35,6 @@
 /* Command support defines */
 #define CONFIG_PHY_RESET_DELAY			10000		/* in usec */
 
-#define CONFIG_SYS_MEMTEST_START               0x0000
-#define CONFIG_SYS_MEMTEST_END                 1024*1024
-
 /* Misc configuration */
 
 #define CONFIG_BOOTCOMMAND                     "go 0x40040000"
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 0ef289fd64..5b0bec0561 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -272,10 +272,6 @@ extern int soft_i2c_gpio_scl;
 
 /* Ethernet support */
 
-#ifdef CONFIG_SUN7I_GMAC
-#define CONFIG_PHY_REALTEK
-#endif
-
 #ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h
deleted file mode 100644
index d74707971b..0000000000
--- a/include/configs/suvd3.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *                    Dave Liu <daveliu@freescale.com>
- *
- * Copyright (C) 2007 Logic Product Development, Inc.
- *                    Peter Barada <peterb@logicpd.com>
- *
- * Copyright (C) 2007 MontaVista Software, Inc.
- *                    Anton Vorontsov <avorontsov@ru.mvista.com>
- *
- * (C) Copyright 2010
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- */
-
-#define CONFIG_HOSTNAME		"suvd3"
-
-/* include common defines/options for all Keymile boards */
-#include "km/keymile-common.h"
-#include "km/km-powerpc.h"
-#include "km/km-mpc83xx.h"
-#include "km/km-mpc832x.h"
-
-#define CONFIG_SYS_MAMR	(MxMR_GPL_x4DIS | \
-			 0x0000c000 | \
-			 MxMR_WLFx_2X)
-#endif /* __CONFIG_H */
diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index 5d087caf31..976d527a08 100644
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -45,9 +45,6 @@
 #define CONFIG_ADDR_MAP
 #define CONFIG_SYS_NUM_ADDR_MAP		64	/* number of TLB1 entries */
 
-#define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */
-#define CONFIG_SYS_MEMTEST_END		0x00400000
-
 /*
  *  Config the L3 Cache as L3 SRAM
  */
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
index a2bb1b55eb..c13e997921 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -81,9 +81,6 @@
 #define CONFIG_SYS_MAXARGS		32	/* max number of command */
 						/* args */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
-#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
-					0x01F00000) /* 31MB */
 
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
 								/* address */
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index e95cd0087d..a283e1e029 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -131,10 +131,7 @@
 
 /* turn on command-line edit/hist/auto */
 
-#define CONFIG_SYS_MEMTEST_START	(0x82000000)		/* memtest */
 								/* defaults */
-#define CONFIG_SYS_MEMTEST_END		(0x83FFFFFF)		/* 64MB */
-#define CONFIG_SYS_MEMTEST_SCRATCH	(0x81000000)	/* dummy address */
 
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
 							/* load address */
diff --git a/include/configs/tb100.h b/include/configs/tb100.h
index a761c37335..ae54520696 100644
--- a/include/configs/tb100.h
+++ b/include/configs/tb100.h
@@ -38,7 +38,6 @@
  * Until Realtek PHY driver is fixed fall back to generic PHY driver
  * which implements all required functionality and behaves much more stable.
  *
- * #define CONFIG_PHY_REALTEK
  *
  */
 
diff --git a/include/configs/tbs2910.h b/include/configs/tbs2910.h
index b598fca1ec..7376b91f55 100644
--- a/include/configs/tbs2910.h
+++ b/include/configs/tbs2910.h
@@ -30,10 +30,6 @@
 
 #define CONFIG_SYS_MALLOC_LEN		(128 * 1024 * 1024)
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END \
-	(CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
-
 #define CONFIG_SYS_BOOTMAPSZ		0x10000000
 
 /* Serial console */
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index f2cdd9c019..175c55c613 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -52,9 +52,6 @@
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
 
-#define CONFIG_SYS_MEMTEST_START	(NV_PA_SDRC_CS0 + 0x600000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x100000)
-
 /*-----------------------------------------------------------------------
  * Physical Memory Map
  */
diff --git a/include/configs/thuban.h b/include/configs/thuban.h
index d909be9b01..15a8469fef 100644
--- a/include/configs/thuban.h
+++ b/include/configs/thuban.h
@@ -34,8 +34,6 @@
 #define EEPROM_ADDR_DDR3 0x90
 #define EEPROM_ADDR_CHIP 0x120
 
-#define CONFIG_PHY_SMSC
-
 #define CONFIG_FACTORYSET
 
 /* Define own nand partitions */
diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h
index dac7e4ad95..4d3c58d1e8 100644
--- a/include/configs/thunderx_88xx.h
+++ b/include/configs/thunderx_88xx.h
@@ -25,9 +25,6 @@
 /* Generic Timer Definitions */
 #define COUNTER_FREQUENCY		(0x1800000)	/* 24MHz */
 
-#define CONFIG_SYS_MEMTEST_START	MEM_BASE
-#define CONFIG_SYS_MEMTEST_END		(MEM_BASE + PHYS_SDRAM_1_SIZE)
-
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
 
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 46b1b41ef9..99ddc3e923 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -87,10 +87,6 @@
 /* Console I/O Buffer Size */
 #define CONFIG_SYS_CBSIZE		512
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START \
-					+ PHYS_DRAM_1_SIZE - (8 << 12))
-
 #define CONFIG_SYS_LOAD_ADDR		0x81000000	/* Default */
 
 /**
@@ -152,7 +148,6 @@
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_NET_RETRY_COUNT         10
-#define CONFIG_PHY_ET1011C
 #define CONFIG_PHY_ET1011C_TX_CLK_FIX
 
 #endif	/* ! __CONFIG_TI814X_EVM_H */
diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h
index a612bb5b4a..08829781e3 100644
--- a/include/configs/ti_armv7_common.h
+++ b/include/configs/ti_armv7_common.h
@@ -63,7 +63,7 @@
 	"name_fit=fitImage\0" \
 	"update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \
 	"get_overlaystring=" \
-		"for overlay in $overlay_files;" \
+		"for overlay in $name_overlays;" \
 		"do;" \
 		"setenv overlaystring ${overlaystring}'#'${overlay};" \
 		"done;\0" \
diff --git a/include/configs/titanium.h b/include/configs/titanium.h
index d6ab5e4393..ec316f325c 100644
--- a/include/configs/titanium.h
+++ b/include/configs/titanium.h
@@ -47,9 +47,6 @@
 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS	0
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + (500 << 20))
-
 #define CONFIG_HOSTNAME			"titanium"
 #define CONFIG_UBI_PART			ubi
 #define CONFIG_UBIFS_VOLUME		rootfs0
diff --git a/include/configs/topic_miami.h b/include/configs/topic_miami.h
index 73fdfae461..0e4a824c42 100644
--- a/include/configs/topic_miami.h
+++ b/include/configs/topic_miami.h
@@ -36,10 +36,6 @@
 /* FPGA commands that we don't use */
 
 /* Extras */
-#undef CONFIG_SYS_MEMTEST_START
-#define CONFIG_SYS_MEMTEST_START	0
-#undef CONFIG_SYS_MEMTEST_END
-#define CONFIG_SYS_MEMTEST_END	0x18000000
 
 /* Faster flash, ours may run at 108 MHz */
 #undef CONFIG_SPI_FLASH_WINBOND
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index 8f13744c32..75e7458067 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include/configs/tplink_wdr4300.h
@@ -51,8 +51,6 @@
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START	0x80100000
-#define CONFIG_SYS_MEMTEST_END		0x83f00000
 
 #define CONFIG_CMD_MII
 
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 895cd0324e..13ab1cc4bf 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -9,6 +9,8 @@
 #define __CONFIG_H
 
 #include <linux/kconfig.h>
+#include <linux/stringify.h>
+
 /* SPL */
 /* #if defined(CONFIG_SPL_BUILD) */
 /* common IMX6 SPL configuration */
diff --git a/include/configs/tqma6_wru4.h b/include/configs/tqma6_wru4.h
index 13b87e9b52..4c4a1a0ee6 100644
--- a/include/configs/tqma6_wru4.h
+++ b/include/configs/tqma6_wru4.h
@@ -10,7 +10,6 @@
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_ETHPRIME			"FEC"
 #define CONFIG_FEC_MXC_PHYADDR		0x01
-#define CONFIG_PHY_SMSC
 
 /* UART */
 #define CONFIG_MXC_UART_BASE		UART4_BASE
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 37fadc5210..f39a7c726a 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -27,8 +27,6 @@
 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
 
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5000000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x4800000)
 
 /* select serial console configuration */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 8b71c25757..f6593e227b 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -25,8 +25,6 @@
 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x5E00000)
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x3E00000)
 
 /* select serial console configuration */
diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h
index 1e4459747d..83aa3cd468 100644
--- a/include/configs/tricorder.h
+++ b/include/configs/tricorder.h
@@ -176,10 +176,6 @@
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
 
-#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0 + 0x00000000)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					0x07000000) /* 112 MB */
-
 #define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0 + 0x02000000)
 
 /*
@@ -248,5 +244,4 @@
 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
 
-#define CONFIG_SYS_MEMTEST_SCRATCH	0x81000000
 #endif /* __CONFIG_H */
diff --git a/include/configs/ts4800.h b/include/configs/ts4800.h
index bd50d3b19c..e563f3fe8a 100644
--- a/include/configs/ts4800.h
+++ b/include/configs/ts4800.h
@@ -50,7 +50,6 @@
 /*
  * Eth Configs
  */
-#define CONFIG_PHY_SMSC
 
 #define CONFIG_FEC_MXC
 #define IMX_FEC_BASE	        FEC_BASE_ADDR
diff --git a/include/configs/turris_mox.h b/include/configs/turris_mox.h
index 9409344338..49279fca40 100644
--- a/include/configs/turris_mox.h
+++ b/include/configs/turris_mox.h
@@ -45,13 +45,9 @@
  * Other required minimal configurations
  */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
-#define CONFIG_SYS_MEMTEST_START 0x00800000	/* 8M */
-#define CONFIG_SYS_MEMTEST_END	0x00ffffff	/*(_16M -1) */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
 
-#define CONFIG_SYS_ALT_MEMTEST
-
 /* End of 16M scrubbed by training in bootrom */
 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE + 0xFF0000)
 
@@ -69,7 +65,6 @@
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
 #define CONFIG_ARP_TIMEOUT	200
 #define CONFIG_NET_RETRY_COUNT	50
-#define CONFIG_PHY_MARVELL
 
 #define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
 
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index bf9106e239..54f472d595 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -38,9 +38,6 @@
 #define CONFIG_ETHPRIME                 "FEC"
 #define CONFIG_FEC_MXC_PHYADDR          6
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-
 /* MMC Configuration */
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
@@ -73,6 +70,7 @@
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
+#include <linux/stringify.h>
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index f4a2837b39..4b3df0451a 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -60,8 +60,6 @@
 #include <config_distro_bootcmd.h>
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
index 1d99dcaba6..e006ad280b 100644
--- a/include/configs/ulcb.h
+++ b/include/configs/ulcb.h
@@ -12,7 +12,6 @@
 #include "rcar-gen3-common.h"
 
 /* Ethernet RAVB */
-#define CONFIG_BITBANGMII
 #define CONFIG_BITBANGMII_MULTI
 
 /* Generic Timer Definitions (use in assembler source) */
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index c0ba647d09..73bf2d19da 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -73,9 +73,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR			0x22000000
 
-#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END			0x23e00000
-
 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
 #define CONFIG_BOOTCOMMAND	"nboot 21000000 0"
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 91c8b478b3..fcf5c67dc8 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -91,9 +91,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_SYS_MEMTEST_START	0x70000000
-#define CONFIG_SYS_MEMTEST_END		0x90000000
-
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 #endif				/* __CONFIG_H */
diff --git a/include/configs/vcoreiii.h b/include/configs/vcoreiii.h
index 6a2f80c2fb..d5b2a785bc 100644
--- a/include/configs/vcoreiii.h
+++ b/include/configs/vcoreiii.h
@@ -38,10 +38,6 @@
 
 #define CONFIG_CONS_INDEX		1
 
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + \
-					 CONFIG_SYS_SDRAM_SIZE - SZ_4M)
-
 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
 
 #define CONFIG_BOARD_EARLY_INIT_R
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h
index 34726b9425..81b171ea16 100644
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -12,6 +12,8 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <linux/stringify.h>
+
 /*
  * High Level Configuration Options
  */
@@ -23,8 +25,6 @@
  * On-board devices
  *
  */
-#define CONFIG_SYS_MEMTEST_START	0x00001000
-#define CONFIG_SYS_MEMTEST_END		0x07000000
 
 /*
  * Device configurations
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 82bff3608c..ca528598f2 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -102,10 +102,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			SZ_2G /* 2GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					 (PHYS_SDRAM_SIZE >> 1))
-
 /* UART */
 #define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
 
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index 4f3a792f49..09cdd3dab5 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -7,12 +7,6 @@
 #ifndef __VEXPRESS_AEMV8A_H
 #define __VEXPRESS_AEMV8A_H
 
-#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
-#ifndef CONFIG_SEMIHOSTING
-#error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
-#endif
-#endif
-
 #define CONFIG_REMAKE_ELF
 
 /* Link Definitions */
@@ -102,7 +96,7 @@
 
 /* PL011 Serial Configuration */
 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
-#define CONFIG_PL011_CLOCK		7273800
+#define CONFIG_PL011_CLOCK		7372800
 #else
 #define CONFIG_PL011_CLOCK		24000000
 #endif
@@ -126,8 +120,6 @@
 #endif
 
 /* Enable memtest */
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM_1
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
 
 /* Initial environment variables */
 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
@@ -138,35 +130,33 @@
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 				"kernel_name=norkern\0"	\
 				"kernel_alt_name=Image\0"	\
-				"kernel_addr=0x80080000\0" \
-				"initrd_name=ramdisk.img\0"	\
-				"initrd_addr=0x84000000\0"	\
+				"kernel_addr_r=0x80080000\0" \
+				"ramdisk_name=ramdisk.img\0"	\
+				"ramdisk_addr_r=0x88000000\0"	\
 				"fdtfile=board.dtb\0" \
 				"fdt_alt_name=juno\0" \
-				"fdt_addr=0x83000000\0" \
-				"fdt_high=0xffffffffffffffff\0" \
-				"initrd_high=0xffffffffffffffff\0" \
+				"fdt_addr_r=0x80000000\0" \
 
 /* Copy the kernel and FDT to DRAM memory and boot */
-#define CONFIG_BOOTCOMMAND	"afs load ${kernel_name} ${kernel_addr} ; " \
+#define CONFIG_BOOTCOMMAND	"afs load ${kernel_name} ${kernel_addr_r} ;"\
 				"if test $? -eq 1; then "\
 				"  echo Loading ${kernel_alt_name} instead of "\
 				"${kernel_name}; "\
-				"  afs load ${kernel_alt_name} ${kernel_addr};"\
+				"  afs load ${kernel_alt_name} ${kernel_addr_r};"\
 				"fi ; "\
-				"afs load  ${fdtfile} ${fdt_addr} ; " \
+				"afs load ${fdtfile} ${fdt_addr_r} ;"\
 				"if test $? -eq 1; then "\
 				"  echo Loading ${fdt_alt_name} instead of "\
 				"${fdtfile}; "\
-				"  afs load ${fdt_alt_name} ${fdt_addr}; "\
+				"  afs load ${fdt_alt_name} ${fdt_addr_r}; "\
 				"fi ; "\
-				"fdt addr ${fdt_addr}; fdt resize; " \
-				"if afs load  ${initrd_name} ${initrd_addr} ; "\
+				"fdt addr ${fdt_addr_r}; fdt resize; " \
+				"if afs load  ${ramdisk_name} ${ramdisk_addr_r} ; "\
 				"then "\
-				"  setenv initrd_param ${initrd_addr}; "\
-				"  else setenv initrd_param -; "\
+				"  setenv ramdisk_param ${ramdisk_addr_r}; "\
+				"  else setenv ramdisk_param -; "\
 				"fi ; " \
-				"booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
+				"booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}"
 
 
 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
@@ -221,6 +211,11 @@
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_32BIT
 #define CONFIG_SYS_MAX_FLASH_BANKS	1
 
+#ifdef CONFIG_USB_EHCI_HCD
+#define CONFIG_USB_OHCI_NEW
+#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
+#endif
+
 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
 #define FLASH_MAX_SECTOR_SIZE		0x00040000
 
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index e73658a9e6..ca765579e8 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -111,9 +111,6 @@
 #define SYS_ID				V2M_SYSREGS
 #define CONFIG_REVISION_TAG		1
 
-#define CONFIG_SYS_MEMTEST_START	V2M_BASE
-#define CONFIG_SYS_MEMTEST_END		0x20000000
-
 #define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
 #define CONFIG_SETUP_MEMORY_TAGS	1
 #define CONFIG_SYS_L2CACHE_OFF		1
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index 3ab3231943..0ef2de33cc 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -9,6 +9,7 @@
 #define __CONFIG_H
 
 #include <asm/arch/imx-regs.h>
+#include <linux/stringify.h>
 
 #define CONFIG_SYS_FSL_CLK
 
@@ -43,14 +44,6 @@
 #define CONFIG_FEC_XCV_TYPE		RMII
 #define CONFIG_FEC_MXC_PHYADDR          0
 
-/* QSPI Configs*/
-
-#ifdef CONFIG_FSL_QSPI
-#define FSL_QSPI_FLASH_SIZE		(1 << 24)
-#define FSL_QSPI_FLASH_NUM		2
-#define CONFIG_SYS_FSL_QSPI_LE
-#endif
-
 /* I2C Configs */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
@@ -170,9 +163,6 @@
 
 /* Miscellaneous configurable options */
 
-#define CONFIG_SYS_MEMTEST_START	0x80010000
-#define CONFIG_SYS_MEMTEST_END		0x87C00000
-
 /* Physical memory map */
 #define PHYS_SDRAM			(0x80000000)
 #define PHYS_SDRAM_SIZE			(128 * 1024 * 1024)
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index a709502d43..83ec78dc43 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -54,7 +54,6 @@
 /* USB device */
 
 /* Ethernet Hardware */
-#define CONFIG_PHY_SMSC
 #define CONFIG_MACB
 #define CONFIG_RMII
 #define CONFIG_NET_RETRY_COUNT		20
diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h
index 61d9c62068..c4db6f4b3c 100644
--- a/include/configs/vining_2000.h
+++ b/include/configs/vining_2000.h
@@ -26,8 +26,6 @@
 #include <config_distro_bootcmd.h>
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000)
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
@@ -64,8 +62,6 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME                 "FEC"
 
-#define CONFIG_PHY_ATHEROS
-
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS   0
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index f40c9002e5..c11507e550 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -26,8 +26,6 @@
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
 
 #undef CONFIG_SYS_DRAM_TEST			/* memory test, takes time */
-#define CONFIG_SYS_MEMTEST_START	0x00000000	/* memtest region */
-#define CONFIG_SYS_MEMTEST_END		0x00100000
 
 /*
  * DDR Setup
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index 8100e4dca7..5aa3ad8ddf 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -37,8 +37,6 @@
 #define CONFIG_CONS_INDEX		3
 
 /* RAM */
-#define CONFIG_SYS_MEMTEST_START	0x80100000
-#define CONFIG_SYS_MEMTEST_END		0x80400000
 
 /* Memory usage */
 #define CONFIG_SYS_MAXARGS		64
diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h
index a65d23bbe8..2b0576e1e6 100644
--- a/include/configs/wandboard.h
+++ b/include/configs/wandboard.h
@@ -29,9 +29,6 @@
 #define CONFIG_LBA48
 #endif
 
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-
 /* MMC Configuration */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
@@ -110,6 +107,7 @@
 	func(DHCP, dhcp, na)
 
 #include <config_distro_bootcmd.h>
+#include <linux/stringify.h>
 
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
diff --git a/include/configs/warp.h b/include/configs/warp.h
index 68361a6199..654f8349f4 100644
--- a/include/configs/warp.h
+++ b/include/configs/warp.h
@@ -26,9 +26,6 @@
 
 /* Watchdog */
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + SZ_256M)
-
 /* Physical Memory Map */
 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
 
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 39c00480bd..60a902b2c7 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -107,9 +107,6 @@
 		   "fi; " \
 	   "fi"
 
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x20000000)
-
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
 
diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h
index 36060975c1..aecf2737f8 100644
--- a/include/configs/wb45n.h
+++ b/include/configs/wb45n.h
@@ -7,6 +7,7 @@
 #define __CONFIG_H__
 
 #include <asm/hardware.h>
+#include <linux/stringify.h>
 
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK  32768
@@ -61,8 +62,6 @@
 
 /* System */
 #define CONFIG_SYS_LOAD_ADDR        0x22000000	/* load address */
-#define CONFIG_SYS_MEMTEST_START    CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_MEMTEST_END      0x23e00000
 
 #ifdef CONFIG_SYS_USE_NANDFLASH
 /* bootstrap + u-boot + env + linux in nandflash */
diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h
index ca1619f251..bb4deeac9b 100644
--- a/include/configs/wb50n.h
+++ b/include/configs/wb50n.h
@@ -44,9 +44,6 @@
     (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
 #endif
 
-#define CONFIG_SYS_MEMTEST_START    0x21000000
-#define CONFIG_SYS_MEMTEST_END      0x22000000
-
 /* NAND flash */
 #define CONFIG_SYS_MAX_NAND_DEVICE  1
 #define CONFIG_SYS_NAND_BASE        ATMEL_BASE_CS3
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index f73946b935..93c8d64b14 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -29,8 +29,6 @@
 #define CONFIG_SYS_MALLOC_LEN		SZ_1M
 #define CONFIG_SYS_SDRAM_BASE		EMC_DYCS0_BASE
 #define CONFIG_SYS_SDRAM_SIZE		SZ_128M
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + SZ_32K)
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE - SZ_1M)
 
 #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + SZ_32K)
 
@@ -46,7 +44,6 @@
  * Ethernet Driver
  */
 
-#define CONFIG_PHY_SMSC
 #define CONFIG_LPC32XX_ETH
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
@@ -108,11 +105,6 @@
 #define CONFIG_LPC32XX_GPIO
 
 /*
- * SSP/SPI/DISPLAY
- */
-
-#define CONFIG_LPC32XX_SSP_TIMEOUT 100000
-/*
  * Environment
  */
 
diff --git a/include/configs/x530.h b/include/configs/x530.h
index b6bff22378..9081f41660 100644
--- a/include/configs/x530.h
+++ b/include/configs/x530.h
@@ -60,7 +60,6 @@
 
 /* Environment in SPI NOR flash */
 
-#define CONFIG_PHY_MARVELL		/* there is a marvell phy */
 #define PHY_ANEG_TIMEOUT	8000	/* PHY needs a longer aneg time */
 
 /* PCIe support */
@@ -84,8 +83,6 @@
  */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 
-#define CONFIG_SYS_ALT_MEMTEST
-
 /* Keep device tree and initrd in low memory so the kernel can access them */
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"fdt_high=0x10000000\0"		\
diff --git a/include/configs/x600.h b/include/configs/x600.h
index 8b6caae7be..0dd5722794 100644
--- a/include/configs/x600.h
+++ b/include/configs/x600.h
@@ -92,8 +92,6 @@
 #define CONFIG_CMDLINE_TAG
 #define CONFIG_SETUP_MEMORY_TAGS
 
-#define CONFIG_SYS_MEMTEST_START		0x00800000
-#define CONFIG_SYS_MEMTEST_END			0x04000000
 #define CONFIG_SYS_MALLOC_LEN			(8 << 20)
 #define CONFIG_SYS_LOAD_ADDR			0x00800000
 
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index 329b270467..016b797a53 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -61,8 +61,6 @@
  */
 #define CONFIG_SYS_CBSIZE			512
 
-#define CONFIG_SYS_MEMTEST_START		0x00100000
-#define CONFIG_SYS_MEMTEST_END			0x01000000
 #define CONFIG_SYS_LOAD_ADDR			0x20000000
 
 /*-----------------------------------------------------------------------
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index dec5001b5f..da640d6f14 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -18,10 +18,6 @@
 #define GICD_BASE	0xF9000000
 #define GICR_BASE	0xF9080000
 
-#define CONFIG_SYS_MEMTEST_SCRATCH	0xfffc0000
-
-#define CONFIG_SYS_MEMTEST_START	0
-#define CONFIG_SYS_MEMTEST_END		1000
 
 #define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE
 
@@ -109,7 +105,8 @@
 #define BOOTENV_DEV_XSPI(devtypeu, devtypel, instance) \
 	"bootcmd_xspi0=sf probe 0 0 0 && " \
 	"sf read $scriptaddr $script_offset_f $script_size_f && " \
-	"source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+	"echo XSPI: Trying to boot script at ${scriptaddr} && " \
+	"source ${scriptaddr}; echo XSPI: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_XSPI(devtypeu, devtypel, instance) \
 	"xspi "
@@ -117,7 +114,8 @@
 #define BOOT_TARGET_DEVICES_JTAG(func)	func(JTAG, jtag, na)
 
 #define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
-	"bootcmd_jtag=source $scriptaddr; echo SCRIPT FAILED: continuing...;\0"
+	"bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
+		"source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
 	"jtag "
@@ -126,8 +124,10 @@
 
 #define BOOTENV_DEV_DFU_USB(devtypeu, devtypel, instance) \
 	"bootcmd_dfu_usb=setenv dfu_alt_info boot.scr ram $scriptaddr " \
-	"$script_size_f; dfu 0 ram 0 && source $scriptaddr; " \
-	"echo SCRIPT FAILED: continuing...;\0"
+	"$script_size_f; dfu 0 ram 0 && " \
+	"echo DFU: Trying to boot script at ${scriptaddr} && " \
+	"source ${scriptaddr}; " \
+	"echo DFU: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_DFU_USB(devtypeu, devtypel, instance) \
 	"dfu_usb "
diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h
index ee305e0226..ae7eca1155 100644
--- a/include/configs/xilinx_versal_mini.h
+++ b/include/configs/xilinx_versal_mini.h
@@ -10,7 +10,6 @@
 #ifndef __CONFIG_VERSAL_MINI_H
 #define __CONFIG_VERSAL_MINI_H
 
-#define CONFIG_SYS_MEMTEST_SCRATCH     0xfffc0000
 
 #define CONFIG_EXTRA_ENV_SETTINGS
 
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 010738363d..b744a91fa6 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -19,13 +19,6 @@
 #define GICD_BASE	0xF9010000
 #define GICC_BASE	0xF9020000
 
-#ifndef CONFIG_SYS_MEMTEST_SCRATCH
-# define CONFIG_SYS_MEMTEST_SCRATCH	0x10800000
-#endif
-
-#define CONFIG_SYS_MEMTEST_START	0
-#define CONFIG_SYS_MEMTEST_END		1000
-
 #define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE
 
 /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */
@@ -160,7 +153,8 @@
 #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
 	"bootcmd_" #devtypel #instance "=sf probe " #instance " 0 0 && " \
 		       "sf read $scriptaddr $script_offset_f $script_size_f && " \
-		       "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+		       "echo QSPI: Trying to boot script at ${scriptaddr} && " \
+		       "source ${scriptaddr}; echo QSPI: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
 	#devtypel #instance " "
@@ -168,7 +162,8 @@
 #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
 	"bootcmd_" #devtypel #instance "= nand info && " \
 		       "nand read $scriptaddr $script_offset_f $script_size_f && " \
-		       "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+		       "echo NAND: Trying to boot script at ${scriptaddr} && " \
+		       "source ${scriptaddr}; echo NAND: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
 	#devtypel #instance " "
@@ -176,7 +171,8 @@
 #define BOOT_TARGET_DEVICES_JTAG(func)	func(JTAG, jtag, na)
 
 #define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
-	"bootcmd_jtag=source $scriptaddr; echo SCRIPT FAILED: continuing...;\0"
+	"bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
+		"source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
 	"jtag "
diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h
index a6922896e0..3078b9c55b 100644
--- a/include/configs/xilinx_zynqmp_mini.h
+++ b/include/configs/xilinx_zynqmp_mini.h
@@ -10,7 +10,6 @@
 #ifndef __CONFIG_ZYNQMP_MINI_H
 #define __CONFIG_ZYNQMP_MINI_H
 
-#define CONFIG_SYS_MEMTEST_SCRATCH     0xfffc0000
 
 #define CONFIG_EXTRA_ENV_SETTINGS
 
diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h
index 155d7fe883..c6cf82e244 100644
--- a/include/configs/xilinx_zynqmp_r5.h
+++ b/include/configs/xilinx_zynqmp_r5.h
@@ -37,9 +37,4 @@
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
-/* 0x0 - 0x40 is used for placing exception vectors */
-#define CONFIG_SYS_MEMTEST_START	0x40
-#define CONFIG_SYS_MEMTEST_END		0x100
-#define CONFIG_SYS_MEMTEST_SCRATCH	0
-
 #endif /* __CONFIG_ZYNQ_ZYNQMP_R5_H */
diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index 634ee42409..d3bb92964e 100644
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -51,6 +51,7 @@
 #define CONFIG_SYS_SCRATCH_VA	0xe0000000
 
 #ifndef __ASSEMBLY__
+#include <linux/stringify.h>
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 #endif
 
@@ -76,8 +77,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_POST			(CONFIG_SYS_POST_MEMORY |\
 					 CONFIG_SYS_POST_I2C)
 /* The XPedite5170 can host an XMC which has an EEPROM at address 0x50 */
diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h
index 0186aaa102..c9bd369029 100644
--- a/include/configs/xpedite520x.h
+++ b/include/configs/xpedite520x.h
@@ -52,8 +52,6 @@
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_POST			(CONFIG_SYS_POST_MEMORY | \
 					 CONFIG_SYS_POST_I2C)
 #define I2C_ADDR_LIST			{CONFIG_SYS_I2C_MAX1237_ADDR,	\
diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index 5e027bebca..7262c86908 100644
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -47,6 +47,7 @@
 #define CONFIG_VERY_BIG_RAM
 
 #ifndef __ASSEMBLY__
+#include <linux/stringify.h>
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #endif
@@ -67,8 +68,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_POST			(CONFIG_SYS_POST_MEMORY | \
 					 CONFIG_SYS_POST_I2C)
 /* The XPedite5370 can host an XMC which has an EEPROM at address 0x50 */
diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 611089cbb9..b9c9ac4ba8 100644
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -46,6 +46,7 @@
 #define CONFIG_VERY_BIG_RAM
 
 #ifndef __ASSEMBLY__
+#include <linux/stringify.h>
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #endif
@@ -66,8 +67,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 /*
  * Diagnostics
  */
-#define CONFIG_SYS_MEMTEST_START	0x10000000
-#define CONFIG_SYS_MEMTEST_END		0x20000000
 #define CONFIG_POST			(CONFIG_SYS_POST_MEMORY | \
 					 CONFIG_SYS_POST_I2C)
 #define I2C_ADDR_LIST			{CONFIG_SYS_I2C_EEPROM_ADDR,	\
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index dbdd812506..ba7fc84bf2 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -31,8 +31,6 @@
 #define CONFIG_SYS_I2C_SPEED		100000
 
 /* Miscellaneous configurable options */
-#define CONFIG_SYS_MEMTEST_START	0x80000000
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x10000000)
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
 #define CONFIG_SYS_HZ			1000
@@ -67,7 +65,6 @@
 #define CONFIG_FEC_MXC_PHYADDR          0x0
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME			"FEC"
-#define CONFIG_PHY_SMSC
 
 #define CONFIG_IMX_THERMAL
 
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index 8b73900130..516a6089f6 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -71,8 +71,6 @@
 #define CONFIG_SYS_BOOTPARAMS_LEN	(64  << 10)
 
 /* Memory test is destructive so default must not overlap vectors or U-Boot*/
-#define CONFIG_SYS_MEMTEST_START	MEMADDR(0x01000000)
-#define CONFIG_SYS_MEMTEST_END		MEMADDR(0x02000000)
 
 /* Load address for stand-alone applications.
  * MEMADDR cannot be used here, because the definition needs to be
diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h
index 77ff04754b..7246b9eb65 100644
--- a/include/configs/zc5202.h
+++ b/include/configs/zc5202.h
@@ -20,7 +20,6 @@
 #define CONFIG_FEC_XCV_TYPE			MII100
 #define CONFIG_ETHPRIME				"FEC"
 #define CONFIG_FEC_MXC_PHYADDR			0
-#define CONFIG_MV88E6352_SWITCH
 
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_PCIE_IMX
diff --git a/include/configs/zmx25.h b/include/configs/zmx25.h
index a8c6f0be10..e76c5cbe6b 100644
--- a/include/configs/zmx25.h
+++ b/include/configs/zmx25.h
@@ -91,9 +91,6 @@
 
 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
 
-#define CONFIG_SYS_MEMTEST_START	(PHYS_SDRAM + (512*1024))
-#define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM + PHYS_SDRAM_SIZE)
-
 
 /*
  * Size of malloc() pool
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 1eaf65b0a2..9e83e17775 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -152,7 +152,8 @@
 #define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
 	"bootcmd_qspi=sf probe 0 0 0 && " \
 		      "sf read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
-		      "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+		      "echo QSPI: Trying to boot script at ${scriptaddr} && " \
+		      "source ${scriptaddr}; echo QSPI: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
 	"qspi "
@@ -160,7 +161,8 @@
 #define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
 	"bootcmd_nand=nand info && " \
 		      "nand read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
-		      "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+		      "echo NAND: Trying to boot script at ${scriptaddr} && " \
+		      "source ${scriptaddr}; echo NAND: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
 	"nand "
@@ -168,7 +170,8 @@
 #define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
 	"script_offset_nor=0xE2FC0000\0"        \
 	"bootcmd_nor=cp.b ${script_offset_nor} ${scriptaddr} ${script_size_f} && " \
-		     "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+		     "echo NOR: Trying to boot script at ${scriptaddr} && " \
+		     "source ${scriptaddr}; echo NOR: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
 	"nor "
@@ -176,7 +179,8 @@
 #define BOOT_TARGET_DEVICES_JTAG(func)  func(JTAG, jtag, na)
 
 #define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
-	"bootcmd_jtag=source $scriptaddr; echo SCRIPT FAILED: continuing...;\0"
+	"bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
+		"source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
 
 #define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
 	"jtag "
@@ -198,7 +202,6 @@
 #ifndef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"fdt_high=0x20000000\0"		\
-	"initrd_high=0x20000000\0"	\
 	"scriptaddr=0x20000\0"	\
 	"script_size_f=0x40000\0"	\
 	"fdt_addr_r=0x1f00000\0"        \
@@ -216,9 +219,6 @@
 #define CONFIG_SYS_MAXARGS		32 /* max number of command args */
 #define CONFIG_SYS_CBSIZE		2048 /* Console I/O Buffer Size */
 
-#define CONFIG_SYS_MEMTEST_START	0
-#define CONFIG_SYS_MEMTEST_END		0x1000
-
 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFFF0000
 #define CONFIG_SYS_INIT_RAM_SIZE	0x2000
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
diff --git a/include/cpu.h b/include/cpu.h
index 6b1b6b37b3..2f283fe244 100644
--- a/include/cpu.h
+++ b/include/cpu.h
@@ -89,6 +89,15 @@ struct cpu_ops {
 	 * @return 0 if OK, -ENOSPC if buffer is too small, other -ve on error
 	 */
 	int (*get_vendor)(struct udevice *dev, char *buf, int size);
+
+	/**
+	 * is_current() - Check if the CPU that U-Boot is currently running from
+	 *
+	 * @dev:	Device to check (UCLASS_CPU)
+	 * @return 1 if the CPU that U-Boot is currently running from, 0
+	 *         if not.
+	 */
+	int (*is_current)(struct udevice *dev);
 };
 
 #define cpu_get_ops(dev)        ((struct cpu_ops *)(dev)->driver->ops)
@@ -137,4 +146,18 @@ int cpu_get_vendor(struct udevice *dev, char *buf, int size);
  */
 int cpu_probe_all(void);
 
+/**
+ * cpu_is_current() - Check if the CPU that U-Boot is currently running from
+ *
+ * Return: 1 if yes, - 0 if not
+ */
+int cpu_is_current(struct udevice *cpu);
+
+/**
+ * cpu_get_current_dev() - Get CPU udevice for current CPU
+ *
+ * Return: udevice if OK, - NULL on error
+ */
+struct udevice *cpu_get_current_dev(void);
+
 #endif
diff --git a/include/cpu_func.h b/include/cpu_func.h
index f701f02bfe..8aa825daa4 100644
--- a/include/cpu_func.h
+++ b/include/cpu_func.h
@@ -18,7 +18,7 @@
 int cpu_status(u32 nr);
 int cpu_reset(u32 nr);
 int cpu_disable(u32 nr);
-int cpu_release(u32 nr, int argc, char * const argv[]);
+int cpu_release(u32 nr, int argc, char *const argv[]);
 
 static inline int cpumask_next(int cpu, unsigned int mask)
 {
diff --git a/lib/crypto/pkcs7_parser.h b/include/crypto/pkcs7_parser.h
index 6565fdc2d4..b8234da45a 100644
--- a/lib/crypto/pkcs7_parser.h
+++ b/include/crypto/pkcs7_parser.h
@@ -5,6 +5,9 @@
  * Written by David Howells (dhowells@redhat.com)
  */
 
+#ifndef _PKCS7_PARSER_H
+#define _PKCS7_PARSER_H
+
 #include <linux/oid_registry.h>
 #include <crypto/pkcs7.h>
 #include "x509_parser.h"
@@ -63,3 +66,4 @@ struct pkcs7_message {
 	size_t		data_hdrlen;	/* Length of Data ASN.1 header */
 	const void	*data;		/* Content Data (or 0) */
 };
+#endif /* _PKCS7_PARSER_H */
diff --git a/lib/crypto/x509_parser.h b/include/crypto/x509_parser.h
index c233f136fb..4cbdc1d661 100644
--- a/lib/crypto/x509_parser.h
+++ b/include/crypto/x509_parser.h
@@ -5,6 +5,9 @@
  * Written by David Howells (dhowells@redhat.com)
  */
 
+#ifndef _X509_PARSER_H
+#define _X509_PARSER_H
+
 #include <linux/time.h>
 #include <crypto/public_key.h>
 #include <keys/asymmetric-type.h>
@@ -55,3 +58,4 @@ extern int x509_decode_time(time64_t *_t,  size_t hdrlen,
  */
 extern int x509_get_sig_params(struct x509_certificate *cert);
 extern int x509_check_for_self_signed(struct x509_certificate *cert);
+#endif /* _X509_PARSER_H */
diff --git a/include/dfu.h b/include/dfu.h
index fb5260d903..6fa4505936 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -159,20 +159,139 @@ struct dfu_entity {
 };
 
 #ifdef CONFIG_SET_DFU_ALT_INFO
+/**
+ * set_dfu_alt_info() - set dfu_alt_info environment variable
+ *
+ * If CONFIG_SET_DFU_ALT_INFO=y, this board specific function is called to set
+ * environment variable dfu_alt_info.
+ *
+ * @interface:	dfu interface, e.g. "mmc" or "nand"
+ * @devstr:	device number as string
+ */
 void set_dfu_alt_info(char *interface, char *devstr);
 #endif
+
+/**
+ * dfu_alt_init() - initialize buffer for dfu entities
+ *
+ * @num:	number of entities
+ * @dfu:	on return allocated buffer
+ * Return:	0 on success
+ */
 int dfu_alt_init(int num, struct dfu_entity **dfu);
+
+/**
+ * dfu_alt_add() - add alternate to dfu entity buffer
+ *
+ * @dfu:	dfu entity
+ * @interface:	dfu interface, e.g. "mmc" or "nand"
+ * @devstr:	device number as string
+ * @s:		string description of alternate
+ * Return:	0 on success
+ */
 int dfu_alt_add(struct dfu_entity *dfu, char *interface, char *devstr, char *s);
+
+/**
+ * dfu_config_entities() - initialize dfu entitities from envirionment
+ *
+ * Initialize the list of dfu entities from environment variable dfu_alt_info.
+ * The list must be freed by calling dfu_free_entities(). This function bypasses
+ * set_dfu_alt_info(). So typically you should use dfu_init_env_entities()
+ * instead.
+ *
+ * See function :c:func:`dfu_free_entities`
+ * See function :c:func:`dfu_init_env_entities`
+ *
+ * @s:		string with alternates
+ * @interface:	interface, e.g. "mmc" or "nand"
+ * @devstr:	device number as string
+ * Return:	0 on success, a negative error code otherwise
+ */
 int dfu_config_entities(char *s, char *interface, char *devstr);
+
+/**
+ * dfu_free_entities() - free the list of dfu entities
+ *
+ * Free the internal list of dfu entities.
+ *
+ * See function :c:func:`dfu_init_env_entities`
+ */
 void dfu_free_entities(void);
+
+/**
+ * dfu_show_entities() - print DFU alt settings list
+ */
 void dfu_show_entities(void);
+
+/**
+ * dfu_get_alt_number() - get number of alternates
+ *
+ * Return: number of alternates in the dfu entities list
+ */
 int dfu_get_alt_number(void);
-const char *dfu_get_dev_type(enum dfu_device_type t);
-const char *dfu_get_layout(enum dfu_layout l);
+
+/**
+ * dfu_get_dev_type() - get string representation for dfu device type
+ *
+ * @type:	device type
+ * Return:	string representation for device type
+ */
+const char *dfu_get_dev_type(enum dfu_device_type type);
+
+/**
+ * dfu_get_layout() - get string describing layout
+ *
+ * Internally layouts are represented by enum dfu_device_type values. This
+ * function translates an enum value to a human readable string, e.g. DFU_FS_FAT
+ * is translated to "FAT".
+ *
+ * @layout:	layout
+ * Result:	string representation for the layout
+ */
+const char *dfu_get_layout(enum dfu_layout layout);
+
+/**
+ * dfu_get_entity() - get dfu entity for an alternate id
+ *
+ * @alt:	alternate id
+ * Return:	dfu entity
+ */
 struct dfu_entity *dfu_get_entity(int alt);
+
 char *dfu_extract_token(char** e, int *n);
+
+/**
+ * dfu_get_alt() - get alternate id for filename
+ *
+ * Environment variable dfu_alt_info defines the write destinations (alternates)
+ * for different filenames. This function get the index of the alternate for
+ * a filename. If an absolute filename is provided (starting with '/'), the
+ * directory path is ignored.
+ *
+ * @name:	filename
+ * Return:	id of the alternate or negative error number (-ENODEV)
+ */
 int dfu_get_alt(char *name);
+
+/**
+ * dfu_init_env_entities() - initialize dfu entitities from envirionment
+ *
+ * Initialize the list of dfu entities from environment variable dfu_alt_info.
+ * The list must be freed by calling dfu_free_entities().
+ * @interface and @devstr are used to select the relevant set of alternates
+ * from environment variable dfu_alt_info.
+ *
+ * If environment variable dfu_alt_info specifies the interface and the device,
+ * use NULL for @interface and @devstr.
+ *
+ * See function :c:func:`dfu_free_entities`
+ *
+ * @interface:	interface, e.g. "mmc" or "nand"
+ * @devstr:	device number as string
+ * Return:	0 on success, a negative error code otherwise
+ */
 int dfu_init_env_entities(char *interface, char *devstr);
+
 unsigned char *dfu_get_buf(struct dfu_entity *dfu);
 unsigned char *dfu_free_buf(void);
 unsigned long dfu_get_buf_size(void);
@@ -183,41 +302,95 @@ unsigned long dfu_get_timeout(void);
 void dfu_set_timeout(unsigned long);
 #endif
 
+/**
+ * dfu_read() - read from dfu entity
+ *
+ * The block sequence number @blk_seq_num is a 16 bit counter that must be
+ * incremented with each call for the same dfu entity @de.
+ *
+ * @de:			dfu entity
+ * @buf:		buffer
+ * @size:		size of buffer
+ * @blk_seq_num:	block sequence number
+ * Return:		0 for success, -1 for error
+ */
 int dfu_read(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
+
+/**
+ * dfu_write() - write to dfu entity
+ *
+ * Write the contents of a buffer @buf to the dfu entity @de. After writing
+ * the last block call dfu_flush(). If a file is already loaded completely
+ * into memory it is preferable to use dfu_write_from_mem_addr() which takes
+ * care of blockwise transfer and flushing.
+ *
+ * The block sequence number @blk_seq_num is a 16 bit counter that must be
+ * incremented with each call for the same dfu entity @de.
+ *
+ * See function :c:func:`dfu_flush`
+ * See function :c:func:`dfu_write_from_mem_addr`
+ *
+ * @de:			dfu entity
+ * @buf:		buffer
+ * @size:		size of buffer
+ * @blk_seq_num:	block sequence number
+ * Return:		0 for success, -1 for error
+ */
 int dfu_write(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
+
+/**
+ * dfu_flush() - flush to dfu entity
+ *
+ * This function has to be called after writing the last block to the dfu
+ * entity @de.
+ *
+ * The block sequence number @blk_seq_num is a 16 bit counter that must be
+ * incremented with each call for the same dfu entity @de.
+ *
+ * See function :c:func:`dfu_write`
+ *
+ * @de:			dfu entity
+ * @buf:		ignored
+ * @size:		ignored
+ * @blk_seq_num:	block sequence number of last write - ignored
+ * Return:		0 for success, -1 for error
+ */
 int dfu_flush(struct dfu_entity *de, void *buf, int size, int blk_seq_num);
 
 /**
- * dfu_initiated_callback - weak callback called on DFU transaction start
+ * dfu_initiated_callback() - weak callback called on DFU transaction start
  *
  * It is a callback function called by DFU stack when a DFU transaction is
  * initiated. This function allows to manage some board specific behavior on
  * DFU targets.
  *
- * @param dfu - pointer to the dfu_entity, which should be initialized
- *
+ * @dfu:	pointer to the dfu_entity, which should be initialized
  */
 void dfu_initiated_callback(struct dfu_entity *dfu);
+
 /**
- * dfu_flush_callback - weak callback called at the end of the DFU write
+ * dfu_flush_callback() - weak callback called at the end of the DFU write
  *
  * It is a callback function called by DFU stack after DFU manifestation.
  * This function allows to manage some board specific behavior on DFU targets
  *
- * @param dfu - pointer to the dfu_entity, which should be flushed
- *
+ * @dfu:	pointer to the dfu_entity, which should be flushed
  */
 void dfu_flush_callback(struct dfu_entity *dfu);
 
+int dfu_transaction_initiate(struct dfu_entity *dfu, bool read);
+void dfu_transaction_cleanup(struct dfu_entity *dfu);
+
 /*
  * dfu_defer_flush - pointer to store dfu_entity for deferred flashing.
  *		     It should be NULL when not used.
  */
 extern struct dfu_entity *dfu_defer_flush;
+
 /**
- * dfu_get_defer_flush - get current value of dfu_defer_flush pointer
+ * dfu_get_defer_flush() - get current value of dfu_defer_flush pointer
  *
- * @return - value of the dfu_defer_flush pointer
+ * Return:	value of the dfu_defer_flush pointer
  */
 static inline struct dfu_entity *dfu_get_defer_flush(void)
 {
@@ -225,9 +398,9 @@ static inline struct dfu_entity *dfu_get_defer_flush(void)
 }
 
 /**
- * dfu_set_defer_flush - set the dfu_defer_flush pointer
+ * dfu_set_defer_flush() - set the dfu_defer_flush pointer
  *
- * @param dfu - pointer to the dfu_entity, which should be written
+ * @dfu:	pointer to the dfu_entity, which should be written
  */
 static inline void dfu_set_defer_flush(struct dfu_entity *dfu)
 {
@@ -235,16 +408,16 @@ static inline void dfu_set_defer_flush(struct dfu_entity *dfu)
 }
 
 /**
- * dfu_write_from_mem_addr - write data from memory to DFU managed medium
+ * dfu_write_from_mem_addr() - write data from memory to DFU managed medium
  *
  * This function adds support for writing data starting from fixed memory
  * address (like $loadaddr) to dfu managed medium (e.g. NAND, MMC, file system)
  *
- * @param dfu - dfu entity to which we want to store data
- * @param buf - fixed memory addres from where data starts
- * @param size - number of bytes to write
+ * @dfu:	dfu entity to which we want to store data
+ * @buf:	fixed memory address from where data starts
+ * @size:	number of bytes to write
  *
- * @return - 0 on success, other value on failure
+ * Return:	0 on success, other value on failure
  */
 int dfu_write_from_mem_addr(struct dfu_entity *dfu, void *buf, int size);
 
@@ -321,17 +494,17 @@ static inline int dfu_fill_entity_virt(struct dfu_entity *dfu, char *devstr,
 #endif
 
 /**
- * dfu_tftp_write - Write TFTP data to DFU medium
+ * dfu_tftp_write() - write TFTP data to DFU medium
  *
  * This function is storing data received via TFTP on DFU supported medium.
  *
- * @param dfu_entity_name - name of DFU entity to write
- * @param addr - address of data buffer to write
- * @param len - number of bytes
- * @param interface - destination DFU medium (e.g. "mmc")
- * @param devstring - instance number of destination DFU medium (e.g. "1")
+ * @dfu_entity_name:	name of DFU entity to write
+ * @addr:		address of data buffer to write
+ * @len:		number of bytes
+ * @interface:		destination DFU medium (e.g. "mmc")
+ * @devstring:		instance number of destination DFU medium (e.g. "1")
  *
- * @return 0 on success, otherwise error code
+ * Return:		0 on success, otherwise error code
  */
 #if CONFIG_IS_ENABLED(DFU_TFTP)
 int dfu_tftp_write(char *dfu_entity_name, unsigned int addr, unsigned int len,
diff --git a/include/dm/acpi.h b/include/dm/acpi.h
index 49257914ff..7563a4c60a 100644
--- a/include/dm/acpi.h
+++ b/include/dm/acpi.h
@@ -25,6 +25,24 @@
 #if !defined(__ACPI__)
 
 /**
+ * struct acpi_ctx - Context used for writing ACPI tables
+ *
+ * This contains a few useful pieces of information used when writing
+ *
+ * @current: Current address for writing
+ * @rsdp: Pointer to the Root System Description Pointer, typically used when
+ *	adding a new table. The RSDP holds pointers to the RSDT and XSDT.
+ * @rsdt: Pointer to the Root System Description Table
+ * @xsdt: Pointer to the Extended System Description Table
+ */
+struct acpi_ctx {
+	void *current;
+	struct acpi_rsdp *rsdp;
+	struct acpi_rsdt *rsdt;
+	struct acpi_xsdt *xsdt;
+};
+
+/**
  * struct acpi_ops - ACPI operations supported by driver model
  */
 struct acpi_ops {
@@ -38,6 +56,15 @@ struct acpi_ops {
 	 *	other error
 	 */
 	int (*get_name)(const struct udevice *dev, char *out_name);
+
+	/**
+	 * write_tables() - Write out any tables required by this device
+	 *
+	 * @dev: Device to write
+	 * @ctx: ACPI context to use
+	 * @return 0 if OK, -ve on error
+	 */
+	int (*write_tables)(const struct udevice *dev, struct acpi_ctx *ctx);
 };
 
 #define device_get_acpi_ops(dev)	((dev)->driver->acpi_ops)
@@ -72,6 +99,16 @@ int acpi_get_name(const struct udevice *dev, char *out_name);
  */
 int acpi_copy_name(char *out_name, const char *name);
 
+/**
+ * acpi_write_dev_tables() - Write ACPI tables required by devices
+ *
+ * This scans through all devices and tells them to write any tables they want
+ * to write.
+ *
+ * @return 0 if OK, -ve if any device returned an error
+ */
+int acpi_write_dev_tables(struct acpi_ctx *ctx);
+
 #endif /* __ACPI__ */
 
 #endif
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 618fc10390..a0d3df7786 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -880,6 +880,14 @@ ofnode ofnode_by_prop_value(ofnode from, const char *propname,
 	     node = ofnode_next_subnode(node))
 
 /**
+ * ofnode_get_child_count() - get the child count of a ofnode
+ *
+ * @node: valid node to get its child count
+ * @return the number of subnodes
+ */
+int ofnode_get_child_count(ofnode parent);
+
+/**
  * ofnode_translate_address() - Translate a device-tree address
  *
  * Translate an address from the device-tree into a CPU physical address. This
diff --git a/include/dm/read.h b/include/dm/read.h
index 03c15b8550..b952551d55 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -669,6 +669,14 @@ u64 dev_translate_dma_address(const struct udevice *dev,
  */
 int dev_read_alias_highest_id(const char *stem);
 
+/**
+ * dev_get_child_count() - get the child count of a device
+ *
+ * @dev: device to use for interation (struct udevice *)
+ * @return the count of child subnode
+ */
+int dev_get_child_count(const struct udevice *dev);
+
 #else /* CONFIG_DM_DEV_READ_INLINE is enabled */
 
 static inline int dev_read_u32(const struct udevice *dev,
@@ -978,6 +986,11 @@ static inline int dev_read_alias_highest_id(const char *stem)
 	return fdtdec_get_alias_highest_id(gd->fdt_blob, stem);
 }
 
+static inline int dev_get_child_count(const struct udevice *dev)
+{
+	return ofnode_get_child_count(dev_ofnode(dev));
+}
+
 #endif /* CONFIG_DM_DEV_READ_INLINE */
 
 /**
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 37ada51f9f..7837d459f1 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -47,6 +47,7 @@ enum uclass_id {
 	UCLASS_DMA,		/* Direct Memory Access */
 	UCLASS_EFI,		/* EFI managed devices */
 	UCLASS_ETH,		/* Ethernet device */
+	UCLASS_ETH_PHY,		/* Ethernet PHY device */
 	UCLASS_FIRMWARE,	/* Firmware */
 	UCLASS_FS_FIRMWARE_LOADER,		/* Generic loader */
 	UCLASS_GPIO,		/* Bank of general-purpose I/O pins */
diff --git a/include/dma.h b/include/dma.h
index 5b247b5b06..6ff591977b 100644
--- a/include/dma.h
+++ b/include/dma.h
@@ -9,6 +9,7 @@
 #ifndef _DMA_H_
 #define _DMA_H_
 
+#include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/types.h>
 
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 20641fa68e..c92ff1e602 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
  * Copyright 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7790_H__
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index ef69213414..bb4f18b1b3 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
  * Copyright 2013 Ideas On Board SPRL
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7791_H__
diff --git a/include/dt-bindings/clock/r8a7792-clock.h b/include/dt-bindings/clock/r8a7792-clock.h
index 5be90bc23b..2948d9ce3a 100644
--- a/include/dt-bindings/clock/r8a7792-clock.h
+++ b/include/dt-bindings/clock/r8a7792-clock.h
@@ -1,10 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
  * Copyright (C) 2016 Cogent Embedded, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
  */
 
 #ifndef __DT_BINDINGS_CLOCK_R8A7792_H__
diff --git a/include/dt-bindings/clock/rk3328-cru.h b/include/dt-bindings/clock/rk3328-cru.h
index cde61ed883..555b4ff660 100644
--- a/include/dt-bindings/clock/rk3328-cru.h
+++ b/include/dt-bindings/clock/rk3328-cru.h
@@ -1,6 +1,7 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
+/* SPDX-License-Identifier: GPL-2.0-or-later */
 /*
- * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
+ * Author: Elaine <zhangqing@rock-chips.com>
  */
 
 #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3328_H
@@ -90,119 +91,118 @@
 #define SCLK_MAC2IO_EXT		102
 
 /* dclk gates */
-#define DCLK_LCDC		180
-#define DCLK_HDMIPHY		181
-#define HDMIPHY			182
-#define USB480M			183
-#define DCLK_LCDC_SRC		184
+#define DCLK_LCDC		120
+#define DCLK_HDMIPHY		121
+#define HDMIPHY			122
+#define USB480M			123
+#define DCLK_LCDC_SRC		124
 
 /* aclk gates */
-#define ACLK_AXISRAM		190
-#define ACLK_VOP_PRE		191
-#define ACLK_USB3OTG		192
-#define ACLK_RGA_PRE		193
-#define ACLK_DMAC		194
-#define ACLK_GPU		195
-#define ACLK_BUS_PRE		196
-#define ACLK_PERI_PRE		197
-#define ACLK_RKVDEC_PRE		198
-#define ACLK_RKVDEC		199
-#define ACLK_RKVENC		200
-#define ACLK_VPU_PRE		201
-#define ACLK_VIO_PRE		202
-#define ACLK_VPU		203
-#define ACLK_VIO		204
-#define ACLK_VOP		205
-#define ACLK_GMAC		206
-#define ACLK_H265		207
-#define ACLK_H264		208
-#define ACLK_MAC2PHY		209
-#define ACLK_MAC2IO		210
-#define ACLK_DCF		211
-#define ACLK_TSP		212
-#define ACLK_PERI		213
-#define ACLK_RGA		214
-#define ACLK_IEP		215
-#define ACLK_CIF		216
-#define ACLK_HDCP		217
+#define ACLK_AXISRAM		130
+#define ACLK_VOP_PRE		131
+#define ACLK_USB3OTG		132
+#define ACLK_RGA_PRE		133
+#define ACLK_DMAC		134
+#define ACLK_GPU		135
+#define ACLK_BUS_PRE		136
+#define ACLK_PERI_PRE		137
+#define ACLK_RKVDEC_PRE		138
+#define ACLK_RKVDEC		139
+#define ACLK_RKVENC		140
+#define ACLK_VPU_PRE		141
+#define ACLK_VIO_PRE		142
+#define ACLK_VPU		143
+#define ACLK_VIO		144
+#define ACLK_VOP		145
+#define ACLK_GMAC		146
+#define ACLK_H265		147
+#define ACLK_H264		148
+#define ACLK_MAC2PHY		149
+#define ACLK_MAC2IO		150
+#define ACLK_DCF		151
+#define ACLK_TSP		152
+#define ACLK_PERI		153
+#define ACLK_RGA		154
+#define ACLK_IEP		155
+#define ACLK_CIF		156
+#define ACLK_HDCP		157
 
 /* pclk gates */
-#define PCLK_GPIO0		300
-#define PCLK_GPIO1		301
-#define PCLK_GPIO2		302
-#define PCLK_GPIO3		303
-#define PCLK_GRF		304
-#define PCLK_I2C0		305
-#define PCLK_I2C1		306
-#define PCLK_I2C2		307
-#define PCLK_I2C3		308
-#define PCLK_SPI		309
-#define PCLK_UART0		310
-#define PCLK_UART1		311
-#define PCLK_UART2		312
-#define PCLK_TSADC		313
-#define PCLK_PWM		314
-#define PCLK_TIMER		315
-#define PCLK_BUS_PRE		316
-#define PCLK_PERI_PRE		317
-#define PCLK_HDMI_CTRL		318
-#define PCLK_HDMI_PHY		319
-#define PCLK_GMAC		320
-#define PCLK_H265		321
-#define PCLK_MAC2PHY		322
-#define PCLK_MAC2IO		323
-#define PCLK_USB3PHY_OTG	324
-#define PCLK_USB3PHY_PIPE	325
-#define PCLK_USB3_GRF		326
-#define PCLK_USB2_GRF		327
-#define PCLK_HDMIPHY		328
-#define PCLK_DDR		329
-#define PCLK_PERI		330
-#define PCLK_HDMI		331
-#define PCLK_HDCP		332
-#define PCLK_DCF		333
-#define PCLK_SARADC		334
+#define PCLK_GPIO0		200
+#define PCLK_GPIO1		201
+#define PCLK_GPIO2		202
+#define PCLK_GPIO3		203
+#define PCLK_GRF		204
+#define PCLK_I2C0		205
+#define PCLK_I2C1		206
+#define PCLK_I2C2		207
+#define PCLK_I2C3		208
+#define PCLK_SPI		209
+#define PCLK_UART0		210
+#define PCLK_UART1		211
+#define PCLK_UART2		212
+#define PCLK_TSADC		213
+#define PCLK_PWM		214
+#define PCLK_TIMER		215
+#define PCLK_BUS_PRE		216
+#define PCLK_PERI_PRE		217
+#define PCLK_HDMI_CTRL		218
+#define PCLK_HDMI_PHY		219
+#define PCLK_GMAC		220
+#define PCLK_H265		221
+#define PCLK_MAC2PHY		222
+#define PCLK_MAC2IO		223
+#define PCLK_USB3PHY_OTG	224
+#define PCLK_USB3PHY_PIPE	225
+#define PCLK_USB3_GRF		226
+#define PCLK_USB2_GRF		227
+#define PCLK_HDMIPHY		228
+#define PCLK_DDR		229
+#define PCLK_PERI		230
+#define PCLK_HDMI		231
+#define PCLK_HDCP		232
+#define PCLK_DCF		233
+#define PCLK_SARADC		234
+#define PCLK_ACODECPHY		235
+#define PCLK_WDT		236
 
 /* hclk gates */
-#define HCLK_PERI		408
-#define HCLK_TSP		409
-#define HCLK_GMAC		410
-#define HCLK_I2S0_8CH		411
-#define HCLK_I2S1_8CH		413
-#define HCLK_I2S2_2CH		413
-#define HCLK_SPDIF_8CH		414
-#define HCLK_VOP		415
-#define HCLK_NANDC		416
-#define HCLK_SDMMC		417
-#define HCLK_SDIO		418
-#define HCLK_EMMC		419
-#define HCLK_SDMMC_EXT		420
-#define HCLK_RKVDEC_PRE		421
-#define HCLK_RKVDEC		422
-#define HCLK_RKVENC		423
-#define HCLK_VPU_PRE		424
-#define HCLK_VIO_PRE		425
-#define HCLK_VPU		426
-#define HCLK_VIO		427
-#define HCLK_BUS_PRE		428
-#define HCLK_PERI_PRE		429
-#define HCLK_H264		430
-#define HCLK_CIF		431
-#define HCLK_OTG_PMU		432
-#define HCLK_OTG		433
-#define HCLK_HOST0		434
-#define HCLK_HOST0_ARB		435
-#define HCLK_CRYPTO_MST		436
-#define HCLK_CRYPTO_SLV		437
-#define HCLK_PDM		438
-#define HCLK_IEP		439
-#define HCLK_RGA		440
-#define HCLK_HDCP		441
+#define HCLK_PERI		308
+#define HCLK_TSP		309
+#define HCLK_GMAC		310
+#define HCLK_I2S0_8CH		311
+#define HCLK_I2S1_8CH		312
+#define HCLK_I2S2_2CH		313
+#define HCLK_SPDIF_8CH		314
+#define HCLK_VOP		315
+#define HCLK_NANDC		316
+#define HCLK_SDMMC		317
+#define HCLK_SDIO		318
+#define HCLK_EMMC		319
+#define HCLK_SDMMC_EXT		320
+#define HCLK_RKVDEC_PRE		321
+#define HCLK_RKVDEC		322
+#define HCLK_RKVENC		323
+#define HCLK_VPU_PRE		324
+#define HCLK_VIO_PRE		325
+#define HCLK_VPU		326
+#define HCLK_BUS_PRE		328
+#define HCLK_PERI_PRE		329
+#define HCLK_H264		330
+#define HCLK_CIF		331
+#define HCLK_OTG_PMU		332
+#define HCLK_OTG		333
+#define HCLK_HOST0		334
+#define HCLK_HOST0_ARB		335
+#define HCLK_CRYPTO_MST		336
+#define HCLK_CRYPTO_SLV		337
+#define HCLK_PDM		338
+#define HCLK_IEP		339
+#define HCLK_RGA		340
+#define HCLK_HDCP		341
 
 #define CLK_NR_CLKS		(HCLK_HDCP + 1)
 
-#define CLKGRF_NR_CLKS		(SCLK_MAC2PHY + 1)
-
 /* soft-reset indices */
 #define SRST_CORE0_PO		0
 #define SRST_CORE1_PO		1
diff --git a/include/dt-bindings/input/gpio-keys.h b/include/dt-bindings/input/gpio-keys.h
new file mode 100644
index 0000000000..8962df79e7
--- /dev/null
+++ b/include/dt-bindings/input/gpio-keys.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * This header provides constants for gpio keys bindings.
+ */
+
+#ifndef _DT_BINDINGS_GPIO_KEYS_H
+#define _DT_BINDINGS_GPIO_KEYS_H
+
+#define EV_ACT_ANY		0x00	/* asserted or deasserted */
+#define EV_ACT_ASSERTED		0x01	/* asserted */
+#define EV_ACT_DEASSERTED	0x02	/* deasserted */
+
+#endif /* _DT_BINDINGS_GPIO_KEYS_H */
diff --git a/include/dt-bindings/net/qca-ar803x.h b/include/dt-bindings/net/qca-ar803x.h
new file mode 100644
index 0000000000..9c046c7242
--- /dev/null
+++ b/include/dt-bindings/net/qca-ar803x.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Device Tree constants for the Qualcomm Atheros AR803x PHYs
+ */
+
+#ifndef _DT_BINDINGS_QCA_AR803X_H
+#define _DT_BINDINGS_QCA_AR803X_H
+
+#define AR803X_STRENGTH_FULL		0
+#define AR803X_STRENGTH_HALF		1
+#define AR803X_STRENGTH_QUARTER		2
+
+#endif
diff --git a/include/dt-bindings/pinctrl/pins-imxrt1020.h b/include/dt-bindings/pinctrl/pins-imxrt1020.h
index c6bacb7378..b3a833bde2 100644
--- a/include/dt-bindings/pinctrl/pins-imxrt1020.h
+++ b/include/dt-bindings/pinctrl/pins-imxrt1020.h
@@ -7,8 +7,6 @@
 #ifndef _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H
 #define _DT_BINDINGS_PINCTRL_IMXRT1020_PINFUNC_H
 
-/* TODO: continue from LPI2C4_SDA_SELECT_INPUT */
-
 #define IMX_PAD_SION	0x40000000
 
 /*
diff --git a/include/dt-bindings/power/r8a7790-sysc.h b/include/dt-bindings/power/r8a7790-sysc.h
index 6af4e9929b..bcb4905706 100644
--- a/include/dt-bindings/power/r8a7790-sysc.h
+++ b/include/dt-bindings/power/r8a7790-sysc.h
@@ -1,9 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2016 Glider bvba
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 #ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__
 #define __DT_BINDINGS_POWER_R8A7790_SYSC_H__
diff --git a/include/dt-bindings/power/r8a7791-sysc.h b/include/dt-bindings/power/r8a7791-sysc.h
index 1403baa051..1d20fae424 100644
--- a/include/dt-bindings/power/r8a7791-sysc.h
+++ b/include/dt-bindings/power/r8a7791-sysc.h
@@ -1,9 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2016 Glider bvba
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 #ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__
 #define __DT_BINDINGS_POWER_R8A7791_SYSC_H__
diff --git a/include/dt-bindings/power/r8a7792-sysc.h b/include/dt-bindings/power/r8a7792-sysc.h
index 74f4a78e29..dd3a4667ca 100644
--- a/include/dt-bindings/power/r8a7792-sysc.h
+++ b/include/dt-bindings/power/r8a7792-sysc.h
@@ -1,9 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2016 Cogent Embedded Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 #ifndef __DT_BINDINGS_POWER_R8A7792_SYSC_H__
 #define __DT_BINDINGS_POWER_R8A7792_SYSC_H__
diff --git a/include/dt-bindings/power/r8a7793-sysc.h b/include/dt-bindings/power/r8a7793-sysc.h
index b5693df3d8..056998c635 100644
--- a/include/dt-bindings/power/r8a7793-sysc.h
+++ b/include/dt-bindings/power/r8a7793-sysc.h
@@ -1,9 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (C) 2016 Glider bvba
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
  */
 #ifndef __DT_BINDINGS_POWER_R8A7793_SYSC_H__
 #define __DT_BINDINGS_POWER_R8A7793_SYSC_H__
diff --git a/include/dt-bindings/power/rk3328-power.h b/include/dt-bindings/power/rk3328-power.h
new file mode 100644
index 0000000000..02e3d7fc1c
--- /dev/null
+++ b/include/dt-bindings/power/rk3328-power.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_BINDINGS_POWER_RK3328_POWER_H__
+#define __DT_BINDINGS_POWER_RK3328_POWER_H__
+
+/**
+ * RK3328 idle id Summary.
+ */
+#define RK3328_PD_CORE		0
+#define RK3328_PD_GPU		1
+#define RK3328_PD_BUS		2
+#define RK3328_PD_MSCH		3
+#define RK3328_PD_PERI		4
+#define RK3328_PD_VIDEO		5
+#define RK3328_PD_HEVC		6
+#define RK3328_PD_SYS		7
+#define RK3328_PD_VPU		8
+#define RK3328_PD_VIO		9
+
+#endif
diff --git a/include/dt-bindings/soc/imx_rsrc.h b/include/dt-bindings/soc/imx_rsrc.h
index 4870eb985b..fb6878f6e2 100644
--- a/include/dt-bindings/soc/imx_rsrc.h
+++ b/include/dt-bindings/soc/imx_rsrc.h
@@ -553,5 +553,6 @@
 #define SC_R_VPU_ENC_1                  539
 #define SC_R_VPU                        540
 #define SC_R_LAST                       541
+#define SC_R_NONE                       0xFFF0
 
 #endif /* DT_BINDINGS_RSCRC_IMX_H */
diff --git a/include/dwc3-sti-glue.h b/include/dwc3-sti-glue.h
index e2856f1268..3989a9bb53 100644
--- a/include/dwc3-sti-glue.h
+++ b/include/dwc3-sti-glue.h
@@ -8,6 +8,7 @@
 #define __DWC3_STI_UBOOT_H_
 
 /* glue registers */
+#include <linux/bitops.h>
 #define CLKRST_CTRL		0x00
 #define AUX_CLK_EN		BIT(0)
 #define SW_PIPEW_RESET_N	BIT(4)
diff --git a/include/dwc3-uboot.h b/include/dwc3-uboot.h
index 3c9e204cf0..e08530ec4e 100644
--- a/include/dwc3-uboot.h
+++ b/include/dwc3-uboot.h
@@ -9,6 +9,7 @@
 #ifndef __DWC3_UBOOT_H_
 #define __DWC3_UBOOT_H_
 
+#include <generic-phy.h>
 #include <linux/usb/otg.h>
 #include <linux/usb/phy.h>
 
@@ -32,6 +33,10 @@ struct dwc3_device {
 	unsigned rx_detect_poll_quirk;
 	unsigned dis_u3_susphy_quirk;
 	unsigned dis_u2_susphy_quirk;
+	unsigned dis_del_phy_power_chg_quirk;
+	unsigned dis_tx_ipgap_linecheck_quirk;
+	unsigned dis_enblslpm_quirk;
+	unsigned dis_u2_freeclk_exists_quirk;
 	unsigned tx_de_emphasis_quirk;
 	unsigned tx_de_emphasis;
 	int index;
@@ -43,17 +48,15 @@ void dwc3_uboot_handle_interrupt(int index);
 
 struct phy;
 #if CONFIG_IS_ENABLED(PHY) && CONFIG_IS_ENABLED(DM_USB)
-int dwc3_setup_phy(struct udevice *dev, struct phy **array, int *num_phys);
-int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys, int num_phys);
+int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys);
+int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys);
 #else
-static inline int dwc3_setup_phy(struct udevice *dev, struct phy **array,
-				 int *num_phys)
+static inline int dwc3_setup_phy(struct udevice *dev, struct phy_bulk *phys)
 {
 	return -ENOTSUPP;
 }
 
-static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy *usb_phys,
-				    int num_phys)
+static inline int dwc3_shutdown_phy(struct udevice *dev, struct phy_bulk *phys)
 {
 	return -ENOTSUPP;
 }
diff --git a/include/dwmmc.h b/include/dwmmc.h
index f06720dc0d..d8a8355a0a 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -7,8 +7,10 @@
 #ifndef __DWMMC_HW_H
 #define __DWMMC_HW_H
 
+#include <asm/cache.h>
 #include <asm/io.h>
 #include <mmc.h>
+#include <linux/bitops.h>
 
 #define DWMCI_CTRL		0x000
 #define	DWMCI_PWREN		0x004
diff --git a/include/eeprom.h b/include/eeprom.h
index 79118eb83d..6820844cea 100644
--- a/include/eeprom.h
+++ b/include/eeprom.h
@@ -7,7 +7,7 @@
 #ifndef __EEPROM_LEGACY_H
 #define __EEPROM_LEGACY_H
 
-#ifdef CONFIG_CMD_EEPROM
+#if defined(CONFIG_CMD_EEPROM) || defined(CONFIG_ENV_IS_IN_EEPROM)
 void eeprom_init(int bus);
 int eeprom_read(uint dev_addr, uint offset, uchar *buffer, uint cnt);
 int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt);
@@ -17,8 +17,8 @@ int eeprom_write(uint dev_addr, uint offset, uchar *buffer, uint cnt);
  * some macros here so we don't have to touch every one of those uses
  */
 #define eeprom_init(bus)
-#define eeprom_read(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
-#define eeprom_write(dev_addr, offset, buffer, cnt) ((void)-ENOSYS)
+#define eeprom_read(dev_addr, offset, buffer, cnt) (-ENOSYS)
+#define eeprom_write(dev_addr, offset, buffer, cnt) (-ENOSYS)
 #endif
 
 #if !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
diff --git a/include/efi.h b/include/efi.h
index e12697a5d5..f986aad877 100644
--- a/include/efi.h
+++ b/include/efi.h
@@ -196,6 +196,7 @@ enum efi_mem_type {
 #define EFI_MEMORY_MORE_RELIABLE \
 				((u64)0x0000000000010000ULL)	/* higher reliability */
 #define EFI_MEMORY_RO		((u64)0x0000000000020000ULL)	/* read-only */
+#define EFI_MEMORY_SP		((u64)0x0000000000040000ULL)	/* specific-purpose memory (SPM) */
 #define EFI_MEMORY_RUNTIME	((u64)0x8000000000000000ULL)	/* range requires runtime mapping */
 #define EFI_MEM_DESC_VERSION	1
 
diff --git a/include/efi_api.h b/include/efi_api.h
index 77d6bf2660..759d911875 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -457,6 +457,7 @@ struct efi_device_path_acpi_path {
 #  define DEVICE_PATH_SUB_TYPE_MSG_USB		0x05
 #  define DEVICE_PATH_SUB_TYPE_MSG_MAC_ADDR	0x0b
 #  define DEVICE_PATH_SUB_TYPE_MSG_USB_CLASS	0x0f
+#  define DEVICE_PATH_SUB_TYPE_MSG_SATA		0x12
 #  define DEVICE_PATH_SUB_TYPE_MSG_NVME		0x17
 #  define DEVICE_PATH_SUB_TYPE_MSG_SD		0x1a
 #  define DEVICE_PATH_SUB_TYPE_MSG_MMC		0x1d
@@ -480,6 +481,13 @@ struct efi_device_path_usb {
 	u8 usb_interface;
 } __packed;
 
+struct efi_device_path_sata {
+	struct efi_device_path dp;
+	u16 hba_port;
+	u16 port_multiplier_port;
+	u16 logical_unit_number;
+} __packed;
+
 struct efi_device_path_mac_addr {
 	struct efi_device_path dp;
 	struct efi_mac_addr mac;
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 0ba9a1f702..c2cae814b6 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -9,10 +9,15 @@
 #define _EFI_LOADER_H 1
 
 #include <common.h>
+#include <blk.h>
+#include <log.h>
 #include <part_efi.h>
 #include <efi_api.h>
+#include <image.h>
 #include <pe.h>
 
+struct blk_desc;
+
 static inline int guidcmp(const void *g1, const void *g2)
 {
 	return memcmp(g1, g2, sizeof(efi_guid_t));
@@ -40,6 +45,10 @@ static inline void *guidcpy(void *dst, const void *src)
 #define U_BOOT_HOST_DEV_GUID \
 	EFI_GUID(0xbbe4e671, 0x5773, 0x4ea1, \
 		 0x9a, 0xab, 0x3a, 0x7d, 0xbf, 0x40, 0xc4, 0x82)
+/* GUID used as root for virtio devices */
+#define U_BOOT_VIRTIO_DEV_GUID \
+	EFI_GUID(0x63293792, 0xadf5, 0x9325, \
+		 0xb9, 0x9f, 0x4e, 0x0e, 0x45, 0x5c, 0x1b, 0x1e)
 
 /* Use internal device tree when starting UEFI application */
 #define EFI_FDT_USE_INTERNAL NULL
@@ -47,6 +56,13 @@ static inline void *guidcpy(void *dst, const void *src)
 /* Root node */
 extern efi_handle_t efi_root;
 
+/* EFI system partition */
+extern struct efi_system_partition {
+	enum if_type if_type;
+	int devnum;
+	u8 part;
+} efi_system_partition;
+
 int __efi_entry_check(void);
 int __efi_exit_check(void);
 const char *__efi_nesting(void);
@@ -386,6 +402,8 @@ efi_status_t efi_disk_register(void);
 int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
 			       const char *if_typename, int diskid,
 			       const char *pdevname);
+/* Check if it is EFI system partition */
+bool efi_disk_is_system_part(efi_handle_t handle);
 /* Called by bootefi to make GOP (graphical) interface available */
 efi_status_t efi_gop_register(void);
 /* Called by bootefi to make the network interface available */
@@ -535,8 +553,7 @@ efi_status_t efi_get_memory_map(efi_uintn_t *memory_map_size,
 				efi_uintn_t *descriptor_size,
 				uint32_t *descriptor_version);
 /* Adds a range into the EFI memory map */
-efi_status_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,
-				bool overlap_only_ram);
+efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type);
 /* Adds a conventional range into the EFI memory map */
 efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end,
 					     u64 ram_top);
@@ -691,13 +708,11 @@ struct efi_load_option {
 	const u8 *optional_data;
 };
 
-void efi_deserialize_load_option(struct efi_load_option *lo, u8 *data);
+efi_status_t efi_deserialize_load_option(struct efi_load_option *lo, u8 *data,
+					 efi_uintn_t *size);
 unsigned long efi_serialize_load_option(struct efi_load_option *lo, u8 **data);
 efi_status_t efi_bootmgr_load(efi_handle_t *handle);
 
-#ifdef CONFIG_EFI_SECURE_BOOT
-#include <image.h>
-
 /**
  * efi_image_regions - A list of memory regions
  *
@@ -767,7 +782,6 @@ bool efi_secure_boot_enabled(void);
 
 bool efi_image_parse(void *efi, size_t len, struct efi_image_regions **regp,
 		     WIN_CERTIFICATE **auth, size_t *auth_len);
-#endif /* CONFIG_EFI_SECURE_BOOT */
 
 #else /* CONFIG_IS_ENABLED(EFI_LOADER) */
 
diff --git a/include/efi_selftest.h b/include/efi_selftest.h
index eaee188de7..1515fdaa02 100644
--- a/include/efi_selftest.h
+++ b/include/efi_selftest.h
@@ -17,69 +17,89 @@
 #define EFI_ST_SUCCESS 0
 #define EFI_ST_FAILURE 1
 #define EFI_ST_SUCCESS_STR L"SUCCESS"
-/*
- * Prints a message.
+
+/**
+ * efi_st_printf() - print a message
+ *
+ * @...:	format string followed by fields to print
  */
 #define efi_st_printf(...) \
 	(efi_st_printc(-1, __VA_ARGS__))
 
-/*
- * Prints an error message.
+/**
+ * efi_st_error() - prints an error message
  *
- * @...	format string followed by fields to print
+ * @...:	format string followed by fields to print
  */
 #define efi_st_error(...) \
 	(efi_st_printc(EFI_LIGHTRED, "%s(%u):\nERROR: ", __FILE__, __LINE__), \
 	efi_st_printc(EFI_LIGHTRED, __VA_ARGS__))
 
-/*
- * Prints a TODO message.
+/**
+ * efi_st_todo() - prints a TODO message
  *
- * @...	format string followed by fields to print
+ * @...:	format string followed by fields to print
  */
 #define efi_st_todo(...) \
 	(efi_st_printc(EFI_YELLOW, "%s(%u):\nTODO: ", __FILE__, __LINE__), \
 	efi_st_printc(EFI_YELLOW, __VA_ARGS__)) \
 
-/*
+/**
+ * enum efi_test_phase - phase when test will be executed
+ *
  * A test may be setup and executed at boottime,
  * it may be setup at boottime and executed at runtime,
  * or it may be setup and executed at runtime.
  */
 enum efi_test_phase {
+	/**
+	 * @EFI_EXECUTE_BEFORE_BOOTTIME_EXIT: - execute before ExitBootServices
+	 *
+	 * Setup, execute, and teardown are executed before ExitBootServices().
+	 */
 	EFI_EXECUTE_BEFORE_BOOTTIME_EXIT = 1,
+	/**
+	 * @EFI_SETUP_BEFORE_BOOTTIME_EXIT: - setup before ExitBootServices
+	 *
+	 * Setup is executed before ExitBootServices() while execute, and
+	 * teardown are executed after ExitBootServices().
+	 */
 	EFI_SETUP_BEFORE_BOOTTIME_EXIT,
+	/**
+	 * @EFI_SETUP_AFTER_BOOTTIME_EXIT: - setup after ExitBootServices
+	 *
+	 * Setup, execute, and teardown are executed after ExitBootServices().
+	 */
 	EFI_SETUP_AFTER_BOOTTIME_EXIT,
 };
 
 extern struct efi_simple_text_output_protocol *con_out;
 extern struct efi_simple_text_input_protocol *con_in;
 
-/*
- * Exit the boot services.
+/**
+ * efi_st_exit_boot_services() - exit the boot services
  *
- * The size of the memory map is determined.
- * Pool memory is allocated to copy the memory map.
- * The memory amp is copied and the map key is obtained.
- * The map key is used to exit the boot services.
+ * * The size of the memory map is determined.
+ * * Pool memory is allocated to copy the memory map.
+ * * The memory map is copied and the map key is obtained.
+ * * The map key is used to exit the boot services.
  */
 void efi_st_exit_boot_services(void);
 
-/*
- * Print a colored message
+/**
+ * efi_st_printc() - print a colored message
  *
- * @color	color, see constants in efi_api.h, use -1 for no color
- * @fmt		printf format
- * @...		arguments to be printed
- *		on return position of terminating zero word
+ * @color:	color, see constants in efi_api.h, use -1 for no color
+ * @fmt:	printf style format string
+ * @...:	arguments to be printed
  */
 void efi_st_printc(int color, const char *fmt, ...)
 		 __attribute__ ((format (__printf__, 2, 3)));
 
 /**
- * efi_st_translate_char() - translate a unicode character to a string
+ * efi_st_translate_char() - translate a Unicode character to a string
  *
- * @code:	unicode character
+ * @code:	Unicode character
  * Return:	string
  */
 u16 *efi_st_translate_char(u16 code);
@@ -87,38 +107,44 @@ u16 *efi_st_translate_char(u16 code);
 /**
  * efi_st_translate_code() - translate a scan code to a human readable string
  *
- * @code:	unicode character
- * Return:	string
+ * This function translates the scan code returned by the simple text input
+ * protocol to a human readable string, e.g. 0x04 is translated to L"Left".
+ *
+ * @code:	scan code
+ * Return:	Unicode string
  */
 u16 *efi_st_translate_code(u16 code);
 
-/*
- * Compare an u16 string to a char string.
+/**
+ * efi_st_strcmp_16_8() - compare an u16 string to a char string
+ *
+ * This function compares each u16 value to the char value at the same
+ * position. This function is only useful for ANSI strings.
  *
  * @buf1:	u16 string
  * @buf2:	char string
- * @return:	0 if both buffers contain the same bytes
+ * Return:	0 if both buffers contain equivalent strings
  */
 int efi_st_strcmp_16_8(const u16 *buf1, const char *buf2);
 
-/*
- * Reads an Unicode character from the input device.
+/**
+ * efi_st_get_key() - reads an Unicode character from the input device
  *
- * @return: Unicode character
+ * Return:	Unicode character
  */
 u16 efi_st_get_key(void);
 
 /**
  * struct efi_unit_test - EFI unit test
  *
- * An efi_unit_test provides a interface to an EFI unit test.
+ * The &struct efi_unit_test structure provides a interface to an EFI unit test.
  *
- * @name:	name of unit test
+ * @name:	name of the unit test used in the user interface
  * @phase:	specifies when setup and execute are executed
- * @setup:	set up the unit test
- * @teardown:	tear down the unit test
- * @execute:	execute the unit test
- * @on_request:	test is only executed on request
+ * @setup:	set up function of the unit test
+ * @execute:	execute function of the unit test
+ * @teardown:	tear down function of the unit test
+ * @on_request:	flag indicating that the test shall only be executed on request
  */
 struct efi_unit_test {
 	const char *name;
@@ -130,7 +156,15 @@ struct efi_unit_test {
 	bool on_request;
 };
 
-/* Declare a new EFI unit test */
+/**
+ * EFI_UNIT_TEST() - macro to declare a new EFI unit test
+ *
+ * The macro EFI_UNIT_TEST() declares an EFI unit test using the &struct
+ * efi_unit_test structure. The test is added to a linker generated list which
+ * is evaluated by the 'bootefi selftest' command.
+ *
+ * @__name:	string identifying the unit test in the linker generated list
+ */
 #define EFI_UNIT_TEST(__name)						\
 	ll_entry_declare(struct efi_unit_test, __name, efi_unit_test)
 
diff --git a/include/elf.h b/include/elf.h
index e7c51986df..b04e746d61 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -9,7 +9,7 @@
 #ifndef _ELF_H
 #define _ELF_H
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 #include "compiler.h"
 
 /* This version doesn't work for 64-bit ABIs - Erik */
@@ -690,7 +690,7 @@ unsigned long elf_hash(const unsigned char *name);
 #define R_RISCV_64		2
 #define R_RISCV_RELATIVE	3
 
-#ifndef __ASSEMBLER__
+#ifndef __ASSEMBLY__
 int valid_elf_image(unsigned long addr);
 unsigned long load_elf64_image_phdr(unsigned long addr);
 unsigned long load_elf64_image_shdr(unsigned long addr);
diff --git a/include/env_default.h b/include/env_default.h
index 56a8bae39a..a657927e06 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -8,6 +8,7 @@
  */
 
 #include <env_callback.h>
+#include <linux/stringify.h>
 
 #ifdef DEFAULT_ENV_INSTANCE_EMBEDDED
 env_t embedded_environment __UBOOT_ENV_SECTION__(environment) = {
diff --git a/include/environment/distro/sf.h b/include/environment/distro/sf.h
new file mode 100644
index 0000000000..e793be06c6
--- /dev/null
+++ b/include/environment/distro/sf.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Amarula Solutions(India)
+ *
+ * SF distro configurations.
+ */
+
+#ifndef __DISTRO_SF_CONFIG_H
+#define __DISTRO_SF_CONFIG_H
+
+#if CONFIG_IS_ENABLED(CMD_SF)
+#define BOOTENV_SHARED_SF(devtypel)				\
+	#devtypel "_boot=" 					\
+	"if " #devtypel " probe ${busnum}; then "		\
+		"devtype=" #devtypel "; "	  		\
+		"run scan_sf_for_scripts; "	  		\
+	"fi\0"
+#define BOOTENV_DEV_SF(devtypeu, devtypel, instance) 		\
+	"bootcmd_" #devtypel #instance "=" 			\
+		"busnum=" #instance "; " 			\
+		"run " #devtypel "_boot\0"
+#define BOOTENV_DEV_NAME_SF(devtypeu, devtypel, instance) 	\
+	#devtypel #instance " "
+#else
+#define BOOTENV_SHARED_SF(devtypel)
+#define BOOTENV_DEV_SF \
+	BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF
+#define BOOTENV_DEV_NAME_SF \
+	BOOT_TARGET_DEVICES_references_SF_without_CONFIG_CMD_SF
+
+#endif /* CONFIG_CMD_SF */
+
+#define BOOTENV_SF \
+	BOOTENV_SHARED_SF(sf) \
+	"scan_sf_for_scripts="					\
+		"${devtype} read ${scriptaddr} "		\
+			"${script_offset_f} ${script_size_f}; "	\
+		"source ${scriptaddr}; "			\
+		"echo SCRIPT FAILED: continuing...\0"
+
+#endif /* __DISTRO_SF_CONFIG_H */
diff --git a/include/environment/ti/boot.h b/include/environment/ti/boot.h
index 11a57af0a4..a9d8f28d46 100644
--- a/include/environment/ti/boot.h
+++ b/include/environment/ti/boot.h
@@ -9,6 +9,8 @@
 #ifndef __TI_BOOT_H
 #define __TI_BOOT_H
 
+#include <linux/stringify.h>
+
 #ifndef CONSOLEDEV
 #define CONSOLEDEV "ttyS2"
 #endif
diff --git a/include/eth_phy.h b/include/eth_phy.h
new file mode 100644
index 0000000000..19c496551b
--- /dev/null
+++ b/include/eth_phy.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 NXP
+ */
+
+#ifndef _eth_phy_h_
+#define _eth_phy_h_
+
+#include <dm.h>
+#include <phy.h>
+
+int eth_phy_binds_nodes(struct udevice *eth_dev);
+int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus);
+struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev);
+int eth_phy_get_addr(struct udevice *dev);
+
+#endif
diff --git a/include/exception.h b/include/exception.h
index fc02490223..a7f21e73d7 100644
--- a/include/exception.h
+++ b/include/exception.h
@@ -5,10 +5,12 @@
  * Copyright (c) 2018, Heinrich Schuchardt <xypron.glpk@gmx.de>
  */
 
-static int do_exception(cmd_tbl_t *cmdtp, int flag, int argc,
-			char * const argv[])
+#include <command.h>
+
+static int do_exception(struct cmd_tbl *cmdtp, int flag, int argc,
+			char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc != 2)
 		return CMD_RET_USAGE;
@@ -25,12 +27,12 @@ static int do_exception(cmd_tbl_t *cmdtp, int flag, int argc,
 	return CMD_RET_USAGE;
 }
 
-static int exception_complete(int argc, char * const argv[], char last_char,
+static int exception_complete(int argc, char *const argv[], char last_char,
 			      int maxv, char *cmdv[])
 {
 	int len = 0;
 	int i = 0;
-	cmd_tbl_t *cmdtp;
+	struct cmd_tbl *cmdtp;
 
 	switch (argc) {
 	case 1:
diff --git a/include/exports.h b/include/exports.h
index cbd16fc518..b300554091 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -2,6 +2,7 @@
 #define __EXPORTS_H__
 
 #include <irq_func.h>
+#include <linux/delay.h>
 
 #ifndef __ASSEMBLY__
 #ifdef CONFIG_PHY_AQUANTIA
@@ -11,6 +12,7 @@
 
 #include <irq_func.h>
 
+struct cmd_tbl;
 struct spi_slave;
 
 /* Set up the jump table for use by the API */
diff --git a/include/ext4fs.h b/include/ext4fs.h
index 34585d407d..cb5d9cc0a5 100644
--- a/include/ext4fs.h
+++ b/include/ext4fs.h
@@ -28,6 +28,8 @@
 #define __EXT4__
 #include <ext_common.h>
 
+struct disk_partition;
+
 #define EXT4_INDEX_FL		0x00001000 /* Inode uses hash tree index */
 #define EXT4_EXTENTS_FL		0x00080000 /* Inode uses extents */
 #define EXT4_EXT_MAGIC			0xf30a
@@ -152,11 +154,11 @@ int ext4fs_exists(const char *filename);
 int ext4fs_size(const char *filename, loff_t *size);
 void ext4fs_free_node(struct ext2fs_node *node, struct ext2fs_node *currroot);
 int ext4fs_devread(lbaint_t sector, int byte_offset, int byte_len, char *buf);
-void ext4fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+void ext4fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 long int read_allocated_block(struct ext2_inode *inode, int fileblock,
 			      struct ext_block_cache *cache);
 int ext4fs_probe(struct blk_desc *fs_dev_desc,
-		 disk_partition_t *fs_partition);
+		 struct disk_partition *fs_partition);
 int ext4_read_file(const char *filename, void *buf, loff_t offset, loff_t len,
 		   loff_t *actread);
 int ext4_read_superblock(char *buffer);
diff --git a/include/ext_common.h b/include/ext_common.h
index 1c10c50474..bc3324172a 100644
--- a/include/ext_common.h
+++ b/include/ext_common.h
@@ -19,7 +19,9 @@
 
 #ifndef __EXT_COMMON__
 #define __EXT_COMMON__
-#include <command.h>
+
+struct cmd_tbl;
+
 #define SECTOR_SIZE		0x200
 #define LOG2_SECTOR_SIZE	9
 
@@ -210,11 +212,11 @@ struct ext2_data {
 
 extern lbaint_t part_offset;
 
-int do_ext2ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ext2load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ext4_load(cmd_tbl_t *cmdtp, int flag, int argc,
-					char *const argv[]);
-int do_ext4_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_ext4_write(cmd_tbl_t *cmdtp, int flag, int argc,
-				char *const argv[]);
+int do_ext2ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ext2load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ext4_load(struct cmd_tbl *cmdtp, int flag, int argc,
+		 char *const argv[]);
+int do_ext4_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ext4_write(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
 #endif
diff --git a/include/faraday/ftpci100.h b/include/faraday/ftpci100.h
index b4a43f82e5..8801bd1350 100644
--- a/include/faraday/ftpci100.h
+++ b/include/faraday/ftpci100.h
@@ -11,6 +11,7 @@
 #define __FTPCI100_H
 
 /* AHB Control Registers */
+#include <linux/bitops.h>
 struct ftpci100_ahbc {
 	unsigned int iosize;		/* 0x00 - I/O Space Size Signal */
 	unsigned int prot;		/* 0x04 - AHB Protection */
diff --git a/include/faraday/ftsdc010.h b/include/faraday/ftsdc010.h
index d3a359ab75..30726dab85 100644
--- a/include/faraday/ftsdc010.h
+++ b/include/faraday/ftsdc010.h
@@ -12,6 +12,7 @@
 #ifndef __ASSEMBLY__
 
 /* sd controller register */
+#include <linux/bitops.h>
 struct ftsdc010_mmc {
 	unsigned int	cmd;		/* 0x00 - command reg		*/
 	unsigned int	argu;		/* 0x04 - argument reg		*/
diff --git a/include/faraday/ftsdmc021.h b/include/faraday/ftsdmc021.h
index 3c979ced27..e0e5eb339e 100644
--- a/include/faraday/ftsdmc021.h
+++ b/include/faraday/ftsdmc021.h
@@ -14,6 +14,7 @@
 #define __FTSDMC021_H
 
 #ifndef __ASSEMBLY__
+#include <linux/bitops.h>
 struct ftsdmc021 {
 	unsigned int	tp1;		/* 0x00 - SDRAM Timing Parameter 1 */
 	unsigned int	tp2;		/* 0x04 - SDRAM Timing Parameter 2 */
diff --git a/include/fat.h b/include/fat.h
index bc139f8c88..02742f92a5 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -12,6 +12,8 @@
 #include <asm/byteorder.h>
 #include <fs.h>
 
+struct disk_partition;
+
 /* Maximum Long File Name length supported here is 128 UTF-16 code units */
 #define VFAT_MAXLEN_BYTES	256 /* Maximum LFN buffer in bytes */
 #define VFAT_MAXSEQ		9   /* Up to 9 of 13 2-byte UTF-16 entries */
@@ -193,7 +195,7 @@ int fat_size(const char *filename, loff_t *size);
 int file_fat_read_at(const char *filename, loff_t pos, void *buffer,
 		     loff_t maxsize, loff_t *actread);
 int file_fat_read(const char *filename, void *buffer, int maxsize);
-int fat_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+int fat_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 int fat_register_device(struct blk_desc *dev_desc, int part_no);
 
 int file_fat_write(const char *filename, void *buf, loff_t offset, loff_t len,
diff --git a/include/fb_mmc.h b/include/fb_mmc.h
index 95db001bee..76ed7cd6be 100644
--- a/include/fb_mmc.h
+++ b/include/fb_mmc.h
@@ -6,17 +6,21 @@
 #ifndef _FB_MMC_H_
 #define _FB_MMC_H_
 
+struct blk_desc;
+struct disk_partition;
+
 /**
  * fastboot_mmc_get_part_info() - Lookup eMMC partion by name
  *
  * @part_name: Named partition to lookup
  * @dev_desc: Pointer to returned blk_desc pointer
- * @part_info: Pointer to returned disk_partition_t
+ * @part_info: Pointer to returned struct disk_partition
  * @response: Pointer to fastboot response buffer
  */
 int fastboot_mmc_get_part_info(const char *part_name,
 			       struct blk_desc **dev_desc,
-			       disk_partition_t *part_info, char *response);
+			       struct disk_partition *part_info,
+			       char *response);
 
 /**
  * fastboot_mmc_flash_write() - Write image to eMMC for fastboot
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 166f29c55b..abd6d42671 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -1155,6 +1155,11 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  */
 int fdtdec_setup(void);
 
+/**
+ * Perform board-specific early DT adjustments
+ */
+int fdtdec_board_setup(const void *fdt_blob);
+
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 /**
  * fdtdec_resetup()  - Set up the device tree again
diff --git a/include/flash.h b/include/flash.h
index 2655c72087..3bf6b22399 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -84,20 +84,20 @@ typedef unsigned long flash_sect_t;
 
 /* Prototypes */
 
-extern unsigned long flash_init (void);
-extern void flash_print_info (flash_info_t *);
-extern int flash_erase	(flash_info_t *, int, int);
-extern int flash_sect_erase (ulong addr_first, ulong addr_last);
-extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last);
-extern int flash_sect_roundb (ulong *addr);
-extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect);
-extern void flash_set_verbose(uint);
+unsigned long flash_init(void);
+void flash_print_info(flash_info_t *info);
+int flash_erase(flash_info_t *info, int s_first, int s_last);
+int flash_sect_erase(ulong addr_first, ulong addr_last);
+int flash_sect_protect(int flag, ulong addr_first, ulong addr_last);
+int flash_sect_roundb(ulong *addr);
+unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect);
+void flash_set_verbose(uint v);
 
 /* common/flash.c */
-extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info);
-extern int flash_write (char *, ulong, ulong);
-extern flash_info_t *addr2info (ulong);
-extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
+void flash_protect(int flag, ulong from, ulong to, flash_info_t *info);
+int flash_write(char *src, ulong addr, ulong cnt);
+flash_info_t *addr2info(ulong addr);
+int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt);
 
 /* drivers/mtd/cfi_mtd.c */
 #ifdef CONFIG_FLASH_CFI_MTD
diff --git a/include/fs.h b/include/fs.h
index 37e35c2120..29f737b8c2 100644
--- a/include/fs.h
+++ b/include/fs.h
@@ -7,6 +7,8 @@
 
 #include <common.h>
 
+struct cmd_tbl;
+
 #define FS_TYPE_ANY	0
 #define FS_TYPE_FAT	1
 #define FS_TYPE_EXT	2
@@ -14,6 +16,8 @@
 #define FS_TYPE_UBIFS	4
 #define FS_TYPE_BTRFS	5
 
+struct blk_desc;
+
 /**
  * do_fat_fsload - Run the fatload command
  *
@@ -23,7 +27,8 @@
  * @argv: List of arguments
  * @return result (see enum command_ret_t)
  */
-int do_fat_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+int do_fat_fsload(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
 
 /**
  * do_ext2load - Run the ext2load command
@@ -34,7 +39,7 @@ int do_fat_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
  * @argv: List of arguments
  * @return result (see enum command_ret_t)
  */
-int do_ext2load(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+int do_ext2load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 /*
  * Tell the fs layer which block device an partition to use for future
@@ -224,34 +229,34 @@ int fs_mkdir(const char *filename);
  * Common implementation for various filesystem commands, optionally limited
  * to a specific filesystem type via the fstype parameter.
  */
-int do_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
-int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
-int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
+int do_size(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype);
+int do_load(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype);
+int do_ls(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	  int fstype);
 int file_exists(const char *dev_type, const char *dev_part, const char *file,
 		int fstype);
-int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
-int do_rm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
-int do_mkdir(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
-int do_ln(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
+int do_save(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	    int fstype);
+int do_rm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	  int fstype);
+int do_mkdir(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	     int fstype);
+int do_ln(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
 	  int fstype);
 
 /*
  * Determine the UUID of the specified filesystem and print it. Optionally it is
  * possible to store the UUID directly in env.
  */
-int do_fs_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[],
-		int fstype);
+int do_fs_uuid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[],
+	       int fstype);
 
 /*
  * Determine the type of the specified filesystem and print it. Optionally it is
  * possible to store the type directly in env.
  */
-int do_fs_type(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_fs_type(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 #endif /* _FS_H */
diff --git a/include/fs_internal.h b/include/fs_internal.h
index 96d26032ac..3d4d25da96 100644
--- a/include/fs_internal.h
+++ b/include/fs_internal.h
@@ -10,7 +10,7 @@
 
 #include <part.h>
 
-int fs_devread(struct blk_desc *, disk_partition_t *, lbaint_t, int, int,
+int fs_devread(struct blk_desc *, struct disk_partition *, lbaint_t, int, int,
 	       char *);
 
 #endif /* __U_BOOT_FS_INTERNAL_H__ */
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index a4d7d85fce..6cbcd39f12 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -7,6 +7,7 @@
 #define __FSL_MC_H__
 
 #include <common.h>
+#include <linux/bitops.h>
 
 #define MC_CCSR_BASE_ADDR \
 	((struct mc_ccsr_registers __iomem *)0x8340000)
diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h
index 2476f40c56..025d7a1e74 100644
--- a/include/fsl_ddr.h
+++ b/include/fsl_ddr.h
@@ -12,6 +12,8 @@
 
 #include <common_timing_params.h>
 
+struct cmd_tbl;
+
 #ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
 /* All controllers are for main memory */
 #define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS	CONFIG_SYS_NUM_DDR_CTLRS
@@ -120,7 +122,7 @@ unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set);
 void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd,
 		     unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl);
 
-int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr);
 void board_add_ram_info(int use_default);
 
diff --git a/include/fsl_ifc.h b/include/fsl_ifc.h
index 3edcc39f4e..fd915335b2 100644
--- a/include/fsl_ifc.h
+++ b/include/fsl_ifc.h
@@ -10,6 +10,7 @@
 #ifdef CONFIG_FSL_IFC
 #include <config.h>
 #include <common.h>
+#include <part.h>
 #ifdef CONFIG_ARM
 #include <asm/arch/soc.h>
 #endif
diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h
index b87346ce7c..8857d50910 100644
--- a/include/fsl_mdio.h
+++ b/include/fsl_mdio.h
@@ -53,6 +53,7 @@ int memac_mdio_write(struct mii_dev *bus, int port_addr, int dev_addr,
 		int regnum, u16 value);
 int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr,
 		int regnum);
+int memac_mdio_reset(struct mii_dev *bus);
 
 struct fsl_pq_mdio_info {
 	struct tsec_mii_mng __iomem *regs;
diff --git a/include/fsl_qe.h b/include/fsl_qe.h
index d4eba82436..6e44cbdb56 100644
--- a/include/fsl_qe.h
+++ b/include/fsl_qe.h
@@ -227,7 +227,8 @@ typedef enum qe_clock {
 
 /* Structure that defines QE firmware binary files.
  *
- * See doc/README.qe_firmware for a description of these fields.
+ * See Documentation/powerpc/qe_firmware.rst in the Linux kernel tree for
+ * a description of these fields.
  */
 struct qe_firmware {
 	struct qe_header {
diff --git a/include/fsl_validate.h b/include/fsl_validate.h
index 06951fccf4..252d499e7b 100644
--- a/include/fsl_validate.h
+++ b/include/fsl_validate.h
@@ -8,9 +8,10 @@
 
 #include <fsl_sec.h>
 #include <fsl_sec_mon.h>
-#include <command.h>
 #include <linux/types.h>
 
+struct cmd_tbl;
+
 #define WORD_SIZE 4
 
 /* Minimum and maximum size of RSA signature length in bits */
@@ -261,15 +262,14 @@ struct fsl_secboot_img_priv {
 	uint32_t img_size;	/* ESBC Image Size */
 };
 
-int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc,
-				char * const argv[]);
+int do_esbc_halt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 int fsl_secboot_validate(uintptr_t haddr, char *arg_hash_str,
 	uintptr_t *img_addr_ptr);
-int fsl_secboot_blob_encap(cmd_tbl_t *cmdtp, int flag, int argc,
-	char * const argv[]);
-int fsl_secboot_blob_decap(cmd_tbl_t *cmdtp, int flag, int argc,
-	char * const argv[]);
+int fsl_secboot_blob_encap(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[]);
+int fsl_secboot_blob_decap(struct cmd_tbl *cmdtp, int flag, int argc,
+			   char *const argv[]);
 
 int fsl_check_boot_mode_secure(void);
 int fsl_setenv_chain_of_trust(void);
diff --git a/include/g_dnl.h b/include/g_dnl.h
index 6d461c73d3..836ee602c8 100644
--- a/include/g_dnl.h
+++ b/include/g_dnl.h
@@ -38,6 +38,7 @@ int g_dnl_board_usb_cable_connected(void);
 int g_dnl_register(const char *s);
 void g_dnl_unregister(void);
 void g_dnl_set_serialnumber(char *);
+void g_dnl_set_product(const char *s);
 
 bool g_dnl_detach(void);
 void g_dnl_trigger_detach(void);
diff --git a/include/generic-phy.h b/include/generic-phy.h
index 73537025c2..5ab34cda03 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -124,6 +124,23 @@ struct phy_ops {
 	int	(*power_off)(struct phy *phy);
 };
 
+/**
+ * struct phy_bulk - A handle to (allowing control of) a bulk of phys.
+ *
+ * Consumers provide storage for the phy bulk. The content of the structure is
+ * managed solely by the phy API. A phy bulk struct is initialized
+ * by "get"ing the phy bulk struct.
+ * The phy bulk struct is passed to all other bulk phy APIs to apply
+ * the API to all the phy in the bulk struct.
+ *
+ * @phys: An array of phy handles.
+ * @count: The number of phy handles in the phys array.
+ */
+struct phy_bulk {
+	struct phy *phys;
+	unsigned int count;
+};
+
 #ifdef CONFIG_PHY
 
 /**
@@ -196,12 +213,15 @@ int generic_phy_get_by_index(struct udevice *user, int index,
 			     struct phy *phy);
 
 /**
- * generic_phy_get_by_node() - Get a PHY device by integer index on ofnode
+ * generic_phy_get_by_index_nodev() - Get a PHY device by integer index
+ * without a device
  *
- * @node:	the device node
+ * @node:	The client ofnode.
  * @index:	The index in the list of available PHYs
  * @phy:	A pointer to the PHY port
  *
+ * This is a version of generic_phy_get_by_index() that does not use a device.
+ *
  * This looks up a PHY device for a client device based on its ofnode and on
  * its position in the list of the possible PHYs.
  *
@@ -220,7 +240,7 @@ int generic_phy_get_by_index(struct udevice *user, int index,
  *
  * @return 0 if OK, or a negative error code
  */
-int generic_phy_get_by_node(ofnode node, int index, struct phy *phy);
+int generic_phy_get_by_index_nodev(ofnode node, int index, struct phy *phy);
 
 /**
  * generic_phy_get_by_name() - Get a PHY device by its name.
@@ -250,6 +270,55 @@ int generic_phy_get_by_node(ofnode node, int index, struct phy *phy);
 int generic_phy_get_by_name(struct udevice *user, const char *phy_name,
 			    struct phy *phy);
 
+/**
+ * generic_phy_get_bulk - Get all phys of a device.
+ *
+ * This looks up and gets all phys of the consumer device; each device is
+ * assumed to have n phys associated with it somehow, and this function finds
+ * and gets all of them in a separate structure.
+ *
+ * @dev:	The consumer device.
+ * @bulk	A pointer to a phy bulk struct to initialize.
+ * @return 0 if OK, or a negative error code.
+ */
+int generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk);
+
+/**
+ * generic_phy_init_bulk() - Initialize all phys in a phy bulk struct.
+ *
+ * @bulk:	A phy bulk struct that was previously successfully requested
+ *		by generic_phy_get_bulk().
+ * @return 0 if OK, or negative error code.
+ */
+int generic_phy_init_bulk(struct phy_bulk *bulk);
+
+/**
+ * generic_phy_exit_bulk() - de-initialize all phys in a phy bulk struct.
+ *
+ * @bulk:	A phy bulk struct that was previously successfully requested
+ *		by generic_phy_get_bulk().
+ * @return 0 if OK, or negative error code.
+ */
+int generic_phy_exit_bulk(struct phy_bulk *bulk);
+
+/**
+ * generic_phy_power_on_bulk() - Power on all phys in a phy	bulk struct.
+ *
+ * @bulk:	A phy bulk struct that was previously successfully requested
+ *		by generic_phy_get_bulk().
+ * @return 0 if OK, or negative error code.
+ */
+int generic_phy_power_on_bulk(struct phy_bulk *bulk);
+
+/**
+ * generic_phy_power_off_bulk() - Power off all phys in a phy bulk struct.
+ *
+ * @bulk:	A phy bulk struct that was previously successfully requested
+ *		by generic_phy_get_bulk().
+ * @return 0 if OK, or negative error code.
+ */
+int generic_phy_power_off_bulk(struct phy_bulk *bulk);
+
 #else /* CONFIG_PHY */
 
 static inline int generic_phy_init(struct phy *phy)
@@ -289,6 +358,32 @@ static inline int generic_phy_get_by_name(struct udevice *user, const char *phy_
 	return 0;
 }
 
+static inline int
+generic_phy_get_bulk(struct udevice *dev, struct phy_bulk *bulk)
+{
+	return 0;
+}
+
+static inline int generic_phy_init_bulk(struct phy_bulk *bulk)
+{
+	return 0;
+}
+
+static inline int generic_phy_exit_bulk(struct phy_bulk *bulk)
+{
+	return 0;
+}
+
+static inline int generic_phy_power_on_bulk(struct phy_bulk *bulk)
+{
+	return 0;
+}
+
+static inline int generic_phy_power_off_bulk(struct phy_bulk *bulk)
+{
+	return 0;
+}
+
 #endif /* CONFIG_PHY */
 
 /**
diff --git a/include/gzip.h b/include/gzip.h
index 2e340673c3..783acbb60d 100644
--- a/include/gzip.h
+++ b/include/gzip.h
@@ -7,6 +7,8 @@
 #ifndef __GZIP_H
 #define __GZIP_H
 
+struct blk_desc;
+
 /**
  * gzip_parse_header() - Parse a header from a gzip file
  *
diff --git a/include/hash.h b/include/hash.h
index f4019a9791..835962e7f6 100644
--- a/include/hash.h
+++ b/include/hash.h
@@ -6,6 +6,8 @@
 #ifndef _HASH_H
 #define _HASH_H
 
+struct cmd_tbl;
+
 /*
  * Maximum digest size for all algorithms we support. Having this value
  * avoids a malloc() or C99 local declaration in common/cmd_hash.c.
@@ -85,8 +87,8 @@ struct hash_algo {
  * @argc:		Number of arguments (arg 0 must be the command text)
  * @argv:		Arguments
  */
-int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag,
-		 int argc, char * const argv[]);
+int hash_command(const char *algo_name, int flags, struct cmd_tbl *cmdtp,
+		 int flag, int argc, char *const argv[]);
 
 /**
  * hash_block() - Hash a block according to the requested algorithm
diff --git a/include/i2c.h b/include/i2c.h
index 059200115a..1d792db454 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -16,6 +16,8 @@
 #ifndef _I2C_H_
 #define _I2C_H_
 
+#include <linker_lists.h>
+
 /*
  * For now there are essentially two parts to this file - driver model
  * here at the top, and the older code below (with CONFIG_SYS_I2C being
diff --git a/include/image.h b/include/image.h
index de55b2fb57..ad81dad444 100644
--- a/include/image.h
+++ b/include/image.h
@@ -590,10 +590,10 @@ ulong genimg_get_kernel_addr(char * const img_addr);
 int genimg_get_format(const void *img_addr);
 int genimg_has_config(bootm_headers_t *images);
 
-int boot_get_fpga(int argc, char * const argv[], bootm_headers_t *images,
-		uint8_t arch, const ulong *ld_start, ulong * const ld_len);
-int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
-		uint8_t arch, ulong *rd_start, ulong *rd_end);
+int boot_get_fpga(int argc, char *const argv[], bootm_headers_t *images,
+		  uint8_t arch, const ulong *ld_start, ulong * const ld_len);
+int boot_get_ramdisk(int argc, char *const argv[], bootm_headers_t *images,
+		     uint8_t arch, ulong *rd_start, ulong *rd_end);
 
 /**
  * boot_get_loadable - routine to load a list of binaries to memory
@@ -616,8 +616,8 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images,
  *     0, if only valid images or no images are found
  *     error code, if an error occurs during fit_image_load
  */
-int boot_get_loadable(int argc, char * const argv[], bootm_headers_t *images,
-		uint8_t arch, const ulong *ld_start, ulong * const ld_len);
+int boot_get_loadable(int argc, char *const argv[], bootm_headers_t *images,
+		      uint8_t arch, const ulong *ld_start, ulong *const ld_len);
 #endif /* !USE_HOSTCC */
 
 int boot_get_setup_fit(bootm_headers_t *images, uint8_t arch,
@@ -726,7 +726,7 @@ int image_source_script(ulong addr, const char *fit_uname);
 int fit_get_node_from_config(bootm_headers_t *images, const char *prop_name,
 			ulong addr);
 
-int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch,
+int boot_get_fdt(int flag, int argc, char *const argv[], uint8_t arch,
 		 bootm_headers_t *images,
 		 char **of_flat_tree, ulong *of_size);
 void boot_fdt_add_mem_rsv_regions(struct lmb *lmb, void *fdt_blob);
diff --git a/include/imx_sip.h b/include/imx_sip.h
index 139ff61b8a..26dbe0421a 100644
--- a/include/imx_sip.h
+++ b/include/imx_sip.h
@@ -7,7 +7,10 @@
 #define _IMX_SIP_H_
 
 #define IMX_SIP_GPC		0xC2000000
-#define  IMX_SIP_GPC_PM_DOMAIN	0x03
+#define IMX_SIP_GPC_PM_DOMAIN	0x03
+
+#define IMX_SIP_BUILDINFO			0xC2000003
+#define IMX_SIP_BUILDINFO_GET_COMMITHASH	0x00
 
 #define IMX_SIP_SRC		0xC2000005
 #define IMX_SIP_SRC_M4_START	0x00
diff --git a/include/init.h b/include/init.h
index 9ef88c966b..b5a167b6ed 100644
--- a/include/init.h
+++ b/include/init.h
@@ -20,7 +20,7 @@ struct global_data;
 #ifdef CONFIG_EFI_STUB
 #define ll_boot_init()	false
 #else
-#define ll_boot_init()	true
+#define ll_boot_init()	(!(gd->flags & GD_FLG_SKIP_LL_INIT))
 #endif
 
 /*
diff --git a/include/initcall.h b/include/initcall.h
index b5acdd01bd..41b74dc52d 100644
--- a/include/initcall.h
+++ b/include/initcall.h
@@ -8,6 +8,11 @@
 
 typedef int (*init_fnc_t)(void);
 
+#include <log.h>
+#ifdef CONFIG_EFI_APP
+#include <efi.h>
+#endif
+
 /*
  * To enable debugging. add #define DEBUG at the top of the including file.
  *
diff --git a/include/kgdb.h b/include/kgdb.h
index b6ba742ad3..616ce4451f 100644
--- a/include/kgdb.h
+++ b/include/kgdb.h
@@ -55,7 +55,7 @@ extern int kgdb_getregs(struct pt_regs *, char *, int);
 extern void kgdb_putreg(struct pt_regs *, int, char *, int);
 extern void kgdb_putregs(struct pt_regs *, char *, int);
 extern int kgdb_trap(struct pt_regs *);
-extern void kgdb_breakpoint(int argc, char * const argv[]);
+void kgdb_breakpoint(int argc, char *const argv[]);
 
 /* these functions are provided by the platform serial driver */
 extern void kgdb_serial_init(void);
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index a07c70fd48..6b509dce58 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -1,6 +1,8 @@
 #ifndef _LINUX_BITOPS_H
 #define _LINUX_BITOPS_H
 
+#ifndef USE_HOSTCC
+
 #include <asm/types.h>
 #include <asm-generic/bitsperlong.h>
 #include <linux/compiler.h>
@@ -216,4 +218,6 @@ static inline void generic_clear_bit(int nr, volatile unsigned long *addr)
 	*p &= ~mask;
 }
 
+#endif /* !USE_HOSTCC */
+
 #endif
diff --git a/include/linux/compat.h b/include/linux/compat.h
index 171188a76f..712eeaef4e 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -1,6 +1,7 @@
 #ifndef _LINUX_COMPAT_H_
 #define _LINUX_COMPAT_H_
 
+#include <log.h>
 #include <malloc.h>
 #include <linux/types.h>
 #include <linux/err.h>
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index 20b6d60dd8..6a107d52e0 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -2,6 +2,7 @@
 #ifndef _LINUX_DMA_MAPPING_H
 #define _LINUX_DMA_MAPPING_H
 
+#include <asm/cache.h>
 #include <linux/dma-direction.h>
 #include <linux/types.h>
 #include <asm/dma-mapping.h>
diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
index ab0ae1969a..30cdea0cdc 100644
--- a/include/linux/iopoll.h
+++ b/include/linux/iopoll.h
@@ -6,16 +6,18 @@
 #ifndef _LINUX_IOPOLL_H
 #define _LINUX_IOPOLL_H
 
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <linux/io.h>
 #include <time.h>
 
 /**
- * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
+ * read_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
  * @op: accessor function (takes @addr as its only argument)
  * @addr: Address to poll
  * @val: Variable to read the value into
  * @cond: Break condition (usually involving @val)
+ * @sleep_us: Maximum time to sleep in us
  * @timeout_us: Timeout in us, 0 means never timeout
  *
  * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
@@ -24,7 +26,7 @@
  * When available, you'll probably want to use one of the specialized
  * macros defined below rather than this macro directly.
  */
-#define readx_poll_timeout(op, addr, val, cond, timeout_us)	\
+#define read_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)	\
 ({ \
 	unsigned long timeout = timer_get_us() + timeout_us; \
 	for (;;) { \
@@ -35,10 +37,20 @@
 			(val) = op(addr); \
 			break; \
 		} \
+		if (sleep_us) \
+			udelay(sleep_us); \
 	} \
 	(cond) ? 0 : -ETIMEDOUT; \
 })
 
+#define readx_poll_sleep_timeout(op, addr, val, cond, sleep_us, timeout_us) \
+	read_poll_timeout(op, addr, val, cond, sleep_us, timeout_us)
+
+#define readl_poll_sleep_timeout(addr, val, cond, sleep_us, timeout_us) \
+	readx_poll_sleep_timeout(readl, addr, val, cond, sleep_us, timeout_us)
+
+#define readx_poll_timeout(op, addr, val, cond, timeout_us) \
+	read_poll_timeout(op, addr, val, cond, false, timeout_us)
 
 #define readb_poll_timeout(addr, val, cond, timeout_us) \
 	readx_poll_timeout(readb, addr, val, cond, timeout_us)
diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h
index bd373b9617..66febc6b72 100644
--- a/include/linux/mtd/rawnand.h
+++ b/include/linux/mtd/rawnand.h
@@ -16,6 +16,7 @@
 #include <config.h>
 
 #include <dm/device.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/flashchip.h>
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index ec144a08d8..233fdc341a 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -22,6 +22,7 @@
 #define SNOR_MFR_INTEL		CFI_MFR_INTEL
 #define SNOR_MFR_ST		CFI_MFR_ST /* ST Micro <--> Micron */
 #define SNOR_MFR_MICRON		CFI_MFR_MICRON /* ST Micro <--> Micron */
+#define SNOR_MFR_ISSI		CFI_MFR_PMC
 #define SNOR_MFR_MACRONIX	CFI_MFR_MACRONIX
 #define SNOR_MFR_SPANSION	CFI_MFR_AMD
 #define SNOR_MFR_SST		CFI_MFR_SST
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index be01e1e82e..83eafb184e 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -204,6 +204,7 @@ struct spinand_manufacturer {
 extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 extern const struct spinand_manufacturer micron_spinand_manufacturer;
+extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
 extern const struct spinand_manufacturer winbond_spinand_manufacturer;
 
 /**
diff --git a/include/linux/soc/ti/cppi5.h b/include/linux/soc/ti/cppi5.h
index 34038b31f7..cfdf7ea29f 100644
--- a/include/linux/soc/ti/cppi5.h
+++ b/include/linux/soc/ti/cppi5.h
@@ -10,6 +10,7 @@
 
 #include <hexdump.h>
 #include <linux/bitops.h>
+#include <linux/bug.h>
 
 /**
  * Descriptor header, present in all types of descriptors
diff --git a/include/linux/soc/ti/k3-navss-ringacc.h b/include/linux/soc/ti/k3-navss-ringacc.h
index 487dfe9859..7b027f8bd4 100644
--- a/include/linux/soc/ti/k3-navss-ringacc.h
+++ b/include/linux/soc/ti/k3-navss-ringacc.h
@@ -9,6 +9,7 @@
 #define __SOC_TI_K3_NAVSS_RINGACC_API_H_
 
 #include <dm/ofnode.h>
+#include <linux/bitops.h>
 
 /**
  * enum k3_nav_ring_mode - &struct k3_nav_ring_cfg mode
diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h
index 8c4863efe1..eb916ba101 100644
--- a/include/linux/soc/ti/ti_sci_protocol.h
+++ b/include/linux/soc/ti/ti_sci_protocol.h
@@ -20,6 +20,7 @@
  * @firmware_revision:	Firmware revision (not usually used).
  * @firmware_description: Firmware description (not usually used).
  */
+#include <linux/bitops.h>
 struct ti_sci_version_info {
 	u8 abi_major;
 	u8 abi_minor;
diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index 158ca9cd85..1e1217a958 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -10,10 +10,28 @@
 #ifndef __LINUX_USB_PHY_H
 #define __LINUX_USB_PHY_H
 
+#include <dm/ofnode.h>
+
 enum usb_phy_interface {
 	USBPHY_INTERFACE_MODE_UNKNOWN,
 	USBPHY_INTERFACE_MODE_UTMI,
 	USBPHY_INTERFACE_MODE_UTMIW,
 };
 
+#if CONFIG_IS_ENABLED(DM_USB)
+/**
+ * usb_get_phy_mode - Get phy mode for given device_node
+ * @np:	Pointer to the given device_node
+ *
+ * The function gets phy interface string from property 'phy_type',
+ * and returns the corresponding enum usb_phy_interface
+ */
+enum usb_phy_interface usb_get_phy_mode(ofnode node);
+#else
+static inline enum usb_phy_interface usb_get_phy_mode(ofnode node)
+{
+	return USBPHY_INTERFACE_MODE_UNKNOWN;
+}
+#endif
+
 #endif /* __LINUX_USB_PHY_H */
diff --git a/include/log.h b/include/log.h
index cf32351134..df65398c04 100644
--- a/include/log.h
+++ b/include/log.h
@@ -9,10 +9,13 @@
 #ifndef __LOG_H
 #define __LOG_H
 
-#include <command.h>
+#include <stdio.h>
+#include <linker_lists.h>
 #include <dm/uclass-id.h>
 #include <linux/list.h>
 
+struct cmd_tbl;
+
 /** Log levels supported, ranging from most to least important */
 enum log_level_t {
 	LOGL_EMERG = 0,		/* U-Boot is unstable */
@@ -413,7 +416,7 @@ enum log_fmt {
 };
 
 /* Handle the 'log test' command */
-int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+int do_log_test(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 /**
  * log_add_filter() - Add a new filter to a log device
diff --git a/include/menu.h b/include/menu.h
index 2d227c20bd..9ab9b21ebb 100644
--- a/include/menu.h
+++ b/include/menu.h
@@ -9,6 +9,7 @@
 struct menu;
 
 struct menu *menu_create(char *title, int timeout, int prompt,
+				void (*display_statusline)(struct menu *),
 				void (*item_data_print)(void *),
 				char *(*item_choice)(void *),
 				void *item_choice_data);
@@ -16,7 +17,6 @@ int menu_default_set(struct menu *m, char *item_key);
 int menu_get_choice(struct menu *m, void **choice);
 int menu_item_add(struct menu *m, char *item_key, void *item_data);
 int menu_destroy(struct menu *m);
-void menu_display_statusline(struct menu *m);
 int menu_default_choice(struct menu *m, void **choice);
 
 /**
diff --git a/include/micrel.h b/include/micrel.h
index 3e6b5312d8..a2593c5b10 100644
--- a/include/micrel.h
+++ b/include/micrel.h
@@ -23,6 +23,16 @@
 #define MII_KSZ9031_FLP_BURST_TX_LO		0x3
 #define MII_KSZ9031_FLP_BURST_TX_HI		0x4
 
+#define MII_KSZ9x31_SILICON_REV_MASK		0xfffff0
+
+#define MII_KSZ9131_RXTXDLL_BYPASS		BIT(12)
+#define MII_KSZ9131_EXT_RGMII_2NS_SKEW_RXDLL	0x4c
+#define MII_KSZ9131_EXT_RGMII_2NS_SKEW_TXDLL	0x4d
+
+#define PHY_ID_KSZ9031				0x00221620
+#define PHY_ID_KSZ9131				0x00221640
+
+
 /* Registers */
 #define MMD_ACCESS_CONTROL	0xd
 #define MMD_ACCESS_REG_DATA	0xe
@@ -35,5 +45,6 @@ int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr,
 			       int regnum, u16 mode, u16 val);
 int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr,
 			      int regnum, u16 mode);
+int ksz9xx1_phy_get_id(struct phy_device *phydev);
 
 #endif
diff --git a/include/mipi_dsi.h b/include/mipi_dsi.h
index f4a63b47f3..83c5163cf8 100644
--- a/include/mipi_dsi.h
+++ b/include/mipi_dsi.h
@@ -16,6 +16,7 @@
 #define MIPI_DSI_H
 
 #include <mipi_display.h>
+#include <linux/bitops.h>
 
 struct mipi_dsi_host;
 struct mipi_dsi_device;
diff --git a/include/mm_communication.h b/include/mm_communication.h
new file mode 100644
index 0000000000..193c4d1578
--- /dev/null
+++ b/include/mm_communication.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ *  Headers for EFI variable service via StandAloneMM, EDK2 application running
+ *  in OP-TEE
+ *
+ *  Copyright (c) 2017, Intel Corporation. All rights reserved.
+ *  Copyright (C) 2020 Linaro Ltd. <sughosh.ganu@linaro.org>
+ *  Copyright (C) 2020 Linaro Ltd. <ilias.apalodimas@linaro.org>
+ */
+
+#ifndef _MM_COMMUNICATION_H_
+#define _MM_COMMUNICATION_H_
+
+#include <part_efi.h>
+
+/*
+ * Interface to the pseudo Trusted Application (TA), which provides a
+ * communication channel with the Standalone MM (Management Mode)
+ * Secure Partition running at Secure-EL0
+ */
+
+#define PTA_STMM_CMDID_COMMUNICATE 0
+
+/* OP-TEE is using big endian GUIDs while UEFI uses little endian ones */
+#define PTA_STMM_UUID { 0xed32d533, 0x99e6, 0x4209, {\
+			0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 } }
+
+#define EFI_MM_VARIABLE_GUID \
+	EFI_GUID(0xed32d533, 0x99e6, 0x4209, \
+		 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7)
+
+/* Defined in EDK2 MdePkg/Include/Protocol/MmCommunication.h */
+
+/**
+ * struct efi_mm_communicate_header - Header used for SMM variable communication
+
+ * @header_guid:  header use for disambiguation of content
+ * @message_len:  length of the message. Does not include the size of the
+ *                header
+ * @data:         payload of the message
+ *
+ * Defined in EDK2 as EFI_MM_COMMUNICATE_HEADER.
+ * To avoid confusion in interpreting frames, the communication buffer should
+ * always begin with efi_mm_communicate_header.
+ */
+struct efi_mm_communicate_header {
+	efi_guid_t header_guid;
+	size_t     message_len;
+	u8         data[];
+};
+
+#define MM_COMMUNICATE_HEADER_SIZE \
+	(sizeof(struct efi_mm_communicate_header))
+
+/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmStdSmc.h */
+
+/* MM return error codes */
+#define ARM_SMC_MM_RET_SUCCESS              0
+#define ARM_SMC_MM_RET_NOT_SUPPORTED       -1
+#define ARM_SMC_MM_RET_INVALID_PARAMS      -2
+#define ARM_SMC_MM_RET_DENIED              -3
+#define ARM_SMC_MM_RET_NO_MEMORY           -4
+
+/* Defined in EDK2 MdeModulePkg/Include/Guid/SmmVariableCommon.h */
+
+#define SMM_VARIABLE_FUNCTION_GET_VARIABLE  1
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_GET_NEXT_VARIABLE_NAME.
+ */
+#define SMM_VARIABLE_FUNCTION_GET_NEXT_VARIABLE_NAME  2
+/*
+ * The payload for this function is SMM_VARIABLE_COMMUNICATE_ACCESS_VARIABLE.
+ */
+#define SMM_VARIABLE_FUNCTION_SET_VARIABLE  3
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_QUERY_VARIABLE_INFO.
+ */
+#define SMM_VARIABLE_FUNCTION_QUERY_VARIABLE_INFO  4
+/*
+ * It is a notify event, no extra payload for this function.
+ */
+#define SMM_VARIABLE_FUNCTION_READY_TO_BOOT  5
+/*
+ * It is a notify event, no extra payload for this function.
+ */
+#define SMM_VARIABLE_FUNCTION_EXIT_BOOT_SERVICE  6
+/*
+ * The payload for this function is VARIABLE_INFO_ENTRY.
+ * The GUID in EFI_SMM_COMMUNICATE_HEADER is gEfiSmmVariableProtocolGuid.
+ */
+#define SMM_VARIABLE_FUNCTION_GET_STATISTICS  7
+/*
+ * The payload for this function is SMM_VARIABLE_COMMUNICATE_LOCK_VARIABLE
+ */
+#define SMM_VARIABLE_FUNCTION_LOCK_VARIABLE   8
+
+#define SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_SET  9
+
+#define SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_GET  10
+
+#define SMM_VARIABLE_FUNCTION_GET_PAYLOAD_SIZE  11
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_RUNTIME_VARIABLE_CACHE_CONTEXT
+ */
+#define SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT 12
+
+#define SMM_VARIABLE_FUNCTION_SYNC_RUNTIME_CACHE  13
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_GET_RUNTIME_CACHE_INFO
+ */
+#define SMM_VARIABLE_FUNCTION_GET_RUNTIME_CACHE_INFO  14
+
+/**
+ * struct smm_variable_communicate_header - Used for SMM variable communication
+
+ * @function:     function to call in Smm.
+ * @ret_status:   return status
+ * @data:         payload
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_HEADER.
+ */
+struct smm_variable_communicate_header {
+	efi_uintn_t  function;
+	efi_status_t ret_status;
+	u8           data[];
+};
+
+#define MM_VARIABLE_COMMUNICATE_SIZE \
+	(sizeof(struct smm_variable_communicate_header))
+
+/**
+ * struct smm_variable_access - Used to communicate with StMM by
+ *                              SetVariable and GetVariable.
+
+ * @guid:         vendor GUID
+ * @data_size:    size of EFI variable data
+ * @name_size:    size of EFI name
+ * @attr:         attributes
+ * @name:         variable name
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_ACCESS_VARIABLE.
+ *
+ */
+struct smm_variable_access {
+	efi_guid_t  guid;
+	efi_uintn_t data_size;
+	efi_uintn_t name_size;
+	u32         attr;
+	u16         name[];
+};
+
+#define MM_VARIABLE_ACCESS_HEADER_SIZE \
+	(sizeof(struct smm_variable_access))
+/**
+ * struct smm_variable_payload_size - Used to get the max allowed
+ *                                    payload used in StMM.
+ *
+ * @size:  size to fill in
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_GET_PAYLOAD_SIZE.
+ *
+ */
+struct smm_variable_payload_size {
+	efi_uintn_t size;
+};
+
+/**
+ * struct smm_variable_getnext - Used to communicate with StMM for
+ *                               GetNextVariableName.
+ *
+ * @guid:       vendor GUID
+ * @name_size:  size of the name of the variable
+ * @name:       variable name
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_GET_NEXT_VARIABLE_NAME.
+ */
+struct smm_variable_getnext {
+	efi_guid_t  guid;
+	efi_uintn_t name_size;
+	u16         name[];
+};
+
+#define MM_VARIABLE_GET_NEXT_HEADER_SIZE \
+	(sizeof(struct smm_variable_getnext))
+
+/**
+ * struct smm_variable_query_info - Used to communicate with StMM for
+ *                                  QueryVariableInfo.
+ *
+ * @max_variable_storage:        max available storage
+ * @remaining_variable_storage:  remaining available storage
+ * @max_variable_size:           max variable supported size
+ * @attr:                        attributes to query storage for
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_QUERY_VARIABLE_INFO.
+ */
+struct smm_variable_query_info {
+	u64 max_variable_storage;
+	u64 remaining_variable_storage;
+	u64 max_variable_size;
+	u32 attr;
+};
+
+#endif /* _MM_COMMUNICATION_H_ */
diff --git a/include/mmc.h b/include/mmc.h
index 6a2e9739e0..82562193cc 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -9,6 +9,7 @@
 #ifndef _MMC_H_
 #define _MMC_H_
 
+#include <linux/bitops.h>
 #include <linux/list.h>
 #include <linux/sizes.h>
 #include <linux/compiler.h>
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index c2a185321a..ea67868ea0 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -13,11 +13,6 @@
 #endif
 
 /*
- * MPC83xx cpu provide RCR register to do reset thing specially
- */
-#define MPC83xx_RESET
-
-/*
  * System reset offset (PowerPC standard)
  */
 #define EXC_OFF_SYS_RESET		0x0100
diff --git a/include/mxs_nand.h b/include/mxs_nand.h
index ada20483d0..c0cefaca90 100644
--- a/include/mxs_nand.h
+++ b/include/mxs_nand.h
@@ -16,22 +16,26 @@
  * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
  * @ecc_strength:             A number that describes the strength of the ECC
  *                            algorithm.
- * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
- *                            the first chunk in the page includes both data and
- *                            metadata, so it's a bit larger than this value.
+ * @ecc_chunk0_size:          The size, in bytes, of a first ECC chunk.
+ * @ecc_chunkn_size:          The size, in bytes, of a single ECC chunk after
+ *                            the first chunk in the page.
  * @ecc_chunk_count:          The number of ECC chunks in the page,
  * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
  *                            which the underlying physical block mark appears.
  * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
  *                            which the underlying physical block mark appears.
+ * @ecc_for_meta:             The flag to indicate if there is a dedicate ecc
+ *                            for meta.
  */
 struct bch_geometry {
 	unsigned int  gf_len;
 	unsigned int  ecc_strength;
-	unsigned int  ecc_chunk_size;
+	unsigned int  ecc_chunk0_size;
+	unsigned int  ecc_chunkn_size;
 	unsigned int  ecc_chunk_count;
 	unsigned int  block_mark_byte_offset;
 	unsigned int  block_mark_bit_offset;
+	unsigned int  ecc_for_meta; /* ECC for meta data */
 };
 
 struct mxs_nand_info {
@@ -39,6 +43,8 @@ struct mxs_nand_info {
 	struct udevice *dev;
 	unsigned int	max_ecc_strength_supported;
 	bool		use_minimum_ecc;
+	/* legacy bch geometry flag */
+	bool		legacy_bch_geometry;
 	int		cur_chip;
 
 	uint32_t	cmd_queue_len;
@@ -82,13 +88,15 @@ struct mxs_nand_layout {
 	u32 ecc0;
 	u32 datan_size;
 	u32 eccn;
+	u32 gf_len;
 };
 
 int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
 int mxs_nand_init_spl(struct nand_chip *nand);
 int mxs_nand_setup_ecc(struct mtd_info *mtd);
 
-void mxs_nand_mode_fcb(struct mtd_info *mtd);
+void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd);
+void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd);
 void mxs_nand_mode_normal(struct mtd_info *mtd);
 u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
 u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
diff --git a/include/net.h b/include/net.h
index 82500eeb30..00a8ec0c78 100644
--- a/include/net.h
+++ b/include/net.h
@@ -12,12 +12,19 @@
 #ifndef __NET_H__
 #define __NET_H__
 
+#include <linux/types.h>
 #include <asm/cache.h>
 #include <asm/byteorder.h>	/* for nton* / ntoh* stuff */
 #include <env.h>
+#include <log.h>
+#include <time.h>
 #include <linux/if_ether.h>
 #include <rand.h>
 
+struct bd_info;
+struct cmd_tbl;
+struct udevice;
+
 #define DEBUG_LL_STATE 0	/* Link local state machine changes */
 #define DEBUG_DEV_PKT 0		/* Packets or info directed to the device */
 #define DEBUG_NET_PKT 0		/* Packets on info on the network at large */
@@ -59,7 +66,7 @@ struct in_addr {
  * @argv: List of arguments
  * @return result (see enum command_ret_t)
  */
-int do_tftpb(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
+int do_tftpb(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 
 /**
  * An incoming packet handler.
@@ -184,12 +191,12 @@ struct eth_device {
 	phys_addr_t iobase;
 	int state;
 
-	int (*init)(struct eth_device *, bd_t *);
+	int (*init)(struct eth_device *eth, struct bd_info *bd);
 	int (*send)(struct eth_device *, void *packet, int length);
 	int (*recv)(struct eth_device *);
 	void (*halt)(struct eth_device *);
 	int (*mcast)(struct eth_device *, const u8 *enetaddr, int join);
-	int (*write_hwaddr)(struct eth_device *);
+	int (*write_hwaddr)(struct eth_device *eth);
 	struct eth_device *next;
 	int index;
 	void *priv;
@@ -242,7 +249,7 @@ static __always_inline void eth_halt_state_only(void)
 int eth_write_hwaddr(struct eth_device *dev, const char *base_name,
 		     int eth_number);
 
-int usb_eth_initialize(bd_t *bi);
+int usb_eth_initialize(struct bd_info *bi);
 #endif
 
 int eth_initialize(void);		/* Initialize network subsystem */
diff --git a/include/net/pfe_eth/pfe/cbus/class_csr.h b/include/net/pfe_eth/pfe/cbus/class_csr.h
index e2fece7aa1..80f1f96b44 100644
--- a/include/net/pfe_eth/pfe/cbus/class_csr.h
+++ b/include/net/pfe_eth/pfe/cbus/class_csr.h
@@ -12,6 +12,7 @@
  * class_csr - block containing all the classifier control and status register.
  * Mapped on CBUS and accessible from all PE's and ARM.
  */
+#include <linux/bitops.h>
 #define CLASS_VERSION			(CLASS_CSR_BASE_ADDR + 0x000)
 #define CLASS_TX_CTRL			(CLASS_CSR_BASE_ADDR + 0x004)
 #define CLASS_INQ_PKTPTR		(CLASS_CSR_BASE_ADDR + 0x010)
diff --git a/include/net/pfe_eth/pfe/cbus/emac.h b/include/net/pfe_eth/pfe/cbus/emac.h
index 53db8cc08f..5dc2113687 100644
--- a/include/net/pfe_eth/pfe/cbus/emac.h
+++ b/include/net/pfe_eth/pfe/cbus/emac.h
@@ -7,6 +7,7 @@
 #ifndef _EMAC_H_
 #define _EMAC_H_
 
+#include <linux/bitops.h>
 #define EMAC_IEVENT_REG		0x004
 #define EMAC_IMASK_REG		0x008
 #define EMAC_R_DES_ACTIVE_REG	0x010
diff --git a/include/net/pfe_eth/pfe/cbus/hif.h b/include/net/pfe_eth/pfe/cbus/hif.h
index 36722c5e07..aa4951ec0e 100644
--- a/include/net/pfe_eth/pfe/cbus/hif.h
+++ b/include/net/pfe_eth/pfe/cbus/hif.h
@@ -12,6 +12,7 @@
  * hif - PFE hif block control and status register.
  * Mapped on CBUS and accessible from all PE's and ARM.
  */
+#include <linux/bitops.h>
 #define HIF_VERSION		(HIF_BASE_ADDR + 0x00)
 #define HIF_TX_CTRL		(HIF_BASE_ADDR + 0x04)
 #define HIF_TX_CURR_BD_ADDR	(HIF_BASE_ADDR + 0x08)
diff --git a/include/net/pfe_eth/pfe/cbus/tmu_csr.h b/include/net/pfe_eth/pfe/cbus/tmu_csr.h
index 1e1abe26ca..cfe8f8ce8f 100644
--- a/include/net/pfe_eth/pfe/cbus/tmu_csr.h
+++ b/include/net/pfe_eth/pfe/cbus/tmu_csr.h
@@ -7,6 +7,7 @@
 #ifndef _TMU_CSR_H_
 #define _TMU_CSR_H_
 
+#include <linux/bitops.h>
 #define TMU_VERSION			(TMU_CSR_BASE_ADDR + 0x000)
 #define TMU_INQ_WATERMARK		(TMU_CSR_BASE_ADDR + 0x004)
 #define TMU_PHY_INQ_PKTPTR		(TMU_CSR_BASE_ADDR + 0x008)
diff --git a/include/net/pfe_eth/pfe/pfe_hw.h b/include/net/pfe_eth/pfe/pfe_hw.h
index 5da676bf8b..c69fc69130 100644
--- a/include/net/pfe_eth/pfe/pfe_hw.h
+++ b/include/net/pfe_eth/pfe/pfe_hw.h
@@ -8,6 +8,7 @@
 #define _PFE_H_
 
 #include <elf.h>
+#include <linux/bitops.h>
 #include "cbus.h"
 
 #define PFE_RESET_WA
diff --git a/include/net/pfe_eth/pfe_eth.h b/include/net/pfe_eth/pfe_eth.h
index 68b2e381b9..116a2b2c1d 100644
--- a/include/net/pfe_eth/pfe_eth.h
+++ b/include/net/pfe_eth/pfe_eth.h
@@ -7,6 +7,7 @@
 #ifndef __PFE_ETH_H__
 #define __PFE_ETH_H__
 
+#include <linux/bitops.h>
 #include <linux/sizes.h>
 #include <asm/io.h>
 #include <miiphy.h>
diff --git a/include/netdev.h b/include/netdev.h
index 68a3fceab6..f2d21c45d0 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -125,6 +125,7 @@ int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr,
 /*
  * Allow FEC to fine-tune MII configuration on boards which require this.
  */
+struct eth_device;
 int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
 #endif
 
diff --git a/include/part.h b/include/part.h
index 0b5cf3d5e8..55be724d20 100644
--- a/include/part.h
+++ b/include/part.h
@@ -51,13 +51,22 @@ struct block_drvr {
 #define PART_TYPE_LEN 32
 #define MAX_SEARCH_PARTITIONS 64
 
-typedef struct disk_partition {
+#define PART_BOOTABLE			((int)BIT(0))
+#define PART_EFI_SYSTEM_PARTITION	((int)BIT(1))
+
+struct disk_partition {
 	lbaint_t	start;	/* # of first block in partition	*/
 	lbaint_t	size;	/* number of blocks in partition	*/
 	ulong	blksz;		/* block size in bytes			*/
 	uchar	name[PART_NAME_LEN];	/* partition name			*/
 	uchar	type[PART_TYPE_LEN];	/* string type description		*/
-	int	bootable;	/* Active/Bootable flag is set		*/
+	/*
+	 * The bootable is a bitmask with the following fields:
+	 *
+	 * PART_BOOTABLE		the MBR bootable flag is set
+	 * PART_EFI_SYSTEM_PARTITION	the partition is an EFI system partition
+	 */
+	int	bootable;
 #if CONFIG_IS_ENABLED(PARTITION_UUIDS)
 	char	uuid[UUID_STR_LEN + 1];	/* filesystem UUID as string, if exists	*/
 #endif
@@ -67,11 +76,11 @@ typedef struct disk_partition {
 #ifdef CONFIG_DOS_PARTITION
 	uchar	sys_ind;	/* partition type 			*/
 #endif
-} disk_partition_t;
+};
 
 struct disk_part {
 	int partnum;
-	disk_partition_t gpt_part_info;
+	struct disk_partition gpt_part_info;
 	struct list_head list;
 };
 
@@ -96,12 +105,14 @@ struct blk_desc *mg_disk_get_dev(int dev);
 int host_get_dev_err(int dev, struct blk_desc **blk_devp);
 
 /* disk/part.c */
-int part_get_info(struct blk_desc *dev_desc, int part, disk_partition_t *info);
+int part_get_info(struct blk_desc *dev_desc, int part,
+		  struct disk_partition *info);
 /**
  * part_get_info_whole_disk() - get partition info for the special case of
  * a partition occupying the entire disk.
  */
-int part_get_info_whole_disk(struct blk_desc *dev_desc, disk_partition_t *info);
+int part_get_info_whole_disk(struct blk_desc *dev_desc,
+			     struct disk_partition *info);
 
 void part_print(struct blk_desc *dev_desc);
 void part_init(struct blk_desc *dev_desc);
@@ -170,7 +181,7 @@ int blk_get_device_by_str(const char *ifname, const char *dev_str,
  */
 int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
 			    struct blk_desc **dev_desc,
-			    disk_partition_t *info, int allow_whole_dev);
+			    struct disk_partition *info, int allow_whole_dev);
 
 /**
  * part_get_info_by_name_type() - Search for a partition by name
@@ -185,7 +196,7 @@ int blk_get_device_part_str(const char *ifname, const char *dev_part_str,
  * otherwise error
  */
 int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name,
-			       disk_partition_t *info, int part_type);
+			       struct disk_partition *info, int part_type);
 
 /**
  * part_get_info_by_name() - Search for a partition by name
@@ -199,7 +210,7 @@ int part_get_info_by_name_type(struct blk_desc *dev_desc, const char *name,
  * otherwise error
  */
 int part_get_info_by_name(struct blk_desc *dev_desc,
-			      const char *name, disk_partition_t *info);
+			      const char *name, struct disk_partition *info);
 
 /**
  * Get partition info from dev number + part name, or dev number + part number.
@@ -220,7 +231,7 @@ int part_get_info_by_name(struct blk_desc *dev_desc,
 int part_get_info_by_dev_and_name_or_num(const char *dev_iface,
 					 const char *dev_part_str,
 					 struct blk_desc **dev_desc,
-					 disk_partition_t *part_info);
+					 struct disk_partition *part_info);
 
 /**
  * part_set_generic_name() - create generic partition like hda1 or sdb2
@@ -243,9 +254,9 @@ static inline struct blk_desc *blk_get_dev(const char *ifname, int dev)
 static inline struct blk_desc *mg_disk_get_dev(int dev) { return NULL; }
 
 static inline int part_get_info(struct blk_desc *dev_desc, int part,
-				disk_partition_t *info) { return -1; }
+				struct disk_partition *info) { return -1; }
 static inline int part_get_info_whole_disk(struct blk_desc *dev_desc,
-					   disk_partition_t *info)
+					   struct disk_partition *info)
 { return -1; }
 static inline void part_print(struct blk_desc *dev_desc) {}
 static inline void part_init(struct blk_desc *dev_desc) {}
@@ -254,10 +265,10 @@ static inline int blk_get_device_by_str(const char *ifname, const char *dev_str,
 					struct blk_desc **dev_desc)
 { return -1; }
 static inline int blk_get_device_part_str(const char *ifname,
-					   const char *dev_part_str,
-					   struct blk_desc **dev_desc,
-					   disk_partition_t *info,
-					   int allow_whole_dev)
+					  const char *dev_part_str,
+					  struct blk_desc **dev_desc,
+					  struct disk_partition *info,
+					  int allow_whole_dev)
 { *dev_desc = NULL; return -1; }
 #endif
 
@@ -292,7 +303,7 @@ struct part_driver {
 	 * @info:	Returns partition information
 	 */
 	int (*get_info)(struct blk_desc *dev_desc, int part,
-			disk_partition_t *info);
+			struct disk_partition *info);
 
 	/**
 	 * print() - Print partition information
@@ -344,7 +355,7 @@ int write_gpt_table(struct blk_desc *dev_desc,
  */
 int gpt_fill_pte(struct blk_desc *dev_desc,
 		 gpt_header *gpt_h, gpt_entry *gpt_e,
-		 disk_partition_t *partitions, int parts);
+		 struct disk_partition *partitions, int parts);
 
 /**
  * gpt_fill_header(): Fill the GPT header
@@ -370,7 +381,7 @@ int gpt_fill_header(struct blk_desc *dev_desc, gpt_header *gpt_h,
  * @return zero on success
  */
 int gpt_restore(struct blk_desc *dev_desc, char *str_disk_guid,
-		disk_partition_t *partitions, const int parts_count);
+		struct disk_partition *partitions, const int parts_count);
 
 /**
  * is_valid_gpt_buf() - Ensure that the Primary GPT information is valid
@@ -424,7 +435,7 @@ int gpt_verify_headers(struct blk_desc *dev_desc, gpt_header *gpt_head,
  * @return - '0' on success, otherwise error
  */
 int gpt_verify_partitions(struct blk_desc *dev_desc,
-			  disk_partition_t *partitions, int parts,
+			  struct disk_partition *partitions, int parts,
 			  gpt_header *gpt_head, gpt_entry **gpt_pte);
 
 
diff --git a/include/pch.h b/include/pch.h
index 0b44b66df9..620566819c 100644
--- a/include/pch.h
+++ b/include/pch.h
@@ -7,6 +7,7 @@
 #ifndef __pch_h
 #define __pch_h
 
+#include <linux/bitops.h>
 #define PCH_RCBA		0xf0
 
 #define BIOS_CTRL_BIOSWE	BIT(0)
diff --git a/include/pci.h b/include/pci.h
index aff56b24f9..19c9244b94 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -531,7 +531,7 @@ typedef int pci_dev_t;
  * This is relevant for the following macros:
  * PCI_DEV, PCI_FUNC, PCI_DEVFN
  * The U-Boot macro PCI_DEV is equivalent to the Linux PCI_SLOT version with
- * the remark from above (input d in bits 15-8 instead of 7-0.
+ * the remark from above (input is in bits 15-8 instead of 7-0.
  */
 #define PCI_DEV(d)		(((d) >> 11) & 0x1f)
 #define PCI_FUNC(d)		(((d) >> 8) & 0x7)
diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h
index 1493a677f0..d3567df326 100644
--- a/include/power/stpmic1.h
+++ b/include/power/stpmic1.h
@@ -6,6 +6,7 @@
 #ifndef __PMIC_STPMIC1_H_
 #define __PMIC_STPMIC1_H_
 
+#include <linux/bitops.h>
 #define STPMIC1_MAIN_CR			0x10
 #define STPMIC1_BUCKS_MRST_CR		0x18
 #define STPMIC1_LDOS_MRST_CR		0x1a
diff --git a/include/regmap.h b/include/regmap.h
index 9ada1af5ef..30183c5e71 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -7,6 +7,8 @@
 #ifndef __REGMAP_H
 #define __REGMAP_H
 
+#include <linux/delay.h>
+
 /**
  * DOC: Overview
  *
diff --git a/include/reiserfs.h b/include/reiserfs.h
index de4150024c..b61bb60067 100644
--- a/include/reiserfs.h
+++ b/include/reiserfs.h
@@ -18,6 +18,9 @@
 #define SECTOR_SIZE		0x200
 #define SECTOR_BITS		9
 
+struct blk_desc;
+struct disk_partition;
+
 /* Error codes */
 typedef enum
 {
@@ -62,7 +65,7 @@ typedef enum
 } reiserfs_error_t;
 
 
-void reiserfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+void reiserfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 extern int reiserfs_ls (char *dirname);
 extern int reiserfs_open (char *filename);
 extern int reiserfs_read (char *buf, unsigned len);
diff --git a/include/sandboxfs.h b/include/sandboxfs.h
index 6e6e3c62ff..783dd5c88a 100644
--- a/include/sandboxfs.h
+++ b/include/sandboxfs.h
@@ -18,7 +18,10 @@
 #ifndef __SANDBOX_FS__
 #define __SANDBOX_FS__
 
-int sandbox_fs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+struct blk_desc;
+struct disk_partition;
+
+int sandbox_fs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 
 int sandbox_fs_read_at(const char *filename, loff_t pos, void *buffer,
 		       loff_t maxsize, loff_t *actread);
diff --git a/include/scsi.h b/include/scsi.h
index 61da958bf6..96cb726676 100644
--- a/include/scsi.h
+++ b/include/scsi.h
@@ -6,6 +6,7 @@
  #ifndef _SCSI_H
  #define _SCSI_H
 
+#include <asm/cache.h>
 #include <linux/dma-direction.h>
 
 struct scsi_cmd {
diff --git a/include/sdhci.h b/include/sdhci.h
index aa4378fd57..94fc3ed56a 100644
--- a/include/sdhci.h
+++ b/include/sdhci.h
@@ -9,6 +9,7 @@
 #ifndef __SDHCI_HW_H
 #define __SDHCI_HW_H
 
+#include <linux/bitops.h>
 #include <linux/types.h>
 #include <asm/io.h>
 #include <mmc.h>
@@ -243,7 +244,6 @@
 #define SDHCI_QUIRK_BROKEN_HISPD_MODE	BIT(5)
 #define SDHCI_QUIRK_WAIT_SEND_CMD	(1 << 6)
 #define SDHCI_QUIRK_USE_WIDE8		(1 << 8)
-#define SDHCI_QUIRK_NO_1_8_V		(1 << 9)
 
 /* to make gcc happy */
 struct sdhci_host;
diff --git a/include/search.h b/include/search.h
index 8f87dc72ce..bca36d3abc 100644
--- a/include/search.h
+++ b/include/search.h
@@ -84,7 +84,7 @@ int hmatch_r(const char *match, int last_idx, struct env_entry **retval,
 int hdelete_r(const char *key, struct hsearch_data *htab, int flag);
 
 ssize_t hexport_r(struct hsearch_data *htab, const char sep, int flag,
-		  char **resp, size_t size, int argc, char * const argv[]);
+		  char **resp, size_t size, int argc, char *const argv[]);
 
 /*
  * nvars: length of vars array
diff --git a/include/serial.h b/include/serial.h
index 54b21a0470..c590637b1f 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -28,7 +28,7 @@ extern struct serial_device *default_serial_console(void);
 
 #if	defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || \
 	defined(CONFIG_MPC86xx) || \
-	defined(CONFIG_TEGRA) || defined(CONFIG_SYS_COREBOOT) || \
+	defined(CONFIG_ARCH_TEGRA) || defined(CONFIG_SYS_COREBOOT) || \
 	defined(CONFIG_MICROBLAZE)
 extern struct serial_device serial0_device;
 extern struct serial_device serial1_device;
diff --git a/include/spi-mem.h b/include/spi-mem.h
index 36814efa86..893f7bd733 100644
--- a/include/spi-mem.h
+++ b/include/spi-mem.h
@@ -60,10 +60,12 @@
 /**
  * enum spi_mem_data_dir - describes the direction of a SPI memory data
  *			   transfer from the controller perspective
+ * @SPI_MEM_NO_DATA: no data transferred
  * @SPI_MEM_DATA_IN: data coming from the SPI memory
  * @SPI_MEM_DATA_OUT: data sent the SPI memory
  */
 enum spi_mem_data_dir {
+	SPI_MEM_NO_DATA,
 	SPI_MEM_DATA_IN,
 	SPI_MEM_DATA_OUT,
 };
diff --git a/include/spi.h b/include/spi.h
index 2b4929fc79..5cc6d6e008 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -10,6 +10,7 @@
 #define _SPI_H_
 
 #include <common.h>
+#include <linux/bitops.h>
 
 /* SPI mode flags */
 #define SPI_CPHA	BIT(0)			/* clock phase */
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 0b23f57a71..d9b2af856c 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -34,19 +34,6 @@ struct dm_spi_flash_ops {
 	int (*write)(struct udevice *dev, u32 offset, size_t len,
 		     const void *buf);
 	int (*erase)(struct udevice *dev, u32 offset, size_t len);
-	/**
-	 * get_sw_write_prot() - Check state of software write-protect feature
-	 *
-	 * SPI flash chips can lock a region of the flash defined by a
-	 * 'protected area'. This function checks if this protected area is
-	 * defined.
-	 *
-	 * @dev:	SPI flash device
-	 * @return 0 if no region is write-protected, 1 if a region is
-	 *	write-protected, -ENOSYS if the driver does not implement this,
-	 *	other -ve value on error
-	 */
-	int (*get_sw_write_prot)(struct udevice *dev);
 };
 
 /* Access the serial operations for a device */
@@ -89,20 +76,6 @@ int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len,
 int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len);
 
 /**
- * spl_flash_get_sw_write_prot() - Check state of software write-protect feature
- *
- * SPI flash chips can lock a region of the flash defined by a
- * 'protected area'. This function checks if this protected area is
- * defined.
- *
- * @dev:	SPI flash device
- * @return 0 if no region is write-protected, 1 if a region is
- *	write-protected, -ENOSYS if the driver does not implement this,
- *	other -ve value on error
- */
-int spl_flash_get_sw_write_prot(struct udevice *dev);
-
-/**
  * spi_flash_std_probe() - Probe a SPI flash device
  *
  * This is the standard internal method for probing a SPI flash device to
diff --git a/include/spl.h b/include/spl.h
index 6bf9fd8beb..b31c9bb4ab 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -7,6 +7,7 @@
 #define	_SPL_H_
 
 #include <binman_sym.h>
+#include <linker_lists.h>
 
 /* Platform-specific defines */
 #include <linux/compiler.h>
@@ -26,6 +27,9 @@ struct image_header;
 #define MMCSD_MODE_FS		2
 #define MMCSD_MODE_EMMCBOOT	3
 
+struct blk_desc;
+struct image_header;
+
 /*
  * u_boot_first_phase() - check if this is the first U-Boot phase
  *
@@ -582,4 +586,5 @@ void spl_perform_fixups(struct spl_image_info *spl_image);
  */
 struct image_header *spl_get_load_buffer(ssize_t offset, size_t size);
 
+void spl_save_restore_data(void);
 #endif
diff --git a/include/tee.h b/include/tee.h
index 02bcd9e703..8207d0c02a 100644
--- a/include/tee.h
+++ b/include/tee.h
@@ -6,6 +6,7 @@
 #ifndef __TEE_H
 #define __TEE_H
 
+#include <linux/bitops.h>
 #define TEE_UUID_LEN		16
 
 #define TEE_GEN_CAP_GP          BIT(0)	/* GlobalPlatform compliant TEE */
diff --git a/include/tee/optee.h b/include/tee/optee.h
index 121b30a303..affa937da0 100644
--- a/include/tee/optee.h
+++ b/include/tee/optee.h
@@ -10,6 +10,7 @@
 #define _OPTEE_H
 
 #include <linux/errno.h>
+#include <image.h>
 
 #define OPTEE_MAGIC             0x4554504f
 #define OPTEE_VERSION           1
@@ -28,14 +29,16 @@ struct optee_header {
 	uint32_t paged_size;
 };
 
-static inline uint32_t optee_image_get_entry_point(const image_header_t *hdr)
+static inline uint32_t
+optee_image_get_entry_point(const struct image_header *hdr)
 {
 	struct optee_header *optee_hdr = (struct optee_header *)(hdr + 1);
 
 	return optee_hdr->init_load_addr_lo;
 }
 
-static inline uint32_t optee_image_get_load_addr(const image_header_t *hdr)
+static inline uint32_t
+optee_image_get_load_addr(const struct image_header *hdr)
 {
 	return optee_image_get_entry_point(hdr) - sizeof(struct optee_header);
 }
diff --git a/include/test/suites.h b/include/test/suites.h
index 213e3cee77..f120b3a82a 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -7,6 +7,7 @@
 #ifndef __TEST_SUITES_H__
 #define __TEST_SUITES_H__
 
+struct cmd_tbl;
 struct unit_test;
 
 /**
@@ -23,18 +24,22 @@ struct unit_test;
  */
 int cmd_ut_category(const char *name, const char *prefix,
 		    struct unit_test *tests, int n_ents,
-		    int argc, char * const argv[]);
+		    int argc, char *const argv[]);
 
-int do_ut_bloblist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_ut_compression(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_ut_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]);
-int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-int do_ut_unicode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[]);
+int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[]);
+int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
+int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
+int do_ut_str(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_time(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_unicode(struct cmd_tbl *cmdtp, int flag, int argc,
+		  char *const argv[]);
 
 #endif /* __TEST_SUITES_H__ */
diff --git a/include/test/test.h b/include/test/test.h
index 2a75211008..029288de88 100644
--- a/include/test/test.h
+++ b/include/test/test.h
@@ -41,7 +41,29 @@ struct unit_test {
 	int flags;
 };
 
-/* Declare a new unit test */
+/**
+ * UNIT_TEST() - create linker generated list entry for unit a unit test
+ *
+ * The macro UNIT_TEST() is used to create a linker generated list entry. These
+ * list entries are enumerate tests that can be execute using the ut command.
+ * The list entries are used both by the implementation of the ut command as
+ * well as in a related Python test.
+ *
+ * For Python testing the subtests are collected in Python function
+ * generate_ut_subtest() by applying a regular expression to the lines of file
+ * u-boot.sym. The list entries have to follow strict naming conventions to be
+ * matched by the expression.
+ *
+ * Use UNIT_TEST(foo_test_bar, _flags, foo_test) for a test bar in test suite
+ * foo that can be executed via command 'ut foo bar' and is implemented in
+ * function foo_test_bar().
+ *
+ * @_name:	concatenation of name of the test suite, "_test_", and the name
+ *		of the test
+ * @_flags:	an integer field that can be evaluated by the test suite
+ *		implementation
+ * @_suite:	name of the test suite concatenated with "_test"
+ */
 #define UNIT_TEST(_name, _flags, _suite)				\
 	ll_entry_declare(struct unit_test, _name, _suite) = {		\
 		.file = __FILE__,					\
diff --git a/include/test/ut.h b/include/test/ut.h
index b05d719ed0..7ddd6e8872 100644
--- a/include/test/ut.h
+++ b/include/test/ut.h
@@ -8,6 +8,7 @@
 #ifndef __TEST_UT_H
 #define __TEST_UT_H
 
+#include <command.h>
 #include <hexdump.h>
 #include <linux/err.h>
 
diff --git a/include/tpm-common.h b/include/tpm-common.h
index 702cd6e93b..e29b10b176 100644
--- a/include/tpm-common.h
+++ b/include/tpm-common.h
@@ -7,6 +7,8 @@
 #ifndef __TPM_COMMON_H
 #define __TPM_COMMON_H
 
+#include <command.h>
+
 enum tpm_duration {
 	TPM_SHORT = 0,
 	TPM_MEDIUM = 1,
@@ -173,8 +175,8 @@ struct tpm_ops {
 	U_BOOT_CMD_MKENT(cmd, 0, 1, do_tpm_ ## cmd, "", "")
 
 #define TPM_COMMAND_NO_ARG(cmd)				\
-int do_##cmd(cmd_tbl_t *cmdtp, int flag,		\
-	     int argc, char * const argv[])		\
+int do_##cmd(struct cmd_tbl *cmdtp, int flag,		\
+	     int argc, char *const argv[])		\
 {							\
 	struct udevice *dev;				\
 	int rc;						\
@@ -263,20 +265,20 @@ int tpm_init(struct udevice *dev);
 /**
  * Retrieve the array containing all the v1 (resp. v2) commands.
  *
- * @return a cmd_tbl_t array.
+ * @return a struct cmd_tbl array.
  */
 #if defined(CONFIG_TPM_V1)
-cmd_tbl_t *get_tpm1_commands(unsigned int *size);
+struct cmd_tbl *get_tpm1_commands(unsigned int *size);
 #else
-static inline cmd_tbl_t *get_tpm1_commands(unsigned int *size)
+static inline struct cmd_tbl *get_tpm1_commands(unsigned int *size)
 {
 	return NULL;
 }
 #endif
 #if defined(CONFIG_TPM_V2)
-cmd_tbl_t *get_tpm2_commands(unsigned int *size);
+struct cmd_tbl *get_tpm2_commands(unsigned int *size);
 #else
-static inline cmd_tbl_t *get_tpm2_commands(unsigned int *size)
+static inline struct cmd_tbl *get_tpm2_commands(unsigned int *size)
 {
 	return NULL;
 }
diff --git a/include/tpm-v1.h b/include/tpm-v1.h
index 45b7a4831d..59ad4aecf4 100644
--- a/include/tpm-v1.h
+++ b/include/tpm-v1.h
@@ -8,6 +8,7 @@
 #define __TPM_V1_H
 
 #include <tpm-common.h>
+#include <linux/bitops.h>
 
 /* Useful constants */
 enum {
diff --git a/include/ubifs_uboot.h b/include/ubifs_uboot.h
index 015ce12226..b025779d59 100644
--- a/include/ubifs_uboot.h
+++ b/include/ubifs_uboot.h
@@ -14,13 +14,16 @@
 #ifndef __UBIFS_UBOOT_H__
 #define __UBIFS_UBOOT_H__
 
+struct blk_desc;
+struct disk_partition;
+
 int ubifs_init(void);
 int uboot_ubifs_mount(char *vol_name);
 void uboot_ubifs_umount(void);
 int ubifs_is_mounted(void);
 int ubifs_load(char *filename, u32 addr, u32 size);
 
-int ubifs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+int ubifs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 int ubifs_ls(const char *dir_name);
 int ubifs_exists(const char *filename);
 int ubifs_size(const char *filename, loff_t *size);
diff --git a/include/usb.h b/include/usb.h
index 22f6088fe6..fa9e09607e 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -103,7 +103,7 @@ enum {
  */
 struct usb_device {
 	int	devnum;			/* Device number on USB bus */
-	int	speed;			/* full/low/high */
+	enum usb_device_speed speed;	/* full/low/high */
 	char	mf[32];			/* manufacturer */
 	char	prod[32];		/* product */
 	char	serial[32];		/* serial number */
diff --git a/include/usb/xhci.h b/include/usb/xhci.h
index 6017504488..20e4a21066 100644
--- a/include/usb/xhci.h
+++ b/include/usb/xhci.h
@@ -670,6 +670,9 @@ struct xhci_ep_ctx {
 /* deq bitmasks */
 #define EP_CTX_CYCLE_MASK		(1 << 0)
 
+/* reserved[0] bitmasks, MediaTek xHCI used */
+#define EP_BPKTS(p)	(((p) & 0x7f) << 0)
+#define EP_BBM(p)	(((p) & 0x1) << 11)
 
 /**
  * struct xhci_input_control_context
diff --git a/include/virtio.h b/include/virtio.h
index 561dcc34ba..10a9c073ba 100644
--- a/include/virtio.h
+++ b/include/virtio.h
@@ -20,6 +20,8 @@
 #ifndef __VIRTIO_H__
 #define __VIRTIO_H__
 
+#include <linux/bitops.h>
+#include <linux/bug.h>
 #define VIRTIO_ID_NET		1 /* virtio net */
 #define VIRTIO_ID_BLOCK		2 /* virtio block */
 #define VIRTIO_ID_RNG		4 /* virtio rng */
diff --git a/include/vsc9953.h b/include/vsc9953.h
index fe072da516..5d6fc7716c 100644
--- a/include/vsc9953.h
+++ b/include/vsc9953.h
@@ -11,6 +11,7 @@
 #include <config.h>
 #include <miiphy.h>
 #include <asm/types.h>
+#include <linux/bitops.h>
 
 #define VSC9953_OFFSET			(CONFIG_SYS_CCSRBAR_DEFAULT + 0x800000)
 
diff --git a/include/vxworks.h b/include/vxworks.h
index d90d862fb7..c2585e61ce 100644
--- a/include/vxworks.h
+++ b/include/vxworks.h
@@ -9,6 +9,9 @@
 
 #include <efi_api.h>
 
+struct bootm_headers;
+struct cmd_tbl;
+
 /* Use Linux compatible standard DTB */
 #define VXWORKS_SYSFLG_STD_DTB	0x1
 
@@ -83,8 +86,8 @@ struct efi_gop_info {
 	u32 fb_size;			/* framebuffer size */
 };
 
-int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
-void boot_prep_vxworks(bootm_headers_t *images);
-void boot_jump_vxworks(bootm_headers_t *images);
+int do_bootvx(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+void boot_prep_vxworks(struct bootm_headers *images);
+void boot_jump_vxworks(struct bootm_headers *images);
 
 #endif
diff --git a/include/wait_bit.h b/include/wait_bit.h
index 79da0811fe..dc2ffeb2c2 100644
--- a/include/wait_bit.h
+++ b/include/wait_bit.h
@@ -8,9 +8,11 @@
 #ifndef __WAIT_BIT_H
 #define __WAIT_BIT_H
 
-#include <common.h>
 #include <console.h>
+#include <log.h>
+#include <time.h>
 #include <watchdog.h>
+#include <linux/delay.h>
 #include <linux/errno.h>
 #include <asm/io.h>
 
diff --git a/include/wdt.h b/include/wdt.h
index aea5abc768..d2ccfbc62e 100644
--- a/include/wdt.h
+++ b/include/wdt.h
@@ -7,6 +7,7 @@
 #define _WDT_H_
 
 #include <dm.h>
+#include <log.h>
 #include <dm/read.h>
 
 /*
diff --git a/include/xyzModem.h b/include/xyzModem.h
index 6fae634961..a8911b6bf5 100644
--- a/include/xyzModem.h
+++ b/include/xyzModem.h
@@ -25,6 +25,8 @@
 #ifndef _XYZMODEM_H_
 #define _XYZMODEM_H_
 
+#include <linux/delay.h>
+
 #define xyzModem_xmodem 1
 #define xyzModem_ymodem 2
 /* Don't define this until the protocol support is in place */
diff --git a/include/zfs_common.h b/include/zfs_common.h
index bca3dff06e..027ba91b28 100644
--- a/include/zfs_common.h
+++ b/include/zfs_common.h
@@ -98,7 +98,7 @@ int zfs_close(zfs_file_t);
 int zfs_ls(device_t dev, const char *path,
 		   int (*hook) (const char *, const struct zfs_dirhook_info *));
 int zfs_devread(int sector, int byte_offset, int byte_len, char *buf);
-void zfs_set_blk_dev(struct blk_desc *rbdd, disk_partition_t *info);
+void zfs_set_blk_dev(struct blk_desc *rbdd, struct disk_partition *info);
 void zfs_unmount(struct zfs_data *data);
 int lzjb_decompress(void *, void *, uint32_t, uint32_t);
 #endif
diff --git a/include/zynqmppl.h b/include/zynqmppl.h
index 5214db99fb..a0a52ec4c1 100644
--- a/include/zynqmppl.h
+++ b/include/zynqmppl.h
@@ -8,6 +8,7 @@
 #define _ZYNQMPPL_H_
 
 #include <xilinx.h>
+#include <linux/bitops.h>
 
 #define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID		0xC2000018
 #define ZYNQMP_SIP_SVC_PM_FPGA_LOAD		0xC2000016
diff --git a/lib/Kconfig b/lib/Kconfig
index 868de3bf3b..af5c38afd9 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -162,7 +162,7 @@ config LIB_RAND
 	bool "Pseudo-random library support"
 
 config LIB_HW_RAND
-	bool "HW Engine for random libray support"
+	bool "HW Engine for random library support"
 
 endchoice
 
@@ -363,7 +363,22 @@ config SHA_PROG_HW_ACCEL
 	  is performed in hardware.
 
 config MD5
-	bool
+	bool "Support MD5 algorithm"
+	help
+	  This option enables MD5 support. MD5 is an algorithm designed
+	  in 1991 that produces a 16-byte digest (or checksum) from its input
+	  data. It has a number of vulnerabilities which preclude its use in
+	  security applications, but it can be useful for providing a quick
+	  checksum of a block of data.
+
+config SPL_MD5
+	bool "Support MD5 algorithm in SPL"
+	help
+	  This option enables MD5 support in SPL. MD5 is an algorithm designed
+	  in 1991 that produces a 16-byte digest (or checksum) from its input
+	  data. It has a number of vulnerabilities which preclude its use in
+	  security applications, but it can be useful for providing a quick
+	  checksum of a block of data.
 
 config CRC32C
 	bool
@@ -409,6 +424,10 @@ config GZIP
 	help
 	  This enables support for GZIP compression algorithm.
 
+config GZIP_COMPRESSED
+	bool
+	select ZLIB
+
 config BZIP2
 	bool "Enable bzip2 decompression support"
 	help
@@ -429,7 +448,7 @@ config ZSTD
 config SPL_LZ4
 	bool "Enable LZ4 decompression support in SPL"
 	help
-	  This enables support for tge LZ4 decompression algorithm in SPL. LZ4
+	  This enables support for the LZ4 decompression algorithm in SPL. LZ4
 	  is a lossless data compression algorithm that is focused on
 	  fast compression and decompression speed. It belongs to the LZ77
 	  family of byte-oriented compression schemes.
@@ -437,7 +456,7 @@ config SPL_LZ4
 config SPL_LZMA
 	bool "Enable LZMA decompression support for SPL build"
 	help
-	  This enables support for LZMA compression altorithm for SPL boot.
+	  This enables support for LZMA compression algorithm for SPL boot.
 
 config SPL_LZO
 	bool "Enable LZO decompression support in SPL"
diff --git a/lib/Makefile b/lib/Makefile
index c6f862b0c2..6e688afa68 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -40,7 +40,6 @@ obj-$(CONFIG_GZIP_COMPRESSED) += gzip.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += smbios.o
 obj-$(CONFIG_IMAGE_SPARSE) += image-sparse.o
 obj-y += ldiv.o
-obj-$(CONFIG_MD5) += md5.o
 obj-$(CONFIG_XXHASH) += xxhash.o
 obj-y += net_utils.o
 obj-$(CONFIG_PHYSMEM) += physmem.o
@@ -59,6 +58,7 @@ obj-$(CONFIG_TPM_V2) += tpm-v2.o
 endif
 
 obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi/
+obj-$(CONFIG_$(SPL_)MD5) += md5.o
 obj-$(CONFIG_$(SPL_)RSA) += rsa/
 obj-$(CONFIG_SHA1) += sha1.o
 obj-$(CONFIG_SHA256) += sha256.o
diff --git a/lib/acpi/acpi_table.c b/lib/acpi/acpi_table.c
index 4633dcb948..431776666e 100644
--- a/lib/acpi/acpi_table.c
+++ b/lib/acpi/acpi_table.c
@@ -6,12 +6,15 @@
  */
 
 #include <common.h>
-#include <acpi/acpi_table.h>
 #include <dm.h>
 #include <cpu.h>
+#include <log.h>
+#include <mapmem.h>
+#include <tables_csum.h>
+#include <version.h>
+#include <acpi/acpi_table.h>
+#include <dm/acpi.h>
 
-/* Temporary change to ensure bisectability */
-#ifndef CONFIG_SANDBOX
 int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
 {
 	struct acpi_table_header *header = &dmar->header;
@@ -37,7 +40,6 @@ int acpi_create_dmar(struct acpi_dmar *dmar, enum dmar_flags flags)
 
 	return 0;
 }
-#endif
 
 int acpi_get_table_revision(enum acpi_tables table)
 {
@@ -91,3 +93,173 @@ int acpi_get_table_revision(enum acpi_tables table)
 		return -EINVAL;
 	}
 }
+
+void acpi_fill_header(struct acpi_table_header *header, char *signature)
+{
+	memcpy(header->signature, signature, 4);
+	memcpy(header->oem_id, OEM_ID, 6);
+	memcpy(header->oem_table_id, OEM_TABLE_ID, 8);
+	header->oem_revision = U_BOOT_BUILD_DATE;
+	memcpy(header->aslc_id, ASLC_ID, 4);
+}
+
+void acpi_align(struct acpi_ctx *ctx)
+{
+	ctx->current = (void *)ALIGN((ulong)ctx->current, 16);
+}
+
+void acpi_align64(struct acpi_ctx *ctx)
+{
+	ctx->current = (void *)ALIGN((ulong)ctx->current, 64);
+}
+
+void acpi_inc(struct acpi_ctx *ctx, uint amount)
+{
+	ctx->current += amount;
+}
+
+void acpi_inc_align(struct acpi_ctx *ctx, uint amount)
+{
+	ctx->current += amount;
+	acpi_align(ctx);
+}
+
+/**
+ * Add an ACPI table to the RSDT (and XSDT) structure, recalculate length
+ * and checksum.
+ */
+int acpi_add_table(struct acpi_ctx *ctx, void *table)
+{
+	int i, entries_num;
+	struct acpi_rsdt *rsdt;
+	struct acpi_xsdt *xsdt;
+
+	/* The RSDT is mandatory while the XSDT is not */
+	rsdt = ctx->rsdt;
+
+	/* This should always be MAX_ACPI_TABLES */
+	entries_num = ARRAY_SIZE(rsdt->entry);
+
+	for (i = 0; i < entries_num; i++) {
+		if (rsdt->entry[i] == 0)
+			break;
+	}
+
+	if (i >= entries_num) {
+		log_err("ACPI: Error: too many tables\n");
+		return -E2BIG;
+	}
+
+	/* Add table to the RSDT */
+	rsdt->entry[i] = map_to_sysmem(table);
+
+	/* Fix RSDT length or the kernel will assume invalid entries */
+	rsdt->header.length = sizeof(struct acpi_table_header) +
+				(sizeof(u32) * (i + 1));
+
+	/* Re-calculate checksum */
+	rsdt->header.checksum = 0;
+	rsdt->header.checksum = table_compute_checksum((u8 *)rsdt,
+						       rsdt->header.length);
+
+	/*
+	 * And now the same thing for the XSDT. We use the same index as for
+	 * now we want the XSDT and RSDT to always be in sync in U-Boot
+	 */
+	xsdt = ctx->xsdt;
+
+	/* Add table to the XSDT */
+	xsdt->entry[i] = map_to_sysmem(table);
+
+	/* Fix XSDT length */
+	xsdt->header.length = sizeof(struct acpi_table_header) +
+				(sizeof(u64) * (i + 1));
+
+	/* Re-calculate checksum */
+	xsdt->header.checksum = 0;
+	xsdt->header.checksum = table_compute_checksum((u8 *)xsdt,
+						       xsdt->header.length);
+
+	return 0;
+}
+
+static void acpi_write_rsdp(struct acpi_rsdp *rsdp, struct acpi_rsdt *rsdt,
+			    struct acpi_xsdt *xsdt)
+{
+	memset(rsdp, 0, sizeof(struct acpi_rsdp));
+
+	memcpy(rsdp->signature, RSDP_SIG, 8);
+	memcpy(rsdp->oem_id, OEM_ID, 6);
+
+	rsdp->length = sizeof(struct acpi_rsdp);
+	rsdp->rsdt_address = map_to_sysmem(rsdt);
+
+	rsdp->xsdt_address = map_to_sysmem(xsdt);
+	rsdp->revision = ACPI_RSDP_REV_ACPI_2_0;
+
+	/* Calculate checksums */
+	rsdp->checksum = table_compute_checksum(rsdp, 20);
+	rsdp->ext_checksum = table_compute_checksum(rsdp,
+						    sizeof(struct acpi_rsdp));
+}
+
+static void acpi_write_rsdt(struct acpi_rsdt *rsdt)
+{
+	struct acpi_table_header *header = &rsdt->header;
+
+	/* Fill out header fields */
+	acpi_fill_header(header, "RSDT");
+	header->length = sizeof(struct acpi_rsdt);
+	header->revision = 1;
+
+	/* Entries are filled in later, we come with an empty set */
+
+	/* Fix checksum */
+	header->checksum = table_compute_checksum(rsdt,
+						  sizeof(struct acpi_rsdt));
+}
+
+static void acpi_write_xsdt(struct acpi_xsdt *xsdt)
+{
+	struct acpi_table_header *header = &xsdt->header;
+
+	/* Fill out header fields */
+	acpi_fill_header(header, "XSDT");
+	header->length = sizeof(struct acpi_xsdt);
+	header->revision = 1;
+
+	/* Entries are filled in later, we come with an empty set */
+
+	/* Fix checksum */
+	header->checksum = table_compute_checksum(xsdt,
+						  sizeof(struct acpi_xsdt));
+}
+
+void acpi_setup_base_tables(struct acpi_ctx *ctx, void *start)
+{
+	ctx->current = start;
+
+	/* Align ACPI tables to 16 byte */
+	acpi_align(ctx);
+	gd->arch.acpi_start = map_to_sysmem(ctx->current);
+
+	/* We need at least an RSDP and an RSDT Table */
+	ctx->rsdp = ctx->current;
+	acpi_inc_align(ctx, sizeof(struct acpi_rsdp));
+	ctx->rsdt = ctx->current;
+	acpi_inc_align(ctx, sizeof(struct acpi_rsdt));
+	ctx->xsdt = ctx->current;
+	acpi_inc_align(ctx, sizeof(struct acpi_xsdt));
+
+	/* clear all table memory */
+	memset((void *)start, '\0', ctx->current - start);
+
+	acpi_write_rsdp(ctx->rsdp, ctx->rsdt, ctx->xsdt);
+	acpi_write_rsdt(ctx->rsdt);
+	acpi_write_xsdt(ctx->xsdt);
+	/*
+	 * Per ACPI spec, the FACS table address must be aligned to a 64 byte
+	 * boundary (Windows checks this, but Linux does not).
+	 */
+	acpi_align64(ctx);
+}
diff --git a/lib/aes.c b/lib/aes.c
index ce53c9f1f3..c998aecb3c 100644
--- a/lib/aes.c
+++ b/lib/aes.c
@@ -23,6 +23,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <log.h>
 #else
 #include <string.h>
 #endif
diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c
index 26175132f3..b17651ed63 100644
--- a/lib/asm-offsets.c
+++ b/lib/asm-offsets.c
@@ -12,6 +12,7 @@
  */
 
 #include <common.h>
+#include <asm-offsets.h>
 
 #include <linux/kbuild.h>
 
diff --git a/lib/asn1_decoder.c b/lib/asn1_decoder.c
index db222625dd..bcb0390eb4 100644
--- a/lib/asn1_decoder.c
+++ b/lib/asn1_decoder.c
@@ -6,6 +6,7 @@
  */
 
 #ifdef __UBOOT__
+#include <log.h>
 #include <linux/compat.h>
 #else
 #include <linux/export.h>
diff --git a/lib/bch.c b/lib/bch.c
index 8945d8d4cf..de66b1acba 100644
--- a/lib/bch.c
+++ b/lib/bch.c
@@ -55,6 +55,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <ubi_uboot.h>
 #include <dm/devres.h>
diff --git a/lib/binman.c b/lib/binman.c
index 6cf6dcfdad..fd7de24bd2 100644
--- a/lib/binman.c
+++ b/lib/binman.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <binman.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 
 struct binman_info {
diff --git a/lib/bzip2/bzlib_blocksort.c b/lib/bzip2/bzlib_blocksort.c
index 2785521502..36cf843659 100644
--- a/lib/bzip2/bzlib_blocksort.c
+++ b/lib/bzip2/bzlib_blocksort.c
@@ -60,6 +60,7 @@
 --*/
 
 #include "bzlib_private.h"
+#include <log.h>
 
 /*---------------------------------------------*/
 /*--- Fallback O(N log(N)^2) sorting        ---*/
diff --git a/lib/charset.c b/lib/charset.c
index 1c6a7f693d..a28034ee1f 100644
--- a/lib/charset.c
+++ b/lib/charset.c
@@ -379,6 +379,11 @@ size_t u16_strnlen(const u16 *in, size_t count)
 	return i;
 }
 
+size_t u16_strsize(const void *in)
+{
+	return (u16_strlen(in) + 1) * sizeof(u16);
+}
+
 u16 *u16_strcpy(u16 *dest, const u16 *src)
 {
 	u16 *tmp = dest;
diff --git a/lib/circbuf.c b/lib/circbuf.c
index 071e4fb8a6..fa79c148da 100644
--- a/lib/circbuf.c
+++ b/lib/circbuf.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <circbuf.h>
diff --git a/lib/crypto/asymmetric_type.c b/lib/crypto/asymmetric_type.c
index 7aa55092ac..1d0532d0f2 100644
--- a/lib/crypto/asymmetric_type.c
+++ b/lib/crypto/asymmetric_type.c
@@ -7,12 +7,14 @@
  * Written by David Howells (dhowells@redhat.com)
  */
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <keys/asymmetric-subtype.h>
 #include <keys/asymmetric-parser.h>
 #endif
 #include <crypto/public_key.h>
 #ifdef __UBOOT__
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/ctype.h>
 #include <linux/err.h>
diff --git a/lib/crypto/pkcs7_parser.c b/lib/crypto/pkcs7_parser.c
index f5dda1179f..0b85fe8286 100644
--- a/lib/crypto/pkcs7_parser.c
+++ b/lib/crypto/pkcs7_parser.c
@@ -7,6 +7,7 @@
 
 #define pr_fmt(fmt) "PKCS7: "fmt
 #ifdef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/bitops.h>
 #include <linux/compat.h>
@@ -20,7 +21,11 @@
 #include <linux/err.h>
 #include <linux/oid_registry.h>
 #include <crypto/public_key.h>
+#ifdef __UBOOT__
+#include <crypto/pkcs7_parser.h>
+#else
 #include "pkcs7_parser.h"
+#endif
 #include "pkcs7.asn1.h"
 
 MODULE_DESCRIPTION("PKCS#7 parser");
diff --git a/lib/crypto/public_key.c b/lib/crypto/public_key.c
index 8b4821767a..e12ebbb3d0 100644
--- a/lib/crypto/public_key.c
+++ b/lib/crypto/public_key.c
@@ -10,6 +10,7 @@
 #define pr_fmt(fmt) "PKEY: "fmt
 #ifdef __UBOOT__
 #include <dm/devres.h>
+#include <linux/bug.h>
 #include <linux/compat.h>
 #include <linux/err.h>
 #else
diff --git a/lib/crypto/x509_cert_parser.c b/lib/crypto/x509_cert_parser.c
index 4e41cffd23..5f984b9dfd 100644
--- a/lib/crypto/x509_cert_parser.c
+++ b/lib/crypto/x509_cert_parser.c
@@ -6,6 +6,7 @@
  */
 
 #define pr_fmt(fmt) "X.509: "fmt
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/kernel.h>
 #ifndef __UBOOT__
@@ -18,7 +19,11 @@
 #include <linux/string.h>
 #endif
 #include <crypto/public_key.h>
+#ifdef __UBOOT__
+#include <crypto/x509_parser.h>
+#else
 #include "x509_parser.h"
+#endif
 #include "x509.asn1.h"
 #include "x509_akid.asn1.h"
 
diff --git a/lib/crypto/x509_public_key.c b/lib/crypto/x509_public_key.c
index 676c0df174..571af9a0ad 100644
--- a/lib/crypto/x509_public_key.c
+++ b/lib/crypto/x509_public_key.c
@@ -16,15 +16,17 @@
 #include <linux/module.h>
 #endif
 #include <linux/kernel.h>
-#ifndef __UBOOT__
+#ifdef __UBOOT__
+#include <crypto/x509_parser.h>
+#else
 #include <linux/slab.h>
 #include <keys/asymmetric-subtype.h>
 #include <keys/asymmetric-parser.h>
 #include <keys/system_keyring.h>
 #include <crypto/hash.h>
 #include "asymmetric_keys.h"
-#endif
 #include "x509_parser.h"
+#endif
 
 /*
  * Set up the signature parameters in an X.509 certificate.  This involves
diff --git a/lib/dhry/cmd_dhry.c b/lib/dhry/cmd_dhry.c
index 29504833ef..d55ab54df9 100644
--- a/lib/dhry/cmd_dhry.c
+++ b/lib/dhry/cmd_dhry.c
@@ -8,7 +8,8 @@
 #include <div64.h>
 #include "dhry.h"
 
-static int do_dhry(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_dhry(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	ulong start, duration, vax_mips;
 	u64 dhry_per_sec;
diff --git a/lib/div64.c b/lib/div64.c
index 62933c92c4..779d7521f6 100644
--- a/lib/div64.c
+++ b/lib/div64.c
@@ -17,6 +17,7 @@
  * or by defining a preprocessor macro in arch/include/asm/div64.h.
  */
 
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <linux/kernel.h>
 #include <linux/math64.h>
diff --git a/lib/efi/efi_app.c b/lib/efi/efi_app.c
index 7c64077d42..b7e19c3475 100644
--- a/lib/efi/efi_app.c
+++ b/lib/efi/efi_app.c
@@ -13,6 +13,7 @@
 #include <debug_uart.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <malloc.h>
 #include <linux/err.h>
 #include <linux/types.h>
diff --git a/lib/efi_driver/efi_block_device.c b/lib/efi_driver/efi_block_device.c
index 33e66fcad2..e7d8745ad8 100644
--- a/lib/efi_driver/efi_block_device.c
+++ b/lib/efi_driver/efi_block_device.c
@@ -28,6 +28,8 @@
  * iPXE uses the simple file protocol to load Grub or the Linux Kernel.
  */
 
+#include <common.h>
+#include <blk.h>
 #include <efi_driver.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
diff --git a/lib/efi_driver/efi_uclass.c b/lib/efi_driver/efi_uclass.c
index f8badadf66..04e4e45734 100644
--- a/lib/efi_driver/efi_uclass.c
+++ b/lib/efi_driver/efi_uclass.c
@@ -18,6 +18,7 @@
  */
 
 #include <efi_driver.h>
+#include <log.h>
 #include <malloc.h>
 
 /**
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 1cfa24ffcf..aad37b7155 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -164,4 +164,13 @@ config EFI_SECURE_BOOT
 	  it is signed with a trusted key. To do that, you need to install,
 	  at least, PK, KEK and db.
 
+config EFI_MM_COMM_TEE
+	bool "UEFI variables storage service via OP-TEE"
+	depends on OPTEE
+	default n
+	help
+	  If OP-TEE is present and running StandAloneMM, dispatch all UEFI variable
+	  related operations to that. The application will verify, authenticate and
+	  store the variables on an RPMB.
+
 endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index eff3c25ec3..57c7e66ea0 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -17,6 +17,7 @@ CFLAGS_REMOVE_helloworld.o := $(CFLAGS_NON_EFI)
 
 ifneq ($(CONFIG_CMD_BOOTEFI_HELLO_COMPILE),)
 always += helloworld.efi
+targets += helloworld.o
 endif
 
 obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
@@ -34,7 +35,11 @@ obj-y += efi_root_node.o
 obj-y += efi_runtime.o
 obj-y += efi_setup.o
 obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += efi_unicode_collation.o
+ifeq ($(CONFIG_EFI_MM_COMM_TEE),y)
+obj-y += efi_variable_tee.o
+else
 obj-y += efi_variable.o
+endif
 obj-y += efi_watchdog.o
 obj-$(CONFIG_LCD) += efi_gop.o
 obj-$(CONFIG_DM_VIDEO) += efi_gop.o
diff --git a/lib/efi_loader/efi_acpi.c b/lib/efi_loader/efi_acpi.c
index 9ae9c25c51..585b2d2b63 100644
--- a/lib/efi_loader/efi_acpi.c
+++ b/lib/efi_loader/efi_acpi.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <efi_loader.h>
+#include <log.h>
 #include <acpi/acpi_table.h>
 
 static const efi_guid_t acpi_guid = EFI_ACPI_TABLE_GUID;
diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
index 2ea21448f0..e144b3e7f4 100644
--- a/lib/efi_loader/efi_bootmgr.c
+++ b/lib/efi_loader/efi_bootmgr.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <charset.h>
+#include <log.h>
 #include <malloc.h>
 #include <efi_loader.h>
 #include <asm/unaligned.h>
@@ -35,24 +36,50 @@ static const struct efi_runtime_services *rs;
  *
  * @lo:		pointer to target
  * @data:	serialized data
+ * @size:	size of the load option, on return size of the optional data
+ * Return:	status code
  */
-void efi_deserialize_load_option(struct efi_load_option *lo, u8 *data)
+efi_status_t efi_deserialize_load_option(struct efi_load_option *lo, u8 *data,
+					 efi_uintn_t *size)
 {
+	efi_uintn_t len;
+
+	len = sizeof(u32);
+	if (*size < len + 2 * sizeof(u16))
+		return EFI_INVALID_PARAMETER;
 	lo->attributes = get_unaligned_le32(data);
-	data += sizeof(u32);
+	data += len;
+	*size -= len;
 
+	len = sizeof(u16);
 	lo->file_path_length = get_unaligned_le16(data);
-	data += sizeof(u16);
+	data += len;
+	*size -= len;
 
-	/* FIXME */
 	lo->label = (u16 *)data;
-	data += (u16_strlen(lo->label) + 1) * sizeof(u16);
-
-	/* FIXME */
+	len = u16_strnlen(lo->label, *size / sizeof(u16) - 1);
+	if (lo->label[len])
+		return EFI_INVALID_PARAMETER;
+	len = (len + 1) * sizeof(u16);
+	if (*size < len)
+		return EFI_INVALID_PARAMETER;
+	data += len;
+	*size -= len;
+
+	len = lo->file_path_length;
+	if (*size < len)
+		return EFI_INVALID_PARAMETER;
 	lo->file_path = (struct efi_device_path *)data;
-	data += lo->file_path_length;
+	 /*
+	  * TODO: validate device path. There should be an end node within
+	  * the indicated file_path_length.
+	  */
+	data += len;
+	*size -= len;
 
 	lo->optional_data = data;
+
+	return EFI_SUCCESS;
 }
 
 /**
@@ -167,7 +194,11 @@ static efi_status_t try_load_entry(u16 n, efi_handle_t *handle)
 	if (!load_option)
 		return EFI_LOAD_ERROR;
 
-	efi_deserialize_load_option(&lo, load_option);
+	ret = efi_deserialize_load_option(&lo, load_option, &size);
+	if (ret != EFI_SUCCESS) {
+		log_warning("Invalid load option for %ls\n", varname);
+		goto error;
+	}
 
 	if (lo.attributes & LOAD_OPTION_ACTIVE) {
 		u32 attributes;
diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
index a3f11eaf62..1591ad8300 100644
--- a/lib/efi_loader/efi_boottime.c
+++ b/lib/efi_loader/efi_boottime.c
@@ -9,6 +9,7 @@
 #include <div64.h>
 #include <efi_loader.h>
 #include <irq_func.h>
+#include <log.h>
 #include <malloc.h>
 #include <time.h>
 #include <linux/libfdt_env.h>
@@ -48,7 +49,7 @@ static efi_handle_t current_image;
  * restriction so we need to manually swap its and our view of that register on
  * EFI callback entry/exit.
  */
-static volatile void *efi_gd, *app_gd;
+static volatile gd_t *efi_gd, *app_gd;
 #endif
 
 /* 1 if inside U-Boot code, 0 if inside EFI payload code */
@@ -88,7 +89,7 @@ int __efi_entry_check(void)
 #ifdef CONFIG_ARM
 	assert(efi_gd);
 	app_gd = gd;
-	gd = efi_gd;
+	set_gd(efi_gd);
 #endif
 	return ret;
 }
@@ -98,7 +99,7 @@ int __efi_exit_check(void)
 {
 	int ret = --entry_count == 0;
 #ifdef CONFIG_ARM
-	gd = app_gd;
+	set_gd(app_gd);
 #endif
 	return ret;
 }
@@ -122,7 +123,7 @@ void efi_restore_gd(void)
 	/* Only restore if we're already in EFI context */
 	if (!efi_gd)
 		return;
-	gd = efi_gd;
+	set_gd(efi_gd);
 #endif
 }
 
@@ -2919,7 +2920,7 @@ efi_status_t EFIAPI efi_start_image(efi_handle_t image_handle,
 		 * otherwise __efi_entry_check() will put the wrong value into
 		 * app_gd.
 		 */
-		gd = app_gd;
+		set_gd(app_gd);
 #endif
 		/*
 		 * To get ready to call EFI_EXIT below we have to execute the
diff --git a/lib/efi_loader/efi_device_path.c b/lib/efi_loader/efi_device_path.c
index 73f1fe75a8..7ae14f3423 100644
--- a/lib/efi_loader/efi_device_path.c
+++ b/lib/efi_loader/efi_device_path.c
@@ -8,6 +8,8 @@
 #include <common.h>
 #include <blk.h>
 #include <dm.h>
+#include <log.h>
+#include <net.h>
 #include <usb.h>
 #include <mmc.h>
 #include <nvme.h>
@@ -20,6 +22,9 @@
 #ifdef CONFIG_SANDBOX
 const efi_guid_t efi_guid_host_dev = U_BOOT_HOST_DEV_GUID;
 #endif
+#ifdef CONFIG_VIRTIO_BLK
+const efi_guid_t efi_guid_virtio_dev = U_BOOT_VIRTIO_DEV_GUID;
+#endif
 
 /* template END node: */
 static const struct efi_device_path END = {
@@ -453,6 +458,11 @@ __maybe_unused static unsigned int dp_size(struct udevice *dev)
 			return dp_size(dev->parent) +
 				sizeof(struct efi_device_path_sd_mmc_path);
 #endif
+#if defined(CONFIG_AHCI) || defined(CONFIG_SATA)
+		case UCLASS_AHCI:
+			return dp_size(dev->parent) +
+				sizeof(struct efi_device_path_sata);
+#endif
 #if defined(CONFIG_NVME)
 		case UCLASS_NVME:
 			return dp_size(dev->parent) +
@@ -468,6 +478,16 @@ __maybe_unused static unsigned int dp_size(struct udevice *dev)
 			return dp_size(dev->parent)
 				+ sizeof(struct efi_device_path_vendor) + 1;
 #endif
+#ifdef CONFIG_VIRTIO_BLK
+		case UCLASS_VIRTIO:
+			 /*
+			  * Virtio devices will be represented as a vendor
+			  * device node with an extra byte for the device
+			  * number.
+			  */
+			return dp_size(dev->parent)
+				+ sizeof(struct efi_device_path_vendor) + 1;
+#endif
 		default:
 			return dp_size(dev->parent);
 		}
@@ -530,7 +550,7 @@ __maybe_unused static void *dp_fill(void *buf, struct udevice *dev)
 #ifdef CONFIG_SANDBOX
 		case UCLASS_ROOT: {
 			/* stop traversing parents at this point: */
-			struct efi_device_path_vendor *dp = buf;
+			struct efi_device_path_vendor *dp;
 			struct blk_desc *desc = dev_get_uclass_platdata(dev);
 
 			dp_fill(buf, dev->parent);
@@ -545,6 +565,23 @@ __maybe_unused static void *dp_fill(void *buf, struct udevice *dev)
 			return &dp->vendor_data[1];
 			}
 #endif
+#ifdef CONFIG_VIRTIO_BLK
+		case UCLASS_VIRTIO: {
+			struct efi_device_path_vendor *dp;
+			struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+			dp_fill(buf, dev->parent);
+			dp = buf;
+			++dp;
+			dp->dp.type = DEVICE_PATH_TYPE_HARDWARE_DEVICE;
+			dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_VENDOR;
+			dp->dp.length = sizeof(*dp) + 1;
+			memcpy(&dp->guid, &efi_guid_virtio_dev,
+			       sizeof(efi_guid_t));
+			dp->vendor_data[0] = desc->devnum;
+			return &dp->vendor_data[1];
+			}
+#endif
 #ifdef CONFIG_IDE
 		case UCLASS_IDE: {
 			struct efi_device_path_atapi *dp =
@@ -591,6 +628,22 @@ __maybe_unused static void *dp_fill(void *buf, struct udevice *dev)
 			return &sddp[1];
 			}
 #endif
+#if defined(CONFIG_AHCI) || defined(CONFIG_SATA)
+		case UCLASS_AHCI: {
+			struct efi_device_path_sata *dp =
+				dp_fill(buf, dev->parent);
+			struct blk_desc *desc = dev_get_uclass_platdata(dev);
+
+			dp->dp.type     = DEVICE_PATH_TYPE_MESSAGING_DEVICE;
+			dp->dp.sub_type = DEVICE_PATH_SUB_TYPE_MSG_SATA;
+			dp->dp.length   = sizeof(*dp);
+			dp->hba_port = desc->devnum;
+			/* default 0xffff implies no port multiplier */
+			dp->port_multiplier_port = 0xffff;
+			dp->logical_unit_number = desc->lun;
+			return &dp[1];
+			}
+#endif
 #if defined(CONFIG_NVME)
 		case UCLASS_NVME: {
 			struct efi_device_path_nvme *dp =
@@ -693,7 +746,7 @@ static unsigned dp_part_size(struct blk_desc *desc, int part)
  */
 static void *dp_part_node(void *buf, struct blk_desc *desc, int part)
 {
-	disk_partition_t info;
+	struct disk_partition info;
 
 	part_get_info(desc, part, &info);
 
@@ -1035,7 +1088,7 @@ efi_status_t efi_dp_from_name(const char *dev, const char *devnr,
 {
 	int is_net;
 	struct blk_desc *desc = NULL;
-	disk_partition_t fs_partition;
+	struct disk_partition fs_partition;
 	int part = 0;
 	char filename[32] = { 0 }; /* dp->str is u16[32] long */
 	char *s;
diff --git a/lib/efi_loader/efi_device_path_to_text.c b/lib/efi_loader/efi_device_path_to_text.c
index af1adbb71e..5ae4833fa7 100644
--- a/lib/efi_loader/efi_device_path_to_text.c
+++ b/lib/efi_loader/efi_device_path_to_text.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <efi_loader.h>
 
 #define MAC_OUTPUT_LEN 22
@@ -148,6 +149,16 @@ static char *dp_msging(char *s, struct efi_device_path *dp)
 
 		break;
 	}
+	case DEVICE_PATH_SUB_TYPE_MSG_SATA: {
+		struct efi_device_path_sata *sdp =
+			(struct efi_device_path_sata *) dp;
+
+		s += sprintf(s, "Sata(0x%x,0x%x,0x%x)",
+			     sdp->hba_port,
+			     sdp->port_multiplier_port,
+			     sdp->logical_unit_number);
+		break;
+	}
 	case DEVICE_PATH_SUB_TYPE_MSG_NVME: {
 		struct efi_device_path_nvme *ndp =
 			(struct efi_device_path_nvme *)dp;
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index fd8fe17567..670bf2b8ef 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -13,6 +13,8 @@
 #include <part.h>
 #include <malloc.h>
 
+struct efi_system_partition efi_system_partition;
+
 const efi_guid_t efi_block_io_guid = EFI_BLOCK_IO_PROTOCOL_GUID;
 
 /**
@@ -354,6 +356,7 @@ static efi_status_t efi_disk_add_dev(
 				struct efi_disk_obj **disk)
 {
 	struct efi_disk_obj *diskobj;
+	struct efi_object *handle;
 	efi_status_t ret;
 
 	/* Don't add empty devices */
@@ -377,15 +380,25 @@ static efi_status_t efi_disk_add_dev(
 		diskobj->dp = efi_dp_from_part(desc, part);
 	}
 	diskobj->part = part;
-	ret = efi_add_protocol(&diskobj->header, &efi_block_io_guid,
-			       &diskobj->ops);
-	if (ret != EFI_SUCCESS)
-		return ret;
-	ret = efi_add_protocol(&diskobj->header, &efi_guid_device_path,
-			       diskobj->dp);
+
+	/*
+	 * Install the device path and the block IO protocol.
+	 *
+	 * InstallMultipleProtocolInterfaces() checks if the device path is
+	 * already installed on an other handle and returns EFI_ALREADY_STARTED
+	 * in this case.
+	 */
+	handle = &diskobj->header;
+	ret = EFI_CALL(efi_install_multiple_protocol_interfaces(
+			&handle, &efi_guid_device_path, diskobj->dp,
+			&efi_block_io_guid, &diskobj->ops, NULL));
 	if (ret != EFI_SUCCESS)
 		return ret;
-	/* partitions or whole disk without partitions */
+
+	/*
+	 * On partitions or whole disks without partitions install the
+	 * simple file system protocol if a file system is available.
+	 */
 	if ((part || desc->part_type == PART_TYPE_UNKNOWN) &&
 	    efi_fs_exists(desc, part)) {
 		diskobj->volume = efi_simple_file_system(desc, part,
@@ -418,6 +431,24 @@ static efi_status_t efi_disk_add_dev(
 	diskobj->ops.media = &diskobj->media;
 	if (disk)
 		*disk = diskobj;
+
+	/* Store first EFI system partition */
+	if (part && !efi_system_partition.if_type) {
+		int r;
+		struct disk_partition info;
+
+		r = part_get_info(desc, part, &info);
+		if (r)
+			return EFI_DEVICE_ERROR;
+		if (info.bootable & PART_EFI_SYSTEM_PARTITION) {
+			efi_system_partition.if_type = desc->if_type;
+			efi_system_partition.devnum = desc->devnum;
+			efi_system_partition.part = part;
+			EFI_PRINT("EFI system partition: %s %d:%d\n",
+				  blk_get_if_type_name(desc->if_type),
+				  desc->devnum, part);
+		}
+	}
 	return EFI_SUCCESS;
 }
 
@@ -439,7 +470,7 @@ int efi_disk_create_partitions(efi_handle_t parent, struct blk_desc *desc,
 {
 	int disks = 0;
 	char devname[32] = { 0 }; /* dp->str is u16[32] long */
-	disk_partition_t info;
+	struct disk_partition info;
 	int part;
 	struct efi_device_path *dp = NULL;
 	efi_status_t ret;
@@ -568,3 +599,32 @@ efi_status_t efi_disk_register(void)
 
 	return EFI_SUCCESS;
 }
+
+/**
+ * efi_disk_is_system_part() - check if handle refers to an EFI system partition
+ *
+ * @handle:	handle of partition
+ *
+ * Return:	true if handle refers to an EFI system partition
+ */
+bool efi_disk_is_system_part(efi_handle_t handle)
+{
+	struct efi_handler *handler;
+	struct efi_disk_obj *diskobj;
+	struct disk_partition info;
+	efi_status_t ret;
+	int r;
+
+	/* check if this is a block device */
+	ret = efi_search_protocol(handle, &efi_block_io_guid, &handler);
+	if (ret != EFI_SUCCESS)
+		return false;
+
+	diskobj = container_of(handle, struct efi_disk_obj, header);
+
+	r = part_get_info(diskobj->desc, diskobj->part, &info);
+	if (r)
+		return false;
+
+	return !!(info.bootable & PART_EFI_SYSTEM_PARTITION);
+}
diff --git a/lib/efi_loader/efi_file.c b/lib/efi_loader/efi_file.c
index 140116ddc4..19afa69f53 100644
--- a/lib/efi_loader/efi_file.c
+++ b/lib/efi_loader/efi_file.c
@@ -8,9 +8,11 @@
 #include <common.h>
 #include <charset.h>
 #include <efi_loader.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <fs.h>
+#include <part.h>
 
 /* GUID for file system information */
 const efi_guid_t efi_file_system_info_guid = EFI_FILE_SYSTEM_INFO_GUID;
@@ -634,7 +636,7 @@ static efi_status_t EFIAPI efi_file_getinfo(struct efi_file_handle *file,
 		utf8_utf16_strcpy(&dst, filename);
 	} else if (!guidcmp(info_type, &efi_file_system_info_guid)) {
 		struct efi_file_system_info *info = buffer;
-		disk_partition_t part;
+		struct disk_partition part;
 		efi_uintn_t required_size;
 		int r;
 
diff --git a/lib/efi_loader/efi_gop.c b/lib/efi_loader/efi_gop.c
index 1511e3bdb4..53f6d970f7 100644
--- a/lib/efi_loader/efi_gop.c
+++ b/lib/efi_loader/efi_gop.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <efi_loader.h>
 #include <lcd.h>
+#include <log.h>
 #include <malloc.h>
 #include <video.h>
 
diff --git a/lib/efi_loader/efi_image_loader.c b/lib/efi_loader/efi_image_loader.c
index 6c270ce94f..478aaf50d3 100644
--- a/lib/efi_loader/efi_image_loader.c
+++ b/lib/efi_loader/efi_image_loader.c
@@ -13,7 +13,8 @@
 #include <malloc.h>
 #include <pe.h>
 #include <sort.h>
-#include "../lib/crypto/pkcs7_parser.h"
+#include <crypto/pkcs7_parser.h>
+#include <linux/err.h>
 
 const efi_guid_t efi_global_variable_guid = EFI_GLOBAL_VARIABLE_GUID;
 const efi_guid_t efi_guid_device_path = EFI_DEVICE_PATH_PROTOCOL_GUID;
@@ -211,14 +212,16 @@ static void efi_set_code_and_data_type(
 
 #ifdef CONFIG_EFI_SECURE_BOOT
 /**
- * cmp_pe_section - compare two sections
- * @arg1:	Pointer to pointer to first section
- * @arg2:	Pointer to pointer to second section
+ * cmp_pe_section() - compare virtual addresses of two PE image sections
+ * @arg1:	pointer to pointer to first section header
+ * @arg2:	pointer to pointer to second section header
  *
- * Compare two sections in PE image.
+ * Compare the virtual addresses of two sections of an portable executable.
+ * The arguments are defined as const void * to allow usage with qsort().
  *
- * Return:	-1, 0, 1 respectively if arg1 < arg2, arg1 == arg2 or
- *		arg1 > arg2
+ * Return:	-1 if the virtual address of arg1 is less than that of arg2,
+ *		0 if the virtual addresses are equal, 1 if the virtual address
+ *		of arg1 is greater than that of arg2.
  */
 static int cmp_pe_section(const void *arg1, const void *arg2)
 {
@@ -236,7 +239,7 @@ static int cmp_pe_section(const void *arg1, const void *arg2)
 }
 
 /**
- * efi_image_parse - parse a PE image
+ * efi_image_parse() - parse a PE image
  * @efi:	Pointer to image
  * @len:	Size of @efi
  * @regp:	Pointer to a list of regions
@@ -292,12 +295,12 @@ bool efi_image_parse(void *efi, size_t len, struct efi_image_regions **regp,
 		efi_image_region_add(regs, efi, &opt->CheckSum, 0);
 		if (nt64->OptionalHeader.NumberOfRvaAndSizes <= ctidx) {
 			efi_image_region_add(regs,
-					     &opt->CheckSum + 1,
+					     &opt->Subsystem,
 					     efi + opt->SizeOfHeaders, 0);
 		} else {
 			/* Skip Certificates Table */
 			efi_image_region_add(regs,
-					     &opt->CheckSum + 1,
+					     &opt->Subsystem,
 					     &opt->DataDirectory[ctidx], 0);
 			efi_image_region_add(regs,
 					     &opt->DataDirectory[ctidx] + 1,
@@ -312,7 +315,7 @@ bool efi_image_parse(void *efi, size_t len, struct efi_image_regions **regp,
 		IMAGE_OPTIONAL_HEADER32 *opt = &nt->OptionalHeader;
 
 		efi_image_region_add(regs, efi, &opt->CheckSum, 0);
-		efi_image_region_add(regs, &opt->CheckSum + 1,
+		efi_image_region_add(regs, &opt->Subsystem,
 				     &opt->DataDirectory[ctidx], 0);
 		efi_image_region_add(regs, &opt->DataDirectory[ctidx] + 1,
 				     efi + opt->SizeOfHeaders, 0);
@@ -403,7 +406,7 @@ err:
 }
 
 /**
- * efi_image_unsigned_authenticate - authenticate unsigned image with
+ * efi_image_unsigned_authenticate() - authenticate unsigned image with
  * SHA256 hash
  * @regs:	List of regions to be verified
  *
@@ -450,7 +453,7 @@ out:
 }
 
 /**
- * efi_image_authenticate - verify a signature of signed image
+ * efi_image_authenticate() - verify a signature of signed image
  * @efi:	Pointer to image
  * @efi_size:	Size of @efi
  *
@@ -538,8 +541,9 @@ static bool efi_image_authenticate(void *efi, size_t efi_size)
 		}
 		msg = pkcs7_parse_message((void *)wincert + sizeof(*wincert),
 					  wincert->dwLength - sizeof(*wincert));
-		if (!msg) {
+		if (IS_ERR(msg)) {
 			debug("Parsing image's signature failed\n");
+			msg = NULL;
 			goto err;
 		}
 
@@ -633,21 +637,18 @@ efi_status_t efi_load_pe(struct efi_loaded_image_obj *handle,
 		goto err;
 	}
 
-	/* assume sizeof(IMAGE_NT_HEADERS32) <= sizeof(IMAGE_NT_HEADERS64) */
-	if (efi_size < dos->e_lfanew + sizeof(IMAGE_NT_HEADERS32)) {
+	/*
+	 * Check if the image section header fits into the file. Knowing that at
+	 * least one section header follows we only need to check for the length
+	 * of the 64bit header which is longer than the 32bit header.
+	 */
+	if (efi_size < dos->e_lfanew + sizeof(IMAGE_NT_HEADERS64)) {
 		printf("%s: Invalid offset for Extended Header\n", __func__);
 		ret = EFI_LOAD_ERROR;
 		goto err;
 	}
 
 	nt = (void *) ((char *)efi + dos->e_lfanew);
-	if ((nt->OptionalHeader.Magic == IMAGE_NT_OPTIONAL_HDR64_MAGIC) &&
-	    (efi_size < dos->e_lfanew + sizeof(IMAGE_NT_HEADERS64))) {
-		printf("%s: Invalid offset for Extended Header\n", __func__);
-		ret = EFI_LOAD_ERROR;
-		goto err;
-	}
-
 	if (nt->Signature != IMAGE_NT_SIGNATURE) {
 		printf("%s: Invalid NT Signature\n", __func__);
 		ret = EFI_LOAD_ERROR;
diff --git a/lib/efi_loader/efi_memory.c b/lib/efi_loader/efi_memory.c
index 97d90f069a..44b8a2e09f 100644
--- a/lib/efi_loader/efi_memory.c
+++ b/lib/efi_loader/efi_memory.c
@@ -11,6 +11,7 @@
 #include <malloc.h>
 #include <mapmem.h>
 #include <watchdog.h>
+#include <asm/cache.h>
 #include <linux/list_sort.h>
 #include <linux/sizes.h>
 
@@ -229,7 +230,7 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map,
 }
 
 /**
- * efi_add_memory_map() - add memory area to the memory map
+ * efi_add_memory_map_pg() - add pages to the memory map
  *
  * @start:		start address, must be a multiple of EFI_PAGE_SIZE
  * @pages:		number of pages to add
@@ -237,8 +238,9 @@ static s64 efi_mem_carve_out(struct efi_mem_list *map,
  * @overlap_only_ram:	the memory area must overlap existing
  * Return:		status code
  */
-efi_status_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,
-				bool overlap_only_ram)
+static efi_status_t efi_add_memory_map_pg(u64 start, u64 pages,
+					  int memory_type,
+					  bool overlap_only_ram)
 {
 	struct list_head *lhandle;
 	struct efi_mem_list *newlist;
@@ -344,6 +346,28 @@ efi_status_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type,
 }
 
 /**
+ * efi_add_memory_map() - add memory area to the memory map
+ *
+ * @start:		start address of the memory area
+ * @size:		length in bytes of the memory area
+ * @memory_type:	type of memory added
+ *
+ * Return:		status code
+ *
+ * This function automatically aligns the start and size of the memory area
+ * to EFI_PAGE_SIZE.
+ */
+efi_status_t efi_add_memory_map(u64 start, u64 size, int memory_type)
+{
+	u64 pages;
+
+	pages = efi_size_in_pages(size + (start & EFI_PAGE_MASK));
+	start &= ~EFI_PAGE_MASK;
+
+	return efi_add_memory_map_pg(start, pages, memory_type, false);
+}
+
+/**
  * efi_check_allocated() - validate address to be freed
  *
  * Check that the address is within allocated memory:
@@ -469,7 +493,8 @@ efi_status_t efi_allocate_pages(int type, int memory_type,
 	}
 
 	/* Reserve that map in our memory maps */
-	if (efi_add_memory_map(addr, pages, memory_type, true) != EFI_SUCCESS)
+	ret = efi_add_memory_map_pg(addr, pages, memory_type, true);
+	if (ret != EFI_SUCCESS)
 		/* Map would overlap, bail out */
 		return  EFI_OUT_OF_RESOURCES;
 
@@ -514,7 +539,8 @@ efi_status_t efi_free_pages(uint64_t memory, efi_uintn_t pages)
 		return EFI_INVALID_PARAMETER;
 	}
 
-	ret = efi_add_memory_map(memory, pages, EFI_CONVENTIONAL_MEMORY, false);
+	ret = efi_add_memory_map_pg(memory, pages, EFI_CONVENTIONAL_MEMORY,
+				    false);
 	/* Merging of adjacent free regions is missing */
 
 	if (ret != EFI_SUCCESS)
@@ -680,8 +706,8 @@ efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end,
 
 	pages = (ram_end - ram_start) >> EFI_PAGE_SHIFT;
 
-	efi_add_memory_map(ram_start, pages,
-			   EFI_CONVENTIONAL_MEMORY, false);
+	efi_add_memory_map_pg(ram_start, pages,
+			      EFI_CONVENTIONAL_MEMORY, false);
 
 	/*
 	 * Boards may indicate to the U-Boot memory core that they
@@ -691,14 +717,14 @@ efi_status_t efi_add_conventional_memory_map(u64 ram_start, u64 ram_end,
 	 */
 	if (ram_top < ram_start) {
 		/* ram_top is before this region, reserve all */
-		efi_add_memory_map(ram_start, pages,
-				   EFI_BOOT_SERVICES_DATA, true);
+		efi_add_memory_map_pg(ram_start, pages,
+				      EFI_BOOT_SERVICES_DATA, true);
 	} else if ((ram_top >= ram_start) && (ram_top < ram_end)) {
 		/* ram_top is inside this region, reserve parts */
 		pages = (ram_end - ram_top) >> EFI_PAGE_SHIFT;
 
-		efi_add_memory_map(ram_top, pages,
-				   EFI_BOOT_SERVICES_DATA, true);
+		efi_add_memory_map_pg(ram_top, pages,
+				      EFI_BOOT_SERVICES_DATA, true);
 	}
 
 	return EFI_SUCCESS;
@@ -743,7 +769,8 @@ static void add_u_boot_and_runtime(void)
 		       uboot_stack_size) & ~EFI_PAGE_MASK;
 	uboot_pages = ((uintptr_t)map_sysmem(gd->ram_top - 1, 0) -
 		       uboot_start + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT;
-	efi_add_memory_map(uboot_start, uboot_pages, EFI_LOADER_DATA, false);
+	efi_add_memory_map_pg(uboot_start, uboot_pages, EFI_LOADER_DATA,
+			      false);
 
 #if defined(__aarch64__)
 	/*
@@ -762,8 +789,8 @@ static void add_u_boot_and_runtime(void)
 	runtime_end = (ulong)&__efi_runtime_stop;
 	runtime_end = (runtime_end + runtime_mask) & ~runtime_mask;
 	runtime_pages = (runtime_end - runtime_start) >> EFI_PAGE_SHIFT;
-	efi_add_memory_map(runtime_start, runtime_pages,
-			   EFI_RUNTIME_SERVICES_CODE, false);
+	efi_add_memory_map_pg(runtime_start, runtime_pages,
+			      EFI_RUNTIME_SERVICES_CODE, false);
 }
 
 int efi_memory_init(void)
diff --git a/lib/efi_loader/efi_net.c b/lib/efi_loader/efi_net.c
index 82d2595847..22f0123eca 100644
--- a/lib/efi_loader/efi_net.c
+++ b/lib/efi_loader/efi_net.c
@@ -18,6 +18,7 @@
 #include <common.h>
 #include <efi_loader.h>
 #include <malloc.h>
+#include <net.h>
 
 static const efi_guid_t efi_net_guid = EFI_SIMPLE_NETWORK_PROTOCOL_GUID;
 static const efi_guid_t efi_pxe_base_code_protocol_guid =
diff --git a/lib/efi_loader/efi_rng.c b/lib/efi_loader/efi_rng.c
index a1d0ec842c..caef4085b0 100644
--- a/lib/efi_loader/efi_rng.c
+++ b/lib/efi_loader/efi_rng.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <efi_loader.h>
 #include <efi_rng.h>
+#include <log.h>
 #include <rng.h>
 
 DECLARE_GLOBAL_DATA_PTR;
diff --git a/lib/efi_loader/efi_runtime.c b/lib/efi_loader/efi_runtime.c
index 6a25acbbcd..c0bd99b867 100644
--- a/lib/efi_loader/efi_runtime.c
+++ b/lib/efi_loader/efi_runtime.c
@@ -11,6 +11,7 @@
 #include <dm.h>
 #include <elf.h>
 #include <efi_loader.h>
+#include <log.h>
 #include <malloc.h>
 #include <rtc.h>
 #include <u-boot/crc.h>
@@ -784,11 +785,10 @@ out:
 efi_status_t efi_add_runtime_mmio(void *mmio_ptr, u64 len)
 {
 	struct efi_runtime_mmio_list *newmmio;
-	u64 pages = (len + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT;
 	uint64_t addr = *(uintptr_t *)mmio_ptr;
 	efi_status_t ret;
 
-	ret = efi_add_memory_map(addr, pages, EFI_MMAP_IO, false);
+	ret = efi_add_memory_map(addr, len, EFI_MMAP_IO);
 	if (ret != EFI_SUCCESS)
 		return EFI_OUT_OF_RESOURCES;
 
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 1b648c8467..dd0c53fc23 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -86,7 +86,7 @@ out:
 /**
  * efi_init_secure_boot - initialize secure boot state
  *
- * Return:	EFI_SUCCESS on success, status code (negative) on error
+ * Return:	status code
  */
 static efi_status_t efi_init_secure_boot(void)
 {
@@ -135,6 +135,16 @@ efi_status_t efi_init_obj_list(void)
 	/* On ARM switch from EL3 or secure mode to EL2 or non-secure mode */
 	switch_to_non_secure_mode();
 
+	/* Initialize root node */
+	ret = efi_root_node_register();
+	if (ret != EFI_SUCCESS)
+		goto out;
+
+#ifdef CONFIG_PARTITIONS
+	ret = efi_disk_register();
+	if (ret != EFI_SUCCESS)
+		goto out;
+#endif
 	/* Initialize variable services */
 	ret = efi_init_variables();
 	if (ret != EFI_SUCCESS)
@@ -170,11 +180,6 @@ efi_status_t efi_init_obj_list(void)
 	if (ret != EFI_SUCCESS)
 		goto out;
 
-	/* Initialize root node */
-	ret = efi_root_node_register();
-	if (ret != EFI_SUCCESS)
-		goto out;
-
 	/* Initialize EFI driver uclass */
 	ret = efi_driver_init();
 	if (ret != EFI_SUCCESS)
@@ -183,11 +188,6 @@ efi_status_t efi_init_obj_list(void)
 	ret = efi_console_register();
 	if (ret != EFI_SUCCESS)
 		goto out;
-#ifdef CONFIG_PARTITIONS
-	ret = efi_disk_register();
-	if (ret != EFI_SUCCESS)
-		goto out;
-#endif
 #if defined(CONFIG_LCD) || defined(CONFIG_DM_VIDEO)
 	ret = efi_gop_register();
 	if (ret != EFI_SUCCESS)
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index 658e3547da..6685253856 100644
--- a/lib/efi_loader/efi_signature.c
+++ b/lib/efi_loader/efi_signature.c
@@ -10,11 +10,11 @@
 #include <image.h>
 #include <hexdump.h>
 #include <malloc.h>
+#include <crypto/pkcs7_parser.h>
 #include <linux/compat.h>
 #include <linux/oid_registry.h>
 #include <u-boot/rsa.h>
 #include <u-boot/sha256.h>
-#include "../lib/crypto/pkcs7_parser.h"
 
 const efi_guid_t efi_guid_image_security_database =
 		EFI_IMAGE_SECURITY_DATABASE_GUID;
@@ -22,6 +22,7 @@ const efi_guid_t efi_guid_sha256 = EFI_CERT_SHA256_GUID;
 const efi_guid_t efi_guid_cert_rsa2048 = EFI_CERT_RSA2048_GUID;
 const efi_guid_t efi_guid_cert_x509 = EFI_CERT_X509_GUID;
 const efi_guid_t efi_guid_cert_x509_sha256 = EFI_CERT_X509_SHA256_GUID;
+const efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID;
 
 #ifdef CONFIG_EFI_SECURE_BOOT
 
@@ -528,7 +529,7 @@ out:
  * pointed to by @regs. If @nocheck is false, overlapping among entries
  * will be checked first.
  *
- * Return:	0 on success, status code (negative) on error
+ * Return:	status code
  */
 efi_status_t efi_image_region_add(struct efi_image_regions *regs,
 				  const void *start, const void *end,
@@ -667,7 +668,7 @@ efi_sigstore_parse_siglist(struct efi_signature_list *esl)
 	esd = (struct efi_signature_data *)
 			((u8 *)esl + sizeof(*esl) + esl->signature_header_size);
 
-	while ((left > 0) && left >= esl->signature_size) {
+	while (left > 0) {
 		/* Signature must exist if there is remaining data. */
 		if (left < esl->signature_size) {
 			debug("Certificate is too small\n");
diff --git a/lib/efi_loader/efi_smbios.c b/lib/efi_loader/efi_smbios.c
index a81488495e..719d3e8880 100644
--- a/lib/efi_loader/efi_smbios.c
+++ b/lib/efi_loader/efi_smbios.c
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <efi_loader.h>
+#include <log.h>
 #include <mapmem.h>
 #include <smbios.h>
 
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index 7df881a74b..e097670e28 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -7,14 +7,17 @@
 
 #include <common.h>
 #include <efi_loader.h>
+#include <env.h>
 #include <env_internal.h>
 #include <hexdump.h>
 #include <malloc.h>
 #include <rtc.h>
 #include <search.h>
+#include <uuid.h>
+#include <crypto/pkcs7_parser.h>
+#include <linux/bitops.h>
 #include <linux/compat.h>
 #include <u-boot/crc.h>
-#include "../lib/crypto/pkcs7_parser.h"
 
 enum efi_secure_mode {
 	EFI_MODE_SETUP,
@@ -23,13 +26,24 @@ enum efi_secure_mode {
 	EFI_MODE_DEPLOYED,
 };
 
-const efi_guid_t efi_guid_cert_type_pkcs7 = EFI_CERT_TYPE_PKCS7_GUID;
 static bool efi_secure_boot;
 static int efi_secure_mode;
 static u8 efi_vendor_keys;
 
 #define READ_ONLY BIT(31)
 
+static efi_status_t efi_get_variable_common(u16 *variable_name,
+					    const efi_guid_t *vendor,
+					    u32 *attributes,
+					    efi_uintn_t *data_size, void *data);
+
+static efi_status_t efi_set_variable_common(u16 *variable_name,
+					    const efi_guid_t *vendor,
+					    u32 attributes,
+					    efi_uintn_t data_size,
+					    const void *data,
+					    bool ro_check);
+
 /*
  * Mapping between EFI variables and u-boot variables:
  *
@@ -169,176 +183,95 @@ static const char *parse_attr(const char *str, u32 *attrp, u64 *timep)
 	return str;
 }
 
-static efi_status_t efi_set_variable_internal(u16 *variable_name,
-					      const efi_guid_t *vendor,
-					      u32 attributes,
-					      efi_uintn_t data_size,
-					      const void *data,
-					      bool ro_check);
+/**
+ * efi_set_secure_state - modify secure boot state variables
+ * @sec_boot:		value of SecureBoot
+ * @setup_mode:		value of SetupMode
+ * @audit_mode:		value of AuditMode
+ * @deployed_mode:	value of DeployedMode
+ *
+ * Modify secure boot stat-related variables as indicated.
+ *
+ * Return:		status code
+ */
+static efi_status_t efi_set_secure_state(int sec_boot, int setup_mode,
+					 int audit_mode, int deployed_mode)
+{
+	u32 attributes;
+	efi_status_t ret;
+
+	attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
+		     EFI_VARIABLE_RUNTIME_ACCESS |
+		     READ_ONLY;
+	ret = efi_set_variable_common(L"SecureBoot", &efi_global_variable_guid,
+				      attributes, sizeof(sec_boot), &sec_boot,
+				      false);
+	if (ret != EFI_SUCCESS)
+		goto err;
+
+	ret = efi_set_variable_common(L"SetupMode", &efi_global_variable_guid,
+				      attributes, sizeof(setup_mode),
+				      &setup_mode, false);
+	if (ret != EFI_SUCCESS)
+		goto err;
+
+	ret = efi_set_variable_common(L"AuditMode", &efi_global_variable_guid,
+				      attributes, sizeof(audit_mode),
+				      &audit_mode, false);
+	if (ret != EFI_SUCCESS)
+		goto err;
+
+	ret = efi_set_variable_common(L"DeployedMode",
+				      &efi_global_variable_guid, attributes,
+				      sizeof(deployed_mode), &deployed_mode,
+				      false);
+err:
+	return ret;
+}
 
 /**
  * efi_transfer_secure_state - handle a secure boot state transition
  * @mode:	new state
  *
  * Depending on @mode, secure boot related variables are updated.
- * Those variables are *read-only* for users, efi_set_variable_internal()
+ * Those variables are *read-only* for users, efi_set_variable_common()
  * is called here.
  *
- * Return:	EFI_SUCCESS on success, status code (negative) on error
+ * Return:	status code
  */
 static efi_status_t efi_transfer_secure_state(enum efi_secure_mode mode)
 {
-	u32 attributes;
-	u8 val;
 	efi_status_t ret;
 
-	debug("Secure state from %d to %d\n", efi_secure_mode, mode);
+	debug("Switching secure state from %d to %d\n", efi_secure_mode, mode);
 
-	attributes = EFI_VARIABLE_BOOTSERVICE_ACCESS |
-		     EFI_VARIABLE_RUNTIME_ACCESS;
 	if (mode == EFI_MODE_DEPLOYED) {
-		val = 1;
-		ret = efi_set_variable_internal(L"SecureBoot",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"SetupMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"AuditMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 1;
-		ret = efi_set_variable_internal(L"DeployedMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
+		ret = efi_set_secure_state(1, 0, 0, 1);
 		if (ret != EFI_SUCCESS)
 			goto err;
 
 		efi_secure_boot = true;
 	} else if (mode == EFI_MODE_AUDIT) {
-		ret = efi_set_variable_internal(L"PK",
-						&efi_global_variable_guid,
-						attributes,
-						0, NULL,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"SecureBoot",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 1;
-		ret = efi_set_variable_internal(L"SetupMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
+		ret = efi_set_variable_common(L"PK", &efi_global_variable_guid,
+					      EFI_VARIABLE_BOOTSERVICE_ACCESS |
+					      EFI_VARIABLE_RUNTIME_ACCESS,
+					      0, NULL, false);
 		if (ret != EFI_SUCCESS)
 			goto err;
-		val = 1;
-		ret = efi_set_variable_internal(L"AuditMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"DeployedMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
+
+		ret = efi_set_secure_state(0, 1, 1, 0);
 		if (ret != EFI_SUCCESS)
 			goto err;
 
 		efi_secure_boot = true;
 	} else if (mode == EFI_MODE_USER) {
-		val = 1;
-		ret = efi_set_variable_internal(L"SecureBoot",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"SetupMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"AuditMode",
-						&efi_global_variable_guid,
-						attributes,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"DeployedMode",
-						&efi_global_variable_guid,
-						attributes,
-						sizeof(val), &val,
-						false);
+		ret = efi_set_secure_state(1, 0, 0, 0);
 		if (ret != EFI_SUCCESS)
 			goto err;
 
 		efi_secure_boot = true;
 	} else if (mode == EFI_MODE_SETUP) {
-		val = 0;
-		ret = efi_set_variable_internal(L"SecureBoot",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 1;
-		ret = efi_set_variable_internal(L"SetupMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"AuditMode",
-						&efi_global_variable_guid,
-						attributes,
-						sizeof(val), &val,
-						false);
-		if (ret != EFI_SUCCESS)
-			goto err;
-		val = 0;
-		ret = efi_set_variable_internal(L"DeployedMode",
-						&efi_global_variable_guid,
-						attributes | READ_ONLY,
-						sizeof(val), &val,
-						false);
+		ret = efi_set_secure_state(0, 1, 0, 0);
 		if (ret != EFI_SUCCESS)
 			goto err;
 	} else {
@@ -358,7 +291,7 @@ err:
 /**
  * efi_init_secure_state - initialize secure boot state
  *
- * Return:	EFI_SUCCESS on success, status code (negative) on error
+ * Return:	status code
  */
 static efi_status_t efi_init_secure_state(void)
 {
@@ -374,8 +307,8 @@ static efi_status_t efi_init_secure_state(void)
 	 */
 
 	size = 0;
-	ret = EFI_CALL(efi_get_variable(L"PK", &efi_global_variable_guid,
-					NULL, &size, NULL));
+	ret = efi_get_variable_common(L"PK", &efi_global_variable_guid,
+				      NULL, &size, NULL);
 	if (ret == EFI_BUFFER_TOO_SMALL) {
 		if (IS_ENABLED(CONFIG_EFI_SECURE_BOOT))
 			mode = EFI_MODE_USER;
@@ -392,14 +325,13 @@ static efi_status_t efi_init_secure_state(void)
 
 	ret = efi_transfer_secure_state(mode);
 	if (ret == EFI_SUCCESS)
-		ret = efi_set_variable_internal(L"VendorKeys",
-						&efi_global_variable_guid,
-						EFI_VARIABLE_BOOTSERVICE_ACCESS
-						 | EFI_VARIABLE_RUNTIME_ACCESS
-						 | READ_ONLY,
-						sizeof(efi_vendor_keys),
-						&efi_vendor_keys,
-						false);
+		ret = efi_set_variable_common(L"VendorKeys",
+					      &efi_global_variable_guid,
+					      EFI_VARIABLE_BOOTSERVICE_ACCESS |
+					      EFI_VARIABLE_RUNTIME_ACCESS |
+					      READ_ONLY,
+					      sizeof(efi_vendor_keys),
+					      &efi_vendor_keys, false);
 
 err:
 	return ret;
@@ -513,7 +445,7 @@ out:
  * attributes and signed time will also be returned in @env_attr and @time,
  * respectively.
  *
- * Return:	EFI_SUCCESS on success, status code (negative) on error
+ * Return:	status code
  */
 static efi_status_t efi_variable_authenticate(u16 *variable,
 					      const efi_guid_t *vendor,
@@ -594,9 +526,8 @@ static efi_status_t efi_variable_authenticate(u16 *variable,
 	var_sig = efi_variable_parse_signature(auth->auth_info.cert_data,
 					       auth->auth_info.hdr.dwLength
 						   - sizeof(auth->auth_info));
-	if (IS_ERR(var_sig)) {
+	if (!var_sig) {
 		debug("Parsing variable's signature failed\n");
-		var_sig = NULL;
 		goto err;
 	}
 
@@ -662,12 +593,10 @@ static efi_status_t efi_variable_authenticate(u16 *variable,
 }
 #endif /* CONFIG_EFI_SECURE_BOOT */
 
-static
-efi_status_t EFIAPI efi_get_variable_common(u16 *variable_name,
+static efi_status_t efi_get_variable_common(u16 *variable_name,
 					    const efi_guid_t *vendor,
 					    u32 *attributes,
-					    efi_uintn_t *data_size, void *data,
-					    bool is_non_volatile)
+					    efi_uintn_t *data_size, void *data)
 {
 	char *native_name;
 	efi_status_t ret;
@@ -750,27 +679,6 @@ out:
 	return ret;
 }
 
-static
-efi_status_t EFIAPI efi_get_volatile_variable(u16 *variable_name,
-					      const efi_guid_t *vendor,
-					      u32 *attributes,
-					      efi_uintn_t *data_size,
-					      void *data)
-{
-	return efi_get_variable_common(variable_name, vendor, attributes,
-				       data_size, data, false);
-}
-
-efi_status_t EFIAPI efi_get_nonvolatile_variable(u16 *variable_name,
-						 const efi_guid_t *vendor,
-						 u32 *attributes,
-						 efi_uintn_t *data_size,
-						 void *data)
-{
-	return efi_get_variable_common(variable_name, vendor, attributes,
-				       data_size, data, true);
-}
-
 /**
  * efi_efi_get_variable() - retrieve value of a UEFI variable
  *
@@ -795,12 +703,8 @@ efi_status_t EFIAPI efi_get_variable(u16 *variable_name,
 	EFI_ENTRY("\"%ls\" %pUl %p %p %p", variable_name, vendor, attributes,
 		  data_size, data);
 
-	ret = efi_get_volatile_variable(variable_name, vendor, attributes,
-					data_size, data);
-	if (ret == EFI_NOT_FOUND)
-		ret = efi_get_nonvolatile_variable(variable_name, vendor,
-						   attributes, data_size, data);
-
+	ret = efi_get_variable_common(variable_name, vendor, attributes,
+				      data_size, data);
 	return EFI_EXIT(ret);
 }
 
@@ -865,7 +769,10 @@ static efi_status_t parse_uboot_variable(char *variable,
 	/* guid */
 	c = *(name - 1);
 	*(name - 1) = '\0'; /* guid need be null-terminated here */
-	uuid_str_to_bin(guid, (unsigned char *)vendor, UUID_STR_FORMAT_GUID);
+	if (uuid_str_to_bin(guid, (unsigned char *)vendor,
+			    UUID_STR_FORMAT_GUID))
+		/* The only error would be EINVAL. */
+		return EFI_INVALID_PARAMETER;
 	*(name - 1) = c;
 
 	/* attributes */
@@ -964,14 +871,12 @@ efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
 	return EFI_EXIT(ret);
 }
 
-static
-efi_status_t EFIAPI efi_set_variable_common(u16 *variable_name,
+static efi_status_t efi_set_variable_common(u16 *variable_name,
 					    const efi_guid_t *vendor,
 					    u32 attributes,
 					    efi_uintn_t data_size,
 					    const void *data,
-					    bool ro_check,
-					    bool is_non_volatile)
+					    bool ro_check)
 {
 	char *native_name = NULL, *old_data = NULL, *val = NULL, *s;
 	efi_uintn_t old_size;
@@ -980,8 +885,6 @@ efi_status_t EFIAPI efi_set_variable_common(u16 *variable_name,
 	u32 attr;
 	efi_status_t ret = EFI_SUCCESS;
 
-	debug("%s: set '%s'\n", __func__, native_name);
-
 	if (!variable_name || !*variable_name || !vendor ||
 	    ((attributes & EFI_VARIABLE_RUNTIME_ACCESS) &&
 	     !(attributes & EFI_VARIABLE_BOOTSERVICE_ACCESS))) {
@@ -996,16 +899,8 @@ efi_status_t EFIAPI efi_set_variable_common(u16 *variable_name,
 	/* check if a variable exists */
 	old_size = 0;
 	attr = 0;
-	ret = EFI_CALL(efi_get_variable(variable_name, vendor, &attr,
-					&old_size, NULL));
-	if (ret == EFI_BUFFER_TOO_SMALL) {
-		if ((is_non_volatile && !(attr & EFI_VARIABLE_NON_VOLATILE)) ||
-		    (!is_non_volatile && (attr & EFI_VARIABLE_NON_VOLATILE))) {
-			ret = EFI_INVALID_PARAMETER;
-			goto err;
-		}
-	}
-
+	ret = efi_get_variable_common(variable_name, vendor, &attr,
+				      &old_size, NULL);
 	append = !!(attributes & EFI_VARIABLE_APPEND_WRITE);
 	attributes &= ~(u32)EFI_VARIABLE_APPEND_WRITE;
 	delete = !append && (!data_size || !attributes);
@@ -1092,11 +987,11 @@ efi_status_t EFIAPI efi_set_variable_common(u16 *variable_name,
 	if (append) {
 		old_data = malloc(old_size);
 		if (!old_data) {
-			return EFI_OUT_OF_RESOURCES;
+			ret = EFI_OUT_OF_RESOURCES;
 			goto err;
 		}
-		ret = EFI_CALL(efi_get_variable(variable_name, vendor,
-						&attr, &old_size, old_data));
+		ret = efi_get_variable_common(variable_name, vendor,
+					      &attr, &old_size, old_data);
 		if (ret != EFI_SUCCESS)
 			goto err;
 	} else {
@@ -1179,7 +1074,7 @@ out:
 		/* update VendorKeys */
 		if (vendor_keys_modified & efi_vendor_keys) {
 			efi_vendor_keys = 0;
-			ret = efi_set_variable_internal(
+			ret = efi_set_variable_common(
 						L"VendorKeys",
 						&efi_global_variable_guid,
 						EFI_VARIABLE_BOOTSERVICE_ACCESS
@@ -1201,54 +1096,6 @@ err:
 	return ret;
 }
 
-static
-efi_status_t EFIAPI efi_set_volatile_variable(u16 *variable_name,
-					      const efi_guid_t *vendor,
-					      u32 attributes,
-					      efi_uintn_t data_size,
-					      const void *data,
-					      bool ro_check)
-{
-	return efi_set_variable_common(variable_name, vendor, attributes,
-				       data_size, data, ro_check, false);
-}
-
-efi_status_t EFIAPI efi_set_nonvolatile_variable(u16 *variable_name,
-						 const efi_guid_t *vendor,
-						 u32 attributes,
-						 efi_uintn_t data_size,
-						 const void *data,
-						 bool ro_check)
-{
-	efi_status_t ret;
-
-	ret = efi_set_variable_common(variable_name, vendor, attributes,
-				      data_size, data, ro_check, true);
-
-	return ret;
-}
-
-static efi_status_t efi_set_variable_internal(u16 *variable_name,
-					      const efi_guid_t *vendor,
-					      u32 attributes,
-					      efi_uintn_t data_size,
-					      const void *data,
-					      bool ro_check)
-{
-	efi_status_t ret;
-
-	if (attributes & EFI_VARIABLE_NON_VOLATILE)
-		ret = efi_set_nonvolatile_variable(variable_name, vendor,
-						   attributes,
-						   data_size, data, ro_check);
-	else
-		ret = efi_set_volatile_variable(variable_name, vendor,
-						attributes, data_size, data,
-						ro_check);
-
-	return ret;
-}
-
 /**
  * efi_set_variable() - set value of a UEFI variable
  *
@@ -1274,9 +1121,9 @@ efi_status_t EFIAPI efi_set_variable(u16 *variable_name,
 	/* READ_ONLY bit is not part of API */
 	attributes &= ~(u32)READ_ONLY;
 
-	return EFI_EXIT(efi_set_variable_internal(variable_name, vendor,
-						  attributes, data_size, data,
-						  true));
+	return EFI_EXIT(efi_set_variable_common(variable_name, vendor,
+						attributes, data_size, data,
+						true));
 }
 
 /**
diff --git a/lib/efi_loader/efi_variable_tee.c b/lib/efi_loader/efi_variable_tee.c
new file mode 100644
index 0000000000..cacc76e23d
--- /dev/null
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -0,0 +1,662 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ *  EFI variable service via OP-TEE
+ *
+ *  Copyright (C) 2019 Linaro Ltd. <sughosh.ganu@linaro.org>
+ *  Copyright (C) 2019 Linaro Ltd. <ilias.apalodimas@linaro.org>
+ */
+
+#include <common.h>
+#include <efi.h>
+#include <efi_api.h>
+#include <efi_loader.h>
+#include <tee.h>
+#include <malloc.h>
+#include <mm_communication.h>
+
+static efi_uintn_t max_buffer_size;	/* comm + var + func + data */
+static efi_uintn_t max_payload_size;	/* func + data */
+
+struct mm_connection {
+	struct udevice *tee;
+	u32 session;
+};
+
+/**
+ * get_connection() - Retrieve OP-TEE session for a specific UUID.
+ *
+ * @conn:   session buffer to fill
+ * Return:  status code
+ */
+static int get_connection(struct mm_connection *conn)
+{
+	static const struct tee_optee_ta_uuid uuid = PTA_STMM_UUID;
+	struct udevice *tee = NULL;
+	struct tee_open_session_arg arg;
+	int rc;
+
+	tee = tee_find_device(tee, NULL, NULL, NULL);
+	if (!tee)
+		return -ENODEV;
+
+	memset(&arg, 0, sizeof(arg));
+	tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
+	rc = tee_open_session(tee, &arg, 0, NULL);
+	if (!rc) {
+		conn->tee = tee;
+		conn->session = arg.session;
+	}
+
+	return rc;
+}
+
+/**
+ * optee_mm_communicate() - Pass a buffer to StandaloneMM running in OP-TEE
+ *
+ * @comm_buf:		locally allocted communcation buffer
+ * @dsize:		buffer size
+ * Return:		status code
+ */
+static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize)
+{
+	ulong buf_size;
+	efi_status_t ret;
+	struct efi_mm_communicate_header *mm_hdr;
+	struct mm_connection conn = { NULL, 0 };
+	struct tee_invoke_arg arg;
+	struct tee_param param[2];
+	struct tee_shm *shm = NULL;
+	int rc;
+
+	if (!comm_buf)
+		return EFI_INVALID_PARAMETER;
+
+	mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+	buf_size = mm_hdr->message_len + sizeof(efi_guid_t) + sizeof(size_t);
+
+	if (dsize != buf_size)
+		return EFI_INVALID_PARAMETER;
+
+	rc = get_connection(&conn);
+	if (rc) {
+		log_err("Unable to open OP-TEE session (err=%d)\n", rc);
+		return EFI_UNSUPPORTED;
+	}
+
+	if (tee_shm_register(conn.tee, comm_buf, buf_size, 0, &shm)) {
+		log_err("Unable to register shared memory\n");
+		return EFI_UNSUPPORTED;
+	}
+
+	memset(&arg, 0, sizeof(arg));
+	arg.func = PTA_STMM_CMDID_COMMUNICATE;
+	arg.session = conn.session;
+
+	memset(param, 0, sizeof(param));
+	param[0].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INOUT;
+	param[0].u.memref.size = buf_size;
+	param[0].u.memref.shm = shm;
+	param[1].attr = TEE_PARAM_ATTR_TYPE_VALUE_OUTPUT;
+
+	rc = tee_invoke_func(conn.tee, &arg, 2, param);
+	if (rc)
+		return EFI_INVALID_PARAMETER;
+	tee_shm_free(shm);
+	tee_close_session(conn.tee, conn.session);
+
+	switch (param[1].u.value.a) {
+	case ARM_SMC_MM_RET_SUCCESS:
+		ret = EFI_SUCCESS;
+		break;
+
+	case ARM_SMC_MM_RET_INVALID_PARAMS:
+		ret = EFI_INVALID_PARAMETER;
+		break;
+
+	case ARM_SMC_MM_RET_DENIED:
+		ret = EFI_ACCESS_DENIED;
+		break;
+
+	case ARM_SMC_MM_RET_NO_MEMORY:
+		ret = EFI_OUT_OF_RESOURCES;
+		break;
+
+	default:
+		ret = EFI_ACCESS_DENIED;
+	}
+
+	return ret;
+}
+
+/**
+ * mm_communicate() - Adjust the cmonnucation buffer to StandAlonneMM and send
+ * it to OP-TEE
+ *
+ * @comm_buf:		locally allocted communcation buffer
+ * @dsize:		buffer size
+ * Return:		status code
+ */
+static efi_status_t mm_communicate(u8 *comm_buf, efi_uintn_t dsize)
+{
+	efi_status_t ret;
+	struct efi_mm_communicate_header *mm_hdr;
+	struct smm_variable_communicate_header *var_hdr;
+
+	dsize += MM_COMMUNICATE_HEADER_SIZE + MM_VARIABLE_COMMUNICATE_SIZE;
+	mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+	var_hdr = (struct smm_variable_communicate_header *)mm_hdr->data;
+
+	ret = optee_mm_communicate(comm_buf, dsize);
+	if (ret != EFI_SUCCESS) {
+		log_err("%s failed!\n", __func__);
+		return ret;
+	}
+
+	return var_hdr->ret_status;
+}
+
+/**
+ * setup_mm_hdr() -	Allocate a buffer for StandAloneMM and initialize the
+ *			header data.
+ *
+ * @dptr:		pointer address of the corresponding StandAloneMM
+ *			function
+ * @payload_size:	buffer size
+ * @func:		standAloneMM function number
+ * @ret:		EFI return code
+ * Return:		buffer or NULL
+ */
+static u8 *setup_mm_hdr(void **dptr, efi_uintn_t payload_size,
+			efi_uintn_t func, efi_status_t *ret)
+{
+	const efi_guid_t mm_var_guid = EFI_MM_VARIABLE_GUID;
+	struct efi_mm_communicate_header *mm_hdr;
+	struct smm_variable_communicate_header *var_hdr;
+	u8 *comm_buf;
+
+	/* In the init function we initialize max_buffer_size with
+	 * get_max_payload(). So skip the test if max_buffer_size is initialized
+	 * StandAloneMM will perform similar checks and drop the buffer if it's
+	 * too long
+	 */
+	if (max_buffer_size && max_buffer_size <
+			(MM_COMMUNICATE_HEADER_SIZE +
+			 MM_VARIABLE_COMMUNICATE_SIZE +
+			 payload_size)) {
+		*ret = EFI_INVALID_PARAMETER;
+		return NULL;
+	}
+
+	comm_buf = calloc(1, MM_COMMUNICATE_HEADER_SIZE +
+			  MM_VARIABLE_COMMUNICATE_SIZE +
+			  payload_size);
+	if (!comm_buf) {
+		*ret = EFI_OUT_OF_RESOURCES;
+		return NULL;
+	}
+
+	mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+	guidcpy(&mm_hdr->header_guid, &mm_var_guid);
+	mm_hdr->message_len = MM_VARIABLE_COMMUNICATE_SIZE + payload_size;
+
+	var_hdr = (struct smm_variable_communicate_header *)mm_hdr->data;
+	var_hdr->function = func;
+	if (dptr)
+		*dptr = var_hdr->data;
+	*ret = EFI_SUCCESS;
+
+	return comm_buf;
+}
+
+/**
+ * get_max_payload() - Get variable payload size from StandAloneMM.
+ *
+ * @size:    size of the variable in storage
+ * Return:   status code
+ */
+efi_status_t EFIAPI get_max_payload(efi_uintn_t *size)
+{
+	struct smm_variable_payload_size *var_payload = NULL;
+	efi_uintn_t payload_size;
+	u8 *comm_buf = NULL;
+	efi_status_t ret;
+
+	if (!size) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	payload_size = sizeof(*var_payload);
+	comm_buf = setup_mm_hdr((void **)&var_payload, payload_size,
+				SMM_VARIABLE_FUNCTION_GET_PAYLOAD_SIZE, &ret);
+	if (!comm_buf)
+		goto out;
+
+	ret = mm_communicate(comm_buf, payload_size);
+	if (ret != EFI_SUCCESS)
+		goto out;
+
+	*size = var_payload->size;
+
+out:
+	free(comm_buf);
+	return ret;
+}
+
+/**
+ * efi_get_variable() - retrieve value of a UEFI variable
+ *
+ * This function implements the GetVariable runtime service.
+ *
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * @name:		name of the variable
+ * @guid:		vendor GUID
+ * @attr:		attributes of the variable
+ * @data_size:		size of the buffer to which the variable value is copied
+ * @data:		buffer to which the variable value is copied
+ * Return:		status code
+ */
+efi_status_t EFIAPI efi_get_variable(u16 *name, const efi_guid_t *guid,
+				     u32 *attr, efi_uintn_t *data_size,
+				     void *data)
+{
+	struct smm_variable_access *var_acc;
+	efi_uintn_t payload_size;
+	efi_uintn_t name_size;
+	efi_uintn_t tmp_dsize;
+	u8 *comm_buf = NULL;
+	efi_status_t ret;
+
+	EFI_ENTRY("\"%ls\" %pUl %p %p %p", name, guid, attr, data_size, data);
+
+	if (!name || !guid || !data_size) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	/* Check payload size */
+	name_size = u16_strsize(name);
+	if (name_size > max_payload_size - MM_VARIABLE_ACCESS_HEADER_SIZE) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	/* Trim output buffer size */
+	tmp_dsize = *data_size;
+	if (name_size + tmp_dsize >
+			max_payload_size - MM_VARIABLE_ACCESS_HEADER_SIZE) {
+		tmp_dsize = max_payload_size -
+				MM_VARIABLE_ACCESS_HEADER_SIZE -
+				name_size;
+	}
+
+	/* Get communication buffer and initialize header */
+	payload_size = MM_VARIABLE_ACCESS_HEADER_SIZE + name_size + tmp_dsize;
+	comm_buf = setup_mm_hdr((void **)&var_acc, payload_size,
+				SMM_VARIABLE_FUNCTION_GET_VARIABLE, &ret);
+	if (!comm_buf)
+		goto out;
+
+	/* Fill in contents */
+	guidcpy(&var_acc->guid, guid);
+	var_acc->data_size = tmp_dsize;
+	var_acc->name_size = name_size;
+	var_acc->attr = attr ? *attr : 0;
+	memcpy(var_acc->name, name, name_size);
+
+	/* Communicate */
+	ret = mm_communicate(comm_buf, payload_size);
+	if (ret == EFI_SUCCESS || ret == EFI_BUFFER_TOO_SMALL) {
+		/* Update with reported data size for trimmed case */
+		*data_size = var_acc->data_size;
+	}
+	if (ret != EFI_SUCCESS)
+		goto out;
+
+	if (attr)
+		*attr = var_acc->attr;
+	if (data)
+		memcpy(data, (u8 *)var_acc->name + var_acc->name_size,
+		       var_acc->data_size);
+	else
+		ret = EFI_INVALID_PARAMETER;
+
+out:
+	free(comm_buf);
+	return EFI_EXIT(ret);
+}
+
+/**
+ * efi_get_next_variable_name() - enumerate the current variable names
+ *
+ * @variable_name_size:	size of variable_name buffer in bytes
+ * @variable_name:	name of uefi variable's name in u16
+ * @guid:		vendor's guid
+ *
+ * This function implements the GetNextVariableName service.
+ *
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * Return: status code
+ */
+efi_status_t EFIAPI efi_get_next_variable_name(efi_uintn_t *variable_name_size,
+					       u16 *variable_name,
+					       efi_guid_t *guid)
+{
+	struct smm_variable_getnext *var_getnext;
+	efi_uintn_t payload_size;
+	efi_uintn_t out_name_size;
+	efi_uintn_t in_name_size;
+	efi_uintn_t tmp_dsize;
+	efi_uintn_t name_size;
+	u8 *comm_buf = NULL;
+	efi_status_t ret;
+
+	EFI_ENTRY("%p \"%ls\" %pUl", variable_name_size, variable_name, guid);
+
+	if (!variable_name_size || !variable_name || !guid) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	out_name_size = *variable_name_size;
+	in_name_size = u16_strsize(variable_name);
+
+	if (out_name_size < in_name_size) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	name_size = u16_strsize(variable_name);
+	if (name_size > max_payload_size - MM_VARIABLE_GET_NEXT_HEADER_SIZE) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	/* Trim output buffer size */
+	tmp_dsize = *variable_name_size;
+	if (name_size + tmp_dsize >
+			max_payload_size - MM_VARIABLE_GET_NEXT_HEADER_SIZE) {
+		tmp_dsize = max_payload_size -
+				MM_VARIABLE_GET_NEXT_HEADER_SIZE -
+				name_size;
+	}
+
+	payload_size = MM_VARIABLE_GET_NEXT_HEADER_SIZE + out_name_size;
+	comm_buf = setup_mm_hdr((void **)&var_getnext, payload_size,
+				SMM_VARIABLE_FUNCTION_GET_NEXT_VARIABLE_NAME,
+				&ret);
+	if (!comm_buf)
+		goto out;
+
+	/* Fill in contents */
+	guidcpy(&var_getnext->guid, guid);
+	var_getnext->name_size = out_name_size;
+	memcpy(var_getnext->name, variable_name, in_name_size);
+	memset((u8 *)var_getnext->name + in_name_size, 0x0,
+	       out_name_size - in_name_size);
+
+	/* Communicate */
+	ret = mm_communicate(comm_buf, payload_size);
+	if (ret == EFI_SUCCESS || ret == EFI_BUFFER_TOO_SMALL) {
+		/* Update with reported data size for trimmed case */
+		*variable_name_size = var_getnext->name_size;
+	}
+	if (ret != EFI_SUCCESS)
+		goto out;
+
+	guidcpy(guid, &var_getnext->guid);
+	memcpy(variable_name, (u8 *)var_getnext->name,
+	       var_getnext->name_size);
+
+out:
+	free(comm_buf);
+	return EFI_EXIT(ret);
+}
+
+/**
+ * efi_set_variable() - set value of a UEFI variable
+ *
+ * This function implements the SetVariable runtime service.
+ *
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * @name:		name of the variable
+ * @guid:		vendor GUID
+ * @attr:		attributes of the variable
+ * @data_size:		size of the buffer with the variable value
+ * @data:		buffer with the variable value
+ * Return:		status code
+ */
+efi_status_t EFIAPI efi_set_variable(u16 *name, const efi_guid_t *guid,
+				     u32 attr, efi_uintn_t data_size,
+				     const void *data)
+{
+	struct smm_variable_access *var_acc;
+	efi_uintn_t payload_size;
+	efi_uintn_t name_size;
+	u8 *comm_buf = NULL;
+	efi_status_t ret;
+
+	EFI_ENTRY("\"%ls\" %pUl %x %zu %p", name, guid, attr, data_size, data);
+
+	if (!name || name[0] == 0 || !guid) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+	if (data_size > 0 && !data) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	/* Check payload size */
+	name_size = u16_strsize(name);
+	payload_size = MM_VARIABLE_ACCESS_HEADER_SIZE + name_size + data_size;
+	if (payload_size > max_payload_size) {
+		ret = EFI_INVALID_PARAMETER;
+		goto out;
+	}
+
+	/* Get communication buffer and initialize header */
+	comm_buf = setup_mm_hdr((void **)&var_acc, payload_size,
+				SMM_VARIABLE_FUNCTION_SET_VARIABLE, &ret);
+	if (!comm_buf)
+		goto out;
+
+	/* Fill in contents */
+	guidcpy(&var_acc->guid, guid);
+	var_acc->data_size = data_size;
+	var_acc->name_size = name_size;
+	var_acc->attr = attr;
+	memcpy(var_acc->name, name, name_size);
+	memcpy((u8 *)var_acc->name + name_size, data, data_size);
+
+	/* Communicate */
+	ret = mm_communicate(comm_buf, payload_size);
+
+out:
+	free(comm_buf);
+	return EFI_EXIT(ret);
+}
+
+/**
+ * efi_query_variable_info() - get information about EFI variables
+ *
+ * This function implements the QueryVariableInfo() runtime service.
+ *
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * @attributes:				bitmask to select variables to be
+ *					queried
+ * @maximum_variable_storage_size:	maximum size of storage area for the
+ *					selected variable types
+ * @remaining_variable_storage_size:	remaining size of storage are for the
+ *					selected variable types
+ * @maximum_variable_size:		maximum size of a variable of the
+ *					selected type
+ * Returns:				status code
+ */
+efi_status_t EFIAPI __efi_runtime
+efi_query_variable_info(u32 attributes, u64 *max_variable_storage_size,
+			u64 *remain_variable_storage_size,
+			u64 *max_variable_size)
+{
+	struct smm_variable_query_info *mm_query_info;
+	efi_uintn_t payload_size;
+	efi_status_t ret;
+	u8 *comm_buf;
+
+	EFI_ENTRY("%x %p %p %p", attributes, max_variable_storage_size,
+		  remain_variable_storage_size, max_variable_size);
+
+	payload_size = sizeof(*mm_query_info);
+	comm_buf = setup_mm_hdr((void **)&mm_query_info, payload_size,
+				SMM_VARIABLE_FUNCTION_QUERY_VARIABLE_INFO,
+				&ret);
+	if (!comm_buf)
+		goto out;
+
+	mm_query_info->attr = attributes;
+	ret = mm_communicate(comm_buf, payload_size);
+	if (ret != EFI_SUCCESS)
+		goto out;
+	*max_variable_storage_size = mm_query_info->max_variable_storage;
+	*remain_variable_storage_size =
+			mm_query_info->remaining_variable_storage;
+	*max_variable_size = mm_query_info->max_variable_size;
+
+out:
+	free(comm_buf);
+	return EFI_EXIT(ret);
+}
+
+/**
+ * efi_get_variable_runtime() - runtime implementation of GetVariable()
+ *
+ * @variable_name:	name of the variable
+ * @guid:		vendor GUID
+ * @attributes:		attributes of the variable
+ * @data_size:		size of the buffer to which the variable value is copied
+ * @data:		buffer to which the variable value is copied
+ * Return:		status code
+ */
+static efi_status_t __efi_runtime EFIAPI
+efi_get_variable_runtime(u16 *variable_name, const efi_guid_t *guid,
+			 u32 *attributes, efi_uintn_t *data_size, void *data)
+{
+	return EFI_UNSUPPORTED;
+}
+
+/**
+ * efi_get_next_variable_name_runtime() - runtime implementation of
+ *					  GetNextVariable()
+ *
+ * @variable_name_size:	size of variable_name buffer in byte
+ * @variable_name:	name of uefi variable's name in u16
+ * @guid:		vendor's guid
+ * Return:              status code
+ */
+static efi_status_t __efi_runtime EFIAPI
+efi_get_next_variable_name_runtime(efi_uintn_t *variable_name_size,
+				   u16 *variable_name, efi_guid_t *guid)
+{
+	return EFI_UNSUPPORTED;
+}
+
+/**
+ * efi_query_variable_info() - get information about EFI variables
+ *
+ * This function implements the QueryVariableInfo() runtime service.
+ *
+ * See the Unified Extensible Firmware Interface (UEFI) specification for
+ * details.
+ *
+ * @attributes:				bitmask to select variables to be
+ *					queried
+ * @maximum_variable_storage_size:	maximum size of storage area for the
+ *					selected variable types
+ * @remaining_variable_storage_size:	remaining size of storage are for the
+ *					selected variable types
+ * @maximum_variable_size:		maximum size of a variable of the
+ *					selected type
+ * Return:				status code
+ */
+efi_status_t EFIAPI __efi_runtime
+efi_query_variable_info_runtime(u32 attributes, u64 *max_variable_storage_size,
+				u64 *remain_variable_storage_size,
+				u64 *max_variable_size)
+{
+	return EFI_UNSUPPORTED;
+}
+
+/**
+ * efi_set_variable_runtime() - runtime implementation of SetVariable()
+ *
+ * @variable_name:	name of the variable
+ * @guid:		vendor GUID
+ * @attributes:		attributes of the variable
+ * @data_size:		size of the buffer with the variable value
+ * @data:		buffer with the variable value
+ * Return:		status code
+ */
+static efi_status_t __efi_runtime EFIAPI
+efi_set_variable_runtime(u16 *variable_name, const efi_guid_t *guid,
+			 u32 attributes, efi_uintn_t data_size,
+			 const void *data)
+{
+	return EFI_UNSUPPORTED;
+}
+
+/**
+ * efi_variables_boot_exit_notify() - notify ExitBootServices() is called
+ */
+void efi_variables_boot_exit_notify(void)
+{
+	u8 *comm_buf;
+	efi_status_t ret;
+
+	comm_buf = setup_mm_hdr(NULL, 0,
+				SMM_VARIABLE_FUNCTION_EXIT_BOOT_SERVICE, &ret);
+	if (comm_buf)
+		ret = mm_communicate(comm_buf, 0);
+	else
+		ret = EFI_NOT_FOUND;
+
+	if (ret != EFI_SUCCESS)
+		log_err("Unable to notify StMM for ExitBootServices\n");
+	free(comm_buf);
+
+	/* Update runtime service table */
+	efi_runtime_services.query_variable_info =
+			efi_query_variable_info_runtime;
+	efi_runtime_services.get_variable = efi_get_variable_runtime;
+	efi_runtime_services.get_next_variable_name =
+			efi_get_next_variable_name_runtime;
+	efi_runtime_services.set_variable = efi_set_variable_runtime;
+	efi_update_table_header_crc32(&efi_runtime_services.hdr);
+}
+
+/**
+ * efi_init_variables() - initialize variable services
+ *
+ * Return:	status code
+ */
+efi_status_t efi_init_variables(void)
+{
+	efi_status_t ret;
+
+	ret = get_max_payload(&max_payload_size);
+	if (ret != EFI_SUCCESS)
+		return ret;
+
+	max_buffer_size = MM_COMMUNICATE_HEADER_SIZE +
+			  MM_VARIABLE_COMMUNICATE_SIZE +
+			  max_payload_size;
+
+	return EFI_SUCCESS;
+}
diff --git a/lib/efi_selftest/efi_selftest_block_device.c b/lib/efi_selftest/efi_selftest_block_device.c
index d98a854e6d..5eb297d285 100644
--- a/lib/efi_selftest/efi_selftest_block_device.c
+++ b/lib/efi_selftest/efi_selftest_block_device.c
@@ -15,6 +15,7 @@
 
 #include <efi_selftest.h>
 #include "efi_selftest_disk_image.h"
+#include <asm/cache.h>
 
 /* Block size of compressed disk image */
 #define COMPRESSED_DISK_IMAGE_BLOCK_SIZE 8
diff --git a/lib/efi_selftest/efi_selftest_console.c b/lib/efi_selftest/efi_selftest_console.c
index 42f51b6520..13f3ee6bc1 100644
--- a/lib/efi_selftest/efi_selftest_console.c
+++ b/lib/efi_selftest/efi_selftest_console.c
@@ -6,6 +6,7 @@
  */
 
 #include <efi_selftest.h>
+#include <net.h>
 #include <vsprintf.h>
 
 struct efi_simple_text_output_protocol *con_out;
diff --git a/lib/efi_selftest/efi_selftest_memory.c b/lib/efi_selftest/efi_selftest_memory.c
index e71732dc6d..4d32a28006 100644
--- a/lib/efi_selftest/efi_selftest_memory.c
+++ b/lib/efi_selftest/efi_selftest_memory.c
@@ -176,9 +176,9 @@ static int execute(void)
 	/* Check memory reservation for the device tree */
 	if (fdt_addr &&
 	    find_in_memory_map(map_size, memory_map, desc_size, fdt_addr,
-			       EFI_BOOT_SERVICES_DATA) != EFI_ST_SUCCESS) {
+			       EFI_ACPI_RECLAIM_MEMORY) != EFI_ST_SUCCESS) {
 		efi_st_error
-			("Device tree not marked as boot services data\n");
+			("Device tree not marked as ACPI reclaim memory\n");
 		return EFI_ST_FAILURE;
 	}
 	return EFI_ST_SUCCESS;
diff --git a/lib/efi_selftest/efi_selftest_snp.c b/lib/efi_selftest/efi_selftest_snp.c
index 9797ecaf42..79f0467803 100644
--- a/lib/efi_selftest/efi_selftest_snp.c
+++ b/lib/efi_selftest/efi_selftest_snp.c
@@ -15,6 +15,7 @@
  */
 
 #include <efi_selftest.h>
+#include <net.h>
 
 /*
  * MAC address for broadcasts
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 0a3b860782..1f2b763acc 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -9,7 +9,9 @@
 #include <dm.h>
 #include <hang.h>
 #include <init.h>
+#include <log.h>
 #include <malloc.h>
+#include <net.h>
 #include <dm/of_extra.h>
 #include <env.h>
 #include <errno.h>
@@ -1472,8 +1474,14 @@ int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
 	return 0;
 }
 
+__weak int fdtdec_board_setup(const void *fdt_blob)
+{
+	return 0;
+}
+
 int fdtdec_setup(void)
 {
+	int ret;
 #if CONFIG_IS_ENABLED(OF_CONTROL)
 # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
 	void *fdt_blob;
@@ -1526,7 +1534,10 @@ int fdtdec_setup(void)
 # endif
 #endif
 
-	return fdtdec_prepare_fdt();
+	ret = fdtdec_prepare_fdt();
+	if (!ret)
+		ret = fdtdec_board_setup(gd->fdt_blob);
+	return ret;
 }
 
 #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
diff --git a/lib/fdtdec_common.c b/lib/fdtdec_common.c
index 5775992ef3..ddaca0087e 100644
--- a/lib/fdtdec_common.c
+++ b/lib/fdtdec_common.c
@@ -9,6 +9,7 @@
 
 #ifndef USE_HOSTCC
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <fdtdec.h>
 #else
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index e8bfd1fb1e..e0c6e0971c 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <fdtdec.h>
 #include <linux/libfdt.h>
 #include <malloc.h>
@@ -297,8 +298,8 @@ static int check_carveout(void)
 	return 0;
 }
 
-static int do_test_fdtdec(cmd_tbl_t *cmdtp, int flag, int argc,
-			  char * const argv[])
+static int do_test_fdtdec(struct cmd_tbl *cmdtp, int flag, int argc,
+			  char *const argv[])
 {
 	/* basic tests */
 	CHECKOK(run_test("", "", ""));
diff --git a/lib/gunzip.c b/lib/gunzip.c
index 9e6ccd692a..bee3b9261f 100644
--- a/lib/gunzip.c
+++ b/lib/gunzip.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <blk.h>
 #include <command.h>
 #include <console.h>
 #include <div64.h>
diff --git a/lib/hashtable.c b/lib/hashtable.c
index f82f2463cf..b96dbe19be 100644
--- a/lib/hashtable.c
+++ b/lib/hashtable.c
@@ -13,6 +13,7 @@
  */
 
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <sort.h>
 
@@ -605,7 +606,7 @@ static int match_entry(struct env_entry *ep, int flag, int argc,
 
 ssize_t hexport_r(struct hsearch_data *htab, const char sep, int flag,
 		 char **resp, size_t size,
-		 int argc, char * const argv[])
+		 int argc, char *const argv[])
 {
 	struct env_entry *list[htab->size];
 	char *res, *p;
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index 036062139b..187ac28cd3 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -36,11 +36,14 @@
 
 #include <config.h>
 #include <common.h>
+#include <blk.h>
 #include <image-sparse.h>
 #include <div64.h>
+#include <log.h>
 #include <malloc.h>
 #include <part.h>
 #include <sparse_format.h>
+#include <asm/cache.h>
 
 #include <linux/math64.h>
 
diff --git a/lib/libavb/avb_cmdline.c b/lib/libavb/avb_cmdline.c
index dd859d3467..cb54e658c4 100644
--- a/lib/libavb/avb_cmdline.c
+++ b/lib/libavb/avb_cmdline.c
@@ -7,6 +7,7 @@
 #include "avb_sha.h"
 #include "avb_util.h"
 #include "avb_version.h"
+#include <log.h>
 #include <malloc.h>
 
 #define NUM_GUIDS 3
diff --git a/lib/libavb/avb_descriptor.c b/lib/libavb/avb_descriptor.c
index 86b8d1b994..56a3a91fc2 100644
--- a/lib/libavb/avb_descriptor.c
+++ b/lib/libavb/avb_descriptor.c
@@ -6,6 +6,7 @@
 #include "avb_descriptor.h"
 #include "avb_util.h"
 #include "avb_vbmeta_image.h"
+#include <log.h>
 #include <malloc.h>
 
 bool avb_descriptor_validate_and_byteswap(const AvbDescriptor* src,
diff --git a/lib/libavb/avb_slot_verify.c b/lib/libavb/avb_slot_verify.c
index 58baf522fc..ae8e1dffa4 100644
--- a/lib/libavb/avb_slot_verify.c
+++ b/lib/libavb/avb_slot_verify.c
@@ -14,6 +14,7 @@
 #include "avb_util.h"
 #include "avb_vbmeta_image.h"
 #include "avb_version.h"
+#include <log.h>
 #include <malloc.h>
 
 /* Maximum number of partitions that can be loaded with avb_slot_verify(). */
diff --git a/lib/libavb/avb_util.c b/lib/libavb/avb_util.c
index 94773b77e7..8719ede15a 100644
--- a/lib/libavb/avb_util.c
+++ b/lib/libavb/avb_util.c
@@ -4,6 +4,7 @@
  */
 
 #include "avb_util.h"
+#include <log.h>
 #include <malloc.h>
 
 #include <stdarg.h>
diff --git a/lib/linux_compat.c b/lib/linux_compat.c
index 89a6fd6ec9..c83426f59d 100644
--- a/lib/linux_compat.c
+++ b/lib/linux_compat.c
@@ -2,6 +2,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <memalign.h>
+#include <asm/cache.h>
 #include <linux/compat.h>
 
 struct p_current cur = {
diff --git a/lib/list_sort.c b/lib/list_sort.c
index beb7273fd3..58e1e1614a 100644
--- a/lib/list_sort.c
+++ b/lib/list_sort.c
@@ -1,4 +1,5 @@
 #ifndef __UBOOT__
+#include <log.h>
 #include <dm/devres.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
diff --git a/lib/lmb.c b/lib/lmb.c
index 07b9308adf..008bcc7930 100644
--- a/lib/lmb.c
+++ b/lib/lmb.c
@@ -7,7 +7,9 @@
  */
 
 #include <common.h>
+#include <image.h>
 #include <lmb.h>
+#include <log.h>
 #include <malloc.h>
 
 #define LMB_ALLOC_ANYWHERE	0
diff --git a/lib/lzma/LzmaTools.c b/lib/lzma/LzmaTools.c
index 2537cb8f8c..521258e623 100644
--- a/lib/lzma/LzmaTools.c
+++ b/lib/lzma/LzmaTools.c
@@ -19,6 +19,7 @@
 
 #include <config.h>
 #include <common.h>
+#include <log.h>
 #include <watchdog.h>
 
 #ifdef CONFIG_LZMA
diff --git a/lib/membuff.c b/lib/membuff.c
index 45dae2d576..36dc43a523 100644
--- a/lib/membuff.c
+++ b/lib/membuff.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include "membuff.h"
 
diff --git a/lib/net_utils.c b/lib/net_utils.c
index 8af7782970..0a8a557319 100644
--- a/lib/net_utils.c
+++ b/lib/net_utils.c
@@ -10,6 +10,7 @@
  */
 
 #include <common.h>
+#include <net.h>
 
 struct in_addr string_to_ip(const char *s)
 {
diff --git a/lib/of_live.c b/lib/of_live.c
index c49e95e38c..05a45ed34a 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <linux/libfdt.h>
 #include <of_live.h>
 #include <malloc.h>
diff --git a/lib/optee/optee.c b/lib/optee/optee.c
index d4355c6d03..e59b5766e7 100644
--- a/lib/optee/optee.c
+++ b/lib/optee/optee.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <image.h>
+#include <log.h>
 #include <malloc.h>
 #include <linux/libfdt.h>
 #include <tee/optee.h>
diff --git a/lib/panic.c b/lib/panic.c
index 8e72c265a6..58382ac4f4 100644
--- a/lib/panic.c
+++ b/lib/panic.c
@@ -14,6 +14,7 @@
 #if !defined(CONFIG_PANIC_HANG)
 #include <command.h>
 #endif
+#include <linux/delay.h>
 
 static void panic_finish(void) __attribute__ ((noreturn));
 
diff --git a/lib/physmem.c b/lib/physmem.c
index 84b191dae3..fc90ce4d7c 100644
--- a/lib/physmem.c
+++ b/lib/physmem.c
@@ -9,6 +9,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <mapmem.h>
 #include <physmem.h>
 #include <linux/compiler.h>
diff --git a/lib/qsort.c b/lib/qsort.c
index f63d4ef726..2f18588dfc 100644
--- a/lib/qsort.c
+++ b/lib/qsort.c
@@ -15,6 +15,7 @@
  * calculation, as well as to reduce the generated code size with
  * bcc and gcc. */
 
+#include <log.h>
 #include <linux/types.h>
 #include <common.h>
 #include <exports.h>
diff --git a/lib/rsa/rsa-mod-exp.c b/lib/rsa/rsa-mod-exp.c
index 420ab2eba0..a437cbe26f 100644
--- a/lib/rsa/rsa-mod-exp.c
+++ b/lib/rsa/rsa-mod-exp.c
@@ -6,6 +6,7 @@
 #ifndef USE_HOSTCC
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <asm/types.h>
 #include <asm/byteorder.h>
 #include <linux/errno.h>
@@ -262,8 +263,8 @@ int rsa_mod_exp_sw(const uint8_t *sig, uint32_t sig_len,
 	if (!prop->public_exponent)
 		key.exponent = RSA_DEFAULT_PUBEXP;
 	else
-		key.exponent =
-			fdt64_to_cpu(*((uint64_t *)(prop->public_exponent)));
+		rsa_convert_big_endian((uint32_t *)&key.exponent,
+				       prop->public_exponent, 2);
 
 	if (!key.len || !prop->modulus || !prop->rr) {
 		debug("%s: Missing RSA key info", __func__);
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index 580c744709..40ca1e1f57 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -4,7 +4,7 @@
  */
 
 #include "mkimage.h"
-#include <malloc.h>
+#include <stdlib.h>
 #include <stdio.h>
 #include <string.h>
 #include <image.h>
@@ -135,9 +135,14 @@ static int rsa_engine_get_pub_key(const char *keydir, const char *name,
 
 	if (engine_id && !strcmp(engine_id, "pkcs11")) {
 		if (keydir)
-			snprintf(key_id, sizeof(key_id),
-				 "pkcs11:%s;object=%s;type=public",
-				 keydir, name);
+			if (strstr(keydir, "object="))
+				snprintf(key_id, sizeof(key_id),
+					 "pkcs11:%s;type=public",
+					 keydir);
+			else
+				snprintf(key_id, sizeof(key_id),
+					 "pkcs11:%s;object=%s;type=public",
+					 keydir, name);
 		else
 			snprintf(key_id, sizeof(key_id),
 				 "pkcs11:object=%s;type=public",
@@ -255,9 +260,14 @@ static int rsa_engine_get_priv_key(const char *keydir, const char *name,
 
 	if (engine_id && !strcmp(engine_id, "pkcs11")) {
 		if (keydir)
-			snprintf(key_id, sizeof(key_id),
-				 "pkcs11:%s;object=%s;type=private",
-				 keydir, name);
+			if (strstr(keydir, "object="))
+				snprintf(key_id, sizeof(key_id),
+					 "pkcs11:%s;type=private",
+					 keydir);
+			else
+				snprintf(key_id, sizeof(key_id),
+					 "pkcs11:%s;object=%s;type=private",
+					 keydir, name);
 		else
 			snprintf(key_id, sizeof(key_id),
 				 "pkcs11:object=%s;type=private",
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index 80e817314b..1d55b997e3 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -6,6 +6,7 @@
 #ifndef USE_HOSTCC
 #include <common.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/types.h>
 #include <asm/byteorder.h>
@@ -445,7 +446,7 @@ static int rsa_verify_with_keynode(struct image_sign_info *info,
 
 	prop.rr = fdt_getprop(blob, node, "rsa,r-squared", NULL);
 
-	if (!prop.num_bits || !prop.modulus) {
+	if (!prop.num_bits || !prop.modulus || !prop.rr) {
 		debug("%s: Missing RSA key info", __func__);
 		return -EFAULT;
 	}
diff --git a/lib/slre.c b/lib/slre.c
index 969c46a859..e82a9e7635 100644
--- a/lib/slre.c
+++ b/lib/slre.c
@@ -20,6 +20,7 @@
 #include <stdlib.h>
 #include <string.h>
 #else
+#include <log.h>
 #include <common.h>
 #include <linux/ctype.h>
 #endif /* SLRE_TEST */
diff --git a/lib/time.c b/lib/time.c
index 75de48f900..65db0f6cda 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -5,13 +5,16 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <errno.h>
+#include <init.h>
 #include <time.h>
 #include <timer.h>
 #include <watchdog.h>
 #include <div64.h>
 #include <asm/io.h>
+#include <linux/delay.h>
 
 #ifndef CONFIG_WD_PERIOD
 # define CONFIG_WD_PERIOD	(10 * 1000 * 1000)	/* 10 seconds default */
@@ -181,7 +184,7 @@ void udelay(unsigned long usec)
 	do {
 		WATCHDOG_RESET();
 		kv = usec > CONFIG_WD_PERIOD ? CONFIG_WD_PERIOD : usec;
-		__udelay (kv);
+		__udelay(kv);
 		usec -= kv;
 	} while(usec);
 }
diff --git a/lib/tiny-printf.c b/lib/tiny-printf.c
index 1138c7012a..8fc7e48d99 100644
--- a/lib/tiny-printf.c
+++ b/lib/tiny-printf.c
@@ -242,6 +242,7 @@ static int _vprintf(struct printf_info *info, const char *fmt, va_list va)
 				goto abort;
 			case 'u':
 			case 'd':
+			case 'i':
 				div = 1000000000;
 				if (islong) {
 					num = va_arg(va, unsigned long);
@@ -251,7 +252,7 @@ static int _vprintf(struct printf_info *info, const char *fmt, va_list va)
 					num = va_arg(va, unsigned int);
 				}
 
-				if (ch == 'd') {
+				if (ch != 'u') {
 					if (islong && (long)num < 0) {
 						num = -(long)num;
 						out(info, '-');
diff --git a/lib/tpm-common.c b/lib/tpm-common.c
index 86b4f413c2..e4af87f76a 100644
--- a/lib/tpm-common.c
+++ b/lib/tpm-common.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/unaligned.h>
 #include <tpm-common.h>
 #include "tpm-utils.h"
diff --git a/lib/tpm-v1.c b/lib/tpm-v1.c
index b4498e6afc..a846fe00dd 100644
--- a/lib/tpm-v1.c
+++ b/lib/tpm-v1.c
@@ -8,6 +8,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <asm/unaligned.h>
 #include <u-boot/sha1.h>
 #include <tpm-common.h>
diff --git a/lib/tpm-v2.c b/lib/tpm-v2.c
index f89592d6e2..5a039f65d1 100644
--- a/lib/tpm-v2.c
+++ b/lib/tpm-v2.c
@@ -8,6 +8,7 @@
 #include <dm.h>
 #include <tpm-common.h>
 #include <tpm-v2.h>
+#include <linux/bitops.h>
 #include "tpm-utils.h"
 
 u32 tpm2_startup(struct udevice *dev, enum tpm2_startup_types mode)
diff --git a/lib/uuid.c b/lib/uuid.c
index c1cb9df6aa..e62d5ca264 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -4,8 +4,11 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <env.h>
+#include <rand.h>
 #include <time.h>
+#include <uuid.h>
 #include <linux/ctype.h>
 #include <errno.h>
 #include <common.h>
@@ -284,7 +287,7 @@ void gen_rand_uuid_str(char *uuid_str, int str_format)
 }
 
 #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_CMD_UUID)
-int do_uuid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_uuid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	char uuid[UUID_STR_LEN + 1];
 	int str_format;
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index b4edee29b0..de9ef902b9 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -19,6 +19,7 @@
 #include <div64.h>
 #include <hexdump.h>
 #include <stdarg.h>
+#include <uuid.h>
 #include <vsprintf.h>
 #include <linux/ctype.h>
 #include <linux/err.h>
diff --git a/net/arp.c b/net/arp.c
index b49c3d3ced..1d06ed2572 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -10,6 +10,10 @@
  */
 
 #include <common.h>
+#include <env.h>
+#include <log.h>
+#include <net.h>
+#include <linux/delay.h>
 
 #include "arp.h"
 
diff --git a/net/bootp.c b/net/bootp.c
index 505489140e..de3dab4114 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -9,10 +9,15 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
 #include <efi_loader.h>
+#include <log.h>
 #include <net.h>
+#include <rand.h>
+#include <uuid.h>
+#include <linux/delay.h>
 #include <net/tftp.h>
 #include "bootp.h"
 #ifdef CONFIG_LED_STATUS
diff --git a/net/dns.c b/net/dns.c
index 67d761d7c0..e35c4dca7c 100644
--- a/net/dns.c
+++ b/net/dns.c
@@ -25,6 +25,7 @@
 #include <common.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <asm/unaligned.h>
 
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 8bf2eabe90..7f89f65c92 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -6,13 +6,16 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
 #include <net/pcap.h>
 #include "eth_internal.h"
+#include <eth_phy.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -40,8 +43,12 @@ static int eth_errno;
 static struct eth_uclass_priv *eth_get_uclass_priv(void)
 {
 	struct uclass *uc;
+	int ret;
+
+	ret = uclass_get(UCLASS_ETH, &uc);
+	if (ret)
+		return NULL;
 
-	uclass_get(UCLASS_ETH, &uc);
 	assert(uc);
 	return uc->priv;
 }
@@ -102,6 +109,7 @@ struct udevice *eth_get_dev_by_name(const char *devname)
 	struct udevice *it;
 	struct uclass *uc;
 	int len = strlen("eth");
+	int ret;
 
 	/* Must be longer than 3 to be an alias */
 	if (!strncmp(devname, "eth", len) && strlen(devname) > len) {
@@ -109,7 +117,10 @@ struct udevice *eth_get_dev_by_name(const char *devname)
 		seq = simple_strtoul(startp, &endp, 10);
 	}
 
-	uclass_get(UCLASS_ETH, &uc);
+	ret = uclass_get(UCLASS_ETH, &uc);
+	if (ret)
+		return NULL;
+
 	uclass_foreach_dev(it, uc) {
 		/*
 		 * We need the seq to be valid, so try to probe it.
@@ -453,6 +464,10 @@ static int eth_post_bind(struct udevice *dev)
 		return -EINVAL;
 	}
 
+#ifdef CONFIG_DM_ETH_PHY
+	eth_phy_binds_nodes(dev);
+#endif
+
 	return 0;
 }
 
diff --git a/net/eth_common.c b/net/eth_common.c
index ed26b1b693..58f899a024 100644
--- a/net/eth_common.c
+++ b/net/eth_common.c
@@ -6,6 +6,7 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <dm.h>
 #include <env.h>
 #include <miiphy.h>
diff --git a/net/eth_legacy.c b/net/eth_legacy.c
index 5d6b0d7d7f..35f8d398a6 100644
--- a/net/eth_legacy.c
+++ b/net/eth_legacy.c
@@ -6,10 +6,13 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <phy.h>
+#include <linux/bug.h>
 #include <linux/errno.h>
 #include <net/pcap.h>
 #include "eth_internal.h"
diff --git a/net/fastboot.c b/net/fastboot.c
index 8afc5529cd..0c57fb9947 100644
--- a/net/fastboot.c
+++ b/net/fastboot.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <command.h>
 #include <fastboot.h>
 #include <net.h>
 #include <net/fastboot.h>
diff --git a/net/link_local.c b/net/link_local.c
index 1986b9b9d3..8aec3c7996 100644
--- a/net/link_local.c
+++ b/net/link_local.c
@@ -13,6 +13,7 @@
 
 #include <common.h>
 #include <env.h>
+#include <log.h>
 #include <net.h>
 #include <rand.h>
 #include "arp.h"
diff --git a/net/mdio-mux-uclass.c b/net/mdio-mux-uclass.c
index e425207d6e..6674eb6bee 100644
--- a/net/mdio-mux-uclass.c
+++ b/net/mdio-mux-uclass.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <miiphy.h>
 #include <dm/device-internal.h>
 #include <dm/uclass-internal.h>
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.c
index 8e7872155a..66ee2e1976 100644
--- a/net/mdio-uclass.c
+++ b/net/mdio-uclass.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <miiphy.h>
 #include <dm/device-internal.h>
diff --git a/net/net.c b/net/net.c
index 087d399a24..37932919d0 100644
--- a/net/net.c
+++ b/net/net.c
@@ -88,12 +88,14 @@
 
 
 #include <common.h>
+#include <bootstage.h>
 #include <command.h>
 #include <console.h>
 #include <env.h>
 #include <env_internal.h>
 #include <errno.h>
 #include <image.h>
+#include <log.h>
 #include <net.h>
 #include <net/fastboot.h>
 #include <net/tftp.h>
diff --git a/net/nfs.c b/net/nfs.c
index 72e1018a3b..70d0e08bde 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -30,6 +30,7 @@
 #include <command.h>
 #include <flash.h>
 #include <image.h>
+#include <log.h>
 #include <net.h>
 #include <malloc.h>
 #include <mapmem.h>
diff --git a/net/ping.c b/net/ping.c
index 633c942e67..0e33660f6c 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -11,6 +11,8 @@
 
 #include "ping.h"
 #include "arp.h"
+#include <log.h>
+#include <net.h>
 
 static ushort ping_seq_number;
 
diff --git a/net/rarp.c b/net/rarp.c
index c1d9fcaf25..a676a4253b 100644
--- a/net/rarp.c
+++ b/net/rarp.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <net.h>
 #include <net/tftp.h>
 #include "nfs.h"
diff --git a/net/sntp.c b/net/sntp.c
index 9c8ee34a4e..39d7664a22 100644
--- a/net/sntp.c
+++ b/net/sntp.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <dm.h>
+#include <log.h>
 #include <net.h>
 #include <rtc.h>
 
diff --git a/net/tftp.c b/net/tftp.c
index be24e63075..180140e495 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -11,6 +11,8 @@
 #include <efi_loader.h>
 #include <env.h>
 #include <image.h>
+#include <lmb.h>
+#include <log.h>
 #include <mapmem.h>
 #include <net.h>
 #include <net/tftp.h>
diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c
index 16210c65ab..cc971a8909 100644
--- a/post/cpu/mpc83xx/ecc.c
+++ b/post/cpu/mpc83xx/ecc.c
@@ -11,6 +11,7 @@
 #include <common.h>
 #include <cpu_func.h>
 #include <irq_func.h>
+#include <log.h>
 #include <mpc83xx.h>
 #include <watchdog.h>
 #include <asm/io.h>
diff --git a/post/drivers/i2c.c b/post/drivers/i2c.c
index 8b7967cd9d..3b378921fa 100644
--- a/post/drivers/i2c.c
+++ b/post/drivers/i2c.c
@@ -22,6 +22,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <post.h>
 #include <i2c.h>
 
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index 571394dc63..9cc48b1ccc 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -5,6 +5,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 
 /* Memory test
  *
diff --git a/post/lib_powerpc/multi.c b/post/lib_powerpc/multi.c
index 7807eb17ac..f082e4c546 100644
--- a/post/lib_powerpc/multi.c
+++ b/post/lib_powerpc/multi.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <irq_func.h>
+#include <log.h>
 
 /*
  * CPU test
diff --git a/post/post.c b/post/post.c
index 696a60f70a..6687e0b75c 100644
--- a/post/post.c
+++ b/post/post.c
@@ -5,7 +5,9 @@
  */
 
 #include <common.h>
+#include <bootstage.h>
 #include <env.h>
+#include <log.h>
 #include <malloc.h>
 #include <stdio_dev.h>
 #include <time.h>
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 63fbadd757..734001c952 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -418,6 +418,8 @@ $(obj)/efi_reloc.o: $(srctree)/arch/$(ARCH)/lib/$(EFI_RELOC:.o=.c) $(recordmcoun
 $(obj)/%_efi.so: $(obj)/%.o $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/efi_freestanding.o
 	$(call cmd,efi_ld)
 
+targets += $(obj)/efi_crt0.o $(obj)/efi_reloc.o $(obj)/efi_freestanding.o
+
 # ACPI
 # ---------------------------------------------------------------------------
 #
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 6741ef911e..e6d56a1286 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -459,11 +459,14 @@ dtbs:
 # information in a variable so we can use it in if_changed and friends.
 .PHONY: $(PHONY)
 
-SHRUNK_ARCH_DTB = $(patsubst %,$(obj)/dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST)))
+SPL_OF_LIST_TARGETS = $(patsubst %,dts/%.dtb,$(subst ",,$(CONFIG_SPL_OF_LIST)))
+SHRUNK_ARCH_DTB = $(addprefix $(obj)/,$(SPL_OF_LIST_TARGETS))
 .SECONDEXPANSION:
-$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@)
+$(SHRUNK_ARCH_DTB): $$(patsubst $(obj)/dts/%, arch/$(ARCH)/dts/%, $$@) dts_dir
 	$(call if_changed,fdtgrep)
 
+targets += $(SPL_OF_LIST_TARGETS)
+
 MKIMAGEFLAGS_$(SPL_BIN).multidtb.fit = -f auto -A $(ARCH) -T firmware -C none -O u-boot \
 	-n "Multi DTB fit image for $(SPL_BIN)" -E \
 	$(patsubst %,-b %,$(SHRUNK_ARCH_DTB))
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 6908431d03..fe9a1971cc 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -22,7 +22,6 @@ CONFIG_AEMIF_CNTRL_BASE
 CONFIG_ALTERA_SPI_IDLE_VAL
 CONFIG_ALTIVEC
 CONFIG_ALU
-CONFIG_AM335X_LCD
 CONFIG_AM335X_USB0
 CONFIG_AM335X_USB0_MODE
 CONFIG_AM335X_USB1
@@ -37,12 +36,9 @@ CONFIG_APUS_FAST_EXCEPT
 CONFIG_ARCH_ADPAG101P
 CONFIG_ARCH_HAS_ILOG2_U32
 CONFIG_ARCH_HAS_ILOG2_U64
-CONFIG_ARCH_KIRKWOOD
 CONFIG_ARCH_MAP_SYSMEM
 CONFIG_ARCH_OMAP4
-CONFIG_ARCH_ORION5X
 CONFIG_ARCH_RMOBILE_EXTRAM_BOOT
-CONFIG_ARCH_TEGRA
 CONFIG_ARCH_USE_BUILTIN_BSWAP
 CONFIG_ARC_MMU_VER
 CONFIG_ARMADA100
@@ -165,7 +161,6 @@ CONFIG_BTB
 CONFIG_BUFNO_AUTO_INCR_BIT
 CONFIG_BUILD_ENVCRC
 CONFIG_BUS_WIDTH
-CONFIG_BZIP2
 CONFIG_CALXEDA_XGMAC
 CONFIG_CDP_APPLIANCE_VLAN_TYPE
 CONFIG_CDP_CAPABILITIES
@@ -308,7 +303,6 @@ CONFIG_DEFAULT
 CONFIG_DEFAULT_CONSOLE
 CONFIG_DEFAULT_IMMR
 CONFIG_DEF_HWCONFIG
-CONFIG_DELAY_ENVIRONMENT
 CONFIG_DESIGNWARE_ETH
 CONFIG_DEVELOP
 CONFIG_DEVICE_TREE_LIST
@@ -421,7 +415,6 @@ CONFIG_ENABLE_36BIT_PHYS
 CONFIG_ENABLE_MMU
 CONFIG_ENABLE_MUST_CHECK
 CONFIG_ENABLE_WARN_DEPRECATED
-CONFIG_ENV_ACCESS_IGNORE_FORCE
 CONFIG_ENV_ADDR_FLEX
 CONFIG_ENV_CALLBACK_LIST_DEFAULT
 CONFIG_ENV_CALLBACK_LIST_STATIC
@@ -593,7 +586,6 @@ CONFIG_FSL_SERDES
 CONFIG_FSL_SERDES1
 CONFIG_FSL_SERDES2
 CONFIG_FSL_SGMII_RISER
-CONFIG_FSL_SPI_INTERFACE
 CONFIG_FSL_TBCLK_EXTRA_DIV
 CONFIG_FSL_TRUST_ARCH_v1
 CONFIG_FSL_VIA
@@ -650,8 +642,6 @@ CONFIG_GPIO_LED_STUBS
 CONFIG_GREEN_LED
 CONFIG_GURNARD_FPGA
 CONFIG_GURNARD_SPLASH
-CONFIG_GZIP_COMPRESSED
-CONFIG_GZIP_COMPRESS_DEF_SZ
 CONFIG_G_DNL_THOR_PRODUCT_NUM
 CONFIG_G_DNL_THOR_VENDOR_NUM
 CONFIG_G_DNL_UMS_PRODUCT_NUM
@@ -948,8 +938,6 @@ CONFIG_KONA
 CONFIG_KONA_GPIO
 CONFIG_KONA_RESET_S
 CONFIG_KPROBES
-CONFIG_KS8851_MLL
-CONFIG_KS8851_MLL_BASEADDR
 CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE
 CONFIG_KSNAV_NETCP_PDMA_RX_BASE
 CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM
@@ -1036,7 +1024,6 @@ CONFIG_LPC32XX_NAND_SLC_WDR_CLKS
 CONFIG_LPC32XX_NAND_SLC_WHOLD
 CONFIG_LPC32XX_NAND_SLC_WSETUP
 CONFIG_LPC32XX_NAND_SLC_WWIDTH
-CONFIG_LPC32XX_SSP_TIMEOUT
 CONFIG_LPC_BASE
 CONFIG_LPC_IO_BASE
 CONFIG_LPUART
@@ -1159,7 +1146,6 @@ CONFIG_MX35_CLK32
 CONFIG_MX35_HCLK_FREQ
 CONFIG_MX6DL_LPDDR2
 CONFIG_MX6DQ_LPDDR2
-CONFIG_MX6SX_SABRESD_REVA
 CONFIG_MXC_EPDC
 CONFIG_MXC_GPT_HCLK
 CONFIG_MXC_MCI_REGS_BASE
@@ -1190,7 +1176,6 @@ CONFIG_NAND_KIRKWOOD
 CONFIG_NAND_KMETER1
 CONFIG_NAND_LPC32XX_MLC
 CONFIG_NAND_MODE_REG
-CONFIG_NAND_MXC_V1_1
 CONFIG_NAND_OMAP_ECCSCHEME
 CONFIG_NAND_OMAP_GPMC_WSCFG
 CONFIG_NAND_SECBOOT
@@ -1295,8 +1280,6 @@ CONFIG_PCI_SYS_BUS
 CONFIG_PCI_SYS_PHYS
 CONFIG_PCI_SYS_SIZE
 CONFIG_PCNET
-CONFIG_PCNET_79C973
-CONFIG_PCNET_79C975
 CONFIG_PEN_ADDR_BIG_ENDIAN
 CONFIG_PERIF1_FREQ
 CONFIG_PERIF2_FREQ
@@ -1528,9 +1511,7 @@ CONFIG_SETUP_MEMORY_TAGS
 CONFIG_SET_BIST
 CONFIG_SET_BOOTARGS
 CONFIG_SET_DFU_ALT_BUF_LEN
-CONFIG_SET_DFU_ALT_INFO
 CONFIG_SFIO
-CONFIG_SF_DATAFLASH
 CONFIG_SGI_IP28
 CONFIG_SH4_PCI
 CONFIG_SH73A0
@@ -1745,7 +1726,6 @@ CONFIG_STV0991_HZ
 CONFIG_STV0991_HZ_CLOCK
 CONFIG_ST_SMI
 CONFIG_SUNXI_MAX_FB_SIZE
-CONFIG_SUVD3
 CONFIG_SXNI855T
 CONFIG_SYSFLAGS_ADDR
 CONFIG_SYSFS
@@ -1773,7 +1753,6 @@ CONFIG_SYS_AMASK4
 CONFIG_SYS_AMASK5
 CONFIG_SYS_AMASK6
 CONFIG_SYS_AMASK7
-CONFIG_SYS_ARM_CACHE_WRITETHROUGH
 CONFIG_SYS_AT91_CPU_NAME
 CONFIG_SYS_AT91_MAIN_CLOCK
 CONFIG_SYS_AT91_PLLA
@@ -2583,11 +2562,9 @@ CONFIG_SYS_FSL_QBMAN_SIZE_1
 CONFIG_SYS_FSL_QMAN_ADDR
 CONFIG_SYS_FSL_QMAN_OFFSET
 CONFIG_SYS_FSL_QMAN_V3
-CONFIG_SYS_FSL_QSPI_AHB
 CONFIG_SYS_FSL_QSPI_BASE
 CONFIG_SYS_FSL_QSPI_BASE1
 CONFIG_SYS_FSL_QSPI_BASE2
-CONFIG_SYS_FSL_QSPI_BE
 CONFIG_SYS_FSL_QSPI_LE
 CONFIG_SYS_FSL_QSPI_SIZE
 CONFIG_SYS_FSL_QSPI_SIZE1
@@ -3082,9 +3059,6 @@ CONFIG_SYS_MECR_VAL
 CONFIG_SYS_MEMAC_LITTLE_ENDIAN
 CONFIG_SYS_MEMORY_BASE
 CONFIG_SYS_MEMORY_SIZE
-CONFIG_SYS_MEMTEST_END
-CONFIG_SYS_MEMTEST_SCRATCH
-CONFIG_SYS_MEMTEST_START
 CONFIG_SYS_MEM_MAP
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MEM_SIZE
@@ -3198,7 +3172,6 @@ CONFIG_SYS_MRAM_SIZE
 CONFIG_SYS_MSC0_VAL
 CONFIG_SYS_MSC1_VAL
 CONFIG_SYS_MSC2_VAL
-CONFIG_SYS_MTDPARTS_RUNTIME
 CONFIG_SYS_MX5_CLK32
 CONFIG_SYS_MX5_HCLK
 CONFIG_SYS_MX6_CLK32
@@ -4081,9 +4054,6 @@ CONFIG_TSECV2_1
 CONFIG_TSEC_TBI
 CONFIG_TSEC_TBICR_SETTINGS
 CONFIG_TULIP
-CONFIG_TULIP_FIX_DAVICOM
-CONFIG_TULIP_SELECT_MEDIA
-CONFIG_TULIP_USE_IO
 CONFIG_TWL6030_INPUT
 CONFIG_TWL6030_POWER
 CONFIG_TWR
diff --git a/scripts/dtc/libfdt/fdt_overlay.c b/scripts/dtc/libfdt/fdt_overlay.c
index be71873366..c090e6991e 100644
--- a/scripts/dtc/libfdt/fdt_overlay.c
+++ b/scripts/dtc/libfdt/fdt_overlay.c
@@ -879,3 +879,8 @@ err:
 
 	return ret;
 }
+
+int fdt_overlay_apply_node(void *fdt, int target, void *fdto, int node)
+{
+	return overlay_apply_node(fdt, target, fdto, node);
+}
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
index fa63fffe28..421f90ad93 100644
--- a/scripts/dtc/libfdt/libfdt.h
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -2032,6 +2032,13 @@ int fdt_del_node(void *fdt, int nodeoffset);
  */
 int fdt_overlay_apply(void *fdt, void *fdto);
 
+/**
+ * fdt_overlay_apply_node - Merges a node into the base device tree
+ *
+ * See overlay_apply_node() for details.
+ */
+int fdt_overlay_apply_node(void *fdt, int target, void *fdto, int node);
+
 /**********************************************************************/
 /* Debugging / informational functions                                */
 /**********************************************************************/
diff --git a/scripts/get_default_envs.sh b/scripts/get_default_envs.sh
index da86a9d69c..d1f2ce4d5c 100755
--- a/scripts/get_default_envs.sh
+++ b/scripts/get_default_envs.sh
@@ -35,7 +35,7 @@ cp ${env_obj_file_path} ${ENV_OBJ_FILE_COPY}
 ${OBJCOPY} -O binary -j ".rodata.default_environment" ${ENV_OBJ_FILE_COPY}
 
 # Replace default '\0' with '\n' and sort entries
-tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort -u
+tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort --field-separator== -k1,1 --stable
 
 rm ${ENV_OBJ_FILE_COPY}
 
diff --git a/test/bloblist.c b/test/bloblist.c
index bdcca0291c..4e537ee1b9 100644
--- a/test/bloblist.c
+++ b/test/bloblist.c
@@ -234,7 +234,8 @@ static int bloblist_test_checksum(struct unit_test_state *uts)
 
 BLOBLIST_TEST(bloblist_test_checksum, 0);
 
-int do_ut_bloblist(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ut_bloblist(struct cmd_tbl *cmdtp, int flag, int argc,
+		   char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
 						 bloblist_test);
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index bd20a69c55..cc9543c315 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -9,11 +9,12 @@
 #include <test/suites.h>
 #include <test/test.h>
 
-static int do_ut_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
+static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[]);
 
 int cmd_ut_category(const char *name, const char *prefix,
 		    struct unit_test *tests, int n_ents,
-		    int argc, char * const argv[])
+		    int argc, char *const argv[])
 {
 	struct unit_test_state uts = { .fail_count = 0 };
 	struct unit_test *test;
@@ -43,7 +44,7 @@ int cmd_ut_category(const char *name, const char *prefix,
 	return uts.fail_count ? CMD_RET_FAILURE : 0;
 }
 
-static cmd_tbl_t cmd_ut_sub[] = {
+static struct cmd_tbl cmd_ut_sub[] = {
 	U_BOOT_CMD_MKENT(all, CONFIG_SYS_MAXARGS, 1, do_ut_all, "", ""),
 #if defined(CONFIG_UT_DM)
 	U_BOOT_CMD_MKENT(dm, CONFIG_SYS_MAXARGS, 1, do_ut_dm, "", ""),
@@ -79,7 +80,8 @@ static cmd_tbl_t cmd_ut_sub[] = {
 #endif
 };
 
-static int do_ut_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ut_all(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	int i;
 	int retval;
@@ -95,9 +97,9 @@ static int do_ut_all(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	return any_fail;
 }
 
-static int do_ut(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ut(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-	cmd_tbl_t *cp;
+	struct cmd_tbl *cp;
 
 	if (argc < 2)
 		return CMD_RET_USAGE;
diff --git a/test/command_ut.c b/test/command_ut.c
index 8e268e5ee5..9837d10eb5 100644
--- a/test/command_ut.c
+++ b/test/command_ut.c
@@ -7,12 +7,15 @@
 
 #include <common.h>
 #include <command.h>
+#include <env.h>
+#include <log.h>
 
 static const char test_cmd[] = "setenv list 1\n setenv list ${list}2; "
 		"setenv list ${list}3\0"
 		"setenv list ${list}4";
 
-static int do_ut_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int do_ut_cmd(struct cmd_tbl *cmdtp, int flag, int argc,
+		     char *const argv[])
 {
 	printf("%s: Testing commands\n", __func__);
 	run_command("env default -f -a", 0);
diff --git a/test/compression.c b/test/compression.c
index 63f929fa4b..a2a4b9ff9e 100644
--- a/test/compression.c
+++ b/test/compression.c
@@ -7,6 +7,8 @@
 #include <bootm.h>
 #include <command.h>
 #include <gzip.h>
+#include <image.h>
+#include <log.h>
 #include <lz4.h>
 #include <malloc.h>
 #include <mapmem.h>
@@ -162,7 +164,7 @@ static int compress_using_bzip2(struct unit_test_state *uts,
 {
 	/* There is no bzip2 compression in u-boot, so fake it. */
 	ut_asserteq(in_size, strlen(plain));
-	ut_asserteq(0, memcmp(plain, in, in_size));
+	ut_asserteq_mem(plain, in, in_size);
 
 	if (bzip2_compressed_size > out_max)
 		return -1;
@@ -197,7 +199,7 @@ static int compress_using_lzma(struct unit_test_state *uts,
 {
 	/* There is no lzma compression in u-boot, so fake it. */
 	ut_asserteq(in_size,  strlen(plain));
-	ut_asserteq(0, memcmp(plain, in, in_size));
+	ut_asserteq_mem(plain, in, in_size);
 
 	if (lzma_compressed_size > out_max)
 		return -1;
@@ -231,7 +233,7 @@ static int compress_using_lzo(struct unit_test_state *uts,
 {
 	/* There is no lzo compression in u-boot, so fake it. */
 	ut_asserteq(in_size,  strlen(plain));
-	ut_asserteq(0, memcmp(plain, in, in_size));
+	ut_asserteq_mem(plain, in, in_size);
 
 	if (lzo_compressed_size > out_max)
 		return -1;
@@ -266,7 +268,7 @@ static int compress_using_lz4(struct unit_test_state *uts,
 {
 	/* There is no lz4 compression in u-boot, so fake it. */
 	ut_asserteq(in_size,  strlen(plain));
-	ut_asserteq(0, memcmp(plain, in, in_size));
+	ut_asserteq_mem(plain, in, in_size);
 
 	if (lz4_compressed_size > out_max)
 		return -1;
@@ -534,7 +536,8 @@ static int compression_test_bootm_none(struct unit_test_state *uts)
 }
 COMPRESSION_TEST(compression_test_bootm_none, 0);
 
-int do_ut_compression(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int argc,
+		      char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
 						 compression_test);
diff --git a/test/dm/acpi.c b/test/dm/acpi.c
index e7b8abd556..4c46dd83a6 100644
--- a/test/dm/acpi.c
+++ b/test/dm/acpi.c
@@ -7,13 +7,36 @@
  */
 
 #include <common.h>
+#include <console.h>
 #include <dm.h>
+#include <malloc.h>
+#include <mapmem.h>
+#include <version.h>
+#include <tables_csum.h>
+#include <version.h>
 #include <acpi/acpi_table.h>
 #include <dm/acpi.h>
 #include <dm/test.h>
 #include <test/ut.h>
 
 #define ACPI_TEST_DEV_NAME	"ABCD"
+#define BUF_SIZE		4096
+
+static int testacpi_write_tables(const struct udevice *dev,
+				 struct acpi_ctx *ctx)
+{
+	struct acpi_dmar *dmar;
+	int ret;
+
+	dmar = (struct acpi_dmar *)ctx->current;
+	acpi_create_dmar(dmar, DMAR_INTR_REMAP);
+	ctx->current += sizeof(struct acpi_dmar);
+	ret = acpi_add_table(ctx, dmar);
+	if (ret)
+		return log_msg_ret("add", ret);
+
+	return 0;
+}
 
 static int testacpi_get_name(const struct udevice *dev, char *out_name)
 {
@@ -22,6 +45,7 @@ static int testacpi_get_name(const struct udevice *dev, char *out_name)
 
 struct acpi_ops testacpi_ops = {
 	.get_name	= testacpi_get_name,
+	.write_tables	= testacpi_write_tables,
 };
 
 static const struct udevice_id testacpi_ids[] = {
@@ -68,8 +92,6 @@ static int dm_test_acpi_get_table_revision(struct unit_test_state *uts)
 DM_TEST(dm_test_acpi_get_table_revision,
 	DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 
-/* Temporary change to ensure bisectability */
-#ifndef CONFIG_SANDBOX
 /* Test acpi_create_dmar() */
 static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
 {
@@ -82,4 +104,214 @@ static int dm_test_acpi_create_dmar(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_acpi_create_dmar, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-#endif
+
+/* Test acpi_fill_header() */
+static int dm_test_acpi_fill_header(struct unit_test_state *uts)
+{
+	struct acpi_table_header hdr;
+
+	/* Make sure these 5 fields are not changed */
+	hdr.length = 0x11;
+	hdr.revision = 0x22;
+	hdr.checksum = 0x33;
+	hdr.aslc_revision = 0x44;
+	acpi_fill_header(&hdr, "ABCD");
+
+	ut_asserteq_mem("ABCD", hdr.signature, sizeof(hdr.signature));
+	ut_asserteq(0x11, hdr.length);
+	ut_asserteq(0x22, hdr.revision);
+	ut_asserteq(0x33, hdr.checksum);
+	ut_asserteq_mem(OEM_ID, hdr.oem_id, sizeof(hdr.oem_id));
+	ut_asserteq_mem(OEM_TABLE_ID, hdr.oem_table_id,
+			sizeof(hdr.oem_table_id));
+	ut_asserteq(U_BOOT_BUILD_DATE, hdr.oem_revision);
+	ut_asserteq_mem(ASLC_ID, hdr.aslc_id, sizeof(hdr.aslc_id));
+	ut_asserteq(0x44, hdr.aslc_revision);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_fill_header, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test ACPI write_tables() */
+static int dm_test_acpi_write_tables(struct unit_test_state *uts)
+{
+	struct acpi_dmar *dmar;
+	struct acpi_ctx ctx;
+	void *buf;
+
+	buf = malloc(BUF_SIZE);
+	ut_assertnonnull(buf);
+
+	acpi_setup_base_tables(&ctx, buf);
+	dmar = ctx.current;
+	ut_assertok(acpi_write_dev_tables(&ctx));
+
+	/*
+	 * We should have two dmar tables, one for each "denx,u-boot-acpi-test"
+	 * device
+	 */
+	ut_asserteq_ptr(dmar + 2, ctx.current);
+	ut_asserteq(DMAR_INTR_REMAP, dmar->flags);
+	ut_asserteq(32 - 1, dmar->host_address_width);
+
+	ut_asserteq(DMAR_INTR_REMAP, dmar[1].flags);
+	ut_asserteq(32 - 1, dmar[1].host_address_width);
+
+	/* Check that the pointers were added correctly */
+	ut_asserteq(map_to_sysmem(dmar), ctx.rsdt->entry[0]);
+	ut_asserteq(map_to_sysmem(dmar + 1), ctx.rsdt->entry[1]);
+	ut_asserteq(0, ctx.rsdt->entry[2]);
+
+	ut_asserteq(map_to_sysmem(dmar), ctx.xsdt->entry[0]);
+	ut_asserteq(map_to_sysmem(dmar + 1), ctx.xsdt->entry[1]);
+	ut_asserteq(0, ctx.xsdt->entry[2]);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_write_tables, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test basic ACPI functions */
+static int dm_test_acpi_basic(struct unit_test_state *uts)
+{
+	struct acpi_ctx ctx;
+
+	/* Check align works */
+	ctx.current = (void *)5;
+	acpi_align(&ctx);
+	ut_asserteq_ptr((void *)16, ctx.current);
+
+	/* Check that align does nothing if already aligned */
+	acpi_align(&ctx);
+	ut_asserteq_ptr((void *)16, ctx.current);
+	acpi_align64(&ctx);
+	ut_asserteq_ptr((void *)64, ctx.current);
+	acpi_align64(&ctx);
+	ut_asserteq_ptr((void *)64, ctx.current);
+
+	/* Check incrementing */
+	acpi_inc(&ctx, 3);
+	ut_asserteq_ptr((void *)67, ctx.current);
+	acpi_inc_align(&ctx, 3);
+	ut_asserteq_ptr((void *)80, ctx.current);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_basic, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test acpi_setup_base_tables */
+static int dm_test_acpi_setup_base_tables(struct unit_test_state *uts)
+{
+	struct acpi_rsdp *rsdp;
+	struct acpi_rsdt *rsdt;
+	struct acpi_xsdt *xsdt;
+	struct acpi_ctx ctx;
+	void *buf, *end;
+
+	/*
+	 * Use an unaligned address deliberately, by allocating an aligned
+	 * address and then adding 4 to it
+	 */
+	buf = memalign(64, BUF_SIZE);
+	ut_assertnonnull(buf);
+	acpi_setup_base_tables(&ctx, buf + 4);
+	ut_asserteq(map_to_sysmem(PTR_ALIGN(buf + 4, 16)), gd->arch.acpi_start);
+
+	rsdp = buf + 16;
+	ut_asserteq_ptr(rsdp, ctx.rsdp);
+	ut_asserteq_mem(RSDP_SIG, rsdp->signature, sizeof(rsdp->signature));
+	ut_asserteq(sizeof(*rsdp), rsdp->length);
+	ut_assertok(table_compute_checksum(rsdp, 20));
+	ut_assertok(table_compute_checksum(rsdp, sizeof(*rsdp)));
+
+	rsdt = PTR_ALIGN((void *)rsdp + sizeof(*rsdp), 16);
+	ut_asserteq_ptr(rsdt, ctx.rsdt);
+	ut_asserteq_mem("RSDT", rsdt->header.signature, ACPI_NAME_LEN);
+	ut_asserteq(sizeof(*rsdt), rsdt->header.length);
+	ut_assertok(table_compute_checksum(rsdt, sizeof(*rsdt)));
+
+	xsdt = PTR_ALIGN((void *)rsdt + sizeof(*rsdt), 16);
+	ut_asserteq_ptr(xsdt, ctx.xsdt);
+	ut_asserteq_mem("XSDT", xsdt->header.signature, ACPI_NAME_LEN);
+	ut_asserteq(sizeof(*xsdt), xsdt->header.length);
+	ut_assertok(table_compute_checksum(xsdt, sizeof(*xsdt)));
+
+	end = PTR_ALIGN((void *)xsdt + sizeof(*xsdt), 64);
+	ut_asserteq_ptr(end, ctx.current);
+
+	ut_asserteq(map_to_sysmem(rsdt), rsdp->rsdt_address);
+	ut_asserteq(map_to_sysmem(xsdt), rsdp->xsdt_address);
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_setup_base_tables,
+	DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test 'acpi list' command */
+static int dm_test_acpi_cmd_list(struct unit_test_state *uts)
+{
+	struct acpi_ctx ctx;
+	ulong addr;
+	void *buf;
+
+	buf = memalign(16, BUF_SIZE);
+	ut_assertnonnull(buf);
+	acpi_setup_base_tables(&ctx, buf);
+
+	ut_assertok(acpi_write_dev_tables(&ctx));
+
+	console_record_reset();
+	run_command("acpi list", 0);
+	addr = (ulong)map_to_sysmem(buf);
+	ut_assert_nextline("ACPI tables start at %lx", addr);
+	ut_assert_nextline("RSDP %08lx %06lx (v02 U-BOOT)", addr,
+			   sizeof(struct acpi_rsdp));
+	addr = ALIGN(addr + sizeof(struct acpi_rsdp), 16);
+	ut_assert_nextline("RSDT %08lx %06lx (v01 U-BOOT U-BOOTBL %u INTL 0)",
+			   addr, sizeof(struct acpi_table_header) +
+			   2 * sizeof(u32), U_BOOT_BUILD_DATE);
+	addr = ALIGN(addr + sizeof(struct acpi_rsdt), 16);
+	ut_assert_nextline("XSDT %08lx %06lx (v01 U-BOOT U-BOOTBL %u INTL 0)",
+			   addr, sizeof(struct acpi_table_header) +
+			   2 * sizeof(u64), U_BOOT_BUILD_DATE);
+	addr = ALIGN(addr + sizeof(struct acpi_xsdt), 64);
+	ut_assert_nextline("DMAR %08lx %06lx (v01 U-BOOT U-BOOTBL %u INTL 0)",
+			   addr, sizeof(struct acpi_dmar), U_BOOT_BUILD_DATE);
+	addr = ALIGN(addr + sizeof(struct acpi_dmar), 16);
+	ut_assert_nextline("DMAR %08lx %06lx (v01 U-BOOT U-BOOTBL %u INTL 0)",
+			   addr, sizeof(struct acpi_dmar), U_BOOT_BUILD_DATE);
+	ut_assert_console_end();
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_cmd_list, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test 'acpi dump' command */
+static int dm_test_acpi_cmd_dump(struct unit_test_state *uts)
+{
+	struct acpi_ctx ctx;
+	ulong addr;
+	void *buf;
+
+	buf = memalign(16, BUF_SIZE);
+	ut_assertnonnull(buf);
+	acpi_setup_base_tables(&ctx, buf);
+
+	ut_assertok(acpi_write_dev_tables(&ctx));
+
+	/* First search for a non-existent table */
+	console_record_reset();
+	run_command("acpi dump rdst", 0);
+	ut_assert_nextline("Table 'RDST' not found");
+	ut_assert_console_end();
+
+	/* Now a real table */
+	console_record_reset();
+	run_command("acpi dump dmar", 0);
+	addr = ALIGN(map_to_sysmem(ctx.xsdt) + sizeof(struct acpi_xsdt), 64);
+	ut_assert_nextline("DMAR @ %08lx", addr);
+	ut_assert_nextlines_are_dump(0x30);
+	ut_assert_console_end();
+
+	return 0;
+}
+DM_TEST(dm_test_acpi_cmd_dump, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
diff --git a/test/dm/axi.c b/test/dm/axi.c
index e234ab82e6..e1155a51dd 100644
--- a/test/dm/axi.c
+++ b/test/dm/axi.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <axi.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/test.h>
 #include <test/ut.h>
 #include <asm/axi.h>
@@ -65,11 +66,11 @@ static int dm_test_axi_store(struct unit_test_state *uts)
 	/* Test writing */
 	val = 0x55667788;
 	axi_write(store, 0, &val, AXI_SIZE_32);
-	ut_asserteq(0, memcmp(data, tdata1, ARRAY_SIZE(tdata1)));
+	ut_asserteq_mem(data, tdata1, ARRAY_SIZE(tdata1));
 
 	val = 0xaabbccdd;
 	axi_write(store, 3, &val, AXI_SIZE_32);
-	ut_asserteq(0, memcmp(data + 3, tdata2, ARRAY_SIZE(tdata1)));
+	ut_asserteq_mem(data + 3, tdata2, ARRAY_SIZE(tdata1));
 
 	return 0;
 }
diff --git a/test/dm/blk.c b/test/dm/blk.c
index 9c71adc69d..94b2855b8e 100644
--- a/test/dm/blk.c
+++ b/test/dm/blk.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <part.h>
 #include <usb.h>
 #include <asm/state.h>
 #include <dm/test.h>
diff --git a/test/dm/board.c b/test/dm/board.c
index 0f267a1926..5472c65fad 100644
--- a/test/dm/board.c
+++ b/test/dm/board.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/test.h>
 #include <board.h>
 #include <test/ut.h>
diff --git a/test/dm/bootcount.c b/test/dm/bootcount.c
index 0817b7d3ec..be0c278907 100644
--- a/test/dm/bootcount.c
+++ b/test/dm/bootcount.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <bootcount.h>
+#include <log.h>
 #include <asm/test.h>
 #include <dm/test.h>
 #include <test/ut.h>
diff --git a/test/dm/bus.c b/test/dm/bus.c
index 1ad45adb60..73eb3aede3 100644
--- a/test/dm/bus.c
+++ b/test/dm/bus.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #ifdef CONFIG_SANDBOX
+#include <log.h>
 #include <os.h>
 #endif
 #include <dm.h>
diff --git a/test/dm/clk.c b/test/dm/clk.c
index 003b78934f..48fc3dd714 100644
--- a/test/dm/clk.c
+++ b/test/dm/clk.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <clk.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/clk.h>
 #include <dm/test.h>
diff --git a/test/dm/core.c b/test/dm/core.c
index f74c430843..6a930ae31a 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -9,6 +9,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/root.h>
diff --git a/test/dm/cpu.c b/test/dm/cpu.c
index e6dc576ea3..46683d884a 100644
--- a/test/dm/cpu.c
+++ b/test/dm/cpu.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/test.h>
 #include <dm/uclass-internal.h>
 #include <cpu.h>
@@ -26,6 +27,8 @@ static int dm_test_cpu(struct unit_test_state *uts)
 		ut_assert(dev->flags & DM_FLAG_ACTIVATED);
 
 	ut_assertok(uclass_get_device_by_name(UCLASS_CPU, "cpu-test1", &dev));
+	ut_asserteq_ptr(cpu_get_current_dev(), dev);
+	ut_asserteq(cpu_is_current(dev), 1);
 
 	ut_assertok(cpu_get_desc(dev, text, sizeof(text)));
 	ut_assertok(strcmp(text, "LEG Inc. SuperMegaUltraTurbo CPU No. 1"));
diff --git a/test/dm/devres.c b/test/dm/devres.c
index cbd0972c9b..b5de0cb191 100644
--- a/test/dm/devres.c
+++ b/test/dm/devres.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <errno.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/devres.h>
diff --git a/test/dm/dma.c b/test/dm/dma.c
index 12cba57a56..317ed4fe8c 100644
--- a/test/dm/dma.c
+++ b/test/dm/dma.c
@@ -30,8 +30,8 @@ static int dm_test_dma_m2m(struct unit_test_state *uts)
 		src_buf[i] = i;
 
 	ut_assertok(dma_memcpy(dst_buf, src_buf, len));
+	ut_asserteq_mem(src_buf, dst_buf, len);
 
-	ut_assertok(memcmp(src_buf, dst_buf, len));
 	return 0;
 }
 DM_TEST(dm_test_dma_m2m, DM_TESTF_SCAN_FDT);
@@ -72,7 +72,7 @@ static int dm_test_dma(struct unit_test_state *uts)
 
 	ut_assertok(dma_free(&dma_tx));
 	ut_assertok(dma_free(&dma_rx));
-	ut_assertok(memcmp(src_buf, dst_buf, len));
+	ut_asserteq_mem(src_buf, dst_buf, len);
 
 	return 0;
 }
@@ -117,7 +117,7 @@ static int dm_test_dma_rx(struct unit_test_state *uts)
 
 	ut_assertok(dma_free(&dma_tx));
 	ut_assertok(dma_free(&dma_rx));
-	ut_assertok(memcmp(src_buf, dst_buf, len));
+	ut_asserteq_mem(src_buf, dst_buf, len);
 
 	return 0;
 }
diff --git a/test/dm/eth.c b/test/dm/eth.c
index ad5354b4bf..1fddcaabb0 100644
--- a/test/dm/eth.c
+++ b/test/dm/eth.c
@@ -10,6 +10,7 @@
 #include <dm.h>
 #include <env.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <net.h>
 #include <dm/test.h>
@@ -281,17 +282,17 @@ static int sb_check_arp_reply(struct udevice *dev, void *packet,
 	ut_assert(arp_is_waiting());
 
 	/* Validate response */
-	ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0);
-	ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+	ut_asserteq_mem(eth->et_src, net_ethaddr, ARP_HLEN);
+	ut_asserteq_mem(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN);
 	ut_assert(eth->et_protlen == htons(PROT_ARP));
 
 	ut_assert(arp->ar_hrd == htons(ARP_ETHER));
 	ut_assert(arp->ar_pro == htons(PROT_IP));
 	ut_assert(arp->ar_hln == ARP_HLEN);
 	ut_assert(arp->ar_pln == ARP_PLEN);
-	ut_assert(memcmp(&arp->ar_sha, net_ethaddr, ARP_HLEN) == 0);
+	ut_asserteq_mem(&arp->ar_sha, net_ethaddr, ARP_HLEN);
 	ut_assert(net_read_ip(&arp->ar_spa).s_addr == net_ip.s_addr);
-	ut_assert(memcmp(&arp->ar_tha, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+	ut_asserteq_mem(&arp->ar_tha, priv->fake_host_hwaddr, ARP_HLEN);
 	ut_assert(net_read_ip(&arp->ar_tpa).s_addr ==
 		  string_to_ip("1.1.2.4").s_addr);
 
@@ -372,8 +373,8 @@ static int sb_check_ping_reply(struct udevice *dev, void *packet,
 	ut_assert(arp_is_waiting());
 
 	/* Validate response */
-	ut_assert(memcmp(eth->et_src, net_ethaddr, ARP_HLEN) == 0);
-	ut_assert(memcmp(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN) == 0);
+	ut_asserteq_mem(eth->et_src, net_ethaddr, ARP_HLEN);
+	ut_asserteq_mem(eth->et_dest, priv->fake_host_hwaddr, ARP_HLEN);
 	ut_assert(eth->et_protlen == htons(PROT_IP));
 
 	ut_assert(net_read_ip(&ip->ip_src).s_addr == net_ip.s_addr);
diff --git a/test/dm/gpio.c b/test/dm/gpio.c
index f5c7aaf3bc..b5ee4e4f87 100644
--- a/test/dm/gpio.c
+++ b/test/dm/gpio.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <fdtdec.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/root.h>
 #include <dm/test.h>
@@ -112,6 +113,95 @@ static int dm_test_gpio(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_gpio, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 
+/* Test that GPIO open-drain/open-source emulation works correctly */
+static int dm_test_gpio_opendrain_opensource(struct unit_test_state *uts)
+{
+	struct gpio_desc desc_list[8];
+	struct udevice *dev, *gpio_c;
+	char buf[80];
+
+	ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 0, &dev));
+	ut_asserteq_str("a-test", dev->name);
+
+	ut_assertok(uclass_get_device(UCLASS_GPIO, 3, &gpio_c));
+	ut_asserteq_str("pinmux-gpios", gpio_c->name);
+
+	ut_asserteq(8, gpio_request_list_by_name(dev, "test3-gpios", desc_list,
+						 ARRAY_SIZE(desc_list), 0))
+
+	ut_asserteq(true, !!device_active(gpio_c));
+	ut_asserteq_ptr(gpio_c, desc_list[0].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[1].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[2].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[3].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[4].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[5].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[6].dev);
+	ut_asserteq_ptr(gpio_c, desc_list[7].dev);
+
+	/* GPIO 0 is (GPIO_OUT|GPIO_OPEN_DRAIN) */
+	ut_asserteq(GPIOD_IS_OUT | GPIOD_OPEN_DRAIN,
+		    sandbox_gpio_get_dir_flags(gpio_c, 0));
+
+	/* Set it as output high, should become an input */
+	ut_assertok(dm_gpio_set_value(&desc_list[0], 1));
+	ut_assertok(gpio_get_status(gpio_c, 0, buf, sizeof(buf)));
+	ut_asserteq_str("c0: input: 0 [x] a-test.test3-gpios0", buf);
+
+	/* Set it as output low, should become output low */
+	ut_assertok(dm_gpio_set_value(&desc_list[0], 0));
+	ut_assertok(gpio_get_status(gpio_c, 0, buf, sizeof(buf)));
+	ut_asserteq_str("c0: output: 0 [x] a-test.test3-gpios0", buf);
+
+	/* GPIO 1 is (GPIO_OUT|GPIO_OPEN_SOURCE) */
+	ut_asserteq(GPIOD_IS_OUT | GPIOD_OPEN_SOURCE,
+		    sandbox_gpio_get_dir_flags(gpio_c, 1));
+
+	/* Set it as output high, should become output high */
+	ut_assertok(dm_gpio_set_value(&desc_list[1], 1));
+	ut_assertok(gpio_get_status(gpio_c, 1, buf, sizeof(buf)));
+	ut_asserteq_str("c1: output: 1 [x] a-test.test3-gpios1", buf);
+
+	/* Set it as output low, should become an input */
+	ut_assertok(dm_gpio_set_value(&desc_list[1], 0));
+	ut_assertok(gpio_get_status(gpio_c, 1, buf, sizeof(buf)));
+	ut_asserteq_str("c1: input: 1 [x] a-test.test3-gpios1", buf);
+
+	/* GPIO 6 is (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN) */
+	ut_asserteq(GPIOD_ACTIVE_LOW | GPIOD_IS_OUT | GPIOD_OPEN_DRAIN,
+		    sandbox_gpio_get_dir_flags(gpio_c, 6));
+
+	/* Set it as output high, should become output low */
+	ut_assertok(dm_gpio_set_value(&desc_list[6], 1));
+	ut_assertok(gpio_get_status(gpio_c, 6, buf, sizeof(buf)));
+	ut_asserteq_str("c6: output: 0 [x] a-test.test3-gpios6", buf);
+
+	/* Set it as output low, should become an input */
+	ut_assertok(dm_gpio_set_value(&desc_list[6], 0));
+	ut_assertok(gpio_get_status(gpio_c, 6, buf, sizeof(buf)));
+	ut_asserteq_str("c6: input: 0 [x] a-test.test3-gpios6", buf);
+
+	/* GPIO 7 is (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE) */
+	ut_asserteq(GPIOD_ACTIVE_LOW | GPIOD_IS_OUT | GPIOD_OPEN_SOURCE,
+		    sandbox_gpio_get_dir_flags(gpio_c, 7));
+
+	/* Set it as output high, should become an input */
+	ut_assertok(dm_gpio_set_value(&desc_list[7], 1));
+	ut_assertok(gpio_get_status(gpio_c, 7, buf, sizeof(buf)));
+	ut_asserteq_str("c7: input: 0 [x] a-test.test3-gpios7", buf);
+
+	/* Set it as output low, should become output high */
+	ut_assertok(dm_gpio_set_value(&desc_list[7], 0));
+	ut_assertok(gpio_get_status(gpio_c, 7, buf, sizeof(buf)));
+	ut_asserteq_str("c7: output: 1 [x] a-test.test3-gpios7", buf);
+
+	ut_assertok(gpio_free_list(dev, desc_list, 8));
+
+	return 0;
+}
+DM_TEST(dm_test_gpio_opendrain_opensource,
+	DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
 /* Test that sandbox anonymous GPIOs work correctly */
 static int dm_test_gpio_anon(struct unit_test_state *uts)
 {
diff --git a/test/dm/i2c.c b/test/dm/i2c.c
index cadbb43b9e..2025c4216d 100644
--- a/test/dm/i2c.c
+++ b/test/dm/i2c.c
@@ -51,10 +51,10 @@ static int dm_test_i2c_read_write(struct unit_test_state *uts)
 	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
 	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0AB\0", sizeof(buf));
 
 	return 0;
 }
@@ -123,7 +123,7 @@ static int dm_test_i2c_bytewise(struct unit_test_state *uts)
 	ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
 	ut_assertok(i2c_get_chip(bus, chip, 1, &dev));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
 
 	/* Tell the EEPROM to only read/write one register at a time */
 	ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
@@ -132,34 +132,34 @@ static int dm_test_i2c_bytewise(struct unit_test_state *uts)
 
 	/* Now we only get the first byte - the rest will be 0xff */
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 
 	/* If we do a separate transaction for each byte, it works */
 	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0\0\0\0", sizeof(buf));
 
 	/* This will only write A */
 	ut_assertok(i2c_set_chip_flags(dev, 0));
 	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 
 	/* Check that the B was ignored */
 	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0A\0\0\0", sizeof(buf));
 
 	/* Now write it again with the new flags, it should work */
 	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
 	ut_assertok(dm_i2c_write(dev, 2, (uint8_t *)"AB", 2));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\xff\xff\xff\xff", sizeof(buf));
 
 	ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
 						DM_I2C_CHIP_RD_ADDRESS));
 	ut_assertok(dm_i2c_read(dev, 0, buf, 5));
-	ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
+	ut_asserteq_mem(buf, "\0\0AB\0\0", sizeof(buf));
 
 	/* Restore defaults */
 	sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
diff --git a/test/dm/mdio.c b/test/dm/mdio.c
index dc229aed6d..ba1b54f27e 100644
--- a/test/dm/mdio.c
+++ b/test/dm/mdio.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/test.h>
 #include <misc.h>
 #include <test/ut.h>
diff --git a/test/dm/misc.c b/test/dm/misc.c
index 4d4232adf1..26fd6acecb 100644
--- a/test/dm/misc.c
+++ b/test/dm/misc.c
@@ -25,24 +25,24 @@ static int dm_test_misc(struct unit_test_state *uts)
 	ut_asserteq(5, misc_write(dev, 4, "WRITE", 5));
 	ut_asserteq(9, misc_read(dev, 0, buf, 9));
 
-	ut_assertok(memcmp(buf, "TESTWRITE", 9));
+	ut_asserteq_mem(buf, "TESTWRITE", 9);
 
 	/* Call tests */
 
 	id = 0;
 	ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
-	ut_assertok(memcmp(buf, "Zero", 4));
+	ut_asserteq_mem(buf, "Zero", 4);
 
 	id = 2;
 	ut_assertok(misc_call(dev, 0, &id, 4, buf, 16));
-	ut_assertok(memcmp(buf, "Two", 3));
+	ut_asserteq_mem(buf, "Two", 3);
 
 	ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
-	ut_assertok(memcmp(buf, "Forty-two", 9));
+	ut_asserteq_mem(buf, "Forty-two", 9);
 
 	id = 1;
 	ut_assertok(misc_call(dev, 1, &id, 4, buf, 16));
-	ut_assertok(memcmp(buf, "Forty-one", 9));
+	ut_asserteq_mem(buf, "Forty-one", 9);
 
 	/* IOCTL tests */
 
diff --git a/test/dm/mmc.c b/test/dm/mmc.c
index 9ab0db1b66..49402b9c90 100644
--- a/test/dm/mmc.c
+++ b/test/dm/mmc.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <dm.h>
 #include <mmc.h>
+#include <part.h>
 #include <dm/test.h>
 #include <test/ut.h>
 
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 1c49eaf38b..1114f34cbf 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -2,6 +2,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <dm/of_extra.h>
 #include <dm/test.h>
 #include <test/ut.h>
@@ -113,3 +114,24 @@ static int dm_test_ofnode_read_chosen(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_ofnode_read_chosen, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_ofnode_get_child_count(struct unit_test_state *uts)
+{
+	ofnode node, child_node;
+	u32 val;
+
+	node = ofnode_path("/i-test");
+	ut_assert(ofnode_valid(node));
+
+	val = ofnode_get_child_count(node);
+	ut_asserteq(3, val);
+
+	child_node = ofnode_first_subnode(node);
+	ut_assert(ofnode_valid(child_node));
+	val = ofnode_get_child_count(child_node);
+	ut_asserteq(0, val);
+
+	return 0;
+}
+DM_TEST(dm_test_ofnode_get_child_count,
+	DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
diff --git a/test/dm/osd.c b/test/dm/osd.c
index 6910690b3a..5739dfa0b8 100644
--- a/test/dm/osd.c
+++ b/test/dm/osd.c
@@ -71,27 +71,29 @@ static int dm_test_osd_basics(struct unit_test_state *uts)
 	ut_assertok(sandbox_osd_get_mem(dev, mem, memsize));
 	split(mem, memsize / 2, text, colors);
 
-	ut_assertok(memcmp(text, "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          ", memsize / 2));
-
-	ut_assertok(memcmp(colors, "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk", memsize / 2));
+	ut_asserteq_mem(text,
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          ", memsize / 2);
+
+	ut_asserteq_mem(colors,
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk", memsize / 2);
 
 	print_mem(mem, 10, 10);
 
@@ -100,27 +102,29 @@ static int dm_test_osd_basics(struct unit_test_state *uts)
 	ut_assertok(sandbox_osd_get_mem(dev, mem, memsize));
 	split(mem, memsize / 2, text, colors);
 
-	ut_assertok(memcmp(text, "          "
-				 " Blah     "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          "
-				 "          ", memsize / 2));
-
-	ut_assertok(memcmp(colors, "kkkkkkkkkk"
-				   "krrrrkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk"
-				   "kkkkkkkkkk", memsize / 2));
+	ut_asserteq_mem(text,
+			"          "
+			" Blah     "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          "
+			"          ", memsize / 2);
+
+	ut_asserteq_mem(colors,
+			"kkkkkkkkkk"
+			"krrrrkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk"
+			"kkkkkkkkkk", memsize / 2);
 
 	print_mem(mem, 10, 10);
 
@@ -152,17 +156,19 @@ static int dm_test_osd_extended(struct unit_test_state *uts)
 	ut_assertok(sandbox_osd_get_mem(dev, mem, memsize));
 	split(mem, memsize / 2, text, colors);
 
-	ut_assertok(memcmp(text, "                    "
-				 "                    "
-				 "                    "
-				 "                    "
-				 "                    ", memsize / 2));
+	ut_asserteq_mem(text,
+			"                    "
+			"                    "
+			"                    "
+			"                    "
+			"                    ", memsize / 2);
 
-	ut_assertok(memcmp(colors, "kkkkkkkkkkkkkkkkkkkk"
-				   "kkkkkkkkkkkkkkkkkkkk"
-				   "kkkkkkkkkkkkkkkkkkkk"
-				   "kkkkkkkkkkkkkkkkkkkk"
-				   "kkkkkkkkkkkkkkkkkkkk", memsize / 2));
+	ut_asserteq_mem(colors,
+			"kkkkkkkkkkkkkkkkkkkk"
+			"kkkkkkkkkkkkkkkkkkkk"
+			"kkkkkkkkkkkkkkkkkkkk"
+			"kkkkkkkkkkkkkkkkkkkk"
+			"kkkkkkkkkkkkkkkkkkkk", memsize / 2);
 
 	print_mem(mem, 20, 5);
 
@@ -192,17 +198,19 @@ static int dm_test_osd_extended(struct unit_test_state *uts)
 
 	print_mem(mem, 20, 5);
 
-	ut_assertok(memcmp(text, "+---- OSD menu ----+"
-				 "|  *  Entry 1      |"
-				 "| (*) Entry 2      |"
-				 "|  *  Entry 3      |"
-				 "+------------------+", memsize / 2));
-
-	ut_assertok(memcmp(colors, "gggggggggggggggggggg"
-				   "gkbbbbbbbbbbbkkkkkkg"
-				   "gkbbbbbbbbbbbkkkkkkg"
-				   "gkbbbbbbbbbbbkkkkkkg"
-				   "gggggggggggggggggggg", memsize / 2));
+	ut_asserteq_mem(text,
+			"+---- OSD menu ----+"
+			"|  *  Entry 1      |"
+			"| (*) Entry 2      |"
+			"|  *  Entry 3      |"
+			 "+------------------+", memsize / 2);
+
+	ut_asserteq_mem(colors,
+			"gggggggggggggggggggg"
+			"gkbbbbbbbbbbbkkkkkkg"
+			"gkbbbbbbbbbbbkkkkkkg"
+			"gkbbbbbbbbbbbkkkkkkg"
+			"gggggggggggggggggggg", memsize / 2);
 
 	return 0;
 }
diff --git a/test/dm/phy.c b/test/dm/phy.c
index 21d92194b9..99f0119557 100644
--- a/test/dm/phy.c
+++ b/test/dm/phy.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <generic-phy.h>
+#include <log.h>
 #include <dm/test.h>
 #include <test/ut.h>
 
@@ -110,3 +111,36 @@ static int dm_test_phy_ops(struct unit_test_state *uts)
 	return 0;
 }
 DM_TEST(dm_test_phy_ops, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+static int dm_test_phy_bulk(struct unit_test_state *uts)
+{
+	struct phy_bulk phys;
+	struct udevice *parent;
+
+	/* test normal operations */
+	ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS,
+					      "gen_phy_user1", &parent));
+
+	ut_assertok(generic_phy_get_bulk(parent, &phys));
+	ut_asserteq(2, phys.count);
+
+	ut_asserteq(0, generic_phy_init_bulk(&phys));
+	ut_asserteq(0, generic_phy_power_on_bulk(&phys));
+	ut_asserteq(0, generic_phy_power_off_bulk(&phys));
+	ut_asserteq(0, generic_phy_exit_bulk(&phys));
+
+	/* has a known problem phy */
+	ut_assertok(uclass_get_device_by_name(UCLASS_SIMPLE_BUS,
+					      "gen_phy_user", &parent));
+
+	ut_assertok(generic_phy_get_bulk(parent, &phys));
+	ut_asserteq(3, phys.count);
+
+	ut_asserteq(0, generic_phy_init_bulk(&phys));
+	ut_asserteq(-EIO, generic_phy_power_on_bulk(&phys));
+	ut_asserteq(-EIO, generic_phy_power_off_bulk(&phys));
+	ut_asserteq(0, generic_phy_exit_bulk(&phys));
+
+	return 0;
+}
+DM_TEST(dm_test_phy_bulk, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index b21f66732b..809494d585 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <mapmem.h>
 #include <regmap.h>
 #include <syscon.h>
diff --git a/test/dm/regulator.c b/test/dm/regulator.c
index b967902493..ca916eeebb 100644
--- a/test/dm/regulator.c
+++ b/test/dm/regulator.c
@@ -10,6 +10,7 @@
 #include <errno.h>
 #include <dm.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/device-internal.h>
 #include <dm/root.h>
diff --git a/test/dm/remoteproc.c b/test/dm/remoteproc.c
index 40675962d8..9511c7dd6f 100644
--- a/test/dm/remoteproc.c
+++ b/test/dm/remoteproc.c
@@ -223,7 +223,7 @@ static int dm_test_remoteproc_elf(struct unit_test_state *uts)
 
 	/* Load firmware in loaded_firmware, and verify it */
 	ut_assertok(rproc_elf32_load_image(dev, (ulong)valid_elf32, size));
-	ut_assertok(memcmp(loaded_firmware, valid_elf32, loaded_firmware_size));
+	ut_asserteq_mem(loaded_firmware, valid_elf32, loaded_firmware_size);
 	ut_asserteq(rproc_elf_get_boot_addr(dev, (unsigned long)valid_elf32),
 		    0x08000000);
 	unmap_physmem(loaded_firmware, MAP_NOCACHE);
@@ -243,8 +243,8 @@ static int dm_test_remoteproc_elf(struct unit_test_state *uts)
 					       &rsc_addr, &rsc_size));
 	ut_asserteq(rsc_addr, CONFIG_SYS_SDRAM_BASE);
 	ut_asserteq(rsc_size, rsc_table_size);
-	ut_assertok(memcmp(loaded_firmware, valid_elf32 + shdr->sh_offset,
-			   shdr->sh_size));
+	ut_asserteq_mem(loaded_firmware, valid_elf32 + shdr->sh_offset,
+			shdr->sh_size);
 	unmap_physmem(loaded_firmware, MAP_NOCACHE);
 
 	/* Invalid ELF Magic */
diff --git a/test/dm/reset.c b/test/dm/reset.c
index 8370820428..871d6400a0 100644
--- a/test/dm/reset.c
+++ b/test/dm/reset.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <reset.h>
 #include <dm/test.h>
diff --git a/test/dm/rng.c b/test/dm/rng.c
index ce20e2d7c2..583ce9eddf 100644
--- a/test/dm/rng.c
+++ b/test/dm/rng.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <rng.h>
 #include <dm/test.h>
 #include <test/ut.h>
diff --git a/test/dm/rtc.c b/test/dm/rtc.c
index 7188742764..88f86581cc 100644
--- a/test/dm/rtc.c
+++ b/test/dm/rtc.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <i2c.h>
+#include <log.h>
 #include <rtc.h>
 #include <asm/io.h>
 #include <asm/test.h>
diff --git a/test/dm/serial.c b/test/dm/serial.c
index c6be6ab7ab..6237693cb8 100644
--- a/test/dm/serial.c
+++ b/test/dm/serial.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <serial.h>
 #include <dm.h>
 #include <dm/test.h>
diff --git a/test/dm/sf.c b/test/dm/sf.c
index 7805af740e..9e7dead684 100644
--- a/test/dm/sf.c
+++ b/test/dm/sf.c
@@ -20,7 +20,7 @@
 /* Simple test of sandbox SPI flash */
 static int dm_test_spi_flash(struct unit_test_state *uts)
 {
-	struct udevice *dev, *emul;
+	struct udevice *dev;
 	int full_size = 0x200000;
 	int size = 0x10000;
 	u8 *src, *dst;
@@ -35,7 +35,7 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
 
 	dst = map_sysmem(0x20000 + full_size, full_size);
 	ut_assertok(spi_flash_read_dm(dev, 0, size, dst));
-	ut_assertok(memcmp(src, dst, size));
+	ut_asserteq_mem(src, dst, size);
 
 	/* Erase */
 	ut_assertok(spi_flash_erase_dm(dev, 0, size));
@@ -48,15 +48,7 @@ static int dm_test_spi_flash(struct unit_test_state *uts)
 		src[i] = i;
 	ut_assertok(spi_flash_write_dm(dev, 0, size, src));
 	ut_assertok(spi_flash_read_dm(dev, 0, size, dst));
-	ut_assertok(memcmp(src, dst, size));
-
-	/* Try the write-protect stuff */
-	ut_assertok(uclass_first_device_err(UCLASS_SPI_EMUL, &emul));
-	ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
-	sandbox_sf_set_block_protect(emul, 1);
-	ut_asserteq(1, spl_flash_get_sw_write_prot(dev));
-	sandbox_sf_set_block_protect(emul, 0);
-	ut_asserteq(0, spl_flash_get_sw_write_prot(dev));
+	ut_asserteq_mem(src, dst, size);
 
 	/* Check mapping */
 	ut_assertok(dm_spi_get_mmap(dev, &map_base, &map_size, &offset));
diff --git a/test/dm/syscon.c b/test/dm/syscon.c
index f1021f374b..06a1c69ac5 100644
--- a/test/dm/syscon.c
+++ b/test/dm/syscon.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <syscon.h>
 #include <regmap.h>
 #include <asm/test.h>
diff --git a/test/dm/tee.c b/test/dm/tee.c
index d40f13d291..632e9960b0 100644
--- a/test/dm/tee.c
+++ b/test/dm/tee.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/test.h>
 #include <sandboxtee.h>
diff --git a/test/dm/test-driver.c b/test/dm/test-driver.c
index abb5b7115a..ba85fa313e 100644
--- a/test/dm/test-driver.c
+++ b/test/dm/test-driver.c
@@ -9,6 +9,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/test.h>
 #include <test/ut.h>
diff --git a/test/dm/test-fdt.c b/test/dm/test-fdt.c
index 1128c420a3..4fcae03dc5 100644
--- a/test/dm/test-fdt.c
+++ b/test/dm/test-fdt.c
@@ -7,6 +7,7 @@
 #include <dm.h>
 #include <errno.h>
 #include <fdtdec.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <dm/test.h>
diff --git a/test/dm/test-main.c b/test/dm/test-main.c
index d7dc8d1f91..53e5ca321f 100644
--- a/test/dm/test-main.c
+++ b/test/dm/test-main.c
@@ -8,6 +8,7 @@
 #include <console.h>
 #include <dm.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <asm/state.h>
 #include <dm/test.h>
@@ -200,7 +201,7 @@ static int dm_test_main(const char *test_name)
 	return uts->fail_count ? CMD_RET_FAILURE : 0;
 }
 
-int do_ut_dm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	const char *test_name = NULL;
 
diff --git a/test/dm/test-uclass.c b/test/dm/test-uclass.c
index 25271c6ba0..b6d629a285 100644
--- a/test/dm/test-uclass.c
+++ b/test/dm/test-uclass.c
@@ -7,6 +7,7 @@
  */
 
 #include <common.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm.h>
 #include <errno.h>
diff --git a/test/dm/usb.c b/test/dm/usb.c
index e396c2a0ea..a25c2c1482 100644
--- a/test/dm/usb.c
+++ b/test/dm/usb.c
@@ -6,6 +6,7 @@
 #include <common.h>
 #include <console.h>
 #include <dm.h>
+#include <part.h>
 #include <usb.h>
 #include <asm/io.h>
 #include <asm/state.h>
diff --git a/test/dm/video.c b/test/dm/video.c
index f72979fac4..0664e3f22b 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <bzlib.h>
 #include <dm.h>
+#include <log.h>
 #include <malloc.h>
 #include <mapmem.h>
 #include <os.h>
diff --git a/test/env/cmd_ut_env.c b/test/env/cmd_ut_env.c
index ad67dbe792..a440b1bfb0 100644
--- a/test/env/cmd_ut_env.c
+++ b/test/env/cmd_ut_env.c
@@ -10,7 +10,7 @@
 #include <test/suites.h>
 #include <test/ut.h>
 
-int do_ut_env(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test, env_test);
 	const int n_ents = ll_entry_count(struct unit_test, env_test);
diff --git a/test/env/hashtable.c b/test/env/hashtable.c
index 5242c4cc3e..339cc19ba1 100644
--- a/test/env/hashtable.c
+++ b/test/env/hashtable.c
@@ -6,6 +6,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <search.h>
 #include <stdio.h>
 #include <test/env.h>
diff --git a/test/lib/asn1.c b/test/lib/asn1.c
index d2b3f67e68..8661fdd306 100644
--- a/test/lib/asn1.c
+++ b/test/lib/asn1.c
@@ -13,10 +13,10 @@
 #include <test/ut.h>
 
 #ifdef CONFIG_PKCS7_MESSAGE_PARSER
-#include "../../lib/crypto/pkcs7_parser.h"
+#include <crypto/pkcs7_parser.h>
 #else
 #ifdef CONFIG_X509_CERTIFICATE_PARSER
-#include "../../lib/crypto/x509_parser.h"
+#include <crypto/x509_parser.h>
 #endif
 #endif
 
diff --git a/test/lib/cmd_ut_lib.c b/test/lib/cmd_ut_lib.c
index c73e8d7b05..f5c7bf3d3b 100644
--- a/test/lib/cmd_ut_lib.c
+++ b/test/lib/cmd_ut_lib.c
@@ -11,7 +11,7 @@
 #include <test/suites.h>
 #include <test/ut.h>
 
-int do_ut_lib(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test, lib_test);
 	const int n_ents = ll_entry_count(struct unit_test, lib_test);
diff --git a/test/lib/lmb.c b/test/lib/lmb.c
index 1336b54b11..a0fe0f6b33 100644
--- a/test/lib/lmb.c
+++ b/test/lib/lmb.c
@@ -5,6 +5,7 @@
 
 #include <common.h>
 #include <lmb.h>
+#include <log.h>
 #include <malloc.h>
 #include <dm/test.h>
 #include <test/ut.h>
diff --git a/test/lib/string.c b/test/lib/string.c
index 8e246ab4ed..64234bef36 100644
--- a/test/lib/string.c
+++ b/test/lib/string.c
@@ -11,6 +11,7 @@
 
 #include <common.h>
 #include <command.h>
+#include <log.h>
 #include <test/lib.h>
 #include <test/test.h>
 #include <test/ut.h>
diff --git a/test/lib/test_aes.c b/test/lib/test_aes.c
index fb8a0b17ba..cbc712f7ed 100644
--- a/test/lib/test_aes.c
+++ b/test/lib/test_aes.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <command.h>
 #include <hexdump.h>
+#include <rand.h>
 #include <uboot_aes.h>
 #include <test/lib.h>
 #include <test/test.h>
diff --git a/test/log/log_test.c b/test/log/log_test.c
index febc2c1252..4245372d65 100644
--- a/test/log/log_test.c
+++ b/test/log/log_test.c
@@ -7,6 +7,8 @@
  */
 
 #include <common.h>
+#include <command.h>
+#include <log.h>
 
 /* emit some sample log records in different ways, for testing */
 static int log_run(enum uclass_id cat, const char *file)
@@ -200,7 +202,7 @@ static int log_test(int testnum)
 }
 
 #ifdef CONFIG_LOG_TEST
-int do_log_test(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_log_test(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int testnum = 0;
 	int ret;
diff --git a/test/log/nolog_test.c b/test/log/nolog_test.c
index 84619521c9..c418ed07c9 100644
--- a/test/log/nolog_test.c
+++ b/test/log/nolog_test.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #define BUFFSIZE 32
 
-static int nolog_test_log_err(struct unit_test_state *uts)
+static int log_test_nolog_err(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -31,9 +31,9 @@ static int nolog_test_log_err(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_err);
+LOG_TEST(log_test_nolog_err);
 
-static int nolog_test_log_warning(struct unit_test_state *uts)
+static int log_test_nolog_warning(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -45,9 +45,9 @@ static int nolog_test_log_warning(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_warning);
+LOG_TEST(log_test_nolog_warning);
 
-static int nolog_test_log_notice(struct unit_test_state *uts)
+static int log_test_nolog_notice(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -59,9 +59,9 @@ static int nolog_test_log_notice(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_notice);
+LOG_TEST(log_test_nolog_notice);
 
-static int nolog_test_log_info(struct unit_test_state *uts)
+static int log_test_nolog_info(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -73,7 +73,7 @@ static int nolog_test_log_info(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_info);
+LOG_TEST(log_test_nolog_info);
 
 #undef _DEBUG
 #define _DEBUG 0
@@ -90,7 +90,7 @@ static int nolog_test_nodebug(struct unit_test_state *uts)
 }
 LOG_TEST(nolog_test_nodebug);
 
-static int nolog_test_log_nodebug(struct unit_test_state *uts)
+static int log_test_nolog_nodebug(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -102,7 +102,7 @@ static int nolog_test_log_nodebug(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_nodebug);
+LOG_TEST(log_test_nolog_nodebug);
 
 #undef _DEBUG
 #define _DEBUG 1
@@ -120,7 +120,7 @@ static int nolog_test_debug(struct unit_test_state *uts)
 }
 LOG_TEST(nolog_test_debug);
 
-static int nolog_test_log_debug(struct unit_test_state *uts)
+static int log_test_nolog_debug(struct unit_test_state *uts)
 {
 	char buf[BUFFSIZE];
 
@@ -132,4 +132,4 @@ static int nolog_test_log_debug(struct unit_test_state *uts)
 	ut_assertok(ut_check_console_end(uts));
 	return 0;
 }
-LOG_TEST(nolog_test_log_debug);
+LOG_TEST(log_test_nolog_debug);
diff --git a/test/log/syslog_test.c b/test/log/syslog_test.c
index 6ca5760eac..26536ebca7 100644
--- a/test/log/syslog_test.c
+++ b/test/log/syslog_test.c
@@ -92,12 +92,12 @@ static int sb_log_tx_handler(struct udevice *dev, void *packet,
 }
 
 /**
- * syslog_test_log_err() - test log_err() function
+ * log_test_syslog_err() - test log_err() function
  *
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_err(struct unit_test_state *uts)
+static int log_test_syslog_err(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -106,7 +106,7 @@ static int syslog_test_log_err(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_INFO;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<3>sandbox uboot: syslog_test_log_err() "
+	env.expected = "<3>sandbox uboot: log_test_syslog_err() "
 		       "testing log_err\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -119,15 +119,15 @@ static int syslog_test_log_err(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_err);
+LOG_TEST(log_test_syslog_err);
 
 /**
- * syslog_test_log_warning() - test log_warning() function
+ * log_test_syslog_warning() - test log_warning() function
  *
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_warning(struct unit_test_state *uts)
+static int log_test_syslog_warning(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -136,7 +136,7 @@ static int syslog_test_log_warning(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_INFO;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<4>sandbox uboot: syslog_test_log_warning() "
+	env.expected = "<4>sandbox uboot: log_test_syslog_warning() "
 		       "testing log_warning\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -150,15 +150,15 @@ static int syslog_test_log_warning(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_warning);
+LOG_TEST(log_test_syslog_warning);
 
 /**
- * syslog_test_log_notice() - test log_notice() function
+ * log_test_syslog_notice() - test log_notice() function
  *
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_notice(struct unit_test_state *uts)
+static int log_test_syslog_notice(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -167,7 +167,7 @@ static int syslog_test_log_notice(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_INFO;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<5>sandbox uboot: syslog_test_log_notice() "
+	env.expected = "<5>sandbox uboot: log_test_syslog_notice() "
 		       "testing log_notice\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -181,15 +181,15 @@ static int syslog_test_log_notice(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_notice);
+LOG_TEST(log_test_syslog_notice);
 
 /**
- * syslog_test_log_info() - test log_info() function
+ * log_test_syslog_info() - test log_info() function
  *
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_info(struct unit_test_state *uts)
+static int log_test_syslog_info(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -198,7 +198,7 @@ static int syslog_test_log_info(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_INFO;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<6>sandbox uboot: syslog_test_log_info() "
+	env.expected = "<6>sandbox uboot: log_test_syslog_info() "
 		       "testing log_info\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -212,15 +212,15 @@ static int syslog_test_log_info(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_info);
+LOG_TEST(log_test_syslog_info);
 
 /**
- * syslog_test_log_debug() - test log_debug() function
+ * log_test_syslog_debug() - test log_debug() function
  *
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_debug(struct unit_test_state *uts)
+static int log_test_syslog_debug(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -229,7 +229,7 @@ static int syslog_test_log_debug(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_DEBUG;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<7>sandbox uboot: syslog_test_log_debug() "
+	env.expected = "<7>sandbox uboot: log_test_syslog_debug() "
 		       "testing log_debug\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -243,10 +243,10 @@ static int syslog_test_log_debug(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_debug);
+LOG_TEST(log_test_syslog_debug);
 
 /**
- * syslog_test_log_nodebug() - test logging level filter
+ * log_test_syslog_nodebug() - test logging level filter
  *
  * Verify that log_debug() does not lead to a log message if the logging level
  * is set to LOGL_INFO.
@@ -254,7 +254,7 @@ LOG_TEST(syslog_test_log_debug);
  * @uts:	unit test state
  * Return:	0 = success
  */
-static int syslog_test_log_nodebug(struct unit_test_state *uts)
+static int log_test_syslog_nodebug(struct unit_test_state *uts)
 {
 	int old_log_level = gd->default_log_level;
 	struct sb_log_env env;
@@ -263,7 +263,7 @@ static int syslog_test_log_nodebug(struct unit_test_state *uts)
 	gd->default_log_level = LOGL_INFO;
 	env_set("ethact", "eth@10002000");
 	env_set("log_hostname", "sandbox");
-	env.expected = "<7>sandbox uboot: syslog_test_log_nodebug() "
+	env.expected = "<7>sandbox uboot: log_test_syslog_nodebug() "
 		       "testing log_debug\n";
 	env.uts = uts;
 	sandbox_eth_set_tx_handler(0, sb_log_tx_handler);
@@ -277,4 +277,4 @@ static int syslog_test_log_nodebug(struct unit_test_state *uts)
 
 	return 0;
 }
-LOG_TEST(syslog_test_log_nodebug);
+LOG_TEST(log_test_syslog_nodebug);
diff --git a/test/log/test-main.c b/test/log/test-main.c
index 855de47f33..c534add493 100644
--- a/test/log/test-main.c
+++ b/test/log/test-main.c
@@ -7,10 +7,11 @@
 
 #include <common.h>
 #include <console.h>
+#include <log.h>
 #include <test/log.h>
 #include <test/suites.h>
 
-int do_ut_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test, log_test);
 	const int n_ents = ll_entry_count(struct unit_test, log_test);
diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh
new file mode 100755
index 0000000000..b17542b8c1
--- /dev/null
+++ b/test/nokia_rx51_test.sh
@@ -0,0 +1,262 @@
+#!/bin/sh -e
+# SPDX-License-Identifier: GPL-2.0+
+# (C) 2020 Pali Rohár <pali@kernel.org>
+
+# External tools needed for this test:
+echo '
+	wget
+	git
+	truncate
+	tar
+	dpkg
+	dd
+	make
+	gcc
+	arm-linux-gnueabi-gcc
+	fakeroot		(homepage http://fakeroot-ng.lingnu.com/)
+	mcopy			(from mtools, homepage http://www.gnu.org/software/mtools/)
+	mformat			(from mtools, homepage http://www.gnu.org/software/mtools/)
+	/usr/sbin/mkfs.ubifs	(from mtd-utils, homepage http://www.linux-mtd.infradead.org/)
+	/usr/sbin/ubinize	(from mtd-utils, homepage http://www.linux-mtd.infradead.org/)
+' | while read tool info; do
+	if test -z "$tool"; then continue; fi
+	if ! which $tool 1>/dev/null 2>&1; then
+		echo "Tool $tool was not found and is required to run this test"
+		echo "First install $tool $info"
+		exit 1
+	fi
+done || exit 1
+
+echo
+echo "============================================================"
+echo "========== Compiling U-Boot for Nokia RX-51 board =========="
+echo "============================================================"
+echo
+
+# First compile u-boot.bin binary for Nokia RX-51 board
+make nokia_rx51_config
+make -j4 u-boot.bin ARCH=arm CROSS_COMPILE=arm-linux-gnueabi-
+
+# And then do all stuff in temporary directory
+mkdir -p nokia_rx51_tmp
+cd nokia_rx51_tmp
+
+test -f mkimage || ln -s ../tools/mkimage .
+test -f u-boot.bin || ln -s ../u-boot.bin .
+
+echo
+echo "=========================================================================="
+echo "========== Downloading and compiling qemu from qemu-linaro fork =========="
+echo "=========================================================================="
+echo
+
+# Download and compile linaro version qemu which has support for n900 machine
+# Last working commit is 8f8d8e0796efe1a6f34cdd83fb798f3c41217ec1
+if ! test -f qemu-system-arm; then
+	test -d qemu-linaro || git clone https://git.linaro.org/qemu/qemu-linaro.git
+	cd qemu-linaro
+	git checkout 8f8d8e0796efe1a6f34cdd83fb798f3c41217ec1
+	./configure --enable-system --target-list=arm-softmmu --disable-sdl --disable-gtk --disable-curses --audio-drv-list= --audio-card-list= --disable-werror --disable-xen --disable-xen-pci-passthrough --disable-brlapi --disable-vnc --disable-curl --disable-slirp --disable-kvm --disable-user --disable-linux-user --disable-bsd-user --disable-guest-base --disable-uuid --disable-vde --disable-linux-aio --disable-cap-ng --disable-attr --disable-blobs --disable-docs --disable-spice --disable-libiscsi --disable-smartcard-nss --disable-usb-redir --disable-guest-agent --disable-seccomp --disable-glusterfs --disable-nptl --disable-fdt
+	make -j4
+	cd ..
+	ln -s qemu-linaro/arm-softmmu/qemu-system-arm .
+fi
+
+echo
+echo "==================================================="
+echo "========== Downloading external binaries =========="
+echo "==================================================="
+echo
+
+# Download qflasher and nolo images
+# This is proprietary qemu flasher tool with first stage images, but license allows non-commercial redistribution
+wget -c http://repository.maemo.org/qemu-n900/qemu-n900.tar.gz
+tar -xf qemu-n900.tar.gz
+
+# Download Maemo script u-boot-gen-combined
+if ! test -f u-boot-gen-combined; then
+	test -d u-boot-maemo || git clone https://github.com/pali/u-boot-maemo.git
+	chmod +x u-boot-maemo/debian/u-boot-gen-combined
+	ln -s u-boot-maemo/debian/u-boot-gen-combined .
+fi
+
+# Download Maemo fiasco kernel
+wget -c http://repository.maemo.org/pool/maemo5.0/free/k/kernel/kernel_2.6.28-20103103+0m5_armel.deb
+dpkg -x kernel_2.6.28-20103103+0m5_armel.deb kernel_2.6.28
+
+# Download Maemo libc
+wget -c http://repository.maemo.org/pool/maemo5.0/free/g/glibc/libc6_2.5.1-1eglibc27+0m5_armel.deb
+dpkg -x libc6_2.5.1-1eglibc27+0m5_armel.deb libc6_2.5.1
+
+# Download Maemo busybox
+wget -c http://repository.maemo.org/pool/maemo5.0/free/b/busybox/busybox_1.10.2.legal-1osso30+0m5_armel.deb
+dpkg -x busybox_1.10.2.legal-1osso30+0m5_armel.deb busybox_1.10.2
+
+echo
+echo "======================================="
+echo "========== Generating images =========="
+echo "======================================="
+echo
+
+# Generate rootfs directory
+mkdir -p rootfs
+mkdir -p rootfs/dev/
+mkdir -p rootfs/bin/
+mkdir -p rootfs/sbin/
+mkdir -p rootfs/lib/
+cp -a busybox_1.10.2/bin/busybox rootfs/bin/
+cp -a libc6_2.5.1/lib/ld-linux.so.3 rootfs/lib/
+cp -a libc6_2.5.1/lib/ld-2.5.so rootfs/lib/
+cp -a libc6_2.5.1/lib/libc.so.6 rootfs/lib/
+cp -a libc6_2.5.1/lib/libc-2.5.so rootfs/lib/
+cp -a libc6_2.5.1/lib/libcrypt.so.1 rootfs/lib/
+cp -a libc6_2.5.1/lib/libcrypt-2.5.so rootfs/lib/
+test -f rootfs/bin/sh || ln -sf busybox rootfs/bin/sh
+test -f rootfs/sbin/poweroff || ln -sf ../bin/busybox rootfs/sbin/poweroff
+cat > rootfs/sbin/preinit << EOF
+#!/bin/sh
+echo
+echo "Successfully booted"
+echo
+/sbin/poweroff -f
+EOF
+chmod +x rootfs/sbin/preinit
+
+# Generate ubi config file for ubi rootfs image
+cat > ubi.ini << EOF
+[rootfs]
+mode=ubi
+image=ubifs.img
+vol_id=0
+vol_size=160MiB
+vol_type=dynamic
+vol_name=rootfs
+vol_alignment=1
+vol_flags=autoresize
+EOF
+
+# Generate ubi rootfs image from rootfs directory
+# NOTE: Character device on host filesystem can be created only by root
+#       But we do not need it on host filesystem, just in ubifs image
+#       So run mknod and mkfs.ubifs commands under fakeroot program
+#       which via LD_PRELOAD simulate mknod() and stat() functions
+#       so mkfs.ubifs will see dev/console as character device and
+#       put it correctly as character device into final ubifs image
+#       Therefore we can run whole script as non-root nobody user
+fakeroot sh -c '
+	rm -f rootfs/dev/console;
+	mknod rootfs/dev/console c 5 1;
+	/usr/sbin/mkfs.ubifs -m 2048 -e 129024 -c 2047 -r rootfs ubifs.img;
+'
+/usr/sbin/ubinize -o ubi.img -p 128KiB -m 2048 -s 512 ubi.ini
+
+# Generate bootmenu for eMMC booting
+cat > bootmenu_emmc << EOF
+setenv bootmenu_0 'uImage-2.6.28-omap1 from eMMC=setenv mmcnum 1; setenv mmcpart 1; setenv mmctype fat; setenv bootargs; setenv setup_omap_atag 1; setenv mmckernfile uImage-2.6.28-omap1; run trymmckernboot';
+setenv bootmenu_1;
+setenv bootmenu_delay 1;
+setenv bootdelay 1;
+EOF
+./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu -d bootmenu_emmc bootmenu_emmc.scr
+
+# Generate bootmenu for OneNAND booting
+cat > bootmenu_nand << EOF
+setenv bootmenu_0 'uImage-2.6.28-omap1 from OneNAND=mtd read initfs \${kernaddr}; setenv bootargs; setenv setup_omap_atag 1; bootm \${kernaddr}';
+setenv bootmenu_1;
+setenv bootmenu_delay 1;
+setenv bootdelay 1;
+EOF
+./mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n bootmenu -d bootmenu_nand bootmenu_nand.scr
+
+# Generate combined image from u-boot and Maemo fiasco kernel
+dd if=kernel_2.6.28/boot/zImage-2.6.28-20103103+0m5.fiasco of=zImage-2.6.28-omap1 skip=95 bs=1
+./mkimage -A arm -O linux -T kernel -C none -a 80008000 -e 80008000 -n zImage-2.6.28-omap1 -d zImage-2.6.28-omap1 uImage-2.6.28-omap1
+./u-boot-gen-combined u-boot.bin uImage-2.6.28-omap1 combined.bin
+
+# Generate combined hack image from u-boot and Maemo fiasco kernel (kernel starts at 2MB offset and qflasher puts 2kB header before supplied image)
+cp u-boot.bin combined_hack.bin
+dd if=uImage-2.6.28-omap1 of=combined_hack.bin bs=1024 seek=$((2048-2))
+
+# Generate FAT32 eMMC image for eMMC booting
+truncate -s 50MiB emmc_emmc.img
+mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_emmc.img
+mcopy uImage-2.6.28-omap1 ::/uImage-2.6.28-omap1 -i emmc_emmc.img
+mcopy bootmenu_emmc.scr ::/bootmenu.scr -i emmc_emmc.img
+
+# Generate FAT32 eMMC image for OneNAND booting
+truncate -s 50MiB emmc_nand.img
+mformat -m 0xf8 -F -h 4 -s 16 -c 1 -t $((50*1024*1024/(4*16*512))) :: -i emmc_nand.img
+mcopy bootmenu_nand.scr ::/bootmenu.scr -i emmc_nand.img
+
+# Generate MTD image for RAM booting from bootloader nolo images, compiled image and rootfs image
+rm -f mtd_ram.img
+./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined.bin -r ubi.img -m rx51 -o mtd_ram.img
+
+# Generate MTD image for eMMC booting from bootloader nolo images, u-boot image and rootfs image
+rm -f mtd_emmc.img
+./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k u-boot.bin -r ubi.img -m rx51 -o mtd_emmc.img
+
+# Generate MTD image for OneNAND booting from bootloader nolo images, combined hacked image and rootfs image
+# Kernel image is put into initfs area, but qflasher reject to copy kernel image into initfs area because it does not have initfs signature
+# This is hack to workaround this problem, tell qflasher that kernel area for u-boot is bigger and put big combined hacked image (u-boot + kernel with correct offset)
+rm -f mtd_nand.img
+./qflasher -v -x xloader-qemu.bin -s secondary-qemu.bin -k combined_hack.bin -r ubi.img -m rx51 -p k=4094,i=2 -o mtd_nand.img
+
+echo
+echo "======================================================"
+echo "========== Running test images in n900 qemu =========="
+echo "======================================================"
+echo
+
+# Run MTD image in qemu and wait for 300s if kernel from RAM is correctly booted
+rm -f qemu_ram.log
+./qemu-system-arm -M n900 -mtdblock mtd_ram.img -serial /dev/stdout -display none > qemu_ram.log &
+qemu_pid=$!
+tail -F qemu_ram.log &
+tail_pid=$!
+{ sleep 300 || true; kill -9 $qemu_pid $tail_pid 2>/dev/null || true; } &
+sleep_pid=$!
+wait $qemu_pid || true
+kill -9 $tail_pid $sleep_pid 2>/dev/null || true
+
+# Run MTD image in qemu and wait for 300s if kernel from eMMC is correctly booted
+rm -f qemu_emmc.log
+./qemu-system-arm -M n900 -mtdblock mtd_emmc.img -sd emmc_emmc.img -serial /dev/stdout -display none > qemu_emmc.log &
+qemu_pid=$!
+tail -F qemu_emmc.log &
+tail_pid=$!
+{ sleep 300 || true; kill -9 $qemu_pid $tail_pid 2>/dev/null || true; } &
+sleep_pid=$!
+wait $qemu_pid || true
+kill -9 $tail_pid $sleep_pid 2>/dev/null || true
+
+# Run MTD image in qemu and wait for 300s if kernel from OneNAND is correctly booted
+rm -f qemu_nand.log
+./qemu-system-arm -M n900 -mtdblock mtd_nand.img -sd emmc_nand.img -serial /dev/stdout -display none > qemu_nand.log &
+qemu_pid=$!
+tail -F qemu_nand.log &
+tail_pid=$!
+{ sleep 300 || true; kill -9 $qemu_pid $tail_pid 2>/dev/null || true; } &
+sleep_pid=$!
+wait $qemu_pid || true
+kill -9 $tail_pid $sleep_pid 2>/dev/null || true
+
+echo
+echo "============================="
+echo "========== Results =========="
+echo "============================="
+echo
+
+if grep -q 'Successfully booted' qemu_ram.log; then echo "Kernel was successfully booted from RAM"; else echo "Failed to boot kernel from RAM"; fi
+if grep -q 'Successfully booted' qemu_emmc.log; then echo "Kernel was successfully booted from eMMC"; else echo "Failed to boot kernel from eMMC"; fi
+if grep -q 'Successfully booted' qemu_nand.log; then echo "Kernel was successfully booted from OneNAND"; else echo "Failed to boot kernel from OneNAND"; fi
+
+echo
+
+if grep -q 'Successfully booted' qemu_ram.log && grep -q 'Successfully booted' qemu_emmc.log && grep -q 'Successfully booted' qemu_nand.log; then
+	echo "All tests passed"
+	exit 0
+else
+	echo "Some tests failed"
+	exit 1
+fi
diff --git a/test/optee/cmd_ut_optee.c b/test/optee/cmd_ut_optee.c
index 092710326a..9fa4c91e0d 100644
--- a/test/optee/cmd_ut_optee.c
+++ b/test/optee/cmd_ut_optee.c
@@ -7,6 +7,7 @@
 #include <command.h>
 #include <errno.h>
 #include <fdt_support.h>
+#include <log.h>
 #include <malloc.h>
 #include <tee/optee.h>
 
@@ -91,7 +92,7 @@ static int optee_fdt_protected_memory(struct unit_test_state *uts)
 }
 OPTEE_TEST(optee_fdt_protected_memory, 0);
 
-int do_ut_optee(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_optee(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
 						 optee_test);
diff --git a/test/overlay/cmd_ut_overlay.c b/test/overlay/cmd_ut_overlay.c
index d0083fd6be..c001fb183f 100644
--- a/test/overlay/cmd_ut_overlay.c
+++ b/test/overlay/cmd_ut_overlay.c
@@ -8,6 +8,8 @@
 #include <command.h>
 #include <errno.h>
 #include <fdt_support.h>
+#include <image.h>
+#include <log.h>
 #include <malloc.h>
 
 #include <linux/sizes.h>
@@ -209,7 +211,7 @@ static int fdt_overlay_stacked(struct unit_test_state *uts)
 }
 OVERLAY_TEST(fdt_overlay_stacked, 0);
 
-int do_ut_overlay(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_overlay(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
 						 overlay_test);
diff --git a/test/print_ut.c b/test/print_ut.c
index a3b9974ad2..a456a449ef 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -7,9 +7,11 @@
 
 #include <common.h>
 #if CONFIG_IS_ENABLED(EFI_LOADER) && !defined(API_BUILD)
+#include <command.h>
 #include <efi_api.h>
 #endif
 #include <display_options.h>
+#include <log.h>
 #include <version.h>
 
 #define FAKE_BUILD_TAG	"jenkins-u-boot-denx_uboot_dm-master-build-aarch64" \
@@ -68,7 +70,7 @@ static void efi_ut_print(void)
 #endif
 }
 
-static int do_ut_print(cmd_tbl_t *cmdtp, int flag, int argc,
+static int do_ut_print(struct cmd_tbl *cmdtp, int flag, int argc,
 		       char *const argv[])
 {
 	char big_str[400];
diff --git a/test/py/conftest.py b/test/py/conftest.py
index e3392ff6bc..30920474b3 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -156,7 +156,7 @@ def pytest_configure(config):
                 o_opt = ''
             cmds = (
                 ['make', o_opt, '-s', board_type + '_defconfig'],
-                ['make', o_opt, '-s', '-j8'],
+                ['make', o_opt, '-s', '-j{}'.format(os.cpu_count())],
             )
             name = 'make'
 
diff --git a/test/py/tests/test_efi_secboot/conftest.py b/test/py/tests/test_efi_secboot/conftest.py
index e542fef6e8..5d99b8b718 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -43,7 +43,8 @@ def efi_boot_env(request, u_boot_config):
         HELLO_PATH = u_boot_config.build_dir + '/lib/efi_loader/helloworld.efi'
 
     try:
-        non_root = tool_is_in_path('udisksctl')
+        mnt_point = u_boot_config.persistent_data_dir + '/mnt_efisecure'
+        check_call('mkdir -p {}'.format(mnt_point), shell=True)
 
         # create a disk/partition
         check_call('dd if=/dev/zero of=%s bs=1MiB count=%d'
@@ -57,25 +58,11 @@ def efi_boot_env(request, u_boot_config):
         check_call('dd if=%s.tmp of=%s bs=1MiB seek=1 count=%d conv=notrunc'
                             % (image_path, image_path, 1), shell=True)
         check_call('rm %s.tmp' % image_path, shell=True)
-        if non_root:
-            out_data = check_output('udisksctl loop-setup -f %s -o %d'
-                                % (image_path, 1048576), shell=True).decode()
-            m = re.search('(?<= as )(.*)\.', out_data)
-            loop_dev = m.group(1)
-            # print 'loop device is: %s' % loop_dev
-            out_data = check_output('udisksctl info -b %s'
-                                % loop_dev, shell=True).decode()
-            m = re.search('MountPoints:[ \t]+(.*)', out_data)
-            mnt_point = m.group(1)
-        else:
-            loop_dev = check_output('sudo losetup -o 1MiB --sizelimit %dMiB --show -f %s | tr -d "\n"'
+        loop_dev = check_output('sudo losetup -o 1MiB --sizelimit %dMiB --show -f %s | tr -d "\n"'
                                 % (part_size, image_path), shell=True).decode()
-            mnt_point = '/mnt'
-            check_output('sudo mount -t %s -o umask=000 %s %s'
+        check_output('sudo mount -t %s -o umask=000 %s %s'
                                 % (fs_type, loop_dev, mnt_point), shell=True)
 
-        # print 'mount point is: %s' % mnt_point
-
         # suffix
         # *.key: RSA private key in PEM
         # *.crt: X509 certificate (self-signed) in PEM
@@ -134,13 +121,8 @@ def efi_boot_env(request, u_boot_config):
                             % (mnt_point, EFITOOLS_PATH, EFITOOLS_PATH),
                             shell=True)
 
-        if non_root:
-            check_call('udisksctl unmount -b %s' % loop_dev, shell=True)
-            # not needed
-            # check_call('udisksctl loop-delete -b %s' % loop_dev, shell=True)
-        else:
-            check_call('sudo umount %s' % loop_dev, shell=True)
-            check_call('sudo losetup -d %s' % loop_dev, shell=True)
+        check_call('sudo umount %s' % loop_dev, shell=True)
+        check_call('sudo losetup -d %s' % loop_dev, shell=True)
 
     except CalledProcessError as e:
         pytest.skip('Setup failed: %s' % e.cmd)
diff --git a/test/py/tests/test_efi_secboot/test_authvar.py b/test/py/tests/test_efi_secboot/test_authvar.py
index 55dcaa95f1..9912694a3e 100644
--- a/test/py/tests/test_efi_secboot/test_authvar.py
+++ b/test/py/tests/test_efi_secboot/test_authvar.py
@@ -133,7 +133,7 @@ class TestEfiAuthVar(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
                 'fatload host 0:1 4000000 PK.auth',
-                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK',
+                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK; echo',
                 'fatload host 0:1 4000000 KEK.auth',
                 'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
                 'fatload host 0:1 4000000 db.auth',
@@ -174,7 +174,7 @@ class TestEfiAuthVar(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
                 'fatload host 0:1 4000000 PK.auth',
-                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK',
+                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK; echo',
                 'fatload host 0:1 4000000 KEK.auth',
                 'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
                 'fatload host 0:1 4000000 db.auth',
@@ -215,7 +215,7 @@ class TestEfiAuthVar(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
                 'fatload host 0:1 4000000 PK.auth',
-                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK',
+                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK; echo',
                 'fatload host 0:1 4000000 KEK.auth',
                 'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
                 'fatload host 0:1 4000000 db.auth',
@@ -249,7 +249,7 @@ class TestEfiAuthVar(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
                 'fatload host 0:1 4000000 PK.auth',
-                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK',
+                'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK; echo',
                 'fatload host 0:1 4000000 KEK.auth',
                 'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
                 'fatload host 0:1 4000000 db.auth',
diff --git a/test/py/tests/test_efi_secboot/test_signed.py b/test/py/tests/test_efi_secboot/test_signed.py
index 584282b338..fc722ab506 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -29,7 +29,7 @@ class TestEfiSignedImage(object):
             # Test Case 1a, run signed image if no db/dbx
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
-                'efidebug boot add 1 HELLO1 host 0:1 /helloworld.efi.signed ""',
+                'efidebug boot add 1 HELLO1 host 0:1 /helloworld.efi.signed ""; echo',
                 'efidebug boot next 1',
                 'bootefi bootmgr'])
             assert(re.search('Hello, world!', ''.join(output)))
@@ -81,7 +81,7 @@ class TestEfiSignedImage(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
                 'fatload host 0:1 4000000 db.auth',
-                'setenv -e -nv -bs -rt -at -i 4000000,$filesize dbx',
+                'setenv -e -nv -bs -rt -at -i 4000000,$filesize dbx; echo',
                 'fatload host 0:1 4000000 KEK.auth',
                 'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
                 'fatload host 0:1 4000000 PK.auth',
diff --git a/test/py/tests/test_efi_secboot/test_unsigned.py b/test/py/tests/test_efi_secboot/test_unsigned.py
index 22d849afb8..a4af845c51 100644
--- a/test/py/tests/test_efi_secboot/test_unsigned.py
+++ b/test/py/tests/test_efi_secboot/test_unsigned.py
@@ -30,7 +30,7 @@ class TestEfiUnsignedImage(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
 		'fatload host 0:1 4000000 KEK.auth',
-		'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
+		'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK; echo',
 		'fatload host 0:1 4000000 PK.auth',
 		'setenv -e -nv -bs -rt -at -i 4000000,$filesize PK'])
             assert(not re.search('Failed to set EFI variable', ''.join(output)))
@@ -58,7 +58,7 @@ class TestEfiUnsignedImage(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
 		'fatload host 0:1 4000000 db_hello.auth',
-		'setenv -e -nv -bs -rt -at -i 4000000,$filesize db',
+		'setenv -e -nv -bs -rt -at -i 4000000,$filesize db; echo',
 		'fatload host 0:1 4000000 KEK.auth',
 		'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
 		'fatload host 0:1 4000000 PK.auth',
@@ -82,7 +82,7 @@ class TestEfiUnsignedImage(object):
             output = u_boot_console.run_command_list([
                 'host bind 0 %s' % disk_img,
 		'fatload host 0:1 4000000 db_hello.auth',
-		'setenv -e -nv -bs -rt -at -i 4000000,$filesize dbx',
+		'setenv -e -nv -bs -rt -at -i 4000000,$filesize dbx; echo',
 		'fatload host 0:1 4000000 KEK.auth',
 		'setenv -e -nv -bs -rt -at -i 4000000,$filesize KEK',
 		'fatload host 0:1 4000000 PK.auth',
diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py
index 6c7b8dd2b3..01c2b3ffa1 100644
--- a/test/py/tests/test_ut.py
+++ b/test/py/tests/test_ut.py
@@ -22,7 +22,22 @@ def test_ut_dm_init(u_boot_console):
             fh.write(data)
 
 def test_ut(u_boot_console, ut_subtest):
-    """Execute a "ut" subtest."""
+    """Execute a "ut" subtest.
+
+    The subtests are collected in function generate_ut_subtest() from linker
+    generated lists by applying a regular expression to the lines of file
+    u-boot.sym. The list entries are created using the C macro UNIT_TEST().
+
+    Strict naming conventions have to be followed to match the regular
+    expression. Use UNIT_TEST(foo_test_bar, _flags, foo_test) for a test bar in
+    test suite foo that can be executed via command 'ut foo bar' and is
+    implemented in C function foo_test_bar().
+
+    Args:
+        u_boot_console (ConsoleBase): U-Boot console
+        ut_subtest (str): test to be executed via command ut, e.g 'foo bar' to
+            execute command 'ut foo bar'
+    """
 
     output = u_boot_console.run_command('ut ' + ut_subtest)
     assert output.endswith('Failures: 0')
diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index e67f2b3d0f..6b998cfd70 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -30,11 +30,16 @@ import u_boot_utils as util
 import vboot_forge
 
 TESTDATA = [
-    ['sha1', '', False],
-    ['sha1', '-pss', False],
-    ['sha256', '', False],
-    ['sha256', '-pss', False],
-    ['sha256', '-pss', True],
+    ['sha1', '', None, False],
+    ['sha1', '', '-E -p 0x10000', False],
+    ['sha1', '-pss', None, False],
+    ['sha1', '-pss', '-E -p 0x10000', False],
+    ['sha256', '', None, False],
+    ['sha256', '', '-E -p 0x10000', False],
+    ['sha256', '-pss', None, False],
+    ['sha256', '-pss', '-E -p 0x10000', False],
+    ['sha256', '-pss', None, True],
+    ['sha256', '-pss', '-E -p 0x10000', True],
 ]
 
 @pytest.mark.boardspec('sandbox')
@@ -43,8 +48,8 @@ TESTDATA = [
 @pytest.mark.requiredtool('fdtget')
 @pytest.mark.requiredtool('fdtput')
 @pytest.mark.requiredtool('openssl')
-@pytest.mark.parametrize("sha_algo,padding,required", TESTDATA)
-def test_vboot(u_boot_console, sha_algo, padding, required):
+@pytest.mark.parametrize("sha_algo,padding,sign_options,required", TESTDATA)
+def test_vboot(u_boot_console, sha_algo, padding, sign_options, required):
     """Test verified boot signing with mkimage and verification with 'bootm'.
 
     This works using sandbox only as it needs to update the device tree used
@@ -104,7 +109,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         util.run_and_log(cons, [mkimage, '-D', dtc_args, '-f',
                                 '%s%s' % (datadir, its), fit])
 
-    def sign_fit(sha_algo):
+    def sign_fit(sha_algo, options):
         """Sign the FIT
 
         Signs the FIT and writes the signature into it. It also writes the
@@ -113,10 +118,13 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         Args:
             sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
                     use.
+            options: Options to provide to mkimage.
         """
+        args = [mkimage, '-F', '-k', tmpdir, '-K', dtb, '-r', fit]
+        if options:
+            args += options.split(' ')
         cons.log.action('%s: Sign images' % sha_algo)
-        util.run_and_log(cons, [mkimage, '-F', '-k', tmpdir, '-K', dtb,
-                                '-r', fit])
+        util.run_and_log(cons, args)
 
     def replace_fit_totalsize(size):
         """Replace FIT header's totalsize with something greater.
@@ -154,7 +162,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         util.run_and_log(cons, 'openssl req -batch -new -x509 -key %s%s.key '
                          '-out %s%s.crt' % (tmpdir, name, tmpdir, name))
 
-    def test_with_algo(sha_algo, padding):
+    def test_with_algo(sha_algo, padding, sign_options):
         """Test verified boot with the given hash algorithm.
 
         This is the main part of the test code. The same procedure is followed
@@ -163,6 +171,9 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         Args:
             sha_algo: Either 'sha1' or 'sha256', to select the algorithm to
                     use.
+            padding: Either '' or '-pss', to select the padding to use for the
+                    rsa signature algorithm.
+            sign_options: Options to mkimage when signing a fit image.
         """
         # Compile our device tree files for kernel and U-Boot. These are
         # regenerated here since mkimage will modify them (by adding a
@@ -176,7 +187,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         run_bootm(sha_algo, 'unsigned images', 'dev-', True)
 
         # Sign images with our dev keys
-        sign_fit(sha_algo)
+        sign_fit(sha_algo, sign_options)
         run_bootm(sha_algo, 'signed images', 'dev+', True)
 
         # Create a fresh .dtb without the public keys
@@ -187,7 +198,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo, True)
 
         # Sign images with our dev keys
-        sign_fit(sha_algo)
+        sign_fit(sha_algo, sign_options)
         run_bootm(sha_algo, 'signed config', 'dev+', True)
 
         cons.log.action('%s: Check signed config on the host' % sha_algo)
@@ -209,7 +220,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
 
         # Create a new properly signed fit and replace header bytes
         make_fit('sign-configs-%s%s.its' % (sha_algo, padding))
-        sign_fit(sha_algo)
+        sign_fit(sha_algo, sign_options)
         bcfg = u_boot_console.config.buildconfig
         max_size = int(bcfg.get('config_fit_signature_max_size', 0x10000000), 0)
         existing_size = replace_fit_totalsize(max_size + 1)
@@ -240,7 +251,7 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
             cons, [fit_check_sign, '-f', fit, '-k', dtb],
             1, 'Failed to verify required signature')
 
-    def test_required_key(sha_algo, padding):
+    def test_required_key(sha_algo, padding, sign_options):
         """Test verified boot with the given hash algorithm.
 
         This function tests if U-Boot rejects an image when a required key isn't
@@ -248,6 +259,9 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
 
         Args:
             sha_algo: Either 'sha1' or 'sha256', to select the algorithm to use
+            padding: Either '' or '-pss', to select the padding to use for the
+                    rsa signature algorithm.
+            sign_options: Options to mkimage when signing a fit image.
         """
         # Compile our device tree files for kernel and U-Boot. These are
         # regenerated here since mkimage will modify them (by adding a
@@ -260,12 +274,12 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         # Build the FIT with prod key (keys required) and sign it. This puts the
         # signature into sandbox-u-boot.dtb, marked 'required'
         make_fit('sign-configs-%s%s-prod.its' % (sha_algo, padding))
-        sign_fit(sha_algo)
+        sign_fit(sha_algo, sign_options)
 
         # Build the FIT with dev key (keys NOT required). This adds the
         # signature into sandbox-u-boot.dtb, NOT marked 'required'.
         make_fit('sign-configs-%s%s.its' % (sha_algo, padding))
-        sign_fit(sha_algo)
+        sign_fit(sha_algo, sign_options)
 
         # So now sandbox-u-boot.dtb two signatures, for the prod and dev keys.
         # Only the prod key is set as 'required'. But FIT we just built has
@@ -297,9 +311,9 @@ def test_vboot(u_boot_console, sha_algo, padding, required):
         old_dtb = cons.config.dtb
         cons.config.dtb = dtb
         if required:
-            test_required_key(sha_algo, padding)
+            test_required_key(sha_algo, padding, sign_options)
         else:
-            test_with_algo(sha_algo, padding)
+            test_with_algo(sha_algo, padding, sign_options)
     finally:
         # Go back to the original U-Boot with the correct dtb.
         cons.config.dtb = old_dtb
diff --git a/test/str_ut.c b/test/str_ut.c
index 7c8015050a..ef1205dbbd 100644
--- a/test/str_ut.c
+++ b/test/str_ut.c
@@ -105,7 +105,7 @@ static int str_simple_strtoul(struct unit_test_state *uts)
 }
 STR_TEST(str_simple_strtoul, 0);
 
-int do_ut_str(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
+int do_ut_str(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test,
 						 str_test);
diff --git a/test/time_ut.c b/test/time_ut.c
index 40a19a50d9..80b82dbfd8 100644
--- a/test/time_ut.c
+++ b/test/time_ut.c
@@ -8,6 +8,7 @@
 #include <command.h>
 #include <errno.h>
 #include <time.h>
+#include <linux/delay.h>
 
 static int test_get_timer(void)
 {
@@ -117,7 +118,7 @@ static int test_udelay(void)
 	return 0;
 }
 
-int do_ut_time(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+int do_ut_time(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	int ret = 0;
 
diff --git a/test/unicode_ut.c b/test/unicode_ut.c
index 4d99c20bc0..26d96336f3 100644
--- a/test/unicode_ut.c
+++ b/test/unicode_ut.c
@@ -9,6 +9,7 @@
 #include <charset.h>
 #include <command.h>
 #include <errno.h>
+#include <log.h>
 #include <malloc.h>
 #include <test/test.h>
 #include <test/suites.h>
@@ -66,8 +67,9 @@ static int unicode_test_u16_strdup(struct unit_test_state *uts)
 	u16 *copy = u16_strdup(c4);
 
 	ut_assert(copy != c4);
-	ut_assert(!memcmp(copy, c4, sizeof(c4)));
+	ut_asserteq_mem(copy, c4, sizeof(c4));
 	free(copy);
+
 	return 0;
 }
 UNICODE_TEST(unicode_test_u16_strdup);
@@ -79,7 +81,8 @@ static int unicode_test_u16_strcpy(struct unit_test_state *uts)
 
 	r = u16_strcpy(copy, c1);
 	ut_assert(r == copy);
-	ut_assert(!memcmp(copy, c1, sizeof(c1)));
+	ut_asserteq_mem(copy, c1, sizeof(c1));
+
 	return 0;
 }
 UNICODE_TEST(unicode_test_u16_strcpy);
@@ -581,7 +584,17 @@ static int unicode_test_u16_strncmp(struct unit_test_state *uts)
 }
 UNICODE_TEST(unicode_test_u16_strncmp);
 
-int do_ut_unicode(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+static int unicode_test_u16_strsize(struct unit_test_state *uts)
+{
+	ut_asserteq_64(u16_strsize(c1), 14);
+	ut_asserteq_64(u16_strsize(c2), 18);
+	ut_asserteq_64(u16_strsize(c3), 8);
+	ut_asserteq_64(u16_strsize(c4), 14);
+	return 0;
+}
+UNICODE_TEST(unicode_test_u16_strsize);
+
+int do_ut_unicode(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
 	struct unit_test *tests = ll_entry_start(struct unit_test, unicode_test);
 	const int n_ents = ll_entry_count(struct unit_test, unicode_test);
diff --git a/tools/Makefile b/tools/Makefile
index 1f9144f028..879c3fd4a7 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -5,7 +5,7 @@
 
 # Enable all the config-independent tools
 ifneq ($(HOST_TOOLS_ALL),)
-CONFIG_KIRKWOOD = y
+CONFIG_ARCH_KIRKWOOD = y
 CONFIG_LCD_LOGO = y
 CONFIG_CMD_LOADS = y
 CONFIG_CMD_NET = y
@@ -199,7 +199,7 @@ ubsha1-objs := os_support.o ubsha1.o lib/sha1.o
 
 HOSTCFLAGS_ubsha1.o := -pedantic
 
-hostprogs-$(CONFIG_KIRKWOOD) += kwboot
+hostprogs-$(CONFIG_ARCH_KIRKWOOD) += kwboot
 hostprogs-$(CONFIG_ARCH_MVEBU) += kwboot
 hostprogs-y += proftool
 hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 8734663cd4..c6378ecf34 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -946,11 +946,17 @@ static int flash_read_buf(int dev, int fd, void *buf, size_t count,
 		lseek(fd, blockstart + block_seek, SEEK_SET);
 
 		rc = read(fd, buf + processed, readlen);
-		if (rc != readlen) {
+		if (rc == -1) {
 			fprintf(stderr, "Read error on %s: %s\n",
 				DEVNAME(dev), strerror(errno));
 			return -1;
 		}
+		if (rc != readlen) {
+			fprintf(stderr, "Read error on %s: "
+				"Attempted to read %d bytes but got %d\n",
+				DEVNAME(dev), readlen, rc);
+			return -1;
+		}
 #ifdef DEBUG
 		fprintf(stderr, "Read 0x%x bytes at 0x%llx on %s\n",
 			rc, (unsigned long long)blockstart + block_seek,
diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h
index b60fbfc8f8..78c803c944 100644
--- a/tools/env/fw_env.h
+++ b/tools/env/fw_env.h
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  */
 
-#include <env.h>
 #include <stdint.h>
 
 /*
diff --git a/tools/fdtgrep.c b/tools/fdtgrep.c
index 7e168a1e6b..e4112b8f69 100644
--- a/tools/fdtgrep.c
+++ b/tools/fdtgrep.c
@@ -923,7 +923,9 @@ static const char usage_synopsis[] =
 /* Helper for getopt case statements */
 #define case_USAGE_COMMON_FLAGS \
 	case 'h': usage(NULL); \
+	/* fallthrough */ \
 	case 'V': util_version(); \
+	/* fallthrough */ \
 	case '?': usage("unknown option");
 
 static const char usage_short_opts[] =
@@ -1085,6 +1087,7 @@ static void scan_args(struct display_info *disp, int argc, char *argv[])
 
 		switch (opt) {
 		case_USAGE_COMMON_FLAGS
+		/* fallthrough */
 		case 'a':
 			disp->show_addr = 1;
 			break;
@@ -1096,7 +1099,7 @@ static void scan_args(struct display_info *disp, int argc, char *argv[])
 			break;
 		case 'C':
 			inc = 0;
-			/* no break */
+			/* fallthrough */
 		case 'c':
 			type = FDT_IS_COMPAT;
 			break;
@@ -1111,7 +1114,7 @@ static void scan_args(struct display_info *disp, int argc, char *argv[])
 			break;
 		case 'G':
 			inc = 0;
-			/* no break */
+			/* fallthrough */
 		case 'g':
 			type = FDT_ANY_GLOBAL;
 			break;
@@ -1129,7 +1132,7 @@ static void scan_args(struct display_info *disp, int argc, char *argv[])
 			break;
 		case 'N':
 			inc = 0;
-			/* no break */
+			/* fallthrough */
 		case 'n':
 			type = FDT_IS_NODE;
 			break;
@@ -1148,7 +1151,7 @@ static void scan_args(struct display_info *disp, int argc, char *argv[])
 			break;
 		case 'P':
 			inc = 0;
-			/* no break */
+			/* fallthrough */
 		case 'p':
 			type = FDT_IS_PROP;
 			break;
diff --git a/tools/fit_image.c b/tools/fit_image.c
index 4aeabbcfe9..a082d9386d 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -17,6 +17,7 @@
 #include "fit_common.h"
 #include "mkimage.h"
 #include <image.h>
+#include <string.h>
 #include <stdarg.h>
 #include <version.h>
 #include <u-boot/crc.h>
@@ -110,7 +111,7 @@ static int fit_calc_size(struct image_tool_params *params)
 		if (size < 0)
 			return -1;
 
-		/* Add space for properties */
+		/* Add space for properties and hash node */
 		total_size += size + 300;
 	}
 
@@ -192,6 +193,18 @@ static void get_basename(char *str, int size, const char *fname)
 }
 
 /**
+ * add_crc_node() - Add a hash node to request a CRC checksum for an image
+ *
+ * @fdt: Device tree to add to (in sequential-write mode)
+ */
+static void add_crc_node(void *fdt)
+{
+	fdt_begin_node(fdt, "hash-1");
+	fdt_property_string(fdt, FIT_ALGO_PROP, "crc32");
+	fdt_end_node(fdt);
+}
+
+/**
  * fit_write_images() - Write out a list of images to the FIT
  *
  * We always include the main image (params->datafile). If there are device
@@ -229,6 +242,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt)
 	ret = fdt_property_file(params, fdt, FIT_DATA_PROP, params->datafile);
 	if (ret)
 		return ret;
+	add_crc_node(fdt);
 	fdt_end_node(fdt);
 
 	/* Now the device tree files if available */
@@ -251,6 +265,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt)
 				    genimg_get_arch_short_name(params->arch));
 		fdt_property_string(fdt, FIT_COMP_PROP,
 				    genimg_get_comp_short_name(IH_COMP_NONE));
+		add_crc_node(fdt);
 		fdt_end_node(fdt);
 	}
 
@@ -268,7 +283,7 @@ static int fit_write_images(struct image_tool_params *params, char *fdt)
 					params->fit_ramdisk);
 		if (ret)
 			return ret;
-
+		add_crc_node(fdt);
 		fdt_end_node(fdt);
 	}
 
@@ -744,6 +759,9 @@ static int fit_handle_file(struct image_tool_params *params)
 		snprintf(cmd, sizeof(cmd), "cp \"%s\" \"%s\"",
 			 params->imagefile, tmpfile);
 	}
+	if (strlen(cmd) >= MKIMAGE_MAX_DTC_CMDLINE_LEN - 1) {
+		fprintf(stderr, "WARNING: command-line for FIT creation might be truncated and will probably fail.\n");
+	}
 
 	if (*cmd && system(cmd) == -1) {
 		fprintf (stderr, "%s: system(%s) failed: %s\n",
diff --git a/tools/imx8image.c b/tools/imx8image.c
index 1b428c3b2f..133780f5ea 100644
--- a/tools/imx8image.c
+++ b/tools/imx8image.c
@@ -6,6 +6,7 @@
  */
 
 #include "imx8image.h"
+#include <image.h>
 
 static int p_idx;
 static int sector_size;
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 336376f8d0..d2cd191787 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -211,7 +211,7 @@ static void process_args(int argc, char **argv)
 		case 'f':
 			datafile = optarg;
 			params.auto_its = !strcmp(datafile, "auto");
-			/* no break */
+			/* fallthrough */
 		case 'F':
 			/*
 			 * The flattened image tree (FIT) format
diff --git a/tools/mkimage.h b/tools/mkimage.h
index 0254af59fb..5b096a545b 100644
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -42,6 +42,6 @@ static inline ulong map_to_sysmem(void *ptr)
 #define MKIMAGE_TMPFILE_SUFFIX		".tmp"
 #define MKIMAGE_MAX_TMPFILE_LEN		256
 #define MKIMAGE_DEFAULT_DTC_OPTIONS	"-I dts -O dtb -p 500"
-#define MKIMAGE_MAX_DTC_CMDLINE_LEN	512
+#define MKIMAGE_MAX_DTC_CMDLINE_LEN	2 * MKIMAGE_MAX_TMPFILE_LEN + 35
 
 #endif /* _MKIIMAGE_H_ */
diff --git a/tools/patman/README b/tools/patman/README
index 02d5829744..52b2cf70bd 100644
--- a/tools/patman/README
+++ b/tools/patman/README
@@ -247,14 +247,37 @@ Series-changes: n
 	to update the log there and then, knowing that the script will
 	do the rest.
 
+Commit-changes: n
+- This line will not appear in the cover-letter changelog
+<blank line>
+	This tag is like Series-changes, except changes in this changelog will
+	only appear in the changelog of the commit this tag is in. This is
+	useful when you want to add notes which may not make sense in the cover
+	letter. For example, you can have short changes such as "New" or
+	"Lint".
+
+Cover-changes: n
+- This line will only appear in the cover letter
+<blank line>
+	This tag is like Series-changes, except changes in this changelog will
+	only appear in the cover-letter changelog. This is useful to summarize
+	changes made with Commit-changes, or to add additional context to
+	changes.
+
 Patch-cc: Their Name <email>
 	This copies a single patch to another email address. Note that the
 	Cc: used by git send-email is ignored by patman, but will be
 	interpreted by git send-email if you use it.
 
 Series-process-log: sort, uniq
-	This tells patman to sort and/or uniq the change logs. It is
-	assumed that each change log entry is only a single line long.
+	This tells patman to sort and/or uniq the change logs. Changes may be
+	multiple lines long, as long as each subsequent line of a change begins
+	with a whitespace character. For example,
+
+- This change
+  continues onto the next line
+- But this change is separate
+
 	Use 'sort' to sort the entries, and 'uniq' to include only
 	unique entries. If omitted, no change log processing is done.
 	Separate each tag with a comma.
@@ -474,6 +497,33 @@ print out the command line patman would have used.
 not later when you can't remember which patch you changed. You can always
 go back and change or remove logs from commits.
 
+7. Some mailing lists have size limits and when we add binary contents to
+our patches it's easy to exceed the size limits. Use "--no-binary" to
+generate patches without any binary contents. You are supposed to include
+a link to a git repository in your "Commit-notes", "Series-notes" or
+"Cover-letter" for maintainers to fetch the original commit.
+
+8. Patches will have no changelog entries for revisions where they did not
+change. For clarity, if there are no changes for this patch in the most
+recent revision of the series, a note will be added. For example, a patch
+with the following tags in the commit
+
+    Series-version: 5
+    Series-changes: 2
+    - Some change
+
+    Series-changes: 4
+    - Another change
+
+would have a changelog of
+
+    (no changes since v4)
+
+    Changes in v4:
+    - Another change
+
+    Changes in v2:
+    - Some change
 
 Other thoughts
 ==============
diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py
index b7e2825de8..dc30078cce 100644
--- a/tools/patman/func_test.py
+++ b/tools/patman/func_test.py
@@ -82,19 +82,33 @@ class TestFunctional(unittest.TestCase):
             Series-prefix: RFC
             Series-cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
             Cover-letter-cc: Lord Mëlchett <clergy@palace.gov>
-            Series-version: 2
+            Series-version: 3
+            Patch-cc: fred
+            Series-process-log: sort, uniq
             Series-changes: 4
             - Some changes
+            - Multi
+              line
+              change
+
+            Commit-changes: 2
+            - Changes only for this commit
+
+            Cover-changes: 4
+            - Some notes for the cover letter
 
             Cover-letter:
             test: A test patch series
             This is a test of how the cover
-            leter
+            letter
             works
             END
 
         and this in the first commit:
 
+            Commit-changes: 2
+            - second revision change
+
             Series-notes:
             some notes
             about some things
@@ -202,7 +216,7 @@ class TestFunctional(unittest.TestCase):
 
         expected = '''
 This is a test of how the cover
-leter
+letter
 works
 
 some notes
@@ -210,7 +224,11 @@ about some things
 from the first commit
 
 Changes in v4:
+- Multi
+  line
+  change
 - Some changes
+- Some notes for the cover letter
 
 Simon Glass (2):
   pci: Correct cast for sandbox
@@ -237,8 +255,34 @@ Simon Glass (2):
             subject = [line for line in lines if line.startswith('Subject')]
             self.assertEqual('Subject: [RFC %d/%d]' % (i + 1, count),
                              subject[0][:18])
+
+            # Check that we got our commit notes
+            start = 0
+            expected = ''
+
             if i == 0:
-                # Check that we got our commit notes
-                self.assertEqual('---', lines[17])
-                self.assertEqual('Some notes about', lines[18])
-                self.assertEqual('the first commit', lines[19])
+                start = 17
+                expected = '''---
+Some notes about
+the first commit
+
+(no changes since v2)
+
+Changes in v2:
+- second revision change'''
+            elif i == 1:
+                start = 17
+                expected = '''---
+
+Changes in v4:
+- Multi
+  line
+  change
+- Some changes
+
+Changes in v2:
+- Changes only for this commit'''
+
+            if expected:
+                expected = expected.splitlines()
+                self.assertEqual(expected, lines[start:(start+len(expected))])
diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index 770a051014..72fc95d558 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -254,7 +254,7 @@ def Fetch(git_dir=None, work_tree=None):
     if result.return_code != 0:
         raise OSError('git fetch: %s' % result.stderr)
 
-def CreatePatches(start, count, series):
+def CreatePatches(start, count, ignore_binary, series):
     """Create a series of patches from the top of the current branch.
 
     The patch files are written to the current directory using
@@ -270,6 +270,8 @@ def CreatePatches(start, count, series):
     if series.get('version'):
         version = '%s ' % series['version']
     cmd = ['git', 'format-patch', '-M', '--signoff']
+    if ignore_binary:
+        cmd.append('--no-binary')
     if series.get('cover'):
         cmd.append('--cover-letter')
     prefix = series.GetPatchPrefix()
diff --git a/tools/patman/main.py b/tools/patman/main.py
index f3d9c0c434..0974c84059 100755
--- a/tools/patman/main.py
+++ b/tools/patman/main.py
@@ -36,11 +36,11 @@ parser.add_option('-c', '--count', dest='count', type='int',
 parser.add_option('-i', '--ignore-errors', action='store_true',
        dest='ignore_errors', default=False,
        help='Send patches email even if patch errors are found')
+parser.add_option('-l', '--limit-cc', dest='limit', type='int',
+       default=None, help='Limit the cc list to LIMIT entries [default: %default]')
 parser.add_option('-m', '--no-maintainers', action='store_false',
        dest='add_maintainers', default=True,
        help="Don't cc the file maintainers automatically")
-parser.add_option('-l', '--limit-cc', dest='limit', type='int',
-       default=None, help='Limit the cc list to LIMIT entries [default: %default]')
 parser.add_option('-n', '--dry-run', action='store_true', dest='dry_run',
        default=False, help="Do a dry run (create but don't email patches)")
 parser.add_option('-p', '--project', default=project.DetectProject(),
@@ -52,21 +52,24 @@ parser.add_option('-s', '--start', dest='start', type='int',
        default=0, help='Commit to start creating patches from (0 = HEAD)')
 parser.add_option('-t', '--ignore-bad-tags', action='store_true',
                   default=False, help='Ignore bad tags / aliases')
-parser.add_option('--test', action='store_true', dest='test',
-                  default=False, help='run tests')
 parser.add_option('-v', '--verbose', action='store_true', dest='verbose',
        default=False, help='Verbose output of errors and warnings')
+parser.add_option('-T', '--thread', action='store_true', dest='thread',
+                  default=False, help='Create patches as a single thread')
 parser.add_option('--cc-cmd', dest='cc_cmd', type='string', action='store',
        default=None, help='Output cc list for patch file (used by git)')
+parser.add_option('--no-binary', action='store_true', dest='ignore_binary',
+                  default=False,
+                  help="Do not output contents of changes in binary files")
 parser.add_option('--no-check', action='store_false', dest='check_patch',
                   default=True,
                   help="Don't check for patch compliance")
 parser.add_option('--no-tags', action='store_false', dest='process_tags',
-                  default=True, help="Don't process subject tags as aliaes")
+                  default=True, help="Don't process subject tags as aliases")
 parser.add_option('--smtp-server', type='str',
                   help="Specify the SMTP server to 'git send-email'")
-parser.add_option('-T', '--thread', action='store_true', dest='thread',
-                  default=False, help='Create patches as a single thread')
+parser.add_option('--test', action='store_true', dest='test',
+                  default=False, help='run tests')
 
 parser.usage += """
 
@@ -144,7 +147,7 @@ else:
     if options.count:
         series = patchstream.GetMetaData(options.start, options.count)
         cover_fname, args = gitutil.CreatePatches(options.start, options.count,
-                series)
+                options.ignore_binary, series)
 
     # Fix up the patch files to our liking, and insert the cover letter
     patchstream.FixPatches(series, args)
diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py
index 405297505c..4fe465e9ab 100644
--- a/tools/patman/patchstream.py
+++ b/tools/patman/patchstream.py
@@ -24,11 +24,8 @@ re_allowed_after_test = re.compile('^Signed-off-by:')
 # Signoffs
 re_signoff = re.compile('^Signed-off-by: *(.*)')
 
-# The start of the cover letter
-re_cover = re.compile('^Cover-letter:')
-
-# A cover letter Cc
-re_cover_cc = re.compile('^Cover-letter-cc: *(.*)')
+# Cover letter tag
+re_cover = re.compile('^Cover-([a-z-]*): *(.*)')
 
 # Patch series tag
 re_series_tag = re.compile('^Series-([a-z-]*): *(.*)')
@@ -48,6 +45,9 @@ re_commit = re.compile('^commit ([0-9a-f]*)$')
 # We detect these since checkpatch doesn't always do it
 re_space_before_tab = re.compile('^[+].* \t')
 
+# Match indented lines for changes
+re_leading_whitespace = re.compile('^\s')
+
 # States we can be in - can we use range() and still have comments?
 STATE_MSG_HEADER = 0        # Still in the message header
 STATE_PATCH_SUBJECT = 1     # In patch subject (first line of log for a commit)
@@ -65,7 +65,7 @@ class PatchStream:
     def __init__(self, series, name=None, is_log=False):
         self.skip_blank = False          # True to skip a single blank line
         self.found_test = False          # Found a TEST= line
-        self.lines_after_test = 0        # MNumber of lines found after TEST=
+        self.lines_after_test = 0        # Number of lines found after TEST=
         self.warn = []                   # List of warnings we have collected
         self.linenum = 1                 # Output line number we are up to
         self.in_section = None           # Name of start...END section we are in
@@ -73,7 +73,9 @@ class PatchStream:
         self.section = []                # The current section...END section
         self.series = series             # Info about the patch series
         self.is_log = is_log             # True if indent like git log
-        self.in_change = 0               # Non-zero if we are in a change list
+        self.in_change = None            # Name of the change list we are in
+        self.change_version = 0          # Non-zero if we are in a change list
+        self.change_lines = []           # Lines of the current change
         self.blank_count = 0             # Number of blank lines stored up
         self.state = STATE_MSG_HEADER    # What state are we in?
         self.signoff = []                # Contents of signoff line
@@ -124,6 +126,36 @@ class PatchStream:
             self.skip_blank = True
             self.section = []
 
+    def ParseVersion(self, value, line):
+        """Parse a version from a *-changes tag
+
+        Args:
+            value: Tag value (part after 'xxx-changes: '
+            line: Source line containing tag
+
+        Returns:
+            The version as an integer
+        """
+        try:
+            return int(value)
+        except ValueError as str:
+            raise ValueError("%s: Cannot decode version info '%s'" %
+                (self.commit.hash, line))
+
+    def FinalizeChange(self):
+        """Finalize a (multi-line) change and add it to the series or commit"""
+        if not self.change_lines:
+            return
+        change = '\n'.join(self.change_lines)
+
+        if self.in_change == 'Series':
+            self.series.AddChange(self.change_version, self.commit, change)
+        elif self.in_change == 'Cover':
+            self.series.AddChange(self.change_version, None, change)
+        elif self.in_change == 'Commit':
+            self.commit.AddChange(self.change_version, change)
+        self.change_lines = []
+
     def ProcessLine(self, line):
         """Process a single line of a patch file or commit log
 
@@ -163,8 +195,8 @@ class PatchStream:
         change_id_match = re_change_id.match(line)
         commit_tag_match = re_commit_tag.match(line)
         cover_match = re_cover.match(line)
-        cover_cc_match = re_cover_cc.match(line)
         signoff_match = re_signoff.match(line)
+        leading_whitespace_match = re_leading_whitespace.match(line)
         tag_match = None
         if self.state == STATE_PATCH_HEADER:
             tag_match = re_tag.match(line)
@@ -183,8 +215,7 @@ class PatchStream:
 
         # If a tag is detected, or a new commit starts
         if series_tag_match or commit_tag_match or change_id_match or \
-           cover_match or cover_cc_match or signoff_match or \
-           self.state == STATE_MSG_HEADER:
+           cover_match or signoff_match or self.state == STATE_MSG_HEADER:
             # but we are already in a section, this means 'END' is missing
             # for that section, fix it up.
             if self.in_section:
@@ -205,8 +236,10 @@ class PatchStream:
             # but we are already in a change list, that means a blank line
             # is missing, fix it up.
             if self.in_change:
-                self.warn.append("Missing 'blank line' in section 'Series-changes'")
-                self.in_change = 0
+                self.warn.append("Missing 'blank line' in section '%s-changes'" % self.in_change)
+                self.FinalizeChange()
+                self.in_change = None
+                self.change_version = 0
 
         # If we are in a section, keep collecting lines until we see END
         if self.in_section:
@@ -242,26 +275,35 @@ class PatchStream:
         elif self.skip_blank and is_blank:
             self.skip_blank = False
 
-        # Detect the start of a cover letter section
+        # Detect Cover-xxx tags
         elif cover_match:
-            self.in_section = 'cover'
-            self.skip_blank = False
-
-        elif cover_cc_match:
-            value = cover_cc_match.group(1)
-            self.AddToSeries(line, 'cover-cc', value)
+            name = cover_match.group(1)
+            value = cover_match.group(2)
+            if name == 'letter':
+                self.in_section = 'cover'
+                self.skip_blank = False
+            elif name == 'letter-cc':
+                self.AddToSeries(line, 'cover-cc', value)
+            elif name == 'changes':
+                self.in_change = 'Cover'
+                self.change_version = self.ParseVersion(value, line)
 
         # If we are in a change list, key collected lines until a blank one
         elif self.in_change:
             if is_blank:
                 # Blank line ends this change list
-                self.in_change = 0
+                self.FinalizeChange()
+                self.in_change = None
+                self.change_version = 0
             elif line == '---':
-                self.in_change = 0
+                self.FinalizeChange()
+                self.in_change = None
+                self.change_version = 0
                 out = self.ProcessLine(line)
-            else:
-                if self.is_log:
-                    self.series.AddChange(self.in_change, self.commit, line)
+            elif self.is_log:
+                if not leading_whitespace_match:
+                    self.FinalizeChange()
+                self.change_lines.append(line)
             self.skip_blank = False
 
         # Detect Series-xxx tags
@@ -270,12 +312,8 @@ class PatchStream:
             value = series_tag_match.group(2)
             if name == 'changes':
                 # value is the version number: e.g. 1, or 2
-                try:
-                    value = int(value)
-                except ValueError as str:
-                    raise ValueError("%s: Cannot decode version info '%s'" %
-                        (self.commit.hash, line))
-                self.in_change = int(value)
+                self.in_change = 'Series'
+                self.change_version = self.ParseVersion(value, line)
             else:
                 self.AddToSeries(line, name, value)
                 self.skip_blank = True
@@ -297,6 +335,9 @@ class PatchStream:
             if name == 'notes':
                 self.AddToCommit(line, name, value)
                 self.skip_blank = True
+            elif name == 'changes':
+                self.in_change = 'Commit'
+                self.change_version = self.ParseVersion(value, line)
 
         # Detect the start of a new commit
         elif commit_match:
@@ -340,7 +381,7 @@ class PatchStream:
             elif line == '---':
                 self.state = STATE_DIFFS
 
-                # Output the tags (signeoff first), then change list
+                # Output the tags (signoff first), then change list
                 out = []
                 log = self.series.MakeChangeLog(self.commit)
                 out += [line]
@@ -355,6 +396,7 @@ class PatchStream:
 
     def Finalize(self):
         """Close out processing of this patch stream"""
+        self.FinalizeChange()
         self.CloseCommit()
         if self.lines_after_test:
             self.warn.append('Found %d lines after TEST=' %
diff --git a/tools/patman/series.py b/tools/patman/series.py
index e5e28cebdf..ca7ca556dc 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -2,6 +2,9 @@
 # Copyright (c) 2011 The Chromium OS Authors.
 #
 
+from __future__ import print_function
+
+import collections
 import itertools
 import os
 
@@ -144,38 +147,65 @@ class Series(dict):
             Changes in v4:
             - Jog the dial back closer to the widget
 
-            Changes in v3: None
             Changes in v2:
             - Fix the widget
             - Jog the dial
 
-            etc.
+            If there are no new changes in a patch, a note will be added
+
+            (no changes since v2)
+
+            Changes in v2:
+            - Fix the widget
+            - Jog the dial
         """
+        # Collect changes from the series and this commit
+        changes = collections.defaultdict(list)
+        for version, changelist in self.changes.items():
+            changes[version] += changelist
+        if commit:
+            for version, changelist in commit.changes.items():
+                changes[version] += [[commit, text] for text in changelist]
+
+        versions = sorted(changes, reverse=True)
+        newest_version = 1
+        if 'version' in self:
+            newest_version = max(newest_version, int(self.version))
+        if versions:
+            newest_version = max(newest_version, versions[0])
+
         final = []
         process_it = self.get('process_log', '').split(',')
         process_it = [item.strip() for item in process_it]
         need_blank = False
-        for change in sorted(self.changes, reverse=True):
+        for version in versions:
             out = []
-            for this_commit, text in self.changes[change]:
+            for this_commit, text in changes[version]:
                 if commit and this_commit != commit:
                     continue
                 if 'uniq' not in process_it or text not in out:
                     out.append(text)
-            line = 'Changes in v%d:' % change
-            have_changes = len(out) > 0
             if 'sort' in process_it:
                 out = sorted(out)
+            have_changes = len(out) > 0
+            line = 'Changes in v%d:' % version
             if have_changes:
                 out.insert(0, line)
-            else:
-                out = [line + ' None']
-            if need_blank:
-                out.insert(0, '')
+                if version < newest_version and len(final) == 0:
+                    out.insert(0, '')
+                    out.insert(0, '(no changes since v%d)' % version)
+                    newest_version = 0
+                # Only add a new line if we output something
+                if need_blank:
+                    out.insert(0, '')
+                    need_blank = False
             final += out
-            need_blank = have_changes
-        if self.changes:
+            need_blank = need_blank or have_changes
+
+        if len(final) > 0:
             final.append('')
+        elif newest_version != 1:
+            final = ['(no changes since v1)', '']
         return final
 
     def DoChecks(self):
diff --git a/tools/patman/test/0001-pci-Correct-cast-for-sandbox.patch b/tools/patman/test/0001-pci-Correct-cast-for-sandbox.patch
index 7191176f75..038943c2c9 100644
--- a/tools/patman/test/0001-pci-Correct-cast-for-sandbox.patch
+++ b/tools/patman/test/0001-pci-Correct-cast-for-sandbox.patch
@@ -15,6 +15,9 @@ cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
 Fix it with a cast.
 
 Signed-off-by: Simon Glass <sjg@chromium.org>
+Commit-changes: 2
+- Changes only for this commit
+
 Series-notes:
 some notes
 about some things
diff --git a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_mem_siz.patch b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_mem_siz.patch
index 702c0306ff..56278a6ce9 100644
--- a/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_mem_siz.patch
+++ b/tools/patman/test/0002-fdt-Correct-cast-for-sandbox-in-fdtdec_setup_mem_siz.patch
@@ -21,13 +21,23 @@ Series-cc: Stefan Brüns <stefan.bruens@rwth-aachen.de>
 Cover-letter-cc: Lord Mëlchett <clergy@palace.gov>
 Series-version: 3
 Patch-cc: fred
+Series-process-log: sort, uniq
 Series-changes: 4
 - Some changes
+- Multi
+  line
+  change
+
+Commit-changes: 2
+- Changes only for this commit
+
+Cover-changes: 4
+- Some notes for the cover letter
 
 Cover-letter:
 test: A test patch series
 This is a test of how the cover
-leter
+letter
 works
 END
 ---
diff --git a/tools/patman/test/test01.txt b/tools/patman/test/test01.txt
index 478ea93674..b238a8b4ba 100644
--- a/tools/patman/test/test01.txt
+++ b/tools/patman/test/test01.txt
@@ -13,6 +13,9 @@ Date:   Sat Apr 15 15:39:08 2017 -0600
     Fix it with a cast.
     
     Signed-off-by: Simon Glass <sjg@chromium.org>
+    Commit-changes: 2
+    - second revision change
+
     Series-notes:
     some notes
     about some things
@@ -45,12 +48,22 @@ Date:   Sat Apr 15 15:39:08 2017 -0600
     Cover-letter-cc: Lord Mëlchett <clergy@palace.gov>
     Series-version: 3
     Patch-cc: fred
+    Series-process-log: sort, uniq
     Series-changes: 4
     - Some changes
+    - Multi
+      line
+      change
+
+    Commit-changes: 2
+    - Changes only for this commit
+
+    Cover-changes: 4
+    - Some notes for the cover letter
     
     Cover-letter:
     test: A test patch series
     This is a test of how the cover
-    leter
+    letter
     works
     END
diff --git a/tools/proftool.c b/tools/proftool.c
index fecb9d6e99..ea7d07a277 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -532,7 +532,7 @@ static int make_ftrace(void)
 	return 0;
 }
 
-static int prof_tool(int argc, char * const argv[],
+static int prof_tool(int argc, char *const argv[],
 		     const char *prof_fname, const char *map_fname,
 		     const char *trace_config_fname)
 {
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 8f281f5901..61c392e27d 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -133,7 +133,7 @@ static int rkcommon_get_aligned_size(struct image_tool_params *params,
 
 int rkcommon_check_params(struct image_tool_params *params)
 {
-	int i;
+	int i, size;
 
 	/*
 	 * If this is a operation (list or extract), the don't require
@@ -153,17 +153,17 @@ int rkcommon_check_params(struct image_tool_params *params)
 		spl_params.boot_file += 1;
 	}
 
-	spl_params.init_size =
-		rkcommon_get_aligned_size(params, spl_params.init_file);
-	if (spl_params.init_size < 0)
+	size = rkcommon_get_aligned_size(params, spl_params.init_file);
+	if (size < 0)
 		return EXIT_FAILURE;
+	spl_params.init_size = size;
 
 	/* Boot file is optional, and only for back-to-bootrom functionality. */
 	if (spl_params.boot_file) {
-		spl_params.boot_size =
-			rkcommon_get_aligned_size(params, spl_params.boot_file);
-		if (spl_params.boot_size < 0)
+		size = rkcommon_get_aligned_size(params, spl_params.boot_file);
+		if (size < 0)
 			return EXIT_FAILURE;
+		spl_params.boot_size = size;
 	}
 
 	if (spl_params.init_size > rkcommon_get_spl_size(params)) {