diff options
| -rw-r--r-- | arch/x86/cpu/quark/quark.c | 17 | ||||
| -rw-r--r-- | arch/x86/dts/galileo.dts | 13 | ||||
| -rw-r--r-- | drivers/spi/ich.c | 3 |
3 files changed, 32 insertions, 1 deletions
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c index cf596e45e1..0d593d9a86 100644 --- a/arch/x86/cpu/quark/quark.c +++ b/arch/x86/cpu/quark/quark.c @@ -13,6 +13,21 @@ #include <asm/arch/msg_port.h> #include <asm/arch/quark.h> +/* + * TODO: + * + * This whole routine should be removed until we fully convert the ICH SPI + * driver to DM and make use of DT to pass the bios control register offset + */ +static void unprotect_spi_flash(void) +{ + u32 bc; + + bc = pci_read_config32(QUARK_LEGACY_BRIDGE, 0xd8); + bc |= 0x1; /* unprotect the flash */ + pci_write_config32(QUARK_LEGACY_BRIDGE, 0xd8, bc); +} + static void quark_setup_bars(void) { /* GPIO - D31:F0:R44h */ @@ -74,6 +89,8 @@ int arch_cpu_init(void) */ quark_setup_bars(); + unprotect_spi_flash(); + return 0; } diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts index 2f60aeb82d..66af64abda 100644 --- a/arch/x86/dts/galileo.dts +++ b/arch/x86/dts/galileo.dts @@ -79,4 +79,17 @@ bank-name = "B"; }; + spi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "intel,ich-spi"; + spi-flash@0 { + #size-cells = <1>; + #address-cells = <1>; + reg = <0>; + compatible = "winbond,w25q64", "spi-flash"; + memory-map = <0xff800000 0x00800000>; + }; + }; + }; diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index da857791e0..194e882302 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -177,7 +177,8 @@ void spi_free_slave(struct spi_slave *slave) static int get_ich_version(uint16_t device_id) { if (device_id == PCI_DEVICE_ID_INTEL_TGP_LPC || - device_id == PCI_DEVICE_ID_INTEL_ITC_LPC) + device_id == PCI_DEVICE_ID_INTEL_ITC_LPC || + device_id == PCI_DEVICE_ID_INTEL_QRK_ILB) return 7; if ((device_id >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN && |