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authorStefan Roese <sr@denx.de>2007-04-18 12:05:59 +0200
committerStefan Roese <sr@denx.de>2007-04-18 12:05:59 +0200
commit90e6f41cf09fc98f6ccb510e183d53ab8546cf2f (patch)
tree63e847dbbfc47fe9d68f73dfd55848609237d65e /include
parentd3832e8fe1b214ec62424eac36cfda9fc56d21b3 (diff)
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ppc4xx: Add output for bootrom location to 405EZ ports
Now 405EZ ports also show upon bootup from which boot device they are configured to boot: U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05) CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz) Bootstrap Option E - Boot ROM Location EBC (32 bits) 16 kB I-Cache 16 kB D-Cache Board: Acadia - AMCC PPC405EZ Evaluation Board Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include')
-rw-r--r--include/ppc405.h2
-rw-r--r--include/ppc440.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/include/ppc405.h b/include/ppc405.h
index 08f10d27b2..a2503a93d2 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -570,6 +570,8 @@
#define SDR_ICTX0_STAT 0x40000000
#define SDR_ICTX1_STAT 0x20000000
+#define SDR_PINSTP 0x40
+
/******************************************************************************
* Control
******************************************************************************/
diff --git a/include/ppc440.h b/include/ppc440.h
index 51e6b9b28c..bc1d7aad73 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -148,7 +148,7 @@
#define sdrcfgd (SDR_DCR_BASE+0x1)
#define sdr_sdstp0 0x0020 /* */
#define sdr_sdstp1 0x0021 /* */
-#define sdr_pinstp 0x0040
+#define SDR_PINSTP 0x0040
#define sdr_sdcs 0x0060
#define sdr_ecid0 0x0080
#define sdr_ecid1 0x0081