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| author | Shawn Guo <shawn.gsc@gmail.com> | 2010-10-28 10:13:15 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2010-10-28 11:43:23 +0200 |
| commit | 1ab027cbf6536f40348699a7b7bfa8bbedf88c8e (patch) | |
| tree | ec7a68edd1a441505c7771e6df751344c5db9a07 /include/configs | |
| parent | 06982534b65f4ceddd124d0467c89dd7adf6d445 (diff) | |
| download | u-boot-1ab027cbf6536f40348699a7b7bfa8bbedf88c8e.tar.gz u-boot-1ab027cbf6536f40348699a7b7bfa8bbedf88c8e.tar.xz u-boot-1ab027cbf6536f40348699a7b7bfa8bbedf88c8e.zip | |
mx51evk: support new relocation scheme
This patch is to fix build breakage and support new relocation
scheme for mx51evk.
- Correct IRAM base address and add size definition
The IRAM starts from 0x1FFE0000 on final revsion i.mx51 than
0x1FFE8000 which is for older revision.
- Include imx-regs.h in mx51evk.h
Definitions like CSD0_BASE_ADDR and IRAM_BASE_ADDR can be
referred to.
- Define CONFIG_SYS_INIT_RAM_ADDR and CONFIG_SYS_INIT_RAM_SIZE
They are used to define init RAM layout.
- Remove comment for CONFIG_SYS_GBL_DATA_SIZE which has been
buried by Wolfgang's commit below
25ddd1fb: Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
Signed-off-by: Shawn Guo <shawn.gsc@gmail.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/mx51evk.h | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index a39260c3f4..f98438d637 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -24,11 +24,11 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include <asm/arch/imx-regs.h> /* High Level Configuration Options */ #define CONFIG_MX51 /* in a mx51 */ -#define CONFIG_SKIP_RELOCATE_UBOOT #define CONFIG_SYS_MX5_HCLK 24000000 #define CONFIG_SYS_MX5_CLK32 32768 @@ -51,7 +51,6 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) -/* size in bytes reserved for initial data */ #define BOARD_LATE_INIT @@ -200,6 +199,15 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) +#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + #define CONFIG_SYS_DDR_CLKSEL 0 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 |