diff options
| author | TsiChungLiew <Tsi-Chung.Liew@freescale.com> | 2007-08-05 04:31:18 -0500 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-08-08 09:47:43 +0200 |
| commit | 1a33ce65a4c51a69190dd8c408f9e1c62a66e94f (patch) | |
| tree | bffec58b0314514d15a151b50e279ec8277a9042 /include/configs | |
| parent | eaf9e447beb3e498818ef8ad0b8c1597cd506149 (diff) | |
| download | u-boot-1a33ce65a4c51a69190dd8c408f9e1c62a66e94f.tar.gz u-boot-1a33ce65a4c51a69190dd8c408f9e1c62a66e94f.tar.xz u-boot-1a33ce65a4c51a69190dd8c408f9e1c62a66e94f.zip | |
Added NAND support
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/M5329EVB.h | 27 |
1 files changed, 24 insertions, 3 deletions
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index 605684bee3..6a7e052a05 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -47,7 +47,7 @@ #undef CONFIG_WATCHDOG #define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */ -#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ +#define DEFAULT_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_CACHE | \ CFG_CMD_DATE | \ CFG_CMD_ELF | \ @@ -62,6 +62,12 @@ CFG_CMD_REGINFO \ ) +#ifdef NANDFLASH_SIZE +# define CONFIG_COMMANDS (DEFAULT_COMMANDS | CFG_CMD_NAND) +#else +# define CONFIG_COMMANDS (DEFAULT_COMMANDS) +#endif + #define CFG_UNIFY_CACHE #define CONFIG_MCFFEC @@ -148,6 +154,8 @@ #define CFG_MBAR 0xFC000000 +#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000) + /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) @@ -205,6 +213,19 @@ # define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */ #endif +#ifdef NANDFLASH_SIZE +# define CFG_MAX_NAND_DEVICE 1 +# define CFG_NAND_BASE (CFG_CS2_BASE << 16) +# define CFG_NAND_SIZE 1 +# define CFG_NAND_BASE_LIST { CFG_NAND_BASE } +# define NAND_MAX_CHIPS 1 +# define NAND_ALLOW_ERASE_ALL 1 +# define CONFIG_JFFS2_NAND 1 +# define CONFIG_JFFS2_DEV "nand0" +# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1) +# define CONFIG_JFFS2_PART_OFFSET 0x00000000 +#endif + #define CFG_FLASH_BASE 0 #define CFG_FLASH0_BASE (CFG_CS0_BASE << 16) @@ -241,8 +262,8 @@ #define CFG_CS1_CTRL 0x002A3780 #ifdef NANDFLASH_SIZE -#define CFG_CS2_BASE 0x00800000 -#define CFG_CS2_MASK 0x00ff0001 +#define CFG_CS2_BASE 0x2000 +#define CFG_CS2_MASK ((NANDFLASH_SIZE << 20) | 1) #define CFG_CS2_CTRL 0x00001f60 #endif |