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| author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2009-03-22 14:48:16 +0100 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-03-22 14:48:16 +0100 |
| commit | df486b1fa3f750b153eac7daa0b3bf1f594e5098 (patch) | |
| tree | 6cc2bd47266a75cf48182917d3f063c2eb4bc39a /include/configs | |
| parent | 118d168035cc93f586da4812c89cb153eb9f4243 (diff) | |
| download | u-boot-df486b1fa3f750b153eac7daa0b3bf1f594e5098.tar.gz u-boot-df486b1fa3f750b153eac7daa0b3bf1f594e5098.tar.xz u-boot-df486b1fa3f750b153eac7daa0b3bf1f594e5098.zip | |
at91: Support for the at91sam9g20 : Atmel 400Mhz ARM 926ej-s SOC.
AT91sam9g20 is an evolution of the at91sam9260 with a faster clock speed.
The AT91SAM9G20-EK board is an updated revision of the AT91SAM9260-EK board.
It is essentially the same, with a few minor differences.
Here is the chip page on Atmel website:
http://www.atmel.com/dyn/products/product_card.asp?part_id=4337
Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/at91sam9260ek.h | 23 |
1 files changed, 18 insertions, 5 deletions
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 2661563627..1fae3a3b82 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -3,7 +3,7 @@ * Stelian Pop <stelian.pop@leadtechdesign.com> * Lead Tech Design <www.leadtechdesign.com> * - * Configuation settings for the AT91SAM9260EK board. + * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. * * See file CREDITS for list of people who contributed to this * project. @@ -28,18 +28,26 @@ #define __CONFIG_H /* ARM asynchronous clock */ -#define AT91_CPU_NAME "AT91SAM9260" #define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ -#define AT91_MASTER_CLOCK 100000000 /* peripheral */ -#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */ #define CONFIG_SYS_HZ 1000000 /* 1us resolution */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ + +#ifdef CONFIG_AT91SAM9G20EK +#define AT91_CPU_NAME "AT91SAM9G20" +#define AT91_MASTER_CLOCK 132000000 /* peripheral */ +#define AT91_CPU_CLOCK 396000000 /* cpu */ +#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/ +#else +#define AT91_CPU_NAME "AT91SAM9260" +#define AT91_MASTER_CLOCK 100000000 /* peripheral */ +#define AT91_CPU_CLOCK 200000000 /* cpu */ #define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/ -#define CONFIG_AT91SAM9260EK 1 /* on an AT91SAM9260EK Board */ +#endif + #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ @@ -101,7 +109,12 @@ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ #define AT91_SPI_CLK 15000000 + +#ifdef CONFIG_AT91SAM9G20EK +#define DATAFLASH_TCSS (0x22 << 16) +#else #define DATAFLASH_TCSS (0x1a << 16) +#endif #define DATAFLASH_TCHS (0x1 << 24) /* NAND flash */ |