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authorwdenk <wdenk>2003-12-07 18:32:37 +0000
committerwdenk <wdenk>2003-12-07 18:32:37 +0000
commita2663ea4fc9d18cb8000c97ed92c3c668eda8e04 (patch)
tree9eb328b497d6f482e5571635fa00b1d0cae5b185 /include/asm-mips
parentef5a9672c778e22ecb522db625b5df78ea40ed23 (diff)
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* Patches by David Müller, 14 Nov 2003:
- board/mpl/common/common_util.c * implement support for BZIP2 compressed images * various cleanups (printf -> puts, ...) - board/mpl/common/flash.c * report correct errors to upper layers * check the erase fail and VPP low bits in status reg - board/mpl/vcma9/cmd_vcma9.c - board/mpl/vcma9/flash.c * various cleanups (printf -> puts, ...) - common/cmd_usb.c * fix typo in comment - cpu/arm920t/usb_ohci.c * support for S3C2410 is missing in #if line - drivers/cs8900.c * reinit some registers in case of error (cable missing, ...) - fs/fat/fat.c * support for USB/MMC devices is missing in #if line - include/configs/MIP405.h - include/configs/PIP405.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support - include/configs/VCMA9.h * enable BZIP2 support * enlarge malloc space to 1MiB because of BZIP2 support * enable USB support - lib_arm/armlinux.c * change calling convention of ARM Linux kernel as described on http://www.arm.linux.org.uk/developer/booting.php * Patch by Thomas Lange, 14 Nov 2003: Split dbau1x00 into dbau1000, dbau1100 and dbau1500 configs to support all these AMD boards. * Patch by Thomas Lange, 14 Nov 2003: Workaround for mips au1x00 physical memory accesses (the au1x00 uses a 36 bit bus internally and cannot access physical memory directly. Use the uncached SDRAM address instead of the physical one.)
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/addrspace.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 0d1bf3246d..1fd00ccba9 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -40,6 +40,18 @@
#define PHYSADDR(a) ((a) & 0x1fffffff)
#endif
+/*
+ * Returns the uncached address of a sdram address
+ */
+#ifndef __ASSEMBLY__
+#ifdef CONFIG_AU1X00
+/* We use a 36 bit physical address map here and
+ cannot access physical memory directly from core */
+#define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
+#else /* !CONFIG_AU1X00 */
+#define UNCACHED_SDRAM(a) PHYSADDR(a)
+#endif /* CONFIG_AU1X00 */
+#endif /* __ASSEMBLY__ */
/*
* Map an address to a certain kernel segment
*/