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authorWolfgang Denk <wd@nyx.denx.de>2006-05-31 13:12:39 +0200
committerWolfgang Denk <wd@nyx.denx.de>2006-05-31 13:12:39 +0200
commit81d72d7e2e7996c6c4e60985dbcc84afe5ed816c (patch)
treecf42eec07ffde614e16143247ef6fe6654722c37 /include/asm-arm
parent392c252efd5d2e67b47ebeb3b7e4f42e7e3d5127 (diff)
parentddf83a2fcef1a670c45fc585119dcc1fe062c4a9 (diff)
downloadu-boot-81d72d7e2e7996c6c4e60985dbcc84afe5ed816c.tar.gz
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Merge with /home/mk/git/u-boot#generic_ohci
Diffstat (limited to 'include/asm-arm')
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h23
1 files changed, 22 insertions, 1 deletions
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index ebda7192ed..c47306cff2 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -592,9 +592,11 @@ typedef void (*ExcpHndlr) (void) ;
#define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */
#define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */
+
/*
* USB Device Controller
*/
+#ifndef CONFIG_CPU_MONAHANS
#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
#define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */
#define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */
@@ -749,11 +751,30 @@ typedef void (*ExcpHndlr) (void) ;
#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */
#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */
#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */
+#endif /* ! CONFIG_CPU_MONAHANS */
+
+#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+
+/*
+ * USB Client Controller (incomplete)
+ */
+#define UDCCR __REG(0x40600000)
+#define UDCICR0 __REG(0x40600004)
+#define UDCCIR0 __REG(0x40600008)
+#define UDCISR0 __REG(0x4060000c)
+#define UDCSIR1 __REG(0x40600010)
+#define UDCFNR __REG(0x40600014)
+#define UDCOTGICR __REG(0x40600018)
+#define UDCOTGISR __REG(0x4060001c)
+#define UP2OCR __REG(0x40600020)
+#define UP3OCR __REG(0x40600024)
+
+
-#if defined(CONFIG_PXA27X)
/*
* USB Host Controller
*/
+#define OHCI_REGS_BASE 0x4C000000 /* required for ohci driver */
#define UHCREV __REG(0x4C000000)
#define UHCHCON __REG(0x4C000004)
#define UHCCOMS __REG(0x4C000008)