diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /doc/README.m5373evb | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.xz u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'doc/README.m5373evb')
| -rw-r--r-- | doc/README.m5373evb | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/doc/README.m5373evb b/doc/README.m5373evb index b2ef4a5f7c..4781d94172 100644 --- a/doc/README.m5373evb +++ b/doc/README.m5373evb @@ -67,12 +67,12 @@ CONFIG_M5373 -- define for all Freescale MCF5373 CPUs CONFIG_M5373EVB -- define for M5373EVB board CONFIG_MCFUART -- define to use common CF Uart driver -CFG_UART_PORT -- define UART port number, start with 0, 1 and 2 +CONFIG_SYS_UART_PORT -- define UART port number, start with 0, 1 and 2 CONFIG_BAUDRATE -- define UART baudrate CONFIG_MCFRTC -- define to use common CF RTC driver -CFG_MCFRTC_BASE -- provide base address for RTC in immap.h -CFG_RTC_OSCILLATOR -- define RTC clock frequency +CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h +CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency RTC_DEBUG -- define to show RTC debug message CONFIG_CMD_DATE -- enable to use date feature in u-boot @@ -80,11 +80,11 @@ CONFIG_MCFFEC -- define to use common CF FEC driver CONFIG_NET_MULTI -- define to use multi FEC in u-boot CONFIG_MII -- enable to use MII driver CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c -CFG_DISCOVER_PHY -- enable PHY discovery -CFG_RX_ETH_BUFFER -- Set FEC Receive buffer -CFG_FAULT_ECHO_LINK_DOWN-- -CFG_FEC0_PINMUX -- Set FEC0 Pin configuration -CFG_FEC0_MIIBASE -- Set FEC0 MII base register +CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery +CONFIG_SYS_RX_ETH_BUFFER -- Set FEC Receive buffer +CONFIG_SYS_FAULT_ECHO_LINK_DOWN-- +CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration +CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register MCFFEC_TOUT_LOOP -- set FEC timeout loop CONFIG_MCFTMR -- define to use DMA timer @@ -93,22 +93,22 @@ CONFIG_MCFPIT -- define to use PIT timer CONFIG_FSL_I2C -- define to use FSL common I2C driver CONFIG_HARD_I2C -- define for I2C hardware support CONFIG_SOFT_I2C -- define for I2C bit-banged -CFG_I2C_SPEED -- define for I2C speed -CFG_I2C_SLAVE -- define for I2C slave address -CFG_I2C_OFFSET -- define for I2C base address offset -CFG_IMMR -- define for MBAR offset +CONFIG_SYS_I2C_SPEED -- define for I2C speed +CONFIG_SYS_I2C_SLAVE -- define for I2C slave address +CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset +CONFIG_SYS_IMMR -- define for MBAR offset -CFG_MBAR -- define MBAR offset +CONFIG_SYS_MBAR -- define MBAR offset CONFIG_MONITOR_IS_IN_RAM -- Not support -CFG_INIT_RAM_ADDR -- defines the base address of the MCF5373 internal SRAM +CONFIG_SYS_INIT_RAM_ADDR -- defines the base address of the MCF5373 internal SRAM -CFG_CSn_BASE -- defines the Chip Select Base register -CFG_CSn_MASK -- defines the Chip Select Mask register -CFG_CSn_CTRL -- defines the Chip Select Control register +CONFIG_SYS_CSn_BASE -- defines the Chip Select Base register +CONFIG_SYS_CSn_MASK -- defines the Chip Select Mask register +CONFIG_SYS_CSn_CTRL -- defines the Chip Select Control register -CFG_SDRAM_BASE -- defines the DRAM Base +CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base 2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL =========================================== |