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author | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-09-18 19:04:26 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2008-09-19 11:05:22 +0900 |
commit | 4a065abf926f128beb36d93449defa0d690e7fef (patch) | |
tree | 9258a897e68d174fb974ec633c24ae6090380a8e /cpu/sh4 | |
parent | a03c09c5fdb8430fe2ae6a03f88a0cf7bcc0aa57 (diff) | |
download | u-boot-4a065abf926f128beb36d93449defa0d690e7fef.tar.gz u-boot-4a065abf926f128beb36d93449defa0d690e7fef.tar.xz u-boot-4a065abf926f128beb36d93449defa0d690e7fef.zip |
sh: Add support watchdog for SH4A core
Add support watchdog for SH4A core (SH7763, SH7780 and SH7785).
And fix some compile warning.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'cpu/sh4')
-rw-r--r-- | cpu/sh4/watchdog.c | 53 |
1 files changed, 37 insertions, 16 deletions
diff --git a/cpu/sh4/watchdog.c b/cpu/sh4/watchdog.c index 346e21714f..f6924290f0 100644 --- a/cpu/sh4/watchdog.c +++ b/cpu/sh4/watchdog.c @@ -17,34 +17,55 @@ #include <common.h> #include <asm/processor.h> +#include <asm/io.h> #define WDT_BASE WTCNT -static unsigned char cnt_read (void){ - return *((volatile unsigned char *)(WDT_BASE + 0x00)); +#define WDT_WD (1 << 6) +#define WDT_RST_P (0) +#define WDT_RST_M (1 << 5) +#define WDT_ENABLE (1 << 7) + +#if defined(CONFIG_WATCHDOG) +static unsigned char csr_read(void) +{ + return inb(WDT_BASE + 0x04); } -static unsigned char csr_read (void){ - return *((volatile unsigned char *)(WDT_BASE + 0x04)); +static void cnt_write(unsigned char value) +{ + outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00); } -static void cnt_write (unsigned char value){ - while (csr_read() & (1 << 5)) { - /* delay */ - } - *((volatile unsigned short *)(WDT_BASE + 0x00)) - = ((unsigned short) value) | 0x5A00; +static void csr_write(unsigned char value) +{ + outl((unsigned short)value | 0xA500, WDT_BASE + 0x04); } -static void csr_write (unsigned char value){ - *((volatile unsigned short *)(WDT_BASE + 0x04)) - = ((unsigned short) value) | 0xA500; +void watchdog_reset(void) +{ + outl(0x55000000, WDT_BASE + 0x08); } +int watchdog_init(void) +{ + /* Set overflow time*/ + cnt_write(0); + /* Power on reset */ + csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE); + + return 0; +} -int watchdog_init (void){ return 0; } +int watchdog_disable(void) +{ + csr_write(csr_read() & ~WDT_ENABLE); + return 0; +} +#endif -void reset_cpu (unsigned long ignored) +void reset_cpu(unsigned long ignored) { - while(1); + while (1) + ; } |