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| author | wdenk <wdenk> | 2005-04-02 23:52:25 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2005-04-02 23:52:25 +0000 |
| commit | 400558b561e2bdb47f87b96b3510dda0881a3662 (patch) | |
| tree | 479fa3918e0031a95cdac9468cb8396e1f1a9b60 /cpu/pxa | |
| parent | 414eec35e3832f4f9ce8a25ace7ead638be1f76f (diff) | |
| download | u-boot-400558b561e2bdb47f87b96b3510dda0881a3662.tar.gz u-boot-400558b561e2bdb47f87b96b3510dda0881a3662.tar.xz u-boot-400558b561e2bdb47f87b96b3510dda0881a3662.zip | |
Prepare for SoC rework of ARM code:
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL
- rename memsetup into lowlevel_init (function name and source files)
Diffstat (limited to 'cpu/pxa')
| -rw-r--r-- | cpu/pxa/start.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index d74f41ff38..da753a18da 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -218,10 +218,10 @@ setspeed_done: /* * before relocating, we have to setup RAM timing * because memory timing is board-dependend, you will - * find a memsetup.S in your board directory. + * find a lowlevel_init.S in your board directory. */ mov ip, lr - bl memsetup + bl lowlevel_init mov lr, ip /* Memory interfaces are working. Disable MMU and enable I-cache. */ |