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author | Stefan Roese <sr@denx.de> | 2007-03-02 06:58:53 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-03-02 06:58:53 +0100 |
commit | 87ed3bfb4214c4b39a5a642bcd851f60b3898af2 (patch) | |
tree | a0017423e9d07a9e05c07a8a1a6601a2a4d00177 /cpu/ppc4xx/start.S | |
parent | 621a7873ef205c4325fc07c646bd1d509763b22f (diff) | |
parent | fdd1d6dcc97c595bd9d598ed3b22a7038781272c (diff) | |
download | u-boot-87ed3bfb4214c4b39a5a642bcd851f60b3898af2.tar.gz u-boot-87ed3bfb4214c4b39a5a642bcd851f60b3898af2.tar.xz u-boot-87ed3bfb4214c4b39a5a642bcd851f60b3898af2.zip |
Merge with git+ssh://sr@pollux.denx.org/home/sr/git/u-boot/denx/.git
Diffstat (limited to 'cpu/ppc4xx/start.S')
-rw-r--r-- | cpu/ppc4xx/start.S | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 200f7b31ad..24b30dfe71 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1912,4 +1912,47 @@ pll_wait: TLBRE(3,3,0) blr function_epilog(mftlb1) + +/*----------------------------------------------------------------------------+ +| dcbz_area. ++----------------------------------------------------------------------------*/ + function_prolog(dcbz_area) + rlwinm. r5,r4,0,27,31 + rlwinm r5,r4,27,5,31 + beq ..d_ra2 + addi r5,r5,0x0001 +..d_ra2:mtctr r5 +..d_ag2:dcbz r0,r3 + addi r3,r3,32 + bdnz ..d_ag2 + sync + blr + function_epilog(dcbz_area) + +/*----------------------------------------------------------------------------+ +| dflush. Assume 32K at vector address is cachable. ++----------------------------------------------------------------------------*/ + function_prolog(dflush) + mfmsr r9 + rlwinm r8,r9,0,15,13 + rlwinm r8,r8,0,17,15 + mtmsr r8 + addi r3,r0,0x0000 + mtspr dvlim,r3 + mfspr r3,ivpr + addi r4,r0,1024 + mtctr r4 +..dflush_loop: + lwz r6,0x0(r3) + addi r3,r3,32 + bdnz ..dflush_loop + addi r3,r3,-32 + mtctr r4 +..ag: dcbf r0,r3 + addi r3,r3,-32 + bdnz ..ag + sync + mtmsr r9 + blr + function_epilog(dflush) #endif /* CONFIG_440 */ |