summaryrefslogtreecommitdiffstats
path: root/cpu/mpc85xx/start.S
diff options
context:
space:
mode:
authorKumar Gala <galak@kernel.crashing.org>2006-03-20 10:42:05 -0600
committerKumar Gala <galak@kernel.crashing.org>2006-03-20 10:42:05 -0600
commitf8edca2e9a128f526b1fe6f997f7adb852cf5b3c (patch)
tree92deb9ddf1153c64ff1ced9392816e60b4ecaa03 /cpu/mpc85xx/start.S
parent79582020313e6d992a3bac71cf3a9b337f9ac7f7 (diff)
parent7b4fd36b0322ec98836a8459d9be80e2777fdc05 (diff)
downloadu-boot-f8edca2e9a128f526b1fe6f997f7adb852cf5b3c.tar.gz
u-boot-f8edca2e9a128f526b1fe6f997f7adb852cf5b3c.tar.xz
u-boot-f8edca2e9a128f526b1fe6f997f7adb852cf5b3c.zip
Merge branch 'origin'
Conflicts: CHANGELOG
Diffstat (limited to 'cpu/mpc85xx/start.S')
-rw-r--r--cpu/mpc85xx/start.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 7ac65736bc..f96a4c3f8b 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -715,7 +715,7 @@ icache_disable:
.globl icache_status
icache_status:
mfspr r3,L1CSR1
- srwi r3, r3, 31 /* >>31 => select bit 0 */
+ andi. r3,r3,1
blr
.globl dcache_enable
@@ -748,7 +748,7 @@ dcache_disable:
.globl dcache_status
dcache_status:
mfspr r3,L1CSR0
- srwi r3, r3, 31 /* >>31 => select bit 0 */
+ andi. r3,r3,1
blr
.globl get_pir