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| author | wdenk <wdenk> | 2003-09-16 11:39:10 +0000 |
|---|---|---|
| committer | wdenk <wdenk> | 2003-09-16 11:39:10 +0000 |
| commit | acf98e7f3062921547516d87611f2ae9824808b9 (patch) | |
| tree | 863fc87787822526f6dc29b7d46d28093420d5d2 /cpu/mpc5xxx | |
| parent | b56ddc636ddcaacf7fa497819cc1b9517d610eee (diff) | |
| download | u-boot-acf98e7f3062921547516d87611f2ae9824808b9.tar.gz u-boot-acf98e7f3062921547516d87611f2ae9824808b9.tar.xz u-boot-acf98e7f3062921547516d87611f2ae9824808b9.zip | |
Make IPB clock on MGT5100/MPC5200 configurable in board config file;
go back to 66 MHz for stability
Diffstat (limited to 'cpu/mpc5xxx')
| -rw-r--r-- | cpu/mpc5xxx/cpu_init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c index a93a198cf5..a33e2501e7 100644 --- a/cpu/mpc5xxx/cpu_init.c +++ b/cpu/mpc5xxx/cpu_init.c @@ -152,6 +152,7 @@ void cpu_init_f (void) /* enable timebase */ *(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13); +#if defined(CFG_IPBSPEED_133) /* Motorola reports IPB should better run at 133 MHz. */ *(vu_long *)MPC5XXX_ADDECR |= 1; /* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */ @@ -160,6 +161,7 @@ void cpu_init_f (void) addecr |= 0x02; *(vu_long *)MPC5XXX_CDM_CFG = addecr; #endif +#endif } /* |