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| author | TsiChung Liew <tsicliew@gmail.com> | 2010-03-09 18:32:16 -0600 |
|---|---|---|
| committer | TsiChung Liew <tsicliew@gmail.com> | 2010-03-24 11:09:03 -0500 |
| commit | d04c1efae3d834db6e21e9976e338bf1e588e987 (patch) | |
| tree | 61c0c42980d18b5dd98531432bbfd53144bb30ee /cpu/mcf52x2 | |
| parent | 116095eb1f0f7017ea8062aa8a8ba8ceecb430b5 (diff) | |
| download | u-boot-d04c1efae3d834db6e21e9976e338bf1e588e987.tar.gz u-boot-d04c1efae3d834db6e21e9976e338bf1e588e987.tar.xz u-boot-d04c1efae3d834db6e21e9976e338bf1e588e987.zip | |
ColdFire: Correct bit definition
Use correct definition for _MASK and _UNMASK. It was combined in
the previous used and causes confusion.
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Diffstat (limited to 'cpu/mcf52x2')
| -rw-r--r-- | cpu/mcf52x2/cpu_init.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 5b06930df8..747c1cf90d 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -142,29 +142,29 @@ void uart_port_conf(void) /* Setup Ports: */ switch (CONFIG_SYS_UART_PORT) { case 0: - gpio->par_uart &= GPIO_PAR_UART0_MASK; + gpio->par_uart &= GPIO_PAR_UART0_UNMASK; gpio->par_uart |= (GPIO_PAR_UART_U0TXD | GPIO_PAR_UART_U0RXD); break; case 1: - gpio->par_uart &= GPIO_PAR_UART0_MASK; + gpio->par_uart &= GPIO_PAR_UART0_UNMASK; gpio->par_uart |= (GPIO_PAR_UART_U1TXD | GPIO_PAR_UART_U1RXD); break; case 2: #ifdef CONFIG_SYS_UART2_PRI_GPIO gpio->par_timer &= - (GPIO_PAR_TMR_TIN0_MASK | GPIO_PAR_TMR_TIN1_MASK); + (GPIO_PAR_TMR_TIN0_UNMASK | GPIO_PAR_TMR_TIN1_UNMASK); gpio->par_timer |= (GPIO_PAR_TMR_TIN0_U2TXD | GPIO_PAR_TMR_TIN1_U2RXD); #endif #ifdef CONFIG_SYS_UART2_ALT1_GPIO gpio->par_feci2c &= - (GPIO_PAR_FECI2C_MDC_MASK | GPIO_PAR_FECI2C_MDIO_MASK); + (GPIO_PAR_FECI2C_MDC_UNMASK | GPIO_PAR_FECI2C_MDIO_UNMASK); gpio->par_feci2c |= (GPIO_PAR_FECI2C_MDC_U2TXD | GPIO_PAR_FECI2C_MDIO_U2RXD); #endif #ifdef CONFIG_SYS_UART2_ALT1_GPIO gpio->par_feci2c &= - (GPIO_PAR_FECI2C_SDA_MASK | GPIO_PAR_FECI2C_SCL_MASK); + (GPIO_PAR_FECI2C_SDA_UNMASK | GPIO_PAR_FECI2C_SCL_UNMASK); gpio->par_feci2c |= (GPIO_PAR_FECI2C_SDA_U2TXD | GPIO_PAR_FECI2C_SCL_U2RXD); #endif @@ -184,8 +184,8 @@ int fecpin_setclear(struct eth_device *dev, int setclear) GPIO_PAR_FECI2C_MDC_MDC | GPIO_PAR_FECI2C_MDIO_MDIO; } else { gpio->par_fec &= - (GPIO_PAR_FEC_7W_MASK & GPIO_PAR_FEC_MII_MASK); - gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII_MASK; + (GPIO_PAR_FEC_7W_UNMASK & GPIO_PAR_FEC_MII_UNMASK); + gpio->par_feci2c &= GPIO_PAR_FECI2C_RMII_UNMASK; } return 0; } |