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| author | Fabio Estevam <fabio.estevam@freescale.com> | 2012-05-07 10:25:59 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-05-15 08:31:34 +0200 |
| commit | 5b547f3c20cc0d394f0bbab817e2a50d1a18235f (patch) | |
| tree | 88ad9f5fd1182d0f91034db10e0074f4d328b8db /board | |
| parent | ed5157e8895a6bf59a8163329639e34db0702331 (diff) | |
| download | u-boot-5b547f3c20cc0d394f0bbab817e2a50d1a18235f.tar.gz u-boot-5b547f3c20cc0d394f0bbab817e2a50d1a18235f.tar.xz u-boot-5b547f3c20cc0d394f0bbab817e2a50d1a18235f.zip | |
mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/mx53loco/mx53loco.c | 48 |
1 files changed, 36 insertions, 12 deletions
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 7ed5c4e4da..8f5ded988d 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -38,6 +38,7 @@ #include <asm/gpio.h> #include <pmic.h> #include <dialog_pmic.h> +#include <fsl_pmic.h> DECLARE_GLOBAL_DATA_PTR; @@ -319,23 +320,46 @@ static void setup_iomux_i2c(void) static int power_init(void) { - unsigned int val, ret; + unsigned int val; + int ret = -1; struct pmic *p; - pmic_dialog_init(); - p = get_pmic(); + if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { + pmic_dialog_init(); + p = get_pmic(); - /* Set VDDA to 1.25V */ - val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; - ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); + /* Set VDDA to 1.25V */ + val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; + ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); - ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val); - val |= DA9052_SUPPLY_VBCOREGO; - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val); + ret |= pmic_reg_read(p, DA9053_SUPPLY_REG, &val); + val |= DA9052_SUPPLY_VBCOREGO; + ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, val); - /* Set Vcc peripheral to 1.35V */ - ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); - ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + /* Set Vcc peripheral to 1.30V */ + ret |= pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); + ret |= pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); + } + + if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { + pmic_init(); + p = get_pmic(); + + /* Set VDDGP to 1.25V for 1GHz on SW1 */ + pmic_reg_read(p, REG_SW_0, &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; + ret = pmic_reg_write(p, REG_SW_0, val); + + /* Set VCC as 1.30V on SW2 */ + pmic_reg_read(p, REG_SW_1, &val); + val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; + ret |= pmic_reg_write(p, REG_SW_1, val); + + /* Set global reset timer to 4s */ + pmic_reg_read(p, REG_POWER_CTL2, &val); + val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; + ret |= pmic_reg_write(p, REG_POWER_CTL2, val); + } return ret; } |