Cleanup (PPC4xx is AMCC now)

10 files changed, 47 insertions, 47 deletions

diff --git a/board/MAI/AmigaOneG3SE/ps2kbd.c b/board/MAI/AmigaOneG3SE/ps2kbd.c
index bfe5eb3ed7..cf4f4d0e3d 100644
--- a/board/MAI/AmigaOneG3SE/ps2kbd.c
+++ b/board/MAI/AmigaOneG3SE/ps2kbd.c
@@ -656,7 +656,7 @@ char * kbd_initialize(void)
 			      | KBD_MODE_DISABLE_MOUSE
 			      | KBD_MODE_KCC);
 
-	/* ibm powerpc portables need this to use scan-code set 1 -- Cort */
+	/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
 	kbd_write_command_w(KBD_CCMD_READ_MODE);
 	if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
 		/*
diff --git a/board/amcc/ocotea/config.mk b/board/amcc/ocotea/config.mk
index 5543a4eabd..9e1833591a 100644
--- a/board/amcc/ocotea/config.mk
+++ b/board/amcc/ocotea/config.mk
@@ -22,7 +22,7 @@
 #
 
 #
-# IBM 440GX Reference Platform (Ocotea) board
+# AMCC 440GX Reference Platform (Ocotea) board
 #
 
 #TEXT_BASE = 0xFFFE0000
diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
index 1f6512d0ea..b425d63967 100644
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -279,10 +279,10 @@ void video_get_info_str (int line_number, char *info)
 	case 1:
 		switch (pvr) {
 		case PVR_405EP_RB:
-			sprintf (info, " IBM PowerPC 405EP Rev. B");
+			sprintf (info, " AMCC PowerPC 405EP Rev. B");
 			break;
 		default:
-			sprintf (info, " IBM PowerPC 405EP Rev. <unknown>");
+			sprintf (info, " AMCC PowerPC 405EP Rev. <unknown>");
 			break;
 		}
 		return;
diff --git a/board/eric/eric.c b/board/eric/eric.c
index 860e5064b8..02fe8dcfbd 100644
--- a/board/eric/eric.c
+++ b/board/eric/eric.c
@@ -26,10 +26,10 @@
 #include "eric.h"
 #include <asm/processor.h>
 
-#define IBM405GP_GPIO0_OR      0xef600700	/* GPIO Output */
-#define IBM405GP_GPIO0_TCR     0xef600704	/* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR     0xef600718	/* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR      0xef60071c	/* GPIO Input */
+#define PPC405GP_GPIO0_OR      0xef600700	/* GPIO Output */
+#define PPC405GP_GPIO0_TCR     0xef600704	/* GPIO Three-State Control */
+#define PPC405GP_GPIO0_ODR     0xef600718	/* GPIO Open Drain */
+#define PPC405GP_GPIO0_IR      0xef60071c	/* GPIO Input */
 
 int board_early_init_f (void)
 {
@@ -50,7 +50,7 @@ int board_early_init_f (void)
    |       IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
    |       IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
    |        -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
-   |           IBM405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in IBM405GP_GPIO0_OR,
+   |           PPC405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in PPC405GP_GPIO0_OR,
    |           else tristate)
    | Note for ERIC board:
    |       An interrupt taken for the HOST (IRQ 28) indicates that
@@ -70,8 +70,8 @@ int board_early_init_f (void)
 
 	mtdcr (cntrl0, 0x00002000);	/* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
 
-	out32 (IBM405GP_GPIO0_OR, 0x60000000);	/*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
-	out32 (IBM405GP_GPIO0_TCR, 0x7E400000);
+	out32 (PPC405GP_GPIO0_OR, 0x60000000);	/*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output */
+	out32 (PPC405GP_GPIO0_TCR, 0x7E400000);
 
 	return 0;
 }
diff --git a/board/esd/ocrtc/cmd_ocrtc.c b/board/esd/ocrtc/cmd_ocrtc.c
index 881d1799f0..e113d5cab6 100644
--- a/board/esd/ocrtc/cmd_ocrtc.c
+++ b/board/esd/ocrtc/cmd_ocrtc.c
@@ -29,8 +29,8 @@
 
 #if (CONFIG_COMMANDS & CFG_CMD_BSP)
 
-#define IBM_VENDOR_ID    0x1014
-#define PPC405_DEVICE_ID 0x0156
+#define AMCC_VENDOR_ID		0x1014
+#define PPC405_DEVICE_ID	0x0156
 
 
 /*
@@ -43,7 +43,7 @@ int do_setdevice(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	u32 addr;
 
 	while (bdf >= 0) {
-		if ((bdf = pci_find_device(IBM_VENDOR_ID, PPC405_DEVICE_ID, idx++)) < 0) {
+		if ((bdf = pci_find_device(AMCC_VENDOR_ID, PPC405_DEVICE_ID, idx++)) < 0) {
 			break;
 		}
 		printf("Found device nr %d at %x!\n", idx-1, bdf);
diff --git a/board/mpl/common/kbd.c b/board/mpl/common/kbd.c
index 9bd1ff94d4..7724e241d1 100644
--- a/board/mpl/common/kbd.c
+++ b/board/mpl/common/kbd.c
@@ -613,7 +613,7 @@ char * kbd_initialize(void)
 			      | KBD_MODE_DISABLE_MOUSE
 			      | KBD_MODE_KCC);
 
-	/* ibm powerpc portables need this to use scan-code set 1 -- Cort */
+	/* AMCC powerpc portables need this to use scan-code set 1 -- Cort */
 	kbd_write_command_w(KBD_CCMD_READ_MODE);
 	if (!(kbd_wait_for_input() & KBD_MODE_KCC)) {
 		/*
diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h
index a57b121561..60008e2b24 100644
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -137,7 +137,7 @@ static struct pci_pip405_config_entry piix4_pmm_cntrl_f3[] = {
 	{ }					    /* end of device table 	*/
 };
 /* PPC405 Dummy only used to prevent autosetup on this host bridge */
-static struct pci_pip405_config_entry ibm405_dummy[] = {
+static struct pci_pip405_config_entry ppc405_dummy[] = {
 	{ }				    	    /* end of device table 	*/
 };
 
@@ -150,7 +150,7 @@ static struct pci_config_table pci_pip405_config_table[]={
 	 PCI_DEVICE_ID_IBM_405GP,
 	 PCI_ANY_ID,
 	 PCI_ANY_ID, PCI_ANY_ID, 0,
-	 pci_pip405_write_regs, {(unsigned long) ibm405_dummy}},
+	 pci_pip405_write_regs, {(unsigned long) ppc405_dummy}},
 
 	{PCI_VENDOR_ID_INTEL, 			/* PIIX4 ISA Bridge Function 0 */
 	 PCI_DEVICE_ID_INTEL_82371AB_0,
diff --git a/board/w7o/fpga.c b/board/w7o/fpga.c
index 97af924294..336bfbaccc 100644
--- a/board/w7o/fpga.c
+++ b/board/w7o/fpga.c
@@ -77,17 +77,17 @@ fpgaDownload(unsigned char *saddr,
     dest = (unsigned short *)daddr;
 
     /* Get DCR output register */
-    grego = in32(IBM405GP_GPIO0_OR);
+    grego = in32(PPC405GP_GPIO0_OR);
 
     /* Reset FPGA */
     grego &= ~GPIO_XCV_PROG;			/* PROG line low */
-    out32(IBM405GP_GPIO0_OR, grego);
+    out32(PPC405GP_GPIO0_OR, grego);
 
     /* Setup timeout timer */
     start = get_timer(0);
 
     /* Wait for FPGA init line */
-    while(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */
+    while(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */
 	/* Check for timeout - 100us max, so use 3ms */
 	if (get_timer(start) > 3) {
 	    printf("     failed to start init.\n");
@@ -100,10 +100,10 @@ fpgaDownload(unsigned char *saddr,
 
     /* Unreset FPGA */
     grego |= GPIO_XCV_PROG;			/* PROG line high */
-    out32(IBM405GP_GPIO0_OR, grego);
+    out32(PPC405GP_GPIO0_OR, grego);
 
     /* Wait for FPGA end of init period .  */
-    while(!(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */
+    while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */
 
 	/* Check for timeout */
 	if (get_timer(start) > 3) {
@@ -112,7 +112,7 @@ fpgaDownload(unsigned char *saddr,
 
 	    /* Reset FPGA */
 	    grego &= ~GPIO_XCV_PROG;		/* PROG line low */
-	    out32(IBM405GP_GPIO0_OR, grego);
+	    out32(PPC405GP_GPIO0_OR, grego);
 
 	    goto done;
 	}
@@ -127,18 +127,18 @@ fpgaDownload(unsigned char *saddr,
 	mtdcr(CPC0_CR0, greg);			/*  ... just do it */
 
 	/* turn on open drain for CNFG */
-	greg = in32(IBM405GP_GPIO0_ODR);	/* get open drain register */
+	greg = in32(PPC405GP_GPIO0_ODR);	/* get open drain register */
 	greg |= cnfg;				/* CNFG open drain */
-	out32(IBM405GP_GPIO0_ODR, greg);	/*  .. just do it */
+	out32(PPC405GP_GPIO0_ODR, greg);	/*  .. just do it */
 
 	/* Turn output enable on for CNFG */
-	greg = in32(IBM405GP_GPIO0_TCR);	/* get tristate register */
+	greg = in32(PPC405GP_GPIO0_TCR);	/* get tristate register */
 	greg |= cnfg;				/* CNFG tristate inactive */
-	out32(IBM405GP_GPIO0_TCR, greg);	/*  ... just do it */
+	out32(PPC405GP_GPIO0_TCR, greg);	/*  ... just do it */
 
 	/* Setup FPGA for programming */
 	grego &= ~cnfg;				/* CONFIG line low */
-	out32(IBM405GP_GPIO0_OR, grego);
+	out32(PPC405GP_GPIO0_OR, grego);
 
 	/*
 	 * Program the FPGA
@@ -149,12 +149,12 @@ fpgaDownload(unsigned char *saddr,
 
 	/* Done programming */
 	grego |= cnfg;				/* CONFIG line high */
-	out32(IBM405GP_GPIO0_OR, grego);
+	out32(PPC405GP_GPIO0_OR, grego);
 
 	/* Turn output enable OFF for CNFG */
-	greg = in32(IBM405GP_GPIO0_TCR);	/* get tristate register */
+	greg = in32(PPC405GP_GPIO0_TCR);	/* get tristate register */
 	greg &= ~cnfg;				/* CNFG tristate inactive */
-	out32(IBM405GP_GPIO0_TCR, greg);	/*  ... just do it */
+	out32(PPC405GP_GPIO0_TCR, greg);	/*  ... just do it */
 
 	/* Toggle IRQ/GPIO */
 	greg = mfdcr(CPC0_CR0);			/* get chip ctrl register */
@@ -180,7 +180,7 @@ fpgaDownload(unsigned char *saddr,
     start = get_timer(0);
 
     /* Wait for FPGA end of programming period .  */
-    while(!(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */
+    while(!(in32(PPC405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */
 
 	/* Check for timeout */
 	if (get_timer(start) > 3) {
@@ -189,7 +189,7 @@ fpgaDownload(unsigned char *saddr,
 
 	    /* Reset FPGA */
 	    grego &= ~GPIO_XCV_PROG;		/* PROG line low */
-	    out32(IBM405GP_GPIO0_OR, grego);
+	    out32(PPC405GP_GPIO0_OR, grego);
 
 	    goto done;
 	}
diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c
index 1e3ceb20d6..daf7f53fcd 100644
--- a/board/w7o/w7o.c
+++ b/board/w7o/w7o.c
@@ -47,9 +47,9 @@ int board_early_init_f (void)
 	/*
 	 * Setup GPIO pins - reset devices.
 	 */
-	out32 (IBM405GP_GPIO0_ODR, 0x10000000);	/* one open drain pin */
-	out32 (IBM405GP_GPIO0_OR, 0x3E000000);	/* set output pins to default */
-	out32 (IBM405GP_GPIO0_TCR, 0x7f800000);	/* setup for output */
+	out32 (PPC405GP_GPIO0_ODR, 0x10000000);	/* one open drain pin */
+	out32 (PPC405GP_GPIO0_OR, 0x3E000000);	/* set output pins to default */
+	out32 (PPC405GP_GPIO0_TCR, 0x7f800000);	/* setup for output */
 
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -78,9 +78,9 @@ int board_early_init_f (void)
 	/*
 	 * Setup GPIO pins
 	 */
-	out32 (IBM405GP_GPIO0_ODR, 0x01800000);	/* XCV Done Open Drain */
-	out32 (IBM405GP_GPIO0_OR, 0x03800000);	/* set out pins to default */
-	out32 (IBM405GP_GPIO0_TCR, 0x66C00000);	/* setup for output */
+	out32 (PPC405GP_GPIO0_ODR, 0x01800000);	/* XCV Done Open Drain */
+	out32 (PPC405GP_GPIO0_OR, 0x03800000);	/* set out pins to default */
+	out32 (PPC405GP_GPIO0_TCR, 0x66C00000);	/* setup for output */
 
 	/*
 	 * IRQ 0-15  405GP internally generated; active high; level sensitive
@@ -238,14 +238,14 @@ int misc_init_r (void)
 #if defined(CONFIG_W7OLMG)
 	unsigned long greg;	/* GPIO Register */
 
-	greg = in32 (IBM405GP_GPIO0_OR);
+	greg = in32 (PPC405GP_GPIO0_OR);
 
 	/*
 	 * XXX - Unreset devices - this should be moved into VxWorks driver code
 	 */
 	greg |= 0x41800000L;	/* SAM, PHY, Galileo */
 
-	out32 (IBM405GP_GPIO0_OR, greg);	/* set output pins to default */
+	out32 (PPC405GP_GPIO0_OR, greg);	/* set output pins to default */
 #endif /* CONFIG_W7OLMG */
 
 	/*
diff --git a/board/w7o/w7o.h b/board/w7o/w7o.h
index 84581664e8..d6f50e2e67 100644
--- a/board/w7o/w7o.h
+++ b/board/w7o/w7o.h
@@ -25,13 +25,13 @@
 #define _W7O_H_
 #include <config.h>
 
-/* IBM 405GP PowerPC GPIO registers */
-#define IBM405GP_GPIO0_OR	0xef600700L	/* GPIO Output */
-#define IBM405GP_GPIO0_TCR	0xef600704L	/* GPIO Three-State Control */
-#define IBM405GP_GPIO0_ODR	0xef600718L	/* GPIO Open Drain */
-#define IBM405GP_GPIO0_IR	0xef60071cL	/* GPIO Input */
+/* AMCC 405GP PowerPC GPIO registers */
+#define PPC405GP_GPIO0_OR	0xef600700L	/* GPIO Output */
+#define PPC405GP_GPIO0_TCR	0xef600704L	/* GPIO Three-State Control */
+#define PPC405GP_GPIO0_ODR	0xef600718L	/* GPIO Open Drain */
+#define PPC405GP_GPIO0_IR	0xef60071cL	/* GPIO Input */
 
-/* IBM 405GP DCRs */
+/* AMCC 405GP DCRs */
 #define CPC0_CR0		0xb1		/* Chip control register 0 */
 
 /* LMG FPGA <=> CPU GPIO signals */