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| author | roy zang <tie-fei.zang@freescale.com> | 2006-12-04 17:54:21 +0800 |
|---|---|---|
| committer | Zang Tiefei <roy@bus.ap.freescale.net> | 2006-12-04 17:54:21 +0800 |
| commit | 4dbcd69e3e2776ea334590d5768e3692c5fae5c1 (patch) | |
| tree | f14a1b9562b8a71f77855e748716c373cf1749c6 /board | |
| parent | 4efe20c9579011d9987f62ed7d35ee8cdc1cf0e0 (diff) | |
| download | u-boot-4dbcd69e3e2776ea334590d5768e3692c5fae5c1.tar.gz u-boot-4dbcd69e3e2776ea334590d5768e3692c5fae5c1.tar.xz u-boot-4dbcd69e3e2776ea334590d5768e3692c5fae5c1.zip | |
Introduce PLL_CFG[0:4] table for processor 7448/7447A/7455/7457. The original
multiplier table can not refect the real PLL clock behavior of these
processors. Please refer to the hardware specification for detailed
information of the corresponding processors.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Diffstat (limited to 'board')
0 files changed, 0 insertions, 0 deletions