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authorChander Kashyap <chander.kashyap@linaro.org>2011-05-26 01:10:34 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-06-01 19:41:32 +0200
commitcb56c0237dfd2d3ef19835108626a1aebaca894d (patch)
treeba7871d5ebd3052d871da157af93d88321d12eb5 /board/samsung
parentafbf88993c4ed190ed0273a5379500ff1ca56465 (diff)
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SMDKV310: CPU fequency and mmc_pre_ratio modified
Modifies CPU Frequency to 1GHz and removes hard coding of mmc_pre_ratio for MMC Channel2 in FSYS2 register. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'board/samsung')
-rw-r--r--board/samsung/smdkv310/lowlevel_init.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/board/samsung/smdkv310/lowlevel_init.S b/board/samsung/smdkv310/lowlevel_init.S
index 359cff4ad4..04f657947a 100644
--- a/board/samsung/smdkv310/lowlevel_init.S
+++ b/board/samsung/smdkv310/lowlevel_init.S
@@ -170,7 +170,7 @@ system_clock_init:
* COREM1_RATIO[8] 0x7
* COREM0_RATIO[4] 0x3
*/
- ldr r1, =0x01133730
+ ldr r1, =0x0133730
ldr r2, =0x14500 @CLK_DIV_CPU0_OFFSET
str r1, [r0, r2]
@@ -245,7 +245,7 @@ system_clock_init:
str r1, [r0, r2]
/* MMC[2:3] */
- ldr r1, =0x000f020f /* 800(MPLL) / (15 + 1) */
+ ldr r1, =0x000f000f /* 800(MPLL) / (15 + 1) */
ldr r2, =0x0C548 @ CLK_DIV_FSYS2
str r1, [r0, r2]