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authorKumar Gala <galak@kernel.crashing.org>2010-12-17 10:42:33 -0600
committerKumar Gala <galak@kernel.crashing.org>2011-01-14 01:32:20 -0600
commitb8526212ca1e299d8833f413b737a326bf484ee4 (patch)
tree56ec8935a488701210f41ecfaa6f72dde9195c92 /board/freescale/mpc8610hpcd/mpc8610hpcd.c
parent06eb4d8c68d2ea72da398c88c077fc2fb7cca6d9 (diff)
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powerpc/86xx: Rework MPC8610HPCD pci_init_board to use common FSL PCIe code
Remove duplicated code in MPC8610HPCD board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8610hpcd/mpc8610hpcd.c')
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c72
1 files changed, 15 insertions, 57 deletions
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index 8abd917889..d7dd470c3f 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -213,78 +213,34 @@ config_table:pci_mpc86xxcts_config_table
};
#endif /* CONFIG_PCI */
-#ifdef CONFIG_PCIE1
-static struct pci_controller pcie1_hose;
-#endif
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif
-
void pci_init_board(void)
{
volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
- struct fsl_pci_info pci_info[3];
+ struct fsl_pci_info pci_info;
u32 devdisr, pordevsr;
- int first_free_busno = 0;
- int num = 0;
-
- int pci_agent, pcie_ep, pcie_configured;
+ int first_free_busno;
+ int pci_agent;
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
-#ifdef CONFIG_PCIE1
- pcie_configured = is_serdes_configured(PCIE1);
-
- if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
- SET_STD_PCIE_INFO(pci_info[num], 1);
- pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
-
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie1_hose, first_free_busno);
- } else {
- printf("PCIE1: disabled\n");
- }
-
- puts("\n");
-#else
- setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCIE1); /* disable */
-#endif
-
-#ifdef CONFIG_PCIE2
- pcie_configured = is_serdes_configured(PCIE2);
-
- if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
- SET_STD_PCIE_INFO(pci_info[num], 2);
- pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf("PCIE2: connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
- &pcie2_hose, first_free_busno);
- } else {
- printf("PCIE2: disabled\n");
- }
-
- puts("\n");
-#else
- setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCIE2); /* disable */
-#endif
+ first_free_busno = fsl_pcie_init_board(0);
#ifdef CONFIG_PCI1
if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
- SET_STD_PCI_INFO(pci_info[num], 1);
- pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
+ SET_STD_PCI_INFO(pci_info, 1);
+ set_next_law(pci_info.mem_phys,
+ law_size_bits(pci_info.mem_size), pci_info.law);
+ set_next_law(pci_info.io_phys,
+ law_size_bits(pci_info.io_size), pci_info.law);
+
+ pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs);
printf("PCI: connected to PCI slots as %s" \
" (base address %lx)\n",
pci_agent ? "Agent" : "Host",
- pci_info[num].regs);
- first_free_busno = fsl_pci_init_port(&pci_info[num++],
+ pci_info.regs);
+ first_free_busno = fsl_pci_init_port(&pci_info,
&pci1_hose, first_free_busno);
} else {
printf("PCI: disabled\n");
@@ -294,6 +250,8 @@ void pci_init_board(void)
#else
setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCI1); /* disable */
#endif
+
+ fsl_pcie_init_board(first_free_busno);
}
#if defined(CONFIG_OF_BOARD_SETUP)