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author | wdenk <wdenk> | 2003-10-15 23:53:47 +0000 |
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committer | wdenk <wdenk> | 2003-10-15 23:53:47 +0000 |
commit | 42d1f0394bef0624fc9664714d54bb137931d6a6 (patch) | |
tree | 892a4130507484d25faf9a72e019cf88cfb3e3d9 /board/dave/common/fpga.c | |
parent | 2d5b561e2bfdee8552a99b2cf93016cce2a74895 (diff) | |
download | u-boot-42d1f0394bef0624fc9664714d54bb137931d6a6.tar.gz u-boot-42d1f0394bef0624fc9664714d54bb137931d6a6.tar.xz u-boot-42d1f0394bef0624fc9664714d54bb137931d6a6.zip |
* Patches by Xianghua Xiao, 15 Oct 2003:LABEL_2003_10_16_0200
- Added Motorola CPU 8540/8560 support (cpu/85xx)
- Added Motorola MPC8540ADS board support (board/mpc8540ads)
- Added Motorola MPC8560ADS board support (board/mpc8560ads)
* Minor code cleanup
Diffstat (limited to 'board/dave/common/fpga.c')
-rw-r--r-- | board/dave/common/fpga.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/board/dave/common/fpga.c b/board/dave/common/fpga.c index 9547325cab..5b5b5e9d2e 100644 --- a/board/dave/common/fpga.c +++ b/board/dave/common/fpga.c @@ -57,16 +57,16 @@ #define SET_FPGA(data) out32(GPIO0_OR, data) #define FPGA_WRITE_1 { \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ #define FPGA_WRITE_0 { \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ - SET_FPGA(FPGA_PRG); /* set data to 0 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ + SET_FPGA(FPGA_PRG); /* set data to 0 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ #if 0 static int fpga_boot (unsigned char *fpgadata, int size) |