diff options
| author | Graf Yang <graf.yang@analog.com> | 2009-05-24 02:34:34 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-05-25 22:38:42 -0400 |
| commit | ab687907980fa28940a1a992d3f1c5d17cdbbf5d (patch) | |
| tree | 2af1fce8f29719391802f2984e1391537268769c | |
| parent | f40f6db278f602b55820693634a7256b0b4e4b80 (diff) | |
| download | u-boot-ab687907980fa28940a1a992d3f1c5d17cdbbf5d.tar.gz u-boot-ab687907980fa28940a1a992d3f1c5d17cdbbf5d.tar.xz u-boot-ab687907980fa28940a1a992d3f1c5d17cdbbf5d.zip | |
Blackfin: bf518f-ezbrd: setup portmux for async flash
The pins for async memory where parallel flash lives are not enabled by
default, so make sure we mux them as needed.
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| -rw-r--r-- | board/bf518f-ezbrd/bf518f-ezbrd.c | 16 | ||||
| -rw-r--r-- | include/configs/bf518f-ezbrd.h | 1 |
2 files changed, 17 insertions, 0 deletions
diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c index ec5a7ed0b1..63be7cf06c 100644 --- a/board/bf518f-ezbrd/bf518f-ezbrd.c +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -146,3 +146,19 @@ int misc_init_r(void) return 0; } + +int board_early_init_f(void) +{ +#if !defined(CONFIG_SYS_NO_FLASH) + /* setup BF518-EZBRD GPIO pin PG11 to AMS2. */ + bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_6_MASK) | PORT_x_MUX_6_FUNC_2); + bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG11); + +# if !defined(CONFIG_BFIN_SPI) + /* setup BF518-EZBRD GPIO pin PG15 to AMS3. */ + bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~PORT_x_MUX_7_MASK) | PORT_x_MUX_7_FUNC_3); + bfin_write_PORTG_FER(bfin_read_PORTG_FER() | PG15); +# endif +#endif + return 0; +} diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 77b94a8baf..06f2765a0d 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -132,6 +132,7 @@ /* * Misc Settings */ +#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 |