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| author | Markus Klotzbücher <Markus Klotzbümk@pollux.(none)> | 2006-02-22 17:48:43 +0100 |
|---|---|---|
| committer | Markus Klotzbücher <mk@pollux.(none)> | 2006-02-22 17:48:43 +0100 |
| commit | 599f52253ab38e1b9d3966279ce83e7816f1e5e0 (patch) | |
| tree | 330f6d959177ed72a92f93a6c33ca2d6f025e78f | |
| parent | ff3c2a947889a9d60fc1c869565aa88b2e44b37b (diff) | |
| download | u-boot-599f52253ab38e1b9d3966279ce83e7816f1e5e0.tar.gz u-boot-599f52253ab38e1b9d3966279ce83e7816f1e5e0.tar.xz u-boot-599f52253ab38e1b9d3966279ce83e7816f1e5e0.zip | |
SDRAM now working.
| -rw-r--r-- | board/delta/config.mk | 5 | ||||
| -rw-r--r-- | include/configs/delta.h | 20 |
2 files changed, 13 insertions, 12 deletions
diff --git a/board/delta/config.mk b/board/delta/config.mk index 4b0fa679ee..d48fe054a0 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -1,5 +1,6 @@ #TEXT_BASE = 0x0 #TEXT_BASE = 0xa1700000 #TEXT_BASE = 0xa3080000 -#TEXT_BASE = 0xa3008000 -TEXT_BASE = 0x9ffe0000 +#TEXT_BASE = 0x9ffe0000 +TEXT_BASE = 0xa3008000 + diff --git a/include/configs/delta.h b/include/configs/delta.h index 786ed9a815..5b42069694 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -143,14 +143,14 @@ * Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */ -#define PHYS_SDRAM_1 0x80000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x8000000 /* 128 MB */ -#define PHYS_SDRAM_2 0x88000000 /* SDRAM Bank #2 */ -#define PHYS_SDRAM_2_SIZE 0x8000000 /* 128 MB */ -#define PHYS_SDRAM_3 0x90000000 /* SDRAM Bank #3 */ -#define PHYS_SDRAM_3_SIZE 0x8000000 /* 128 MB */ -#define PHYS_SDRAM_4 0x98000000 /* SDRAM Bank #4 */ -#define PHYS_SDRAM_4_SIZE 0x8000000 /* 128 MB */ +#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x1000000 /* 64 MB */ +#define PHYS_SDRAM_2 0xa1000000 /* SDRAM Bank #2 */ +#define PHYS_SDRAM_2_SIZE 0x1000000 /* 64 MB */ +#define PHYS_SDRAM_3 0xa2000000 /* SDRAM Bank #3 */ +#define PHYS_SDRAM_3_SIZE 0x1000000 /* 64 MB */ +#define PHYS_SDRAM_4 0xa3000000 /* SDRAM Bank #4 */ +#define PHYS_SDRAM_4_SIZE 0x1000000 /* 64 MB */ #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ #define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */ @@ -158,8 +158,8 @@ #define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */ #define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */ -#define CFG_DRAM_BASE 0x80000000 /* at CS0 */ -#define CFG_DRAM_SIZE 0x20000000 /* 512 MB Ram */ +#define CFG_DRAM_BASE 0xa0000000 /* at CS0 */ +#define CFG_DRAM_SIZE 0x04000000 /* 64 MB Ram */ #define CFG_SKIP_DRAM_SCRUB 1 |