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authorZang Roy-r61911 <tie-fei.zang@freescale.com>2006-12-15 14:43:31 +0800
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-04-23 19:58:27 -0500
commit7337b237ffc4aaf1b9467024fe472a880d852598 (patch)
treefbeba62cd0ed89c61ae661d2e9ca09c80a71eeea
parent39b18c4f3e0b6d0dc00f4e68bad2da3766c85f09 (diff)
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u-boot: Fix CPU2 errata on MPC8548CDS board
This patch apply workaround of CPU2 errata on MPC8548CDS board. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
-rw-r--r--board/cds/mpc8548cds/mpc8548cds.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index 7433ebf25b..0d3fcebfe2 100644
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -51,6 +51,7 @@ int checkboard (void)
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
+ volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@@ -89,6 +90,12 @@ int checkboard (void)
*/
local_bus_init ();
+ /*
+ * Fix CPU2 errata: A core hang possible while executing a
+ * msync instruction and a snoopable transaction from an I/O
+ * master tagged to make quick forward progress is present.
+ */
+ ecm->eebpcr |= (1 << 16);
/*
* Hack TSEC 3 and 4 IO voltages.